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author | Andrei Gherzan <andrei.gherzan@huawei.com> | 2021-03-09 20:13:21 +0000 |
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committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2021-03-10 10:29:44 +0000 |
commit | 89b38e4e7be9e136c71d5860ddca5369f9628393 (patch) | |
tree | ad682ffe0cd298889393ec3ada307e3a2bce3628 /meta/recipes-core/glibc/glibc_2.33.bb | |
parent | 6ff409d0d70b2ee0580d948c9fe50a1c9f224ac6 (diff) | |
download | openembedded-core-89b38e4e7be9e136c71d5860ddca5369f9628393.tar.gz |
glibc: Backport patch to fix _SC_LEVEL1_ICACHE_LINESIZE
Signed-off-by: Andrei Gherzan <andrei.gherzan@huawei.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-core/glibc/glibc_2.33.bb')
-rw-r--r-- | meta/recipes-core/glibc/glibc_2.33.bb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/meta/recipes-core/glibc/glibc_2.33.bb b/meta/recipes-core/glibc/glibc_2.33.bb index c47826a51e..ac73bbeb7f 100644 --- a/meta/recipes-core/glibc/glibc_2.33.bb +++ b/meta/recipes-core/glibc/glibc_2.33.bb @@ -45,6 +45,7 @@ SRC_URI = "${GLIBC_GIT_URI};branch=${SRCBRANCH};name=glibc \ file://0030-powerpc-Do-not-ask-compiler-for-finding-arch.patch \ file://0031-x86-Require-full-ISA-support-for-x86-64-level-marker.patch \ file://0032-string-Work-around-GCC-PR-98512-in-rawmemchr.patch \ + file://0033-x86-Handle-_SC_LEVEL1_ICACHE_LINESIZE-BZ-27444.patch \ " S = "${WORKDIR}/git" B = "${WORKDIR}/build-${TARGET_SYS}" |