aboutsummaryrefslogtreecommitdiffstats
path: root/recipes/u-boot/u-boot-git/omap3evm/0003-OMAP3-timer-handling-to-1ms-tick-and-CONFIG_SYS_HZ-t.patch
blob: 75f7ef230a31fc9431bd1273b63fcb37dba6bb34 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
From 13fc02c66aa4cc1c5653a4987fdddce63810a7e9 Mon Sep 17 00:00:00 2001
From: Manikandan Pillai <mani.pillai@ti.com>
Date: Tue, 7 Apr 2009 14:28:05 +0530
Subject: [PATCH 03/16] OMAP3 timer handling to 1ms tick and CONFIG_SYS_HZ to 1000.

Clean up macros and comments.
---
 cpu/arm_cortexa8/omap3/interrupts.c |   81 ++++++++++------------------------
 examples/Makefile                   |    2 +-
 include/configs/omap3_beagle.h      |   11 +++--
 include/configs/omap3_evm.h         |   13 +++---
 include/configs/omap3_overo.h       |   10 ++--
 include/configs/omap3_pandora.h     |   11 ++---
 include/configs/omap3_zoom1.h       |   11 ++---
 7 files changed, 52 insertions(+), 87 deletions(-)

diff --git a/cpu/arm_cortexa8/omap3/interrupts.c b/cpu/arm_cortexa8/omap3/interrupts.c
index 9e9817d..b99e284 100644
--- a/cpu/arm_cortexa8/omap3/interrupts.c
+++ b/cpu/arm_cortexa8/omap3/interrupts.c
@@ -169,7 +169,16 @@ static ulong timestamp;
 static ulong lastinc;
 static gptimer_t *timer_base = (gptimer_t *)CONFIG_SYS_TIMERBASE;
 
-/* nothing really to do with interrupts, just starts up a counter. */
+/*
+ * Nothing really to do with interrupts, just starts up a counter.
+ * We run the counter with 13MHz, divided by 8, resulting in timer
+ * frequency of 1.625MHz. With 32bit counter register, counter
+ * overflows in ~44min
+ */
+
+/* 13MHz / 8 = 1.625MHz */
+#define TIMER_CLOCK	(V_SCLK / (2 << CONFIG_SYS_PVT))
+
 int interrupt_init(void)
 {
 	/* start the counter ticking up, reload value on overflow */
@@ -204,78 +213,38 @@ void set_timer(ulong t)
 /* delay x useconds AND perserve advance timstamp value */
 void udelay(unsigned long usec)
 {
-	ulong tmo, tmp;
-
-	/* if "big" number, spread normalization to seconds */
-	if (usec >= 1000) {
-		/* if "big" number, spread normalization to seconds */
-		tmo = usec / 1000;
-		/* find number of "ticks" to wait to achieve target */
-		tmo *= CONFIG_SYS_HZ;
-		tmo /= 1000;	/* finish normalize. */
-	} else {/* else small number, don't kill it prior to HZ multiply */
-		tmo = usec * CONFIG_SYS_HZ;
-		tmo /= (1000 * 1000);
-	}
-
-	tmp = get_timer(0);	/* get current timestamp */
-	/* if setting this forward will roll time stamp */
-	if ((tmo + tmp + 1) < tmp)
-		/* reset "advancing" timestamp to 0, set lastinc value */
-		reset_timer_masked();
-	else
-		tmo += tmp;	/* else, set advancing stamp wake up time */
-	while (get_timer_masked() < tmo)	/* loop till event */
-		 /*NOP*/;
+	ulong tmo, endtime;
+
+	tmo = usec * (TIMER_CLOCK / CONFIG_SYS_HZ);
+	tmo /= 1000;
+
+	endtime = readl(&timer_base->tcrr) + tmo;
+
+	while (readl(&timer_base->tcrr) < endtime);
 }
 
 void reset_timer_masked(void)
 {
 	/* reset time, capture current incrementer value time */
-	lastinc = readl(&timer_base->tcrr);
+	lastinc = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
 	timestamp = 0;		/* start "advancing" time stamp from 0 */
 }
 
 ulong get_timer_masked(void)
 {
-	ulong now = readl(&timer_base->tcrr); /* current tick value */
+	/* current tick value */
+	ulong now = readl(&timer_base->tcrr) / (TIMER_CLOCK / CONFIG_SYS_HZ);
 
 	if (now >= lastinc)	/* normal mode (non roll) */
 		/* move stamp fordward with absoulte diff ticks */
 		timestamp += (now - lastinc);
 	else	/* we have rollover of incrementer */
-		timestamp += (0xFFFFFFFF - lastinc) + now;
+		timestamp += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ))
+				- lastinc) + now;
 	lastinc = now;
 	return timestamp;
 }
 
-/* waits specified delay value and resets timestamp */
-void udelay_masked(unsigned long usec)
-{
-	ulong tmo;
-	ulong endtime;
-	signed long diff;
-
-	/* if "big" number, spread normalization to seconds */
-	if (usec >= 1000) {
-		/* start to normalize for usec to ticks per sec */
-		tmo = usec / 1000;
-		/* find number of "ticks" to wait to achieve target */
-		tmo *= CONFIG_SYS_HZ;
-		tmo /= 1000;	/* finish normalize. */
-	} else {		/* else small number, */
-				/* don't kill it prior to HZ multiply */
-		tmo = usec * CONFIG_SYS_HZ;
-		tmo /= (1000 * 1000);
-	}
-	endtime = get_timer_masked() + tmo;
-
-	do {
-		ulong now = get_timer_masked();
-		diff = endtime - now;
-	} while (diff >= 0);
-}
-
 /*
  * This function is derived from PowerPC code (read timebase as long long).
  * On ARM it just returns the timer value.
@@ -291,7 +260,5 @@ unsigned long long get_ticks(void)
  */
 ulong get_tbclk(void)
 {
-	ulong tbclk;
-	tbclk = CONFIG_SYS_HZ;
-	return tbclk;
+	return CONFIG_SYS_HZ;
 }
diff --git a/examples/Makefile b/examples/Makefile
index dbcfa92..d2e811a 100644
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -33,7 +33,7 @@ ifeq ($(ARCH),arm)
 ifeq ($(BOARD),omap2420h4)
 LOAD_ADDR = 0x80300000
 else
-ifeq ($(CPU),omap3)
+ifeq ($(SOC),omap3)
 LOAD_ADDR = 0x80300000
 else
 LOAD_ADDR = 0xc100000
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 9057606..2f30783 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -220,14 +220,15 @@
 							/* load address */
 
 /*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
  */
-#define V_PVT				7
 
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PVT			2	/* Divisor: 2^(PVT+1) => 8 */
+#define CONFIG_SYS_HZ			1000
+
 
 /*-----------------------------------------------------------------------
  * Stack sizes
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 6283d59..fb8a424 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -222,14 +222,13 @@
 								/* address */
 
 /*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
-#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
+#define CONFIG_SYS_PVT			2	/* Divisor: 2^(PVT+1) => 8 */
+#define CONFIG_SYS_HZ			1000
 
 /*-----------------------------------------------------------------------
  * Stack sizes
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index dee0417..45e5478 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -213,14 +213,14 @@
 								/* address */
 
 /*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
  */
-#define V_PVT				7
 
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PVT			2	/* Divisor: 2^(PVT+1) => 8 */
+#define CONFIG_SYS_HZ			1000
 
 /*-----------------------------------------------------------------------
  * Stack sizes
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 00c0374..4ed8373 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -215,14 +215,13 @@
 								/* address */
 
 /*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PVT			2	/* Divisor: 2^(PVT+1) => 8 */
+#define CONFIG_SYS_HZ			1000
 
 /*-----------------------------------------------------------------------
  * Stack sizes
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index f8ae163..0185fa6 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -222,14 +222,13 @@
 							/* load address */
 
 /*
- * 2430 has 12 GP timers, they can be driven by the SysClk (12/13/19.2) or by
- * 32KHz clk, or from external sig. This rate is divided by a local divisor.
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
  */
-#define V_PVT				7
-
 #define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
-#define CONFIG_SYS_PVT			V_PVT	/* 2^(pvt+1) */
-#define CONFIG_SYS_HZ			((V_SCLK) / (2 << CONFIG_SYS_PVT))
+#define CONFIG_SYS_PVT			2	/* Divisor: 2^(PVT+1) => 8 */
+#define CONFIG_SYS_HZ			1000
 
 /*-----------------------------------------------------------------------
  * Stack sizes
-- 
1.6.2.4