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Diffstat (limited to 'recipes/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch')
-rw-r--r--recipes/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch202
1 files changed, 202 insertions, 0 deletions
diff --git a/recipes/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch b/recipes/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch
new file mode 100644
index 0000000000..d193f23733
--- /dev/null
+++ b/recipes/linux/openzaurus-pxa27x-2.4.20-rmk2-embedix20050602/P01-C3000-clockup_050221.patch
@@ -0,0 +1,202 @@
+diff -Nur c3000_org/linux/arch/arm/config.in c3000_work/linux/arch/arm/config.in
+--- c3000_org/linux/arch/arm/config.in 2004-08-21 09:48:07.000000000 +0900
++++ c3000_work/linux/arch/arm/config.in 2005-02-21 21:41:40.000000000 +0900
+@@ -195,7 +195,7 @@
+ dep_bool ' SHARP Spitz' CONFIG_ARCH_PXA_SPITZ $CONFIG_ARCH_PXA_BOXER
+ dep_bool ' Using Trial 0' CONFIG_SPITZ_TR0 $CONFIG_ARCH_PXA_SPITZ
+ dep_bool ' Using Trial 0.5' CONFIG_SPITZ_TR0_5 $CONFIG_ARCH_PXA_SPITZ
+-dep_bool ' SHARP Tosa' CONFIG_ARCH_PXA_TOSA
++dep_bool ' SHARP Tosa' CONFIG_ARCH_PXA_TOSA $CONFIG_ARCH_PXA
+ dep_bool ' SHARP Tosa skipping' CONFIG_ARCH_PXA_TOSA_SKIP $CONFIG_ARCH_PXA_TOSA
+
+ if [ "$CONFIG_SABINAL_DISCOVERY" = "y" -o "$CONFIG_ARCH_PXA_POODLE" = "y" -o \
+@@ -475,6 +475,9 @@
+ if [ "$CONFIG_ARCH_PXA_SPITZ" = "y" ]; then
+ define_bool CONFIG_CPU_PXA27X y
+ fi
++ if [ "$CONFIG_ARCH_PXA_SPITZ" = "y" ]; then
++ bool 'Use clock change(cccr_change) enable (EXPERIMENTAL)' CONFIG_SL_CCCR_CHANGE
++ fi
+ if [ "$CONFIG_ARCH_SHARP_SL" = "y" ]; then
+ define_bool CONFIG_BATT y
+ fi
+@@ -557,7 +560,7 @@
+ # bool ' Real-Time Scheduling support' CONFIG_RTSCHED
+ define_bool CONFIG_RTSCHED y
+ if [ "$CONFIG_RTSCHED" = "y" ]; then
+- int ' MAX PTHREAD (int)' CONFIG_RTH_PTHREAD_MAX 128
++ int ' MAX PTHREAD (int)' CONFIG_RTH_PTHREAD_MAX 128
+ hex ' RT MEMORY SIZE (hex)' CONFIG_RT_MEM_SIZE 80000
+ bool ' Real-Time Calibrate support' CONFIG_RTHAL_CALIBRATION
+ if [ "$CONFIG_RTHAL_CALIBRATION" != "y" ]; then
+@@ -615,7 +618,7 @@
+ hex 'Compressed ROM boot loader BSS address' CONFIG_ZBOOT_ROM_BSS 0
+ else
+ define_hex CONFIG_ZBOOT_ROM_TEXT 0
+- define_hex CONFIG_ZBOOT_ROM_BSS 0
++ define_hex CONFIG_ZBOOT_ROM_BSS 0
+ fi
+
+ if [ "$CONFIG_ARCH_SA1100" = "y" -o \
+diff -Nur c3000_org/linux/arch/arm/mach-pxa/sharpsl_apm.c c3000_work/linux/arch/arm/mach-pxa/sharpsl_apm.c
+--- c3000_org/linux/arch/arm/mach-pxa/sharpsl_apm.c 2004-11-16 15:31:06.000000000 +0900
++++ c3000_work/linux/arch/arm/mach-pxa/sharpsl_apm.c 2005-02-21 21:44:13.000000000 +0900
+@@ -130,6 +130,11 @@
+ extern int HWR_flag;
+ #endif
+
++#if defined(CONFIG_SL_CCCR_CHANGE)
++extern unsigned int CCCR_ValAdr_high;
++struct proc_dir_entry *proc_zaurus;
++#endif
++
+ #if defined(CONFIG_SABINAL_DISCOVERY)
+ #define SHARPSL_AC_LINE_STATUS (( ASIC3_GPIO_PSTS_D & AC_IN )? APM_AC_OFFLINE : APM_AC_ONLINE)
+ #define BACKPACK_IN_DETECT() ( ASIC3_GPIO_PSTS_D & BACKPACK_DETECT ) /* 0: exist , 1: not in */
+@@ -974,6 +979,63 @@
+
+ EXPORT_SYMBOL(lock_FCS);
+
++#if defined(CONFIG_SL_CCCR_CHANGE)
++
++void write_cccr(int cccr)
++{
++ printk("Change CCCR = %x.\n",cccr);
++ CCCR_ValAdr_high = cccr;
++ sharpsl_chg_freq = cccr;
++ cpu_xscale_sl_change_speed_high();
++ cccr_reg = CCCR;
++ printk("Changed CCCR = %x.\n",cccr_reg);
++ return;
++}
++
++int read_cccr(void)
++{
++ return CCCR_ValAdr_high;
++}
++
++static ssize_t cccr_change_read_params(struct file *file, char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ char outputbuf[32];
++ int count;
++
++ if (*ppos>0) /* Assume reading completed in previous read*/
++ return 0;
++ count = sprintf(outputbuf, "0x%08X\n", read_cccr());
++ count++;
++ *ppos += count;
++ if (count>nbytes)/* Assume output can be read at one time */
++ return -EINVAL;
++ if (copy_to_user(buf, outputbuf, count+1))
++ return -EFAULT;
++ return count;
++}
++
++static ssize_t cccr_change_write_params(struct file *file, const char *buf,
++ size_t nbytes, loff_t *ppos)
++{
++ unsigned int param=0;
++
++ sscanf(buf,"%x",&param);
++ if (param) {
++ write_cccr(param);
++ }
++ return nbytes;
++}
++
++static struct file_operations proc_cccr_change_params_operations = {
++ read:cccr_change_read_params,
++ write:cccr_change_write_params,
++};
++
++EXPORT_SYMBOL(read_cccr);
++EXPORT_SYMBOL(write_cccr);
++#endif
++
+ #ifdef CONFIG_APM_CPU_IDLE
+ #ifdef SHARPSL_NEW_IDLE
+ static int save_icmr;
+@@ -2786,6 +2848,7 @@
+ struct proc_dir_entry *apm_proc;
+ struct proc_dir_entry *lock_fcs_proc;
+ struct proc_dir_entry *power_mode_proc;
++ struct proc_dir_entry *cccr_change_proc;
+
+ apm_info.bios = apm_bios_info;
+ if (apm_info.bios.version == 0) {
+@@ -2822,6 +2885,9 @@
+ printk("FCS : CCCR = %x\n",cccr_reg);
+ #if defined(CONFIG_CPU_PXA27X)
+ sharpsl_chg_freq = cccr_reg;
++#if defined(CONFIG_SL_CCCR_CHANGE)
++ CCCR_ValAdr_high = sharpsl_chg_freq;
++#endif
+ #endif
+ #endif
+
+@@ -2902,6 +2968,19 @@
+ power_mode_proc->proc_fops = &proc_power_mode_params_operations;
+ }
+
++#if defined(CONFIG_SL_CCCR_CHANGE)
++ proc_zaurus = proc_mkdir("zaurus", NULL);
++ if (proc_zaurus == NULL) {
++ unregister_chrdev(228, "zaurus");
++ printk(KERN_ERR "proc: can't create /proc/zaurus\n");
++ return -ENOMEM;
++ }
++
++ cccr_change_proc = create_proc_entry("zaurus/CCCR", 0, NULL);
++ if (cccr_change_proc) {
++ cccr_change_proc->proc_fops = &proc_cccr_change_params_operations;
++ }
++#endif
+ kernel_thread(apm_thread, NULL, CLONE_FS | CLONE_FILES | CLONE_SIGHAND | SIGCHLD);
+
+ #if defined(CONFIG_SABINAL_DISCOVERY) || defined(CONFIG_ARCH_PXA_TOSA)
+diff -Nur c3000_org/linux/arch/arm/mach-pxa/sharpsl_suspend.S c3000_work/linux/arch/arm/mach-pxa/sharpsl_suspend.S
+--- c3000_org/linux/arch/arm/mach-pxa/sharpsl_suspend.S 2004-11-09 14:30:36.000000000 +0900
++++ c3000_work/linux/arch/arm/mach-pxa/sharpsl_suspend.S 2005-02-21 21:41:40.000000000 +0900
+@@ -64,7 +64,7 @@
+
+ sleep_param: .word 0 @ virtual address of parameter array
+ sleep_param_p: .word 0 @ physical address of parameter array
+-
++
+ IC_BASE: .word io_p2v(0x40D00000)
+
+
+@@ -1109,6 +1109,9 @@
+
+ #else /* CONFIG_CPU_PXA27X */
+
++#if defined(CONFIG_SL_CCCR_CHANGE)
++ .global CCCR_ValAdr_high
++#endif
+ CCCR_ValAdr_high: .word 0x02000210
+ MSC0_ValAdr_high: .word 0x7ff02DD8
+ MSC1_ValAdr_high: .word 0x7ff434D4
+@@ -1305,8 +1308,12 @@
+ stmfd sp!, {r0, r1, r2, r3, r4, lr}
+
+ ldr r0, CMR_BASE
++#if defined(CONFIG_SL_CCCR_CHANGE)
++ ldr r1, CCCR_ValAdr_high
++#else
+ ldr r1, CCCR_ValAdr_208
+- str r1, [r0, #CMR_CCCR]
++#endif
++ str r1, [r0, #CMR_CCCR]
+
+ ldr r0, MD_BASE
+ ldr r4, MDREFR_ValAdr_208
+@@ -1333,7 +1340,7 @@
+
+ .align 5
+ .text
+-
++
+ ENTRY(pxa27x_get_ccnt)
+ mrc p14, 0, r0, c1, c1, 0
+ mov pc, lr @ return