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Diffstat (limited to 'recipes/gcc/gcc-4.3.4/ep93xx/arm-size-bugfix.patch')
| -rw-r--r-- | recipes/gcc/gcc-4.3.4/ep93xx/arm-size-bugfix.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-4.3.4/ep93xx/arm-size-bugfix.patch b/recipes/gcc/gcc-4.3.4/ep93xx/arm-size-bugfix.patch new file mode 100644 index 0000000000..c3f3f3d288 --- /dev/null +++ b/recipes/gcc/gcc-4.3.4/ep93xx/arm-size-bugfix.patch @@ -0,0 +1,33 @@ +Fix an obvious bug in GCC-4.3.2's ARM code generator. + +PR target/37668 + * arm.c (arm_size_rtx_costs, case NEG): Don't fall through if the + result will be in an FPU register. + +This has been applied in gcc-4.4.0 + + Martin Guy <martinwguy@yahoo.it> + +*** gcc-4.3.2/gcc/config/arm/arm.c (revision 142660) +--- gcc-4.3.2/gcc/config/arm/arm.c (local) +*************** arm_size_rtx_costs (rtx x, int code, int +*** 5201,5207 **** + + case NEG: + if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT) +! *total = COSTS_N_INSNS (1); + /* Fall through */ + case NOT: + *total = COSTS_N_INSNS (ARM_NUM_REGS (mode)); +--- 5201,5211 ---- + + case NEG: + if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT) +! { +! *total = COSTS_N_INSNS (1); +! return false; +! } +! + /* Fall through */ + case NOT: + *total = COSTS_N_INSNS (ARM_NUM_REGS (mode)); |