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-rw-r--r--recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-fix-64bit-const-offsets.patch25
1 files changed, 25 insertions, 0 deletions
diff --git a/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-fix-64bit-const-offsets.patch b/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-fix-64bit-const-offsets.patch
new file mode 100644
index 0000000000..e3d67013d4
--- /dev/null
+++ b/recipes/gcc/gcc-4.3.4/ep93xx/arm-crunch-fix-64bit-const-offsets.patch
@@ -0,0 +1,25 @@
+Fixup possible address offsets for constant double integers
+also when using Maverick to handle 64-bit integers.
+
+--- gcc-4.3.2/gcc/config/arm/arm.c-original 2007-06-12 14:46:20.000000000 +1000
++++ gcc-4.3.2/gcc/config/arm/arm.c 2007-06-12 14:48:06.000000000 +1000
+@@ -3815,7 +3815,8 @@
+
+ use_ldrd = (TARGET_LDRD
+ && (mode == DImode
+- || (mode == DFmode && (TARGET_SOFT_FLOAT || TARGET_VFP))));
++ || (mode == DFmode
++ && (TARGET_SOFT_FLOAT || TARGET_VFP || TARGET_MAVERICK))));
+
+ if (code == POST_INC || code == PRE_DEC
+ || ((code == PRE_INC || code == POST_DEC)
+@@ -4424,7 +4424,8 @@
+ /* VFP addressing modes actually allow greater offsets, but for
+ now we just stick with the lowest common denominator. */
+ if (mode == DImode
+- || ((TARGET_SOFT_FLOAT || TARGET_VFP) && mode == DFmode))
++ || (mode == DFmode
++ && (TARGET_SOFT_FLOAT || TARGET_VFP || TARGET_MAVERICK)))
+ {
+ low_n = n & 0x0f;
+ n &= ~0x0f;