diff options
| author |   Jeremy Lainé <jeremy.laine@m4x.org> | 2009-01-16 18:10:33 +0100 |
|---|---|---|
| committer | Jeremy Lainé <jeremy.laine@m4x.org> | 2009-01-16 18:10:33 +0100 |
| commit | 932012553f0b17f14c06e53f04793bd4757dedba (patch) | |
| tree | 45fd0a88cf59ddfc4b25ee355f8baa9c2ab7bc6a /packages/u-boot | |
| parent | aac0c8b6f89d15b88bb696f902597943c1abb4d0 (diff) | |
| download | openembedded-932012553f0b17f14c06e53f04793bd4757dedba.tar.gz | |
u-boot: prune obsolete patches
Diffstat (limited to 'packages/u-boot')
8 files changed, 0 insertions, 2495 deletions
diff --git a/packages/u-boot/u-boot-1.3.2/boc01/001-081209-SPI.patch b/packages/u-boot/u-boot-1.3.2/boc01/001-081209-SPI.patch deleted file mode 100644 index 861278d845..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/001-081209-SPI.patch +++ /dev/null @@ -1,70 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -@@ -28,6 +28,7 @@ - #endif - #include <pci.h> - #include <mpc83xx.h> -+#include <spi.h> - - DECLARE_GLOBAL_DATA_PTR; - -@@ -107,3 +108,33 @@ void ft_board_setup(void *blob, bd_t *bd - #endif - } - #endif -+ -+ -+/* -+ * The following are used to control the SPI chip selects for the SPI command. -+ */ -+#ifdef CONFIG_HARD_SPI -+ -+#define SPI_CS_MASK 0x80000000 -+ -+void spi_eeprom_chipsel(int cs) -+{ -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ -+ if (cs) -+ iopd->dat &= ~SPI_CS_MASK; -+ else -+ iopd->dat |= SPI_CS_MASK; -+} -+ -+/* -+ * The SPI command uses this table of functions for controlling the SPI -+ * chip selects. -+ */ -+spi_chipsel_type spi_chipsel[] = { -+ spi_eeprom_chipsel, -+}; -+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); -+ -+#endif /* CONFIG_HARD_SPI */ -+ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -369,6 +369,7 @@ - #define CONFIG_CMD_PCI - #define CONFIG_CMD_NAND - #define CONFIG_CMD_JFFS2 -+#define CONFIG_CMD_SPI - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -386,6 +387,11 @@ - #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:384k(uboot),64k(env)" - - -+/* SPI */ -+#define CONFIG_MPC8XXX_SPI -+#define CONFIG_HARD_SPI /* SPI with hardware support */ -+#undef CONFIG_SOFT_SPI /* SPI bit-banged */ -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/002-081204-GPIO.patch b/packages/u-boot/u-boot-1.3.2/boc01/002-081204-GPIO.patch deleted file mode 100644 index bfa5327a34..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/002-081204-GPIO.patch +++ /dev/null @@ -1,229 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c 2008-12-09 16:24:39.000000000 +0100 -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c 2008-12-09 16:24:57.000000000 +0100 -@@ -44,6 +44,46 @@ - return 0; - } - -+int misc_init_f(void) -+{ -+ uchar value; -+ uchar i; -+ -+#ifdef PRE_INIT_GPIO -+ value=PRE_INIT_GPIO; -+ -+ for(i=0;i<MAX_GPIO_OUT;i++) -+ { -+ if(value&(1<<i)) -+ { -+ gpio_set(i); -+ } -+ else -+ { -+ gpio_clear(i); -+ } -+ } -+ udelay(1000); -+#endif -+ -+ -+#ifdef INIT_GPIO -+ value=INIT_GPIO; -+ for(i=0;i<MAX_GPIO_OUT;i++) -+ { -+ if(value&(1<<i)) -+ { -+ gpio_set(i); -+ } -+ else -+ { -+ gpio_clear(i); -+ } -+ } -+ puts("GPIO: ready\n"); -+#endif -+} -+ - int checkboard(void) - { - puts("Board: Freescale MPC8313ERDB\n"); -@@ -109,7 +149,42 @@ - } - #endif - -+#ifdef CONFIG_CMD_GPIO -+void gpio_set(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ iopd->dir |= ulMask; -+ iopd->dat |= ulMask; -+ } -+} -+ -+void gpio_clear(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ iopd->dir |= ulMask; -+ iopd->dat &= ~ulMask; -+ } -+} - -+char gpio_get(unsigned char ucGpio) -+{ -+ unsigned long ulMask=0; -+ volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; -+ if(ucGpio<32) -+ { -+ ulMask=1<<(31-ucGpio); -+ } -+ return (iopd->dat& ulMask)? 1:0; -+} -+#endif - /* - * The following are used to control the SPI chip selects for the SPI command. - */ -Index: u-boot-1.3.2/common/cmd_gpio.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/common/cmd_gpio.c 2008-12-09 16:24:57.000000000 +0100 -@@ -0,0 +1,77 @@ -+/* -+ * (C) Copyright 2001 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+extern void gpio_set(unsigned char ucGpio); -+extern void gpio_clear(unsigned char ucGpio); -+ -+int do_gpio (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ unsigned char ucGpio; -+ -+ if (argc < 3) -+ goto usage; -+ -+ ucGpio = simple_strtoul (argv[2], NULL, 10); -+ -+ if (!strncmp(argv[1], "set", 3)) -+ { -+ gpio_set(ucGpio); -+ } -+ else -+ if (!strncmp(argv[1], "clear", 5)) -+ { -+ gpio_clear(ucGpio); -+ } -+ else -+ if (!strncmp(argv[1], "get", 3)) -+ { -+ printf("%s %s %d = %d\n",argv[0],argv[1],ucGpio, gpio_get(ucGpio)); -+ return 0; -+ } -+ else -+ goto usage; -+ -+ printf("%s %s %d\n",argv[0],argv[1],ucGpio); -+ -+ return 0; -+ -+usage : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+} /* do_gpio() */ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ gpio, 3, 1, do_gpio, -+ "gpio - General Purpose Input/Output\n", -+ " - Set or clear General Purpose Output.\n" -+ "<set/clear/get> - Set or clear General Purpose Output.\n" -+ "<gpio> - number of gpio to be set/clear/get \n" -+); -+ -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile 2008-12-09 16:24:39.000000000 +0100 -+++ u-boot-1.3.2/common/Makefile 2008-12-09 16:24:57.000000000 +0100 -@@ -50,6 +50,7 @@ - COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o - COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -+COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o - COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:24:39.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:26:20.000000000 +0100 -@@ -49,6 +49,7 @@ - #define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN - - #define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */ -+#define CONFIG_MISC_INIT_F - - #define CFG_IMMR 0xE0000000 - -@@ -370,6 +371,7 @@ - #define CONFIG_CMD_NAND - #define CONFIG_CMD_JFFS2 - #define CONFIG_CMD_SPI -+#define CONFIG_CMD_GPIO - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -392,6 +394,11 @@ - #define CONFIG_HARD_SPI /* SPI with hardware support */ - #undef CONFIG_SOFT_SPI /* SPI bit-banged */ - -+/* GPIO */ -+#define PRE_INIT_GPIO 0x28 -+#define INIT_GPIO 0x08 -+#define MAX_GPIO_OUT 7 -+ - /* - * Miscellaneous configurable options - */ -@@ -457,7 +464,7 @@ - - /* System IO Config */ - #define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ --#define CFG_SICRL SICRL_USBDR /* Enable Internal USB Phy */ -+#define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ - - #define CFG_HID0_INIT 0x000000000 - #define CFG_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/007-081205-CAPSENSE.patch b/packages/u-boot/u-boot-1.3.2/boc01/007-081205-CAPSENSE.patch deleted file mode 100644 index 9e98848fcf..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/007-081205-CAPSENSE.patch +++ /dev/null @@ -1,599 +0,0 @@ -Index: u-boot-1.3.2/common/cmd_capsense.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/common/cmd_capsense.c 2008-12-09 16:28:31.000000000 +0100 -@@ -0,0 +1,132 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+#include <capsense.h> -+#include <i2c.h> -+ -+#define ARG_SENSOR_NUMBER 1 -+ -+#define ARG_CMD 1 -+#define ARG_OLD_ADDRESS 2 -+#define ARG_NEW_ADDRESS 3 -+ -+int do_capsense (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ int i; -+ unsigned char address = CONFIG_CAPSENSE_I2C_ADDRESS; -+ unsigned char sensors[] = CONFIG_CAPSENSE_SENSORS; -+ unsigned char leds[] = CONFIG_CAPSENSE_LEDS; -+ int old_bus,sensor_number,old_address,new_address; -+ char port[2]; -+ /* switch to correct I2C bus */ -+ old_bus = I2C_GET_BUS(); -+ I2C_SET_BUS(CFG_CAPSENSE_BUS_NUM); -+ -+ /* -+ * Loop through sensors, read -+ * state, and output it. -+ */ -+ if(argc==1) -+ { -+ port[0]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,0); -+ port[1]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ printf ("P0 0x%02x 0x%02x\n",port[0],port[1]); -+ for (i = 0; i < 8; i++) -+ { -+ if(sensors[0]&(1<<i)) -+ { -+ printf ("GP0[%d]: %i\n",i,port[0]&(1<<i)?1:0); -+ } -+ if(sensors[1]&(1<<i)) -+ { -+ printf ("GP1[%d]: %i\n",i,port[1]&(1<<i)?1:0); -+ } -+ -+ } -+ } -+ else -+ { -+ if(argc==4) -+ { -+ if (!strncmp(argv[ARG_CMD], "config", 3)) -+ { -+ old_address=simple_strtoul (argv[ARG_OLD_ADDRESS], NULL, 10); -+ new_address=simple_strtoul (argv[ARG_NEW_ADDRESS], NULL, 10); -+ if(capsense_change_i2c_address(old_address,new_address)!=0) -+ printf("failed to change i2c address\n"); -+ else -+ { printf("config ok\n"); -+// //disable all sensor -+// //port 0 -+// capsense_EnableGpio(new_address,0,0x0); -+// capsense_EnableCapsense(new_address,0,0x0); -+// //port 1 -+// capsense_EnableGpio(new_address,1,0x0); -+// capsense_EnableCapsense(new_address,1,0x0); -+// -+// //Config sensor and GPIO -+// //port 0 -+// capsense_EnableGpio(new_address,0,sensors[0]); -+// capsense_EnableCapsense(new_address,0,leds[0]); -+// //port 1 -+// capsense_EnableGpio(new_address,1,sensors[1]); -+// capsense_EnableCapsense(new_address,1,leds[1]); -+ capsense_config(new_address); -+ capsense_store_nvm(new_address); -+ } -+ } -+ } -+ else -+ { -+ printf ("Usage:\n%s\n", cmdtp->help); -+ } -+ } -+ -+ /* switch back to original I2C bus */ -+ I2C_SET_BUS(old_bus); -+ -+ return 0; -+} /* do_capsense() */ -+ -+ -+char SetDeviceI2CAddress(char cNewDeviceAddress) -+{ -+ -+} -+/***************************************************/ -+ -+U_BOOT_CMD( -+ capsense, 4, 1, do_capsense, -+ "capsense - CapSense Express touch-sensing buttons\n", -+ " - Read state of the CapSense Express touch-sensing buttons.\n" -+ "capsense : Read state of all the CapSense Express touch-sensing buttons.\n" -+ "capsense [N] Read state of the CapSense Express touch-sensing buttons N.\n" -+ "capsense config <old i2c address> <new i2c address> : Set i2c address N to capsense module.\n" -+ ); -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile 2008-12-09 16:27:32.000000000 +0100 -+++ u-boot-1.3.2/common/Makefile 2008-12-09 16:29:42.000000000 +0100 -@@ -50,6 +50,7 @@ - COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o - COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -+COBJS-$(CONFIG_CMD_CAPSENSE) += cmd_capsense.o - COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o -Index: u-boot-1.3.2/drivers/i2c/CY8C201xx.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/drivers/i2c/CY8C201xx.c 2008-12-09 16:28:31.000000000 +0100 -@@ -0,0 +1,307 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+ -+#ifdef CONFIG_CAPSENSE_CY8C201XX -+ -+#include <i2c.h> -+#include <capsense.h> -+ -+int capsense_read(int address, int reg) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ /* -+ * Prepare to handle 1 byte result. -+ */ -+ dlen = 1; -+ -+ /* -+ * Now try to read the register. -+ */ -+ if (i2c_read(address, reg, 1, data, dlen) != 0) -+ return -1; -+ -+ return (int)data[0]; -+} /* capsense_read() */ -+ -+ -+int capsense_write(int address, int reg, int val) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ /* -+ * Handle 1 byte values. -+ */ -+ dlen = 1; -+ data[0] = (char)(val & 0xff); -+ -+ /* -+ * Write value to register. -+ */ -+ if (i2c_write(address, reg, 1, data, dlen) != 0) -+ return 1; -+ -+ return 0; -+} /* capsense_write() */ -+ -+ -+int capsense_write_N(int address, int reg, uchar data[5], int dlen) -+{ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ -+ /* -+ * Write value to register. -+ */ -+ if (i2c_write(address, reg, 1, data, dlen) != 0) -+ return 1; -+ -+ return 0; -+} /* capsense_write() */ -+ -+ -+int capsense_get_state(int address,char port) -+{ -+ return capsense_read(address,CAPSENSE_READ_STATUS_REG+port); -+} -+ -+ -+int capsense_change_i2c_address(char old_address,char new_address) -+{ -+ unsigned char data[4]; -+ int read_address; -+ printf("capsense change i2c address\n"); -+ //checking if the I2C address is in the limits ( I2C address can have a value from 0 to 127 ) -+ if((old_address>0x7F)||(new_address>0x7F)) -+ { -+ printf("I2C address is not in the limits\n"); -+ return 1; -+ } -+ -+ //reading old capsence address -+ read_address=capsense_read(old_address, CAPSENSE_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("error reading old capsence address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ if((read_address&0x7F)!=old_address) -+ { -+ printf("reading old capsence address failed\n"); -+ return 1; //Capsense not respond correctly -+ } -+ -+ //writing command for unlocking the I2C device address lock -+ data[0]=0x3C; -+ data[1]=0xA5; -+ data[2]=0x69; -+ if(capsense_write_N(old_address, CAPSENSE_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for unlocking the I2C device address lock failed\n"); -+ return 1; -+ } -+ -+ //writing the new I2C address to the device I2C address register -+ if(capsense_write(old_address, CAPSENSE_I2C_ADDR_DM,new_address|0x80)!=0) -+ { -+ printf("writing the new I2C address to the device I2C address register failed\n"); -+ return 1; -+ } -+ -+ //writing command for locking the I2C device address lock -+ data[0]=0x96; -+ data[1]=0x5A; -+ data[2]=0xC3; -+ if(capsense_write_N(old_address, CAPSENSE_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for locking the I2C device failed\n"); -+ return 1; -+ } -+ -+ //reading new capsence address -+ read_address=capsense_read(new_address, CAPSENSE_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("capsense do not respond at new address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ return 0; -+} -+ -+int capsense_EnableGpio(char address,char port,char pins) -+{ -+ printf("capsense Enable Gpio\n"); -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("entering setup operation mode failed\n"); -+ return 1; -+ } -+ //Enable gpio Input -+ if(capsense_write(address, port + CAPSENSE_ENABLE_GPIO_REG,pins)!=0) -+ { -+ //entering normal operation mode -+ printf("Enable gpio Input failed\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE); -+ return 1; -+ } -+ //entering normal operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE)!=0) -+ { -+ printf("entering normal operation mode failed\n"); -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+int capsense_EnableCapsense(char address,char port,char pins) -+{ -+ printf("capsense Enable sensor\n"); -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("entering setup operation mode failed\n"); -+ return 1; -+ } -+ //Enable Capsense Input -+ if(capsense_write(address, port + CAPSENSE_ENABLE_CAPSENSE_REG,pins)!=0) -+ { -+ //entering normal operation mode -+ printf("Enable Capsense Input failed\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE); -+ return 1; -+ } -+ //entering normal operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE)!=0) -+ { -+ printf("entering normal operation mode\n"); -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+//CAPSENSE_ENABLE_GPIO_REG -+char data1[]={0x00,0x00}; -+//CAPSENSE_ENABLE_CAPSENSE_REG -+char data2[]={0x1D,0x10,0x02,0x0F,0x02,0x0F,0x00,0x00,0x1F,0x1F,0x02,0x00,0x00,0x00,0x0F,0x00,0x00,0x00}; -+//CAPSENSE_OUTPUT_PORT_REG -+char data3[]={0x00,0x00}; -+//CAPSENSE_OPER_SELECT_0_REG -+char data4[]={0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x10,0x00,0x00,0x00,0x80,0x08,0x00,0x00,0x00,0x80,0x04,0x00,0x00,0x00,0x80,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; -+//CAPSENSE_NOISE_THRESHOLD_REG -+char data5[]={0x28,0x64,0xA0,0x40,0x0A,0x03,0x14,0x14,0x00}; -+//CAPSENSE_SCAN_POS_00 -+char data6[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0x0F,0x0F,0x00,0x00,0x00,0x00,0x0F,0x03,0x00,0x03,0x03,0x03,0x00,0x00,0x00,0x00,0x03}; -+//CAPSENSE_SLEEP_CONTROL_PIN_REG -+char data7[]={0x00,0x20,0x00}; -+ -+int capsense_config(char address) -+{ -+ -+//w 04 A0 08 -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("CAPSENSE_COMMAND_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_ENABLE_GPIO_REG, data1 , 2)!=0) -+ { -+ printf("CAPSENSE_ENABLE_GPIO_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_ENABLE_CAPSENSE_REG, data2 , 18)!=0) -+ { -+ printf("CAPSENSE_ENABLE_CAPSENSE_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_OUTPUT_PORT_REG, data3 , 2)!=0) -+ { -+ printf("CAPSENSE_OUTPUT_PORT_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_OPER_SELECT_0_REG, data4 , 50)!=0) -+ { -+ printf("entering normal operation mode\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_NOISE_THRESHOLD_REG, data5 , 9)!=0) -+ { -+ printf("CAPSENSE_NOISE_THRESHOLD_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_SCAN_POS_00, data6 , 30)!=0) -+ { -+ printf("CAPSENSE_SCAN_POS_00\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_SLEEP_CONTROL_PIN_REG,data7 , 3)!=0) -+ { -+ printf("CAPSENSE_SLEEP_CONTROL_PIN_REG\n"); -+ return 1; -+ } -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+// if(capsense_write(address,CAPSENSE_COMMAND_REG,0x06)!=0) -+ { -+ printf("CAPSENSE_COMMAND_REG 6\n"); -+ return 1; -+ } -+ return 0; -+} -+void capsense_store_nvm(char address) -+{ -+ //storing the new current configuration to NVM -+ printf("storing the new current configuration to NVM\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,0x01); -+ -+} -+ -+#endif /* CONFIG_CAPSENSE_CY8C201XX */ -Index: u-boot-1.3.2/drivers/i2c/Makefile -=================================================================== ---- u-boot-1.3.2.orig/drivers/i2c/Makefile 2008-03-09 16:20:02.000000000 +0100 -+++ u-boot-1.3.2/drivers/i2c/Makefile 2008-12-09 16:28:31.000000000 +0100 -@@ -29,6 +29,7 @@ - COBJS-y += omap1510_i2c.o - COBJS-y += omap24xx_i2c.o - COBJS-y += tsi108_i2c.o -+COBJS-y += CY8C201xx.o - - COBJS := $(COBJS-y) - SRCS := $(COBJS:.o=.c) -Index: u-boot-1.3.2/include/capsense.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/include/capsense.h 2008-12-09 16:28:31.000000000 +0100 -@@ -0,0 +1,103 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USCY8C201xx.c:234:A -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons. -+ */ -+#ifndef _CAPSENSE_H_ -+#define _CAPSENSE_H_ -+ -+#if defined(CONFIG_CAPSENSE_CY8C201XX) -+ -+#define CONFIG_CAPSENSE /* We have a Capsense */ -+ -+#ifndef CONFIG_CAPSENSE_SENSORS -+/*config for CY3218-CAPEXP1*/ -+#define CONFIG_CAPSENSE_LED {0x05,0x02} // port 0-{0,3} port 1-{2} -+#define CONFIG_CAPSENSE_SENSOR {0x02,0x0C} // port 0-{2} port 1-{3,4} -+#endif -+#endif /* CONFIG_CAPSENSE_SENSORS */ -+ -+extern int capsense_read(int address, int reg); -+extern int capsense_write(int address, int reg, int val); -+extern int capsense_get_state(int address,char port); -+extern int capsense_change_i2c_address(char old_address,char new_address); -+extern int capsense_EnableGpio(char address,char port,char pins); -+extern int capsense_EnableCapsense(char address,char port,char pins); -+extern int capsense_config(char address); -+#endif -+ -+#if !defined(CFG_CAPSENSE_BUS_NUM) -+#define CFG_CAPSENSE_BUS_NUM 1 -+ -+//----------------------------------------------- -+// Register Map and corresponding constants -+//----------------------------------------------- -+ -+ -+#define CAPSENSE_STATUS_PORT_REG (0x02) -+#define CAPSENSE_OUTPUT_PORT_REG (0x04) -+#define CAPSENSE_ENABLE_CAPSENSE_REG (0x06) -+#define CAPSENSE_ENABLE_GPIO_REG (0x08) -+#define CAPSENSE_INVERSION_PORT_REG (0x0A) -+#define CAPSENSE_INTERRUPT_MASK_REG (0x0C) -+#define CAPSENSE_PORT_STATUS_REG (0x0E) -+#define CAPSENSE_DRIVE_MODE_REG (0x10) -+#define CAPSENSE_OPER_SELECT_0_REG (0x1C) -+#define CAPSENSE_OPER_SELECT_1_REG (0x35) -+#define CAPSENSE_NOISE_THRESHOLD_REG (0x4E) -+#define CAPSENSE_SETTLING_TIME_REG (0x50) -+#define CAPSENSE_EXT_CAP_REG (0x51) -+#define CAPSENSE_SNS_RST_REG (0x51) -+#define CAPSENSE_CLK_SEL_REG (0x51) -+#define CAPSENSE_HYSTERESIS_REG (0x52) -+#define CAPSENSE_DEBOUNCE_REG (0x53) -+#define CAPSENSE_NEG_NOISE_THRESHOLD_REG (0x54) -+#define CAPSENSE_SCAN_POS_00 (0x57) -+ -+#define CAPSENSE_FT_PORT_0_REG (0x61) -+#define CAPSENSE_FT_PORT_1_REG (0x66) -+#define CAPSENSE_IDAC_SETTING_PORT_0_REG (0x6B) -+#define CAPSENSE_IDAC_SETTING_PORT_1_REG (0x70) -+#define CAPSENSE_SLIDER_CONFIGURATION_REG (0x75) -+#define CAPSENSE_SLIDER_RESOLUTION_REG (0x77) -+#define CAPSENSE_I2C_DEV_LOCK (0x79) -+#define CAPSENSE_DEVICE_ID_REG (0x7A) -+#define CAPSENSE_I2C_ADDR_DM (0x7C) -+#define CAPSENSE_SLEEP_CONTROL_PIN_REG (0x7E) -+#define CAPSENSE_SLEEP_CONTROL_REG (0x7F) -+#define CAPSENSE_STAY_AWAKE_CNTR_REG (0x80) -+#define CAPSENSE_BUTTON_SEL_REG (0x81) -+#define CAPSENSE_BASELINE_REG (0x82) -+#define CAPSENSE_READ_STATUS_REG (0x88) -+#define CAPSENSE_CENTROID_REG (0x8A) -+ -+#define CAPSENSE_COMMAND_REG (0xA0) -+ -+#define CAPSENSE_INPUT_PORT_MASK (0x10) -+#define CAPSENSE_INPUT_MASK (0x7) -+ -+ -+#define CAPSENSE_NORMAL_OPERATION_MODE (0x07) -+#define CAPSENSE_SETUP_OPERATION_MODE (0x08) -+#endif /* _CAPSENSE_H_ */ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:28:30.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:30:12.000000000 +0100 -@@ -407,6 +407,13 @@ - #define CFG_DTT_MAX_TEMP 70 - #define CFG_DTT_MIN_TEMP -30 - -+/*Capsense touch sensing buttons (Cpe board)*/ -+#define CONFIG_CMD_CAPSENSE -+#define CONFIG_CAPSENSE_CY8C201XX 1 -+#define CONFIG_CAPSENSE_I2C_ADDRESS 0x25 -+#define CONFIG_CAPSENSE_LEDS {0x02,0x0F} // port 0-{1} port 1-{0,1,2,3} -+#define CONFIG_CAPSENSE_SENSORS {0x1D,0x10} // port 0-{0,2,3,4} port 1-{4} -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/007-081212-CAPSENSE.patch b/packages/u-boot/u-boot-1.3.2/boc01/007-081212-CAPSENSE.patch deleted file mode 100644 index 3015b2416d..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/007-081212-CAPSENSE.patch +++ /dev/null @@ -1,596 +0,0 @@ -Index: u-boot-1.3.2/common/cmd_capsense.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/common/cmd_capsense.c -@@ -0,0 +1,128 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+#include <capsense.h> -+#include <i2c.h> -+ -+#define ARG_SENSOR_NUMBER 1 -+ -+#define ARG_CMD 1 -+#define ARG_OLD_ADDRESS 2 -+#define ARG_NEW_ADDRESS 3 -+ -+ -+int do_capsense (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ int i; -+ unsigned char sensors[] = CONFIG_CAPSENSE_SENSORS; -+ //unsigned char leds[] = CONFIG_CAPSENSE_LEDS; -+ int old_bus,old_address,new_address; -+ char port[2]; -+ /* switch to correct I2C bus */ -+ old_bus = I2C_GET_BUS(); -+ I2C_SET_BUS(CFG_CAPSENSE_BUS_NUM); -+ -+ /* -+ * Loop through sensors, read -+ * state, and output it. -+ */ -+ if(argc==1) -+ { -+ port[0]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,0); -+ port[1]=capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ capsense_get_state(CONFIG_CAPSENSE_I2C_ADDRESS,1); -+ printf ("P0 0x%02x 0x%02x\n",port[0],port[1]); -+ for (i = 0; i < 8; i++) -+ { -+ if(sensors[0]&(1<<i)) -+ { -+ printf ("GP0[%d]: %i\n",i,port[0]&(1<<i)?1:0); -+ } -+ if(sensors[1]&(1<<i)) -+ { -+ printf ("GP1[%d]: %i\n",i,port[1]&(1<<i)?1:0); -+ } -+ -+ } -+ } -+ else -+ { -+ if(argc==4) -+ { -+ if (!strncmp(argv[ARG_CMD], "config", 3)) -+ { -+ old_address=simple_strtoul (argv[ARG_OLD_ADDRESS], NULL, 10); -+ new_address=simple_strtoul (argv[ARG_NEW_ADDRESS], NULL, 10); -+ if(capsense_change_i2c_address(old_address,new_address)!=0) -+ printf("failed to change i2c address\n"); -+ else -+ { printf("config ok\n"); -+// //disable all sensor -+// //port 0 -+// capsense_EnableGpio(new_address,0,0x0); -+// capsense_EnableCapsense(new_address,0,0x0); -+// //port 1 -+// capsense_EnableGpio(new_address,1,0x0); -+// capsense_EnableCapsense(new_address,1,0x0); -+// -+// //Config sensor and GPIO -+// //port 0 -+// capsense_EnableGpio(new_address,0,sensors[0]); -+// capsense_EnableCapsense(new_address,0,leds[0]); -+// //port 1 -+// capsense_EnableGpio(new_address,1,sensors[1]); -+// capsense_EnableCapsense(new_address,1,leds[1]); -+ capsense_config(new_address); -+ capsense_store_nvm(new_address); -+ } -+ } -+ } -+ else -+ { -+ printf ("Usage:\n%s\n", cmdtp->help); -+ } -+ } -+ -+ /* switch back to original I2C bus */ -+ I2C_SET_BUS(old_bus); -+ -+ return 0; -+} /* do_capsense() */ -+ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ capsense, 4, 1, do_capsense, -+ "capsense - CapSense Express touch-sensing buttons\n", -+ " - Read state of the CapSense Express touch-sensing buttons.\n" -+ "capsense : Read state of all the CapSense Express touch-sensing buttons.\n" -+ "capsense [N] Read state of the CapSense Express touch-sensing buttons N.\n" -+ "capsense config <old i2c address> <new i2c address> : Set i2c address N to capsense module.\n" -+ ); -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile -+++ u-boot-1.3.2/common/Makefile -@@ -50,6 +50,7 @@ endif - COBJS-$(CONFIG_CMD_DISPLAY) += cmd_display.o - COBJS-$(CONFIG_CMD_DOC) += cmd_doc.o - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o -+COBJS-$(CONFIG_CMD_CAPSENSE) += cmd_capsense.o - COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o -Index: u-boot-1.3.2/drivers/i2c/CY8C201xx.c -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/drivers/i2c/CY8C201xx.c -@@ -0,0 +1,307 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons -+ */ -+ -+#include <common.h> -+ -+#ifdef CONFIG_CAPSENSE_CY8C201XX -+ -+#include <i2c.h> -+#include <capsense.h> -+ -+int capsense_read(int address, int reg) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ /* -+ * Prepare to handle 1 byte result. -+ */ -+ dlen = 1; -+ -+ /* -+ * Now try to read the register. -+ */ -+ if (i2c_read(address, reg, 1, data, dlen) != 0) -+ return -1; -+ -+ return (int)data[0]; -+} /* capsense_read() */ -+ -+ -+int capsense_write(int address, int reg, int val) -+{ -+ int dlen; -+ uchar data[2]; -+ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ /* -+ * Handle 1 byte values. -+ */ -+ dlen = 1; -+ data[0] = (char)(val & 0xff); -+ -+ /* -+ * Write value to register. -+ */ -+ if (i2c_write(address, reg, 1, data, dlen) != 0) -+ return 1; -+ -+ return 0; -+} /* capsense_write() */ -+ -+ -+int capsense_write_N(int address, int reg, uchar data[5], int dlen) -+{ -+ /* -+ * Validate 'reg' param -+ */ -+ if((reg < 0) || (reg > 0xA1)) -+ return -1; -+ -+ -+ /* -+ * Write value to register. -+ */ -+ if (i2c_write(address, reg, 1, data, dlen) != 0) -+ return 1; -+ -+ return 0; -+} /* capsense_write() */ -+ -+ -+int capsense_get_state(int address,char port) -+{ -+ return capsense_read(address,CAPSENSE_READ_STATUS_REG+port); -+} -+ -+ -+int capsense_change_i2c_address(char old_address,char new_address) -+{ -+ unsigned char data[4]; -+ int read_address; -+ printf("capsense change i2c address\n"); -+ //checking if the I2C address is in the limits ( I2C address can have a value from 0 to 127 ) -+ if((old_address>0x7F)||(new_address>0x7F)) -+ { -+ printf("I2C address is not in the limits\n"); -+ return 1; -+ } -+ -+ //reading old capsence address -+ read_address=capsense_read(old_address, CAPSENSE_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("error reading old capsence address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ if((read_address&0x7F)!=old_address) -+ { -+ printf("reading old capsence address failed\n"); -+ return 1; //Capsense not respond correctly -+ } -+ -+ //writing command for unlocking the I2C device address lock -+ data[0]=0x3C; -+ data[1]=0xA5; -+ data[2]=0x69; -+ if(capsense_write_N(old_address, CAPSENSE_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for unlocking the I2C device address lock failed\n"); -+ return 1; -+ } -+ -+ //writing the new I2C address to the device I2C address register -+ if(capsense_write(old_address, CAPSENSE_I2C_ADDR_DM,new_address|0x80)!=0) -+ { -+ printf("writing the new I2C address to the device I2C address register failed\n"); -+ return 1; -+ } -+ -+ //writing command for locking the I2C device address lock -+ data[0]=0x96; -+ data[1]=0x5A; -+ data[2]=0xC3; -+ if(capsense_write_N(old_address, CAPSENSE_I2C_DEV_LOCK, data , 3)!=0) -+ { -+ printf("writing command for locking the I2C device failed\n"); -+ return 1; -+ } -+ -+ //reading new capsence address -+ read_address=capsense_read(new_address, CAPSENSE_I2C_ADDR_DM); -+ if(read_address==0xFFFFFFFF) -+ { -+ printf("capsense do not respond at new address\n"); -+ return 1; //capsense do not respond at new address -+ } -+ -+ return 0; -+} -+ -+int capsense_EnableGpio(char address,char port,char pins) -+{ -+ printf("capsense Enable Gpio\n"); -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("entering setup operation mode failed\n"); -+ return 1; -+ } -+ //Enable gpio Input -+ if(capsense_write(address, port + CAPSENSE_ENABLE_GPIO_REG,pins)!=0) -+ { -+ //entering normal operation mode -+ printf("Enable gpio Input failed\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE); -+ return 1; -+ } -+ //entering normal operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE)!=0) -+ { -+ printf("entering normal operation mode failed\n"); -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+int capsense_EnableCapsense(char address,char port,char pins) -+{ -+ printf("capsense Enable sensor\n"); -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("entering setup operation mode failed\n"); -+ return 1; -+ } -+ //Enable Capsense Input -+ if(capsense_write(address, port + CAPSENSE_ENABLE_CAPSENSE_REG,pins)!=0) -+ { -+ //entering normal operation mode -+ printf("Enable Capsense Input failed\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE); -+ return 1; -+ } -+ //entering normal operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_NORMAL_OPERATION_MODE)!=0) -+ { -+ printf("entering normal operation mode\n"); -+ return 1; -+ } -+ else -+ return 0; -+} -+ -+//CAPSENSE_ENABLE_GPIO_REG -+char data1[]={0x00,0x00}; -+//CAPSENSE_ENABLE_CAPSENSE_REG -+char data2[]={0x1D,0x10,0x02,0x0F,0x02,0x0F,0x00,0x00,0x1F,0x1F,0x02,0x00,0x00,0x00,0x0F,0x00,0x00,0x00}; -+//CAPSENSE_OUTPUT_PORT_REG -+char data3[]={0x00,0x00}; -+//CAPSENSE_OPER_SELECT_0_REG -+char data4[]={0x00,0x00,0x00,0x00,0x00,0x80,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x10,0x00,0x00,0x00,0x80,0x08,0x00,0x00,0x00,0x80,0x04,0x00,0x00,0x00,0x80,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; -+//CAPSENSE_NOISE_THRESHOLD_REG -+char data5[]={0x28,0x64,0xA0,0x40,0x0A,0x03,0x14,0x14,0x00}; -+//CAPSENSE_SCAN_POS_00 -+char data6[]={0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x00,0x0F,0x0F,0x0F,0x00,0x00,0x00,0x00,0x0F,0x03,0x00,0x03,0x03,0x03,0x00,0x00,0x00,0x00,0x03}; -+//CAPSENSE_SLEEP_CONTROL_PIN_REG -+char data7[]={0x00,0x20,0x00}; -+ -+int capsense_config(char address) -+{ -+ -+//w 04 A0 08 -+ //entering setup operation mode -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+ { -+ printf("CAPSENSE_COMMAND_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_ENABLE_GPIO_REG, data1 , 2)!=0) -+ { -+ printf("CAPSENSE_ENABLE_GPIO_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_ENABLE_CAPSENSE_REG, data2 , 18)!=0) -+ { -+ printf("CAPSENSE_ENABLE_CAPSENSE_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_OUTPUT_PORT_REG, data3 , 2)!=0) -+ { -+ printf("CAPSENSE_OUTPUT_PORT_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_OPER_SELECT_0_REG, data4 , 50)!=0) -+ { -+ printf("entering normal operation mode\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_NOISE_THRESHOLD_REG, data5 , 9)!=0) -+ { -+ printf("CAPSENSE_NOISE_THRESHOLD_REG\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_SCAN_POS_00, data6 , 30)!=0) -+ { -+ printf("CAPSENSE_SCAN_POS_00\n"); -+ return 1; -+ } -+ if(capsense_write_N(address, CAPSENSE_SLEEP_CONTROL_PIN_REG,data7 , 3)!=0) -+ { -+ printf("CAPSENSE_SLEEP_CONTROL_PIN_REG\n"); -+ return 1; -+ } -+ if(capsense_write(address,CAPSENSE_COMMAND_REG,CAPSENSE_SETUP_OPERATION_MODE)!=0) -+// if(capsense_write(address,CAPSENSE_COMMAND_REG,0x06)!=0) -+ { -+ printf("CAPSENSE_COMMAND_REG 6\n"); -+ return 1; -+ } -+ return 0; -+} -+void capsense_store_nvm(char address) -+{ -+ //storing the new current configuration to NVM -+ printf("storing the new current configuration to NVM\n"); -+ capsense_write(address,CAPSENSE_COMMAND_REG,0x01); -+ -+} -+ -+#endif /* CONFIG_CAPSENSE_CY8C201XX */ -Index: u-boot-1.3.2/drivers/i2c/Makefile -=================================================================== ---- u-boot-1.3.2.orig/drivers/i2c/Makefile -+++ u-boot-1.3.2/drivers/i2c/Makefile -@@ -29,6 +29,7 @@ COBJS-y += fsl_i2c.o - COBJS-y += omap1510_i2c.o - COBJS-y += omap24xx_i2c.o - COBJS-y += tsi108_i2c.o -+COBJS-y += CY8C201xx.o - - COBJS := $(COBJS-y) - SRCS := $(COBJS:.o=.c) -Index: u-boot-1.3.2/include/capsense.h -=================================================================== ---- /dev/null -+++ u-boot-1.3.2/include/capsense.h -@@ -0,0 +1,104 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USCY8C201xx.c:234:A -+ */ -+ -+/* -+ * CapSense Express touch-sensing buttons. -+ */ -+#ifndef _CAPSENSE_H_ -+#define _CAPSENSE_H_ -+ -+#if defined(CONFIG_CAPSENSE_CY8C201XX) -+ -+#define CONFIG_CAPSENSE /* We have a Capsense */ -+ -+#ifndef CONFIG_CAPSENSE_SENSORS -+/*config for CY3218-CAPEXP1*/ -+#define CONFIG_CAPSENSE_LED {0x05,0x02} // port 0-{0,3} port 1-{2} -+#define CONFIG_CAPSENSE_SENSOR {0x02,0x0C} // port 0-{2} port 1-{3,4} -+#endif -+#endif /* CONFIG_CAPSENSE_SENSORS */ -+ -+extern int capsense_read(int address, int reg); -+extern int capsense_write(int address, int reg, int val); -+extern int capsense_get_state(int address,char port); -+extern int capsense_change_i2c_address(char old_address,char new_address); -+extern int capsense_EnableGpio(char address,char port,char pins); -+extern int capsense_EnableCapsense(char address,char port,char pins); -+extern int capsense_config(char address); -+extern void capsense_store_nvm(char address); -+#endif -+ -+#if !defined(CFG_CAPSENSE_BUS_NUM) -+#define CFG_CAPSENSE_BUS_NUM 1 -+ -+//----------------------------------------------- -+// Register Map and corresponding constants -+//----------------------------------------------- -+ -+ -+#define CAPSENSE_STATUS_PORT_REG (0x02) -+#define CAPSENSE_OUTPUT_PORT_REG (0x04) -+#define CAPSENSE_ENABLE_CAPSENSE_REG (0x06) -+#define CAPSENSE_ENABLE_GPIO_REG (0x08) -+#define CAPSENSE_INVERSION_PORT_REG (0x0A) -+#define CAPSENSE_INTERRUPT_MASK_REG (0x0C) -+#define CAPSENSE_PORT_STATUS_REG (0x0E) -+#define CAPSENSE_DRIVE_MODE_REG (0x10) -+#define CAPSENSE_OPER_SELECT_0_REG (0x1C) -+#define CAPSENSE_OPER_SELECT_1_REG (0x35) -+#define CAPSENSE_NOISE_THRESHOLD_REG (0x4E) -+#define CAPSENSE_SETTLING_TIME_REG (0x50) -+#define CAPSENSE_EXT_CAP_REG (0x51) -+#define CAPSENSE_SNS_RST_REG (0x51) -+#define CAPSENSE_CLK_SEL_REG (0x51) -+#define CAPSENSE_HYSTERESIS_REG (0x52) -+#define CAPSENSE_DEBOUNCE_REG (0x53) -+#define CAPSENSE_NEG_NOISE_THRESHOLD_REG (0x54) -+#define CAPSENSE_SCAN_POS_00 (0x57) -+ -+#define CAPSENSE_FT_PORT_0_REG (0x61) -+#define CAPSENSE_FT_PORT_1_REG (0x66) -+#define CAPSENSE_IDAC_SETTING_PORT_0_REG (0x6B) -+#define CAPSENSE_IDAC_SETTING_PORT_1_REG (0x70) -+#define CAPSENSE_SLIDER_CONFIGURATION_REG (0x75) -+#define CAPSENSE_SLIDER_RESOLUTION_REG (0x77) -+#define CAPSENSE_I2C_DEV_LOCK (0x79) -+#define CAPSENSE_DEVICE_ID_REG (0x7A) -+#define CAPSENSE_I2C_ADDR_DM (0x7C) -+#define CAPSENSE_SLEEP_CONTROL_PIN_REG (0x7E) -+#define CAPSENSE_SLEEP_CONTROL_REG (0x7F) -+#define CAPSENSE_STAY_AWAKE_CNTR_REG (0x80) -+#define CAPSENSE_BUTTON_SEL_REG (0x81) -+#define CAPSENSE_BASELINE_REG (0x82) -+#define CAPSENSE_READ_STATUS_REG (0x88) -+#define CAPSENSE_CENTROID_REG (0x8A) -+ -+#define CAPSENSE_COMMAND_REG (0xA0) -+ -+#define CAPSENSE_INPUT_PORT_MASK (0x10) -+#define CAPSENSE_INPUT_MASK (0x7) -+ -+ -+#define CAPSENSE_NORMAL_OPERATION_MODE (0x07) -+#define CAPSENSE_SETUP_OPERATION_MODE (0x08) -+#endif /* _CAPSENSE_H_ */ -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -407,6 +407,13 @@ - #define CFG_DTT_MAX_TEMP 70 - #define CFG_DTT_MIN_TEMP -30 - -+/*Capsense touch sensing buttons (Cpe board)*/ -+#define CONFIG_CMD_CAPSENSE -+#define CONFIG_CAPSENSE_CY8C201XX 1 -+#define CONFIG_CAPSENSE_I2C_ADDRESS 0x25 -+#define CONFIG_CAPSENSE_LEDS {0x02,0x0F} // port 0-{1} port 1-{0,1,2,3} -+#define CONFIG_CAPSENSE_SENSORS {0x1D,0x10} // port 0-{0,2,3,4} port 1-{4} -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/008-081205-TSEC.patch b/packages/u-boot/u-boot-1.3.2/boc01/008-081205-TSEC.patch deleted file mode 100644 index 34c0cc5010..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/008-081205-TSEC.patch +++ /dev/null @@ -1,180 +0,0 @@ -Index: u-boot-1.3.2/drivers/net/tsec.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.c 2008-12-09 16:29:43.000000000 +0100 -+++ u-boot-1.3.2/drivers/net/tsec.c 2008-12-09 16:30:18.000000000 +0100 -@@ -179,6 +179,12 @@ - priv->regs->maccfg1 |= MACCFG1_SOFT_RESET; - priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET); - -+ /* Init MACCFG2 */ -+ priv->regs->maccfg2 = MACCFG2_INIT_SETTINGS; -+ -+ /* Init ECNTRL */ -+ priv->regs->ecntrl = ECNTRL_INIT_SETTINGS; -+ - #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \ - && !defined(BITBANGMII) - miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write); -@@ -204,7 +210,7 @@ - /* Make sure the controller is stopped */ - tsec_halt(dev); - -- /* Init MACCFG2. Defaults to GMII */ -+ /* Init MACCFG2 */ - regs->maccfg2 = MACCFG2_INIT_SETTINGS; - - /* Init ECNTRL */ -@@ -868,7 +874,11 @@ - if(priv->phyinfo) - phy_run_commands(priv, priv->phyinfo->startup); - -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ priv->link = 1; -+#else - adjust_link(dev); -+#endif - - /* Enable Transmit and Receive */ - regs->maccfg1 |= (MACCFG1_RX_EN | MACCFG1_TX_EN); -@@ -1318,6 +1328,21 @@ - } - }; - -+/* a non-manageable PHY interface */ -+struct phy_info phy_info_null = { -+ 0, -+ "Non-manageable PHY", -+ 0, -+ (struct phy_cmd[]) { /* config */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* startup */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* shutdown */ -+ {miim_end,} -+ } -+}; - - uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv) - { -@@ -1473,6 +1498,10 @@ - */ - struct phy_info *get_phy_info(struct eth_device *dev) - { -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ debug("%s: Using non-manageable PHY interface\n", dev->name); -+ return &phy_info_null; -+#else - struct tsec_private *priv = (struct tsec_private *)dev->priv; - uint phy_reg, phy_ID; - int i; -@@ -1503,6 +1532,7 @@ - } - - return theInfo; -+#endif // CONFIG_TSEC_NON_MANAGEABLE_PHY - } - - /* Execute the given series of commands on the given device's -@@ -1520,6 +1550,7 @@ - - while (phyregs->miimind & MIIMIND_BUSY) ; - -+#if 0 - for (i = 0; cmd->mii_reg != miim_end; i++) { - if (cmd->mii_data == miim_read) { - result = read_phy_reg(priv, cmd->mii_reg); -@@ -1538,6 +1569,7 @@ - } - cmd++; - } -+#endif - } - - /* Relocate the function pointers in the phy cmd lists */ -Index: u-boot-1.3.2/drivers/net/tsec.h -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.h 2008-12-09 16:29:43.000000000 +0100 -+++ u-boot-1.3.2/drivers/net/tsec.h 2008-12-09 16:30:18.000000000 +0100 -@@ -56,11 +56,11 @@ - #define MACCFG1_SYNCD_TX_EN 0x00000002 - #define MACCFG1_TX_EN 0x00000001 - --#define MACCFG2_INIT_SETTINGS 0x00007205 - #define MACCFG2_FULL_DUPLEX 0x00000001 - #define MACCFG2_IF 0x00000300 - #define MACCFG2_GMII 0x00000200 - #define MACCFG2_MII 0x00000100 -+#define MACCFG2_INIT_SETTINGS (0x00007005 | MACCFG2_MII) - - #define ECNTRL_INIT_SETTINGS 0x00001000 - #define ECNTRL_TBI_MODE 0x00000020 -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:30:12.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:30:18.000000000 +0100 -@@ -246,8 +246,8 @@ - #define CFG_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} - --#define CFG_NS16550_COM1 (CFG_IMMR+0x4500) --#define CFG_NS16550_COM2 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM1 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM2 (CFG_IMMR+0x4500) - - /* Use the HUSH parser */ - #define CFG_HUSH_PARSER -@@ -302,23 +302,24 @@ - * TSEC configuration - */ - #define CONFIG_TSEC_ENET /* TSEC ethernet support */ -+#define CONFIG_TSEC_NON_MANAGEABLE_PHY /* Non-manageable PHY interface */ - - #ifndef CONFIG_NET_MULTI - #define CONFIG_NET_MULTI 1 - #endif - - #define CONFIG_GMII 1 /* MII PHY management */ --#define CONFIG_TSEC1 1 -+//#define CONFIG_TSEC1 1 - - #define CONFIG_TSEC1_NAME "TSEC0" - #define CONFIG_TSEC2 1 - #define CONFIG_TSEC2_NAME "TSEC1" --#define TSEC1_PHY_ADDR 0x1c --#define TSEC2_PHY_ADDR 4 --#define TSEC1_FLAGS TSEC_GIGABIT --#define TSEC2_FLAGS TSEC_GIGABIT -+#define TSEC1_PHY_ADDR 0 //0x1c -+#define TSEC2_PHY_ADDR 0 //4 -+#define TSEC1_FLAGS TSEC_REDUCED //TSEC_GIGABIT -+#define TSEC2_FLAGS TSEC_REDUCED //TSEC_GIGABIT - #define TSEC1_PHYIDX 0 --#define TSEC2_PHYIDX 0 -+#define TSEC2_PHYIDX 1 //0 - - /* Options are: TSEC[0-1] */ - #define CONFIG_ETHPRIME "TSEC1" -@@ -472,17 +473,17 @@ - HRCWH_SW_WATCHDOG_DISABLE |\ - HRCWH_ROM_LOC_LOCAL_16BIT |\ - HRCWH_RL_EXT_LEGACY |\ -- HRCWH_TSEC1M_IN_RGMII |\ -- HRCWH_TSEC2M_IN_RGMII |\ -+ HRCWH_TSEC1M_IN_MII |\ -+ HRCWH_TSEC2M_IN_MII |\ - HRCWH_BIG_ENDIAN |\ - HRCWH_LALE_NORMAL) - - --#define CONFIG_WATCHDOG -+//#define CONFIG_WATCHDOG - #define CFG_WATCHDOG_VALUE 0xFFFF - - /* System IO Config */ --#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -+#define CFG_SICRH 0 //(SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ - #define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ - - #define CFG_HID0_INIT 0x000000000 diff --git a/packages/u-boot/u-boot-1.3.2/boc01/008-081211-TSEC.patch b/packages/u-boot/u-boot-1.3.2/boc01/008-081211-TSEC.patch deleted file mode 100644 index 8a7ab22d14..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/008-081211-TSEC.patch +++ /dev/null @@ -1,162 +0,0 @@ -Index: u-boot-1.3.2/drivers/net/tsec.c -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.c -+++ u-boot-1.3.2/drivers/net/tsec.c -@@ -179,6 +179,12 @@ int tsec_initialize(bd_t * bis, int inde - priv->regs->maccfg1 |= MACCFG1_SOFT_RESET; - priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET); - -+ /* Init MACCFG2 */ -+ priv->regs->maccfg2 = MACCFG2_INIT_SETTINGS; -+ -+ /* Init ECNTRL */ -+ priv->regs->ecntrl = ECNTRL_INIT_SETTINGS; -+ - #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \ - && !defined(BITBANGMII) - miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write); -@@ -204,7 +210,7 @@ int tsec_init(struct eth_device *dev, bd - /* Make sure the controller is stopped */ - tsec_halt(dev); - -- /* Init MACCFG2. Defaults to GMII */ -+ /* Init MACCFG2 */ - regs->maccfg2 = MACCFG2_INIT_SETTINGS; - - /* Init ECNTRL */ -@@ -868,7 +874,11 @@ static void startup_tsec(struct eth_devi - if(priv->phyinfo) - phy_run_commands(priv, priv->phyinfo->startup); - -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ priv->link = 1; -+#else - adjust_link(dev); -+#endif - - /* Enable Transmit and Receive */ - regs->maccfg1 |= (MACCFG1_RX_EN | MACCFG1_TX_EN); -@@ -1318,6 +1328,21 @@ struct phy_info phy_info_generic = { - } - }; - -+/* a non-manageable PHY interface */ -+struct phy_info phy_info_null = { -+ 0, -+ "Non-manageable PHY", -+ 0, -+ (struct phy_cmd[]) { /* config */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* startup */ -+ {miim_end,} -+ }, -+ (struct phy_cmd[]) { /* shutdown */ -+ {miim_end,} -+ } -+}; - - uint mii_parse_lxt971_sr2(uint mii_reg, struct tsec_private *priv) - { -@@ -1473,6 +1498,10 @@ struct phy_info *phy_info[] = { - */ - struct phy_info *get_phy_info(struct eth_device *dev) - { -+#ifdef CONFIG_TSEC_NON_MANAGEABLE_PHY -+ debug("%s: Using non-manageable PHY interface\n", dev->name); -+ return &phy_info_null; -+#else - struct tsec_private *priv = (struct tsec_private *)dev->priv; - uint phy_reg, phy_ID; - int i; -@@ -1503,6 +1532,7 @@ struct phy_info *get_phy_info(struct eth - } - - return theInfo; -+#endif // CONFIG_TSEC_NON_MANAGEABLE_PHY - } - - /* Execute the given series of commands on the given device's -Index: u-boot-1.3.2/drivers/net/tsec.h -=================================================================== ---- u-boot-1.3.2.orig/drivers/net/tsec.h -+++ u-boot-1.3.2/drivers/net/tsec.h -@@ -56,11 +56,11 @@ - #define MACCFG1_SYNCD_TX_EN 0x00000002 - #define MACCFG1_TX_EN 0x00000001 - --#define MACCFG2_INIT_SETTINGS 0x00007205 - #define MACCFG2_FULL_DUPLEX 0x00000001 - #define MACCFG2_IF 0x00000300 - #define MACCFG2_GMII 0x00000200 - #define MACCFG2_MII 0x00000100 -+#define MACCFG2_INIT_SETTINGS (0x00007005 | MACCFG2_MII) - - #define ECNTRL_INIT_SETTINGS 0x00001000 - #define ECNTRL_TBI_MODE 0x00000020 -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h -@@ -246,8 +246,8 @@ - #define CFG_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} - --#define CFG_NS16550_COM1 (CFG_IMMR+0x4500) --#define CFG_NS16550_COM2 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM1 (CFG_IMMR+0x4600) -+#define CFG_NS16550_COM2 (CFG_IMMR+0x4500) - - /* Use the HUSH parser */ - #define CFG_HUSH_PARSER -@@ -302,23 +302,24 @@ - * TSEC configuration - */ - #define CONFIG_TSEC_ENET /* TSEC ethernet support */ -+#define CONFIG_TSEC_NON_MANAGEABLE_PHY /* Non-manageable PHY interface */ - - #ifndef CONFIG_NET_MULTI - #define CONFIG_NET_MULTI 1 - #endif - - #define CONFIG_GMII 1 /* MII PHY management */ --#define CONFIG_TSEC1 1 -+//#define CONFIG_TSEC1 1 - - #define CONFIG_TSEC1_NAME "TSEC0" - #define CONFIG_TSEC2 1 - #define CONFIG_TSEC2_NAME "TSEC1" --#define TSEC1_PHY_ADDR 0x1c --#define TSEC2_PHY_ADDR 4 --#define TSEC1_FLAGS TSEC_GIGABIT --#define TSEC2_FLAGS TSEC_GIGABIT -+#define TSEC1_PHY_ADDR 0 //0x1c -+#define TSEC2_PHY_ADDR 0 //4 -+#define TSEC1_FLAGS TSEC_REDUCED //TSEC_GIGABIT -+#define TSEC2_FLAGS TSEC_REDUCED //TSEC_GIGABIT - #define TSEC1_PHYIDX 0 --#define TSEC2_PHYIDX 0 -+#define TSEC2_PHYIDX 1 //0 - - /* Options are: TSEC[0-1] */ - #define CONFIG_ETHPRIME "TSEC1" -@@ -472,8 +473,8 @@ - HRCWH_SW_WATCHDOG_DISABLE |\ - HRCWH_ROM_LOC_LOCAL_16BIT |\ - HRCWH_RL_EXT_LEGACY |\ -- HRCWH_TSEC1M_IN_RGMII |\ -- HRCWH_TSEC2M_IN_RGMII |\ -+ HRCWH_TSEC1M_IN_MII |\ -+ HRCWH_TSEC2M_IN_MII |\ - HRCWH_BIG_ENDIAN |\ - HRCWH_LALE_NORMAL) - -@@ -482,7 +483,7 @@ - #define CFG_WATCHDOG_VALUE 0xFFFF - - /* System IO Config */ --#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ -+#define CFG_SICRH 0 //(SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ - #define CFG_SICRL (SICRL_USBDR |SICRL_LBC) /* Enable Internal USB Phy */ - - #define CFG_HID0_INIT 0x000000000 diff --git a/packages/u-boot/u-boot-1.3.2/boc01/009-081205-EXIO.patch b/packages/u-boot/u-boot-1.3.2/boc01/009-081205-EXIO.patch deleted file mode 100644 index dc1497c833..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/009-081205-EXIO.patch +++ /dev/null @@ -1,139 +0,0 @@ -Index: u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c -=================================================================== ---- u-boot-1.3.2.orig/board/freescale/mpc8313erdb/mpc8313erdb.c 2008-12-09 16:29:42.000000000 +0100 -+++ u-boot-1.3.2/board/freescale/mpc8313erdb/mpc8313erdb.c 2008-12-09 16:30:25.000000000 +0100 -@@ -48,6 +48,7 @@ - { - uchar value; - uchar i; -+ ulong addr; - - #ifdef PRE_INIT_GPIO - value=PRE_INIT_GPIO; -@@ -82,6 +83,18 @@ - } - puts("GPIO: ready\n"); - #endif -+ -+#ifdef PRE_INIT_EXIO -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = PRE_INIT_EXIO; -+ udelay(1000); -+#endif -+ -+#ifdef INIT_EXIO -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = INIT_EXIO; -+ puts("EXIO: ready\n"); -+#endif - } - - int checkboard(void) -Index: u-boot-1.3.2/common/cmd_exio.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/common/cmd_exio.c 2008-12-09 16:30:25.000000000 +0100 -@@ -0,0 +1,67 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CenoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ */ -+ -+ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+ -+extern void init_exio(char value); -+ -+int do_exio (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ unsigned char ucExio; -+ ulong addr; -+ if (argc < 2) -+ goto usage; -+ -+ if (!strncmp(argv[1], "get", 3)) -+ { -+ addr = ADDR_EXIO; -+ ucExio=*((u_char *)addr); -+ printf("%s = 0x%02x\n",argv[0],ucExio); -+ } -+ else -+ { -+ ucExio = simple_strtoul (argv[1], NULL, 10); -+ -+ addr = ADDR_EXIO; -+ *((u_char *)addr) = ucExio; -+ -+ printf("%s 0x%2x\n",argv[0],ucExio); -+ } -+ return 0; -+ -+usage : -+ printf ("Usage:\n%s\n", cmdtp->usage); -+ return 1; -+} /* do_gpio() */ -+ -+/***************************************************/ -+ -+U_BOOT_CMD( -+ exio, 2, 1, do_exio, -+ "exio - Extender io Output\n", -+ " - Set or clear extender io Output.\n" -+ "exio value - \n" -+); -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile 2008-12-09 16:29:42.000000000 +0100 -+++ u-boot-1.3.2/common/Makefile 2008-12-09 16:30:25.000000000 +0100 -@@ -52,6 +52,7 @@ - COBJS-$(CONFIG_CMD_DTT) += cmd_dtt.o - COBJS-$(CONFIG_CMD_CAPSENSE) += cmd_capsense.o - COBJS-$(CONFIG_CMD_GPIO) += cmd_gpio.o -+COBJS-$(CONFIG_CMD_EXIO) += cmd_exio.o - COBJS-y += cmd_eeprom.o - COBJS-$(CONFIG_CMD_ELF) += cmd_elf.o - COBJS-$(CONFIG_CMD_EXT2) += cmd_ext2.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:30:18.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:30:25.000000000 +0100 -@@ -374,6 +374,7 @@ - #define CONFIG_CMD_SPI - #define CONFIG_CMD_DTT - #define CONFIG_CMD_GPIO -+#define CONFIG_CMD_EXIO - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -@@ -415,6 +416,11 @@ - #define CONFIG_CAPSENSE_LEDS {0x02,0x0F} // port 0-{1} port 1-{0,1,2,3} - #define CONFIG_CAPSENSE_SENSORS {0x1D,0x10} // port 0-{0,2,3,4} port 1-{4} - -+/* Extender io */ -+#define ADDR_EXIO 0xFA000000 -+#define PRE_INIT_EXIO 0x18 -+#define INIT_EXIO 0x58 -+ - /* - * Miscellaneous configurable options - */ diff --git a/packages/u-boot/u-boot-1.3.2/boc01/010-081205-LCD.patch b/packages/u-boot/u-boot-1.3.2/boc01/010-081205-LCD.patch deleted file mode 100644 index 75c64efd5d..0000000000 --- a/packages/u-boot/u-boot-1.3.2/boc01/010-081205-LCD.patch +++ /dev/null @@ -1,520 +0,0 @@ -Index: u-boot-1.3.2/common/Bollore.xbm -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/common/Bollore.xbm 2008-12-09 16:30:28.000000000 +0100 -@@ -0,0 +1,174 @@ -+#define Bollore_width 128 -+#define Bollore_height 128 -+static unsigned char Bollore_bits[] = { -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x1f, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x01, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, -+ 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x00, 0x70, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0xf8, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, 0xf8, 0x01, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0xf8, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x80, 0x0f, 0x3c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x04, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x78, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0xe0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x00, 0x00, 0x00, 0x80, 0xe7, 0x01, 0x00, 0x00, 0x00, 0x86, 0x07, 0x00, -+ 0x00, 0x00, 0x00, 0x00, 0xfe, 0x0f, 0x00, 0x80, 0xe7, 0x01, 0x00, 0x00, -+ 0x00, 0x07, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x3f, 0x00, 0x00, -+ 0xc7, 0x01, 0x00, 0x00, 0x80, 0x03, 0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, -+ 0x78, 0x38, 0x00, 0x00, 0xc7, 0x01, 0x00, 0x00, 0x80, 0x01, 0x1c, 0x00, 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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; -Index: u-boot-1.3.2/common/cmd_lcd.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/common/cmd_lcd.c 2008-12-09 16:30:28.000000000 +0100 -@@ -0,0 +1,216 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+#include <common.h> -+#include <config.h> -+#include <command.h> -+#include <NT7506.h> -+//Splash screen in xbm format -+#include "Bollore.xbm" -+ -+ -+#define DELAY 1 -+#define AEL 0x0F -+ -+static void NT7506_init_lcd(char ael); -+static void NT7506_print_splash(char * Picture,char width,char height); -+static void NT7506_set_xaddr(unsigned char x); -+static void NT7506_set_yaddr(unsigned char y); -+static void NT7506_writeb_data(unsigned char value); -+static void NT7506_writeb_ctl(unsigned char value); -+static void iowrite16(unsigned short value); -+ -+static void iowrite16(unsigned short value) -+{ -+ ulong addr; -+ unsigned short send; -+ send=value>>8; -+ send+=(value&0xFF)<<8; -+ addr = CFG_LCD_BASE; -+ -+ *((unsigned short *)addr)=send; -+} -+ -+static void NT7506_writeb_ctl(unsigned char value) -+{ -+ unsigned short svalue; -+ svalue=value<<8 | LCD_RSN | LCD_RST | LCD_ERDN | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+ svalue=value<<8 | LCD_RSN | LCD_RST | LCD_ERD | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+ -+} -+ -+static void NT7506_writeb_data(unsigned char value) -+{ -+ unsigned short svalue; -+ svalue=value<<8|LCD_RS |LCD_RST | LCD_ERD | LCD_BCKLIGH ; -+ iowrite16(svalue); -+ udelay(DELAY); -+ svalue=value<<8|LCD_RS |LCD_RST | LCD_ERDN | LCD_BCKLIGH; -+ iowrite16(svalue); -+ udelay(DELAY); -+} -+ -+static void NT7506_set_yaddr(unsigned char y) -+{ -+ NT7506_writeb_ctl(NT_PAGE_ADDR+y); -+} -+ -+static void NT7506_set_xaddr(unsigned char x) -+{ -+ NT7506_writeb_ctl(NT_COL_MSB | (x >> 0x04) ); //Send high nibble -+ NT7506_writeb_ctl(NT_COL_LSB | (x & 0x0F) ); //Send low nibble -+} -+ -+static void ImageRota(char * src,char * dest, int w ,int h) -+{ -+ int i,j,bit,IndexRead; -+ char mask=0; -+ char bitvalue; -+ for(i=0;i<h/8;i++) -+ { -+ for(j=0;j<(w);j++) -+ { -+ -+ for(bit=0,IndexRead=(i*128)+(j/8);bit<8;bit++,IndexRead+=(w/8)) -+ { -+ mask=(1<<((j%8))); -+ bitvalue=(src[IndexRead]&mask)>>((j%8)); -+ dest[j+i*w]+=(bitvalue<<bit); -+ } -+ } -+ } -+} -+ -+ -+static void NT7506_print_splash(char * picture,char width,char height) -+{ -+ int i; -+ char value; -+ char imagerota[2048]; -+ int indeximage=0; -+ -+ int x,y,xfb,yfb,Index; -+ char src[2048]; -+ if(width>128) -+ width=128; -+ if(height>128) -+ height=128; -+ -+ for(i=0;i<2048;i++) -+ imagerota[i]=0; -+ -+ ImageRota(picture,imagerota, width ,128); -+ -+ for(yfb=0;yfb<(height/8);yfb++) -+ { -+ for(xfb=0;xfb<width;xfb++) -+ { -+ src[xfb*16+yfb]=imagerota[indeximage++] ; -+ } -+ } -+ -+ for (y = 0; y < (height/8); y++) -+ { -+ NT7506_set_yaddr(y); -+ NT7506_set_xaddr(0); -+ -+ for (x = 0; x < width; x++) -+ { -+ NT7506_writeb_data(src[(x*(height/8))+y]); -+ NT7506_writeb_data(0x00); -+ } -+ NT7506_writeb_data((unsigned char)0); -+ } -+} -+ -+static void NT7506_init_lcd(char ael) -+{ -+ /* this resets the lcd*/ -+ iowrite16(LCD_RSTN | LCD_ERD | LCD_BCKLIGH); -+ udelay(100); -+ iowrite16(LCD_RST| LCD_ERD | LCD_BCKLIGH); -+ udelay(200); -+ /* Soft reset*/ -+ NT7506_writeb_ctl(NT_RESET); -+ /* Disable ICON display*/ -+ NT7506_writeb_ctl(NT_ICON|OFF); -+ /* Sets the duty ratio 1/128*/ -+ NT7506_writeb_ctl(NT_DUTY); NT7506_writeb_ctl(DUTY_1_128); -+ /* Sets reverse direction between RAM column address and segment driver*/ -+ NT7506_writeb_ctl(NT_ADC_REV); -+ NT7506_writeb_ctl(NT_SHL_NOR); -+ /* Enales the built in Oscillator circuit.*/ -+ NT7506_writeb_ctl(NT_OSC); -+ /* Set Initial row to 0*/ -+ NT7506_writeb_ctl(NT_COM0); NT7506_writeb_ctl(0); -+ /* Sets DC-DC*/ -+ NT7506_writeb_ctl(NT_DCDC|TIME6); -+ /* Selects resistance ratio of the internal resistor*/ -+ NT7506_writeb_ctl(NT_REG_RES|RES_7_2); -+ /* set Reference Voltage mode*/ -+ NT7506_writeb_ctl(NT_ELEC_VOL); NT7506_writeb_ctl(ael); -+ /* Selects LCD bias ratio*/ -+ NT7506_writeb_ctl(NT_BIAS|BIAS_1_11); -+ -+ NT7506_writeb_ctl(NT_DATA_DIR); NT7506_writeb_ctl(0); -+ NT7506_writeb_ctl(NT_FRC_PWM|PWM15); -+ /* Select power circuit functions */ -+ NT7506_writeb_ctl(NT_POWER|VC); -+ udelay(5000); -+ NT7506_writeb_ctl(NT_POWER|VC|VR); -+ udelay(5000); -+ NT7506_writeb_ctl(NT_POWER|VC|VR|VF); -+ udelay(5000); -+ /* Reverses the display status on LCD panel */ -+ NT7506_writeb_ctl(NT_REV_DISP|OFF); -+ /* Forces the whole LCD points to be turned on regardless of the contents of the display data RAM*/ -+ NT7506_writeb_ctl(NT_DISP|ON); -+ /* Set Initial Start Line Address */ -+ NT7506_writeb_ctl(NT_START_LINE); NT7506_writeb_ctl(0x00); -+} -+ -+ -+/**************************************************/ -+void do_lcd(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) -+{ -+ char lcd_ael=AEL; -+ if(argc>1) -+ lcd_ael = simple_strtoul (argv[1], NULL, 10); -+ -+ if(lcd_ael>63) -+ lcd_ael=0x63; -+ -+ NT7506_init_lcd(lcd_ael); -+ NT7506_print_splash(Bollore_bits,Bollore_width,Bollore_height); -+} -+ -+U_BOOT_CMD( -+ lcd, 2, 1, do_lcd, -+ "lcd - lcd\n", -+ "lcd\n" -+); -+ -Index: u-boot-1.3.2/common/Makefile -=================================================================== ---- u-boot-1.3.2.orig/common/Makefile 2008-12-09 16:30:25.000000000 +0100 -+++ u-boot-1.3.2/common/Makefile 2008-12-09 16:30:28.000000000 +0100 -@@ -94,6 +94,7 @@ - COBJS-$(CONFIG_CMD_TERMINAL) += cmd_terminal.o - COBJS-$(CONFIG_CMD_UNIVERSE) += cmd_universe.o - COBJS-$(CONFIG_CMD_USB) += cmd_usb.o -+COBJS-$(CONFIG_CMD_LCD) +=cmd_lcd.o - COBJS-y += cmd_vfd.o - COBJS-y += command.o - COBJS-y += console.o -Index: u-boot-1.3.2/include/configs/MPC8313ERDB.h -=================================================================== ---- u-boot-1.3.2.orig/include/configs/MPC8313ERDB.h 2008-12-09 16:30:25.000000000 +0100 -+++ u-boot-1.3.2/include/configs/MPC8313ERDB.h 2008-12-09 16:30:28.000000000 +0100 -@@ -215,13 +215,13 @@ - #define CFG_LBLAWBAR1_PRELIM CFG_NAND_BASE - #define CFG_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ - --#define CFG_VSC7385_BASE 0xF0000000 -+#define CFG_LCD_BASE 0xF0000000 - --#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */ --#define CFG_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */ --#define CFG_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/ --#define CFG_LBLAWBAR2_PRELIM CFG_VSC7385_BASE/* Access window base at VSC7385 base */ --#define CFG_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */ -+//#define CONFIG_LCD /* LCD support */ -+#define CFG_BR2_PRELIM 0xf0001001 /* LCD Base address 16bits */ -+#define CFG_OR2_PRELIM 0xFFFF8FF7 /* LCD, 32kB bytes*/ -+#define CFG_LBLAWBAR2_PRELIM CFG_LCD_BASE/* Access window base at lcd base */ -+#define CFG_LBLAWAR2_PRELIM 0x8000000E /* Access window size 32k */ - - /* local bus read write buffer mapping */ - #define CFG_BR3_PRELIM 0xFA000801 /* map at 0xFA000000 */ -@@ -375,6 +375,7 @@ - #define CONFIG_CMD_DTT - #define CONFIG_CMD_GPIO - #define CONFIG_CMD_EXIO -+#define CONFIG_CMD_LCD - - #if defined(CFG_RAMBOOT) - #undef CONFIG_CMD_ENV -Index: u-boot-1.3.2/include/NT7506.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.3.2/include/NT7506.h 2008-12-09 16:30:28.000000000 +0100 -@@ -0,0 +1,71 @@ -+/* -+ * (C) Copyright 2008 -+ * Alexandre Coffignal, CénoSYS, alexandre.coffignal@cenosys.com -+ * -+ * See file CREDITS for list of people who contributed to this -+ * project. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of -+ * the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, -+ * MA 02111-1307 USA -+ * -+ */ -+ -+ -+ -+//NT7506 Instructions -+#define NT_ICON 0xA2 -+#define NT_PAGE_ADDR 0xB0 -+#define NT_COL_MSB 0x10 -+#define NT_COL_LSB 0x00 -+#define NT_DISP 0xAE -+#define NT_START_LINE 0x40 -+#define NT_COM0 0x44 -+#define NT_DUTY 0x48 -+#define DUTY_1_128 0x80 -+#define NT_REV_DISP 0xA6 -+#define NT_POWER 0x28 -+#define VC 0x04 -+#define VR 0x02 -+#define VF 0x01 -+#define NT_DCDC 0x64 -+#define TIME6 0x03 -+#define NT_REG_RES 0x20 -+#define RES_7_2 0x07 -+#define NT_ELEC_VOL 0x81 -+#define NT_BIAS 0x50 -+#define BIAS_1_11 0x06 -+#define NT_ADC_NOR 0xA0 -+#define NT_ADC_REV 0xA1 -+#define NT_SHL_NOR 0xC0 -+#define NT_SHL_REV 0xC8 -+#define NT_OSC 0xAB -+#define NT_RESET 0xE2 -+#define NT_DATA_DIR 0xe8 -+#define NT_FRC_PWM 0x90 -+#define PWM15 0x03 -+ -+#define ON 0x01 -+#define OFF 0x00 -+ -+ -+//NT7506 Hardware -+#define LCD_RST 0x08 -+#define LCD_RSTN 0x00 -+#define LCD_BCKLIGH 0x04 -+#define LCD_BCKLIGHN 0x00 -+#define LCD_RS 0x02 -+#define LCD_RSN 0x00 -+#define LCD_ERD 0x01 -+#define LCD_ERDN 0x00 |