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| author |   Alejandro Hernandez Samaniego <alejandro@enedino.org> | 2021-08-07 22:14:51 -0600 |
|---|---|---|
| committer |   Richard Purdie <richard.purdie@linuxfoundation.org> | 2021-08-12 06:26:10 +0100 |
| commit | d4cca7471f2167b56347fa7b1364bb84a200b1f5 (patch) | |
| tree | c4fa6de92948bfc9171c4fac27eaa6e7048ea0ef | |
| parent | a522972821339f42dcdddb334e843e21584bfbea (diff) | |
| download | openembedded-core-d4cca7471f2167b56347fa7b1364bb84a200b1f5.tar.gz | |
baremetal-helloworld: Enable RISC-V 32 port
$ runqemu nographic
runqemu - INFO - Running bitbake -e ...
KERNEL: [tmp/deploy/images/qemuriscv32/baremetal-helloworld-image-qemuriscv32.bin]
MACHINE: [qemuriscv32]
runqemu - INFO - Running tmp/work/x86_64-linux/qemu-helper-native/1.0-r1/recipe-sysroot-native/usr/bin/qemu-system-riscv32
Hello OpenEmbedded on RISC-V 32!
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandro@enedino.org>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
| -rw-r--r-- | meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb | 5 | ||||
| -rw-r--r-- | meta/classes/baremetal-image.bbclass | 3 |
2 files changed, 6 insertions, 2 deletions
diff --git a/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb b/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb index 37193f5a33..d11e2e530e 100644 --- a/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb +++ b/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb @@ -4,7 +4,7 @@ DESCRIPTION = "These are introductory examples to showcase the use of QEMU to ru LICENSE = "MIT" LIC_FILES_CHKSUM = "file://LICENSE;md5=39346640a23c701e4f459e05f56f4449" -SRCREV = "0bf9ea216e6f76be50726a3a74e527b7bbb0ad93" +SRCREV = "31b4e5a337018b4a00a7426b0e5ed83b81df30c7" PV = "0.1+git${SRCPV}" SRC_URI = "git://github.com/aehs29/baremetal-helloqemu.git;protocol=https;branch=master" @@ -28,13 +28,14 @@ inherit baremetal-image # machine that QEMU uses on OE, e.g. -machine virt -cpu cortex-a57 # but the examples can also be run on other architectures/machines # such as vexpress-a15 by overriding the setting on the machine.conf -COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64" +COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64|qemuriscv32" BAREMETAL_QEMUARCH ?= "" BAREMETAL_QEMUARCH:qemuarmv5 = "versatile" BAREMETAL_QEMUARCH:qemuarm = "arm" BAREMETAL_QEMUARCH:qemuarm64 = "aarch64" BAREMETAL_QEMUARCH:qemuriscv64 = "riscv64" +BAREMETAL_QEMUARCH:qemuriscv32 = "riscv32" EXTRA_OEMAKE:append = " QEMUARCH=${BAREMETAL_QEMUARCH} V=1" diff --git a/meta/classes/baremetal-image.bbclass b/meta/classes/baremetal-image.bbclass index 9ec3f1460b..089c445522 100644 --- a/meta/classes/baremetal-image.bbclass +++ b/meta/classes/baremetal-image.bbclass @@ -82,12 +82,15 @@ QB_OPT_APPEND:append = " -nographic" # RISC-V tunes set the BIOS, unset, and instruct QEMU to # ignore the BIOS and boot from -kernel QB_DEFAULT_BIOS:qemuriscv64 = "" +QB_DEFAULT_BIOS:qemuriscv32 = "" QB_OPT_APPEND:append:qemuriscv64 = " -bios none" +QB_OPT_APPEND:append:qemuriscv32 = " -bios none" # Use the medium-any code model for the RISC-V 64 bit implementation, # since medlow can only access addresses below 0x80000000 and RAM # starts at 0x80000000 on RISC-V 64 +# Keep RISC-V 32 using -mcmodel=medlow (symbols lie between -2GB:2GB) CFLAGS:append:qemuriscv64 = " -mcmodel=medany" |