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| author |   Khem Raj <raj.khem@gmail.com> | 2019-08-30 22:23:12 -0700 |
|---|---|---|
| committer |   Richard Purdie <richard.purdie@linuxfoundation.org> | 2019-09-03 09:55:50 +0100 |
| commit | 6e3fac8de62f22aeebfc384dc95a51153726a047 (patch) | |
| tree | b3472ffb713b2cbcc417e69e8adfd8654d4fdf1c /meta | |
| parent | 2bdb7ad8403c77804e6ebeb4f31b0c2aa75f9650 (diff) | |
| download | openembedded-core-contrib-6e3fac8de62f22aeebfc384dc95a51153726a047.tar.gz | |
tune-riscv: Drop littleendian and introduce bigendian tune
Default riscv is little-endian moreover most of other arches define
bigendian as tune and treats absense as litteendian, this make risc-v
fall in line
(From OE-Core rev: cd6f377591a7bd7b3c61ce580f997aaeffab3df3)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta')
| -rw-r--r-- | meta/conf/machine/include/riscv/tune-riscv.inc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/meta/conf/machine/include/riscv/tune-riscv.inc b/meta/conf/machine/include/riscv/tune-riscv.inc index 1e3a1081e0..25d0463492 100644 --- a/meta/conf/machine/include/riscv/tune-riscv.inc +++ b/meta/conf/machine/include/riscv/tune-riscv.inc @@ -3,16 +3,16 @@ require conf/machine/include/riscv/arch-riscv.inc TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations" TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations" -TUNEVALID[littleendian] = "Little endian mode" +TUNEVALID[bigendian] = "Big endian mode" AVAILTUNES += "riscv64 riscv32" -TUNE_FEATURES_tune-riscv64 = "riscv64 littleendian" +TUNE_FEATURES_tune-riscv64 = "riscv64" TUNE_ARCH_tune-riscv64 = "riscv64" TUNE_PKGARCH_tune-riscv64 = "riscv64" PACKAGE_EXTRA_ARCHS_tune-riscv64 = "riscv64" -TUNE_FEATURES_tune-riscv32 = "riscv32 littleendian" +TUNE_FEATURES_tune-riscv32 = "riscv32" TUNE_ARCH_tune-riscv32 = "riscv32" TUNE_PKGARCH_tune-riscv32 = "riscv32" PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32" |