diff options
author | Mans Rullgard <mans@mansr.com> | 2021-01-16 13:34:08 +0000 |
---|---|---|
committer | Anuj Mittal <anuj.mittal@intel.com> | 2021-01-19 11:26:55 +0800 |
commit | c6dac9e737b27dc0e2b02a75463b0eba4b9b01d0 (patch) | |
tree | bef5475e31529ea32568e8be5b39c1861226ac48 /meta/recipes-support/boost/boost/arm-intrinsics.patch | |
parent | f4fd434292d3f2d7e4a3dd97ae55ad5714357d9f (diff) | |
download | openembedded-core-contrib-c6dac9e737b27dc0e2b02a75463b0eba4b9b01d0.tar.gz |
boost: drop arm-intrinsics.patch
This patch makes gcc produce broken code. It is unclear why it is there
in the first place. Drop it.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
(cherry picked from commit 5f3cace37496fe1dc4fd045f688f7d441505c437)
Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
Diffstat (limited to 'meta/recipes-support/boost/boost/arm-intrinsics.patch')
-rw-r--r-- | meta/recipes-support/boost/boost/arm-intrinsics.patch | 55 |
1 files changed, 0 insertions, 55 deletions
diff --git a/meta/recipes-support/boost/boost/arm-intrinsics.patch b/meta/recipes-support/boost/boost/arm-intrinsics.patch deleted file mode 100644 index fe85c69a82..0000000000 --- a/meta/recipes-support/boost/boost/arm-intrinsics.patch +++ /dev/null @@ -1,55 +0,0 @@ -Upstream-Status: Backport - -8/17/2010 - rebased to 1.44 by Qing He <qing.he@intel.com> - -diff --git a/boost/smart_ptr/detail/atomic_count_sync.hpp b/boost/smart_ptr/detail/atomic_count_sync.hpp -index b6359b5..78b1cc2 100644 ---- a/boost/smart_ptr/detail/atomic_count_sync.hpp -+++ b/boost/smart_ptr/detail/atomic_count_sync.hpp -@@ -33,17 +33,46 @@ public: - - long operator++() - { -+#ifdef __ARM_ARCH_7A__ -+ int v1, tmp; -+ asm volatile ("1: \n\t" -+ "ldrex %0, %1 \n\t" -+ "add %0 ,%0, #1 \n\t" -+ "strex %2, %0, %1 \n\t" -+ "cmp %2, #0 \n\t" -+ "bne 1b \n\t" -+ : "=&r" (v1), "+Q"(value_), "=&r"(tmp) -+ ); -+#else - return __sync_add_and_fetch( &value_, 1 ); -+#endif - } - - long operator--() - { -+#ifdef __ARM_ARCH_7A__ -+ int v1, tmp; -+ asm volatile ("1: \n\t" -+ "ldrex %0, %1 \n\t" -+ "sub %0 ,%0, #1 \n\t" -+ "strex %2, %0, %1 \n\t" -+ "cmp %2, #0 \n\t" -+ "bne 1b \n\t" -+ : "=&r" (v1), "+Q"(value_), "=&r"(tmp) -+ ); -+ return value_; -+#else - return __sync_add_and_fetch( &value_, -1 ); -+#endif - } - - operator long() const - { -+#if __ARM_ARCH_7A__ -+ return value_; -+#else - return __sync_fetch_and_add( &value_, 0 ); -+#endif - } - - private: |