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| author |   Alistair Francis <alistair.francis@wdc.com> | 2019-12-19 13:24:10 -0800 |
|---|---|---|
| committer |   Richard Purdie <richard.purdie@linuxfoundation.org> | 2019-12-30 23:38:12 +0000 |
| commit | 5263b2ebc57fe289d64c74bfb10da39ed7c98828 (patch) | |
| tree | 9a629d488fcf4fe087eb492f62ae519632dccfe0 | |
| parent | 47df8c0dd8ff86af97e6c6d217fb8d69ebec24e5 (diff) | |
| download | openembedded-core-contrib-5263b2ebc57fe289d64c74bfb10da39ed7c98828.tar.gz | |
tune-riscv: Add support for no float
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
| -rw-r--r-- | meta/conf/machine/include/riscv/arch-riscv.inc | 3 | ||||
| -rw-r--r-- | meta/conf/machine/include/riscv/tune-riscv.inc | 16 |
2 files changed, 17 insertions, 2 deletions
diff --git a/meta/conf/machine/include/riscv/arch-riscv.inc b/meta/conf/machine/include/riscv/arch-riscv.inc index 8ed9874389..e3dbef7fe3 100644 --- a/meta/conf/machine/include/riscv/arch-riscv.inc +++ b/meta/conf/machine/include/riscv/arch-riscv.inc @@ -4,7 +4,8 @@ DEFAULTTUNE ?= "riscv64" TUNE_ARCH = "${TUNE_ARCH_tune-${DEFAULTTUNE}}" TUNE_PKGARCH = "${TUNE_PKGARCH_tune-${DEFAULTTUNE}}" -TUNE_CCARGS .= "" +TUNE_CCARGS_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv64nf', ' -mabi=lp64', ' ', d)}" +TUNE_CCARGS_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32nf', ' -mabi=ilp32', ' ', d)}" # QEMU usermode fails with invalid instruction error (For riscv32) MACHINE_FEATURES_BACKFILL_CONSIDERED_append = "${@bb.utils.contains('TUNE_FEATURES', 'riscv32', ' qemu-usermode', '', d)}" diff --git a/meta/conf/machine/include/riscv/tune-riscv.inc b/meta/conf/machine/include/riscv/tune-riscv.inc index 25d0463492..741eeb34db 100644 --- a/meta/conf/machine/include/riscv/tune-riscv.inc +++ b/meta/conf/machine/include/riscv/tune-riscv.inc @@ -3,10 +3,14 @@ require conf/machine/include/riscv/arch-riscv.inc TUNEVALID[riscv64] = "Enable 64-bit RISC-V optimizations" TUNEVALID[riscv32] = "Enable 32-bit RISC-V optimizations" +TUNEVALID[riscv64nf] = "Enable 64-bit RISC-V optimizations no floating point" +TUNEVALID[riscv32nf] = "Enable 32-bit RISC-V optimizations no floating point" + TUNEVALID[bigendian] = "Big endian mode" -AVAILTUNES += "riscv64 riscv32" +AVAILTUNES += "riscv64 riscv32 riscv64nf riscv32nf" +# Default TUNE_FEATURES_tune-riscv64 = "riscv64" TUNE_ARCH_tune-riscv64 = "riscv64" TUNE_PKGARCH_tune-riscv64 = "riscv64" @@ -17,3 +21,13 @@ TUNE_ARCH_tune-riscv32 = "riscv32" TUNE_PKGARCH_tune-riscv32 = "riscv32" PACKAGE_EXTRA_ARCHS_tune-riscv32 = "riscv32" +# No float +TUNE_FEATURES_tune-riscv64nf = "${TUNE_FEATURES_tune-riscv64} riscv64nf" +TUNE_ARCH_tune-riscv64nf = "riscv64" +TUNE_PKGARCH_tune-riscv64nf = "riscv64" +PACKAGE_EXTRA_ARCHS_tune-riscv64nf = "riscv64nf" + +TUNE_FEATURES_tune-riscv32nf = "${TUNE_FEATURES_tune-riscv32} riscv32nf" +TUNE_ARCH_tune-riscv32nf = "riscv32" +TUNE_PKGARCH_tune-riscv32nf = "riscv32" +PACKAGE_EXTRA_ARCHS_tune-riscv32nf = "riscv32nf" |