diff options
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106763.patch')
| -rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106763.patch | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106763.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106763.patch new file mode 100644 index 0000000000..4abfa02a77 --- /dev/null +++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106763.patch @@ -0,0 +1,24 @@ +2011-06-28 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + Backport from mainline. + gcc/ + 2011-06-24 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org> + + PR target/49385 + * config/arm/thumb2.md (*thumb2_movhi_insn): Make sure atleast + one of the operands is a register. +Index: gcc-4_6-branch/gcc/config/arm/thumb2.md +=================================================================== +--- gcc-4_6-branch.orig/gcc/config/arm/thumb2.md 2011-09-16 20:22:40.000000000 -0700 ++++ gcc-4_6-branch/gcc/config/arm/thumb2.md 2011-09-16 20:28:47.648690433 -0700 +@@ -207,7 +207,9 @@ + (define_insn "*thumb2_movhi_insn" + [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r") + (match_operand:HI 1 "general_operand" "rI,n,r,m"))] +- "TARGET_THUMB2" ++ "TARGET_THUMB2 ++ && (register_operand (operands[0], HImode) ++ || register_operand (operands[1], HImode))" + "@ + mov%?\\t%0, %1\\t%@ movhi + movw%?\\t%0, %L1\\t%@ movhi |