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-rw-r--r--toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106755.patch120
1 files changed, 120 insertions, 0 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106755.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106755.patch
new file mode 100644
index 0000000000..b8f587c9f4
--- /dev/null
+++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.6/linaro/gcc-4.6-linaro-r106755.patch
@@ -0,0 +1,120 @@
+2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ Backport from mainline:
+ gcc/
+ 2011-06-02 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+ * config/arm/neon.md (orndi3_neon): Actually split it.
+
+
+2011-06-10 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ Backport from mainline.
+ gcc/
+ 2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ * config/arm/neon.md ("orn<mode>3_neon"): Canonicalize not.
+ ("orndi3_neon"): Likewise.
+ ("bic<mode>3_neon"): Likewise.
+
+ gcc/testsuite
+ 2011-05-26 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
+
+ * gcc.target/arm/neon-vorn-vbic.c: New test.
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md 2011-06-02 12:12:00 +0000
++++ new/gcc/config/arm/neon.md 2011-06-04 00:04:47 +0000
+@@ -783,30 +783,57 @@
+
+ (define_insn "orn<mode>3_neon"
+ [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+- (ior:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+- (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
++ (ior:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
++ (match_operand:VDQ 1 "s_register_operand" "w")))]
+ "TARGET_NEON"
+ "vorn\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+ [(set_attr "neon_type" "neon_int_1")]
+ )
+
+-(define_insn "orndi3_neon"
+- [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
+- (ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0")
+- (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))]
++;; TODO: investigate whether we should disable
++;; this and bicdi3_neon for the A8 in line with the other
++;; changes above.
++(define_insn_and_split "orndi3_neon"
++ [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r")
++ (ior:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,0,0,r"))
++ (match_operand:DI 1 "s_register_operand" "w,r,r,0")))]
+ "TARGET_NEON"
+ "@
+ vorn\t%P0, %P1, %P2
+ #
++ #
+ #"
+- [(set_attr "neon_type" "neon_int_1,*,*")
+- (set_attr "length" "*,8,8")]
++ "reload_completed &&
++ (TARGET_NEON && !(IS_VFP_REGNUM (REGNO (operands[0]))))"
++ [(set (match_dup 0) (ior:SI (not:SI (match_dup 2)) (match_dup 1)))
++ (set (match_dup 3) (ior:SI (not:SI (match_dup 4)) (match_dup 5)))]
++ "
++ {
++ if (TARGET_THUMB2)
++ {
++ operands[3] = gen_highpart (SImode, operands[0]);
++ operands[0] = gen_lowpart (SImode, operands[0]);
++ operands[4] = gen_highpart (SImode, operands[2]);
++ operands[2] = gen_lowpart (SImode, operands[2]);
++ operands[5] = gen_highpart (SImode, operands[1]);
++ operands[1] = gen_lowpart (SImode, operands[1]);
++ }
++ else
++ {
++ emit_insn (gen_one_cmpldi2 (operands[0], operands[2]));
++ emit_insn (gen_iordi3 (operands[0], operands[1], operands[0]));
++ DONE;
++ }
++ }"
++ [(set_attr "neon_type" "neon_int_1,*,*,*")
++ (set_attr "length" "*,16,8,8")
++ (set_attr "arch" "any,a,t2,t2")]
+ )
+
+ (define_insn "bic<mode>3_neon"
+ [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+- (and:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+- (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))))]
++ (and:VDQ (not:VDQ (match_operand:VDQ 2 "s_register_operand" "w"))
++ (match_operand:VDQ 1 "s_register_operand" "w")))]
+ "TARGET_NEON"
+ "vbic\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+ [(set_attr "neon_type" "neon_int_1")]
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c 1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vorn-vbic.c 2011-06-03 23:50:02 +0000
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2 -ftree-vectorize" } */
++/* { dg-add-options arm_neon } */
++
++void bor (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
++{
++ int i;
++ for (i = 0; i < 9; i++)
++ c[i] = b[i] | (~a[i]);
++}
++void bic (int *__restrict__ c, int *__restrict__ a, int *__restrict__ b)
++{
++ int i;
++ for (i = 0; i < 9; i++)
++ c[i] = b[i] & (~a[i]);
++}
++
++/* { dg-final { scan-assembler "vorn\\t" } } */
++/* { dg-final { scan-assembler "vbic\\t" } } */
+