diff options
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch')
| -rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch | 511 |
1 files changed, 0 insertions, 511 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch deleted file mode 100644 index 8ae781ecab..0000000000 --- a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch +++ /dev/null @@ -1,511 +0,0 @@ -2010-08-05 Julian Brown <julian@codesourcery.com> - - Backport from mainline (candidate patch): - - gcc/ - * expr.c (expand_assignment): Add assertion to prevent emitting null - rtx for movmisalign pattern. - (expand_expr_real_1): Likewise. - * config/arm/arm.c (arm_builtin_support_vector_misalignment): New. - (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): New. Use above. - (arm_vector_alignment_reachable): New. - (TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): New. Use above. - (neon_vector_mem_operand): Disallow PRE_DEC for misaligned loads. - (arm_print_operand): Include alignment qualifier in %A. - * config/arm/neon.md (UNSPEC_MISALIGNED_ACCESS): New constant. - (movmisalign<mode>): New expander. - (movmisalign<mode>_neon_store, movmisalign<mode>_neon_load): New - insn patterns. - - gcc/testsuite/ - * gcc.dg/vect/vect-42.c: Use vect_element_align instead of - vect_hw_misalign. - * gcc.dg/vect/vect-60.c: Likewise. - * gcc.dg/vect/vect-56.c: Likewise. - * gcc.dg/vect/vect-93.c: Likewise. - * gcc.dg/vect/no-scevccp-outer-8.c: Likewise. - * gcc.dg/vect/vect-95.c: Likewise. - * gcc.dg/vect/vect-96.c: Likewise. - * gcc.dg/vect/vect-outer-5.c: Use quad-word vectors when available. - * gcc.dg/vect/slp-25.c: Likewise. - * gcc.dg/vect/slp-3.c: Likewise. - * gcc.dg/vect/vect-multitypes-1.c: Likewise. - * gcc.dg/vect/no-vfa-pr29145.c: Likewise. - * gcc.dg/vect/vect-multitypes-4.c: Likewise. Use vect_element_align. - * gcc.dg/vect/vect-109.c: Likewise. - * gcc.dg/vect/vect-peel-1.c: Likewise. - * gcc.dg/vect/vect-peel-2.c: Likewise. - * lib/target-supports.exp - (check_effective_target_arm_vect_no_misalign): New. - (check_effective_target_vect_no_align): Use above. - (check_effective_target_vect_element_align): New. - (add_options_for_quad_vectors): New. - - 2010-08-05 Jie Zhang <jie@codesourcery.com> - - Issue #7257 - -=== modified file 'gcc/config/arm/arm.c' ---- old/gcc/config/arm/arm.c 2010-08-16 09:41:58 +0000 -+++ new/gcc/config/arm/arm.c 2010-08-20 16:21:01 +0000 -@@ -228,6 +228,11 @@ - static void arm_trampoline_init (rtx, tree, rtx); - static rtx arm_trampoline_adjust_address (rtx); - static rtx arm_pic_static_addr (rtx orig, rtx reg); -+static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); -+static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, -+ const_tree type, -+ int misalignment, -+ bool is_packed); - - - /* Table of machine attributes. */ -@@ -514,6 +519,14 @@ - #undef TARGET_CAN_ELIMINATE - #define TARGET_CAN_ELIMINATE arm_can_eliminate - -+#undef TARGET_VECTOR_ALIGNMENT_REACHABLE -+#define TARGET_VECTOR_ALIGNMENT_REACHABLE \ -+ arm_vector_alignment_reachable -+ -+#undef TARGET_SUPPORT_VECTOR_MISALIGNMENT -+#define TARGET_SUPPORT_VECTOR_MISALIGNMENT \ -+ arm_builtin_support_vector_misalignment -+ - struct gcc_target targetm = TARGET_INITIALIZER; - - /* Obstack for minipool constant handling. */ -@@ -9084,7 +9097,8 @@ - return arm_address_register_rtx_p (ind, 0); - - /* Allow post-increment with Neon registers. */ -- if (type != 1 && (GET_CODE (ind) == POST_INC || GET_CODE (ind) == PRE_DEC)) -+ if ((type != 1 && GET_CODE (ind) == POST_INC) -+ || (type == 0 && GET_CODE (ind) == PRE_DEC)) - return arm_address_register_rtx_p (XEXP (ind, 0), 0); - - /* FIXME: vld1 allows register post-modify. */ -@@ -16365,6 +16379,8 @@ - { - rtx addr; - bool postinc = FALSE; -+ unsigned align, modesize, align_bits; -+ - gcc_assert (GET_CODE (x) == MEM); - addr = XEXP (x, 0); - if (GET_CODE (addr) == POST_INC) -@@ -16372,7 +16388,29 @@ - postinc = 1; - addr = XEXP (addr, 0); - } -- asm_fprintf (stream, "[%r]", REGNO (addr)); -+ asm_fprintf (stream, "[%r", REGNO (addr)); -+ -+ /* We know the alignment of this access, so we can emit a hint in the -+ instruction (for some alignments) as an aid to the memory subsystem -+ of the target. */ -+ align = MEM_ALIGN (x) >> 3; -+ modesize = GET_MODE_SIZE (GET_MODE (x)); -+ -+ /* Only certain alignment specifiers are supported by the hardware. */ -+ if (modesize == 16 && (align % 32) == 0) -+ align_bits = 256; -+ else if ((modesize == 8 || modesize == 16) && (align % 16) == 0) -+ align_bits = 128; -+ else if ((align % 8) == 0) -+ align_bits = 64; -+ else -+ align_bits = 0; -+ -+ if (align_bits != 0) -+ asm_fprintf (stream, ", :%d", align_bits); -+ -+ asm_fprintf (stream, "]"); -+ - if (postinc) - fputs("!", stream); - } -@@ -22450,4 +22488,43 @@ - return !TARGET_THUMB1; - } - -+static bool -+arm_vector_alignment_reachable (const_tree type, bool is_packed) -+{ -+ /* Vectors which aren't in packed structures will not be less aligned than -+ the natural alignment of their element type, so this is safe. */ -+ if (TARGET_NEON && !BYTES_BIG_ENDIAN) -+ return !is_packed; -+ -+ return default_builtin_vector_alignment_reachable (type, is_packed); -+} -+ -+static bool -+arm_builtin_support_vector_misalignment (enum machine_mode mode, -+ const_tree type, int misalignment, -+ bool is_packed) -+{ -+ if (TARGET_NEON && !BYTES_BIG_ENDIAN) -+ { -+ HOST_WIDE_INT align = TYPE_ALIGN_UNIT (type); -+ -+ if (is_packed) -+ return align == 1; -+ -+ /* If the misalignment is unknown, we should be able to handle the access -+ so long as it is not to a member of a packed data structure. */ -+ if (misalignment == -1) -+ return true; -+ -+ /* Return true if the misalignment is a multiple of the natural alignment -+ of the vector's element type. This is probably always going to be -+ true in practice, since we've already established that this isn't a -+ packed access. */ -+ return ((misalignment % align) == 0); -+ } -+ -+ return default_builtin_support_vector_misalignment (mode, type, misalignment, -+ is_packed); -+} -+ - #include "gt-arm.h" - -=== modified file 'gcc/config/arm/neon.md' ---- old/gcc/config/arm/neon.md 2010-08-13 11:40:17 +0000 -+++ new/gcc/config/arm/neon.md 2010-08-20 16:21:01 +0000 -@@ -140,7 +140,8 @@ - (UNSPEC_VUZP1 201) - (UNSPEC_VUZP2 202) - (UNSPEC_VZIP1 203) -- (UNSPEC_VZIP2 204)]) -+ (UNSPEC_VZIP2 204) -+ (UNSPEC_MISALIGNED_ACCESS 205)]) - - ;; Double-width vector modes. - (define_mode_iterator VD [V8QI V4HI V2SI V2SF]) -@@ -660,6 +661,52 @@ - neon_disambiguate_copy (operands, dest, src, 4); - }) - -+(define_expand "movmisalign<mode>" -+ [(set (match_operand:VDQX 0 "nonimmediate_operand" "") -+ (unspec:VDQX [(match_operand:VDQX 1 "general_operand" "")] -+ UNSPEC_MISALIGNED_ACCESS))] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+{ -+ /* This pattern is not permitted to fail during expansion: if both arguments -+ are non-registers (e.g. memory := constant, which can be created by the -+ auto-vectorizer), force operand 1 into a register. */ -+ if (!s_register_operand (operands[0], <MODE>mode) -+ && !s_register_operand (operands[1], <MODE>mode)) -+ operands[1] = force_reg (<MODE>mode, operands[1]); -+}) -+ -+(define_insn "*movmisalign<mode>_neon_store" -+ [(set (match_operand:VDX 0 "memory_operand" "=Um") -+ (unspec:VDX [(match_operand:VDX 1 "s_register_operand" " w")] -+ UNSPEC_MISALIGNED_ACCESS))] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ "vst1.<V_sz_elem>\t{%P1}, %A0" -+ [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) -+ -+(define_insn "*movmisalign<mode>_neon_load" -+ [(set (match_operand:VDX 0 "s_register_operand" "=w") -+ (unspec:VDX [(match_operand:VDX 1 "memory_operand" " Um")] -+ UNSPEC_MISALIGNED_ACCESS))] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ "vld1.<V_sz_elem>\t{%P0}, %A1" -+ [(set_attr "neon_type" "neon_vld1_1_2_regs")]) -+ -+(define_insn "*movmisalign<mode>_neon_store" -+ [(set (match_operand:VQX 0 "memory_operand" "=Um") -+ (unspec:VQX [(match_operand:VQX 1 "s_register_operand" " w")] -+ UNSPEC_MISALIGNED_ACCESS))] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ "vst1.<V_sz_elem>\t{%q1}, %A0" -+ [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")]) -+ -+(define_insn "*movmisalign<mode>_neon_load" -+ [(set (match_operand:VQX 0 "s_register_operand" "=w") -+ (unspec:VQX [(match_operand:VQX 1 "memory_operand" " Um")] -+ UNSPEC_MISALIGNED_ACCESS))] -+ "TARGET_NEON && !BYTES_BIG_ENDIAN" -+ "vld1.<V_sz_elem>\t{%q0}, %A1" -+ [(set_attr "neon_type" "neon_vld1_1_2_regs")]) -+ - (define_insn "vec_set<mode>_internal" - [(set (match_operand:VD 0 "s_register_operand" "=w") - (vec_merge:VD - -=== modified file 'gcc/expr.c' ---- old/gcc/expr.c 2010-08-12 13:51:16 +0000 -+++ new/gcc/expr.c 2010-08-20 16:21:01 +0000 -@@ -4362,7 +4362,10 @@ - && op_mode1 != VOIDmode) - reg = copy_to_mode_reg (op_mode1, reg); - -- insn = GEN_FCN (icode) (mem, reg); -+ insn = GEN_FCN (icode) (mem, reg); -+ /* The movmisalign<mode> pattern cannot fail, else the assignment would -+ silently be omitted. */ -+ gcc_assert (insn != NULL_RTX); - emit_insn (insn); - return; - } -@@ -8742,6 +8745,7 @@ - - /* Nor can the insn generator. */ - insn = GEN_FCN (icode) (reg, temp); -+ gcc_assert (insn != NULL_RTX); - emit_insn (insn); - - return reg; - -=== modified file 'gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c' ---- old/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c 2009-06-05 14:28:50 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c 2010-08-20 16:21:01 +0000 -@@ -46,5 +46,5 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_hw_misalign } } } } } */ -+/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_element_align } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - -=== modified file 'gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c' ---- old/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c 2008-08-18 19:36:03 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" - -=== modified file 'gcc/testsuite/gcc.dg/vect/slp-25.c' ---- old/gcc/testsuite/gcc.dg/vect/slp-25.c 2009-10-27 11:46:07 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/slp-25.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" - -=== modified file 'gcc/testsuite/gcc.dg/vect/slp-3.c' ---- old/gcc/testsuite/gcc.dg/vect/slp-3.c 2009-05-12 13:05:28 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/slp-3.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include <stdio.h> - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-109.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-109.c 2010-07-10 20:38:32 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-109.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" -@@ -72,8 +73,8 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_hw_misalign } } } */ --/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 2 "vect" { xfail vect_hw_misalign } } } */ --/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 10 "vect" { target vect_hw_misalign } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_element_align } } } */ -+/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 2 "vect" { xfail vect_element_align } } } */ -+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 10 "vect" { target vect_element_align } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-42.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-42.c 2009-11-04 10:22:22 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-42.c 2010-08-20 16:21:01 +0000 -@@ -64,7 +64,7 @@ - - /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */ - /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target vect_no_align } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { ! vector_alignment_reachable } && { ! vect_hw_misalign } } } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { ! vector_alignment_reachable } && { ! vect_element_align } } } } } */ - /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || { ! vector_alignment_reachable } } } } } */ - /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || { ! vector_alignment_reachable } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-95.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-95.c 2009-10-27 11:46:07 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-95.c 2010-08-20 16:21:01 +0000 -@@ -56,14 +56,14 @@ - } - - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail {vect_hw_misalign} } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail {vect_element_align} } } } */ - - /* For targets that support unaligned loads we version for the two unaligned - stores and generate misaligned accesses for the loads. For targets that - don't support unaligned loads we version for all four accesses. */ - --/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_hw_misalign} } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ -+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align} } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */ - /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target vect_no_align } } } */ - /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target vect_no_align } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-96.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-96.c 2009-10-27 11:46:07 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-96.c 2010-08-20 16:21:01 +0000 -@@ -45,5 +45,5 @@ - /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */ - /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_no_align} && vector_alignment_reachable } } } } */ - /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || {! vector_alignment_reachable} } } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align || { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align || { {! vector_alignment_reachable} && {! vect_element_align} } } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c 2009-10-27 11:46:07 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" -@@ -78,11 +79,11 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_hw_misalign} } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_hw_misalign} } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_element_align} } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_element_align} } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */ - /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ -+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c 2009-10-27 11:46:07 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_int } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdarg.h> - #include "tree-vect.h" -@@ -85,11 +86,11 @@ - return 0; - } - --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_hw_misalign} } } } */ --/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_hw_misalign} } } } */ --/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_element_align} } } } */ -+/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_element_align} } } } */ -+/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */ - /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 8 "vect" { xfail *-*-* } } } */ --/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */ -+/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || vect_element_align } } } } */ - /* { dg-final { cleanup-tree-dump "vect" } } */ - - -=== modified file 'gcc/testsuite/gcc.dg/vect/vect-outer-5.c' ---- old/gcc/testsuite/gcc.dg/vect/vect-outer-5.c 2009-05-08 12:39:01 +0000 -+++ new/gcc/testsuite/gcc.dg/vect/vect-outer-5.c 2010-08-20 16:21:01 +0000 -@@ -1,4 +1,5 @@ - /* { dg-require-effective-target vect_float } */ -+/* { dg-add-options quad_vectors } */ - - #include <stdio.h> - #include <stdarg.h> - -=== modified file 'gcc/testsuite/lib/target-supports.exp' ---- old/gcc/testsuite/lib/target-supports.exp 2010-08-10 13:31:21 +0000 -+++ new/gcc/testsuite/lib/target-supports.exp 2010-08-20 16:21:01 +0000 -@@ -1642,6 +1642,18 @@ - }] - } - -+# Return 1 if this is an ARM target that only supports aligned vector accesses -+proc check_effective_target_arm_vect_no_misalign { } { -+ return [check_no_compiler_messages arm_vect_no_misalign assembly { -+ #if !defined(__arm__) \ -+ || (defined(__ARMEL__) \ -+ && (!defined(__thumb__) || defined(__thumb2__))) -+ #error FOO -+ #endif -+ }] -+} -+ -+ - # Return 1 if this is an ARM target supporting -mfpu=vfp - # -mfloat-abi=softfp. Some multilibs may be incompatible with these - # options. -@@ -2547,7 +2559,7 @@ - if { [istarget mipsisa64*-*-*] - || [istarget sparc*-*-*] - || [istarget ia64-*-*] -- || [check_effective_target_arm32] } { -+ || [check_effective_target_arm_vect_no_misalign] } { - set et_vect_no_align_saved 1 - } - } -@@ -2682,6 +2694,25 @@ - return $et_vector_alignment_reachable_for_64bit_saved - } - -+# Return 1 if the target only requires element alignment for vector accesses -+ -+proc check_effective_target_vect_element_align { } { -+ global et_vect_element_align -+ -+ if [info exists et_vect_element_align] { -+ verbose "check_effective_target_vect_element_align: using cached result" 2 -+ } else { -+ set et_vect_element_align 0 -+ if { [istarget arm*-*-*] -+ || [check_effective_target_vect_hw_misalign] } { -+ set et_vect_element_align 1 -+ } -+ } -+ -+ verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2 -+ return $et_vect_element_align -+} -+ - # Return 1 if the target supports vector conditional operations, 0 otherwise. - - proc check_effective_target_vect_condition { } { -@@ -3239,6 +3270,16 @@ - return $flags - } - -+# Add to FLAGS the flags needed to enable 128-bit vectors. -+ -+proc add_options_for_quad_vectors { flags } { -+ if [is-effective-target arm_neon_ok] { -+ return "$flags -mvectorize-with-neon-quad" -+ } -+ -+ return $flags -+} -+ - # Return 1 if the target provides a full C99 runtime. - - proc check_effective_target_c99_runtime { } { - |