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-rw-r--r--toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch548
1 files changed, 0 insertions, 548 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
deleted file mode 100644
index aa3b3eb85f..0000000000
--- a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
+++ /dev/null
@@ -1,548 +0,0 @@
-2010-07-26 Julian Brown <julian@codesourcery.com>
-
- Merge from Sourcery G++ 4.4:
-
- Jie Zhang <jie@codesourcery.com>
- Issue #7122
-
- gcc/
- * config/arm/arm.c (arm_rtx_costs_1): Adjust cost for
- CONST_VECTOR.
- (arm_size_rtx_costs): Likewise.
- (thumb2_size_rtx_costs): Likewise.
- (neon_valid_immediate): Add a case for double 0.0.
-
- gcc/testsuite/
- * gcc.target/arm/neon-vdup-1.c: New test case.
- * gcc.target/arm/neon-vdup-2.c: New test case.
- * gcc.target/arm/neon-vdup-3.c: New test case.
- * gcc.target/arm/neon-vdup-4.c: New test case.
- * gcc.target/arm/neon-vdup-5.c: New test case.
- * gcc.target/arm/neon-vdup-6.c: New test case.
- * gcc.target/arm/neon-vdup-7.c: New test case.
- * gcc.target/arm/neon-vdup-8.c: New test case.
- * gcc.target/arm/neon-vdup-9.c: New test case.
- * gcc.target/arm/neon-vdup-10.c: New test case.
- * gcc.target/arm/neon-vdup-11.c: New test case.
- * gcc.target/arm/neon-vdup-12.c: New test case.
- * gcc.target/arm/neon-vdup-13.c: New test case.
- * gcc.target/arm/neon-vdup-14.c: New test case.
- * gcc.target/arm/neon-vdup-15.c: New test case.
- * gcc.target/arm/neon-vdup-16.c: New test case.
- * gcc.target/arm/neon-vdup-17.c: New test case.
- * gcc.target/arm/neon-vdup-18.c: New test case.
- * gcc.target/arm/neon-vdup-19.c: New test case.
-
-
-=== modified file 'gcc/config/arm/arm.c'
---- old/gcc/config/arm/arm.c 2010-08-13 10:55:28 +0000
-+++ new/gcc/config/arm/arm.c 2010-08-13 11:02:47 +0000
-@@ -7061,6 +7061,17 @@
- *total = COSTS_N_INSNS (4);
- return true;
-
-+ case CONST_VECTOR:
-+ if (TARGET_NEON
-+ && TARGET_HARD_FLOAT
-+ && outer == SET
-+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
-+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
-+ *total = COSTS_N_INSNS (1);
-+ else
-+ *total = COSTS_N_INSNS (4);
-+ return true;
-+
- default:
- *total = COSTS_N_INSNS (4);
- return false;
-@@ -7301,6 +7312,17 @@
- *total = COSTS_N_INSNS (4);
- return true;
-
-+ case CONST_VECTOR:
-+ if (TARGET_NEON
-+ && TARGET_HARD_FLOAT
-+ && outer_code == SET
-+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
-+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
-+ *total = COSTS_N_INSNS (1);
-+ else
-+ *total = COSTS_N_INSNS (4);
-+ return true;
-+
- case HIGH:
- case LO_SUM:
- /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
-@@ -7647,6 +7669,17 @@
- *total = COSTS_WIDE_INSNS (4);
- return true;
-
-+ case CONST_VECTOR:
-+ if (TARGET_NEON
-+ && TARGET_HARD_FLOAT
-+ && outer_code == SET
-+ && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
-+ && neon_immediate_valid_for_move (x, mode, NULL, NULL))
-+ *total = COSTS_WIDE_INSNS (1);
-+ else
-+ *total = COSTS_WIDE_INSNS (4);
-+ return true;
-+
- case HIGH:
- case LO_SUM:
- /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
-@@ -8315,11 +8348,14 @@
- vmov i64 17 aaaaaaaa bbbbbbbb cccccccc dddddddd
- eeeeeeee ffffffff gggggggg hhhhhhhh
- vmov f32 18 aBbbbbbc defgh000 00000000 00000000
-+ vmov f32 19 00000000 00000000 00000000 00000000
-
- For case 18, B = !b. Representable values are exactly those accepted by
- vfp3_const_double_index, but are output as floating-point numbers rather
- than indices.
-
-+ For case 19, we will change it to vmov.i32 when assembling.
-+
- Variants 0-5 (inclusive) may also be used as immediates for the second
- operand of VORR/VBIC instructions.
-
-@@ -8362,7 +8398,7 @@
- rtx el0 = CONST_VECTOR_ELT (op, 0);
- REAL_VALUE_TYPE r0;
-
-- if (!vfp3_const_double_rtx (el0))
-+ if (!vfp3_const_double_rtx (el0) && el0 != CONST0_RTX (GET_MODE (el0)))
- return -1;
-
- REAL_VALUE_FROM_CONST_DOUBLE (r0, el0);
-@@ -8384,7 +8420,10 @@
- if (elementwidth)
- *elementwidth = 0;
-
-- return 18;
-+ if (el0 == CONST0_RTX (GET_MODE (el0)))
-+ return 19;
-+ else
-+ return 18;
- }
-
- /* Splat vector constant out into a byte vector. */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-1.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-1.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-1.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+float32x4_t out_float32x4_t;
-+void test_vdupq_nf32 (void)
-+{
-+ out_float32x4_t = vdupq_n_f32 (0.0);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #0\.0\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-10.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-10.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-10.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x12000000);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #3992977407\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-11.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-11.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-11.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint16x8_t out_uint16x8_t;
-+void test_vdupq_nu16 (void)
-+{
-+ out_uint16x8_t = vdupq_n_u16 (0x12);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-12.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-12.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-12.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint16x8_t out_uint16x8_t;
-+void test_vdupq_nu16 (void)
-+{
-+ out_uint16x8_t = vdupq_n_u16 (0x1200);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-13.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-13.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-13.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint16x8_t out_uint16x8_t;
-+void test_vdupq_nu16 (void)
-+{
-+ out_uint16x8_t = vdupq_n_u16 (~0x12);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #65517\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-14.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-14.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-14.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint16x8_t out_uint16x8_t;
-+void test_vdupq_nu16 (void)
-+{
-+ out_uint16x8_t = vdupq_n_u16 (~0x1200);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i16\[ \]+\[qQ\]\[0-9\]+, #60927\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-15.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-15.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-15.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u8' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint8x16_t out_uint8x16_t;
-+void test_vdupq_nu8 (void)
-+{
-+ out_uint8x16_t = vdupq_n_u8 (0x12);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i8\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-16.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-16.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-16.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x12ff);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4863\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-17.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-17.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-17.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x12ffff);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1245183\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-18.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-18.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-18.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x12ff);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962432\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-19.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-19.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-19.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x12ffff);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293722112\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-2.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-2.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-2.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+float32x4_t out_float32x4_t;
-+void test_vdupq_nf32 (void)
-+{
-+ out_float32x4_t = vdupq_n_f32 (0.125);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.f32\[ \]+\[qQ\]\[0-9\]+, #1\.25e-1\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-3.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-3.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-3.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x12);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-4.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-4.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-4.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x1200);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-5.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-5.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-5.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x120000);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #1179648\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-6.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-6.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-6.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (0x12000000);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #301989888\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-7.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-7.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-7.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x12);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294967277\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-8.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-8.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-8.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x1200);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4294962687\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
-=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-9.c'
---- old/gcc/testsuite/gcc.target/arm/neon-vdup-9.c 1970-01-01 00:00:00 +0000
-+++ new/gcc/testsuite/gcc.target/arm/neon-vdup-9.c 2010-08-13 11:02:47 +0000
-@@ -0,0 +1,17 @@
-+/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic. */
-+
-+/* { dg-do compile } */
-+/* { dg-require-effective-target arm_neon_ok } */
-+/* { dg-options "-O2" } */
-+/* { dg-add-options arm_neon } */
-+
-+#include <arm_neon.h>
-+
-+uint32x4_t out_uint32x4_t;
-+void test_vdupq_nu32 (void)
-+{
-+ out_uint32x4_t = vdupq_n_u32 (~0x120000);
-+}
-+
-+/* { dg-final { scan-assembler "vmov\.i32\[ \]+\[qQ\]\[0-9\]+, #4293787647\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
-+/* { dg-final { cleanup-saved-temps } } */
-
generated by cgit 1.2.3-korg (git 2.39.0) at 2024-04-28 07:35:26 +0000