582 files changed, 161238 insertions, 0 deletions

diff --git a/meta-oe/COPYING.MIT b/meta-oe/COPYING.MIT
new file mode 100644
index 0000000000..fb950dc69f
--- /dev/null
+++ b/meta-oe/COPYING.MIT
@@ -0,0 +1,17 @@
+Permission is hereby granted, free of charge, to any person obtaining a copy 
+of this software and associated documentation files (the "Software"), to deal 
+in the Software without restriction, including without limitation the rights 
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 
+copies of the Software, and to permit persons to whom the Software is 
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in 
+all copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 
+THE SOFTWARE.
diff --git a/meta-oe/README b/meta-oe/README
new file mode 100644
index 0000000000..b7fd05dd49
--- /dev/null
+++ b/meta-oe/README
@@ -0,0 +1,7 @@
+This layer depends on:
+
+URI: git://git.pokylinux.org/poky
+branch: master
+revision: HEAD
+
+
diff --git a/meta-oe/classes/gnome.bbclass b/meta-oe/classes/gnome.bbclass
new file mode 100644
index 0000000000..0a32a7796d
--- /dev/null
+++ b/meta-oe/classes/gnome.bbclass
@@ -0,0 +1,4 @@
+inherit gnomebase gtk-icon-cache gconf mime
+
+EXTRA_OECONF += "--enable-introspection=no"
+BBCLASSEXTEND += "native"
diff --git a/meta-oe/classes/gnomebase.bbclass b/meta-oe/classes/gnomebase.bbclass
new file mode 100644
index 0000000000..b50504f983
--- /dev/null
+++ b/meta-oe/classes/gnomebase.bbclass
@@ -0,0 +1,30 @@
+def gnome_verdir(v):
+	import re
+	m = re.match("^([0-9]+)\.([0-9]+)", v)
+	return "%s.%s" % (m.group(1), m.group(2))
+
+SECTION ?= "x11/gnome"
+SRC_URI = "${GNOME_MIRROR}/${BPN}/${@gnome_verdir("${PV}")}/${BPN}-${PV}.tar.bz2;name=archive"
+
+DEPENDS += "gnome-common"
+
+FILES_${PN} += "${datadir}/application-registry  \
+	${datadir}/mime-info \
+	${datadir}/mime/packages \	
+	${datadir}/mime/application \
+	${datadir}/gnome-2.0 \
+	${datadir}/polkit* \
+"
+
+FILES_${PN}-doc += "${datadir}/devhelp"
+
+inherit autotools pkgconfig
+
+AUTOTOOLS_STAGE_PKGCONFIG = "1"
+
+do_install_append() {
+	rm -rf ${D}${localstatedir}/lib/scrollkeeper/*
+	rm -rf ${D}${localstatedir}/scrollkeeper/*
+	rm -f ${D}${datadir}/applications/*.cache
+}
+
diff --git a/meta-oe/classes/kernel.bbclass b/meta-oe/classes/kernel.bbclass
new file mode 100644
index 0000000000..13670f6674
--- /dev/null
+++ b/meta-oe/classes/kernel.bbclass
@@ -0,0 +1,560 @@
+inherit linux-kernel-base module_strip
+
+PROVIDES += "virtual/kernel"
+DEPENDS += "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}depmod-${@get_kernelmajorversion('${PV}')} virtual/${TARGET_PREFIX}gcc${KERNEL_CCSUFFIX} update-modules"
+
+# we include gcc above, we dont need virtual/libc
+INHIBIT_DEFAULT_DEPS = "1"
+
+KERNEL_IMAGETYPE ?= "zImage"
+
+python __anonymous () {
+    kerneltype = bb.data.getVar('KERNEL_IMAGETYPE', d, 1) or ''
+    if kerneltype == 'uImage':
+    	depends = bb.data.getVar("DEPENDS", d, 1)
+    	depends = "%s u-boot-mkimage-native" % depends
+    	bb.data.setVar("DEPENDS", depends, d)
+
+    image = bb.data.getVar('INITRAMFS_IMAGE', d, True)
+    if image != '' and image is not None:
+        bb.data.setVar('INITRAMFS_TASK', '${INITRAMFS_IMAGE}:do_rootfs', d)
+
+    machine_kernel_pr = bb.data.getVar('MACHINE_KERNEL_PR', d, True)
+
+    if machine_kernel_pr:
+       bb.data.setVar('PR', machine_kernel_pr, d)
+}
+
+INITRAMFS_IMAGE ?= ""
+INITRAMFS_TASK ?= ""
+
+inherit kernel-arch deploy
+
+PACKAGES_DYNAMIC += "kernel-module-*"
+PACKAGES_DYNAMIC += "kernel-image-*"
+PACKAGES_DYNAMIC += "kernel-firmware-*"
+
+export OS = "${TARGET_OS}"
+export CROSS_COMPILE = "${TARGET_PREFIX}"
+
+KERNEL_PRIORITY = "${@bb.data.getVar('PV',d,1).split('-')[0].split('.')[-1]}"
+
+KERNEL_RELEASE ?= "${KERNEL_VERSION}"
+
+KERNEL_CCSUFFIX ?= ""
+KERNEL_LDSUFFIX ?= ""
+
+# Set TARGET_??_KERNEL_ARCH in the machine .conf to set architecture
+# specific options necessary for building the kernel and modules.
+#FIXME: should be this: TARGET_CC_KERNEL_ARCH ?= "${TARGET_CC_ARCH}"
+TARGET_CC_KERNEL_ARCH ?= ""
+HOST_CC_KERNEL_ARCH ?= "${TARGET_CC_KERNEL_ARCH}"
+TARGET_LD_KERNEL_ARCH ?= ""
+HOST_LD_KERNEL_ARCH ?= "${TARGET_LD_KERNEL_ARCH}"
+
+KERNEL_CC = "${CCACHE}${HOST_PREFIX}gcc${KERNEL_CCSUFFIX} ${HOST_CC_KERNEL_ARCH}${TOOLCHAIN_OPTIONS}"
+KERNEL_LD = "${LD}${KERNEL_LDSUFFIX} ${HOST_LD_KERNEL_ARCH}${TOOLCHAIN_OPTIONS}"
+
+# Where built kernel lies in the kernel tree
+KERNEL_OUTPUT ?= "arch/${ARCH}/boot/${KERNEL_IMAGETYPE}"
+KERNEL_IMAGEDEST = "boot"
+
+#
+# configuration
+#
+export CMDLINE_CONSOLE = "console=${@bb.data.getVar("KERNEL_CONSOLE",d,1) or "ttyS0"}"
+
+KERNEL_VERSION = "${@get_kernelversion('${B}')}"
+KERNEL_MAJOR_VERSION = "${@get_kernelmajorversion('${KERNEL_VERSION}')}"
+
+KERNEL_LOCALVERSION ?= ""
+
+# kernels are generally machine specific
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+
+# U-Boot support
+UBOOT_ENTRYPOINT ?= "20008000"
+UBOOT_LOADADDRESS ?= "${UBOOT_ENTRYPOINT}"
+
+# For the kernel, we don't want the '-e MAKEFLAGS=' in EXTRA_OEMAKE.
+# We don't want to override kernel Makefile variables from the environment
+EXTRA_OEMAKE = ""
+
+KERNEL_ALT_IMAGETYPE ??= ""
+
+kernel_do_compile() {
+	unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS MACHINE
+	oe_runmake include/linux/version.h CC="${KERNEL_CC}" LD="${KERNEL_LD}"
+	if [ "${KERNEL_MAJOR_VERSION}" != "2.6" ]; then
+		oe_runmake dep CC="${KERNEL_CC}" LD="${KERNEL_LD}"
+	fi
+	oe_runmake ${KERNEL_IMAGETYPE} ${KERNEL_ALT_IMAGETYPE} CC="${KERNEL_CC}" LD="${KERNEL_LD}"
+}
+
+do_compile_kernelmodules() {
+	unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS MACHINE
+	if (grep -q -i -e '^CONFIG_MODULES=y$' .config); then
+		oe_runmake modules  CC="${KERNEL_CC}" LD="${KERNEL_LD}"
+	else
+		oenote "no modules to compile"
+	fi
+}
+addtask compile_kernelmodules after do_compile before do_install
+
+kernel_do_install() {
+	#
+	# First install the modules
+	#
+	unset CFLAGS CPPFLAGS CXXFLAGS LDFLAGS MACHINE
+	if (grep -q -i -e '^CONFIG_MODULES=y$' .config); then
+		oe_runmake DEPMOD=echo INSTALL_MOD_PATH="${D}" modules_install
+	else
+		oenote "no modules to install"
+	fi
+
+	#
+	# Install various kernel output (zImage, map file, config, module support files)
+	#	
+	install -d ${D}/${KERNEL_IMAGEDEST}
+	install -d ${D}/boot
+	install -m 0644 ${KERNEL_OUTPUT} ${D}/${KERNEL_IMAGEDEST}/${KERNEL_IMAGETYPE}-${KERNEL_VERSION}
+	install -m 0644 System.map ${D}/boot/System.map-${KERNEL_VERSION}
+	install -m 0644 .config ${D}/boot/config-${KERNEL_VERSION}
+	install -m 0644 vmlinux ${D}/boot/vmlinux-${KERNEL_VERSION}
+	[ -e Module.symvers ] && install -m 0644 Module.symvers ${D}/boot/Module.symvers-${KERNEL_VERSION}
+	install -d ${D}/etc/modutils
+	if [ "${KERNEL_MAJOR_VERSION}" = "2.6" ]; then
+		install -d ${D}/etc/modprobe.d
+	fi
+
+
+
+	#
+	# Support for external module building - create a minimal copy of the kernel source tree
+	#
+	kerneldir=${D}/kernel/
+
+	# Take care of arch specific headers	
+	# Kernel 2.6.27 moved headers from includes/asm-${ARCH} to arch/${ARCH}/include/asm
+	if [ -e arch/${ARCH}/include/asm/ ] ; then 
+		install -d $kerneldir/arch/${ARCH}/
+		cp -fR arch/${ARCH}/* $kerneldir/arch/${ARCH}/
+
+	# Check for arch/x86 on i386
+	elif [ -d arch/x86/include/asm/ ]; then
+		if [ -e include/asm ] ; then
+			install -d $kerneldir/include/asm/
+			cp -fR arch/x86/include/asm/* $kerneldir/include/asm/
+		fi
+		install -d $kerneldir/arch/x86/include
+		cp -fR arch/x86/* $kerneldir/arch/x86/
+	fi
+
+	# Take care of the rest of the main directories we need
+	for entry in drivers/crypto drivers/media include scripts; do
+		if [ -d $entry ]; then
+			mkdir -p $kerneldir/$entry
+			cp -fR $entry/* $kerneldir/$entry/
+		fi
+	done
+
+	install -m 0644 .config $kerneldir/config-${KERNEL_VERSION}
+	ln -sf config-${KERNEL_VERSION} $kerneldir/.config
+	ln -sf config-${KERNEL_VERSION} $kerneldir/kernel-config
+	echo "${KERNEL_VERSION}" >$kerneldir/kernel-abiversion
+	echo "${S}" >$kerneldir/kernel-source
+	echo "${KERNEL_CCSUFFIX}" >$kerneldir/kernel-ccsuffix
+	echo "${KERNEL_LDSUFFIX}" >$kerneldir/kernel-ldsuffix
+	[ -e vmlinux ] && install -m 0644 vmlinux $kerneldir/	
+	install -m 0644 ${KERNEL_OUTPUT} $kerneldir/${KERNEL_IMAGETYPE}
+	install -m 0644 System.map $kerneldir/System.map-${KERNEL_VERSION}
+	[ -e Module.symvers ] && install -m 0644 Module.symvers $kerneldir/
+
+	# Copy over the main Makefiles
+	[ -e Rules.make ] && install -m 0644 Rules.make $kerneldir/
+	[ -e Makefile ] && install -m 0644 Makefile $kerneldir/
+	# Check if arch/${ARCH}/Makefile exists and install it
+	if [ -e arch/${ARCH}/Makefile ]; then
+		install -d $kerneldir/arch/${ARCH}
+		install -m 0644 arch/${ARCH}/Makefile* $kerneldir/arch/${ARCH}
+	# Otherwise check arch/x86/Makefile for i386 and x86_64 on kernels >= 2.6.24
+	elif [ -e arch/x86/Makefile ]; then
+		install -d $kerneldir/arch/x86
+		install -m 0644 arch/x86/Makefile* $kerneldir/arch/x86
+	fi
+
+	# Remove the following binaries which cause strip errors
+	# during do_package for cross-compiled platforms
+	bin_files="arch/powerpc/boot/addnote arch/powerpc/boot/hack-coff \
+		arch/powerpc/boot/mktree scripts/bin2c scripts/conmakehash \
+		scripts/ihex2fw scripts/kallsyms scripts/pnmtologo scripts/basic/docproc \
+		scripts/basic/fixdep scripts/basic/hash scripts/dtc/dtc \
+		scripts/genksyms/genksyms scripts/kconfig/conf scripts/mod/mk_elfconfig \
+		scripts/mod/modpost scripts/recordmcount"
+	rm -rf $kerneldir/scripts/*.o
+	rm -rf $kerneldir/scripts/basic/*.o
+	rm -rf $kerneldir/scripts/kconfig/*.o
+	rm -rf $kerneldir/scripts/mod/*.o
+	rm -rf $kerneldir/scripts/dtc/*.o
+	for entry in $bin_files; do
+		rm -f $kerneldir/$entry
+	done	
+}
+
+sysroot_stage_all_append() {
+	sysroot_stage_dir ${D}/kernel ${SYSROOT_DESTDIR}/kernel
+}
+
+
+kernel_do_configure() {
+	# Copy defconfig to .config if .config does not exist. This allows
+	# recipes to manage the .config themselves in do_configure_prepend().
+	if [ -f "${WORKDIR}/defconfig" ] && [ ! -f "${S}/.config" ]; then
+		cp "${WORKDIR}/defconfig" "${S}/.config"
+	fi
+
+	yes '' | oe_runmake oldconfig
+
+	if [ ! -z "${INITRAMFS_IMAGE}" ]; then
+		for img in cpio.gz cpio.lzo cpio.lzma; do
+		if [ -e "${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE}-${MACHINE}.$img" ]; then
+			cp "${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE}-${MACHINE}.$img" initramfs.$img
+		fi
+		done
+	fi
+}
+
+kernel_do_configure[depends] += "${INITRAMFS_TASK}"
+
+do_menuconfig() {
+        export DISPLAY='${DISPLAY}'
+        export DBUS_SESSION_BUS_ADDRESS='${DBUS_SESSION_BUS_ADDRESS}'
+        export XAUTHORITY='${XAUTHORITY}'
+	export TERMWINDOWTITLE="${PN} Kernel Configuration"
+	export SHELLCMDS="make menuconfig"
+	${TERMCMDRUN}
+	if [ $? -ne 0 ]; then
+		echo "Fatal: '${TERMCMD}' not found. Check TERMCMD variable."
+		exit 1
+	fi
+}
+do_menuconfig[nostamp] = "1"
+addtask menuconfig after do_patch
+
+pkg_postinst_kernel () {
+	cd /${KERNEL_IMAGEDEST}; update-alternatives --install /${KERNEL_IMAGEDEST}/${KERNEL_IMAGETYPE} ${KERNEL_IMAGETYPE} ${KERNEL_IMAGETYPE}-${KERNEL_VERSION} ${KERNEL_PRIORITY} || true
+}
+
+pkg_postrm_kernel () {
+	cd /${KERNEL_IMAGEDEST}; update-alternatives --remove ${KERNEL_IMAGETYPE} ${KERNEL_IMAGETYPE}-${KERNEL_VERSION} || true
+}
+
+inherit cml1
+
+EXPORT_FUNCTIONS do_compile do_install do_configure
+
+# kernel-base becomes kernel-${KERNEL_VERSION}
+# kernel-image becomes kernel-image-${KERNEL_VERISON}
+PACKAGES = "kernel kernel-base kernel-image kernel-dev kernel-vmlinux kernel-misc"
+FILES = ""
+FILES_kernel-image = "/boot/${KERNEL_IMAGETYPE}*"
+FILES_kernel-dev = "/boot/System.map* /boot/Module.symvers* /boot/config*"
+FILES_kernel-vmlinux = "/boot/vmlinux*"
+# misc is a package to contain files we need in staging
+FILES_kernel-misc = "/kernel/include/config /kernel/scripts /kernel/drivers/crypto /kernel/drivers/media"
+RDEPENDS_kernel = "kernel-base"
+# Allow machines to override this dependency if kernel image files are 
+# not wanted in images as standard
+RDEPENDS_kernel-base ?= "kernel-image"
+PKG_kernel-image = "kernel-image-${KERNEL_VERSION}"
+PKG_kernel-base = "kernel-${KERNEL_VERSION}"
+ALLOW_EMPTY_kernel = "1"
+ALLOW_EMPTY_kernel-base = "1"
+ALLOW_EMPTY_kernel-image = "1"
+
+# Userspace workarounds for kernel modules issues
+# This is shame, fix the kernel instead!
+DEPENDS_kernel-module-dtl1-cs = "bluez-dtl1-workaround"
+RDEPENDS_kernel-module-dtl1-cs = "bluez-dtl1-workaround"
+
+pkg_postinst_kernel-image () {
+if [ ! -e "$D/lib/modules/${KERNEL_VERSION}" ]; then
+	mkdir -p $D/lib/modules/${KERNEL_VERSION}
+fi
+if [ -n "$D" ]; then
+	${HOST_PREFIX}depmod-${KERNEL_MAJOR_VERSION} -A -b $D -F ${STAGING_KERNEL_DIR}/System.map-${KERNEL_VERSION} ${KERNEL_VERSION}
+else
+	depmod -a
+fi
+}
+
+pkg_postinst_modules () {
+if [ -n "$D" ]; then
+	${HOST_PREFIX}depmod-${KERNEL_MAJOR_VERSION} -A -b $D -F ${STAGING_KERNEL_DIR}/System.map-${KERNEL_VERSION} ${KERNEL_VERSION}
+else
+	depmod -a
+	update-modules || true
+fi
+}
+
+pkg_postrm_modules () {
+update-modules || true
+}
+
+autoload_postinst_fragment() {
+if [ x"$D" = "x" ]; then
+	modprobe %s || true
+fi
+}
+
+# autoload defaults (alphabetically sorted)
+module_autoload_hidp = "hidp"
+module_autoload_ipv6 = "ipv6"
+module_autoload_ipsec = "ipsec"
+module_autoload_ircomm-tty = "ircomm-tty"
+module_autoload_rfcomm = "rfcomm"
+module_autoload_sa1100-rtc = "sa1100-rtc"
+# sa1100-rtc was renamed in 2.6.23 onwards
+module_autoload_rtc-sa1100 = "rtc-sa1100"
+
+# alias defaults (alphabetically sorted)
+module_conf_af_packet = "alias net-pf-17 af_packet"
+module_conf_bluez = "alias net-pf-31 bluez"
+module_conf_bnep = "alias bt-proto-4 bnep"
+module_conf_hci_uart = "alias tty-ldisc-15 hci_uart"
+module_conf_l2cap = "alias bt-proto-0 l2cap"
+module_conf_sco = "alias bt-proto-2 sco"
+module_conf_rfcomm = "alias bt-proto-3 rfcomm"
+
+python populate_packages_prepend () {
+	def extract_modinfo(file):
+		import tempfile, re
+		tempfile.tempdir = bb.data.getVar("WORKDIR", d, 1)
+		tf = tempfile.mkstemp()
+		tmpfile = tf[1]
+		cmd = "PATH=\"%s\" %sobjcopy -j .modinfo -O binary %s %s" % (bb.data.getVar("PATH", d, 1), bb.data.getVar("HOST_PREFIX", d, 1) or "", file, tmpfile)
+		os.system(cmd)
+		f = open(tmpfile)
+		l = f.read().split("\000")
+		f.close()
+		os.close(tf[0])
+		os.unlink(tmpfile)
+		exp = re.compile("([^=]+)=(.*)")
+		vals = {}
+		for i in l:
+			m = exp.match(i)
+			if not m:
+				continue
+			vals[m.group(1)] = m.group(2)
+		return vals
+	
+	def parse_depmod():
+		import re
+
+		dvar = bb.data.getVar('PKGD', d, 1)
+		if not dvar:
+			bb.error("PKGD not defined")
+			return
+
+		kernelver = bb.data.getVar('KERNEL_VERSION', d, 1)
+		kernelver_stripped = kernelver
+		m = re.match('^(.*-hh.*)[\.\+].*$', kernelver)
+		if m:
+			kernelver_stripped = m.group(1)
+		path = bb.data.getVar("PATH", d, 1)
+		host_prefix = bb.data.getVar("HOST_PREFIX", d, 1) or ""
+		major_version = bb.data.getVar('KERNEL_MAJOR_VERSION', d, 1)
+
+		cmd = "PATH=\"%s\" %sdepmod-%s -n -a -r -b %s -F %s/boot/System.map-%s %s" % (path, host_prefix, major_version, dvar, dvar, kernelver, kernelver_stripped)
+		f = os.popen(cmd, 'r')
+
+		deps = {}
+		pattern0 = "^(.*\.k?o):..*$"
+		pattern1 = "^(.*\.k?o):\s*(.*\.k?o)\s*$"
+		pattern2 = "^(.*\.k?o):\s*(.*\.k?o)\s*\\\$"
+		pattern3 = "^\t(.*\.k?o)\s*\\\$"
+		pattern4 = "^\t(.*\.k?o)\s*$"
+
+		line = f.readline()
+		while line:
+			if not re.match(pattern0, line):
+				line = f.readline()
+				continue
+			m1 = re.match(pattern1, line)
+			if m1:
+				deps[m1.group(1)] = m1.group(2).split()
+			else:
+				m2 = re.match(pattern2, line)
+				if m2:
+					deps[m2.group(1)] = m2.group(2).split()
+					line = f.readline()
+					m3 = re.match(pattern3, line)
+					while m3:
+						deps[m2.group(1)].extend(m3.group(1).split())
+						line = f.readline()
+						m3 = re.match(pattern3, line)
+					m4 = re.match(pattern4, line)
+					deps[m2.group(1)].extend(m4.group(1).split())
+			line = f.readline()
+		f.close()
+		return deps
+	
+	def get_dependencies(file, pattern, format):
+                # file no longer includes PKGD
+		file = file.replace(bb.data.getVar('PKGD', d, 1) or '', '', 1)
+                # instead is prefixed with /lib/modules/${KERNEL_VERSION}
+                file = file.replace("/lib/modules/%s/" % bb.data.getVar('KERNEL_VERSION', d, 1) or '', '', 1)
+
+		if module_deps.has_key(file):
+			import re
+			dependencies = []
+			for i in module_deps[file]:
+				m = re.match(pattern, os.path.basename(i))
+				if not m:
+					continue
+				on = legitimize_package_name(m.group(1))
+				dependency_pkg = format % on
+				dependencies.append(dependency_pkg)
+			return dependencies
+		return []
+
+	def frob_metadata(file, pkg, pattern, format, basename):
+		import re
+		vals = extract_modinfo(file)
+
+		dvar = bb.data.getVar('PKGD', d, 1)
+
+		# If autoloading is requested, output /etc/modutils/<name> and append
+		# appropriate modprobe commands to the postinst
+		autoload = bb.data.getVar('module_autoload_%s' % basename, d, 1)
+		if autoload:
+			name = '%s/etc/modutils/%s' % (dvar, basename)
+			f = open(name, 'w')
+			for m in autoload.split():
+				f.write('%s\n' % m)
+			f.close()
+			postinst = bb.data.getVar('pkg_postinst_%s' % pkg, d, 1)
+			if not postinst:
+				bb.fatal("pkg_postinst_%s not defined" % pkg)
+			postinst += bb.data.getVar('autoload_postinst_fragment', d, 1) % autoload
+			bb.data.setVar('pkg_postinst_%s' % pkg, postinst, d)
+
+		# Write out any modconf fragment
+		modconf = bb.data.getVar('module_conf_%s' % basename, d, 1)
+		if modconf:
+			if bb.data.getVar("KERNEL_MAJOR_VERSION", d, 1) == "2.6":
+				name = '%s/etc/modprobe.d/%s.conf' % (dvar, basename)
+			else:
+				name = '%s/etc/modutils/%s.conf' % (dvar, basename)
+			f = open(name, 'w')
+			f.write("%s\n" % modconf)
+			f.close()
+
+		files = bb.data.getVar('FILES_%s' % pkg, d, 1)
+		files = "%s /etc/modutils/%s /etc/modutils/%s.conf /etc/modprobe.d/%s.conf" % (files, basename, basename, basename)
+		bb.data.setVar('FILES_%s' % pkg, files, d)
+
+		if vals.has_key("description"):
+			old_desc = bb.data.getVar('DESCRIPTION_' + pkg, d, 1) or ""
+			bb.data.setVar('DESCRIPTION_' + pkg, old_desc + "; " + vals["description"], d)
+
+		rdepends_str = bb.data.getVar('RDEPENDS_' + pkg, d, 1)
+		if rdepends_str:
+			rdepends = rdepends_str.split()
+		else:
+			rdepends = []
+		rdepends.extend(get_dependencies(file, pattern, format))
+		bb.data.setVar('RDEPENDS_' + pkg, ' '.join(rdepends), d)
+
+	module_deps = parse_depmod()
+	module_regex = '^(.*)\.k?o$'
+	module_pattern = 'kernel-module-%s'
+
+	postinst = bb.data.getVar('pkg_postinst_modules', d, 1)
+	postrm = bb.data.getVar('pkg_postrm_modules', d, 1)
+	do_split_packages(d, root='/lib/firmware', file_regex='^(.*)\.bin$', output_pattern='kernel-firmware-%s', description='Firmware for %s', recursive=True, extra_depends='')
+	do_split_packages(d, root='/lib/firmware', file_regex='^(.*)\.fw$', output_pattern='kernel-firmware-%s', description='Firmware for %s', recursive=True, extra_depends='')
+	do_split_packages(d, root='/lib/modules', file_regex=module_regex, output_pattern=module_pattern, description='%s kernel module', postinst=postinst, postrm=postrm, recursive=True, hook=frob_metadata, extra_depends='update-modules kernel-%s' % bb.data.getVar("KERNEL_VERSION", d, 1))
+
+	import re
+	metapkg = "kernel-modules"
+	bb.data.setVar('ALLOW_EMPTY_' + metapkg, "1", d)
+	bb.data.setVar('FILES_' + metapkg, "", d)
+	blacklist = [ 'kernel-dev', 'kernel-image', 'kernel-base', 'kernel-vmlinux', 'perf' ]
+	for l in module_deps.values():
+		for i in l:
+			pkg = module_pattern % legitimize_package_name(re.match(module_regex, os.path.basename(i)).group(1))
+			blacklist.append(pkg)
+	metapkg_rdepends = []
+	packages = bb.data.getVar('PACKAGES', d, 1).split()
+	for pkg in packages[1:]:
+		if not pkg in blacklist and not pkg in metapkg_rdepends:
+			metapkg_rdepends.append(pkg)
+	bb.data.setVar('RDEPENDS_' + metapkg, ' '.join(metapkg_rdepends), d)
+	bb.data.setVar('DESCRIPTION_' + metapkg, 'Kernel modules meta package', d)
+	packages.append(metapkg)
+	bb.data.setVar('PACKAGES', ' '.join(packages), d)
+}
+
+# Support checking the kernel size since some kernels need to reside in partitions
+# with a fixed length or there is a limit in transferring the kernel to memory
+do_sizecheck() {
+	if [ ! -z "${KERNEL_IMAGE_MAXSIZE}" ]; then
+        	size=`ls -l arch/${ARCH}/boot/${KERNEL_IMAGETYPE} | awk '{ print $5}'`
+        	if [ $size -ge ${KERNEL_IMAGE_MAXSIZE} ]; then
+                	rm arch/${ARCH}/boot/${KERNEL_IMAGETYPE}
+                	die  "This kernel (size=$size > ${KERNEL_IMAGE_MAXSIZE}) is too big for your device. Please reduce the size of the kernel by making more of it modular."
+        	fi
+    	fi
+}
+
+addtask sizecheck before do_install after do_compile
+
+do_uboot_mkimage() {
+    if test "x${KERNEL_IMAGETYPE}" = "xuImage" ; then 
+        ENTRYPOINT=${UBOOT_ENTRYPOINT}
+        if test -n "${UBOOT_ENTRYSYMBOL}"; then
+            ENTRYPOINT=`${HOST_PREFIX}nm ${S}/vmlinux | \
+                   awk '$3=="${UBOOT_ENTRYSYMBOL}" {print $1}'`
+        fi
+        if test -e arch/${ARCH}/boot/compressed/vmlinux ; then
+            ${OBJCOPY} -O binary -R .note -R .comment -S arch/${ARCH}/boot/compressed/vmlinux linux.bin
+            uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C none -a ${UBOOT_LOADADDRESS} -e $ENTRYPOINT -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin arch/${ARCH}/boot/uImage
+            rm -f linux.bin
+        else
+            ${OBJCOPY} -O binary -R .note -R .comment -S vmlinux linux.bin
+            rm -f linux.bin.gz
+            gzip -9 linux.bin
+            uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C gzip -a ${UBOOT_LOADADDRESS} -e $ENTRYPOINT -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin.gz arch/${ARCH}/boot/uImage
+            rm -f linux.bin.gz
+        fi
+    fi
+}
+
+addtask uboot_mkimage before do_install after do_compile
+
+KERNEL_IMAGE_BASE_NAME ?= "${KERNEL_IMAGETYPE}-${PV}-${PR}-${MACHINE}-${DATETIME}"
+# Don't include the DATETIME variable in the sstate package signatures
+KERNEL_IMAGE_BASE_NAME[vardepsexclude] = "DATETIME"
+KERNEL_IMAGE_SYMLINK_NAME ?= "${KERNEL_IMAGETYPE}-${MACHINE}"
+
+kernel_do_deploy() {
+	install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOYDIR}/${KERNEL_IMAGE_BASE_NAME}.bin
+	if (grep -q -i -e '^CONFIG_MODULES=y$' .config); then
+		tar -cvzf ${DEPLOYDIR}/modules-${KERNEL_VERSION}-${PR}-${MACHINE}.tgz -C ${D} lib
+	fi
+
+	cd ${DEPLOYDIR}
+	rm -f ${KERNEL_IMAGE_SYMLINK_NAME}.bin
+	ln -sf ${KERNEL_IMAGE_BASE_NAME}.bin ${KERNEL_IMAGE_SYMLINK_NAME}.bin
+}
+do_deploy[dirs] = "${DEPLOYDIR} ${B}"
+
+addtask deploy before do_package after do_install
+
+EXPORT_FUNCTIONS do_deploy
+
+# perf must be enabled in individual kernel recipes
+PACKAGES =+ "perf"
+FILES_perf = "${bindir}/* \
+              ${libexecdir}"
diff --git a/meta-oe/classes/mime.bbclass b/meta-oe/classes/mime.bbclass
new file mode 100644
index 0000000000..b9cdd7becd
--- /dev/null
+++ b/meta-oe/classes/mime.bbclass
@@ -0,0 +1,56 @@
+DEPENDS += "shared-mime-info-native shared-mime-info"
+
+mime_postinst() {
+if [ "$1" = configure ]; then
+	if [ -x ${bindir}/update-mime-database ] ; then
+		echo "Updating MIME database... this may take a while."
+		update-mime-database $D${datadir}/mime
+	else
+		echo "Missing ${bindir}/update-mime-database, update of mime database failed!"
+		exit 1
+	fi
+fi
+}
+
+mime_postrm() {
+if [ "$1" = remove ] || [ "$1" = upgrade ]; then
+	if [ -x ${bindir}/update-mime-database ] ; then
+		echo "Updating MIME database... this may take a while."
+		update-mime-database $D${datadir}/mime
+	else
+		echo "Missing ${bindir}/update-mime-database, update of mime database failed!"
+		exit 1
+	fi
+fi
+}
+
+python ppopulate_packages_append () {
+	import os.path, re
+	packages = bb.data.getVar('PACKAGES', d, 1).split()
+	pkgdest =  bb.data.getVar('PKGDEST', d, 1)
+	
+	for pkg in packages:
+		mime_dir = '%s/%s/usr/share/mime/packages' % (pkgdest, pkg)
+		mimes = []
+		mime_re = re.compile(".*\.xml$")
+		if os.path.exists(mime_dir):
+			for f in os.listdir(mime_dir):
+				if mime_re.match(f):
+					mimes.append(f)
+		if mimes != []:
+			bb.note("adding mime postinst and postrm scripts to %s" % pkg)
+			postinst = bb.data.getVar('pkg_postinst_%s' % pkg, d, 1) or bb.data.getVar('pkg_postinst', d, 1)
+			if not postinst:
+				postinst = '#!/bin/sh\n'
+			postinst += bb.data.getVar('mime_postinst', d, 1)
+			bb.data.setVar('pkg_postinst_%s' % pkg, postinst, d)
+			postrm = bb.data.getVar('pkg_postrm_%s' % pkg, d, 1) or bb.data.getVar('pkg_postrm', d, 1)
+			if not postrm:
+				postrm = '#!/bin/sh\n'
+			postrm += bb.data.getVar('mime_postrm', d, 1)
+			bb.data.setVar('pkg_postrm_%s' % pkg, postrm, d)
+			bb.note("adding freedesktop-mime-info dependency to %s" % pkg)
+			rdepends = explode_deps(bb.data.getVar('RDEPENDS_' + pkg, d, 0) or bb.data.getVar('RDEPENDS', d, 0) or "")
+			rdepends.append("freedesktop-mime-info")
+			bb.data.setVar('RDEPENDS_' + pkg, " " + " ".join(rdepends), d)
+}
diff --git a/meta-oe/classes/qmake_base.bbclass b/meta-oe/classes/qmake_base.bbclass
new file mode 100644
index 0000000000..577c0fab3b
--- /dev/null
+++ b/meta-oe/classes/qmake_base.bbclass
@@ -0,0 +1,91 @@
+
+OE_QMAKE_PLATFORM = "${TARGET_OS}-oe-g++"
+QMAKESPEC = "${QMAKE_MKSPEC_PATH}/${OE_QMAKE_PLATFORM}"
+
+# We override this completely to eliminate the -e normally passed in
+EXTRA_OEMAKE = ' MAKEFLAGS= '
+
+export OE_QMAKE_CC="${CC}"
+export OE_QMAKE_CFLAGS="${CFLAGS}"
+export OE_QMAKE_CXX="${CXX}"
+export OE_QMAKE_LDFLAGS="${LDFLAGS}"
+export OE_QMAKE_AR="${AR}"
+export OE_QMAKE_STRIP="echo"
+export OE_QMAKE_RPATH="-Wl,-rpath-link,"
+
+# do not export STRIP to the environment
+STRIP[unexport] = "1"
+
+# default to qte2 via bb.conf, inherit qt3x11 to configure for qt3x11
+
+oe_qmake_mkspecs () {
+    mkdir -p mkspecs/${OE_QMAKE_PLATFORM}
+    for f in ${QMAKE_MKSPEC_PATH}/${OE_QMAKE_PLATFORM}/*; do
+        if [ -L $f ]; then
+            lnk=`readlink $f`
+            if [ -f mkspecs/${OE_QMAKE_PLATFORM}/$lnk ]; then
+                ln -s $lnk mkspecs/${OE_QMAKE_PLATFORM}/`basename $f`
+            else
+                cp $f mkspecs/${OE_QMAKE_PLATFORM}/
+            fi
+        else
+            cp $f mkspecs/${OE_QMAKE_PLATFORM}/
+        fi
+    done
+}
+
+qmake_base_do_configure() {
+	case ${QMAKESPEC} in
+	*linux-oe-g++|*linux-uclibc-oe-g++|*linux-gnueabi-oe-g++|*linux-uclibceabi-oe-g++)
+		;;
+	*-oe-g++)
+		die Unsupported target ${TARGET_OS} for oe-g++ qmake spec
+		;;
+	*)
+		oenote Searching for qmake spec file
+		paths="${QMAKE_MKSPEC_PATH}/qws/${TARGET_OS}-${TARGET_ARCH}-g++"
+		paths="${QMAKE_MKSPEC_PATH}/${TARGET_OS}-g++ $paths"
+
+		if (echo "${TARGET_ARCH}"|grep -q 'i.86'); then
+			paths="${QMAKE_MKSPEC_PATH}/qws/${TARGET_OS}-x86-g++ $paths"
+		fi
+		for i in $paths; do
+			if test -e $i; then
+				export QMAKESPEC=$i
+				break
+			fi
+		done
+		;;
+	esac
+
+	oenote "using qmake spec in ${QMAKESPEC}, using profiles '${QMAKE_PROFILES}'"
+
+	if [ -z "${QMAKE_PROFILES}" ]; then 
+		PROFILES="`ls *.pro`"
+	else
+		PROFILES="${QMAKE_PROFILES}"
+	fi
+
+	if [ -z "$PROFILES" ]; then
+		die "QMAKE_PROFILES not set and no profiles found in $PWD"
+        fi
+
+	if [ ! -z "${EXTRA_QMAKEVARS_POST}" ]; then
+		AFTER="-after"
+		QMAKE_VARSUBST_POST="${EXTRA_QMAKEVARS_POST}"
+		oenote "qmake postvar substitution: ${EXTRA_QMAKEVARS_POST}"
+	fi
+
+	if [ ! -z "${EXTRA_QMAKEVARS_PRE}" ]; then
+		QMAKE_VARSUBST_PRE="${EXTRA_QMAKEVARS_PRE}"
+		oenote "qmake prevar substitution: ${EXTRA_QMAKEVARS_PRE}"
+	fi
+
+#oenote "Calling '${OE_QMAKE_QMAKE} -makefile -spec ${QMAKESPEC} -o Makefile $QMAKE_VARSUBST_PRE $AFTER $PROFILES $QMAKE_VARSUBST_POST'"
+	unset QMAKESPEC || true
+	${OE_QMAKE_QMAKE} -makefile -spec ${QMAKESPEC} -o Makefile $QMAKE_VARSUBST_PRE $AFTER $PROFILES $QMAKE_VARSUBST_POST || die "Error calling ${OE_QMAKE_QMAKE} on $PROFILES"
+}
+
+EXPORT_FUNCTIONS do_configure
+
+addtask configure after do_unpack do_patch before do_compile
diff --git a/meta-oe/classes/qt4e.bbclass b/meta-oe/classes/qt4e.bbclass
new file mode 100644
index 0000000000..303b79b8a6
--- /dev/null
+++ b/meta-oe/classes/qt4e.bbclass
@@ -0,0 +1,17 @@
+DEPENDS_prepend = "${@["qt4-embedded ", ""][(bb.data.getVar('PN', d, 1)[:12] == 'qt4-embedded')]}"
+inherit qmake2
+
+QT_DIR_NAME = "qtopia"
+QT_LIBINFIX = "E"
+# override variables set by qmake-base to compile Qt/Embedded apps
+#
+export QMAKESPEC = "${STAGING_DATADIR}/${QT_DIR_NAME}/mkspecs/${TARGET_OS}-oe-g++"
+export OE_QMAKE_INCDIR_QT = "${STAGING_INCDIR}/${QT_DIR_NAME}"
+export OE_QMAKE_LIBDIR_QT = "${STAGING_LIBDIR}"
+export OE_QMAKE_LIBS_QT = "qt"
+export OE_QMAKE_LIBS_X11 = ""
+export OE_QMAKE_EXTRA_MODULES = "network"
+EXTRA_QMAKEVARS_PRE += " QT_LIBINFIX=${QT_LIBINFIX} "
+
+# Qt4 uses atomic instructions not supported in thumb mode
+ARM_INSTRUCTION_SET = "arm"
diff --git a/meta-oe/classes/siteinfo.bbclass b/meta-oe/classes/siteinfo.bbclass
new file mode 100644
index 0000000000..c0db539e29
--- /dev/null
+++ b/meta-oe/classes/siteinfo.bbclass
@@ -0,0 +1,218 @@
+# This class exists to provide information about the targets that
+# may be needed by other classes and/or recipes. If you add a new
+# target this will probably need to be updated.
+
+#
+# Returns information about 'what' for the named target 'target'
+# where 'target' == "<arch>-<os>"
+#
+# 'what' can be one of
+# * target: Returns the target name ("<arch>-<os>")
+# * endianess: Return "be" for big endian targets, "le" for little endian
+# * bits: Returns the bit size of the target, either "32" or "64"
+# * libc: Returns the name of the c library used by the target
+#
+# It is an error for the target not to exist.
+# If 'what' doesn't exist then an empty value is returned
+#
+def siteinfo_data(d):
+    archinfo = {
+        "arm": "endian-little bit-32 arm-common",
+        "armeb": "endian-big bit-32 arm-common",
+        "avr32": "endian-big bit-32 avr32-common",
+        "bfin": "endian-little bit-32 bfin-common",
+        "i386": "endian-little bit-32 ix86-common",
+        "i486": "endian-little bit-32 ix86-common",
+        "i586": "endian-little bit-32 ix86-common",
+        "i686": "endian-little bit-32 ix86-common",
+        "ia64": "endian-little bit-64",
+        "mips": "endian-big bit-32 mips-common",
+        "mips64": "endian-big bit-64 mips64-common",
+        "mips64el": "endian-little bit-64 mips64-common",
+        "mipsel": "endian-little bit-32 mips-common",
+        "powerpc": "endian-big bit-32 powerpc-common",
+        "nios2": "endian-little bit-32 nios2-common",
+        "powerpc64": "endian-big bit-64 powerpc-common powerpc64-linux",
+        "ppc": "endian-big bit-32 powerpc-common",
+        "ppc64": "endian-big bit-64 powerpc-common powerpc64-linux",
+        "sh3": "endian-little bit-32 sh-common",
+        "sh4": "endian-little bit-32 sh-common",
+        "sparc": "endian-big bit-32",
+        "viac3": "endian-little bit-32 ix86-common",
+        "x86_64": "endian-little bit-64",
+    }
+    osinfo = {
+        "darwin": "common-darwin",
+        "darwin9": "common-darwin",
+        "linux": "common-linux common-glibc",
+        "linux-gnueabi": "common-linux common-glibc",
+        "linux-gnuspe": "common-linux common-glibc",
+        "linux-uclibc": "common-linux common-uclibc",
+        "linux-uclibceabi": "common-linux common-uclibc",
+        "linux-uclibcspe": "common-linux common-uclibc",
+        "uclinux-uclibc": "common-uclibc",
+        "cygwin": "common-cygwin",
+        "mingw32": "common-mingw",
+    }
+    targetinfo = {
+        "arm-linux-gnueabi":    "arm-linux",
+        "arm-linux-uclibceabi":    "arm-linux-uclibc",
+        "armeb-linux-gnueabi":     "armeb-linux",
+        "armeb-linux-uclibceabi":  "armeb-linux-uclibc",
+        "powerpc-linux-gnuspe":    "powerpc-linux",
+        "powerpc-linux-uclibcspe": "powerpc-linux-uclibc",
+    }
+
+    arch = d.getVar("HOST_ARCH", True)
+    os = d.getVar("HOST_OS", True)
+    target = "%s-%s" % (arch, os)
+
+    sitedata = []
+    if arch in archinfo:
+        sitedata.extend(archinfo[arch].split())
+    if os in osinfo:
+        sitedata.extend(osinfo[os].split())
+    if target in targetinfo:
+        sitedata.extend(targetinfo[target].split())
+    sitedata.append(target)
+    sitedata.append("common")
+
+    return sitedata
+
+python () {
+    sitedata = set(siteinfo_data(d))
+    if "endian-little" in sitedata:
+        d.setVar("SITEINFO_ENDIANNESS", "le")
+    elif "endian-big" in sitedata:
+        d.setVar("SITEINFO_ENDIANNESS", "be")
+    else:
+        bb.error("Unable to determine endianness for architecture '%s'" %
+                 d.getVar("HOST_ARCH", True))
+        bb.fatal("Please add your architecture to siteinfo.bbclass")
+
+    if "bit-32" in sitedata:
+        d.setVar("SITEINFO_BITS", "32")
+    elif "bit-64" in sitedata:
+        d.setVar("SITEINFO_BITS", "64")
+    else:
+        bb.error("Unable to determine bit size for architecture '%s'" %
+                 d.getVar("HOST_ARCH", True))
+        bb.fatal("Please add your architecture to siteinfo.bbclass")
+}
+
+# Old class from yocto pasted in below for compat
+
+def get_siteinfo_list(d):
+       target = bb.data.getVar('HOST_ARCH', d, 1) + "-" + bb.data.getVar('HOST_OS', d, 1)
+
+       targetinfo = {\
+               "armeb-linux":             "endian-big bit-32 common-glibc arm-common",\
+               "armeb-linux-gnueabi":     "endian-big bit-32 common-glibc arm-common armeb-linux",\
+               "armeb-linux-uclibc":      "endian-big bit-32 common-uclibc arm-common",\
+               "armeb-linux-uclibcgnueabi": "endian-big bit-32 common-uclibc arm-common armeb-linux-uclibc",\
+               "arm-darwin":              "endian-little bit-32 common-darwin",\
+               "arm-darwin8":              "endian-little bit-32 common-darwin",\
+               "arm-linux":               "endian-little bit-32 common-glibc arm-common",\
+               "arm-linux-gnueabi":       "endian-little bit-32 common-glibc arm-common arm-linux",\
+               "arm-linux-uclibc":        "endian-little bit-32 common-uclibc arm-common",\
+               "arm-linux-uclibcgnueabi": "endian-little bit-32 common-uclibc arm-common arm-linux-uclibc",\
+               "avr32-linux":             "endian-big bit-32 common-glibc avr32-common",\ 
+               "avr32-linux-uclibc":      "endian-big bit-32 common-uclibc avr32-common",\
+               "bfin-uclinux-uclibc":       "endian-little bit-32 common-uclibc bfin-common",\
+               "i386-linux":              "endian-little bit-32 common-glibc ix86-common",\
+               "i486-linux":              "endian-little bit-32 common-glibc ix86-common",\
+               "i586-linux":              "endian-little bit-32 common-glibc ix86-common",\
+               "i686-linux":              "endian-little bit-32 common-glibc ix86-common",\
+               "i386-linux-uclibc":       "endian-little bit-32 common-uclibc ix86-common",\
+               "i486-linux-uclibc":       "endian-little bit-32 common-uclibc ix86-common",\
+               "i586-linux-uclibc":       "endian-little bit-32 common-uclibc ix86-common",\
+               "i686-linux-uclibc":       "endian-little bit-32 common-uclibc ix86-common",\
+               "mipsel-linux":            "endian-little bit-32 common-glibc mips-common",\
+               "mipsel-linux-uclibc":     "endian-little bit-32 common-uclibc mips-common",\
+               "mips-linux":              "endian-big bit-32 common-glibc mips-common",\
+               "mips-linux-uclibc":       "endian-big bit-32 common-uclibc mips-common",\
+               "powerpc-darwin":          "endian-big bit-32 common-darwin",\
+               "ppc-linux":               "endian-big bit-32 common-glibc powerpc-common",\ 
+	       "powerpc-linux":           "endian-big bit-32 common-glibc powerpc-common",\
+               "powerpc-linux-uclibc":    "endian-big bit-32 common-uclibc powerpc-common",\
+               "sh3-linux":               "endian-little bit-32 common-glibc sh-common",\
+               "sh4-linux":               "endian-little bit-32 common-glibc sh-common",\
+               "sh4-linux-uclibc":        "endian-little bit-32 common-uclibc sh-common",\
+               "sparc-linux":             "endian-big bit-32 common-glibc",\
+               "x86_64-linux":            "endian-little bit-64 common-glibc",\
+               "x86_64-linux-uclibc":     "endian-little bit-64 common-uclibc"}
+       if target in targetinfo:
+               info = targetinfo[target].split()
+               info.append(target)
+               info.append("common")
+               return info
+       else:
+               bb.error("Information not available for target '%s'" % target)
+
+
+#
+# Define which site files to use. We check for several site files and
+# use each one that is found, based on the list returned by get_siteinfo_list()
+#
+# Search for the files in the following directories:
+# 1) ${BBPATH}/site (in reverse) - app specific, then site wide
+# 2) ${FILE_DIRNAME}/site-${PV}         - app version specific
+#
+def siteinfo_get_files(d):
+       sitefiles = ""
+
+       # Determine which site files to look for
+       sites = get_siteinfo_list(d)
+
+       # Check along bbpath for site files and append in reverse order so
+       # the application specific sites files are last and system site
+       # files first.
+       path_bb = bb.data.getVar('BBPATH', d, 1)
+       for p in (path_bb or "").split(':'):
+               tmp = ""
+               for i in sites:
+                       fname = os.path.join(p, 'site', i)
+                       if os.path.exists(fname):
+                               tmp += fname + " "
+               sitefiles = tmp + sitefiles;
+
+       # Now check for the applications version specific site files
+       path_pkgv = os.path.join(bb.data.getVar('FILE_DIRNAME', d, 1), "site-" + bb.data.getVar('PV', d, 1))
+       for i in sites:
+               fname = os.path.join(path_pkgv, i)
+               if os.path.exists(fname):
+                       sitefiles += fname + " "
+
+       # Now check for siteconfig cache files
+       path_siteconfig = bb.data.getVar('SITECONFIG_SYSROOTCACHE', d, 1)
+       if os.path.isdir(path_siteconfig):
+               for i in os.listdir(path_siteconfig):
+                       fname = os.path.join(path_siteconfig, i)
+                       sitefiles += fname + " "
+
+       bb.debug(1, "SITE files " + sitefiles);
+       return sitefiles
+
+def siteinfo_get_endianess(d):
+       info = get_siteinfo_list(d)
+       if 'endian-little' in info:
+              return "le"
+       elif 'endian-big' in info:
+              return "be"
+       bb.error("Site info could not determine endianess for target")
+
+def siteinfo_get_bits(d):
+       info = get_siteinfo_list(d)
+       if 'bit-32' in info:
+              return "32"
+       elif 'bit-64' in info:
+              return "64"
+       bb.error("Site info could not determine bit size for target")
+
+#
+# Make some information available via variables
+#
+SITEINFO_ENDIANESS  = "${@siteinfo_get_endianess(d)}"
+SITEINFO_BITS       = "${@siteinfo_get_bits(d)}"
+SITECONFIG_SYSROOTCACHE = "${STAGING_DATADIR}/${TARGET_SYS}_config_site.d"
+
diff --git a/meta-oe/conf/layer.conf b/meta-oe/conf/layer.conf
new file mode 100644
index 0000000000..9fa60c1c49
--- /dev/null
+++ b/meta-oe/conf/layer.conf
@@ -0,0 +1,9 @@
+# We have a conf and classes directory, prepend to BBPATH to prefer our versions
+BBPATH := "${LAYERDIR}:${BBPATH}"
+
+# We have a recipes directory, add to BBFILES
+BBFILES := "${BBFILES} ${LAYERDIR}/recipes-*/*/*.bb ${LAYERDIR}/recipes-*/*/*.bbappend"
+
+BBFILE_COLLECTIONS += "openembedded-layer"
+BBFILE_PATTERN_openembedded-layer := "^${LAYERDIR}/"
+BBFILE_PRIORITY_openembedded-layer = "6"
diff --git a/meta-oe/conf/machine/include/davinci.inc b/meta-oe/conf/machine/include/davinci.inc
new file mode 100644
index 0000000000..3e48097eb3
--- /dev/null
+++ b/meta-oe/conf/machine/include/davinci.inc
@@ -0,0 +1,25 @@
+require conf/machine/include/tune-arm926ejs.inc
+
+# Increase this everytime you change something in the kernel
+MACHINE_KERNEL_PR = "r50"
+
+TARGET_ARCH = "arm"
+
+KERNEL_IMAGETYPE = "uImage"
+
+PREFERRED_PROVIDER_virtual/kernel = "linux-davinci"
+
+PREFERRED_PROVIDER_virtual/bootloader = "u-boot"
+UBOOT_MACHINE = "davinci_dvevm_config"
+
+UBOOT_ENTRYPOINT = "0x80008000"
+UBOOT_LOADADDRESS = "0x80008000"
+
+EXTRA_IMAGEDEPENDS += "u-boot"
+
+SERIAL_CONSOLE ?= "115200 ttyS0"
+EXTRA_IMAGECMD_jffs2 = "--pad --little-endian --eraseblock=0x20000 -n"
+
+#ROOT_FLASH_SIZE = "29"
+
+MACHINE_FEATURES = "kernel26 serial ethernet usbhost usbgadget mmc alsa"
diff --git a/meta-oe/conf/machine/include/omap3.inc b/meta-oe/conf/machine/include/omap3.inc
new file mode 100644
index 0000000000..15e34c6508
--- /dev/null
+++ b/meta-oe/conf/machine/include/omap3.inc
@@ -0,0 +1,15 @@
+SOC_FAMILY = "omap3"
+TARGET_ARCH = "arm"
+
+require conf/machine/include/tune-cortexa8.inc
+PREFERRED_PROVIDER_virtual/kernel = "linux-omap"
+# Increase this everytime you change something in the kernel
+MACHINE_KERNEL_PR = "r99"
+
+KERNEL_IMAGETYPE = "uImage"
+
+UBOOT_ENTRYPOINT = "0x80008000"
+UBOOT_LOADADDRESS = "0x80008000"
+
+EXTRA_IMAGEDEPENDS += "u-boot x-load"
+
diff --git a/meta-oe/conf/machine/include/omapl138.inc b/meta-oe/conf/machine/include/omapl138.inc
new file mode 100644
index 0000000000..4c222753df
--- /dev/null
+++ b/meta-oe/conf/machine/include/omapl138.inc
@@ -0,0 +1 @@
+SOC_FAMILY = "omapl138"
diff --git a/meta-oe/conf/machine/include/tune-arm926ejs.inc b/meta-oe/conf/machine/include/tune-arm926ejs.inc
new file mode 100644
index 0000000000..f41e460999
--- /dev/null
+++ b/meta-oe/conf/machine/include/tune-arm926ejs.inc
@@ -0,0 +1,7 @@
+FEED_ARCH = "armv5te"
+PACKAGE_EXTRA_ARCHS += "armv4 armv4t armv5te"
+# For gcc 3.x you need:
+#TARGET_CC_ARCH = "-march=armv5te -mtune=arm926ejs"
+# For gcc 4.x you need:
+TARGET_CC_ARCH = "-march=armv5te -mtune=arm926ej-s"
+BASE_PACKAGE_ARCH = "armv5te"
diff --git a/meta-oe/conf/machine/include/tune-cortexa8.inc b/meta-oe/conf/machine/include/tune-cortexa8.inc
new file mode 100644
index 0000000000..2ac0ebfe45
--- /dev/null
+++ b/meta-oe/conf/machine/include/tune-cortexa8.inc
@@ -0,0 +1,17 @@
+# Instead of using -mfpu=vfp[2] we can use -mfpu=neon to make use of gcc intrinsics[1] and vectorize loops with -ftree-vectorize[3]
+# [1] http://gcc.gnu.org/onlinedocs/gcc/ARM-NEON-Intrinsics.html
+# [2] http://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html 
+# [3] https://support.codesourcery.com/GNUToolchain/kbentry29
+
+# Can be 'softfp' or 'hardfp'
+ARM_FP_MODE ?= "softfp"
+
+ARM_FP_OPT = "${@['-mfloat-abi=softfp', '-mfloat-abi=hard'][bb.data.getVar('ARM_FP_MODE', d, 1) == 'hardfp']}"
+ARM_FP_PACKAGESUFFIX = "${@['', '-hardfp'][bb.data.getVar('ARM_FP_MODE', d, 1) == 'hardfp']}"
+
+TARGET_CC_ARCH = "-march=armv7-a -mtune=cortex-a8 -mfpu=neon ${ARM_FP_OPT}"
+
+FEED_ARCH = "armv7a${ARM_FP_PACKAGESUFFIX}"
+BASE_PACKAGE_ARCH = "armv7a${ARM_FP_PACKAGESUFFIX}"
+
+PACKAGE_EXTRA_ARCHS += "armv4 armv4t armv5te armv6 armv7 armv7a${ARM_FP_PACKAGESUFFIX}"
diff --git a/meta-oe/patches/0001-kernel-bbclass-merge-in-OE-improvements-for-mkimage-.patch b/meta-oe/patches/0001-kernel-bbclass-merge-in-OE-improvements-for-mkimage-.patch
new file mode 100644
index 0000000000..7283df8df5
--- /dev/null
+++ b/meta-oe/patches/0001-kernel-bbclass-merge-in-OE-improvements-for-mkimage-.patch
@@ -0,0 +1,109 @@
+From 65780d06117be92941b3c5404dc31597b6807263 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 23 Jan 2011 10:58:46 +0100
+Subject: [PATCH] kernel bbclass: merge in OE improvements for mkimage, PR and initramfs
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ classes/kernel.bbclass |   60 +++++++++++++++++++++++++++++++++++------------
+ 1 files changed, 44 insertions(+), 16 deletions(-)
+
+diff --git a/classes/kernel.bbclass b/classes/kernel.bbclass
+index 827046e..d94930b 100644
+--- a/classes/kernel.bbclass
++++ b/classes/kernel.bbclass
+@@ -14,8 +14,20 @@ python __anonymous () {
+     	depends = bb.data.getVar("DEPENDS", d, 1)
+     	depends = "%s u-boot-mkimage-native" % depends
+     	bb.data.setVar("DEPENDS", depends, d)
++
++    image = bb.data.getVar('INITRAMFS_IMAGE', d, True)
++    if image != '' and image is not None:
++        bb.data.setVar('INITRAMFS_TASK', '${INITRAMFS_IMAGE}:do_rootfs', d)
++
++    machine_kernel_pr = bb.data.getVar('MACHINE_KERNEL_PR', d, True)
++
++    if machine_kernel_pr:
++       bb.data.setVar('PR', machine_kernel_pr, d)
+ }
+ 
++INITRAMFS_IMAGE ?= ""
++INITRAMFS_TASK ?= ""
++
+ inherit kernel-arch deploy
+ 
+ PACKAGES_DYNAMIC += "kernel-module-*"
+@@ -196,8 +208,17 @@ sysroot_stage_all_append() {
+ 
+ kernel_do_configure() {
+         yes '' | oe_runmake oldconfig
++	if [ ! -z "${INITRAMFS_IMAGE}" ]; then
++		for img in cpio.gz cpio.lzo cpio.lzma; do
++		if [ -e "${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE}-${MACHINE}.$img" ]; then
++			cp "${DEPLOY_DIR_IMAGE}/${INITRAMFS_IMAGE}-${MACHINE}.$img" initramfs.$img
++		fi
++		done
++	fi
+ }
+ 
++kernel_do_configure[depends] += "${INITRAMFS_TASK}"
++
+ do_menuconfig() {
+ 	export TERMWINDOWTITLE="${PN} Kernel Configuration"
+ 	export SHELLCMDS="make menuconfig"
+@@ -476,6 +497,29 @@ do_sizecheck() {
+ 
+ addtask sizecheck before do_install after do_compile
+ 
++do_uboot_mkimage() {
++    if test "x${KERNEL_IMAGETYPE}" = "xuImage" ; then 
++        ENTRYPOINT=${UBOOT_ENTRYPOINT}
++        if test -n "${UBOOT_ENTRYSYMBOL}"; then
++            ENTRYPOINT=`${HOST_PREFIX}nm ${S}/vmlinux | \
++                   awk '$3=="${UBOOT_ENTRYSYMBOL}" {print $1}'`
++        fi
++        if test -e arch/${ARCH}/boot/compressed/vmlinux ; then
++            ${OBJCOPY} -O binary -R .note -R .comment -S arch/${ARCH}/boot/compressed/vmlinux linux.bin
++            uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C none -a ${UBOOT_LOADADDRESS} -e $ENTRYPOINT -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin arch/${ARCH}/boot/uImage
++            rm -f linux.bin
++        else
++            ${OBJCOPY} -O binary -R .note -R .comment -S vmlinux linux.bin
++            rm -f linux.bin.gz
++            gzip -9 linux.bin
++            uboot-mkimage -A ${UBOOT_ARCH} -O linux -T kernel -C gzip -a ${UBOOT_LOADADDRESS} -e $ENTRYPOINT -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin.gz arch/${ARCH}/boot/uImage
++            rm -f linux.bin.gz
++        fi
++    fi
++}
++
++addtask uboot_mkimage before do_install after do_compile
++
+ KERNEL_IMAGE_BASE_NAME ?= "${KERNEL_IMAGETYPE}-${PV}-${PR}-${MACHINE}-${DATETIME}"
+ # Don't include the DATETIME variable in the sstate package signatures
+ KERNEL_IMAGE_BASE_NAME[vardepsexclude] = "DATETIME"
+@@ -487,22 +531,6 @@ kernel_do_deploy() {
+ 		tar -cvzf ${DEPLOYDIR}/modules-${KERNEL_VERSION}-${PR}-${MACHINE}.tgz -C ${D} lib
+ 	fi
+ 
+-	if test "x${KERNEL_IMAGETYPE}" = "xuImage" ; then 
+-		if test -e arch/${ARCH}/boot/uImage ; then
+-			cp arch/${ARCH}/boot/uImage ${DEPLOYDIR}/${KERNEL_IMAGE_BASE_NAME}.bin
+-		elif test -e arch/${ARCH}/boot/compressed/vmlinux ; then
+-			${OBJCOPY} -O binary -R .note -R .comment -S arch/${ARCH}/boot/compressed/vmlinux linux.bin
+-			uboot-mkimage -A ${ARCH} -O linux -T kernel -C none -a ${UBOOT_ENTRYPOINT} -e ${UBOOT_ENTRYPOINT} -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin ${DEPLOYDIR}/${KERNEL_IMAGE_BASE_NAME}.bin
+-			rm -f linux.bin
+-		else
+-			${OBJCOPY} -O binary -R .note -R .comment -S vmlinux linux.bin
+-			rm -f linux.bin.gz
+-			gzip -9 linux.bin
+-			uboot-mkimage -A ${ARCH} -O linux -T kernel -C gzip -a ${UBOOT_ENTRYPOINT} -e ${UBOOT_ENTRYPOINT} -n "${DISTRO_NAME}/${PV}/${MACHINE}" -d linux.bin.gz ${DEPLOYDIR}/${KERNEL_IMAGE_BASE_NAME}.bin
+-			rm -f linux.bin.gz
+-		fi
+-	fi
+-
+ 	cd ${DEPLOYDIR}
+ 	rm -f ${KERNEL_IMAGE_SYMLINK_NAME}.bin
+ 	ln -sf ${KERNEL_IMAGE_BASE_NAME}.bin ${KERNEL_IMAGE_SYMLINK_NAME}.bin
+-- 
+1.6.6.1
+
diff --git a/meta-oe/patches/kernel-temp b/meta-oe/patches/kernel-temp
new file mode 100644
index 0000000000..3bbcfe955a
--- /dev/null
+++ b/meta-oe/patches/kernel-temp
@@ -0,0 +1,33 @@
+diff --git a/classes/kernel.bbclass b/classes/kernel.bbclass
+index d94930b..2a0f3da 100644
+--- a/classes/kernel.bbclass
++++ b/classes/kernel.bbclass
+@@ -220,6 +196,9 @@ kernel_do_configure() {
+ kernel_do_configure[depends] += "${INITRAMFS_TASK}"
+ 
+ do_menuconfig() {
++        export DISPLAY='${DISPLAY}'
++        export DBUS_SESSION_BUS_ADDRESS='${DBUS_SESSION_BUS_ADDRESS}'
++        export XAUTHORITY='${XAUTHORITY}'
+ 	export TERMWINDOWTITLE="${PN} Kernel Configuration"
+ 	export SHELLCMDS="make menuconfig"
+ 	${TERMCMDRUN}
+@@ -318,13 +297,16 @@ module_conf_rfcomm = "alias bt-proto-3 rfcomm"
+ 
+ python populate_packages_prepend () {
+ 	def extract_modinfo(file):
+-		import re
+-		tmpfile = os.tmpnam()
++		import tempfile, re
++		tempfile.tempdir = bb.data.getVar("WORKDIR", d, 1)
++		tf = tempfile.mkstemp()
++		tmpfile = tf[1]
+ 		cmd = "PATH=\"%s\" %sobjcopy -j .modinfo -O binary %s %s" % (bb.data.getVar("PATH", d, 1), bb.data.getVar("HOST_PREFIX", d, 1) or "", file, tmpfile)
+ 		os.system(cmd)
+ 		f = open(tmpfile)
+ 		l = f.read().split("\000")
+ 		f.close()
++		os.close(tf[0])
+ 		os.unlink(tmpfile)
+ 		exp = re.compile("([^=]+)=(.*)")
+ 		vals = {}
diff --git a/meta-oe/recipes-connectivity/gnuradio/gnuradio.inc b/meta-oe/recipes-connectivity/gnuradio/gnuradio.inc
new file mode 100644
index 0000000000..d114f89eac
--- /dev/null
+++ b/meta-oe/recipes-connectivity/gnuradio/gnuradio.inc
@@ -0,0 +1,46 @@
+DESCRIPTION = "GNU Radio"
+URL = "http://gnuradio.org"
+SECTION =  "apps"
+PRIORITY = "optional"
+LICENSE = "GPLv3"
+DEPENDS = "uhd gsl guile-native fftwf python alsa-lib boost cppunit swig-native python-numpy"
+INC_PR = "r8"
+
+inherit distutils-base autotools pkgconfig
+
+export BUILD_SYS
+export HOST_SYS=${MULTIMACH_TARGET_SYS}
+
+EXTRA_OECONF = " \
+  --program-prefix= \
+  --disable-gr-atsc \
+  --enable-gr-audio-alsa  \
+  --disable-gr-audio-jack \
+  --disable-html-docs \
+  --with-boost=${STAGING_DIR_TARGET}/usr \
+  --disable-usrp1 \
+  --disable-usrp2 \
+  --with-pythondir=${PYTHON_SITEPACKAGES_DIR} \
+  PYTHON_CPPFLAGS=-I${STAGING_INCDIR}/${PYTHON_DIR} \
+"
+
+RDEPENDS_${PN} = "python-core python-audio python-threading python-codecs python-lang python-textutils \
+                  python-shell python-pickle python-compiler python-pkgutil python-pydoc python-mmap \
+                  python-netclient python-unittest python-difflib python-pprint python-numpy \
+"
+
+PACKAGES =+ "\
+  ${PN}-examples \
+  ${PN}-grc \
+  ${PN}-conf \
+"
+
+FILES_${PN}-examples = "${datadir}/gnuradio/examples"
+FILES_${PN}-grc = "${datadir}/gnuradio/grc"
+FILES_${PN}-conf = "${sysconfdir}/gnuradio"
+
+FILES_${PN} += "${PYTHON_SITEPACKAGES_DIR}/gnuradio/*"
+FILES_${PN}-dbg += "${PYTHON_SITEPACKAGES_DIR}/gnuradio/.debug \
+                    ${PYTHON_SITEPACKAGES_DIR}/gnuradio/*/.debug \
+		   "
+
diff --git a/meta-oe/recipes-connectivity/gnuradio/gnuradio_git.bb b/meta-oe/recipes-connectivity/gnuradio/gnuradio_git.bb
new file mode 100644
index 0000000000..757a80136d
--- /dev/null
+++ b/meta-oe/recipes-connectivity/gnuradio/gnuradio_git.bb
@@ -0,0 +1,16 @@
+require gnuradio.inc
+
+PR = "${INC_PR}.1"
+PV = "3.3.0-${PR}+gitr${SRCREV}"
+
+SRCREV = "cdca1c917626f7c63f820da921a17187efc92cd5"
+
+# Make it easy to test against developer repos and branches
+GIT_REPO = "gnuradio.git"
+GIT_BRANCH = "next"
+
+SRC_URI = "git://gnuradio.org/git/${GIT_REPO};branch=${GIT_BRANCH};protocol=http \
+"
+
+S="${WORKDIR}/git"
+
diff --git a/meta-oe/recipes-connectivity/openssl/ocf-linux.inc b/meta-oe/recipes-connectivity/openssl/ocf-linux.inc
new file mode 100644
index 0000000000..b98f887ff4
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/ocf-linux.inc
@@ -0,0 +1,24 @@
+DESCRIPTION = "Install required headers to enable OCF Linux support"
+LICENSE = "BSD"
+
+LIC_FILES_CHKSUM = "file://README;md5=b02a793c9b7893b4ce1f39f0b231ccd7"
+ 
+INC_PR = "r3"
+
+SRC_URI = "http://sourceforge.net/projects/ocf-linux/files/ocf-linux/${PV}/ocf-linux-${PV}.tar.gz"
+
+S = "${WORKDIR}/ocf-linux-${PV}"
+
+# Need to unpack the the ocf-linux.tar.gz file contained inside the
+# downloaded tarball
+# Install the OCF Linux headers so that other packages such as openssl
+# can find them.  The headers must be in a crypto directory according to
+# the README file.
+do_install() {
+    cd ${S}
+    tar xzf ocf-linux.tar.gz
+    install -d ${D}${includedir}/crypto
+    install -m 0644 ${S}/ocf/*.h ${D}${includedir}/crypto/
+}
+
+ALLOW_EMPTY = "1"
diff --git a/meta-oe/recipes-connectivity/openssl/ocf-linux_20100325.bb b/meta-oe/recipes-connectivity/openssl/ocf-linux_20100325.bb
new file mode 100644
index 0000000000..9dccc3c32f
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/ocf-linux_20100325.bb
@@ -0,0 +1,6 @@
+require ocf-linux.inc
+
+PR = "${INC_PR}.0"
+
+SRC_URI[md5sum] = "ce5ad54aa94226d496df1f0f3cf0c11f"
+SRC_URI[sha256sum] = "9d17cbd13849939c70699b520280e3b94cf77401cdc131108d4aeaaeea587f6b"
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/configure-targets.patch b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/configure-targets.patch
new file mode 100644
index 0000000000..b68123a233
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/configure-targets.patch
@@ -0,0 +1,24 @@
+
+The number of colons are important :)
+
+Index: openssl-0.9.8g/Configure
+===================================================================
+--- openssl-0.9.8g.orig/Configure	2008-04-12 04:27:22.000000000 +0200
++++ openssl-0.9.8g/Configure	2008-04-12 04:38:56.000000000 +0200
+@@ -395,6 +395,16 @@
+ "linux-alpha-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${no_asm}",
+ "linux-alpha+bwx-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${no_asm}",
+ 
++ # Linux on ARM
++"linux-elf-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-elf-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-gnueabi-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-gnueabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibcgnueabi-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibcgnueabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
++"linux-avr32","$ENV{'CC'}:-DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).",
++
+ #### *BSD [do see comment about ${BSDthreads} above!]
+ "BSD-generic32","gcc:-DTERMIOS -O3 -fomit-frame-pointer -Wall::${BSDthreads}:::BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL:${no_asm}:dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "BSD-x86",	"gcc:-DL_ENDIAN -DTERMIOS -O3 -fomit-frame-pointer -Wall::${BSDthreads}:::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_out_asm}:dlfcn:bsd-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/debian.patch b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/debian.patch
new file mode 100644
index 0000000000..60e338816d
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/debian.patch
@@ -0,0 +1,546 @@
+Index: openssl-0.9.8m/Makefile
+===================================================================
+--- openssl-0.9.8m.orig/Makefile	2010-02-26 01:21:14.000000000 +0800
++++ openssl-0.9.8m/Makefile	2010-03-09 20:17:26.515664333 +0800
+@@ -26,10 +26,10 @@
+ # for, say, /usr/ and yet have everything installed to /tmp/somedir/usr/.
+ # Normally it is left empty.
+ INSTALL_PREFIX=
+-INSTALLTOP=/usr/local/ssl
++INSTALLTOP=/usr
+ 
+ # Do not edit this manually. Use Configure --openssldir=DIR do change this!
+-OPENSSLDIR=/usr/local/ssl
++OPENSSLDIR=/usr/lib/ssl
+ 
+ # NO_IDEA - Define to build without the IDEA algorithm
+ # NO_RC4  - Define to build without the RC4 algorithm
+@@ -155,10 +155,11 @@
+ 
+ MAKEFILE= Makefile
+ 
+-MANDIR=$(OPENSSLDIR)/man
++MANDIR=/usr/share/man
+ MAN1=1
+ MAN3=3
+-MANSUFFIX=
++MANSUFFIX=ssl
++MANSECTION=SSL
+ SHELL=/bin/sh
+ 
+ TOP=    .
+@@ -170,8 +171,8 @@
+ SHARED_SSL=libssl$(SHLIB_EXT)
+ SHARED_FIPS=
+ SHARED_LIBS=
+-SHARED_LIBS_LINK_EXTS=
+-SHARED_LDFLAGS=
++SHARED_LIBS_LINK_EXTS=.so
++SHARED_LDFLAGS=-m64 -Wl,--version-script=openssl.ld
+ 
+ GENERAL=        Makefile
+ BASENAME=       openssl
+@@ -447,7 +448,8 @@
+ 	    echo 'Description: OpenSSL cryptography library'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libcrypto.pc
+ 
+ libssl.pc: Makefile
+@@ -460,7 +462,8 @@
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl'; \
++	    echo 'Libs.private: -lcrypto $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libssl.pc
+ 
+ openssl.pc: Makefile
+@@ -473,7 +476,8 @@
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries and tools'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > openssl.pc
+ 
+ Makefile: Makefile.org Configure config
+@@ -622,7 +626,7 @@
+ install_sw:
+ 	@$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR) \
+-		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/pkgconfig \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl \
+ 		$(INSTALL_PREFIX)$(OPENSSLDIR)/misc \
+@@ -700,7 +704,7 @@
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+@@ -717,7 +721,7 @@
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+Index: openssl-0.9.8m/Configure
+===================================================================
+--- openssl-0.9.8m.orig/Configure	2010-03-09 16:15:42.000000000 +0800
++++ openssl-0.9.8m/Configure	2010-03-09 20:18:16.566914027 +0800
+@@ -1,4 +1,4 @@
+-:
++#!/usr/local/bin/perl
+ eval 'exec perl -S $0 ${1+"$@"}'
+     if $running_under_some_shell;
+ ##
+@@ -326,6 +326,47 @@
+ "osf1-alpha-cc",  "cc:-std1 -tune host -O4 -readonly_strings::(unknown):::SIXTY_FOUR_BIT_LONG RC4_CHUNK:${no_asm}:dlfcn:alpha-osf1-shared:::.so",
+ "tru64-alpha-cc", "cc:-std1 -tune host -fast -readonly_strings::-pthread:::SIXTY_FOUR_BIT_LONG RC4_CHUNK:${no_asm}:dlfcn:alpha-osf1-shared::-msym:.so",
+ 
++# Debian GNU/* (various architectures)
++"debian-alpha","gcc:-DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-alpha-ev4","gcc:-DTERMIO -O3 -Wa,--noexecstack -mcpu=ev4 -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-alpha-ev5","gcc:-DTERMIO -O3 -Wa,--noexecstack -mcpu=ev5 -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-arm","gcc:-DL_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-armeb","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-armel","gcc:-DL_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++#"debian-amd64","gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-amd64", "gcc:-m64 -DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK RC4_CHAR BF_PTR2 DES_INT DES_UNROLL:${x86_64_asm}:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-kfreebsd-amd64","gcc:-m64 -DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK BF_PTR2 DES_INT DES_UNROLL:${x86_64_asm}:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++#"debian-freebsd-alpha","gcc:-DTERMIOS -O -Wa,--noexecstack -fomit-frame-pointer::(unknown):::SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_PTR DES_RISC2::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-kfreebsd-i386","gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-hppa","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG MD2_CHAR RC4_INDEX::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-hurd-i386","gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-ia64","gcc:-DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK RC4_CHAR:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++#"debian-i386","gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -fomit-frame-pointer -m486 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}::::::::::dlfcn:linux-shared:-fPIC",
++"debian-i386","gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i486","gcc:-DL_ENDIAN -DTERMIO -O3 -march=i486 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i586","gcc:-DL_ENDIAN -DTERMIO -O3 -march=i586 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i686/cmov","gcc:-DL_ENDIAN -DTERMIO -O3 -march=i686 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-m68k","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG MD2_CHAR RC4_INDEX::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-mips",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-mipsel",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-i386",	"gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-m68k",	"gcc:-DB_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -Wall::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX DES_UNROLL::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-sparc",	"gcc:-DB_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -mv8 -Wall::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX DES_UNROLL::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-alpha","gcc:-DTERMIOS -O3 -Wa,--noexecstack -g::(unknown):::SIXTY_FOUR_BIT_LONG DES_INT DES_PTR DES_RISC2::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-i386",  "gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_out_asm}:dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-mips","gcc:-O2 -Wa,--noexecstack -g -DL_ENDIAN::(unknown)::BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR DES_UNROLL DES_RISC2 DES_PTR BF_PTR:::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-powerpc","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_UNROLL DES_RISC2 DES_PTR MD2_CHAR RC4_INDEX::linux_ppc32.o::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-ppc64","gcc:-m64 -DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_RISC1 DES_UNROLL::linux_ppc64.o::::::::::dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-s390","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)", 
++"debian-sh3",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh4",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh3eb",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh4eb",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-m32r","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc-v8","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -mcpu=v8 -g -Wall -DBN_DIV2W::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR::sparcv8.o:des_enc-sparc.o fcrypt_b.o:::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc-v9","gcc:-DB_ENDIAN -DTERMIO -O3 -mcpu=v9 -Wa,--noexecstack -Wa,-Av8plus -g -Wall -DULTRASPARC -DBN_DIV2W::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR::sparcv8plus.o:des_enc-sparc.o fcrypt_b.o:::md5-sparcv8plus.o::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
+ ####
+ #### Variety of LINUX:-)
+ ####
+@@ -505,7 +546,7 @@
+ # Cygwin
+ "Cygwin-pre1.3", "gcc:-DTERMIOS -DL_ENDIAN -fomit-frame-pointer -O3 -m486 -Wall::(unknown):CYGWIN32::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${no_asm}:win32",
+ "Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -fomit-frame-pointer -O3 -march=i486 -Wall:::CYGWIN32::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_coff_asm}:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
+-"debug-Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -march=i486 -Wall -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DCRYPTO_MDEBUG -DOPENSSL_NO_ASM -g -Wformat -Wshadow -Wmissing-prototypes -Wmissing-declarations -Werror:::CYGWIN32:::${no_asm}:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
++-"debug-Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -march=i486 -Wall -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DCRYPTO_MDEBUG -DOPENSSL_NO_ASM -g -Wformat -Wshadow -Wmissing-prototypes -Wmissing-declarations -Werror:::CYGWIN32:::${no_asm}:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
+ 
+ # NetWare from David Ward (dsward@novell.com)
+ # requires either MetroWerks NLM development tools, or gcc / nlmconv
+@@ -1477,6 +1518,8 @@
+ 		}
+ 	}
+ 
++$shared_ldflag .= " -Wl,--version-script=openssl.ld";
++
+ open(IN,'<Makefile.org') || die "unable to read Makefile.org:$!\n";
+ unlink("$Makefile.new") || die "unable to remove old $Makefile.new:$!\n" if -e "$Makefile.new";
+ open(OUT,">$Makefile.new") || die "unable to create $Makefile.new:$!\n";
+@@ -1576,7 +1619,8 @@
+ 	elsif ($shared_extension ne "" && $shared_extension =~ /^\.s([ol])\.[^\.]*\.[^\.]*$/)
+ 		{
+ 		my $sotmp = $1;
+-		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp.\$(SHLIB_MAJOR) .s$sotmp/;
++#		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp.\$(SHLIB_MAJOR) .s$sotmp/;
++		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp/;
+ 		}
+ 	elsif ($shared_extension ne "" && $shared_extension =~ /^\.[^\.]*\.[^\.]*\.dylib$/)
+ 		{
+@@ -1706,7 +1750,7 @@
+ 		# $foo is to become "$prefix/lib$multilib/engines";
+ 		# as Makefile.org and engines/Makefile are adapted for
+ 		# $multilib suffix.
+-		my $foo = "$prefix/lib/engines";
++		my $foo = "$prefix/lib/ssl/engines";
+ 		$foo =~ s/\\/\\\\/g;
+ 		print OUT "#define ENGINESDIR \"$foo\"\n";
+ 		}
+Index: openssl-0.9.8m/config
+===================================================================
+--- openssl-0.9.8m.orig/config	2009-10-15 20:58:00.000000000 +0800
++++ openssl-0.9.8m/config	2010-03-09 20:16:50.506902007 +0800
+@@ -162,8 +162,8 @@
+ 	echo "${MACHINE}-whatever-linux1"; exit 0
+ 	;;
+ 
+-    GNU*)
+-	echo "hurd-x86"; exit 0;
++    GNU:*|GNU/*:*)
++	echo "${MACHINE}-gnuish"; exit 0;
+ 	;;
+ 
+     LynxOS:*)
+Index: openssl-0.9.8m/Makefile.org
+===================================================================
+--- openssl-0.9.8m.orig/Makefile.org	2010-03-09 16:15:42.000000000 +0800
++++ openssl-0.9.8m/Makefile.org	2010-03-09 20:18:44.095663922 +0800
+@@ -153,10 +153,11 @@
+ 
+ MAKEFILE= Makefile
+ 
+-MANDIR=$(OPENSSLDIR)/man
++MANDIR=/usr/share/man
+ MAN1=1
+ MAN3=3
+-MANSUFFIX=
++MANSUFFIX=ssl
++MANSECTION=SSL
+ SHELL=/bin/sh
+ 
+ TOP=    .
+@@ -445,7 +446,8 @@
+ 	    echo 'Description: OpenSSL cryptography library'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libcrypto.pc
+ 
+ libssl.pc: Makefile
+@@ -458,7 +460,8 @@
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl'; \
++	    echo 'Libs.private: -lcrypto $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libssl.pc
+ 
+ openssl.pc: Makefile
+@@ -471,7 +474,8 @@
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries and tools'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > openssl.pc
+ 
+ Makefile: Makefile.org Configure config
+@@ -620,7 +624,7 @@
+ install_sw:
+ 	@$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR) \
+-		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/pkgconfig \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl \
+ 		$(INSTALL_PREFIX)$(OPENSSLDIR)/misc \
+@@ -698,7 +702,7 @@
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+@@ -715,7 +719,7 @@
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+Index: openssl-0.9.8m/openssl.ld
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ openssl-0.9.8m/openssl.ld	2010-03-09 20:16:50.506902007 +0800
+@@ -0,0 +1,5 @@
++OPENSSL_0.9.8 {
++	 global:
++		 *;
++};
++
+Index: openssl-0.9.8m/apps/s_time.c
+===================================================================
+--- openssl-0.9.8m.orig/apps/s_time.c	2003-12-27 22:40:17.000000000 +0800
++++ openssl-0.9.8m/apps/s_time.c	2010-03-09 20:16:50.516901237 +0800
+@@ -117,6 +117,7 @@
+ 
+ /* The following if from times(3) man page.  It may need to be changed
+ */
++#undef HZ
+ #ifndef HZ
+ # ifdef _SC_CLK_TCK
+ #  define HZ ((double)sysconf(_SC_CLK_TCK))
+Index: openssl-0.9.8m/engines/openssl.ld
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ openssl-0.9.8m/engines/openssl.ld	2010-03-09 20:16:50.516901237 +0800
+@@ -0,0 +1,5 @@
++OPENSSL_0.9.8 {
++	 global:
++		 *;
++};
++
+Index: openssl-0.9.8m/doc/Makefile
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ openssl-0.9.8m/doc/Makefile	2010-03-09 20:16:50.516901237 +0800
+@@ -0,0 +1,40 @@
++VERSION =
++
++#PODS = $(wildcard *.pod)
++#MANS = $(addsuffix .man, $(basename $(PODS)))
++
++MANS = openssl.1 ssl.3 crypto.3
++
++P2M = pod2man --center='OpenSSL Documentation' --release="OpenSSL $(VERSION)"
++
++all: manpages
++
++.PHONY: manpages 
++
++manpages: openssl.1 crypto.3 ssl.3
++
++openssl.1:
++	$(P2M) --section=1 openssl.pod > openssl.1
++
++crypto.3:
++	$(P2M) --section=3 crypto.pod > crypto.3
++
++ssl.3:
++	$(P2M) --section=3 ssl.pod > ssl.3
++
++.PHONY: install
++install:
++	mkdir -p $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man1
++	mkdir -p $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	install -m 644 -p openssl.1 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man1
++	install -m 644 -p crypto.3 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	install -m 644 -p ssl.3 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	rm -f $(MANS)
++
++.PHONY: clean
++clean:
++	rm -f $(MANS)
++
++.PHONY: realclean
++realclean:
++	-$(MAKE) clean
+Index: openssl-0.9.8m/doc/apps/c_rehash.pod
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ openssl-0.9.8m/doc/apps/c_rehash.pod	2010-03-09 20:16:50.516901237 +0800
+@@ -0,0 +1,55 @@
++
++=pod
++
++=head1 NAME
++
++c_rehash - Create symbolic links to files named by the hash values
++
++=head1 SYNOPSIS
++
++B<c_rehash>
++[directory] ...
++
++=head1 DESCRIPTION
++
++c_rehash scans directories and takes a hash value of each .pem and .crt file in the directory. It then creates symbolic links for each of the files named by the hash value. This is useful as many programs require directories to be set up like this in order to find the certificates they require. 
++
++If any directories are named on the command line then these directories are processed in turn. If not then and the environment variable SSL_CERT_DIR is defined then that is consulted. This variable should be a colon (:) separated list of directories, all of which will be processed. If neither of these conditions are true then /usr/lib/ssl/certs is processed. 
++
++For each directory that is to be processed he user must have write permissions on the directory, if they do not then nothing will be printed for that directory.
++
++Note that this program deletes all the symbolic links that look like ones that it creates before processing a directory. Beware that if you run the program on a directory that contains symbolic links for other purposes that are named in the same format as those created by this program they will be lost.
++
++The hashes for certificate files are of the form <hash>.<n> where n is an integer. If the hash value already exists then n will be incremented, unless the file is a duplicate. Duplicates are detected using the fingerprint of the certificate. A warning will be printed if a duplicate is detected. The hashes for CRL files are of the form <hash>.r<n> and have the same behavior.
++
++The program will also warn if there are files with extension .pem which are not certificate or CRL files.
++
++The program uses the openssl program to compute the hashes and fingerprints. It expects the executable to be named openssl and be on the PATH, or in the /usr/lib/ssl/bin directory. If the OPENSSL environment variable is defined then this is used instead as the executable that provides the hashes and fingerprints. When called as $OPENSSL x509 -hash -fingerprint -noout -in $file it must output the hash of $file on the first line followed by the fingerprint on the second line, optionally prefixed with some text and an equals sign (=). 
++
++=head1 OPTIONS
++
++None
++
++=head1 ENVIRONMENT
++
++=over 4
++
++=item B<OPENSSL>
++
++The name (and path) of an executable to use to generate hashes and fingerprints (see above).
++
++=item B<SSL_CERT_DIR>
++
++Colon separated list of directories to operate on. Ignored if directories are listed on the command line.
++
++=head1 SEE ALSO
++
++L<openssl(1)|openssl(1)>, L<x509(1)|x509(1)>
++
++=back
++
++=head1 BUGS
++
++No known bugs
++
++=cut
+Index: openssl-0.9.8m/crypto/Makefile
+===================================================================
+--- openssl-0.9.8m.orig/crypto/Makefile	2010-03-09 16:15:42.000000000 +0800
++++ openssl-0.9.8m/crypto/Makefile	2010-03-09 20:16:50.516901237 +0800
+@@ -57,7 +57,7 @@
+ 	echo "  #define DATE \"`LC_ALL=C LC_TIME=C date`\""; \
+ 	echo '#endif' ) >buildinf.h
+ 
+-x86cpuid-elf.s:	x86cpuid.pl perlasm/x86asm.pl
++x86cpuid-elf.S:	x86cpuid.pl perlasm/x86asm.pl
+ 	$(PERL) x86cpuid.pl elf $(CFLAGS) $(PROCESSOR) > $@
+ x86cpuid-cof.s: x86cpuid.pl perlasm/x86asm.pl
+ 	$(PERL) x86cpuid.pl coff $(CFLAGS) $(PROCESSOR) > $@
+@@ -70,7 +70,7 @@
+ uplink-cof.s:	../ms/uplink.pl
+ 	$(PERL) ../ms/uplink.pl coff > $@
+ 
+-x86_64cpuid.s: x86_64cpuid.pl
++x86_64cpuid.S: x86_64cpuid.pl
+ 	$(PERL) x86_64cpuid.pl $@
+ ia64cpuid.s: ia64cpuid.S
+ 	$(CC) $(CFLAGS) -E ia64cpuid.S > $@
+Index: openssl-0.9.8m/crypto/opensslconf.h
+===================================================================
+--- openssl-0.9.8m.orig/crypto/opensslconf.h	2010-02-26 01:21:14.000000000 +0800
++++ openssl-0.9.8m/crypto/opensslconf.h	2010-03-09 20:16:50.516901237 +0800
+@@ -20,6 +20,9 @@
+ #ifndef OPENSSL_NO_JPAKE
+ # define OPENSSL_NO_JPAKE
+ #endif
++#ifndef OPENSSL_NO_IDEA
++# define OPENSSL_NO_IDEA
++#endif
+ #ifndef OPENSSL_NO_KRB5
+ # define OPENSSL_NO_KRB5
+ #endif
+@@ -62,6 +65,9 @@
+ # if defined(OPENSSL_NO_JPAKE) && !defined(NO_JPAKE)
+ #  define NO_JPAKE
+ # endif
++# if defined(OPENSSL_NO_IDEA) && !defined(NO_IDEA)
++#  define NO_IDEA
++# endif
+ # if defined(OPENSSL_NO_KRB5) && !defined(NO_KRB5)
+ #  define NO_KRB5
+ # endif
+@@ -101,8 +107,8 @@
+ 
+ #if !(defined(VMS) || defined(__VMS)) /* VMS uses logical names instead */
+ #if defined(HEADER_CRYPTLIB_H) && !defined(OPENSSLDIR)
+-#define ENGINESDIR "/usr/local/ssl/lib/engines"
+-#define OPENSSLDIR "/usr/local/ssl"
++#define ENGINESDIR "/usr/lib/ssl/engines"
++#define OPENSSLDIR "/usr/lib/ssl"
+ #endif
+ #endif
+ 
+@@ -133,14 +139,14 @@
+  * - Intel P6 because partial register stalls are very expensive;
+  * - elder Alpha because it lacks byte load/store instructions;
+  */
+-#define RC4_INT unsigned int
++#define RC4_INT unsigned char
+ #endif
+ #if !defined(RC4_CHUNK)
+ /*
+  * This enables code handling data aligned at natural CPU word
+  * boundary. See crypto/rc4/rc4_enc.c for further details.
+  */
+-#undef RC4_CHUNK
++#define RC4_CHUNK unsigned long
+ #endif
+ #endif
+ 
+@@ -148,7 +154,7 @@
+ /* If this is set to 'unsigned int' on a DEC Alpha, this gives about a
+  * %20 speed up (longs are 8 bytes, int's are 4). */
+ #ifndef DES_LONG
+-#define DES_LONG unsigned long
++#define DES_LONG unsigned int
+ #endif
+ #endif
+ 
+@@ -162,9 +168,9 @@
+ /* The prime number generation stuff may not work when
+  * EIGHT_BIT but I don't care since I've only used this mode
+  * for debuging the bignum libraries */
+-#undef SIXTY_FOUR_BIT_LONG
++#define SIXTY_FOUR_BIT_LONG
+ #undef SIXTY_FOUR_BIT
+-#define THIRTY_TWO_BIT
++#undef THIRTY_TWO_BIT
+ #undef SIXTEEN_BIT
+ #undef EIGHT_BIT
+ #endif
+@@ -178,7 +184,7 @@
+ 
+ #if defined(HEADER_BF_LOCL_H) && !defined(CONFIG_HEADER_BF_LOCL_H)
+ #define CONFIG_HEADER_BF_LOCL_H
+-#undef BF_PTR
++#define BF_PTR2
+ #endif /* HEADER_BF_LOCL_H */
+ 
+ #if defined(HEADER_DES_LOCL_H) && !defined(CONFIG_HEADER_DES_LOCL_H)
+@@ -208,7 +214,7 @@
+ /* Unroll the inner loop, this sometimes helps, sometimes hinders.
+  * Very mucy CPU dependant */
+ #ifndef DES_UNROLL
+-#undef DES_UNROLL
++#define DES_UNROLL
+ #endif
+ 
+ /* These default values were supplied by
+Index: openssl-0.9.8m/crypto/sha/sha.h
+===================================================================
+--- openssl-0.9.8m.orig/crypto/sha/sha.h	2008-09-16 18:47:28.000000000 +0800
++++ openssl-0.9.8m/crypto/sha/sha.h	2010-03-09 20:16:50.516901237 +0800
+@@ -59,6 +59,7 @@
+ #ifndef HEADER_SHA_H
+ #define HEADER_SHA_H
+ 
++#include <stddef.h>
+ #include <openssl/e_os2.h>
+ #include <stddef.h>
+ 
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/oe-ldflags.patch b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/oe-ldflags.patch
new file mode 100644
index 0000000000..3a2fae64d3
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/oe-ldflags.patch
@@ -0,0 +1,21 @@
+diff -urN openssl-0.9.8j.orig/Makefile.shared openssl-0.9.8j/Makefile.shared
+--- openssl-0.9.8j.orig/Makefile.shared	2008-09-17 15:56:40.000000000 +0000
++++ openssl-0.9.8j/Makefile.shared	2009-04-02 13:44:48.000000000 +0000
+@@ -90,7 +90,7 @@
+ LINK_APP=	\
+   ( $(SET_X);   \
+     LIBDEPS="$${LIBDEPS:-$(LIBDEPS)}"; \
+-    LDCMD="$${LDCMD:-$(CC)}"; LDFLAGS="$${LDFLAGS:-$(CFLAGS)}"; \
++    LDCMD="$${LDCMD:-$(CC)}"; LDFLAGS="$(OE_LDFLAGS) $${LDFLAGS:-$(CFLAGS)}"; \
+     LIBPATH=`for x in $$LIBDEPS; do if echo $$x | grep '^ *-L' > /dev/null 2>&1; then echo $$x | sed -e 's/^ *-L//'; fi; done | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
+@@ -100,7 +100,7 @@
+   ( $(SET_X);   \
+     LIBDEPS="$${LIBDEPS:-$(LIBDEPS)}"; \
+     SHAREDCMD="$${SHAREDCMD:-$(CC)}"; \
+-    SHAREDFLAGS="$${SHAREDFLAGS:-$(CFLAGS) $(SHARED_LDFLAGS)}"; \
++    SHAREDFLAGS="$(OE_LDFLAGS) $${SHAREDFLAGS:-$(CFLAGS) $(SHARED_LDFLAGS)}"; \
+     LIBPATH=`for x in $$LIBDEPS; do if echo $$x | grep '^ *-L' > /dev/null 2>&1; then echo $$x | sed -e 's/^ *-L//'; fi; done | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/shared-libs.patch b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/shared-libs.patch
new file mode 100644
index 0000000000..0aaef169c6
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-0.9.8m/shared-libs.patch
@@ -0,0 +1,48 @@
+Index: openssl-0.9.8m/crypto/Makefile
+===================================================================
+--- openssl-0.9.8m.orig/crypto/Makefile	2008-09-18 01:10:55.000000000 +0800
++++ openssl-0.9.8m/crypto/Makefile	2010-03-09 16:13:16.055652727 +0800
+@@ -103,7 +103,7 @@
+ 
+ shared: buildinf.h lib subdirs
+ 	if [ -n "$(SHARED_LIBS)" ]; then \
+-		(cd ..; $(MAKE) $(SHARED_LIB)); \
++		(cd ..; $(MAKE) -e $(SHARED_LIB)); \
+ 	fi
+ 
+ libs:
+Index: openssl-0.9.8m/Makefile.org
+===================================================================
+--- openssl-0.9.8m.orig/Makefile.org	2010-01-28 00:06:36.000000000 +0800
++++ openssl-0.9.8m/Makefile.org	2010-03-09 16:14:22.065664019 +0800
+@@ -355,7 +355,7 @@
+ 	@if [ "$(SHLIB_TARGET)" != "" ]; then \
+ 		if [ "$(FIPSCANLIB)" = "libfips" ]; then \
+ 			$(ARD) libcrypto.a fipscanister.o ; \
+-			$(MAKE) SHLIBDIRS='crypto' SHLIBDEPS='-lfips' build-shared; \
++			$(MAKE) -e SHLIBDIRS='crypto' SHLIBDEPS='-lfips' build-shared; \
+ 			$(AR) libcrypto.a fips/fipscanister.o ; \
+ 		else \
+ 			if [ "$(FIPSCANLIB)" = "libcrypto" ]; then \
+@@ -373,7 +373,7 @@
+ 	@if [ "$(SHLIB_TARGET)" != "" ]; then \
+ 		shlibdeps=-lcrypto; \
+ 		[ "$(FIPSCANLIB)" = "libfips" ] && shlibdeps="$$shlibdeps -lfips"; \
+-		$(MAKE) SHLIBDIRS=ssl SHLIBDEPS="$$shlibdeps" build-shared; \
++		$(MAKE) -e SHLIBDIRS=ssl SHLIBDEPS="$$shlibdeps" build-shared; \
+ 	else \
+ 		echo "There's no support for shared libraries on this platform" >&2 ; \
+ 		exit 1; \
+Index: openssl-0.9.8m/ssl/Makefile
+===================================================================
+--- openssl-0.9.8m.orig/ssl/Makefile	2010-01-21 00:35:30.000000000 +0800
++++ openssl-0.9.8m/ssl/Makefile	2010-03-09 16:13:16.065664772 +0800
+@@ -62,7 +62,7 @@
+ 
+ shared: lib
+ 	if [ -n "$(SHARED_LIBS)" ]; then \
+-		(cd ..; $(MAKE) $(SHARED_LIB)); \
++		(cd ..; $(MAKE) -e $(SHARED_LIB)); \
+ 	fi
+ 
+ files:
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/configure-targets.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/configure-targets.patch
new file mode 100644
index 0000000000..22f8743e7f
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/configure-targets.patch
@@ -0,0 +1,31 @@
+
+The number of colons are important :)
+
+
+Index: openssl-1.0.0a/Configure
+===================================================================
+--- openssl-1.0.0a.orig/Configure
++++ openssl-1.0.0a/Configure
+@@ -380,6 +380,22 @@ my %table=(
+ "linux-alpha-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${alpha_asm}",
+ "linux-alpha+bwx-ccc","ccc:-fast -readonly_strings -DL_ENDIAN -DTERMIO::-D_REENTRANT:::SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_INT DES_PTR DES_RISC1 DES_UNROLL:${alpha_asm}",
+ 
++ # Linux on ARM
++"linux-elf-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-elf-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-gnueabi-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-gnueabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibceabi-arm","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-uclibceabi-armeb","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
++"linux-avr32","$ENV{'CC'}:-DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).",
++
++#### Linux on MIPS/MIPS64
++"linux-mips","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-mips64","$ENV{'CC'}:-DB_ENDIAN -DTERMIO -mabi=64 -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-mips64el","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -mabi=64 -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"linux-mipsel","$ENV{'CC'}:-DL_ENDIAN -DTERMIO -O3 -fomit-frame-pointer -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
+ #### *BSD [do see comment about ${BSDthreads} above!]
+ "BSD-generic32","gcc:-DTERMIOS -O3 -fomit-frame-pointer -Wall::${BSDthreads}:::BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL:${no_asm}:dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
+ "BSD-x86",	"gcc:-DL_ENDIAN -DTERMIOS -O3 -fomit-frame-pointer -Wall::${BSDthreads}:::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_asm}:a.out:dlfcn:bsd-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/debian.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/debian.patch
new file mode 100644
index 0000000000..1cd6e11966
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/debian.patch
@@ -0,0 +1,515 @@
+Index: openssl-1.0.0/Makefile
+===================================================================
+--- openssl-1.0.0.orig/Makefile
++++ openssl-1.0.0/Makefile
+@@ -26,10 +26,10 @@ HERE=.
+ # for, say, /usr/ and yet have everything installed to /tmp/somedir/usr/.
+ # Normally it is left empty.
+ INSTALL_PREFIX=
+-INSTALLTOP=/usr/local/ssl
++INSTALLTOP=/usr
+ 
+ # Do not edit this manually. Use Configure --openssldir=DIR do change this!
+-OPENSSLDIR=/usr/local/ssl
++OPENSSLDIR=/usr/lib/ssl
+ 
+ # NO_IDEA - Define to build without the IDEA algorithm
+ # NO_RC4  - Define to build without the RC4 algorithm
+@@ -133,12 +133,13 @@ TESTS = alltests
+ 
+ MAKEFILE= Makefile
+ 
+-MANDIR=$(OPENSSLDIR)/man
++MANDIR=/usr/share/man
+ MAN1=1
+ MAN3=3
+-MANSUFFIX=
++MANSUFFIX=ssl
++MANSECTION=SSL
+ HTMLSUFFIX=html
+-HTMLDIR=$(OPENSSLDIR)/html
++HTMLDIR=/usr/share/doc/openssl/html
+ SHELL=/bin/sh
+ 
+ TOP=    .
+@@ -149,8 +150,8 @@ LIBS=   libcrypto.a libssl.a
+ SHARED_CRYPTO=libcrypto$(SHLIB_EXT)
+ SHARED_SSL=libssl$(SHLIB_EXT)
+ SHARED_LIBS=
+-SHARED_LIBS_LINK_EXTS=
+-SHARED_LDFLAGS=
++SHARED_LIBS_LINK_EXTS=.so
++SHARED_LDFLAGS=-m64 -Wl,--version-script=openssl.ld
+ 
+ GENERAL=        Makefile
+ BASENAME=       openssl
+@@ -324,7 +325,8 @@ libcrypto.pc: Makefile
+ 	    echo 'Description: OpenSSL cryptography library'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libcrypto.pc
+ 
+ libssl.pc: Makefile
+@@ -337,7 +339,8 @@ libssl.pc: Makefile
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl'; \
++	    echo 'Libs.private: -lcrypto $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libssl.pc
+ 
+ openssl.pc: Makefile
+@@ -350,7 +353,8 @@ openssl.pc: Makefile
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries and tools'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > openssl.pc
+ 
+ Makefile: Makefile.org Configure config
+@@ -499,7 +503,7 @@ install: all install_docs install_sw
+ install_sw:
+ 	@$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR) \
+-		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/pkgconfig \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl \
+ 		$(INSTALL_PREFIX)$(OPENSSLDIR)/misc \
+@@ -608,7 +612,7 @@ install_docs:
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+@@ -625,7 +629,7 @@ install_docs:
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+Index: openssl-1.0.0/Configure
+===================================================================
+--- openssl-1.0.0.orig/Configure
++++ openssl-1.0.0/Configure
+@@ -1,4 +1,4 @@
+-:
++#!/usr/local/bin/perl
+ eval 'exec perl -S $0 ${1+"$@"}'
+     if $running_under_some_shell;
+ ##
+@@ -331,6 +331,44 @@ my %table=(
+ "osf1-alpha-cc",  "cc:-std1 -tune host -O4 -readonly_strings::(unknown):::SIXTY_FOUR_BIT_LONG RC4_CHUNK:${alpha_asm}:dlfcn:alpha-osf1-shared:::.so",
+ "tru64-alpha-cc", "cc:-std1 -tune host -fast -readonly_strings::-pthread:::SIXTY_FOUR_BIT_LONG RC4_CHUNK:${alpha_asm}:dlfcn:alpha-osf1-shared::-msym:.so",
+ 
++# Debian GNU/* (various architectures)
++"debian-alpha","gcc:-DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-alpha-ev4","gcc:-DTERMIO -O3 -Wa,--noexecstack -mcpu=ev4 -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-alpha-ev5","gcc:-DTERMIO -O3 -Wa,--noexecstack -mcpu=ev5 -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK DES_RISC1 DES_UNROLL:${no_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-arm","gcc:-DL_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-armeb","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-armel","gcc:-DL_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_RISC1:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-amd64", "gcc:-m64 -DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK RC4_CHAR BF_PTR2 DES_INT DES_UNROLL:${x86_64_asm}:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-kfreebsd-amd64","gcc:-m64 -DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -Wall -DMD32_REG_T=int::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK BF_PTR2 DES_INT DES_UNROLL:${x86_64_asm}:dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-kfreebsd-i386","gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-hppa","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG MD2_CHAR RC4_INDEX:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-hurd-i386","gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-ia64","gcc:-DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHUNK RC4_CHAR:${ia64_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386","gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i486","gcc:-DL_ENDIAN 	-DTERMIO -fexpensive-optimizations -frename-registers -fomit-frame-pointer -O2 -ggdb3 -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i586","gcc:-DL_ENDIAN -DTERMIO -O3 -march=i586 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-i386-i686/cmov","gcc:-DL_ENDIAN -DTERMIO -O3 -march=i686 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-m68k","gcc:-DB_ENDIAN -DTERMIO -O2 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG MD2_CHAR RC4_INDEX:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-mips",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-mipsel",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC2_CHAR RC4_INDEX DES_INT DES_UNROLL DES_RISC2:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-i386",	"gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486 -Wall::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:::::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-m68k",	"gcc:-DB_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -Wall::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX DES_UNROLL:::::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-netbsd-sparc",	"gcc:-DB_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -mv8 -Wall::(unknown):::BN_LLONG MD2_CHAR RC4_INDEX DES_UNROLL:::::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-alpha","gcc:-DTERMIOS -O3 -Wa,--noexecstack -g::(unknown):::SIXTY_FOUR_BIT_LONG DES_INT DES_PTR DES_RISC2:::::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-i386",  "gcc:-DL_ENDIAN -DTERMIOS -O3 -Wa,--noexecstack -g -m486::(unknown):::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-openbsd-mips","gcc:-O2 -Wa,--noexecstack -g -DL_ENDIAN::(unknown)::BN_LLONG MD2_CHAR RC4_INDEX RC4_CHAR DES_UNROLL DES_RISC2 DES_PTR BF_PTR::::::::::::::::dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-powerpc","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG DES_UNROLL DES_RISC2 DES_PTR MD2_CHAR RC4_INDEX::linux_ppc32.o:::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-ppc64","gcc:-m64 -DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:SIXTY_FOUR_BIT_LONG RC4_CHAR RC4_CHUNK DES_RISC1 DES_UNROLL::linux_ppc64.o:::::::::::::dlfcn:linux-shared:-fPIC:-m64:.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-s390","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)", 
++"debian-sh3",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh4",   "gcc:-DL_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh3eb",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sh4eb",   "gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-m32r","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -g -Wall::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR:::::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc-v8","gcc:-DB_ENDIAN -DTERMIO -O3 -Wa,--noexecstack -mcpu=v8 -g -Wall -DBN_DIV2W::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR::sparcv8.o:des_enc-sparc.o fcrypt_b.o::::::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++"debian-sparc-v9","gcc:-DB_ENDIAN -DTERMIO -O3 -mcpu=v9 -Wa,--noexecstack -Wa,-Av8plus -g -Wall -DULTRASPARC -DBN_DIV2W::-D_REENTRANT::-ldl:BN_LLONG RC4_CHAR RC4_CHUNK DES_UNROLL BF_PTR::sparcv8plus.o:des_enc-sparc.o fcrypt_b.o:::md5-sparcv8plus.o:::::::::dlfcn:linux-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)",
++
+ ####
+ #### Variety of LINUX:-)
+ ####
+@@ -529,7 +567,7 @@ my %table=(
+ # Cygwin
+ "Cygwin-pre1.3", "gcc:-DTERMIOS -DL_ENDIAN -fomit-frame-pointer -O3 -m486 -Wall::(unknown):CYGWIN32::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${no_asm}:win32",
+ "Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -fomit-frame-pointer -O3 -march=i486 -Wall:::CYGWIN32::BN_LLONG ${x86_gcc_des} ${x86_gcc_opts}:${x86_asm}:coff:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
+-"debug-Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -march=i486 -Wall -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DOPENSSL_NO_ASM -g -Wformat -Wshadow -Wmissing-prototypes -Wmissing-declarations -Werror:::CYGWIN32:::${no_asm}:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
++-"debug-Cygwin", "gcc:-DTERMIOS -DL_ENDIAN -march=i486 -Wall -DBN_DEBUG -DREF_CHECK -DCONF_DEBUG -DBN_CTX_DEBUG -DCRYPTO_MDEBUG -DOPENSSL_NO_ASM -g -Wformat -Wshadow -Wmissing-prototypes -Wmissing-declarations -Werror:::CYGWIN32:::${no_asm}:dlfcn:cygwin-shared:-D_WINDLL:-shared:.dll.a",
+ 
+ # NetWare from David Ward (dsward@novell.com)
+ # requires either MetroWerks NLM development tools, or gcc / nlmconv
+@@ -1465,6 +1503,8 @@ if ($strict_warnings)
+ 		}
+ 	}
+ 
++$shared_ldflag .= " -Wl,--version-script=openssl.ld";
++
+ open(IN,'<Makefile.org') || die "unable to read Makefile.org:$!\n";
+ unlink("$Makefile.new") || die "unable to remove old $Makefile.new:$!\n" if -e "$Makefile.new";
+ open(OUT,">$Makefile.new") || die "unable to create $Makefile.new:$!\n";
+@@ -1555,7 +1595,8 @@ while (<IN>)
+ 	elsif ($shared_extension ne "" && $shared_extension =~ /^\.s([ol])\.[^\.]*\.[^\.]*$/)
+ 		{
+ 		my $sotmp = $1;
+-		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp.\$(SHLIB_MAJOR) .s$sotmp/;
++#		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp.\$(SHLIB_MAJOR) .s$sotmp/;
++		s/^SHARED_LIBS_LINK_EXTS=.*/SHARED_LIBS_LINK_EXTS=.s$sotmp/;
+ 		}
+ 	elsif ($shared_extension ne "" && $shared_extension =~ /^\.[^\.]*\.[^\.]*\.dylib$/)
+ 		{
+@@ -1683,7 +1724,7 @@ while (<IN>)
+ 		}
+ 	elsif	(/^#define\s+ENGINESDIR/)
+ 		{
+-		my $foo = "$prefix/$libdir/engines";
++		my $foo = "$prefix/lib/ssl/engines";
+ 		$foo =~ s/\\/\\\\/g;
+ 		print OUT "#define ENGINESDIR \"$foo\"\n";
+ 		}
+Index: openssl-1.0.0/config
+===================================================================
+--- openssl-1.0.0.orig/config
++++ openssl-1.0.0/config
+@@ -170,8 +170,8 @@ case "${SYSTEM}:${RELEASE}:${VERSION}:${
+ 	echo "${MACHINE}-whatever-linux1"; exit 0
+ 	;;
+ 
+-    GNU*)
+-	echo "hurd-x86"; exit 0;
++    GNU:*|GNU/*:*)
++	echo "${MACHINE}-gnuish"; exit 0;
+ 	;;
+ 
+     LynxOS:*)
+Index: openssl-1.0.0/Makefile.org
+===================================================================
+--- openssl-1.0.0.orig/Makefile.org
++++ openssl-1.0.0/Makefile.org
+@@ -131,12 +131,13 @@ TESTS = alltests
+ 
+ MAKEFILE= Makefile
+ 
+-MANDIR=$(OPENSSLDIR)/man
++MANDIR=/usr/share/man
+ MAN1=1
+ MAN3=3
+-MANSUFFIX=
++MANSUFFIX=ssl
++MANSECTION=SSL
+ HTMLSUFFIX=html
+-HTMLDIR=$(OPENSSLDIR)/html
++HTMLDIR=/usr/share/doc/openssl/html
+ SHELL=/bin/sh
+ 
+ TOP=    .
+@@ -322,7 +323,8 @@ libcrypto.pc: Makefile
+ 	    echo 'Description: OpenSSL cryptography library'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libcrypto.pc
+ 
+ libssl.pc: Makefile
+@@ -335,7 +337,8 @@ libssl.pc: Makefile
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl'; \
++	    echo 'Libs.private: -lcrypto $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > libssl.pc
+ 
+ openssl.pc: Makefile
+@@ -348,7 +351,8 @@ openssl.pc: Makefile
+ 	    echo 'Description: Secure Sockets Layer and cryptography libraries and tools'; \
+ 	    echo 'Version: '$(VERSION); \
+ 	    echo 'Requires: '; \
+-	    echo 'Libs: -L$${libdir} -lssl -lcrypto $(EX_LIBS)'; \
++	    echo 'Libs: -L$${libdir} -lssl -lcrypto'; \
++	    echo 'Libs.private: $(EX_LIBS)'; \
+ 	    echo 'Cflags: -I$${includedir} $(KRB5_INCLUDES)' ) > openssl.pc
+ 
+ Makefile: Makefile.org Configure config
+@@ -497,7 +501,7 @@ install: all install_docs install_sw
+ install_sw:
+ 	@$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR) \
+-		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines \
++		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/pkgconfig \
+ 		$(INSTALL_PREFIX)$(INSTALLTOP)/include/openssl \
+ 		$(INSTALL_PREFIX)$(OPENSSLDIR)/misc \
+@@ -606,7 +610,7 @@ install_docs:
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+@@ -623,7 +627,7 @@ install_docs:
+ 		echo "installing man$$sec/$$fn.$${sec}$(MANSUFFIX)"; \
+ 		(cd `$(PERL) util/dirname.pl $$i`; \
+ 		sh -c "$$pod2man \
+-			--section=$$sec --center=OpenSSL \
++			--section=$${sec}$(MANSECTION) --center=OpenSSL \
+ 			--release=$(VERSION) `basename $$i`") \
+ 			>  $(INSTALL_PREFIX)$(MANDIR)/man$$sec/$$fn.$${sec}$(MANSUFFIX); \
+ 		$(PERL) util/extract-names.pl < $$i | \
+Index: openssl-1.0.0/openssl.ld
+===================================================================
+--- /dev/null
++++ openssl-1.0.0/openssl.ld
+@@ -0,0 +1,5 @@
++OPENSSL_0.9.8 {
++	 global:
++		 *;
++};
++
+Index: openssl-1.0.0/engines/openssl.ld
+===================================================================
+--- /dev/null
++++ openssl-1.0.0/engines/openssl.ld
+@@ -0,0 +1,5 @@
++OPENSSL_0.9.8 {
++	 global:
++		 *;
++};
++
+Index: openssl-1.0.0/doc/Makefile
+===================================================================
+--- /dev/null
++++ openssl-1.0.0/doc/Makefile
+@@ -0,0 +1,40 @@
++VERSION =
++
++#PODS = $(wildcard *.pod)
++#MANS = $(addsuffix .man, $(basename $(PODS)))
++
++MANS = openssl.1 ssl.3 crypto.3
++
++P2M = pod2man --center='OpenSSL Documentation' --release="OpenSSL $(VERSION)"
++
++all: manpages
++
++.PHONY: manpages 
++
++manpages: openssl.1 crypto.3 ssl.3
++
++openssl.1:
++	$(P2M) --section=1 openssl.pod > openssl.1
++
++crypto.3:
++	$(P2M) --section=3 crypto.pod > crypto.3
++
++ssl.3:
++	$(P2M) --section=3 ssl.pod > ssl.3
++
++.PHONY: install
++install:
++	mkdir -p $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man1
++	mkdir -p $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	install -m 644 -p openssl.1 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man1
++	install -m 644 -p crypto.3 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	install -m 644 -p ssl.3 $(INSTALL_PREFIX)$(INSTALLTOP)/share/man/man3
++	rm -f $(MANS)
++
++.PHONY: clean
++clean:
++	rm -f $(MANS)
++
++.PHONY: realclean
++realclean:
++	-$(MAKE) clean
+Index: openssl-1.0.0/doc/apps/c_rehash.pod
+===================================================================
+--- /dev/null
++++ openssl-1.0.0/doc/apps/c_rehash.pod
+@@ -0,0 +1,55 @@
++
++=pod
++
++=head1 NAME
++
++c_rehash - Create symbolic links to files named by the hash values
++
++=head1 SYNOPSIS
++
++B<c_rehash>
++[directory] ...
++
++=head1 DESCRIPTION
++
++c_rehash scans directories and takes a hash value of each .pem and .crt file in the directory. It then creates symbolic links for each of the files named by the hash value. This is useful as many programs require directories to be set up like this in order to find the certificates they require. 
++
++If any directories are named on the command line then these directories are processed in turn. If not then and the environment variable SSL_CERT_DIR is defined then that is consulted. This variable should be a colon (:) separated list of directories, all of which will be processed. If neither of these conditions are true then /usr/lib/ssl/certs is processed. 
++
++For each directory that is to be processed he user must have write permissions on the directory, if they do not then nothing will be printed for that directory.
++
++Note that this program deletes all the symbolic links that look like ones that it creates before processing a directory. Beware that if you run the program on a directory that contains symbolic links for other purposes that are named in the same format as those created by this program they will be lost.
++
++The hashes for certificate files are of the form <hash>.<n> where n is an integer. If the hash value already exists then n will be incremented, unless the file is a duplicate. Duplicates are detected using the fingerprint of the certificate. A warning will be printed if a duplicate is detected. The hashes for CRL files are of the form <hash>.r<n> and have the same behavior.
++
++The program will also warn if there are files with extension .pem which are not certificate or CRL files.
++
++The program uses the openssl program to compute the hashes and fingerprints. It expects the executable to be named openssl and be on the PATH, or in the /usr/lib/ssl/bin directory. If the OPENSSL environment variable is defined then this is used instead as the executable that provides the hashes and fingerprints. When called as $OPENSSL x509 -hash -fingerprint -noout -in $file it must output the hash of $file on the first line followed by the fingerprint on the second line, optionally prefixed with some text and an equals sign (=). 
++
++=head1 OPTIONS
++
++None
++
++=head1 ENVIRONMENT
++
++=over 4
++
++=item B<OPENSSL>
++
++The name (and path) of an executable to use to generate hashes and fingerprints (see above).
++
++=item B<SSL_CERT_DIR>
++
++Colon separated list of directories to operate on. Ignored if directories are listed on the command line.
++
++=head1 SEE ALSO
++
++L<openssl(1)|openssl(1)>, L<x509(1)|x509(1)>
++
++=back
++
++=head1 BUGS
++
++No known bugs
++
++=cut
+Index: openssl-1.0.0/crypto/opensslconf.h
+===================================================================
+--- openssl-1.0.0.orig/crypto/opensslconf.h
++++ openssl-1.0.0/crypto/opensslconf.h
+@@ -11,6 +11,9 @@
+ #ifndef OPENSSL_NO_JPAKE
+ # define OPENSSL_NO_JPAKE
+ #endif
++#ifndef OPENSSL_NO_IDEA
++# define OPENSSL_NO_IDEA
++#endif
+ #ifndef OPENSSL_NO_KRB5
+ # define OPENSSL_NO_KRB5
+ #endif
+@@ -44,6 +47,9 @@
+ # if defined(OPENSSL_NO_JPAKE) && !defined(NO_JPAKE)
+ #  define NO_JPAKE
+ # endif
++# if defined(OPENSSL_NO_IDEA) && !defined(NO_IDEA)
++#  define NO_IDEA
++# endif
+ # if defined(OPENSSL_NO_KRB5) && !defined(NO_KRB5)
+ #  define NO_KRB5
+ # endif
+@@ -68,8 +74,8 @@
+ 
+ #if !(defined(VMS) || defined(__VMS)) /* VMS uses logical names instead */
+ #if defined(HEADER_CRYPTLIB_H) && !defined(OPENSSLDIR)
+-#define ENGINESDIR "/usr/local/ssl/lib/engines"
+-#define OPENSSLDIR "/usr/local/ssl"
++#define ENGINESDIR "/usr/lib/ssl/engines"
++#define OPENSSLDIR "/usr/lib/ssl"
+ #endif
+ #endif
+ 
+@@ -100,14 +106,14 @@
+  * - Intel P6 because partial register stalls are very expensive;
+  * - elder Alpha because it lacks byte load/store instructions;
+  */
+-#define RC4_INT unsigned int
++#define RC4_INT unsigned char
+ #endif
+ #if !defined(RC4_CHUNK)
+ /*
+  * This enables code handling data aligned at natural CPU word
+  * boundary. See crypto/rc4/rc4_enc.c for further details.
+  */
+-#undef RC4_CHUNK
++#define RC4_CHUNK unsigned long
+ #endif
+ #endif
+ 
+@@ -115,7 +121,7 @@
+ /* If this is set to 'unsigned int' on a DEC Alpha, this gives about a
+  * %20 speed up (longs are 8 bytes, int's are 4). */
+ #ifndef DES_LONG
+-#define DES_LONG unsigned long
++#define DES_LONG unsigned int
+ #endif
+ #endif
+ 
+@@ -126,9 +132,9 @@
+ /* Should we define BN_DIV2W here? */
+ 
+ /* Only one for the following should be defined */
+-#undef SIXTY_FOUR_BIT_LONG
++#define SIXTY_FOUR_BIT_LONG
+ #undef SIXTY_FOUR_BIT
+-#define THIRTY_TWO_BIT
++#undef THIRTY_TWO_BIT
+ #endif
+ 
+ #if defined(HEADER_RC4_LOCL_H) && !defined(CONFIG_HEADER_RC4_LOCL_H)
+@@ -140,7 +146,7 @@
+ 
+ #if defined(HEADER_BF_LOCL_H) && !defined(CONFIG_HEADER_BF_LOCL_H)
+ #define CONFIG_HEADER_BF_LOCL_H
+-#undef BF_PTR
++#define BF_PTR2
+ #endif /* HEADER_BF_LOCL_H */
+ 
+ #if defined(HEADER_DES_LOCL_H) && !defined(CONFIG_HEADER_DES_LOCL_H)
+@@ -170,7 +176,7 @@ YOU SHOULD NOT HAVE BOTH DES_RISC1 AND D
+ /* Unroll the inner loop, this sometimes helps, sometimes hinders.
+  * Very mucy CPU dependant */
+ #ifndef DES_UNROLL
+-#undef DES_UNROLL
++#define DES_UNROLL
+ #endif
+ 
+ /* These default values were supplied by
+Index: openssl-1.0.0/crypto/sha/sha.h
+===================================================================
+--- openssl-1.0.0.orig/crypto/sha/sha.h
++++ openssl-1.0.0/crypto/sha/sha.h
+@@ -59,6 +59,7 @@
+ #ifndef HEADER_SHA_H
+ #define HEADER_SHA_H
+ 
++#include <stddef.h>
+ #include <openssl/e_os2.h>
+ #include <stddef.h>
+ 
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/engines-install-in-libdir-ssl.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/engines-install-in-libdir-ssl.patch
new file mode 100644
index 0000000000..949d6ad8c4
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/engines-install-in-libdir-ssl.patch
@@ -0,0 +1,53 @@
+Index: openssl-1.0.0/engines/Makefile
+===================================================================
+--- openssl-1.0.0.orig/engines/Makefile
++++ openssl-1.0.0/engines/Makefile
+@@ -107,7 +107,7 @@
+ 	@[ -n "$(INSTALLTOP)" ] # should be set by top Makefile...
+ 	@if [ -n "$(SHARED_LIBS)" ]; then \
+ 		set -e; \
+-		$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines; \
++		$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines; \
+ 		for l in $(LIBNAMES); do \
+ 			( echo installing $$l; \
+ 			  pfx=lib; \
+@@ -119,13 +119,13 @@
+ 				*DSO_WIN32*)	sfx="eay32.dll"; pfx=;;	\
+ 				*)		sfx=".bad";;	\
+ 				esac; \
+-				cp $$pfx$$l$$sfx $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$$pfx$$l$$sfx.new; \
++				cp $$pfx$$l$$sfx $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$$pfx$$l$$sfx.new; \
+ 			  else \
+ 				sfx=".so"; \
+-				cp cyg$$l.dll $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$$pfx$$l$$sfx.new; \
++				cp cyg$$l.dll $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$$pfx$$l$$sfx.new; \
+ 			  fi; \
+-			  chmod 555 $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$$pfx$$l$$sfx.new; \
+-			  mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$$pfx$$l$$sfx.new $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$$pfx$$l$$sfx ); \
++			  chmod 555 $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$$pfx$$l$$sfx.new; \
++			  mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$$pfx$$l$$sfx.new $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$$pfx$$l$$sfx ); \
+ 		done; \
+ 	fi
+ 	@target=install; $(RECURSIVE_MAKE)
+Index: openssl-1.0.0/engines/ccgost/Makefile
+===================================================================
+--- openssl-1.0.0.orig/engines/ccgost/Makefile
++++ openssl-1.0.0/engines/ccgost/Makefile
+@@ -53,13 +53,13 @@
+ 			*DSO_WIN32*) sfx="eay32.dll"; pfx=;; \
+ 			*) sfx=".bad";; \
+ 			esac; \
+-			cp $${pfx}$(LIBNAME)$$sfx $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$${pfx}$(LIBNAME)$$sfx.new; \
++			cp $${pfx}$(LIBNAME)$$sfx $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$${pfx}$(LIBNAME)$$sfx.new; \
+ 		else \
+ 			sfx=".so"; \
+-			cp cyg$(LIBNAME).dll $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$${pfx}$(LIBNAME)$$sfx.new; \
++			cp cyg$(LIBNAME).dll $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$${pfx}$(LIBNAME)$$sfx.new; \
+ 		fi; \
+-		chmod 555 $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$${pfx}$(LIBNAME)$$sfx.new; \
+-		mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$${pfx}$(LIBNAME)$$sfx.new $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/engines/$${pfx}$(LIBNAME)$$sfx; \
++		chmod 555 $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$${pfx}$(LIBNAME)$$sfx.new; \
++		mv -f $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$${pfx}$(LIBNAME)$$sfx.new $(INSTALL_PREFIX)$(INSTALLTOP)/$(LIBDIR)/ssl/engines/$${pfx}$(LIBNAME)$$sfx; \
+ 	fi
+ 
+ links:
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/libdeps-first.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/libdeps-first.patch
new file mode 100644
index 0000000000..1fda69ba93
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/libdeps-first.patch
@@ -0,0 +1,27 @@
+Links to previously staged 0.9.8* easily otherwise
+
+Index: openssl-1.0.0/Makefile.shared
+===================================================================
+--- openssl-1.0.0.orig/Makefile.shared
++++ openssl-1.0.0/Makefile.shared
+@@ -96,7 +96,7 @@
+     LIBPATH=`for x in $$LIBDEPS; do echo $$x; done | sed -e 's/^ *-L//;t' -e d | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
+-    $${LDCMD} $${LDFLAGS} -o $${APPNAME:=$(APPNAME)} $(OBJECTS) $${LIBDEPS} )
++    $${LDCMD} $${LIBDEPS} $${LDFLAGS} -o $${APPNAME:=$(APPNAME)} $(OBJECTS) )
+ 
+ LINK_SO=	\
+   ( $(SET_X);   \
+@@ -106,9 +106,9 @@
+     LIBPATH=`for x in $$LIBDEPS; do echo $$x; done | sed -e 's/^ *-L//;t' -e d | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
+-    $${SHAREDCMD} $${SHAREDFLAGS} \
++    $${SHAREDCMD} $$LIBDEPS $${SHAREDFLAGS} \
+ 	-o $$SHLIB$$SHLIB_SOVER$$SHLIB_SUFFIX \
+-	$$ALLSYMSFLAGS $$SHOBJECTS $$NOALLSYMSFLAGS $$LIBDEPS \
++	$$ALLSYMSFLAGS $$SHOBJECTS $$NOALLSYMSFLAGS \
+   ) && $(SYMLINK_SO)
+ 
+ SYMLINK_SO=	\
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/oe-ldflags.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/oe-ldflags.patch
new file mode 100644
index 0000000000..3dd3bedab0
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/oe-ldflags.patch
@@ -0,0 +1,22 @@
+Index: openssl-1.0.0/Makefile.shared
+===================================================================
+--- openssl-1.0.0.orig/Makefile.shared
++++ openssl-1.0.0/Makefile.shared
+@@ -92,7 +92,7 @@
+ LINK_APP=	\
+   ( $(SET_X);   \
+     LIBDEPS="$${LIBDEPS:-$(LIBDEPS)}"; \
+-    LDCMD="$${LDCMD:-$(CC)}"; LDFLAGS="$${LDFLAGS:-$(CFLAGS)}"; \
++    LDCMD="$${LDCMD:-$(CC)}"; LDFLAGS="$(OE_LDFLAGS) $${LDFLAGS:-$(CFLAGS)}"; \
+     LIBPATH=`for x in $$LIBDEPS; do echo $$x; done | sed -e 's/^ *-L//;t' -e d | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
+@@ -102,7 +102,7 @@
+   ( $(SET_X);   \
+     LIBDEPS="$${LIBDEPS:-$(LIBDEPS)}"; \
+     SHAREDCMD="$${SHAREDCMD:-$(CC)}"; \
+-    SHAREDFLAGS="$${SHAREDFLAGS:-$(CFLAGS) $(SHARED_LDFLAGS)}"; \
++    SHAREDFLAGS="$(OE_LDFLAGS) $${SHAREDFLAGS:-$(CFLAGS) $(SHARED_LDFLAGS)}"; \
+     LIBPATH=`for x in $$LIBDEPS; do echo $$x; done | sed -e 's/^ *-L//;t' -e d | uniq`; \
+     LIBPATH=`echo $$LIBPATH | sed -e 's/ /:/g'`; \
+     LD_LIBRARY_PATH=$$LIBPATH:$$LD_LIBRARY_PATH \
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/shared-libs.patch b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/shared-libs.patch
new file mode 100644
index 0000000000..7cd70d8fdc
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-1.0.0c/shared-libs.patch
@@ -0,0 +1,48 @@
+Index: openssl-1.0.0/crypto/Makefile
+===================================================================
+--- openssl-1.0.0.orig/crypto/Makefile
++++ openssl-1.0.0/crypto/Makefile
+@@ -104,7 +104,7 @@
+ 
+ shared: buildinf.h lib subdirs
+ 	if [ -n "$(SHARED_LIBS)" ]; then \
+-		(cd ..; $(MAKE) $(SHARED_LIB)); \
++		(cd ..; $(MAKE) -e $(SHARED_LIB)); \
+ 	fi
+ 
+ libs:
+Index: openssl-1.0.0/Makefile.org
+===================================================================
+--- openssl-1.0.0.orig/Makefile.org
++++ openssl-1.0.0/Makefile.org
+@@ -260,7 +260,7 @@
+ 
+ libcrypto$(SHLIB_EXT): libcrypto.a
+ 	@if [ "$(SHLIB_TARGET)" != "" ]; then \
+-		$(MAKE) SHLIBDIRS=crypto build-shared; \
++		$(MAKE) -e SHLIBDIRS=crypto build-shared; \
+ 	else \
+ 		echo "There's no support for shared libraries on this platform" >&2; \
+ 		exit 1; \
+@@ -268,7 +268,7 @@
+ 
+ libssl$(SHLIB_EXT): libcrypto$(SHLIB_EXT) libssl.a
+ 	@if [ "$(SHLIB_TARGET)" != "" ]; then \
+-		$(MAKE) SHLIBDIRS=ssl SHLIBDEPS='-lcrypto' build-shared; \
++		$(MAKE) -e SHLIBDIRS=ssl SHLIBDEPS='-lcrypto' build-shared; \
+ 	else \
+ 		echo "There's no support for shared libraries on this platform" >&2; \
+ 		exit 1; \
+Index: openssl-1.0.0/ssl/Makefile
+===================================================================
+--- openssl-1.0.0.orig/ssl/Makefile
++++ openssl-1.0.0/ssl/Makefile
+@@ -62,7 +62,7 @@
+ 
+ shared: lib
+ 	if [ -n "$(SHARED_LIBS)" ]; then \
+-		(cd ..; $(MAKE) $(SHARED_LIB)); \
++		(cd ..; $(MAKE) -e $(SHARED_LIB)); \
+ 	fi
+ 
+ files:
diff --git a/meta-oe/recipes-connectivity/openssl/openssl-native_1.0.0c.bb b/meta-oe/recipes-connectivity/openssl/openssl-native_1.0.0c.bb
new file mode 100644
index 0000000000..8483293b9d
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl-native_1.0.0c.bb
@@ -0,0 +1,27 @@
+require openssl.inc
+
+inherit pkgconfig native
+
+SRC_URI[src.md5sum] = "ff8fb85610aef328315a9decbb2712e4"
+SRC_URI[src.sha256sum] = "f731b36de3edaa361179ae6f449668b248a360e34e31e92902d976e9b9d604eb"
+PR = "${INC_PR}.0"
+
+DEFAULT_PREFERENCE = "-1"
+
+export DIRS = "crypto ssl apps engines"
+
+# This flag can contain target options (e.g -mfpu=neon for armv7-a systems)
+export FULL_OPTIMIZATION = " "
+export BUILD_OPTIMIZATION = " "
+
+SRC_URI += "file://configure-targets.patch \
+            file://shared-libs.patch \
+            file://debian.patch \
+	    file://libdeps-first.patch \
+	   "
+
+PARALLEL_MAKE = ""
+
+CFLAG += " -Wa,--noexecstack "
+
+NATIVE_INSTALL_WORKS = "1"
diff --git a/meta-oe/recipes-connectivity/openssl/openssl.inc b/meta-oe/recipes-connectivity/openssl/openssl.inc
new file mode 100644
index 0000000000..86b29f0af7
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl.inc
@@ -0,0 +1,127 @@
+DESCRIPTION = "Secure Socket Layer (SSL) binary and related cryptographic tools."
+HOMEPAGE = "http://www.openssl.org/"
+SECTION = "libs/network"
+
+# "openssl | SSLeay" dual license
+LICENSE = "openssl"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=83d26c69f6f0172ee7f795790424b453"
+
+SRC_URI = "http://www.openssl.org/source/openssl-${PV}.tar.gz;name=src"
+S = "${WORKDIR}/openssl-${PV}"
+
+inherit siteinfo
+
+INC_PR = "r13"
+
+AR_append = " r"
+CFLAG = "${@base_conditional('SITEINFO_ENDIANNESS', 'le', '-DL_ENDIAN', '-DB_ENDIAN', d)} \
+	-DTERMIO ${FULL_OPTIMIZATION} -Wall"
+
+# -02 does not work on mipsel: ssh hangs when it tries to read /dev/urandom
+CFLAG_mtx-1 := "${@'${CFLAG}'.replace('-O2', '')}"
+CFLAG_mtx-2 := "${@'${CFLAG}'.replace('-O2', '')}"
+
+export DIRS = "crypto ssl apps"
+BBCLASSEXTEND = "native nativesdk"
+
+export EX_LIBS = "-lgcc -ldl"
+export AS = "${CC} -c"
+
+PACKAGES =+ "libcrypto libssl ${PN}-misc"
+FILES_libcrypto = "${libdir}/libcrypto.so.*"
+FILES_libssl = "${libdir}/libssl.so.*"
+FILES_${PN}-misc = "${libdir}/ssl/misc ${libdir}/ssl/openssl.cnf"
+
+do_configure_prepend_darwin () {
+	sed -i -e '/version-script=openssl\.ld/d' Configure
+}
+
+do_configure () {
+	cd util
+	perl perlpath.pl ${STAGING_BINDIR_NATIVE}
+	cd ..
+	ln -sf apps/openssl.pod crypto/crypto.pod ssl/ssl.pod doc/
+
+	os=${HOST_OS}
+	if [ "x$os" = "xlinux-uclibc" ]; then
+		os=linux
+	elif [ "x$os" = "xlinux-uclibceabi" ]; then
+		os=linux
+	elif [ "x$os" = "xlinux-gnueabi" ]; then
+		os=linux
+	fi
+	target="$os-${HOST_ARCH}"
+	case $target in
+	linux-arm)
+		target=linux-elf-arm
+		;;
+	linux-armeb)
+		target=linux-elf-armeb
+		;;
+	linux-sh3)
+		target=debian-sh3
+		;;
+	linux-sh4)
+		target=debian-sh4
+		;;
+	linux-i486)
+		target=debian-i386-i486
+		;;
+	linux-i586 | linux-viac3)
+		target=debian-i386-i586
+		;;
+	linux-i686)
+		target=debian-i386-i686/cmov
+		;;
+	linux-mips)
+		target=debian-mips
+		;;
+	linux-mipsel)
+		target=debian-mipsel
+		;;
+	linux-powerpc)
+		target=linux-ppc
+		;;
+	linux-gnuspe-powerpc)
+		target=linux-ppc
+		;;
+	linux-supersparc)
+		target=linux-sparcv8
+		;;
+	linux-sparc)
+		target=linux-sparcv8
+		;;
+	darwin-i386)
+		target=darwin-i386-cc
+		;;
+	esac
+	# inject machine-specific flags
+	sed -i -e "s|^\(\"$target\",\s*\"[^:]\+\):\([^:]\+\)|\1:${CFLAG}|g" Configure
+        useprefix=${prefix}
+        if [ "x$useprefix" == "x" ]; then
+                useprefix=/
+        fi        
+	perl ./Configure shared --prefix=$useprefix --openssldir=${libdir}/ssl $target
+}
+
+do_compile () {
+	oe_runmake
+}
+
+do_install () {
+	oe_runmake INSTALL_PREFIX="${D}" install
+
+	# On x86_64, move lib/* to lib64
+	if [ "${libdir}" != "${prefix}/lib" ]
+	then
+		install -d ${D}${libdir} ${D}${libdir}/pkgconfig
+		mv ${D}${prefix}/lib/lib* ${D}${libdir}
+		mv ${D}${prefix}/lib/pkgconfig/*.pc ${D}${libdir}/pkgconfig
+	fi
+
+	oe_libinstall -so libcrypto ${D}${libdir}
+	oe_libinstall -so libssl ${D}${libdir}
+
+	install -d ${D}${includedir}
+	cp --dereference -R include/openssl ${D}${includedir}
+}
diff --git a/meta-oe/recipes-connectivity/openssl/openssl_0.9.8m.bb b/meta-oe/recipes-connectivity/openssl/openssl_0.9.8m.bb
new file mode 100644
index 0000000000..a7eb332857
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl_0.9.8m.bb
@@ -0,0 +1,16 @@
+inherit pkgconfig
+
+require openssl.inc
+SRC_URI[src.md5sum] = "898bf125370926d5f692a2201124f8ec"
+SRC_URI[src.sha256sum] = "36037160281cf4977d964e403d2bc0680fbca0a7ff9f65e33136d75fae12cb5b"
+
+PR = "${INC_PR}.0"
+
+export OE_LDFLAGS="${LDFLAGS}"
+
+SRC_URI += "file://configure-targets.patch \
+            file://shared-libs.patch \
+            file://debian.patch \
+            file://oe-ldflags.patch"
+
+PARALLEL_MAKE = ""
diff --git a/meta-oe/recipes-connectivity/openssl/openssl_1.0.0c.bb b/meta-oe/recipes-connectivity/openssl/openssl_1.0.0c.bb
new file mode 100644
index 0000000000..9348e53c88
--- /dev/null
+++ b/meta-oe/recipes-connectivity/openssl/openssl_1.0.0c.bb
@@ -0,0 +1,36 @@
+inherit pkgconfig
+
+require openssl.inc
+
+# For target side versions of openssl enable support for OCF Linux driver
+# if they are available.
+DEPENDS += "ocf-linux"
+CFLAG += "-DHAVE_CRYPTODEV -DUSE_CRYPTODEV_DIGESTS"
+
+SRC_URI[src.md5sum] = "ff8fb85610aef328315a9decbb2712e4"
+SRC_URI[src.sha256sum] = "f731b36de3edaa361179ae6f449668b248a360e34e31e92902d976e9b9d604eb"
+
+PR = "${INC_PR}.2"
+
+DEFAULT_PREFERENCE = "-1"
+
+export DIRS = "crypto ssl apps engines"
+export OE_LDFLAGS="${LDFLAGS}"
+
+SRC_URI += "file://configure-targets.patch \
+            file://shared-libs.patch \
+            file://debian.patch \
+            file://oe-ldflags.patch \
+	    file://libdeps-first.patch \
+	    file://engines-install-in-libdir-ssl.patch \
+	   "
+
+PARALLEL_MAKE = ""
+
+PACKAGES += " \
+	${PN}-engines \
+	${PN}-engines-dbg \
+	"
+
+FILES_${PN}-engines = "${libdir}/ssl/engines/*.so"
+FILES_${PN}-engines-dbg = "${libdir}/ssl/engines/.debug"
diff --git a/meta-oe/recipes-connectivity/uhd/uhd-firmware.inc b/meta-oe/recipes-connectivity/uhd/uhd-firmware.inc
new file mode 100644
index 0000000000..763aa6ca56
--- /dev/null
+++ b/meta-oe/recipes-connectivity/uhd/uhd-firmware.inc
@@ -0,0 +1,20 @@
+DESCRIPTION = "Universal Hardware Driver Firmware"
+HOMEPAGE = "http://www.ettus.com"
+LICENSE = "GPLv3"
+
+INC_PR = "r0"
+
+PACKAGE_ARCH = "all"
+
+SRC_URI = "http://www.ettus.com/downloads/uhd_images/UHD-images-${PV}/UHD-images-${PV}-Linux.tar.gz"
+
+S = ${WORKDIR}/UHD-images-${PV}-Linux
+
+do_install() {
+	install -d ${D}${datadir}/uhd/images
+	install -m 0644 ${S}/share/uhd/images/* ${D}${datadir}/uhd/images
+}
+
+PACKAGES = "${PN}"
+FILES_${PN} = ${datadir}/uhd/images
+
diff --git a/meta-oe/recipes-connectivity/uhd/uhd-firmware_0001.20101124013843.905f426.bb b/meta-oe/recipes-connectivity/uhd/uhd-firmware_0001.20101124013843.905f426.bb
new file mode 100644
index 0000000000..7fc8dde335
--- /dev/null
+++ b/meta-oe/recipes-connectivity/uhd/uhd-firmware_0001.20101124013843.905f426.bb
@@ -0,0 +1,9 @@
+require uhd-firmware.inc
+
+LIC_FILES_CHKSUM = "file://share/uhd/images/usrp_e100_fpga.bin;md5=38e997b0ea38503d7d7f389ba76d39df"
+
+PR = "${INC_PR}.0"
+
+SRC_URI[md5sum] = "6db20f93e3c4646395bd6e8260e2261f"
+SRC_URI[sha256sum] = "4c73655519cd9f4e49e5727f094b463850b03db13d91a8b0429b789e74a9deea"
+
diff --git a/meta-oe/recipes-connectivity/uhd/uhd.inc b/meta-oe/recipes-connectivity/uhd/uhd.inc
new file mode 100644
index 0000000000..d2ffb848fb
--- /dev/null
+++ b/meta-oe/recipes-connectivity/uhd/uhd.inc
@@ -0,0 +1,27 @@
+DESCRIPTION = "Universal Hardware Driver for Ettus Research products."
+HOMEPAGE = "http://www.ettus.com"
+LICENSE = "GPLV3+"
+
+DEPENDS = "git-native python-cheetah-native boost libusb1 uhd-firmware"
+RDEPENDS_${PN} += "uhd-firmware"
+
+INC_PR = "r4"
+
+inherit cmake
+
+PACKAGES =+ "${PN}-tests ${PN}-examples"
+
+FILES_${PN} += "${libdir}/libuhd.so"
+FILES_${PN} += "${datadir}/uhd/utils/*"
+FILES_${PN}-tests += "${datadir}/uhd/tests/*"
+FILES_${PN}-dbg += "${datadir}/uhd/examples/.debug/*"
+FILES_${PN}-dbg += "${datadir}/uhd/utils/.debug/*"
+FILES_${PN}-dbg += "${datadir}/uhd/tests/.debug/*"
+FILES_${PN}-examples = "${datadir}/uhd/examples/*"
+
+OECMAKE_BUILDPATH = "${S}/build"
+OECMAKE_SOURCEPATH = "${S}"
+
+EXTRA_OECMAKE = "-DENABLE_USRP_E100=TRUE"
+
+EXTRA_OEMAKE = "-C ${OECMAKE_BUILDPATH}"
diff --git a/meta-oe/recipes-connectivity/uhd/uhd_git.bb b/meta-oe/recipes-connectivity/uhd/uhd_git.bb
new file mode 100644
index 0000000000..d1c936d001
--- /dev/null
+++ b/meta-oe/recipes-connectivity/uhd/uhd_git.bb
@@ -0,0 +1,8 @@
+require uhd.inc
+
+PR = "${INC_PR}.2"
+
+SRC_URI = "git://ettus.sourcerepo.com/ettus/uhd.git;protocol=git"
+S = "${WORKDIR}/git/host"
+
+SRCREV = "cc639e876f326e958dace8438ae41b8cd9563780"
diff --git a/meta-oe/recipes-core/dbus/dbus-1.2.24/0001-Make-the-default-DBus-reply-timeout-configurable.patch b/meta-oe/recipes-core/dbus/dbus-1.2.24/0001-Make-the-default-DBus-reply-timeout-configurable.patch
new file mode 100644
index 0000000000..a38e3db0de
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-1.2.24/0001-Make-the-default-DBus-reply-timeout-configurable.patch
@@ -0,0 +1,78 @@
+From fb546488e93a1638d377b228bbb0d2ab58462168 Mon Sep 17 00:00:00 2001
+From: Daniel Willmann <daniel@totalueberwachung.de>
+Date: Thu, 2 Oct 2008 15:50:17 +0800
+Subject: [PATCH] Make the default DBus reply timeout configurable
+
+This patch adds an option --with-dbus-default-reply-timeout to configure
+that will set the default reply timeout used by libdbus in milliseconds.
+autoconf and autoheader need to be rerun in order to regenerate the
+correct configure and config.h.in files.
+---
+ configure.in                    |    9 +++++++++
+ dbus/dbus-connection-internal.h |    3 ---
+ dbus/dbus-pending-call.c        |    1 +
+ 3 files changed, 10 insertions(+), 3 deletions(-)
+
+diff --git a/configure.in b/configure.in
+index 62ac387..5c912d7 100644
+--- a/configure.in
++++ b/configure.in
+@@ -88,6 +88,7 @@ AC_ARG_WITH(console-auth-dir, AS_HELP_STRING([--with-console-auth-dir=[dirname]]
+ AC_ARG_WITH(console-owner-file, AS_HELP_STRING([--with-console-owner-file=[filename]],[file whose owner determines current console owner]))
+ AC_ARG_WITH(dbus_user, AS_HELP_STRING([--with-dbus-user=<user>],[User for running the DBUS daemon (messagebus)]))
+ AC_ARG_WITH(dbus_daemondir, AS_HELP_STRING([--with-dbus-daemondir=[dirname]],[Directory for installing the DBUS daemon]))
++AC_ARG_WITH(dbus_default_reply_timeout, AS_HELP_STRING([--with-dbus-default-reply-timeout=[milliseconds]],[Default reply timeout for DBus method calls]))
+ 
+ AC_DEFINE(DBUS_UNIX,1,[dbus on unix])
+ 
+@@ -986,6 +987,13 @@ if test x$have_libaudit = xyes ; then
+     AC_DEFINE(HAVE_LIBAUDIT,1,[audit daemon SELinux support])
+ fi
+ 
++if test -z "$with_dbus_default_reply_timeout" ; then
++    DBUS_DEFAULT_REPLY_TIMEOUT=25000
++else
++    DBUS_DEFAULT_REPLY_TIMEOUT=$with_dbus_default_reply_timeout
++fi
++AC_DEFINE_UNQUOTED(_DBUS_DEFAULT_TIMEOUT_VALUE,$DBUS_DEFAULT_REPLY_TIMEOUT,[default timeout value for dbus calls])
++
+ #### Set up final flags
+ DBUS_CLIENT_CFLAGS=
+ DBUS_CLIENT_LIBS="$THREAD_LIBS"
+@@ -1348,6 +1356,7 @@ echo "
+         Gettext libs (empty OK):  ${INTLLIBS}
+         Using XML parser:         ${with_xml}
+         Init scripts style:       ${with_init_scripts}
++        Default reply timeout:    ${DBUS_DEFAULT_REPLY_TIMEOUT}
+         Abstract socket names:    ${ac_cv_have_abstract_sockets}
+         System bus socket:        ${DBUS_SYSTEM_SOCKET}
+         System bus address:       ${DBUS_SYSTEM_BUS_DEFAULT_ADDRESS}
+diff --git a/dbus/dbus-connection-internal.h b/dbus/dbus-connection-internal.h
+index df54412..5fe536b 100644
+--- a/dbus/dbus-connection-internal.h
++++ b/dbus/dbus-connection-internal.h
+@@ -41,9 +41,6 @@ typedef enum
+   DBUS_ITERATION_BLOCK      = 1 << 2  /**< Block if nothing to do. */
+ } DBusIterationFlags;
+ 
+-/** default timeout value when waiting for a message reply, 25 seconds */
+-#define _DBUS_DEFAULT_TIMEOUT_VALUE (25 * 1000)
+-
+ void              _dbus_connection_lock                        (DBusConnection     *connection);
+ void              _dbus_connection_unlock                      (DBusConnection     *connection);
+ DBusConnection *  _dbus_connection_ref_unlocked                (DBusConnection     *connection);
+diff --git a/dbus/dbus-pending-call.c b/dbus/dbus-pending-call.c
+index 51b9378..5a7a5f4 100644
+--- a/dbus/dbus-pending-call.c
++++ b/dbus/dbus-pending-call.c
+@@ -21,6 +21,7 @@
+  *
+  */
+ 
++#include <config.h>
+ #include "dbus-internals.h"
+ #include "dbus-connection-internal.h"
+ #include "dbus-pending-call-internal.h"
+-- 
+1.5.6.4
+
diff --git a/meta-oe/recipes-core/dbus/dbus-1.2.24/fix-install-daemon.patch b/meta-oe/recipes-core/dbus/dbus-1.2.24/fix-install-daemon.patch
new file mode 100644
index 0000000000..5e25d1227d
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-1.2.24/fix-install-daemon.patch
@@ -0,0 +1,13 @@
+Index: dbus-0.94/bus/Makefile.am
+===================================================================
+--- dbus-0.94.orig/bus/Makefile.am	2006-10-01 17:36:18.000000000 +0200
++++ dbus-0.94/bus/Makefile.am	2006-10-14 21:40:05.000000000 +0200
+@@ -110,7 +110,7 @@
+ 		$(mkinstalldirs) $(DESTDIR)$(DBUS_DAEMONDIR); \
+ 		chmod 755 $(DESTDIR)$(DBUS_DAEMONDIR); \
+ 	fi
+-	$(INSTALL_PROGRAM) dbus-daemon $(DESTDIR)$(DBUS_DAEMONDIR)
++	$(LIBTOOL) --mode=install $(INSTALL_PROGRAM) dbus-daemon $(DESTDIR)$(DBUS_DAEMONDIR)
+ 	$(mkinstalldirs) $(DESTDIR)$(localstatedir)/run/dbus
+ 	$(mkinstalldirs) $(DESTDIR)$(configdir)/system.d
+ 	$(mkinstalldirs) $(DESTDIR)$(datadir)/dbus-1/services
diff --git a/meta-oe/recipes-core/dbus/dbus-c++-native_git.bb b/meta-oe/recipes-core/dbus/dbus-c++-native_git.bb
new file mode 100644
index 0000000000..eba80b2e9a
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-c++-native_git.bb
@@ -0,0 +1,17 @@
+require dbus-c++_git.bb
+inherit native
+
+FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/dbus-c++"
+# actually dbus-native and expat-native, but even the bearest build machine should have that nowadays...
+DEPENDS = ""
+
+do_compile() {
+	oe_runmake -C src libdbus-c++-1.la
+	oe_runmake -C tools dbusxx-xml2cpp
+	install -m 0755 tools/dbusxx-xml2cpp ${STAGING_BINDIR_NATIVE}
+}
+
+do_install() {
+	:
+}
+
diff --git a/meta-oe/recipes-core/dbus/dbus-c++/fix-linking.patch b/meta-oe/recipes-core/dbus/dbus-c++/fix-linking.patch
new file mode 100644
index 0000000000..822216916b
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-c++/fix-linking.patch
@@ -0,0 +1,13 @@
+Index: dbus/tools/Makefile.am
+===================================================================
+--- dbus.orig/tools/Makefile.am
++++ dbus/tools/Makefile.am
+@@ -16,7 +16,7 @@ endif
+ bin_PROGRAMS = dbusxx-xml2cpp dbusxx-introspect
+ 
+ dbusxx_xml2cpp_SOURCES = xml.h xml.cpp xml2cpp.h xml2cpp.cpp
+-dbusxx_xml2cpp_LDADD = $(libdbus_cxx_la)
++dbusxx_xml2cpp_LDADD = $(libdbus_cxx_la) -lexpat
+ 
+ dbusxx_introspect_SOURCES = introspect.h introspect.cpp
+ dbusxx_introspect_LDADD = $(libdbus_cxx_la)
diff --git a/meta-oe/recipes-core/dbus/dbus-c++_git.bb b/meta-oe/recipes-core/dbus/dbus-c++_git.bb
new file mode 100644
index 0000000000..64598238da
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-c++_git.bb
@@ -0,0 +1,23 @@
+DESCRIPTION = "C++ bindings for dbus"
+LICENSE = "LGPLv2.1+"
+SECTION = "libs"
+DEPENDS = "dbus dbus-c++-native expat"
+SRCREV = "530a887913d3b0dd7091eabb8eef8e3c279e3bb8"
+
+PE = "1"
+PV = "0.5.0+gitr${SRCPV}"
+
+SRC_URI = "git://gitorious.org/dbus-cplusplus/mainline.git;protocol=git"
+#           file://fix-linking.patch"
+S = "${WORKDIR}/git"
+
+inherit autotools pkgconfig
+
+do_compile_prepend() {
+	find . -name "Makefile.am" |xargs sed -i -e 's,$(top_builddir)/tools/dbusxx-xml2cpp,dbusxx-xml2cpp,'
+}
+
+FILES_${PN}-dbg += "${bindir}/dbusxx-xml2cpp ${bindir}/dbusxx-introspect"
+FILES_${PN}-dev += "${bindir}/.dev"
+FILES_${PN} = "${libdir}/*.so.*"
+
diff --git a/meta-oe/recipes-core/dbus/dbus-daemon-proxy_git.bb b/meta-oe/recipes-core/dbus/dbus-daemon-proxy_git.bb
new file mode 100644
index 0000000000..32ed7dbfd3
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus-daemon-proxy_git.bb
@@ -0,0 +1,19 @@
+DESCRIPTION = "dbus forwarding daemon"
+LICENSE = "LGPLv2.1+"
+DEPENDS = "dbus dbus-glib"
+SRCREV = "1226a0a1374628ff191f6d8a56000be5e53e7608"
+PV = "0.0.0+gitr${SRCPV}"
+PR = "r1"
+
+SRC_URI = "git://git.collabora.co.uk/git/user/alban/dbus-daemon-proxy;protocol=git"
+S = "${WORKDIR}/git"
+
+do_compile() {
+	${CC} ${LDFLAGS} `pkg-config --cflags --libs dbus-glib-1` -o dbus-daemon-proxy dbus-daemon-proxy.c
+}
+
+do_install() {
+	install -d ${D}${bindir}
+	install -m 0755 dbus-daemon-proxy ${D}${bindir}
+}
+
diff --git a/meta-oe/recipes-core/dbus/dbus.inc b/meta-oe/recipes-core/dbus/dbus.inc
new file mode 100644
index 0000000000..40a670aac4
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus.inc
@@ -0,0 +1,104 @@
+DESCRIPTION = "A message bus system for inter-process communication"
+HOMEPAGE = "http://dbus.freedesktop.org"
+SECTION = "base"
+LICENSE = "AFL2.1 | GPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=10dded3b58148f3f1fd804b26354af3e \
+                    file://dbus/dbus.h;firstline=6;endline=20;md5=6eea2e0c7750dd8e620dcb1437312fa5"
+DEPENDS = "expat virtual/libintl libsm libice virtual/libx11"
+
+INC_PR = "r20"
+
+SRC_URI = "\
+  http://dbus.freedesktop.org/releases/dbus/dbus-${PV}.tar.gz;name=dbus \
+  file://cross.patch \
+  file://tmpdir.patch \
+  file://fix-install-daemon.patch \
+  file://0001-Make-the-default-DBus-reply-timeout-configurable.patch \
+  file://dbus-1.init \
+"
+
+S = "${WORKDIR}/dbus-${PV}"
+
+inherit autotools pkgconfig update-rc.d gettext
+
+EXTRA_OECONF_X = "--with-x"
+
+EXTRA_OECONF = "\
+  --disable-qt \
+  --disable-qt3 \
+  --disable-gtk \
+  --disable-tests \
+  --disable-checks \
+  --disable-xml-docs \
+  --disable-doxygen-docs \
+  --disable-libaudit \
+  --with-xml=expat \
+  --with-dbus-default-reply-timeout=200000 \
+  ${EXTRA_OECONF_X} \
+"
+
+# On mipsel, D-Bus fails to link with --gc-sections and segfaults before main()
+# when built with -fPIE/-pie.
+do_configure_prepend_mipsel() {
+	sed -i -e 's/\-fPIE//' \
+		-e 's/\-pie\ \-Wl\,\-z\,relro//' \
+		-e 's/-Wl,--gc-sections//' \
+		${S}/configure.in
+}
+
+do_install_append() {
+        install -d ${D}${sysconfdir}/init.d
+        install -m 0755 ${WORKDIR}/dbus-1.init ${D}${sysconfdir}/init.d/dbus-1
+        # the stock install seems to install the libtool wrapper script, so we have to copy this manually :M:
+        if [ -e bus/.libs/dbus-daemon-launch-helper ]; then
+                install -d  ${D}${libexecdir}/
+                install -m 0755 bus/.libs/dbus-daemon-launch-helper ${D}${libexecdir}/
+        fi
+}
+
+RDEPENDS_${PN}-x11 = "${PN}"
+RRECOMMENDS_${PN}-lib = "${PN}"
+RCONFLICTS_${PN} = "dbus-1"
+RREPLACES_${PN} = "dbus-1"
+RPROVIDES_${PN} = "dbus-1"
+
+PACKAGES =+ "${PN}-lib ${PN}-x11"
+
+FILES_${PN} = "\
+${bindir}/dbus-daemon* \
+${bindir}/dbus-uuidgen \
+${bindir}/dbus-cleanup-sockets \
+${bindir}/dbus-send \
+${bindir}/dbus-monitor \
+${libexecdir}/dbus* \
+${sysconfdir} \
+${datadir}/dbus-1/services \
+${datadir}/dbus-1/system-services \
+"
+FILES_${PN}-lib = "${libdir}/lib*.so.*"
+FILES_${PN}-x11 = "\
+${bindir}/dbus-launch \
+"
+FILES_${PN}-dev += "${libdir}/dbus-1.0/include ${bindir}/dbus-glib-tool ${libdir}/"
+
+pkg_postinst_${PN}() {
+#!/bin/sh
+# can't do adduser stuff offline
+if [ "x$D" != "x" ]; then
+  exit 1
+fi
+MESSAGEUSER=messagebus
+MESSAGEHOME=/var/run/dbus
+mkdir -p $MESSAGEHOME || true
+grep -q ^$MESSAGEUSER: /etc/group || addgroup "$MESSAGEUSER"
+chgrp "$MESSAGEUSER" "$MESSAGEHOME"
+grep -q ^$MESSAGEUSER: /etc/passwd || adduser --system --home "$MESSAGEHOME" --no-create-home --disabled-password --ingroup "$MESSAGEUSER" "$MESSAGEUSER"
+chown "$MESSAGEUSER"."$MESSAGEUSER" "$MESSAGEHOME"
+grep -q netdev: /etc/group || addgroup netdev
+chmod u+s /usr/libexec/dbus-daemon-launch-helper
+}
+
+CONFFILES_${PN} = "${sysconfdir}/dbus-1/system.conf ${sysconfdir}/dbus-1/session.conf"
+
+INITSCRIPT_NAME = "dbus-1"
+INITSCRIPT_PARAMS = "start 02 5 2 . stop 20 0 1 6 ."
diff --git a/meta-oe/recipes-core/dbus/dbus/add-configurable-reply-timeouts.patch b/meta-oe/recipes-core/dbus/dbus/add-configurable-reply-timeouts.patch
new file mode 100644
index 0000000000..9cca38ddc8
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/add-configurable-reply-timeouts.patch
@@ -0,0 +1,48 @@
+Index: dbus-1.3.1/configure.in
+===================================================================
+--- dbus-1.3.1.orig/configure.in
++++ dbus-1.3.1/configure.in
+@@ -137,6 +137,7 @@
+ AC_ARG_WITH(console-owner-file, AS_HELP_STRING([--with-console-owner-file=[filename]],[file whose owner determines current console owner]))
+ AC_ARG_WITH(dbus_user, AS_HELP_STRING([--with-dbus-user=<user>],[User for running the DBUS daemon (messagebus)]))
+ AC_ARG_WITH(dbus_daemondir, AS_HELP_STRING([--with-dbus-daemondir=[dirname]],[Directory for installing the DBUS daemon]))
++AC_ARG_WITH(dbus_default_reply_timeout, AS_HELP_STRING([--with-dbus-default-reply-timeout=[milliseconds]],[Default reply timeout for DBus method calls]))
+ 
+ dnl DBUS_BUILD_TESTS controls unit tests built in to .c files 
+ dnl and also some stuff in the test/ subdir
+@@ -984,6 +985,13 @@
+   fi
+ fi
+ 
++if test -z "$with_dbus_default_reply_timeout" ; then
++    DBUS_DEFAULT_REPLY_TIMEOUT=25000
++else
++    DBUS_DEFAULT_REPLY_TIMEOUT=$with_dbus_default_reply_timeout
++fi
++AC_DEFINE_UNQUOTED(_DBUS_DEFAULT_TIMEOUT_VALUE,$DBUS_DEFAULT_REPLY_TIMEOUT,[default timeout value for dbus calls])
++
+ #### Set up final flags
+ DBUS_CLIENT_CFLAGS=
+ DBUS_CLIENT_LIBS="$THREAD_LIBS $NETWORK_libs"
+@@ -1625,6 +1633,7 @@
+         Gettext libs (empty OK):  ${INTLLIBS}
+         Using XML parser:         ${with_xml}
+         Init scripts style:       ${with_init_scripts}
++        Default reply timeout:    ${DBUS_DEFAULT_REPLY_TIMEOUT}
+         Abstract socket names:    ${ac_cv_have_abstract_sockets}
+         System bus socket:        ${DBUS_SYSTEM_SOCKET}
+         System bus address:       ${DBUS_SYSTEM_BUS_DEFAULT_ADDRESS}
+Index: dbus-1.3.1/dbus/dbus-connection-internal.h
+===================================================================
+--- dbus-1.3.1.orig/dbus/dbus-connection-internal.h
++++ dbus-1.3.1/dbus/dbus-connection-internal.h
+@@ -41,9 +41,6 @@
+   DBUS_ITERATION_BLOCK      = 1 << 2  /**< Block if nothing to do. */
+ } DBusIterationFlags;
+ 
+-/** default timeout value when waiting for a message reply, 25 seconds */
+-#define _DBUS_DEFAULT_TIMEOUT_VALUE (25 * 1000)
+-
+ void              _dbus_connection_lock                        (DBusConnection     *connection);
+ void              _dbus_connection_unlock                      (DBusConnection     *connection);
+ DBusConnection *  _dbus_connection_ref_unlocked                (DBusConnection     *connection);
diff --git a/meta-oe/recipes-core/dbus/dbus/anon.patch b/meta-oe/recipes-core/dbus/dbus/anon.patch
new file mode 100644
index 0000000000..c9bf7bfa63
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/anon.patch
@@ -0,0 +1,13 @@
+diff -Naur dbus-1.2.1.orig/dbus/dbus-transport.c dbus-1.2.1/dbus/dbus-transport.c
+--- dbus-1.2.1.orig/dbus/dbus-transport.c	2008-09-16 15:10:02.000000000 +0000
++++ dbus-1.2.1/dbus/dbus-transport.c	2008-09-16 15:10:10.000000000 +0000
+@@ -747,6 +747,9 @@
+           dbus_bool_t allow;
+           DBusCredentials *auth_identity;
+           
++          // allow anonymous connections
++          _dbus_transport_set_allow_anonymous(transport, TRUE);
++
+           auth_identity = _dbus_auth_get_identity (transport->auth);
+           _dbus_assert (auth_identity != NULL);
+           
diff --git a/meta-oe/recipes-core/dbus/dbus/dbus-1.init b/meta-oe/recipes-core/dbus/dbus/dbus-1.init
new file mode 100644
index 0000000000..a70e7a2373
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/dbus-1.init
@@ -0,0 +1,111 @@
+#! /bin/sh
+# -*- coding: utf-8 -*-
+# Debian init.d script for D-BUS
+# Copyright © 2003 Colin Walters <walters@debian.org>
+# Copyright 2008 OE Team
+
+set -e
+
+DAEMON=/usr/bin/dbus-daemon
+NAME=dbus
+DAEMONUSER=messagebus
+RUNDIR=/var/run/dbus
+PIDFILE=/var/run/dbus/pid
+UUIDDIR=/var/lib/dbus
+DESC="system message bus"
+EVENTDIR=/etc/dbus-1/event.d
+
+test -x $DAEMON || exit 0
+
+# Source defaults file; edit that file to configure this script.
+ENABLED=1
+PARAMS=""
+if [ -e /etc/default/dbus ]; then
+  . /etc/default/dbus
+fi
+
+test "$ENABLED" != "0" || exit 0
+
+start_it_up()
+{
+  if [ ! -d $RUNDIR ]; then
+    mkdir -p $RUNDIR
+    chown $DAEMONUSER $RUNDIR
+    chgrp $DAEMONUSER $RUNDIR
+  fi
+  if [ -e $PIDFILE ]; then
+    PIDDIR=/proc/$(cat $PIDFILE)
+    if [ -d ${PIDDIR} -a  "$(readlink -f ${PIDDIR}/exe)" = "${DAEMON}" ]; then 
+      echo "$DESC already started; not starting."
+    else
+      echo "Removing stale PID file $PIDFILE."
+      rm -f $PIDFILE
+    fi
+  fi
+
+  if [ ! -d $UUIDDIR ]; then
+    mkdir -p $UUIDDIR
+    chown $DAEMONUSER $UUIDDIR
+    chgrp $DAEMONUSER $UUIDDIR
+  fi
+ 
+  dbus-uuidgen --ensure  
+
+  echo -n "Starting $DESC: "
+  start-stop-daemon --start --pidfile $PIDFILE \
+    --user $DAEMONUSER --exec $DAEMON -- --system $PARAMS
+  echo "$NAME."
+  if [ -d $EVENTDIR ]; then
+      run-parts --arg=start $EVENTDIR
+  fi
+}
+
+shut_it_down()
+{
+  if [ -d $EVENTDIR ]; then
+      # TODO: --reverse when busybox supports it
+      run-parts --arg=stop $EVENTDIR
+  fi
+  echo -n "Stopping $DESC: "
+  start-stop-daemon --stop --oknodo --pidfile $PIDFILE \
+    --user $DAEMONUSER
+  # We no longer include these arguments so that start-stop-daemon
+  # can do its job even given that we may have been upgraded.
+  # We rely on the pidfile being sanely managed
+  # --exec $DAEMON -- --system $PARAMS
+  echo "$NAME."
+  rm -f $PIDFILE
+}
+
+reload_it()
+{
+  echo -n "Reloading $DESC config: "
+  dbus-send --print-reply --system --type=method_call \
+            --dest=org.freedesktop.DBus \
+            / org.freedesktop.DBus.ReloadConfig > /dev/null
+  # hopefully this is enough time for dbus to reload it's config file.
+  echo "done."
+}
+
+case "$1" in
+  start)
+    start_it_up
+  ;;
+  stop)
+    shut_it_down
+  ;;
+  reload|force-reload)
+    reload_it
+  ;;
+  restart)
+    shut_it_down
+    sleep 1
+    start_it_up
+  ;;
+  *)
+    echo "Usage: /etc/init.d/$NAME {start|stop|restart|reload|force-reload}" >&2
+    exit 1
+  ;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-core/dbus/dbus/reuseaddr01.patch b/meta-oe/recipes-core/dbus/dbus/reuseaddr01.patch
new file mode 100644
index 0000000000..e291bb8949
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/reuseaddr01.patch
@@ -0,0 +1,64 @@
+From 8f5f340b77b51fed1f036a9ee9f70a31b201f2c9 Mon Sep 17 00:00:00 2001
+From: Sledz <sledz@MOBIL-400-586.intern.dresearch.de>
+Date: Tue, 29 Jun 2010 21:04:15 +0000
+Subject: sysdeps-unix: enable address reuse on TCP sockets
+
+This helps to avoid 'Address already in use' problems if server has been shut
+down, and then restarted while sockets are still active on its port.
+
+Signed-off-by: Steffen Sledz <sledz@dresearch.de>
+---
+diff --git a/dbus/dbus-sysdeps-unix.c b/dbus/dbus-sysdeps-unix.c
+index ce3475a..b58d09a 100644
+--- a/dbus/dbus-sysdeps-unix.c
++++ b/dbus/dbus-sysdeps-unix.c
+@@ -623,6 +623,7 @@ _dbus_listen_unix_socket (const char     *path,
+   int listen_fd;
+   struct sockaddr_un addr;
+   size_t path_len;
++  unsigned int reuseaddr;
+ 
+   _DBUS_ASSERT_ERROR_IS_CLEAR (error);
+ 
+@@ -696,7 +697,15 @@ _dbus_listen_unix_socket (const char     *path,
+ 	
+       strncpy (addr.sun_path, path, path_len);
+     }
+-  
++
++  reuseaddr = 1;
++  if (setsockopt  (listen_fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr, sizeof(reuseaddr))==-1)
++    {
++      dbus_set_error (error, _dbus_error_from_errno (errno),
++                      "Failed to set socket option\"%s\": %s",
++                      path, _dbus_strerror (errno));
++    }
++
+   if (bind (listen_fd, (struct sockaddr*) &addr, _DBUS_STRUCT_OFFSET (struct sockaddr_un, sun_path) + path_len) < 0)
+     {
+       dbus_set_error (error, _dbus_error_from_errno (errno),
+@@ -870,6 +879,7 @@ _dbus_listen_tcp_socket (const char     *host,
+   int nlisten_fd = 0, *listen_fd = NULL, res, i;
+   struct addrinfo hints;
+   struct addrinfo *ai, *tmp;
++  unsigned int reuseaddr;
+ 
+   *fds_p = NULL;
+   _DBUS_ASSERT_ERROR_IS_CLEAR (error);
+@@ -915,6 +925,14 @@ _dbus_listen_tcp_socket (const char     *host,
+         }
+       _DBUS_ASSERT_ERROR_IS_CLEAR(error);
+ 
++      reuseaddr = 1;
++      if (setsockopt (fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr, sizeof(reuseaddr))==-1)
++        {
++          dbus_set_error (error, _dbus_error_from_errno (errno),
++                          "Failed to set socket option \"%s:%s\": %s",
++                          host ? host : "*", port, _dbus_strerror (errno));
++        }
++
+       if (bind (fd, (struct sockaddr*) tmp->ai_addr, tmp->ai_addrlen) < 0)
+         {
+           _dbus_close(fd, NULL);
+--
+cgit v0.8.3-6-g21f6
diff --git a/meta-oe/recipes-core/dbus/dbus/reuseaddr02.patch b/meta-oe/recipes-core/dbus/dbus/reuseaddr02.patch
new file mode 100644
index 0000000000..10bc7edfdc
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/reuseaddr02.patch
@@ -0,0 +1,38 @@
+From d365dd8141e709222f3a619d7b04ec4ded6429fd Mon Sep 17 00:00:00 2001
+From: Havoc Pennington <hp@pobox.com>
+Date: Tue, 31 Aug 2010 15:59:09 +0000
+Subject: Change failure of setsockopt SO_REUSEADDR to be a warning, not set an error
+
+It was previously setting an error but then continuing, which is
+not allowed since errors can't be "piled up"
+---
+diff --git a/dbus/dbus-sysdeps-unix.c b/dbus/dbus-sysdeps-unix.c
+index e4ff6ee..3205bed 100644
+--- a/dbus/dbus-sysdeps-unix.c
++++ b/dbus/dbus-sysdeps-unix.c
+@@ -980,9 +980,8 @@ _dbus_listen_unix_socket (const char     *path,
+   reuseaddr = 1;
+   if (setsockopt  (listen_fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr, sizeof(reuseaddr))==-1)
+     {
+-      dbus_set_error (error, _dbus_error_from_errno (errno),
+-                      "Failed to set socket option\"%s\": %s",
+-                      path, _dbus_strerror (errno));
++      _dbus_warn ("Failed to set socket option\"%s\": %s",
++                  path, _dbus_strerror (errno));
+     }
+ 
+   if (bind (listen_fd, (struct sockaddr*) &addr, _DBUS_STRUCT_OFFSET (struct sockaddr_un, sun_path) + path_len) < 0)
+@@ -1335,9 +1334,8 @@ _dbus_listen_tcp_socket (const char     *host,
+       reuseaddr = 1;
+       if (setsockopt (fd, SOL_SOCKET, SO_REUSEADDR, &reuseaddr, sizeof(reuseaddr))==-1)
+         {
+-          dbus_set_error (error, _dbus_error_from_errno (errno),
+-                          "Failed to set socket option \"%s:%s\": %s",
+-                          host ? host : "*", port, _dbus_strerror (errno));
++          _dbus_warn ("Failed to set socket option \"%s:%s\": %s",
++                      host ? host : "*", port, _dbus_strerror (errno));
+         }
+ 
+       if (bind (fd, (struct sockaddr*) tmp->ai_addr, tmp->ai_addrlen) < 0)
+--
+cgit v0.8.3-6-g21f6
diff --git a/meta-oe/recipes-core/dbus/dbus/tmpdir.patch b/meta-oe/recipes-core/dbus/dbus/tmpdir.patch
new file mode 100644
index 0000000000..838b903f0a
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus/tmpdir.patch
@@ -0,0 +1,30 @@
+--- dbus-0.22/configure.in.orig	2004-08-13 00:57:16.000000000 +0200
++++ dbus-0.22/configure.in	2004-12-30 21:15:57.000000000 +0100
+@@ -1047,15 +1048,18 @@
+ AC_SUBST(ABSOLUTE_TOP_BUILDDIR)
+ 
+ #### Find socket directories
+-if ! test -z "$TMPDIR" ; then
+-   DEFAULT_SOCKET_DIR=$TMPDIR
+-elif ! test -z "$TEMP" ; then
+-   DEFAULT_SOCKET_DIR=$TEMP
+-elif ! test -z "$TMP" ; then
+-   DEFAULT_SOCKET_DIR=$TMP
+-else
+-   DEFAULT_SOCKET_DIR=/tmp
+-fi
++#if ! test -z "$TMPDIR" ; then
++#   DEFAULT_SOCKET_DIR=$TMPDIR
++#elif ! test -z "$TEMP" ; then
++#   DEFAULT_SOCKET_DIR=$TEMP
++#elif ! test -z "$TMP" ; then
++#   DEFAULT_SOCKET_DIR=$TMP
++#else
++#   DEFAULT_SOCKET_DIR=/tmp
++#fi
++
++# checks disabled to avoid expanding this at build time
++DEFAULT_SOCKET_DIR=/tmp
+ 
+ if ! test -z "$with_test_socket_dir" ; then
+    TEST_SOCKET_DIR="$with_test_socket_dir"
diff --git a/meta-oe/recipes-core/dbus/dbus_1.2.24.bb b/meta-oe/recipes-core/dbus/dbus_1.2.24.bb
new file mode 100644
index 0000000000..75825514b8
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus_1.2.24.bb
@@ -0,0 +1,19 @@
+include dbus.inc
+
+PR = "${INC_PR}.1"
+
+SRC_URI = "\
+  http://dbus.freedesktop.org/releases/dbus/dbus-${PV}.tar.gz;name=dbus \
+  file://tmpdir.patch \
+  file://fix-install-daemon.patch \
+  file://0001-Make-the-default-DBus-reply-timeout-configurable.patch \
+  file://dbus-1.init \
+  file://reuseaddr01.patch \
+  file://reuseaddr02.patch \
+"
+
+SRC_URI_append_hipox = "file://anon.patch"
+
+SRC_URI[dbus.md5sum] = "565346cecd9cfecf1463540c6086cc2c"
+SRC_URI[dbus.sha256sum] = "f12c748f4a703655e3d4c3db94cdf5a752a0cd0b36958c715804373bd3595c48"
+
diff --git a/meta-oe/recipes-core/dbus/dbus_1.4.0.bb b/meta-oe/recipes-core/dbus/dbus_1.4.0.bb
new file mode 100644
index 0000000000..2c4943b4f0
--- /dev/null
+++ b/meta-oe/recipes-core/dbus/dbus_1.4.0.bb
@@ -0,0 +1,18 @@
+include dbus.inc
+PR = "${INC_PR}.0"
+
+BBCLASSEXTEND = "native"
+
+SRC_URI = "\
+  http://dbus.freedesktop.org/releases/dbus/dbus-${PV}.tar.gz \
+  \
+  file://tmpdir.patch \
+  file://add-configurable-reply-timeouts.patch \
+  file://dbus-1.init \
+"            
+
+# This needs more testing before pushing as default dbus
+DEFAULT_PREFERENCE = "-1"
+
+SRC_URI[md5sum] = "f59618b18d2fb2bd1fce9e1c5a2a3282"
+SRC_URI[sha256sum] = "c96d2f86d40e158e2bf405925a0a42cce0533a8466098e2f2238aa1614926652"
diff --git a/meta-oe/recipes-core/fakeroot/fakeroot-native_1.12.4.bb b/meta-oe/recipes-core/fakeroot/fakeroot-native_1.12.4.bb
new file mode 100644
index 0000000000..e6add2bb26
--- /dev/null
+++ b/meta-oe/recipes-core/fakeroot/fakeroot-native_1.12.4.bb
@@ -0,0 +1,21 @@
+require fakeroot_${PV}.bb
+
+SRC_URI += "file://fix-prefix.patch"
+S = "${WORKDIR}/fakeroot-${PV}"
+
+inherit native
+
+EXTRA_OECONF = "--program-prefix="
+
+# Compatability for the rare systems not using or having SYSV
+python () {
+    if bb.data.getVar('HOST_NONSYSV', d, True) and bb.data.getVar('HOST_NONSYSV', d, True) != '0':
+        bb.data.setVar('EXTRA_OECONF', ' --with-ipc=tcp --program-prefix= ', d)
+}
+
+NATIVE_INSTALL_WORKS = "1"
+
+RDEPENDS_${PN} = "util-linux-native"
+
+SRC_URI[md5sum] = "aaefede2405a40c87438e7e833d69b70"
+SRC_URI[sha256sum] = "dbcab1f495b857e67feff882e018ca59958b8d189ff1f76684d28e35463ec29d"
diff --git a/meta-oe/recipes-core/fakeroot/fakeroot/configure-libtool.patch b/meta-oe/recipes-core/fakeroot/fakeroot/configure-libtool.patch
new file mode 100644
index 0000000000..46f7df7025
--- /dev/null
+++ b/meta-oe/recipes-core/fakeroot/fakeroot/configure-libtool.patch
@@ -0,0 +1,20 @@
+Index: fakeroot-1.12.1/configure.ac
+===================================================================
+--- fakeroot-1.12.1.orig/configure.ac
++++ fakeroot-1.12.1/configure.ac
+@@ -2,14 +2,12 @@
+ AC_INIT([fakeroot],[FAKEROOT_VERSION],[schizo@debian.org],[fakeroot])
+ AC_PREREQ(2.61)
+ AC_CONFIG_MACRO_DIR([build-aux])
+-LT_PREREQ(2.1a)
+ AC_CANONICAL_TARGET
+ AM_INIT_AUTOMAKE
+ AM_MAINTAINER_MODE
+ AC_CONFIG_HEADERS([config.h])
+ AC_PROG_MAKE_SET
+-LT_INIT
+-LT_LANG(C)
++AC_PROG_LIBTOOL
+ 
+ AH_BOTTOM([#if ! HAVE_BUILTIN_EXPECT
+ #define __builtin_expect(x, expected_value) (x)
diff --git a/meta-oe/recipes-core/fakeroot/fakeroot/fix-prefix.patch b/meta-oe/recipes-core/fakeroot/fakeroot/fix-prefix.patch
new file mode 100644
index 0000000000..3c47bd7650
--- /dev/null
+++ b/meta-oe/recipes-core/fakeroot/fakeroot/fix-prefix.patch
@@ -0,0 +1,15 @@
+Index: fakeroot-1.12.1/scripts/fakeroot.in
+===================================================================
+--- fakeroot-1.12.1.orig/scripts/fakeroot.in
++++ fakeroot-1.12.1/scripts/fakeroot.in
+@@ -30,8 +30,8 @@
+ }
+ 
+ # strip /bin/fakeroot to find install prefix
+-PREFIX=@prefix@
+-BINDIR=@bindir@
++BINDIR=`dirname $0`
++PREFIX=`dirname ${BINDIR}`
+ 
+ USEABSLIBPATH=@LDPRELOADABS@
+ LIB=lib@fakeroot_transformed@@DLSUFFIX@
diff --git a/meta-oe/recipes-core/fakeroot/fakeroot_1.12.4.bb b/meta-oe/recipes-core/fakeroot/fakeroot_1.12.4.bb
new file mode 100644
index 0000000000..c265749f64
--- /dev/null
+++ b/meta-oe/recipes-core/fakeroot/fakeroot_1.12.4.bb
@@ -0,0 +1,26 @@
+DESCRIPTION = "Gives a fake root environment"
+HOMEPAGE = "http://fakeroot.alioth.debian.org"
+SECTION = "base"
+LICENSE = "GPL"
+PR = "r2"
+
+SRC_URI = "\
+  ${DEBIAN_MIRROR}/main/f/fakeroot/fakeroot_${PV}.tar.gz \
+  file://configure-libtool.patch \
+"
+	    
+inherit autotools
+
+do_install_append() {
+        install -d ${D}${includedir}/fakeroot
+        install -m 644 *.h ${D}${includedir}/fakeroot
+        install -d ${D}${libdir}/libfakeroot/
+        oe_libinstall -so libfakeroot ${D}${libdir}/libfakeroot/
+}
+
+# fakeroot needs getopt which is provided by the util-linux package
+RDEPENDS_${PN} = "util-linux"
+
+
+SRC_URI[md5sum] = "aaefede2405a40c87438e7e833d69b70"
+SRC_URI[sha256sum] = "dbcab1f495b857e67feff882e018ca59958b8d189ff1f76684d28e35463ec29d"
diff --git a/meta-oe/recipes-core/udev/udev-165/akita/default b/meta-oe/recipes-core/udev/udev-165/akita/default
new file mode 100644
index 0000000000..d0050b873c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/akita/default
@@ -0,0 +1,4 @@
+# Default for /etc/init.d/udev
+
+# Comment this out to disable device cache
+#DEVCACHE="/etc/dev.tar"
diff --git a/meta-oe/recipes-core/udev/udev-165/bug/10-mx31.rules b/meta-oe/recipes-core/udev/udev-165/bug/10-mx31.rules
new file mode 100644
index 0000000000..de427fc8b2
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/bug/10-mx31.rules
@@ -0,0 +1,49 @@
+KERNEL=="ttyS[0-9]",	NAME="tts/%n",		SYMLINK+="tts%n"
+KERNEL=="ttymxc[0-9]",	NAME="ttymxc/%n",	SYMLINK+="ttymxc%n"
+
+KERNEL=="mxc_mu[0-9]",	NAME="mxc_mu/%n",	SYMLINK+="mxc_mu%n"
+KERNEL=="fb*",		NAME="fb/%n",		SYMLINK+="fb%n"
+KERNEL=="i2c*",		NAME="i2c/%n"
+KERNEL=="mxc_ipc*",	NAME="mxc_ipc/%n"
+KERNEL=="video*",	NAME="v4l/video%n"
+
+KERNEL=="rtc",		NAME="misc/rtc"
+KERNEL=="watchdog",	NAME="misc/watchdog"
+
+KERNEL=="mc13783_adc",	NAME="mc13783_adc",	SYMLINK+="ts"
+KERNEL=="pmic_adc",	NAME="pmic_adc",	SYMLINK+="ts"
+
+# The long class name gets cut off to be mc13783_connectiv in 
+# /sys/class/mc13783_connectivity/mc13783_connectivit
+KERNEL=="mc13783_connectiv*",	NAME="mc13783_connectivity"
+
+KERNEL=="mxc_ssi[0-9]*",	NAME="mxc_ssi/%n",	SYMLINK+="mxc_ssi%n"
+KERNEL=="spi[0-9]*",	NAME="spi/%n",		SYMLINK+="spi%n"
+
+KERNEL=="mtdblock*",	NAME="mtdblock/%n"	SYMLINK+="mtdblock%n"
+KERNEL=="mtd[0-9]",	NAME="mtd/%n"
+
+# A more elegant way of doing this must exist...
+KERNEL=="mtd0ro",	NAME="mtd/0ro"
+KERNEL=="mtd1ro",	NAME="mtd/1ro"
+KERNEL=="mtd2ro",	NAME="mtd/2ro"
+KERNEL=="mtd3ro",	NAME="mtd/3ro"
+KERNEL=="mtd4ro",	NAME="mtd/4ro"
+KERNEL=="mtd5ro",	NAME="mtd/5ro"
+KERNEL=="mtd6ro",	NAME="mtd/6ro"
+KERNEL=="mtd7ro",	NAME="mtd/7ro"
+KERNEL=="mtd8ro",	NAME="mtd/8ro"
+KERNEL=="mtd9ro",	NAME="mtd/9ro"
+
+# Note that we want /dev/dsp linked to /dev/sound/dsp1...
+KERNEL=="dsp",		NAME="sound/dsp"
+KERNEL=="dspW",		NAME="sound/dspW"
+KERNEL=="dsp1",		NAME="sound/dsp1",	SYMLINK+="dsp"
+KERNEL=="mixer",		NAME="sound/mixer",	SYMLINK+="mixer"
+KERNEL=="sequencer",	NAME="sound/sequencer"
+KERNEL=="sequencer2",	NAME="sound/sequencer2"
+
+KERNEL=="ram[0-9]*",	NAME="ram/%n",		SYMLINK+="ram%n"
+
+KERNEL=="dvfs_dptc",	NAME="dvfs_dptc",	SYMLINK+="dptc dvfs"
+
diff --git a/meta-oe/recipes-core/udev/udev-165/bug/30-BUG.rules b/meta-oe/recipes-core/udev/udev-165/bug/30-BUG.rules
new file mode 100644
index 0000000000..06faa6bb91
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/bug/30-BUG.rules
@@ -0,0 +1,26 @@
+##
+## BUG/BMI specific
+##
+KERNEL=="event*", ATTRS{name}=="bugnav", SYMLINK+="input/bugnav"
+KERNEL=="event*", ATTRS{name}=="bmi_motion", SYMLINK+="input/bmi_motion"
+KERNEL=="event*", ATTRS{name}=="bug_cam", SYMLINK+="input/bmi_cam"
+KERNEL=="event*", ATTRS{name}=="bmi_audio_status_m1", SYMLINK+="input/bmi_audio_m1"
+KERNEL=="event*", ATTRS{name}=="bmi_audio_status_m2", SYMLINK+="input/bmi_audio_m2"
+KERNEL=="event*", ATTRS{name}=="bmi_audio_status_m3", SYMLINK+="input/bmi_audio_m3"
+KERNEL=="event*", ATTRS{name}=="bmi_audio_status_m4", SYMLINK+="input/bmi_audio_m4"
+DEVPATH=="/devices/platform/bugfb.0", SYMLINK+="bugfb"
+KERNEL=="rtc0", SYMLINK+="rtc"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts0", SYMLINK+="input/bmi_lcd_ts0"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts1", SYMLINK+="input/bmi_lcd_ts1"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts2", SYMLINK+="input/bmi_lcd_ts2"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts3", SYMLINK+="input/bmi_lcd_ts3"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts4", SYMLINK+="input/bmi_lcd_ts4"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts5", SYMLINK+="input/bmi_lcd_ts5"
+KERNEL=="event*", ATTRS{name}=="bmi_lcd_ts6", SYMLINK+="input/bmi_lcd_ts6"
+ACTION=="add", DEVPATH=="/devices/conn*", RUN+="/bin/sh /etc/udev/scripts/bmi_eventpipe.sh"
+ACTION=="remove", DEVPATH=="/devices/conn*", RUN+="/bin/sh /etc/udev/scripts/bmi_eventpipe.sh"
+#
+# For USB PBPSD, which we've arbitrarily decided will be module F001
+#
+ACTION=="remove", SUBSYSTEM=="usb", DRIVERS=="psd_driver", ENV{BMIBUS_PRODUCT}="F001", ENV{BMIBUS_SLOT}="%n", RUN+="/bin/sh /etc/udev/scripts/bmi_eventpipe.sh"
+ACTION=="add", SUBSYSTEM=="usb", DRIVERS=="psd_driver", ENV{BMIBUS_PRODUCT}="F001", ENV{BMIBUS_SLOT}="%n", RUN+="/bin/sh /etc/udev/scripts/bmi_eventpipe.sh"
diff --git a/meta-oe/recipes-core/udev/udev-165/bug/bmi_eventpipe.sh b/meta-oe/recipes-core/udev/udev-165/bug/bmi_eventpipe.sh
new file mode 100644
index 0000000000..acbae56118
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/bug/bmi_eventpipe.sh
@@ -0,0 +1,8 @@
+#!/bin/sh
+#
+# This script passes BMI state variables to the running JVM.
+#
+if [ ${BMIBUS_PRODUCT} != "" ] && [ ${BMIBUS_SLOT} != "" ] && [ ${ACTION} != "" ];
+then                                                                            
+        echo $BMIBUS_PRODUCT 0 $BMIBUS_SLOT $ACTION > /tmp/eventpipe            
+fi
diff --git a/meta-oe/recipes-core/udev/udev-165/c7x0/default b/meta-oe/recipes-core/udev/udev-165/c7x0/default
new file mode 100644
index 0000000000..d0050b873c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/c7x0/default
@@ -0,0 +1,4 @@
+# Default for /etc/init.d/udev
+
+# Comment this out to disable device cache
+#DEVCACHE="/etc/dev.tar"
diff --git a/meta-oe/recipes-core/udev/udev-165/cache b/meta-oe/recipes-core/udev/udev-165/cache
new file mode 100644
index 0000000000..c0d400b448
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/cache
@@ -0,0 +1,22 @@
+#!/bin/sh -e
+
+export TZ=/etc/localtime
+
+[ -f /etc/default/udev ] && . /etc/default/udev
+
+echo "Caching udev devnodes"
+
+if [ "$DEVCACHE" != "" ]; then
+	echo -n "Populating dev cache"
+	(cd /; tar cf $DEVCACHE dev)
+	mv /tmp/uname /etc/udev/saved.uname
+	mv /tmp/cmdline /etc/udev/saved.cmdline
+	mv /tmp/atags /etc/udev/saved.atags
+	echo
+else
+	rm -f /tmp/uname
+	rm -f /tmp/cmdline
+	rm -f /tmp/atags
+fi
+
+exit 0
diff --git a/meta-oe/recipes-core/udev/udev-165/default b/meta-oe/recipes-core/udev/udev-165/default
new file mode 100644
index 0000000000..5c4937a9a0
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/default
@@ -0,0 +1,4 @@
+# Default for /etc/init.d/udev
+
+# Comment this out to disable device cache
+DEVCACHE="/etc/dev.tar"
diff --git a/meta-oe/recipes-core/udev/udev-165/init b/meta-oe/recipes-core/udev/udev-165/init
new file mode 100644
index 0000000000..7ec32afd01
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/init
@@ -0,0 +1,73 @@
+#!/bin/sh -e
+
+### BEGIN INIT INFO
+# Provides:          udev
+# Required-Start:    mountvirtfs
+# Required-Stop:     
+# Default-Start:     S
+# Default-Stop:
+# Short-Description: Start udevd, populate /dev and load drivers.
+### END INIT INFO
+
+export TZ=/etc/localtime
+
+[ -d /sys/class ] || exit 1
+[ -r /proc/mounts ] || exit 1
+[ -x /sbin/udevd ] || exit 1
+[ -f /etc/default/udev ] && . /etc/default/udev
+[ -f /etc/udev/udev.conf ] && . /etc/udev/udev.conf
+
+kill_udevd() {
+        if [ -x /sbin/pidof ]; then
+                pid=`/sbin/pidof -x udevd`
+                [ -n "$pid" ] && kill $pid
+        fi
+}
+
+export ACTION=add
+# propagate /dev from /sys
+echo "Starting udev"
+
+# mount the tmpfs on /dev, if not already done
+LANG=C awk "\$2 == \"/dev\" && \$3 == \"tmpfs\" { exit 1 }" /proc/mounts && {
+        mount -n -o mode=0755 -t tmpfs none "/dev"
+        mkdir -m 0755 /dev/pts
+        mkdir -m 1777 /dev/shm
+}
+
+if [ "$DEVCACHE" != "" ]; then
+	# Invalidate udev cache if the kernel or its bootargs/cmdline have changed
+	[ -x /bin/uname ] && /bin/uname -mrspv > /tmp/uname || touch /tmp/uname
+	[ -r /proc/cmdline ] && cat /proc/cmdline > /tmp/cmdline || touch /tmp/cmdline
+	[ -r /proc/atags ] && cat /proc/atags > /tmp/atags || touch /tmp/atags
+	if [ -e $DEVCACHE ] && \
+	   cmp -s /tmp/uname /etc/udev/saved.uname && \
+	   cmp -s /tmp/cmdline /etc/udev/saved.cmdline && \
+	   cmp -s /tmp/atags /etc/udev/saved.atags; then
+		(cd /; tar xf $DEVCACHE > /dev/null 2>&1)
+		not_first_boot=1
+	fi
+fi
+
+if [ ! -e "/lib/modules/$(uname -r)"/modules.dep ] ; then
+	mkdir -p /lib/modules/$(uname -r)
+	depmod -ae
+fi
+
+# make_extra_nodes
+kill_udevd > "/dev/null" 2>&1
+
+        # trigger the sorted events
+        echo -e '\000\000\000\000' > /proc/sys/kernel/hotplug
+        /sbin/udevd -d
+
+        /sbin/udevadm control --env STARTUP=1
+		if [ "$not_first_boot" != "" ];then
+			/sbin/udevadm trigger --action=add --subsystem-nomatch=tty --subsystem-nomatch=mem --subsystem-nomatch=vc --subsystem-nomatch=vtconsole --subsystem-nomatch=misc --subsystem-nomatch=dcon --subsystem-nomatch=pci_bus  --subsystem-nomatch=graphics  --subsystem-nomatch=backlight --subsystem-nomatch=video4linux  --subsystem-nomatch=platform
+			(/sbin/udevadm settle --timeout=8; /sbin/udevadm control --env STARTUP=)&
+		else
+			/sbin/udevadm trigger
+			/sbin/udevadm settle
+		fi
+
+exit 0
diff --git a/meta-oe/recipes-core/udev/udev-165/local.rules b/meta-oe/recipes-core/udev/udev-165/local.rules
new file mode 100644
index 0000000000..da4b38593c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/local.rules
@@ -0,0 +1,35 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# Media automounting
+SUBSYSTEM=="block", ACTION=="add"    RUN+="/etc/udev/scripts/mount.sh"
+SUBSYSTEM=="block", ACTION=="remove" RUN+="/etc/udev/scripts/mount.sh"
+
+# Handle network interface setup
+SUBSYSTEM=="net", ACTION=="add" RUN+="/etc/udev/scripts/network.sh"
+SUBSYSTEM=="net", ACTION=="remove" RUN+="/etc/udev/scripts/network.sh"
+
+# The first rtc device is symlinked to /dev/rtc
+KERNEL=="rtc0", SYMLINK+="rtc"
+
+#The first framebuffer is symlinked to /dev/fb
+KERNEL=="fb0",  SYMLINK+="fb"
+
+# Try and modprobe for drivers for new hardware
+ACTION=="add", DEVPATH=="/devices/*", ENV{MODALIAS}=="?*", RUN+="/sbin/modprobe $env{MODALIAS}"
+
+# Create a symlink to any touchscreen input device
+SUBSYSTEM=="input", KERNEL=="event[0-9]*", ATTRS{modalias}=="input:*-e0*,3,*a0,1,*18,*", SYMLINK+="input/touchscreen0"
+SUBSYSTEM=="input", KERNEL=="event[0-9]*", ATTRS{modalias}=="ads7846", SYMLINK+="input/touchscreen0"
diff --git a/meta-oe/recipes-core/udev/udev-165/omap3-pandora/local.rules b/meta-oe/recipes-core/udev/udev-165/omap3-pandora/local.rules
new file mode 100644
index 0000000000..e433cf9593
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/omap3-pandora/local.rules
@@ -0,0 +1,40 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# Media automounting
+SUBSYSTEM=="block", ACTION=="add"    RUN+="/etc/udev/scripts/mount.sh"
+SUBSYSTEM=="block", ACTION=="remove" RUN+="/etc/udev/scripts/mount.sh"
+
+# Handle network interface setup
+SUBSYSTEM=="net", ACTION=="add" RUN+="/etc/udev/scripts/network.sh"
+SUBSYSTEM=="net", ACTION=="remove" RUN+="/etc/udev/scripts/network.sh"
+
+# The first rtc device is symlinked to /dev/rtc
+KERNEL=="rtc0", SYMLINK+="rtc"
+
+#The first framebuffer is symlinked to /dev/fb
+KERNEL=="fb0",  SYMLINK+="fb"
+
+# Try and modprobe for drivers for new hardware
+ACTION=="add", DEVPATH=="/devices/*", ENV{MODALIAS}=="?*", RUN+="/sbin/modprobe $env{MODALIAS}"
+
+# Create a symlink to any touchscreen input device
+SUBSYSTEM=="input", KERNEL=="event[0-9]*", SYSFS{modalias}=="input:*-e0*,3,*a0,1,*18,*", SYMLINK+="input/touchscreen0"
+SUBSYSTEM=="input", KERNEL=="event[0-9]*", SYSFS{modalias}=="ads7846", SYMLINK+="input/touchscreen0"
+
+# Local UDEV rule changes for the Pandora system.
+
+# Let all users access the event devices using EVDEV (the OpenPandora is not multiuser after all).
+KERNEL=="event[0-9]",MODE="0666"
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev-165/permissions.rules b/meta-oe/recipes-core/udev/udev-165/permissions.rules
new file mode 100644
index 0000000000..f4f94a6dbe
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/permissions.rules
@@ -0,0 +1,110 @@
+ACTION!="add", GOTO="permissions_end"
+
+# devices needed to load the drivers providing them
+KERNEL=="tun",					OPTIONS+="ignore_remove"
+KERNEL=="ppp",					OPTIONS+="ignore_remove"
+KERNEL=="loop[0-9]*",				OPTIONS+="ignore_remove"
+
+# default permissions for block devices
+SUBSYSTEM=="block",				GROUP="disk"
+# the aacraid driver is broken and reports that disks removable (see #404927)
+SUBSYSTEM=="block", ATTRS{removable}=="1", \
+	DRIVERS!="aacraid",			GROUP="floppy"
+# all block devices on these buses are "removable"
+SUBSYSTEM=="block", SUBSYSTEMS=="usb|ieee1394|mmc|pcmcia", GROUP="floppy"
+
+# IDE devices
+KERNEL=="hd[a-z]|pcd[0-9]*", 			DRIVERS=="ide-cdrom|pcd", \
+	IMPORT{program}="cdrom_id --export $tempnode"
+ENV{ID_CDROM}=="?*",				GROUP="cdrom"
+KERNEL=="ht[0-9]*", 				GROUP="tape"
+KERNEL=="nht[0-9]*", 				GROUP="tape"
+
+# SCSI devices
+KERNEL=="sr[0-9]*", IMPORT{program}="cdrom_id --export $tempnode"
+SUBSYSTEMS=="scsi", ATTRS{type}=="1",				GROUP="tape"
+SUBSYSTEMS=="scsi", ATTRS{type}=="4",				GROUP="cdrom"
+SUBSYSTEMS=="scsi", ATTRS{type}=="5",				GROUP="cdrom"
+SUBSYSTEMS=="scsi", ATTRS{type}=="8",				GROUP="tape"
+
+# USB devices
+KERNEL=="legousbtower*",	MODE="0666"
+KERNEL=="lp[0-9]*", SUBSYSTEMS=="usb",		GROUP="lp"
+
+# usbfs-like devices
+SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device", \
+				MODE="0664"
+
+# iRiver music players
+SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device",	GROUP="plugdev", \
+	ATTRS{idVendor}=="4102", ATTRS{idProduct}=="10[01][135789]"
+
+# serial devices
+SUBSYSTEM=="tty",				GROUP="dialout"
+SUBSYSTEM=="capi",				GROUP="dialout"
+SUBSYSTEM=="slamr",				GROUP="dialout"
+SUBSYSTEM=="zaptel",				GROUP="dialout"
+
+# vc devices (all members of the tty subsystem)
+KERNEL=="ptmx",			MODE="0666",	GROUP="root"
+KERNEL=="console",		MODE="0600",	GROUP="root"
+KERNEL=="tty",			MODE="0666",	GROUP="root"
+KERNEL=="tty[0-9]*",				GROUP="root"
+KERNEL=="pty*",			MODE="0666",	GROUP="tty"
+
+# video devices
+SUBSYSTEM=="video4linux",			GROUP="video"
+SUBSYSTEM=="drm",				GROUP="video"
+SUBSYSTEM=="dvb",				GROUP="video"
+SUBSYSTEM=="em8300",				GROUP="video"
+SUBSYSTEM=="graphics",				GROUP="video"
+SUBSYSTEM=="nvidia",				GROUP="video"
+
+# misc devices
+KERNEL=="random",		MODE="0666"
+KERNEL=="urandom",		MODE="0666"
+KERNEL=="mem",			MODE="0640",	GROUP="kmem"
+KERNEL=="kmem",			MODE="0640",	GROUP="kmem"
+KERNEL=="port",			MODE="0640",	GROUP="kmem"
+KERNEL=="full",			MODE="0666"
+KERNEL=="null",			MODE="0666"
+KERNEL=="zero",			MODE="0666"
+KERNEL=="inotify",		MODE="0666"
+KERNEL=="sgi_fetchop",		MODE="0666"
+KERNEL=="sonypi",		MODE="0666"
+KERNEL=="agpgart",				GROUP="video"
+KERNEL=="rtc|rtc[0-9]*",			GROUP="audio"
+KERNEL=="kqemu",		MODE="0666"
+KERNEL=="tun",			MODE="0666",
+
+KERNEL=="cdemu[0-9]*",				GROUP="cdrom"
+KERNEL=="pktcdvd[0-9]*",			GROUP="cdrom"
+KERNEL=="pktcdvd",		MODE="0644"
+
+# printers and parallel devices
+SUBSYSTEM=="printer",				GROUP="lp"
+SUBSYSTEM=="ppdev",				GROUP="lp"
+KERNEL=="irlpt*",				GROUP="lp"
+KERNEL=="pt[0-9]*",				GROUP="tape"
+KERNEL=="pht[0-9]*",				GROUP="tape"
+
+# sound devices
+SUBSYSTEM=="sound",				GROUP="audio"
+
+# ieee1394 devices       
+KERNEL=="raw1394",				GROUP="disk"
+KERNEL=="dv1394*",				GROUP="video"
+KERNEL=="video1394*",				GROUP="video"
+
+# input devices
+KERNEL=="event[0-9]*", ATTRS{name}=="*dvb*|*DVB*|* IR *" \
+				MODE="0664",	GROUP="video"
+KERNEL=="js[0-9]*",		MODE="0664"
+KERNEL=="lirc[0-9]*",				GROUP="video"
+
+# AOE character devices
+SUBSYSTEM=="aoe",		MODE="0220",	GROUP="disk"
+SUBSYSTEM=="aoe", KERNEL=="err", MODE="0440"
+
+LABEL="permissions_end"
+
diff --git a/meta-oe/recipes-core/udev/udev-165/run.rules b/meta-oe/recipes-core/udev/udev-165/run.rules
new file mode 100644
index 0000000000..75d71375bb
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/run.rules
@@ -0,0 +1,14 @@
+# debugging monitor
+RUN+="socket:/org/kernel/udev/monitor"
+
+# run a command on remove events
+ACTION=="remove", ENV{REMOVE_CMD}!="", RUN+="$env{REMOVE_CMD}"
+
+# ignore the events generated by virtual consoles
+KERNEL=="ptmx",		OPTIONS+="last_rule"
+KERNEL=="console",	OPTIONS+="last_rule"
+KERNEL=="tty"	,	OPTIONS+="last_rule"
+KERNEL=="tty[0-9]*",	OPTIONS+="last_rule"
+KERNEL=="pty*",		OPTIONS+="last_rule"
+SUBSYSTEM=="vc",	OPTIONS+="last_rule"
+
diff --git a/meta-oe/recipes-core/udev/udev-165/spitz/default b/meta-oe/recipes-core/udev/udev-165/spitz/default
new file mode 100644
index 0000000000..d0050b873c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/spitz/default
@@ -0,0 +1,4 @@
+# Default for /etc/init.d/udev
+
+# Comment this out to disable device cache
+#DEVCACHE="/etc/dev.tar"
diff --git a/meta-oe/recipes-core/udev/udev-165/tosa/default b/meta-oe/recipes-core/udev/udev-165/tosa/default
new file mode 100644
index 0000000000..d0050b873c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/tosa/default
@@ -0,0 +1,4 @@
+# Default for /etc/init.d/udev
+
+# Comment this out to disable device cache
+#DEVCACHE="/etc/dev.tar"
diff --git a/meta-oe/recipes-core/udev/udev-165/udev-replace-le16toh.patch b/meta-oe/recipes-core/udev/udev-165/udev-replace-le16toh.patch
new file mode 100644
index 0000000000..7776c9a10e
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/udev-replace-le16toh.patch
@@ -0,0 +1,21 @@
+This patch is needed on uclibc.
+
+-Khem
+
+Index: udev-151/extras/ata_id/ata_id.c
+===================================================================
+--- udev-151.orig/extras/ata_id/ata_id.c	2010-06-04 14:08:41.912730501 -0700
++++ udev-151/extras/ata_id/ata_id.c	2010-06-04 14:09:31.492734527 -0700
+@@ -168,7 +168,11 @@ static void disk_identify_fixup_uint16 (
+ 	uint16_t *p;
+ 
+ 	p = (uint16_t *) identify;
+-	p[offset_words] = le16toh (p[offset_words]);
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++	p[offset_words] = p[offset_words];
++#else
++	p[offset_words] = __bswap_16 (p[offset_words]);
++#endif
+ }
+ 
+ /**
diff --git a/meta-oe/recipes-core/udev/udev-165/udev-replace-lutimes.patch b/meta-oe/recipes-core/udev/udev-165/udev-replace-lutimes.patch
new file mode 100644
index 0000000000..dd77897345
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/udev-replace-lutimes.patch
@@ -0,0 +1,25 @@
+This patch is needed on uclibc
+
+-Khem
+Index: udev-151/udev/udev-node.c
+===================================================================
+--- udev-151.orig/udev/udev-node.c	2010-06-04 14:18:59.082727182 -0700
++++ udev-151/udev/udev-node.c	2010-06-04 14:20:27.485282812 -0700
+@@ -57,7 +57,7 @@ int udev_node_mknod(struct udev_device *
+ 			preserve = 1;
+ 			udev_selinux_lsetfilecon(udev, file, mode);
+ 			/* update time stamp when we re-use the node, like on media change events */
+-			utimes(file, NULL);
++			utimensat(AT_FDCWD, file, NULL, 0);
+ 		} else {
+ 			char file_tmp[UTIL_PATH_SIZE + sizeof(TMP_FILE_EXT)];
+ 
+@@ -178,7 +178,7 @@ static int node_symlink(struct udev *ude
+ 					info(udev, "preserve already existing symlink '%s' to '%s'\n",
+ 					     slink, target);
+ 					udev_selinux_lsetfilecon(udev, slink, S_IFLNK);
+-					lutimes(slink, NULL);
++					utimensat(AT_FDCWD, slink, NULL, AT_SYMLINK_NOFOLLOW);
+ 					goto exit;
+ 				}
+ 			}
diff --git a/meta-oe/recipes-core/udev/udev-165/udev.rules b/meta-oe/recipes-core/udev/udev-165/udev.rules
new file mode 100644
index 0000000000..c20cdcc153
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev-165/udev.rules
@@ -0,0 +1,113 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# workaround for devices which do not report media changes
+SUBSYSTEMS=="ide", KERNEL=="hd[a-z]", ATTR{removable}=="1", \
+	ENV{ID_MODEL}=="IOMEGA_ZIP*", OPTIONS+="all_partitions"
+SUBSYSTEMS=="ide", KERNEL=="hd[a-z]", ATTRS{media}=="floppy", \
+	OPTIONS+="all_partitions"
+
+# SCSI devices
+SUBSYSTEMS=="scsi", KERNEL=="sr[0-9]*",	NAME="scd%n", SYMLINK+="sr%n"
+
+# USB devices
+SUBSYSTEMS=="usb", KERNEL=="auer[0-9]*",	NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="cpad[0-9]*",	NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="dabusb*",		NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="hiddev*",		NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="legousbtower*",	NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="lp[0-9]*",		NAME="usb/%k"
+SUBSYSTEMS=="usb", KERNEL=="ttyUSB*", \
+	ATTRS{product}=="Palm Handheld*|Handspring Visor|palmOne Handheld", \
+					SYMLINK+="pilot"
+
+# usbfs-like devices
+SUBSYSTEM=="usb_device",	PROGRAM="/bin/sh -c 'K=%k; K=$${K#usbdev}; printf bus/usb/%%03i/%%03i $${K%%%%.*} $${K#*.}'", ACTION=="add", \
+				NAME="%c"
+SUBSYSTEM=="usb", ENV{DEVTYPE}=="usb_device",	NAME="bus/usb/$env{BUSNUM}/$env{DEVNUM}"
+
+# serial devices
+KERNEL=="capi",			NAME="capi20", SYMLINK+="isdn/capi20"
+KERNEL=="capi[0-9]*",		NAME="capi/%n"
+
+# video devices
+KERNEL=="dvb*",			PROGRAM="/bin/sh -c 'K=%k; K=$${K#dvb}; printf dvb/adapter%%i/%%s $${K%%%%.*} $${K#*.}", ACTION=="add", \
+				NAME="%c"
+KERNEL=="card[0-9]*",		NAME="dri/%k"
+
+# misc devices
+KERNEL=="hw_random",		NAME="hwrng"
+KERNEL=="tun",			NAME="net/%k"
+KERNEL=="evtchn",		NAME="xen/%k"
+
+KERNEL=="cdemu[0-9]*",		NAME="cdemu/%n"
+KERNEL=="pktcdvd[0-9]*",	NAME="pktcdvd/%n"
+KERNEL=="pktcdvd",		NAME="pktcdvd/control"
+
+KERNEL=="cpu[0-9]*",		NAME="cpu/%n/cpuid"
+KERNEL=="msr[0-9]*",		NAME="cpu/%n/msr"
+KERNEL=="microcode",		NAME="cpu/microcode"
+
+KERNEL=="umad*",		NAME="infiniband/%k"
+KERNEL=="issm*",		NAME="infiniband/%k"
+KERNEL=="uverbs*",		NAME="infiniband/%k"
+KERNEL=="ucm*",			NAME="infiniband/%k"
+KERNEL=="rdma_ucm",		NAME="infiniband/%k"
+
+# ALSA devices
+KERNEL=="controlC[0-9]*",	NAME="snd/%k"
+KERNEL=="hwC[D0-9]*",		NAME="snd/%k"
+KERNEL=="pcmC[D0-9cp]*",	NAME="snd/%k"
+KERNEL=="midiC[D0-9]*",		NAME="snd/%k"
+KERNEL=="timer",		NAME="snd/%k"
+KERNEL=="seq",			NAME="snd/%k"
+
+# ieee1394 devices       
+KERNEL=="dv1394*",		NAME="dv1394/%n"
+KERNEL=="video1394*",		NAME="video1394/%n"
+
+# input devices
+KERNEL=="mice",			NAME="input/%k"
+KERNEL=="mouse[0-9]*",		NAME="input/%k"
+KERNEL=="event[0-9]*",		NAME="input/%k"
+KERNEL=="js[0-9]*",		NAME="input/%k"
+KERNEL=="ts[0-9]*",		NAME="input/%k"
+KERNEL=="uinput",		NAME="input/%k"
+
+# Zaptel
+KERNEL=="zapctl",		NAME="zap/ctl"
+KERNEL=="zaptimer",		NAME="zap/timer"
+KERNEL=="zapchannel",		NAME="zap/channel"
+KERNEL=="zappseudo",		NAME="zap/pseudo"
+KERNEL=="zap[0-9]*",		NAME="zap/%n"
+
+# AOE character devices
+SUBSYSTEM=="aoe", KERNEL=="discover",	NAME="etherd/%k"
+SUBSYSTEM=="aoe", KERNEL=="err",	NAME="etherd/%k"
+SUBSYSTEM=="aoe", KERNEL=="interfaces",	NAME="etherd/%k"
+SUBSYSTEM=="aoe", KERNEL=="revalidate",	NAME="etherd/%k"
+
+# device mapper creates its own device nodes, so ignore these
+KERNEL=="dm-[0-9]*",		OPTIONS+="ignore_device"
+KERNEL=="device-mapper",	NAME="mapper/control"
+
+KERNEL=="rfcomm[0-9]*", GROUP="users", MODE="0660"
+
+# Samsung UARTS
+KERNEL=="s3c2410_serial[0-9]",   NAME="ttySAC%n"
+
+# MXC UARTs
+KERNEL=="ttymxc[0-4]",   NAME="ttymxc%n"
+
diff --git a/meta-oe/recipes-core/udev/udev.inc b/meta-oe/recipes-core/udev/udev.inc
new file mode 100644
index 0000000000..0c8a662294
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev.inc
@@ -0,0 +1,101 @@
+DESCRIPTION ?= "udev is a program which dynamically creates and removes device nodes from \
+/dev/. It responds to /sbin/hotplug device events and requires a 2.6 kernel."
+
+LICENSE = "GPLv2+"
+
+SRC_URI = "http://kernel.org/pub/linux/utils/kernel/hotplug/udev-${PV}.tar.gz \
+	   file://udev.rules \
+	   file://devfs-udev.rules \
+	   file://links.conf \
+           file://permissions.rules \
+	   file://mount.sh \
+	   file://network.sh \
+	   file://local.rules \
+           file://init \
+	   file://udev-compat-wrapper-patch"
+
+INC_PR = "r30"
+
+inherit update-rc.d autotools pkgconfig
+
+PARALLEL_MAKE = ""
+UDEV_DEVFS_RULES ?= "0"
+PKG_libvolume-id-dev = "libvolume-id-dev"
+
+RDEPENDS_${PN} += "module-init-tools-depmod udev-utils"
+
+INITSCRIPT_NAME = "udev"
+INITSCRIPT_PARAMS = "start 03 S ."
+
+export CROSS = "${TARGET_PREFIX}"
+export HOSTCC = "${BUILD_CC}"
+export udevdir ?= "/dev"
+# Put stuff in /lib and /sbin
+export bindir := "${base_bindir}"
+export sbindir := "${base_sbindir}"
+export usrbindir := "${bindir}"
+export usrsbindir := "${sbindir}"
+export etcdir := "${sysconfdir}"
+
+TARGET_CC_ARCH += "${LDFLAGS}"
+UDEV_EXTRAS = "<override me>"
+EXTRA_OEMAKE = "-e \
+		'EXTRAS=${UDEV_EXTRAS}' \
+		'STRIP=echo'"
+
+RPROVIDES_udev_append = " udev-compat-wrapper"
+RDEPENDS_udev_spitz += "udev-compat"
+do_unpack_append_spitz() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_akita += "udev-compat"
+do_unpack_append_akita() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_c7x0 += "udev-compat"
+do_unpack_append_c7x0() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_poodle += "udev-compat"
+do_unpack_append_poodle() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+
+# Modify init script on platforms that need to boot old kernels:
+do_apply_compat_wrapper() {
+	cd ${WORKDIR}
+	sed -i "s:/sbin/udevd:\$UDEVD:g;s:/sbin/udevadm:\$UDEVADM:g" init
+	patch <udev-compat-wrapper-patch
+	cd -
+}
+
+do_install () {
+	install -d ${D}${usrsbindir} \
+		   ${D}${sbindir}
+	oe_runmake 'DESTDIR=${D}' INSTALL=install install
+	install -d ${D}${sysconfdir}/init.d
+	install -m 0755 ${WORKDIR}/init ${D}${sysconfdir}/init.d/udev
+
+	install -d ${D}${sysconfdir}/udev/rules.d/
+
+	install -m 0644 ${WORKDIR}/local.rules         ${D}${sysconfdir}/udev/rules.d/local.rules
+	install -m 0644 ${WORKDIR}/permissions.rules   ${D}${sysconfdir}/udev/rules.d/permissions.rules
+	install -m 0644 ${WORKDIR}/udev.rules          ${D}${sysconfdir}/udev/rules.d/udev.rules
+	if [ "${UDEV_DEVFS_RULES}" = "1" ]; then
+		install -m 0644 ${WORKDIR}/devfs-udev.rules ${D}${sysconfdir}/udev/rules.d/devfs-udev.rules
+	fi
+
+	install -d ${D}${sysconfdir}/udev/scripts/
+
+	install -m 0755 ${WORKDIR}/mount.sh ${D}${sysconfdir}/udev/scripts/mount.sh
+	install -m 0755 ${WORKDIR}/network.sh ${D}${sysconfdir}/udev/scripts
+        install -m 0644 ${S}/extras/volume_id/lib/libvolume_id.h ${D}${includedir}
+        oe_libinstall -C extras/volume_id/lib libvolume_id ${D}${libdir}
+}
+
+PACKAGES =+ "udev-utils libvolume-id libvolume-id-dev"
+FILES_libvolume-id-dev = "${includedir}/libvolume_id.h ${libdir}/libvolume_id.a ${libdir}/libvolume_id.so ${libdir}/pkgconfig/libvolume_id.pc"
+FILES_udev-utils = "${usrbindir}/udevinfo ${usrbindir}/udevtest ${sbindir}/udevadm"
+FILES_libvolume-id = "${base_libdir}/libvolume_id.so.*"
+FILES_${PN} += "${usrbindir}/* ${usrsbindir}/udevd"
+FILES_${PN}-dbg += "${usrbindir}/.debug ${usrsbindir}/.debug"
diff --git a/meta-oe/recipes-core/udev/udev/50-hostap_cs.rules b/meta-oe/recipes-core/udev/udev/50-hostap_cs.rules
new file mode 100644
index 0000000000..efefdc58fc
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/50-hostap_cs.rules
@@ -0,0 +1,4 @@
+# hostap_cs needs ignore_cis_vcc=1 set - this should handle all cards
+#
+ACTION=="add", DEVICE=="hostap_cs", \
+ SYSFS{func_id}=="0x06", RUN+="/sbin/modprobe hostap_cs ignore_cis_vcc=1"
diff --git a/meta-oe/recipes-core/udev/udev/akita/mount.blacklist b/meta-oe/recipes-core/udev/udev/akita/mount.blacklist
new file mode 100644
index 0000000000..7e351bc988
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/akita/mount.blacklist
@@ -0,0 +1,6 @@
+# This is a grep pattern matched against the device name
+# Any matched pattern will _not_ be mounted / removed by udevd
+
+/dev/mtdblock
+/dev/loop
+/dev/ram
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev/angstrom/mount.sh b/meta-oe/recipes-core/udev/udev/angstrom/mount.sh
new file mode 100644
index 0000000000..81bcfba5e3
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/angstrom/mount.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+#
+# Called from udev
+# Attemp to mount any added block devices 
+# and remove any removed devices
+#
+
+MOUNT="/bin/mount"
+PMOUNT="/usr/bin/pmount"
+UMOUNT="/bin/umount"
+name="`basename "$DEVNAME"`"
+
+for line in `cat /etc/udev/mount.blacklist | grep -v ^#`
+do
+	if ( echo "$DEVNAME" | grep -q "$line" )
+	then
+		logger "udev/mount.sh" "[$DEVNAME] is blacklisted, ignoring"
+		exit 0
+	fi
+done
+
+automount() {	
+	! test -d "/media/$name" && mkdir -p "/media/$name"
+	
+	if ! $MOUNT -t auto -o async,relatime $DEVNAME "/media/$name"
+	then
+		#logger "mount.sh/automount" "$MOUNT -t auto $DEVNAME \"/media/$name\" failed!"
+		rm_dir "/media/$name"
+	else
+		logger "mount.sh/automount" "Auto-mount of [/media/$name] successful"
+		touch "/tmp/.automount-$name"
+	fi
+}
+	
+rm_dir() {
+	# We do not want to rm -r populated directories
+	if test "`find "$1" | wc -l | tr -d " "`" -lt 2 -a -d "$1"
+	then
+		! test -z "$1" && rm -r "$1"
+	else
+		logger "mount.sh/automount" "Not removing non-empty directory [$1]"
+	fi
+}
+
+if [ "$ACTION" = "add" ] && [ -n "$DEVNAME" ]; then
+	if [ -x "$PMOUNT" ]; then
+		$PMOUNT $DEVNAME 2> /dev/null
+	elif [ -x $MOUNT ]; then
+    		$MOUNT $DEVNAME 2> /dev/null
+	fi
+	
+	# If the device isn't mounted at this point, it isn't configured in fstab
+	# 20061107: Small correction: The rootfs partition may be called just "rootfs" and not by
+	# 	    its true device name so this would break. If the rootfs is mounted on two places
+	#	    during boot, it confuses the heck out of fsck. So Im auto-adding the root-partition
+	#	    to /etc/udev/mount.blacklist via postinst 
+
+	cat /proc/mounts | awk '{print $1}' | grep -q "^$DEVNAME$" || automount 
+	
+fi
+
+
+
+if [ "$ACTION" = "remove" ] && [ -x "$UMOUNT" ] && [ -n "$DEVNAME" ]; then
+	for mnt in `cat /proc/mounts | grep "$DEVNAME" | cut -f 2 -d " " `
+	do
+		$UMOUNT -l $mnt
+	done
+	
+	# Remove empty directories from auto-mounter
+	test -e "/tmp/.automount-$name" && rm_dir "/media/$name"
+fi
diff --git a/meta-oe/recipes-core/udev/udev/c7x0/mount.blacklist b/meta-oe/recipes-core/udev/udev/c7x0/mount.blacklist
new file mode 100644
index 0000000000..7e351bc988
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/c7x0/mount.blacklist
@@ -0,0 +1,6 @@
+# This is a grep pattern matched against the device name
+# Any matched pattern will _not_ be mounted / removed by udevd
+
+/dev/mtdblock
+/dev/loop
+/dev/ram
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev/devfs-udev.rules b/meta-oe/recipes-core/udev/udev/devfs-udev.rules
new file mode 100644
index 0000000000..0ba1ad4e7f
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/devfs-udev.rules
@@ -0,0 +1,108 @@
+# The use of these rules is not recommended or supported.
+# In a world where devices can come and go at any time, the devfs scheme
+# of simple device enumeration does not help _anything_. Just forget about
+# it. Use custom rules to name your device or look at the persistent device
+# naming scheme, which is implemented for disks and add your subsystem.
+
+# ide block devices
+BUS="ide", KERNEL="hd*", PROGRAM="/etc/udev/ide-devfs.sh %k %b %n", NAME="%k", SYMLINK="%c{1} %c{2}"
+
+# md block devices
+KERNEL="md[0-9]*", NAME="md/%n"
+
+# floppy devices
+KERNEL="fd[0-9]*", NAME="floppy/%n"
+
+# tty devices
+KERNEL="tty[0-9]*",    NAME="vc/%n", SYMLINK="%k"
+KERNEL="ttyS[0-9]*",   NAME="tts/%n", SYMLINK="%k"
+KERNEL="ttyUSB[0-9]*", NAME="tts/USB%n"
+
+# vc devices
+KERNEL="vcs",        NAME="vcc/0"
+KERNEL="vcs[0-9]*",  NAME="vcc/%n"
+KERNEL="vcsa",       NAME="vcc/a0"
+KERNEL="vcsa[0-9]*", NAME="vcc/a%n"
+
+# v4l devices
+KERNEL="video[0-9]*", NAME="v4l/video%n"
+KERNEL="radio[0-9]*", NAME="v4l/radio%n"
+KERNEL="vbi[0-9]*",   NAME="v4l/vbi%n"
+KERNEL="vtx[0-9]*",   NAME="v4l/vtx%n"
+
+# dm devices (ignore them)
+KERNEL="dm-[0-9]*", NAME=""
+
+# i2c devices
+KERNEL="i2c-[0-9]*", NAME="i2c/%n", SYMLINK="%k"
+
+# loop devices
+KERNEL="loop[0-9]*", NAME="loop/%n", SYMLINK="%k"
+
+# ramdisks
+KERNEL="ram[0-9]*", NAME="rd/%n", SYMLINK="%k"
+
+# framebuffer devices
+KERNEL="fb[0-9]*", NAME="fb/%n", SYMLINK="%k"
+
+# misc
+KERNEL="rtc",     NAME="misc/%k", SYMLINK="%k"
+KERNEL="psaux",   NAME="misc/%k", SYMLINK="%k"
+KERNEL="agpgart", NAME="misc/%k", SYMLINK="%k"
+KERNEL="rtc",     NAME="misc/%k", SYMLINK="%k"
+KERNEL="psaux",   NAME="misc/%k", SYMLINK="%k"
+KERNEL="uinput",  NAME="misc/%k", SYMLINK="%k"
+
+# alsa devices
+KERNEL="controlC[0-9]*", NAME="snd/%k"
+KERNEL="hw[CD0-9]*",     NAME="snd/%k"
+KERNEL="pcm[CD0-9cp]*",  NAME="snd/%k"
+KERNEL="midi[CD0-9]*",   NAME="snd/%k"
+KERNEL="timer",          NAME="snd/%k"
+KERNEL="seq",            NAME="snd/%k"
+
+# oss devices
+KERNEL="audio*",     NAME="sound/%k", SYMLINK="%k"
+KERNEL="dmmidi",     NAME="sound/%k", SYMLINK="%k"
+KERNEL="dsp*",       NAME="sound/%k", SYMLINK="%k"
+KERNEL="midi*",      NAME="sound/%k", SYMLINK="%k"
+KERNEL="mixer*",     NAME="sound/%k", SYMLINK="%k"
+KERNEL="sequencer*", NAME="sound/%k", SYMLINK="%k"
+
+# input devices
+KERNEL="mice",   NAME="input/%k"
+KERNEL="mouse*", NAME="input/%k"
+KERNEL="event*", NAME="input/%k"
+KERNEL="js*",    NAME="input/%k"
+KERNEL="ts*",	 NAME="input/%k"
+
+# USB devices
+KERNEL="hiddev*",	NAME="usb/%k"
+KERNEL="auer*",		NAME="usb/%k"
+KERNEL="legousbtower*",	NAME="usb/%k"
+KERNEL="dabusb*",	NAME="usb/%k"
+BUS="usb", KERNEL="lp[0-9]*",	NAME="usb/%k"
+
+# netlink devices
+KERNEL="route",		NAME="netlink/%k"
+KERNEL="skip",		NAME="netlink/%k"
+KERNEL="usersock",	NAME="netlink/%k"
+KERNEL="fwmonitor",	NAME="netlink/%k"
+KERNEL="tcpdiag",	NAME="netlink/%k"
+KERNEL="nflog",		NAME="netlink/%k"
+KERNEL="xfrm",		NAME="netlink/%k"
+KERNEL="arpd",		NAME="netlink/%k"
+KERNEL="route6",	NAME="netlink/%k"
+KERNEL="ip6_fw",	NAME="netlink/%k"
+KERNEL="dnrtmsg",	NAME="netlink/%k"
+KERNEL="tap*",		NAME="netlink/%k"
+
+# CAPI devices
+KERNEL="capi",		NAME="capi20", SYMLINK="isdn/capi20"
+KERNEL="capi*",		NAME="capi/%n"
+
+# Network devices
+KERNEL="tun",		NAME="net/%k"
+
+# raw devices
+KERNEL="raw[0-9]*",     NAME="raw/%k" 
diff --git a/meta-oe/recipes-core/udev/udev/init b/meta-oe/recipes-core/udev/udev/init
new file mode 100755
index 0000000000..a13b9afcd5
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/init
@@ -0,0 +1,212 @@
+#!/bin/sh
+
+UDEVSTART=/sbin/udevstart
+
+# defaults
+tmpfs_size="2M"
+udev_root="/dev"
+
+[ -x $UDEVSTART ] || exit 0
+
+. /etc/udev/udev.conf
+
+##############################################################################
+
+# we need to unmount /dev/pts/ and remount it later over the tmpfs
+unmount_devpts() {
+  if mountpoint -q /dev/pts/; then
+    umount -l /dev/pts/
+  fi
+
+  if mountpoint -q /dev/shm/; then
+    umount -l /dev/shm/
+  fi
+}
+
+# mount a tmpfs over /dev, if somebody did not already do it
+mount_tmpfs() {
+  if grep -E -q "^[^[:space:]]+ /dev tmpfs" /proc/mounts; then
+    return 0
+  fi
+
+  # /dev/.static/dev/ is used by MAKEDEV to access the real /dev/ directory.
+  # /etc/udev/ is recycled as a temporary mount point because it's the only
+  # directory which is guaranteed to be available.
+  mount -n -o bind /dev /etc/udev
+
+  if ! mount -n -o size=$tmpfs_size,mode=0755 -t tmpfs tmpfs /dev; then
+    umount /etc/udev
+    echo "udev requires tmpfs support, not started."
+    exit 1
+  fi
+
+  # using ln to test if /dev works, because touch is in /usr/bin/
+  if ln -s test /dev/test-file; then
+    rm /dev/test-file
+  else
+    echo "udev requires tmpfs support, not started."
+    umount /etc/udev
+    umount /dev
+    exit 1
+  fi
+
+  mkdir -p /dev/.static/dev
+  chmod 700 /dev/.static/
+  # The mount options in busybox are non-standard...
+  if test -x /bin/mount.util-linux
+  then
+    /bin/mount.util-linux --move /etc/udev /dev/.static/dev
+  elif test -x /bin/busybox
+  then
+    busybox mount -n -o move /etc/udev /dev/.static/dev
+  else
+    echo "udev requires an identifiable mount command, not started."
+    umount /etc/udev
+    umount /dev
+    exit 1
+  fi
+}
+
+# I hate this hack.  -- Md
+make_extra_nodes() {
+  [ -e /etc/udev/links.conf ] || return 0
+  grep '^[^#]' /etc/udev/links.conf | \
+  while read type name arg1; do
+    [ "$type" -a "$name" -a ! -e "/dev/$name" -a ! -L "/dev/$name" ] ||continue
+    case "$type" in
+      L) ln -s $arg1 /dev/$name ;;
+      D) mkdir -p /dev/$name ;;
+      M) mknod -m 600 /dev/$name $arg1 ;;
+      *) echo "links.conf: unparseable line ($type $name $arg1)" ;;
+    esac
+  done
+}
+
+# this function is duplicated in preinst, postinst and d-i
+supported_kernel() {
+  case "$(uname -r)" in
+    2.[012345].*|2.6.[0-9]|2.6.[0-9][!0-9]*) return 1 ;;
+    2.6.1[01]|2.6.1[01][!0-9]*) return 1 ;;
+  esac
+  return 0
+}
+
+# shell version of /usr/bin/tty
+my_tty() {
+  [ -x /bin/readlink ] || return 0
+  [ -e /proc/self/fd/0 ] || return 0
+  readlink --silent /proc/self/fd/0 || true
+}
+
+warn_if_interactive() {
+  if [ "$RUNLEVEL" = "S" -a "$PREVLEVEL" = "N" ]; then
+    return 0
+  fi
+
+  TTY=$(my_tty)
+  if [ -z "$TTY" -o "$TTY" = "/dev/console" ]; then
+    return 0
+  fi
+
+  printf "\n\n\nIt has been detected that the command\n\n\t$0 $*\n\n"
+  printf "has been run from an interactive shell.\n"
+  printf "It will probably not do what you expect, so this script will wait\n"
+  printf "60 seconds before continuing. Press ^C to stop it.\n"
+  printf "RUNNING THIS COMMAND IS HIGHLY DISCOURAGED!\n\n\n\n"
+  sleep 60
+}
+
+##############################################################################
+
+if ! supported_kernel; then
+  echo "udev requires a kernel >= 2.6.12, not started."
+  exit 1
+fi
+
+if [ ! -e /proc/filesystems ]; then
+  echo "udev requires a mounted procfs, not started."
+  exit 1
+fi
+
+if ! grep -q '[[:space:]]tmpfs$' /proc/filesystems; then
+  echo "udev requires tmpfs support, not started."
+  exit 1
+fi
+
+if [ ! -d /sys/class/ ]; then
+  echo "udev requires a mounted sysfs, not started."
+  exit 1
+fi
+
+if [ ! -e /proc/sys/kernel/hotplug ] && [ ! -e /sys/kernel/uevent_helper ]; then
+  echo "udev requires hotplug support, not started."
+  exit 1
+fi
+
+##############################################################################
+
+# When modifying this script, do not forget that between the time that
+# the new /dev has been mounted and udevstart has been run there will be
+# no /dev/null. This also means that you cannot use the "&" shell command.
+
+case "$1" in
+  start)
+    if [ -e "$udev_root/.udevdb" ]; then
+      if mountpoint -q /dev/; then
+        TMPFS_MOUNTED=1
+      else
+        echo ".udevdb already exists on the old $udev_root!"
+      fi
+    fi
+    warn_if_interactive
+
+    #echo /sbin/udevsend > /proc/sys/kernel/hotplug
+    if [ -e /sys/kernel/uevent_helper ] ; then
+      echo "" > /sys/kernel/uevent_helper
+    else
+      echo "" > /proc/sys/kernel/hotplug
+    fi
+    udevsend
+    if [ "$UDEV_DISABLED" = "yes" ]; then
+      echo "udev disabled on the kernel command line, not started."
+      exit 0
+    fi
+
+    if [ ! "$TMPFS_MOUNTED" ]; then
+      unmount_devpts
+      mount_tmpfs
+      [ -d /proc/1 ] || mount -n /proc
+      # if this directory is not present /dev will not be updated by udev
+      mkdir /dev/.udevdb/
+      echo "Creating initial device nodes..."
+      udevstart
+    fi
+    make_extra_nodes
+    ;;
+  stop)
+    warn_if_interactive
+    start-stop-daemon --stop --exec /sbin/udevd --quiet
+    unmount_devpts
+    if [ -d /dev/.static/dev/ ]; then
+      umount -l /dev/.static/dev/ || true
+    fi
+    echo "Unmounting /dev..."
+    # unmounting with -l should never fail
+    if ! umount -l /dev; then
+      exit 1
+    fi
+    ;;
+  restart|force-reload)
+    start-stop-daemon --stop --exec /sbin/udevd --quiet
+    log_begin_msg "Recreating device nodes..."
+    udevstart
+    make_extra_nodes
+    log_end_msg 0
+    ;;
+  *)
+    echo "Usage: /etc/init.d/udev {start|stop|restart|force-reload}"
+    exit 1
+    ;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-core/udev/udev/links.conf b/meta-oe/recipes-core/udev/udev/links.conf
new file mode 100644
index 0000000000..a9f8b58b27
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/links.conf
@@ -0,0 +1,24 @@
+# This file does not exist. Please do not ask the debian maintainer about it.
+# You may use it to do strange and wonderful things, at your risk.
+
+L fd		/proc/self/fd
+L stdin		/proc/self/fd/0
+L stdout	/proc/self/fd/1
+L stderr	/proc/self/fd/2
+L core		/proc/kcore
+L sndstat	/proc/asound/oss/sndstat
+L MAKEDEV	/sbin/MAKEDEV
+
+D pts
+D shm
+
+M null         c   1 3
+M console      c   5 1
+
+# Hic sunt leones.
+M ppp		c 108 0
+D loop
+M loop/0	b 7 0
+D net
+M net/tun	c 10 200
+
diff --git a/meta-oe/recipes-core/udev/udev/local.rules b/meta-oe/recipes-core/udev/udev/local.rules
new file mode 100644
index 0000000000..5f2efbeb0c
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/local.rules
@@ -0,0 +1,22 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# Media automounting
+SUBSYSTEM=="block", ACTION=="add"    RUN+="/etc/udev/scripts/mount.sh"
+SUBSYSTEM=="block", ACTION=="remove" RUN+="/etc/udev/scripts/mount.sh"
+
+# Handle network interface setup
+SUBSYSTEM=="net", ACTION=="add" RUN+="/etc/udev/scripts/network.sh"
+SUBSYSTEM=="net", ACTION=="remove" RUN+="/etc/udev/scripts/network.sh"
diff --git a/meta-oe/recipes-core/udev/udev/mount.blacklist b/meta-oe/recipes-core/udev/udev/mount.blacklist
new file mode 100644
index 0000000000..d3ebb17176
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/mount.blacklist
@@ -0,0 +1,3 @@
+/dev/loop
+/dev/ram
+/dev/mtdblock
diff --git a/meta-oe/recipes-core/udev/udev/mount.sh b/meta-oe/recipes-core/udev/udev/mount.sh
new file mode 100644
index 0000000000..440dcee57b
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/mount.sh
@@ -0,0 +1,72 @@
+#!/bin/sh
+#
+# Called from udev
+# Attemp to mount any added block devices 
+# and remove any removed devices
+#
+
+MOUNT="/bin/mount"
+PMOUNT="/usr/bin/pmount"
+UMOUNT="/bin/umount"
+name="`basename "$DEVNAME"`"
+
+for line in `cat /etc/udev/mount.blacklist | grep -v ^#`
+do
+	if ( echo "$DEVNAME" | grep -q "$line" )
+	then
+		logger "udev/mount.sh" "[$DEVNAME] is blacklisted, ignoring"
+		exit 0
+	fi
+done
+
+automount() {	
+	! test -d "/media/$name" && mkdir -p "/media/$name"
+	
+	if ! $MOUNT -t auto -o sync $DEVNAME "/media/$name"
+	then
+		#logger "mount.sh/automount" "$MOUNT -t auto $DEVNAME \"/media/$name\" failed!"
+		rm_dir "/media/$name"
+	else
+		logger "mount.sh/automount" "Auto-mount of [/media/$name] successful"
+		touch "/tmp/.automount-$name"
+	fi
+}
+	
+rm_dir() {
+	# We do not want to rm -r populated directories
+	if test "`find "$1" | wc -l | tr -d " "`" -lt 2 -a -d "$1"
+	then
+		! test -z "$1" && rm -r "$1"
+	else
+		logger "mount.sh/automount" "Not removing non-empty directory [$1]"
+	fi
+}
+
+if [ "$ACTION" = "add" ] && [ -n "$DEVNAME" ]; then
+	if [ -x "$PMOUNT" ]; then
+		$PMOUNT $DEVNAME 2> /dev/null
+	elif [ -x $MOUNT ]; then
+    		$MOUNT $DEVNAME 2> /dev/null
+	fi
+	
+	# If the device isn't mounted at this point, it isn't configured in fstab
+	# 20061107: Small correction: The rootfs partition may be called just "rootfs" and not by
+	# 	    its true device name so this would break. If the rootfs is mounted on two places
+	#	    during boot, it confuses the heck out of fsck. So Im auto-adding the root-partition
+	#	    to /etc/udev/mount.blacklist via postinst 
+
+	cat /proc/mounts | awk '{print $1}' | grep -q "^$DEVNAME$" || automount 
+	
+fi
+
+
+
+if [ "$ACTION" = "remove" ] && [ -x "$UMOUNT" ] && [ -n "$DEVNAME" ]; then
+	for mnt in `cat /proc/mounts | grep "$DEVNAME" | cut -f 2 -d " " `
+	do
+		$UMOUNT -l $mnt
+	done
+	
+	# Remove empty directories from auto-mounter
+	test -e "/tmp/.automount-$name" && rm_dir "/media/$name"
+fi
diff --git a/meta-oe/recipes-core/udev/udev/network.sh b/meta-oe/recipes-core/udev/udev/network.sh
new file mode 100644
index 0000000000..182c26d86a
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/network.sh
@@ -0,0 +1,58 @@
+#!/bin/sh
+
+# udevd does clearenv(). Export shell PATH to children.
+export PATH
+
+# Do not run when pcmcia-cs is installed
+test -x /sbin/cardctl && exit 0
+
+# We get two "add" events for hostap cards due to wifi0
+echo "$INTERFACE" | grep -q wifi && exit 0
+
+
+# Check if /etc/init.d/network has been run yet to see if we are 
+# called by starting /etc/rcS.d/S03udev and not by hotplugging a device
+#
+# At this stage, network interfaces should not be brought up
+# automatically because:
+# a)	/etc/init.d/network has not been run yet (security issue)
+# b) 	/var has not been populated yet so /etc/resolv,conf points to 
+#	oblivion, making the network unusable
+#
+
+spoofp="`grep ^spoofprotect /etc/network/options`"
+if test -z "$spoofp"
+then
+	# This is the default from /etc/init.d/network
+	spoofp_val=yes
+else
+	spoofp_val=${spoofp#spoofprotect=}
+fi
+
+test "$spoofp_val" = yes && spoofp_val=1 || spoofp_val=0
+
+# I think it is safe to assume that "lo" will always be there ;)
+if test "`cat /proc/sys/net/ipv4/conf/lo/rp_filter`" != "$spoofp_val" -a -n "$spoofp_val"
+then
+	echo "$INTERFACE" >> /dev/udev_network_queue	
+	exit 0
+fi
+
+#
+# Code taken from pcmcia-cs:/etc/pcmcia/network
+#
+
+# if this interface has an entry in /etc/network/interfaces, let ifupdown
+# handle it
+if grep -q "iface \+$INTERFACE" /etc/network/interfaces; then
+  case $ACTION in
+    add)
+    	ifconfig | grep -q "^$INTERFACE" || ifup $INTERFACE
+    	;;
+    remove)
+    	ifdown $INTERFACE
+    	;;
+  esac
+  
+  exit 0
+fi
diff --git a/meta-oe/recipes-core/udev/udev/noasmlinkage.patch b/meta-oe/recipes-core/udev/udev/noasmlinkage.patch
new file mode 100644
index 0000000000..0d8e854c0e
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/noasmlinkage.patch
@@ -0,0 +1,38 @@
+
+#
+# Patch managed by http://www.holgerschurig.de/patcher.html
+#
+
+--- udev-062/udev.c~noasmlinkage.patch
++++ udev-062/udev.c
+@@ -54,7 +54,7 @@
+ }
+ #endif
+ 
+-static void asmlinkage sig_handler(int signum)
++static void sig_handler(int signum)
+ {
+ 	switch (signum) {
+ 		case SIGALRM:
+--- udev-062/udevd.c~noasmlinkage.patch
++++ udev-062/udevd.c
+@@ -639,7 +639,7 @@
+ 	return msg;
+ }
+ 
+-static void asmlinkage sig_handler(int signum)
++static void sig_handler(int signum)
+ {
+ 	int rc;
+ 
+--- udev-062/udevstart.c~noasmlinkage.patch
++++ udev-062/udevstart.c
+@@ -323,7 +323,7 @@
+ 	exec_list(&device_list);
+ }
+ 
+-static void asmlinkage sig_handler(int signum)
++static void sig_handler(int signum)
+ {
+ 	switch (signum) {
+ 		case SIGALRM:
diff --git a/meta-oe/recipes-core/udev/udev/nokia900/10-cmt_speech.rules b/meta-oe/recipes-core/udev/udev/nokia900/10-cmt_speech.rules
new file mode 100644
index 0000000000..25f46efeaa
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/nokia900/10-cmt_speech.rules
@@ -0,0 +1 @@
+KERNEL=="cmt_speech", MODE="0777"
diff --git a/meta-oe/recipes-core/udev/udev/nokia900/70-persistent-net.rules b/meta-oe/recipes-core/udev/udev/nokia900/70-persistent-net.rules
new file mode 100644
index 0000000000..b68f47c5f1
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/nokia900/70-persistent-net.rules
@@ -0,0 +1,9 @@
+# This file was automatically generated by the /lib/udev/write_net_rules
+# # program, run by the persistent-net-generator.rules rules file.
+# #
+# # You can modify it, as long as you keep each rule on a single
+# # line, and change only the value of the NAME= key.
+#
+# # net device ()
+SUBSYSTEM=="net", ACTION=="add", DRIVERS=="?*", ATTR{address}=="00:1f:df:*", ATTR{dev_id}=="0x0", ATTR{type}=="1", KERNEL=="wlan*", NAME="wlan0"
+
diff --git a/meta-oe/recipes-core/udev/udev/nokia900/nokia-n900-mac-hack.sh b/meta-oe/recipes-core/udev/udev/nokia900/nokia-n900-mac-hack.sh
new file mode 100644
index 0000000000..c0b8251ae9
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/nokia900/nokia-n900-mac-hack.sh
@@ -0,0 +1,23 @@
+#!/bin/sh
+
+if [ $# -ne 2 ]; then
+	echo "Usage: $0 iface newmac"
+	echo "       newmac is only saved if /etc/<iface>MAC is not found"
+	exit 1
+fi
+
+iface="$1"
+newmac="$2"
+macfile=/etc/"$iface"mac
+
+# If no MAC is found, save the one given as argument
+if [ ! -e $macfile ]; then
+   /bin/echo "$newmac" > $macfile
+# Otherwise load MAC from file
+else
+   newmac=`/bin/cat $macfile`
+fi
+
+# Configure interface
+/sbin/ifconfig "$iface" down
+/sbin/ifconfig "$iface" hw ether $newmac
diff --git a/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-hacks.rules b/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-hacks.rules
new file mode 100644
index 0000000000..fa2ddb8098
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-hacks.rules
@@ -0,0 +1,8 @@
+# MAC address hack
+# forces n900 to always use the same MAC address that is generated in the first boot
+SUBSYSTEM=="net",KERNEL=="wlan0", RUN+="/etc/udev/scripts/nokia-n900-mac-hack.sh %k $attr{address}"
+
+# Create inputdev symlinks for kbslider contextkit plugin
+SUBSYSTEM=="input" ATTRS{name}=="TWL4030 Keypad" SYMLINK+="input/keypad"
+SUBSYSTEM=="input" ATTRS{name}=="gpio-keys" SYMLINK+="input/gpio-keys"
+
diff --git a/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-snd.rules b/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-snd.rules
new file mode 100644
index 0000000000..413c1656f0
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/nokia900/udev-rules-nokia-n900-snd.rules
@@ -0,0 +1,10 @@
+# ALSA devices
+KERNEL=="controlC[0-9]*",   NAME="snd/%k"
+KERNEL=="hwC[D0-9]*",       NAME="snd/%k"
+KERNEL=="pcmC[D0-9cp]*",    NAME="snd/%k"
+KERNEL=="midiC[D0-9]*",     NAME="snd/%k"
+KERNEL=="timer",        NAME="snd/%k"
+KERNEL=="seq",          NAME="snd/%k"
+
+KERNEL=="snd", SUBSYSTEM=="module", ACTION=="add", \
+    RUN+="/bin/ln -sf /proc/asound/oss/sndstat $root/sndstat"
diff --git a/meta-oe/recipes-core/udev/udev/omap3-pandora/local.rules b/meta-oe/recipes-core/udev/udev/omap3-pandora/local.rules
new file mode 100644
index 0000000000..266c3ff859
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/omap3-pandora/local.rules
@@ -0,0 +1,27 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# Media automounting
+SUBSYSTEM=="block", ACTION=="add"    RUN+="/etc/udev/scripts/mount.sh"
+SUBSYSTEM=="block", ACTION=="remove" RUN+="/etc/udev/scripts/mount.sh"
+
+# Handle network interface setup
+SUBSYSTEM=="net", ACTION=="add" RUN+="/etc/udev/scripts/network.sh"
+SUBSYSTEM=="net", ACTION=="remove" RUN+="/etc/udev/scripts/network.sh"
+
+# Local UDEV rule changes for the Pandora system.
+
+# Let all users access the event devices using EVDEV (the OpenPandora is not multiuser after all).
+KERNEL=="event[0-9]",MODE="0666"
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev/permissions.rules b/meta-oe/recipes-core/udev/udev/permissions.rules
new file mode 100644
index 0000000000..efbe568a2b
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/permissions.rules
@@ -0,0 +1,79 @@
+# default permissions for block devices
+SUBSYSTEM=="block",				GROUP="disk"
+SUBSYSTEM=="block", SYSFS{removable}=="1",	GROUP="floppy"
+
+# IDE devices
+BUS=="ide", KERNEL=="hd[a-z]", SYSFS{removable}="1", \
+  PROGRAM="/bin/cat /proc/ide/%k/media", RESULT=="cdrom*",	GROUP="cdrom"
+BUS=="ide", KERNEL=="ht[0-9]*",					GROUP="tape"
+BUS=="ide", KERNEL=="nht[0-9]*",				GROUP="tape"
+
+# SCSI devices
+BUS=="scsi", SYSFS{type}=="1",	GROUP="tape"
+BUS=="scsi", SYSFS{type}=="5",	GROUP="cdrom"
+
+# USB devices
+BUS=="usb", KERNEL=="legousbtower*", MODE="0666"
+BUS=="usb", KERNEL=="lp[0-9]*", GROUP="lp"
+
+# serial devices
+SUBSYSTEM=="tty",	GROUP="dialout"
+SUBSYSTEM=="capi",	GROUP="dialout"
+SUBSYSTEM=="slamr",	GROUP="dialout"
+
+# vc devices (all members of the tty subsystem)
+KERNEL=="ptmx",		MODE="0666", GROUP="root"
+KERNEL=="console",	MODE="0600", GROUP="root"
+KERNEL=="tty",		MODE="0666", GROUP="root"
+KERNEL=="tty[0-9]*",	GROUP="root"
+KERNEL=="pty*",		MODE="0666", GROUP="tty"
+
+# video devices
+SUBSYSTEM=="video4linux", GROUP="video"
+SUBSYSTEM=="drm",	GROUP="video"
+SUBSYSTEM=="dvb",	GROUP="video"
+SUBSYSTEM=="em8300",	GROUP="video"
+SUBSYSTEM=="graphics",	GROUP="video"
+SUBSYSTEM=="nvidia",	GROUP="video"
+
+# misc devices
+KERNEL=="random",	MODE="0666"
+KERNEL=="urandom",	MODE="0444"
+KERNEL=="mem",		MODE="0640", GROUP="kmem"
+KERNEL=="kmem",		MODE="0640", GROUP="kmem"
+KERNEL=="port",		MODE="0640", GROUP="kmem"
+KERNEL=="full",		MODE="0666"
+KERNEL=="null",		MODE="0666"
+KERNEL=="zero",		MODE="0666"
+KERNEL=="inotify",	MODE="0666"
+KERNEL=="sgi_fetchop",	MODE="0666"
+KERNEL=="sonypi",	MODE="0666"
+KERNEL=="agpgart",	GROUP="video"
+KERNEL=="rtc",		MODE="0660", GROUP="audio"
+
+KERNEL=="cdemu[0-9]*",	GROUP="cdrom"
+KERNEL=="pktcdvd[0-9]*", GROUP="cdrom"
+KERNEL=="pktcdvd",	MODE="0644"
+
+# printers and parallel devices
+SUBSYSTEM=="printer",	GROUP="lp"
+SUBSYSTEM=="ppdev",	GROUP="lp"
+KERNEL=="pt[0-9]*",	GROUP="tape"
+KERNEL=="pht[0-9]*",	GROUP="tape"
+
+# sound devices
+SUBSYSTEM=="sound",	GROUP="audio"
+
+# ieee1394 devices       
+KERNEL=="raw1394",	GROUP="disk"
+KERNEL=="dv1394*",	GROUP="video"
+KERNEL=="video1394*",	GROUP="video"
+
+# input devices
+KERNEL=="event[0-9]*",	MODE="0664"
+KERNEL=="js[0-9]*",	MODE="0664"
+
+# AOE character devices
+SUBSYSTEM=="aoe",			MODE="0220", GROUP="disk"
+SUBSYSTEM=="aoe", KERNEL=="err",	MODE="0440"
+
diff --git a/meta-oe/recipes-core/udev/udev/shr/mount.blacklist b/meta-oe/recipes-core/udev/udev/shr/mount.blacklist
new file mode 100644
index 0000000000..117ac9b861
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/shr/mount.blacklist
@@ -0,0 +1,4 @@
+/dev/loop
+/dev/ram
+/dev/mtdblock
+/dev/mmcblk
diff --git a/meta-oe/recipes-core/udev/udev/slugos/mount.blacklist b/meta-oe/recipes-core/udev/udev/slugos/mount.blacklist
new file mode 100644
index 0000000000..d9da5cfd71
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/slugos/mount.blacklist
@@ -0,0 +1,5 @@
+ram[0-9]$
+mtdblock[0-9]$
+hd[a-z]$
+sd[a-z]$
+loop[0-9]$
diff --git a/meta-oe/recipes-core/udev/udev/slugos/mount.sh b/meta-oe/recipes-core/udev/udev/slugos/mount.sh
new file mode 100644
index 0000000000..b5298e97a2
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/slugos/mount.sh
@@ -0,0 +1,83 @@
+#!/bin/sh
+#
+# Called from udev
+# Attemp to mount any added block devices 
+# and remove any removed devices
+#
+
+MOUNT="/bin/mount"
+PMOUNT="/usr/bin/pmount"
+UMOUNT="/bin/umount"
+name="`basename "$DEVNAME"`"
+
+if ( blkid "$DEVNAME" | grep -q 'TYPE="mdraid"' )
+then
+	logger "udev/mount.sh" "[$DEVNAME] is a member of an array, ignoring"
+	exit 0
+fi
+
+for line in `cat /etc/udev/mount.blacklist | grep -v ^#`
+do
+	if ( echo "$DEVNAME" | grep -q "$line" )
+	then
+		logger "udev/mount.sh" "[$DEVNAME] is blacklisted, ignoring"
+		exit 0
+	fi
+done
+
+automount() {	
+	! test -d "/media/$name" && mkdir -p "/media/$name"
+	
+	if ! $MOUNT -t auto -o sync $DEVNAME "/media/$name"
+	then
+		#logger "mount.sh/automount" "$MOUNT -t auto $DEVNAME \"/media/$name\" failed!"
+		rm_dir "/media/$name"
+	else
+		logger "mount.sh/automount" "Auto-mount of [/media/$name] successful"
+		touch "/tmp/.automount-$name"
+	fi
+}
+	
+rm_dir() {
+	# We do not want to rm -r populated directories
+	if test "`find "$1" | wc -l | tr -d " "`" -lt 2 -a -d "$1"
+	then
+		! test -z "$1" && rm -r "$1"
+	else
+		logger "mount.sh/automount" "Not removing non-empty directory [$1]"
+	fi
+}
+
+if [ "$ACTION" = "add" ] && [ -n "$DEVNAME" ]; then
+	# SlugOS: we pivot to the rootfs based on UUID, not on fstab -- so the fstab may not
+	# be correct at this point in the boot.  So we must not let udev mount devices based
+	# soley on the fstab, lest we mount overtop the real rootfs.  For now we just comment
+	# out the logic below and let the automount logic (far below) deal with all udev mount
+	# operations.
+	#if [ -x "$PMOUNT" ]; then
+	#	$PMOUNT $DEVNAME 2> /dev/null
+	#elif [ -x $MOUNT ]; then
+	#	$MOUNT $DEVNAME 2> /dev/null
+	#fi
+	
+	# If the device isn't mounted at this point, it isn't configured in fstab
+	# 20061107: Small correction: The rootfs partition may be called just "rootfs" and not by
+	# 	    its true device name so this would break. If the rootfs is mounted on two places
+	#	    during boot, it confuses the heck out of fsck. So Im auto-adding the root-partition
+	#	    to /etc/udev/mount.blacklist via postinst 
+
+	cat /proc/mounts | awk '{print $1}' | grep -q "^$DEVNAME$" || automount 
+	
+fi
+
+
+
+if [ "$ACTION" = "remove" ] && [ -x "$UMOUNT" ] && [ -n "$DEVNAME" ]; then
+	for mnt in `cat /proc/mounts | grep "$DEVNAME" | cut -f 2 -d " " `
+	do
+		$UMOUNT -l $mnt
+	done
+	
+	# Remove empty directories from auto-mounter
+	test -e "/tmp/.automount-$name" && rm_dir "/media/$name"
+fi
diff --git a/meta-oe/recipes-core/udev/udev/spitz/mount.blacklist b/meta-oe/recipes-core/udev/udev/spitz/mount.blacklist
new file mode 100644
index 0000000000..38c7aa4b32
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/spitz/mount.blacklist
@@ -0,0 +1,7 @@
+# This is a grep pattern matched against the device name
+# Any matched pattern will _not_ be mounted / removed by udevd
+
+/dev/mtdblock
+/dev/hda
+/dev/loop
+/dev/ram
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev/tosa/mount.blacklist b/meta-oe/recipes-core/udev/udev/tosa/mount.blacklist
new file mode 100644
index 0000000000..7e351bc988
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/tosa/mount.blacklist
@@ -0,0 +1,6 @@
+# This is a grep pattern matched against the device name
+# Any matched pattern will _not_ be mounted / removed by udevd
+
+/dev/mtdblock
+/dev/loop
+/dev/ram
\ No newline at end of file
diff --git a/meta-oe/recipes-core/udev/udev/udev-compat-wrapper-patch b/meta-oe/recipes-core/udev/udev/udev-compat-wrapper-patch
new file mode 100644
index 0000000000..c90d05aefa
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/udev-compat-wrapper-patch
@@ -0,0 +1,37 @@
+This patch should be applied on platforms which support kernels < 2.6.27 and need udev-compat package.
+
+It should be applied after:
+sed -i "s:/sbin/udevd:\$UDEVD:g;s:/sbin/udevadm:\$UDEVADM:g" init
+
+It has not .patch suffix, because such files would not be copied to
+WORKDIR and cannot be selectively applied on another source file.
+
+--- init
++++ init
+@@ -11,6 +11,17 @@
+ 
+ export TZ=/etc/localtime
+ 
++UDEVD="/sbin/udevd"
++UDEVADM="/sbin/udevadm"
++# If we are running an old kernel and have a static udev present use that instead
++if [ -e /sbin/udevd-compat ] ; then
++	KERNELMICROVER="$(uname -r | sed 's/^[0-9]*\.[0-9]*\.\([0-9]*\).*$/\1/')"
++	if [ $KERNELMICROVER -lt 27 ] ; then
++		UDEVD="/sbin/udevd-compat"
++		UDEVADM="/sbin/udevadm-compat"
++	fi
++fi
++
+ [ -d /sys/class ] || exit 1
+ [ -r /proc/mounts ] || exit 1
+ [ -x $UDEVD ] || exit 1
+@@ -21,6 +32,8 @@
+         if [ -x /sbin/pidof ]; then
+                 pid=`/sbin/pidof -x udevd`
+                 [ -n "$pid" ] && kill $pid
++                pid=`/sbin/pidof -x udevd-compat`
++                [ -n "$pid" ] && kill $pid
+         fi
+ }
+ 
diff --git a/meta-oe/recipes-core/udev/udev/udev.rules b/meta-oe/recipes-core/udev/udev/udev.rules
new file mode 100644
index 0000000000..5c566f6cef
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/udev.rules
@@ -0,0 +1,98 @@
+# There are a number of modifiers that are allowed to be used in some
+# of the different fields. They provide the following subsitutions:
+#
+# %n the "kernel number" of the device.
+#    For example, 'sda3' has a "kernel number" of '3'
+# %e the smallest number for that name which does not matches an existing node
+# %k the kernel name for the device
+# %M the kernel major number for the device
+# %m the kernel minor number for the device
+# %b the bus id for the device
+# %c the string returned by the PROGRAM
+# %s{filename} the content of a sysfs attribute
+# %% the '%' char itself
+#
+
+# SCSI devices
+BUS=="scsi", KERNEL=="sr[0-9]*",	NAME="scd%n", SYMLINK+="sr%n"
+
+# USB devices
+BUS=="usb", KERNEL=="auer[0-9]*",	NAME="usb/%k"
+BUS=="usb", KERNEL=="cpad[0-9]*",	NAME="usb/%k"
+BUS=="usb", KERNEL=="dabusb*",		NAME="usb/%k"
+BUS=="usb", KERNEL=="hiddev*",		NAME="usb/%k"
+BUS=="usb", KERNEL=="legousbtower*",	NAME="usb/%k"
+BUS=="usb", KERNEL=="lp[0-9]*",		NAME="usb/%k"
+BUS=="usb", KERNEL=="ttyUSB*", SYSFS{product}=="Palm Handheld*", \
+					SYMLINK+="pilot"
+
+# usbfs-like devices
+SUBSYSTEM=="usb_device", \
+	PROGRAM="/bin/sh -c 'export X=%k; export X=$${X#usbdev}; export B=$${X%%%%.*}; export D=$${X#*.}; echo bus/usb/$$B/$$D'", SYMLINK+="%c"
+
+# serial devices
+KERNEL=="capi",			NAME="capi20", SYMLINK+="isdn/capi20"
+KERNEL=="capi[0-9]*",		NAME="capi/%n"
+
+# video devices
+KERNEL=="card[0-9]*",		NAME="dri/%k"
+
+# misc devices
+KERNEL=="hw_random",		NAME="hwrng"
+KERNEL=="tun",			NAME="net/%k"
+
+KERNEL=="cdemu[0-9]*",		NAME="cdemu/%n"
+KERNEL=="pktcdvd[0-9]*",	NAME="pktcdvd/%n"
+KERNEL=="pktcdvd",		NAME="pktcdvd/control"
+
+KERNEL=="cpu[0-9]*",		NAME="cpu/%n/cpuid"
+KERNEL=="msr[0-9]*",		NAME="cpu/%n/msr"
+KERNEL=="microcode",		NAME="cpu/microcode"
+
+KERNEL=="umad*",		NAME="infiniband/%k"
+KERNEL=="issm*",		NAME="infiniband/%k"
+KERNEL=="uverbs*",		NAME="infiniband/%k"
+KERNEL=="ucm",			NAME="infiniband/%k"
+
+KERNEL=="buzzer",		NAME="misc/buzzer"
+
+# ALSA devices
+KERNEL=="controlC[0-9]*",	NAME="snd/%k"
+KERNEL=="hwC[D0-9]*",		NAME="snd/%k"
+KERNEL=="pcmC[D0-9cp]*",	NAME="snd/%k"
+KERNEL=="midiC[D0-9]*",		NAME="snd/%k"
+KERNEL=="timer",		NAME="snd/%k"
+KERNEL=="seq",			NAME="snd/%k"
+
+# ieee1394 devices       
+KERNEL=="dv1394*",		NAME="dv1394/%n"
+KERNEL=="video1394*",		NAME="video1394/%n"
+
+# input devices
+KERNEL=="mice",			NAME="input/%k"
+KERNEL=="mouse[0-9]*",		NAME="input/%k"
+KERNEL=="event[0-9]*",		NAME="input/%k"
+KERNEL=="js[0-9]*",		NAME="input/%k"
+KERNEL=="ts[0-9]*",		NAME="input/%k"
+KERNEL=="uinput",		NAME="input/%k"
+
+# Zaptel
+KERNEL=="zapctl",		NAME="zap/ctl"
+KERNEL=="zaptimer",		NAME="zap/timer"
+KERNEL=="zapchannel",		NAME="zap/channel"
+KERNEL=="zappseudo",		NAME="zap/pseudo"
+KERNEL=="zap[0-9]*",		NAME="zap/%n"
+
+# AOE character devices
+SUBSYSTEM=="aoe", KERNEL=="discover",	NAME="etherd/%k"
+SUBSYSTEM=="aoe", KERNEL=="err",	NAME="etherd/%k"
+SUBSYSTEM=="aoe", KERNEL=="interfaces",	NAME="etherd/%k"
+
+# device mapper creates its own device nodes, so ignore these
+KERNEL=="dm-[0-9]*",		OPTIONS+="ignore_device"
+KERNEL=="device-mapper",	NAME="mapper/control"
+
+KERNEL="rfcomm[0-9]*", NAME="%k", GROUP="users", MODE="0660"
+
+# Firmware Helper
+ACTION=="add", SUBSYSTEM=="firmware", RUN+="/sbin/firmware_helper"
diff --git a/meta-oe/recipes-core/udev/udev/udev_network_queue.sh b/meta-oe/recipes-core/udev/udev/udev_network_queue.sh
new file mode 100644
index 0000000000..05e08e9d1b
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/udev_network_queue.sh
@@ -0,0 +1,35 @@
+#! /bin/sh
+#
+# Copyright Matthias Hentges <devel@hentges.net> (c) 2006
+# License: GPL (see http://www.gnu.org/licenses/gpl.txt for a copy of the license)
+#
+# Filename: udev_network_queue.sh
+# Date: 03-May-06
+
+do_start() {
+	if test -e /dev/udev_network_queue
+	then
+		echo "Activating queued NICs..."
+		for NIC in `cat /dev/udev_network_queue`
+		do	
+			export INTERFACE="$NIC" ; export ACTION=add
+			/etc/udev/scripts/network.sh
+		done
+		echo ""
+	else
+		echo "No NICs queued"
+	fi
+}
+
+do_stop() {
+	/bin/true
+}
+
+case "$1" in
+start)		do_start;;
+stop)		do_stop;;
+restart)	do_stop
+		do_start;;
+*)	echo "Usage: `basename $0` [ start | stop | restart ]"
+	exit 0;;
+esac
diff --git a/meta-oe/recipes-core/udev/udev/udevsynthesize.patch b/meta-oe/recipes-core/udev/udev/udevsynthesize.patch
new file mode 100644
index 0000000000..7811188485
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/udevsynthesize.patch
@@ -0,0 +1,776 @@
+--- udev-081/udevsynthesize.c.orig	2006-01-29 12:22:45.000000000 +0100
++++ udev-081/udevsynthesize.c	2006-01-29 12:22:40.000000000 +0100
+@@ -0,0 +1,763 @@
++/*
++ * udevcoldplug.c
++ *
++ * Copyright (C) 2005 SUSE Linux Products GmbH
++ *
++ * Author:
++ *   Kay Sievers <kay.sievers@vrfy.org>
++ *
++ * Synthesize kernel events from sysfs information and pass them
++ * to the udevd daemon.
++ *
++ *	This program is free software; you can redistribute it and/or modify it
++ *	under the terms of the GNU General Public License as published by the
++ *	Free Software Foundation version 2 of the License.
++ * 
++ *	This program is distributed in the hope that it will be useful, but
++ *	WITHOUT ANY WARRANTY; without even the implied warranty of
++ *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++ *	General Public License for more details.
++ * 
++ *	You should have received a copy of the GNU General Public License along
++ *	with this program; if not, write to the Free Software Foundation, Inc.,
++ *	675 Mass Ave, Cambridge, MA 02139, USA.
++ *
++ */
++
++#include <stdlib.h>
++#include <stddef.h>
++#include <string.h>
++#include <stdio.h>
++#include <unistd.h>
++#include <errno.h>
++#include <ctype.h>
++#include <fcntl.h>
++#include <dirent.h>
++#include <signal.h>
++#include <syslog.h>
++#include <sys/socket.h>
++#include <sys/un.h>
++#include <sys/wait.h>
++#include <sys/stat.h>
++#include <sys/types.h>
++
++#include "udev_libc_wrapper.h"
++#include "udev.h"
++#include "udevd.h"
++#include "udev_version.h"
++#include "logging.h"
++
++#include "list.h"
++
++#ifndef DT_DIR
++#define DT_DIR			4
++#endif
++
++static const char *udev_log_str;
++static int udevd_sock = -1;
++
++#ifdef USE_LOG
++void log_message(int priority, const char *format, ...)
++{
++	va_list args;
++
++	if (priority > udev_log_priority)
++		return;
++
++	va_start(args, format);
++	vsyslog(priority, format, args);
++	va_end(args);
++}
++#endif
++
++struct device {
++	struct list_head node;
++	struct udevd_msg msg;
++	size_t bufpos;
++	char *path;
++};
++
++static dev_t read_devt(const char *path)
++{
++	char filename[PATH_SIZE];
++	char majorminor[64];
++	unsigned int major, minor;
++	ssize_t count;
++	int fd;
++
++	snprintf(filename, sizeof(filename), "%s/%s", path, "dev");
++	filename[sizeof(filename)-1] = '\0';
++
++	fd = open(filename, O_RDONLY);
++	if (fd < 0)
++		return 0;
++
++	count = read(fd, majorminor, sizeof(majorminor));
++	close(fd);
++	majorminor[count] = '\0';
++	if (sscanf(majorminor, "%u:%u", &major, &minor) != 2)
++		return 0;
++	dbg("found major=%d, minor=%d", major, minor);
++
++	return makedev(major, minor);
++}
++
++static ssize_t read_file(const char *directory, const char *file, char *str, size_t len)
++{
++	char filename[PATH_SIZE];
++	ssize_t count;
++	int fd;
++
++	memset(filename, 0, sizeof(filename));
++	snprintf(filename, sizeof(filename), "%s/%s", directory, file);
++	filename[sizeof(filename)-1] = '\0';
++
++	fd = open(filename, O_RDONLY);
++	if (fd < 0)
++		return -1;
++
++	count = read(fd, str, len-1);
++	close(fd);
++
++	if (count > (ssize_t)len)
++		count = len;
++	str[count-1] = '\0';
++
++	return count;
++}
++
++static ssize_t read_link(const char *directory, const char *file, char *str, size_t size)
++{
++	char filename[PATH_SIZE];
++	char target[PATH_SIZE];
++	int len;
++	char *back;
++	char *strip;
++	int level = 1;
++
++	snprintf(filename, sizeof(filename), "%s/%s", directory, file);
++	filename[sizeof(filename)-1] = '\0';
++
++	len = readlink(filename, target, sizeof(target)-1);
++	if (len < 0)
++		return -1;
++	target[len] = '\0';
++
++	back = target;
++	while (strncmp(back, "../", 3) == 0) {
++		back += 3;
++		level++;
++	}
++	while(level--) {
++		strip = strrchr(filename, '/');
++		if (!strip)
++			return -1;
++		strip[0] = '\0';
++	}
++
++	snprintf(str, size, "%s/%s", filename, back);
++	str[size-1] = '\0';
++
++	return len;
++}
++
++static char *add_env_key(struct device *device, const char *key, const char *value)
++{
++	size_t pos = device->bufpos;
++	device->bufpos += sprintf(&device->msg.envbuf[device->bufpos], "%s=%s", key, value)+1;
++	return &device->msg.envbuf[pos];
++}
++
++static struct device *device_create(const char *path, const char *subsystem, dev_t devt)
++{
++	struct device *device;
++	const char *devpath = &path[strlen(sysfs_path)];
++	char target[PATH_SIZE];
++
++	device = malloc(sizeof(struct device));
++	if (device == NULL) {
++		dbg("error malloc");
++		return NULL;
++	}
++	memset(device, 0x00, sizeof(struct device));
++
++	device->path = add_env_key(device, "DEVPATH", devpath);
++	device->path += strlen("DEVPATH=");
++	add_env_key(device, "SUBSYSTEM", subsystem);
++	add_env_key(device, "ACTION", "add");
++	add_env_key(device, "UDEV_COLDPLUG", "1");
++
++	if (major(devt)) {
++		char number[32];
++		sprintf(number, "%u", major(devt));
++		add_env_key(device, "MAJOR", number);
++		sprintf(number, "%u", minor(devt));
++		add_env_key(device, "MINOR", number);
++	}
++
++	if (strncmp(devpath, "/block/", strlen("/block/")) == 0 ||
++	    strncmp(devpath, "/class/", strlen("/class/")) == 0) {
++		char physpath[PATH_SIZE];
++
++		if (read_link(path, "device", physpath, sizeof(physpath)) > (ssize_t)strlen(sysfs_path)) {
++			add_env_key(device, "PHYSDEVPATH", &physpath[strlen(sysfs_path)]);
++			if (read_link(physpath, "driver", target, sizeof(target)) > (ssize_t)strlen(sysfs_path)) {
++				char *pos = strrchr(target, '/');
++				if (pos)
++					add_env_key(device, "PHYSDEVDRIVER", &pos[1]);
++			}
++			if (read_link(physpath, "bus", target, sizeof(target)) > (ssize_t)strlen(sysfs_path)) {
++				char *pos = strrchr(target, '/');
++				if (pos)
++					add_env_key(device, "PHYSDEVBUS", &pos[1]);
++			}
++		}
++	} else if (strncmp(devpath, "/devices/", strlen("/devices/")) == 0) {
++		if (read_link(path, "driver", target, sizeof(target)) > (ssize_t)strlen(sysfs_path)) {
++			char *pos = strrchr(target, '/');
++			if (pos)
++				add_env_key(device, "PHYSDEVDRIVER", &pos[1]);
++		}
++		if (read_link(path, "bus", target, sizeof(target)) > (ssize_t)strlen(sysfs_path)) {
++			char *pos = strrchr(target, '/');
++			if (pos)
++				add_env_key(device, "PHYSDEVBUS", &pos[1]);
++		}
++	}
++
++	return device;
++}
++
++static int device_list_insert(struct list_head *device_list, struct device *device)
++{
++	struct device *loop_device;
++
++	dbg("insert: '%s'", device->path);
++
++	/* sort files in lexical order */
++	list_for_each_entry(loop_device, device_list, node)
++		if (strcmp(loop_device->path, device->path) > 0)
++			break;
++
++	list_add_tail(&device->node, &loop_device->node);
++
++	return 0;
++}
++
++static int add_device_udevd(struct device *device)
++{
++	size_t msg_len;
++	struct sockaddr_un saddr;
++	socklen_t addrlen;
++	int retval;
++
++	memset(&saddr, 0x00, sizeof(struct sockaddr_un));
++	saddr.sun_family = AF_LOCAL;
++	/* use abstract namespace for socket path */
++	strcpy(&saddr.sun_path[1], UDEVD_SOCK_PATH);
++	addrlen = offsetof(struct sockaddr_un, sun_path) + strlen(saddr.sun_path+1) + 1;
++
++	strcpy(device->msg.magic, UDEV_MAGIC);
++	device->msg.type = UDEVD_UEVENT_UDEVSEND;
++
++	msg_len = offsetof(struct udevd_msg, envbuf) + device->bufpos;
++	dbg("msg_len=%i", msg_len);
++
++	retval = sendto(udevd_sock, &device->msg, msg_len, 0, (struct sockaddr *)&saddr, addrlen);
++	if (retval < 0)
++		return -1;
++
++	return 0;
++}
++
++static void exec_list(struct list_head *device_list, const char *first[], const char *last[])
++{
++	struct device *loop_device;
++	struct device *tmp_device;
++	int i;
++
++	/* handle the "first" type devices first */
++	if (first)
++		list_for_each_entry_safe(loop_device, tmp_device, device_list, node) {
++			for (i = 0; first[i] != NULL; i++) {
++				if (strncmp(loop_device->path, first[i], strlen(first[i])) == 0) {
++					add_device_udevd(loop_device);
++					list_del(&loop_device->node);
++					free(loop_device);
++					break;
++				}
++			}
++		}
++
++	/* handle the devices we are allowed to, excluding the "last" type devices */
++	if (last)
++		list_for_each_entry_safe(loop_device, tmp_device, device_list, node) {
++			int found = 0;
++			for (i = 0; last[i] != NULL; i++) {
++				if (strncmp(loop_device->path, last[i], strlen(last[i])) == 0) {
++					found = 1;
++					break;
++				}
++			}
++			if (found)
++				continue;
++
++		add_device_udevd(loop_device);
++		list_del(&loop_device->node);
++		free(loop_device);
++	}
++
++	/* handle the rest of the devices */
++	list_for_each_entry_safe(loop_device, tmp_device, device_list, node) {
++		add_device_udevd(loop_device);
++		list_del(&loop_device->node);
++		free(loop_device);
++	}
++}
++
++static int udev_scan_class(void)
++{
++	char base[PATH_SIZE];
++	DIR *dir;
++	struct dirent *dent;
++	LIST_HEAD(device_list);
++
++	/* we want /dev/null and /dev/console first */
++	const char *first[] = {
++		"/class/mem",
++		"/class/tty",
++		NULL,
++	};
++
++	snprintf(base, sizeof(base), "%s/class", sysfs_path);
++	base[sizeof(base)-1] = '\0';
++
++	dir = opendir(base);
++	if (!dir)
++		return -1;
++
++	for (dent = readdir(dir); dent != NULL; dent = readdir(dir)) {
++		char dirname[PATH_SIZE];
++		DIR *dir2;
++		struct dirent *dent2;
++
++		if (dent->d_name[0] == '.')
++			continue;
++
++		snprintf(dirname, sizeof(dirname), "%s/%s", base, dent->d_name);
++		dirname[sizeof(dirname)-1] = '\0';
++
++		dir2 = opendir(dirname);
++		if (!dir2)
++			continue;
++		for (dent2 = readdir(dir2); dent2 != NULL; dent2 = readdir(dir2)) {
++			char dirname2[PATH_SIZE];
++			struct device *device;
++			dev_t devt;
++
++			if (dent2->d_name[0] == '.')
++				continue;
++			if (dent2->d_type != DT_DIR)
++				continue;
++
++			snprintf(dirname2, sizeof(dirname2), "%s/%s", dirname, dent2->d_name);
++			dirname2[sizeof(dirname2)-1] = '\0';
++			devt = read_devt(dirname2);
++			device = device_create(dirname2, dent->d_name, devt);
++
++			if (strcmp(dent->d_name, "net") == 0 ||
++			    strcmp(dent->d_name, "bluetooth") == 0) {
++				add_env_key(device, "INTERFACE", dent2->d_name);
++			} else if (strcmp(dent->d_name, "pcmcia_socket") == 0 &&
++				   strlen(dent->d_name) > 14) {
++				add_env_key(device, "SOCKET_NO",
++					dent2->d_name + 14);
++			}
++
++			device_list_insert(&device_list, device);
++		}
++		closedir(dir2);
++	}
++	closedir(dir);
++	exec_list(&device_list, first, NULL);
++
++	return 0;
++}
++
++static int udev_scan_block(void)
++{
++	char base[PATH_SIZE];
++	DIR *dir;
++	struct dirent *dent;
++	LIST_HEAD(device_list);
++
++	/* dm wants to have the block devices around before it */
++	const char *last[] = {
++		"/block/dm",
++		NULL,
++	};
++
++	snprintf(base, sizeof(base), "%s/block", sysfs_path);
++	base[sizeof(base)-1] = '\0';
++
++	dir = opendir(base);
++	if (!dir)
++		return -1;
++
++	for (dent = readdir(dir); dent != NULL; dent = readdir(dir)) {
++		char dirname[PATH_SIZE];
++		struct device *device;
++		struct dirent *dent2;
++		DIR *dir2;
++		dev_t devt;
++
++		if (dent->d_name[0] == '.')
++			continue;
++		if (dent->d_type != DT_DIR)
++			continue;
++
++		snprintf(dirname, sizeof(dirname), "%s/%s", base, dent->d_name);
++		dirname[sizeof(dirname)-1] = '\0';
++		devt = read_devt(dirname);
++		if (major(devt)) {
++			device = device_create(dirname, "block", devt);
++			device_list_insert(&device_list, device);
++		}
++
++		/* look for partitions */
++		dir2 = opendir(dirname);
++		if (!dir2)
++			continue;
++		for (dent2 = readdir(dir2); dent2 != NULL; dent2 = readdir(dir2)) {
++			char dirname2[PATH_SIZE];
++
++			if (dent2->d_name[0] == '.')
++				continue;
++			if (dent2->d_type != DT_DIR)
++				continue;
++
++			snprintf(dirname2, sizeof(dirname2), "%s/%s", dirname, dent2->d_name);
++			dirname2[sizeof(dirname2)-1] = '\0';
++			devt = read_devt(dirname2);
++			if (major(devt)) {
++				device = device_create(dirname2, "block", devt);
++				device_list_insert(&device_list, device);
++				continue;
++			}
++		}
++		closedir(dir2);
++	}
++	closedir(dir);
++	exec_list(&device_list, NULL, last);
++
++	return 0;
++}
++
++static int pci_handler(struct device *device)
++{
++	char path[PATH_SIZE];
++	char value[PATH_SIZE];
++	char vendor[PATH_SIZE];
++	char product[PATH_SIZE];
++	const char *name;
++
++	snprintf(path, sizeof(path), "%s%s", sysfs_path, device->path);
++	path[sizeof(path)-1] = '\0';
++
++	if (read_file(path, "modalias", value, sizeof(value)) > 0)
++		add_env_key(device, "MODALIAS", value);
++
++	name = strrchr(device->path, '/');
++	if (name)
++		add_env_key(device, "PCI_SLOT_NAME", &name[1]);
++
++	if (read_file(path, "class", value, sizeof(value)) > 0)
++		add_env_key(device, "PCI_CLASS", &value[2]);
++
++	if (read_file(path, "vendor", vendor, sizeof(vendor)) > 0 &&
++	    read_file(path, "device", product, sizeof(product)) > 0) {
++		snprintf(value, sizeof(value), "%s:%s", &vendor[2], &product[2]);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "PCI_ID", value);
++	}
++
++	if (read_file(path, "subsystem_vendor", vendor, sizeof(vendor)) > 0 &&
++	    read_file(path, "subsystem_device", product, sizeof(product)) > 0) {
++		snprintf(value, sizeof(value), "%s:%s", &vendor[2], &product[2]);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "PCI_SUBSYS_ID", value);
++	}
++
++	return 0;
++}
++
++static int usb_handler(struct device *device)
++{
++	char path[PATH_SIZE];
++	char value[PATH_SIZE];
++	char str1[PATH_SIZE];
++	char str2[PATH_SIZE];
++	char str3[PATH_SIZE];
++	unsigned int int1;
++	unsigned int int2;
++	unsigned int int3;
++	char *pos;
++
++	snprintf(path, sizeof(path), "%s%s", sysfs_path, device->path);
++	path[sizeof(path)-1] = '\0';
++
++	/* device events have : in their directory name */
++	pos = strrchr(path, '/');
++	if (!strchr(pos, ':'))
++		return 0;	/* and do not have other variables */
++
++	if (read_file(path, "modalias", value, sizeof(value)) > 0)
++		add_env_key(device, "MODALIAS", value);
++
++	if (read_file(path, "bInterfaceClass", str1, sizeof(str1)) > 0 &&
++	    read_file(path, "bInterfaceSubClass", str2, sizeof(str2)) > 0 &&
++	    read_file(path, "bInterfaceProtocol", str3, sizeof(str3)) > 0) {
++		int1 = (int) strtol(str1, NULL, 16);
++		int2 = (int) strtol(str2, NULL, 16);
++		int3 = (int) strtol(str3, NULL, 16);
++		snprintf(value, sizeof(value), "%u/%u/%u", int1, int2, int3);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "INTERFACE", value);
++	}
++
++	/* move to the parent directory */
++	pos[0] = '\0';
++
++	if (read_file(path, "idVendor", str1, sizeof(str1)) > 0 &&
++	    read_file(path, "idProduct", str2, sizeof(str2)) > 0 &&
++	    read_file(path, "bcdDevice", str3, sizeof(str3)) > 0) {
++		int1 = (int) strtol(str1, NULL, 16);
++		int2 = (int) strtol(str2, NULL, 16);
++		int3 = (int) strtol(str3, NULL, 16);
++		snprintf(value, sizeof(value), "%x/%x/%x", int1, int2, int3);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "PRODUCT", value);
++	}
++
++	if (read_file(path, "bDeviceClass", str1, sizeof(str1)) > 0 &&
++	    read_file(path, "bDeviceSubClass", str2, sizeof(str2)) > 0 &&
++	    read_file(path, "bDeviceProtocol", str3, sizeof(str3)) > 0) {
++		int1 = (int) strtol(str1, NULL, 16);
++		int2 = (int) strtol(str2, NULL, 16);
++		int3 = (int) strtol(str3, NULL, 16);
++		snprintf(value, sizeof(value), "%u/%u/%u", int1, int2, int3);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "TYPE", value);
++	}
++
++	if (read_file(path, "devnum", str2, sizeof(str2)) > 0) {
++		pos = strrchr(path, 'b');
++		int1 = (int) strtol(pos + 1, NULL, 16);
++		int2 = (int) strtol(str2, NULL, 16);
++		snprintf(value, sizeof(value),
++			"/proc/bus/usb/%03d/%03d", int1, int2);
++		path[sizeof(value)-1] = '\0';
++		add_env_key(device, "DEVICE", value);
++	}
++
++	return 0;
++}
++
++static int serio_handler(struct device *device)
++{
++	char path[PATH_SIZE];
++	char value[PATH_SIZE];
++
++	snprintf(path, sizeof(path), "%s%s", sysfs_path, device->path);
++	path[sizeof(path)-1] = '\0';
++
++	if (read_file(path, "modalias", value, sizeof(value)) > 0)
++		add_env_key(device, "MODALIAS", value);
++
++	if (read_file(path, "id/type", value, sizeof(value)) > 0)
++		add_env_key(device, "SERIO_TYPE", value);
++
++	if (read_file(path, "id/proto", value, sizeof(value)) > 0)
++		add_env_key(device, "SERIO_PROTO", value);
++
++	if (read_file(path, "id/id", value, sizeof(value)) > 0)
++		add_env_key(device, "SERIO_ID", value);
++
++	if (read_file(path, "id/extra", value, sizeof(value)) > 0)
++		add_env_key(device, "SERIO_EXTRA", value);
++
++	return 0;
++}
++
++static int ccw_handler(struct device *device)
++{
++	char path[PATH_SIZE];
++	char value[PATH_SIZE], *tmp;
++
++	snprintf(path, sizeof(path), "%s%s", sysfs_path, device->path);
++	path[sizeof(path)-1] = '\0';
++
++	if (read_file(path, "modalias", value, sizeof(value)) > 0)
++		add_env_key(device, "MODALIAS", value);
++
++	if (read_file(path, "cutype", value, sizeof(value)) > 0) {
++		value[4] = 0;
++		tmp = &value[5];
++		add_env_key(device, "CU_TYPE", value);
++		add_env_key(device, "CU_MODEL", tmp);
++	}
++
++	if (read_file(path, "devtype", value, sizeof(value)) > 0) {
++		if (value[0] == 'n') {
++			add_env_key(device, "DEV_TYPE", "0000");
++			add_env_key(device, "DEV_MODEL", "00");
++		}
++		else {
++			value[4] = 0;
++			tmp = &value[5];
++			add_env_key(device, "DEV_TYPE", value);
++			add_env_key(device, "DEV_MODEL", tmp);
++		}
++	}
++
++	return 0;
++}
++
++static int modalias_handler(struct device *device)
++{
++	char path[PATH_SIZE];
++	char value[PATH_SIZE];
++
++	snprintf(path, sizeof(path), "%s%s", sysfs_path, device->path);
++	path[sizeof(path)-1] = '\0';
++
++	if (read_file(path, "modalias", value, sizeof(value)) > 0)
++		add_env_key(device, "MODALIAS", value);
++
++	return 0;
++}
++
++static int udev_scan_bus(const char *bus, int bus_handler(struct device *device))
++{
++	char base[PATH_SIZE];
++	DIR *dir;
++	struct dirent *dent;
++	LIST_HEAD(device_list);
++
++	snprintf(base, sizeof(base), "%s/bus/%s/devices", sysfs_path, bus);
++	base[sizeof(base)-1] = '\0';
++
++	dir = opendir(base);
++	if (!dir)
++		return -1;
++	for (dent = readdir(dir); dent != NULL; dent = readdir(dir)) {
++		char devpath[PATH_SIZE];
++		struct device *device;
++
++		if (dent->d_name[0] == '.')
++			continue;
++
++		if (read_link(base, dent->d_name, devpath, sizeof(devpath)) < 0)
++			continue;
++
++		device = device_create(devpath, bus, makedev(0, 0));
++		if (bus_handler) {
++			if (bus_handler(device) < 0) {
++				dbg("'%s' bus handler skipped event", devpath);
++				free(device);
++				continue;
++			}
++		}
++
++		device_list_insert(&device_list, device);
++	}
++	closedir(dir);
++	exec_list(&device_list, NULL, NULL);
++
++	return 0;
++}
++
++static int udev_scan_devices(void)
++{
++	char base[PATH_SIZE];
++	DIR *dir;
++	struct dirent *dent;
++
++	snprintf(base, sizeof(base), "%s/bus", sysfs_path);
++	base[sizeof(base)-1] = '\0';
++
++	dir = opendir(base);
++	if (!dir)
++		return -1;
++
++	for (dent = readdir(dir); dent != NULL; dent = readdir(dir)) {
++		if (dent->d_name[0] == '.')
++			continue;
++		if (dent->d_type != DT_DIR)
++			continue;
++
++		/* add bus specific env values */
++		if (strcmp(dent->d_name, "pci") == 0)
++			udev_scan_bus("pci", pci_handler);
++		else if (strcmp(dent->d_name, "usb") == 0)
++			udev_scan_bus("usb", usb_handler);
++		else if (strcmp(dent->d_name, "serio") == 0)
++			udev_scan_bus("serio", serio_handler);
++		else if (strcmp(dent->d_name, "ccw") == 0)
++			udev_scan_bus("ccw", ccw_handler);
++		else
++			udev_scan_bus(dent->d_name, modalias_handler);
++	}
++	closedir(dir);
++
++	return 0;
++}
++
++int main(int argc, char *argv[], char *envp[])
++{
++	LIST_HEAD(device_list);
++	int i;
++
++	logging_init("udevcoldplug");
++	udev_config_init(); sysfs_init();
++	dbg("version %s", UDEV_VERSION);
++
++	udev_log_str = getenv("UDEV_LOG");
++
++	/* disable all logging if not explicitely requested */
++	if (udev_log_str == NULL)
++		udev_log_priority = 0;
++
++	for (i = 1 ; i < argc; i++) {
++		char *arg = argv[i];
++
++		if (strcmp(arg, "help") == 0  || strcmp(arg, "--help") == 0  || strcmp(arg, "-h") == 0) {
++			printf("Usage: udevcoldplug \n"
++				"  --help                   print this help text\n\n");
++			exit(0);
++		} else {
++			fprintf(stderr, "unknown option\n\n");
++			exit(1);
++		}
++	}
++
++	udevd_sock = socket(AF_LOCAL, SOCK_DGRAM, 0);
++	if (udevd_sock < 0) {
++		err("error getting socket");
++		return 1;
++	}
++
++	/* create nodes for already available devices */
++	udev_scan_class();
++	udev_scan_block();
++
++	/* synthesize events for bus devices
++	 * may load modules or configure the device */
++	udev_scan_devices();
++
++	if (udevd_sock >= 0)
++		close(udevd_sock);
++	logging_close();
++
++	return 0;
++}
+--- udev-081/Makefile
++++ udev-081/Makefile
+@@ -58,6 +58,7 @@ PROGRAMS = \
+ 	udevmonitor			\
+ 	udevinfo			\
+ 	udevtest			\
++	udevsynthesize			\
+ 	udevstart
+ 
+ HEADERS = \
diff --git a/meta-oe/recipes-core/udev/udev/udevsynthesize.sh b/meta-oe/recipes-core/udev/udev/udevsynthesize.sh
new file mode 100644
index 0000000000..d58217c144
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev/udevsynthesize.sh
@@ -0,0 +1,51 @@
+#!/bin/sh -e
+
+load_input_modules() {
+  for module in mousedev evdev joydev; do
+    modprobe -q $module || true
+  done
+}
+
+if [ ! -e /sys/class/mem/null/uevent ]; then # <= 2.6.14
+  /lib/udev/udevsynthesize
+  load_input_modules
+  exit 0
+fi
+
+# replace $IFS with something which is not likely to appear in a sysfs path,
+# because some buggy drivers have spaces in their names
+oldifs="$IFS"
+IFS="|"
+
+for file in /sys/bus/*/devices/*/uevent /sys/class/*/*/uevent \
+		/sys/block/*/uevent /sys/block/*/*/uevent; do
+  case "$file" in
+    */device/uevent) ;;		# skip followed device symlinks
+    */\*/*) ;;
+
+    */class/mem/*)		# for /dev/null
+    first="$first${IFS}$file" ;;
+
+    */block/md[0-9]*)
+    last="$last${IFS}$file" ;;
+
+    *)
+    default="$default${IFS}$file" ;;
+  esac
+done
+
+for file in $first${IFS}$default${IFS}$last; do
+  [ "$file" ] || continue
+  echo 'add' > "$file" || true
+done
+
+IFS="$oldifs"
+
+case "$(uname -r)" in
+  2.6.1[0-5]|2.6.1[0-5][!0-9]*) # <= 2.6.15
+  load_input_modules
+  ;;
+esac
+
+exit 0
+
diff --git a/meta-oe/recipes-core/udev/udev_165.bb b/meta-oe/recipes-core/udev/udev_165.bb
new file mode 100644
index 0000000000..2c4171d658
--- /dev/null
+++ b/meta-oe/recipes-core/udev/udev_165.bb
@@ -0,0 +1,181 @@
+DESCRIPTION = "udev is a daemon which dynamically creates and removes device nodes from \
+/dev/, handles hotplug events and loads drivers at boot time. It replaces \
+the hotplug package and requires a kernel not older than 2.6.12."
+
+LICENSE = "GPLv2+ & LGPLv2.1+"
+LICENSE_${PN} = "GPLv2+"
+LICENSE_libudev = "LGPLv2.1+"
+LICENSE_libgudev = "LGPLv2.1+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=751419260aa954499f7abaabaa882bbe \
+                    file://libudev/COPYING;md5=a6f89e2100d9b6cdffcea4f398e37343 \
+                    file://extras/gudev/COPYING;md5=a6f89e2100d9b6cdffcea4f398e37343"
+
+PR = "r2"
+
+# Untested
+DEFAULT_PREFERENCE = "-1"
+
+# Needed for udev-extras
+DEPENDS = "gperf-native usbutils acl glib-2.0"
+RDEPENDS_${PN} += "module-init-tools-depmod udev-utils"
+
+SRC_URI = "http://kernel.org/pub/linux/utils/kernel/hotplug/udev-${PV}.tar.gz \
+	   file://mount.blacklist \
+	   file://run.rules \
+	   "
+
+SRC_URI[md5sum] = "b8cf77be693fd09ccfcf26d3e4e23e97"
+SRC_URI[sha256sum] = "5c271f43d8a28176050abbc6b4e4354203b6a7d810c72c18afefd1ee100485c3"
+
+SRC_URI += " \
+       file://udev.rules \
+       file://devfs-udev.rules \
+       file://links.conf \
+       file://permissions.rules \
+       file://mount.sh \
+       file://network.sh \
+       file://local.rules \
+       file://default \
+       file://init \
+       file://cache \
+       file://udev-compat-wrapper-patch \
+"
+
+SRC_URI_append_h2200 = " file://50-hostap_cs.rules "
+PACKAGE_ARCH_h2200 = "h2200"
+
+#buglabs's bug device
+SRC_URI_append_bug = " \
+       file://30-BUG.rules \
+       file://10-mx31.rules \
+       file://bmi_eventpipe.sh "
+
+SRC_URI_append_nokia900 = " \
+       file://10-cmt_speech.rules \
+       file://70-persistent-net.rules \
+       file://udev-rules-nokia-n900-hacks.rules \
+       file://udev-rules-nokia-n900-snd.rules \
+       file://nokia-n900-mac-hack.sh \
+"
+
+PACKAGE_ARCH_bug = "bug"
+
+inherit update-rc.d autotools
+
+EXTRA_OECONF += " --with-udev-prefix= \
+                  --with-libdir-name=${base_libdir} \
+                  --with-pci-ids-path=/usr/share/misc \
+                  --disable-introspection \
+                  ac_cv_file__usr_share_pci_ids=no \
+                  ac_cv_file__usr_share_hwdata_pci_ids=no \
+                  ac_cv_file__usr_share_misc_pci_ids=yes \
+                  --sbindir=${base_sbindir} \
+                  --libexecdir=${base_libdir}/udev \
+                  --with-rootlibdir=${base_libdir} \
+"
+
+INITSCRIPT_NAME = "udev"
+INITSCRIPT_PARAMS = "start 03 S ."
+
+PACKAGES =+ "libudev libgudev udev-utils"
+
+FILES_libudev = "${base_libdir}/libudev.so.*"
+FILES_libgudev = "${base_libdir}/libgudev*.so.*"
+
+FILES_udev-utils = "${bindir}/udevinfo ${bindir}/udevtest ${base_sbindir}/udevadm"
+
+RPROVIDES_${PN} = "hotplug"
+FILES_${PN} += "${usrbindir}/* ${usrsbindir}/udevd"
+FILES_${PN}-dbg += "${usrbindir}/.debug ${usrsbindir}/.debug"
+
+# udev installs binaries under $(udev_prefix)/lib/udev, even if ${libdir}
+# is ${prefix}/lib64
+FILES_${PN} += "/lib/udev* ${libdir}/ConsoleKit"
+FILES_${PN}-dbg += "/lib/udev/.debug"
+
+RPROVIDES_udev_append = " udev-compat-wrapper"
+RDEPENDS_udev_append_spitz = " udev-compat"
+do_unpack_append_spitz() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_append_akita = " udev-compat"
+do_unpack_append_akita() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_append_c7x0 = " udev-compat"
+do_unpack_append_c7x0() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+RDEPENDS_udev_append_poodle = " udev-compat"
+do_unpack_append_poodle() {
+	bb.build.exec_func('do_apply_compat_wrapper', d)
+}
+
+# Modify init script on platforms that need to boot old kernels:
+do_apply_compat_wrapper() {
+	cd ${WORKDIR}
+	sed -i "s:/sbin/udevd:\$UDEVD:g;s:/sbin/udevadm:\$UDEVADM:g" init
+	patch <udev-compat-wrapper-patch
+	cd -
+}
+
+do_install () {
+	install -d ${D}${usrsbindir} \
+		   ${D}${sbindir}
+	oe_runmake 'DESTDIR=${D}' INSTALL=install install
+	install -d ${D}${sysconfdir}/init.d
+	install -m 0755 ${WORKDIR}/init ${D}${sysconfdir}/init.d/udev
+	install -m 0755 ${WORKDIR}/cache ${D}${sysconfdir}/init.d/udev-cache
+
+	install -d ${D}${sysconfdir}/default
+	install -m 0755 ${WORKDIR}/default ${D}${sysconfdir}/default/udev
+
+ 	cp ${S}/rules/rules.d/* ${D}${sysconfdir}/udev/rules.d/
+
+	install -m 0644 ${WORKDIR}/mount.blacklist     ${D}${sysconfdir}/udev/
+	install -m 0644 ${WORKDIR}/local.rules         ${D}${sysconfdir}/udev/rules.d/local.rules
+	install -m 0644 ${WORKDIR}/permissions.rules   ${D}${sysconfdir}/udev/rules.d/permissions.rules
+	install -m 0644 ${WORKDIR}/run.rules          ${D}${sysconfdir}/udev/rules.d/run.rules
+	install -m 0644 ${WORKDIR}/udev.rules          ${D}${sysconfdir}/udev/rules.d/udev.rules
+	install -m 0644 ${WORKDIR}/links.conf          ${D}${sysconfdir}/udev/links.conf
+	if [ "${UDEV_DEVFS_RULES}" = "1" ]; then
+		install -m 0644 ${WORKDIR}/devfs-udev.rules ${D}${sysconfdir}/udev/rules.d/devfs-udev.rules
+	fi
+
+	touch ${D}${sysconfdir}/udev/saved.uname
+	touch ${D}${sysconfdir}/udev/saved.cmdline
+	touch ${D}${sysconfdir}/udev/saved.atags
+
+	install -d ${D}${sysconfdir}/udev/scripts/
+
+	install -m 0755 ${WORKDIR}/mount.sh ${D}${sysconfdir}/udev/scripts/mount.sh
+	install -m 0755 ${WORKDIR}/network.sh ${D}${sysconfdir}/udev/scripts
+}
+
+do_install_append_h2200() {
+	install -m 0644 ${WORKDIR}/50-hostap_cs.rules         ${D}${sysconfdir}/udev/rules.d/50-hostap_cs.rules
+}
+
+do_install_append_bug() {
+	install -m 0644 ${WORKDIR}/30-BUG.rules ${D}${sysconfdir}/udev/rules.d/30-BUG.rules
+	install -m 0644 ${WORKDIR}/10-mx31.rules ${D}${sysconfdir}/udev/rules.d/10-mx31.rules
+	install -m 0644 ${WORKDIR}/bmi_eventpipe.sh ${D}${sysconfdir}/udev/scripts/bmi_eventpipe.sh
+}
+
+do_install_append_nokia900() {
+	install -m 0644 ${WORKDIR}/10-cmt_speech.rules ${D}${sysconfdir}/udev/rules.d/10-cmt_speech.rules
+	install -m 0644 ${WORKDIR}/70-persistent-net.rules ${D}${sysconfdir}/udev/rules.d/70-persistent-net.rules
+	install -m 0644 ${WORKDIR}/udev-rules-nokia-n900-hacks.rules ${D}${sysconfdir}/udev/rules.d/udev-rules-nokia-n900-hacks.rules
+	install -m 0644 ${WORKDIR}/udev-rules-nokia-n900-snd.rules ${D}${sysconfdir}/udev/rules.d/udev-rules-nokia-n900-snd.rules
+	install -m 0755 ${WORKDIR}/nokia-n900-mac-hack.sh ${D}${sysconfdir}/udev/scripts/nokia-n900-mac-hack.sh
+}
+
+# Create the cache after checkroot has run
+pkg_postinst_udev_append() {
+	if test "x$D" != "x"; then
+		OPT="-r $D"
+	else
+		OPT="-s"
+	fi
+	update-rc.d $OPT udev-cache start 12 S .
+}
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/110-arm-eabi-conf.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/110-arm-eabi-conf.patch
new file mode 100644
index 0000000000..2623301da0
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/110-arm-eabi-conf.patch
@@ -0,0 +1,22 @@
+--- /tmp/configure.ac	2008-06-22 14:14:59.000000000 +0200
++++ binutils-2.18.50.0.7/configure.ac	2008-06-22 14:15:30.000000000 +0200
+@@ -561,7 +561,7 @@
+     noconfigdirs="$noconfigdirs target-libffi target-qthreads"
+     libgloss_dir=arm
+     ;;
+-  arm*-*-linux-gnueabi)
++  arm*-*-linux-gnueabi | arm*-*-linux-uclibcgnueabi)
+     noconfigdirs="$noconfigdirs target-qthreads"
+     noconfigdirs="$noconfigdirs target-libobjc"
+     case ${with_newlib} in
+--- /tmp/configure	2008-06-22 14:17:11.000000000 +0200
++++ binutils-2.18.50.0.7/configure	2008-06-22 14:17:56.000000000 +0200
+@@ -2307,7 +2307,7 @@
+     noconfigdirs="$noconfigdirs target-libffi target-qthreads"
+     libgloss_dir=arm
+     ;;
+-  arm*-*-linux-gnueabi)
++  arm*-*-linux-gnueabi | arm*-*-linux-uclibcgnueabi)
+     noconfigdirs="$noconfigdirs target-qthreads"
+     noconfigdirs="$noconfigdirs target-libobjc"
+     case ${with_newlib} in
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.16.1-e300c2c3.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.16.1-e300c2c3.patch
new file mode 100644
index 0000000000..dfe9b18e17
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.16.1-e300c2c3.patch
@@ -0,0 +1,18 @@
+Adds support for Freescale Power architecture e300c2 and e300c3 cores.
+http://www.bitshrine.org/gpp/tc-fsl-x86lnx-e300c3-nptl-4.0.2-2.src.rpm
+
+Leon Woestenberg <leonw@mailcan.com>
+
+Index: binutils-2.19.51.0.3/opcodes/ppc-dis.c
+===================================================================
+--- binutils-2.19.51.0.3.orig/opcodes/ppc-dis.c	2009-04-16 00:38:45.000000000 -0700
++++ binutils-2.19.51.0.3/opcodes/ppc-dis.c	2009-04-16 00:43:56.000000000 -0700
+@@ -132,6 +132,8 @@
+ 		| PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
+ 		| PPC_OPCODE_VSX),
+     0 },
++  { "pmr",     (PPC_OPCODE_PMR),
++    0 },
+   { "ppc",     (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
+     0 },
+   { "ppc32",   (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_32),
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.19.1-ld-sysroot.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.19.1-ld-sysroot.patch
new file mode 100644
index 0000000000..adcabb4f66
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-2.19.1-ld-sysroot.patch
@@ -0,0 +1,37 @@
+http://sourceware.org/bugzilla/show_bug.cgi?id=10340
+
+Signed-off-by: Sven Rebhan <odinshorse@googlemail.com>
+
+Always try to prepend the sysroot prefix to absolute filenames first.
+
+Index: binutils-2.21/ld/ldfile.c
+===================================================================
+--- binutils-2.21.orig/ld/ldfile.c
++++ binutils-2.21/ld/ldfile.c
+@@ -372,18 +372,24 @@ ldfile_open_file_search (const char *arc
+      directory first.  */
+   if (! entry->is_archive)
+     {
+-      if (entry->sysrooted && IS_ABSOLUTE_PATH (entry->filename))
++      /* For absolute pathnames, try to always open the file in the
++	 sysroot first. If this fails, try to open the file at the
++	 given location. */
++      entry->sysrooted = is_sysrooted_pathname(entry->filename, FALSE);
++      if (IS_ABSOLUTE_PATH (entry->filename) && ld_sysroot && ! entry->sysrooted)
+ 	{
+ 	  char *name = concat (ld_sysroot, entry->filename,
+ 			       (const char *) NULL);
+ 	  if (ldfile_try_open_bfd (name, entry))
+ 	    {
+ 	      entry->filename = name;
++	      entry->sysrooted = TRUE;
+ 	      return TRUE;
+ 	    }
+ 	  free (name);
+ 	}
+-      else if (ldfile_try_open_bfd (entry->filename, entry))
++
++      if (ldfile_try_open_bfd (entry->filename, entry))
+ 	{
+ 	  entry->sysrooted = IS_ABSOLUTE_PATH (entry->filename)
+ 	    && is_sysrooted_pathname (entry->filename, TRUE);
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-mips-pie.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-mips-pie.patch
new file mode 100644
index 0000000000..c71f0ad4db
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-mips-pie.patch
@@ -0,0 +1,29 @@
+# "-fPIE" always triggers segmentation fault in ld.so.1 on mips platform,
+# which was first saw on dbus-daemon. Below borrow the binutils fix from
+# binutils bugzilla:
+#
+#	http://sourceware.org/bugzilla/show_bug.cgi?id=10858
+#
+# Its commit message says:
+#	* elfxx-mips.c (mips_elf_create_dynamic_relocation): Use section
+#	sym dynindx for relocs against defined syms in PIEs.
+#
+# It's in upstream CVS now (rev 1.267), but not in current release
+#
+# By Kevin Tian <kevin.tian@intel.com>, 2010-07-15
+
+diff --git a/elfxx-mips.c b/elfxx-mips.c
+index 3a1c8ba..f6c2c1c 100644
+--- binutils-2.20.1.orig/bfd/elfxx-mips.c
++++ binutils-2.20.1/bfd/elfxx-mips.c
+@@ -5688,9 +5688,7 @@ mips_elf_create_dynamic_relocation (bfd *output_bfd,
+ 
+   /* We must now calculate the dynamic symbol table index to use
+      in the relocation.  */
+-  if (h != NULL
+-      && (!h->root.def_regular
+-	  || (info->shared && !info->symbolic && !h->root.forced_local)))
++  if (h != NULL && ! SYMBOL_REFERENCES_LOCAL (info, &h->root))
+     {
+       indx = h->root.dynindx;
+       if (SGI_COMPAT (output_bfd))
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-poison.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-poison.patch
new file mode 100644
index 0000000000..c2f19276f8
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-poison.patch
@@ -0,0 +1,253 @@
+This patch is recived from Mark Hatle
+
+purpose:  warn for uses of system directories when cross linking
+
+Signed-Off-By: Mark Hatle <mark.hatle@windriver.com>
+
+Code Merged from Sourcery G++ binutils 2.19 - 4.4-277
+
+2008-07-02  Joseph Myers  <joseph@codesourcery.com>
+
+	ld/
+	* ld.h (args_type): Add error_poison_system_directories.
+	* ld.texinfo (--error-poison-system-directories): Document.
+	* ldfile.c (ldfile_add_library_path): Check
+	command_line.error_poison_system_directories.
+	* ldmain.c (main): Initialize
+	command_line.error_poison_system_directories.
+	* lexsup.c (enum option_values): Add
+	OPTION_ERROR_POISON_SYSTEM_DIRECTORIES.
+	(ld_options): Add --error-poison-system-directories.
+	(parse_args): Handle new option.	
+
+2007-06-13  Joseph Myers  <joseph@codesourcery.com>
+
+	ld/
+	* config.in: Regenerate.
+	* ld.h (args_type): Add poison_system_directories.
+	* ld.texinfo (--no-poison-system-directories): Document.
+	* ldfile.c (ldfile_add_library_path): Check
+	command_line.poison_system_directories.
+	* ldmain.c (main): Initialize
+	command_line.poison_system_directories.
+	* lexsup.c (enum option_values): Add
+	OPTION_NO_POISON_SYSTEM_DIRECTORIES.
+	(ld_options): Add --no-poison-system-directories.
+	(parse_args): Handle new option.
+
+2007-04-20  Joseph Myers  <joseph@codesourcery.com>
+
+	Merge from Sourcery G++ binutils 2.17:
+
+	2007-03-20  Joseph Myers  <joseph@codesourcery.com>
+	Based on patch by Mark Hatle <mark.hatle@windriver.com>.
+	ld/
+	* configure.in (--enable-poison-system-directories): New option.
+	* configure, config.in: Regenerate.
+	* ldfile.c (ldfile_add_library_path): If
+	ENABLE_POISON_SYSTEM_DIRECTORIES defined, warn for use of /lib,
+	/usr/lib, /usr/local/lib or /usr/X11R6/lib.
+
+Index: binutils-2.20.1/ld/config.in
+===================================================================
+--- binutils-2.20.1.orig/ld/config.in
++++ binutils-2.20.1/ld/config.in
+@@ -4,6 +4,9 @@
+    language is requested. */
+ #undef ENABLE_NLS
+ 
++/* Define to warn for use of native system library directories */
++#undef ENABLE_POISON_SYSTEM_DIRECTORIES
++
+ /* Additional extension a shared object might have. */
+ #undef EXTRA_SHLIB_EXTENSION
+ 
+Index: binutils-2.20.1/ld/configure.in
+===================================================================
+--- binutils-2.20.1.orig/ld/configure.in
++++ binutils-2.20.1/ld/configure.in
+@@ -69,6 +69,16 @@ AC_SUBST(use_sysroot)
+ AC_SUBST(TARGET_SYSTEM_ROOT)
+ AC_SUBST(TARGET_SYSTEM_ROOT_DEFINE)
+ 
++AC_ARG_ENABLE([poison-system-directories],
++	      AS_HELP_STRING([--enable-poison-system-directories],
++			     [warn for use of native system library directories]),,
++	      [enable_poison_system_directories=no])
++if test "x${enable_poison_system_directories}" = "xyes"; then
++  AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES],
++	    [1],
++	    [Define to warn for use of native system library directories])
++fi
++
+ AC_ARG_ENABLE([got],
+ AS_HELP_STRING([--enable-got=<type>],
+                [GOT handling scheme (target, single, negative, multigot)]),
+Index: binutils-2.20.1/ld/ld.h
+===================================================================
+--- binutils-2.20.1.orig/ld/ld.h
++++ binutils-2.20.1/ld/ld.h
+@@ -176,6 +176,14 @@ typedef struct {
+      input files.  */
+   bfd_boolean accept_unknown_input_arch;
+ 
++  /* If TRUE (the default) warn for uses of system directories when
++     cross linking.  */
++  bfd_boolean poison_system_directories;
++
++  /* If TRUE (default FALSE) give an error for uses of system
++     directories when cross linking instead of a warning.  */
++  bfd_boolean error_poison_system_directories;
++
+   /* Big or little endian as set on command line.  */
+   enum endian_enum endian;
+ 
+Index: binutils-2.20.1/ld/ld.texinfo
+===================================================================
+--- binutils-2.20.1.orig/ld/ld.texinfo
++++ binutils-2.20.1/ld/ld.texinfo
+@@ -2084,6 +2084,18 @@ string identifying the original linked f
+ 
+ Passing @code{none} for @var{style} disables the setting from any
+ @code{--build-id} options earlier on the command line.
++
++@kindex --no-poison-system-directories
++@item --no-poison-system-directories
++Do not warn for @option{-L} options using system directories such as
++@file{/usr/lib} when cross linking.  This option is intended for use
++in chroot environments when such directories contain the correct
++libraries for the target system rather than the host.
++
++@kindex --error-poison-system-directories
++@item --error-poison-system-directories
++Give an error instead of a warning for @option{-L} options using
++system directories when cross linking.
+ @end table
+ 
+ @c man end
+Index: binutils-2.20.1/ld/ldfile.c
+===================================================================
+--- binutils-2.20.1.orig/ld/ldfile.c
++++ binutils-2.20.1/ld/ldfile.c
+@@ -120,6 +120,23 @@ ldfile_add_library_path (const char *nam
+     {
+       new_dirs->name = xstrdup (name);
+       new_dirs->sysrooted = is_sysrooted_pathname (name, FALSE);
++
++#ifdef ENABLE_POISON_SYSTEM_DIRECTORIES
++      if (command_line.poison_system_directories
++	  && ((!strncmp (name, "/lib", 4))
++	      || (!strncmp (name, "/usr/lib", 8))
++	      || (!strncmp (name, "/usr/local/lib", 14))
++	      || (!strncmp (name, "/usr/X11R6/lib", 14))))
++	{
++	  if (command_line.error_poison_system_directories)
++	    einfo (_("%X%P: error: library search path \"%s\" is unsafe for "
++		     "cross-compilation\n"), name);
++	  else
++	    einfo (_("%P: warning: library search path \"%s\" is unsafe for "
++		     "cross-compilation\n"), name);
++	}
++#endif
++
+     }
+ }
+ 
+Index: binutils-2.20.1/ld/ldmain.c
+===================================================================
+--- binutils-2.20.1.orig/ld/ldmain.c
++++ binutils-2.20.1/ld/ldmain.c
+@@ -252,6 +252,8 @@ main (int argc, char **argv)
+   command_line.warn_mismatch = TRUE;
+   command_line.warn_search_mismatch = TRUE;
+   command_line.check_section_addresses = -1;
++  command_line.poison_system_directories = TRUE;
++  command_line.error_poison_system_directories = FALSE;
+ 
+   /* We initialize DEMANGLING based on the environment variable
+      COLLECT_NO_DEMANGLE.  The gcc collect2 program will demangle the
+Index: binutils-2.20.1/ld/lexsup.c
+===================================================================
+--- binutils-2.20.1.orig/ld/lexsup.c
++++ binutils-2.20.1/ld/lexsup.c
+@@ -166,7 +166,9 @@ enum option_values
+   OPTION_WARN_SHARED_TEXTREL,
+   OPTION_WARN_ALTERNATE_EM,
+   OPTION_REDUCE_MEMORY_OVERHEADS,
+-  OPTION_DEFAULT_SCRIPT
++  OPTION_DEFAULT_SCRIPT,
++  OPTION_NO_POISON_SYSTEM_DIRECTORIES,
++  OPTION_ERROR_POISON_SYSTEM_DIRECTORIES
+ };
+ 
+ /* The long options.  This structure is used for both the option
+@@ -575,6 +577,14 @@ static const struct ld_option ld_options
+     TWO_DASHES },
+   { {"wrap", required_argument, NULL, OPTION_WRAP},
+     '\0', N_("SYMBOL"), N_("Use wrapper functions for SYMBOL"), TWO_DASHES },
++  { {"no-poison-system-directories", no_argument, NULL,
++     OPTION_NO_POISON_SYSTEM_DIRECTORIES},
++    '\0', NULL, N_("Do not warn for -L options using system directories"),
++    TWO_DASHES },
++  { {"error-poison-system-directories", no_argument, NULL,
++     OPTION_ERROR_POISON_SYSTEM_DIRECTORIES},
++    '\0', NULL, N_("Give an error for -L options using system directories"),
++    TWO_DASHES },
+ };
+ 
+ #define OPTION_COUNT ARRAY_SIZE (ld_options)
+@@ -1480,6 +1490,14 @@ parse_args (unsigned argc, char **argv)
+               einfo (_("%P%X: --hash-size needs a numeric argument\n"));
+           }
+           break;
++
++	case OPTION_NO_POISON_SYSTEM_DIRECTORIES:
++	  command_line.poison_system_directories = FALSE;
++	  break;
++
++	case OPTION_ERROR_POISON_SYSTEM_DIRECTORIES:
++	  command_line.error_poison_system_directories = TRUE;
++	  break;
+ 	}
+     }
+ 
+diff -ur binutils-2.20.1.orig/ld/configure binutils-2.20.1/ld/configure
+--- binutils-2.20.1.orig/ld/configure	2010-03-03 08:06:22.000000000 -0600
++++ binutils-2.20.1/ld/configure	2010-09-30 11:19:35.776990594 -0500
+@@ -901,6 +904,7 @@
+ enable_targets
+ enable_64_bit_bfd
+ with_sysroot
++enable_poison_system_directories
+ enable_got
+ enable_werror
+ enable_build_warnings
+@@ -1548,6 +1552,8 @@
+ 			  (and sometimes confusing) to the casual installer
+   --enable-targets        alternative target configurations
+   --enable-64-bit-bfd     64-bit support (on hosts with narrower word sizes)
++  --enable-poison-system-directories
++                          warn for use of native system library directories
+   --enable-got=<type>     GOT handling scheme (target, single, negative,
+                           multigot)
+   --enable-werror         treat compile warnings as errors
+@@ -4302,6 +4334,19 @@
+ 
+ 
+ 
++# Check whether --enable-poison-system-directories was given.
++if test "${enable_poison_system_directories+set}" = set; then :
++  enableval=$enable_poison_system_directories;
++else
++  enable_poison_system_directories=no
++fi
++
++if test "x${enable_poison_system_directories}" = "xyes"; then
++
++$as_echo "#define ENABLE_POISON_SYSTEM_DIRECTORIES 1" >>confdefs.h
++
++fi
++
+ # Check whether --enable-got was given.
+ if test "${enable_got+set}" = set; then :
+   enableval=$enable_got; case "${enableval}" in
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-100-uclibc-conf.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-100-uclibc-conf.patch
new file mode 100644
index 0000000000..8de04e0fe0
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-100-uclibc-conf.patch
@@ -0,0 +1,34 @@
+--- binutils-2.18.orig/configure
++++ binutils-2.18/configure
+@@ -2206,7 +2206,7 @@
+   am33_2.0-*-linux*)
+     noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
+     ;;
+-  sh-*-linux*)
++  sh*-*-linux*)
+     noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
+     ;;
+   sh*-*-pe|mips*-*-pe|*arm-wince-pe)
+@@ -2504,7 +2504,7 @@
+   romp-*-*)
+     noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
+     ;;
+-  sh-*-* | sh64-*-*)
++  sh*-*-* | sh64-*-*)
+     case "${host}" in
+       i[3456789]86-*-vsta) ;; # don't add gprof back in
+       i[3456789]86-*-go32*) ;; # don't add gprof back in
+--- binutils-2.18.orig/gprof/configure
++++ binutils-2.18/gprof/configure
+@@ -4124,6 +4124,11 @@
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++linux-uclibc*)
++  lt_cv_deplibs_check_method=pass_all
++  lt_cv_file_magic_test_file=`echo /lib/libuClibc-*.so`
++  ;;
++
+ netbsd*)
+   if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then
+     lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$'
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-001_ld_makefile_patch.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-001_ld_makefile_patch.patch
new file mode 100644
index 0000000000..04a7e61e25
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-001_ld_makefile_patch.patch
@@ -0,0 +1,50 @@
+#!/bin/sh -e
+## 001_ld_makefile_patch.dpatch
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Description: correct where ld scripts are installed
+## DP: Author: Chris Chimelis <chris@debian.org>
+## DP: Upstream status: N/A
+## DP: Date: ??
+
+if [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
+
+case "$1" in
+       -patch) patch $patch_opts -p1 < $0;;
+       -unpatch) patch $patch_opts -p1 -R < $0;;
+        *)
+                echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+                exit 1;;
+esac
+
+exit 0
+
+@DPATCH@
+--- binutils-2.16.91.0.1/ld/Makefile.am
++++ binutils-2.16.91.0.1/ld/Makefile.am
+@@ -20,7 +20,7 @@
+ # We put the scripts in the directory $(scriptdir)/ldscripts.
+ # We can't put the scripts in $(datadir) because the SEARCH_DIR
+ # directives need to be different for native and cross linkers.
+-scriptdir = $(tooldir)/lib
++scriptdir = $(libdir)
+ 
+ EMUL = @EMUL@
+ EMULATION_OFILES = @EMULATION_OFILES@
+--- binutils-2.16.91.0.1/ld/Makefile.in
++++ binutils-2.16.91.0.1/ld/Makefile.in
+@@ -268,7 +268,7 @@
+ # We put the scripts in the directory $(scriptdir)/ldscripts.
+ # We can't put the scripts in $(datadir) because the SEARCH_DIR
+ # directives need to be different for native and cross linkers.
+-scriptdir = $(tooldir)/lib
++scriptdir = $(libdir)
+ BASEDIR = $(srcdir)/..
+ BFDDIR = $(BASEDIR)/bfd
+ INCDIR = $(BASEDIR)/include
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-006_better_file_error.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-006_better_file_error.patch
new file mode 100644
index 0000000000..f337611edf
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-006_better_file_error.patch
@@ -0,0 +1,43 @@
+#!/bin/sh -e
+## 006_better_file_error.dpatch by David Kimdon <dwhedon@gordian.com>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Specify which filename is causing an error if the filename is a
+## DP: directory. (#45832)
+
+if [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
+
+case "$1" in
+       -patch) patch $patch_opts -p1 < $0;;
+       -unpatch) patch $patch_opts -p1 -R < $0;;
+        *)
+                echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+                exit 1;;
+esac
+
+exit 0
+
+@DPATCH@
+diff -urNad /home/james/debian/packages/binutils/binutils-2.14.90.0.6/bfd/opncls.c binutils-2.14.90.0.6/bfd/opncls.c
+--- /home/james/debian/packages/binutils/binutils-2.14.90.0.6/bfd/opncls.c	2003-07-23 16:08:09.000000000 +0100
++++ binutils-2.14.90.0.6/bfd/opncls.c	2003-09-10 22:35:00.000000000 +0100
+@@ -150,6 +150,13 @@
+ {
+   bfd *nbfd;
+   const bfd_target *target_vec;
++  struct stat s;
++
++  if (stat (filename, &s) == 0)
++    if (S_ISDIR(s.st_mode)) {
++      bfd_set_error (bfd_error_file_not_recognized);
++      return NULL;
++    }
+ 
+   nbfd = _bfd_new_bfd ();
+   if (nbfd == NULL)
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-012_check_ldrunpath_length.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-012_check_ldrunpath_length.patch
new file mode 100644
index 0000000000..498651a90c
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-300-012_check_ldrunpath_length.patch
@@ -0,0 +1,47 @@
+#!/bin/sh -e
+## 012_check_ldrunpath_length.dpatch by Chris Chimelis <chris@debian.org>
+##
+## All lines beginning with `## DP:' are a description of the patch.
+## DP: Only generate an RPATH entry if LD_RUN_PATH is not empty, for
+## DP: cases where -rpath isn't specified. (#151024)
+
+if [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+
+[ -f debian/patches/00patch-opts ] && . debian/patches/00patch-opts
+patch_opts="${patch_opts:--f --no-backup-if-mismatch}"
+
+case "$1" in
+       -patch) patch $patch_opts -p1 < $0;;
+       -unpatch) patch $patch_opts -p1 -R < $0;;
+        *)
+                echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+                exit 1;;
+esac
+
+exit 0
+
+@DPATCH@
+diff -urNad /home/james/debian/packages/binutils/new/binutils-2.15/ld/emultempl/elf32.em binutils-2.15/ld/emultempl/elf32.em
+--- /home/james/debian/packages/binutils/new/binutils-2.15/ld/emultempl/elf32.em	2004-05-21 23:12:58.000000000 +0100
++++ binutils-2.15/ld/emultempl/elf32.em	2004-05-21 23:12:59.000000000 +0100
+@@ -692,6 +692,8 @@
+ 	      && command_line.rpath == NULL)
+ 	    {
+ 	      lib_path = (const char *) getenv ("LD_RUN_PATH");
++	      if ((lib_path) && (strlen (lib_path) == 0))
++		  lib_path = NULL;
+ 	      if (gld${EMULATION_NAME}_search_needed (lib_path, &n,
+ 						      force))
+ 		break;
+@@ -871,6 +873,8 @@
+   rpath = command_line.rpath;
+   if (rpath == NULL)
+     rpath = (const char *) getenv ("LD_RUN_PATH");
++  if ((rpath) && (strlen (rpath) == 0))
++      rpath = NULL;
+   if (! (bfd_elf_size_dynamic_sections
+ 	 (output_bfd, command_line.soname, rpath,
+ 	  command_line.filter_shlib,
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-gas-needs-libm.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-gas-needs-libm.patch
new file mode 100644
index 0000000000..db838cf20c
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-uclibc-gas-needs-libm.patch
@@ -0,0 +1,38 @@
+Source: Khem Raj <raj.khem@gmail.com>
+Disposition: submit upstream.
+
+Description:
+
+We do not need to have the libtool patch anymore for binutils after
+libtool has been updated upstream it include support for it. However
+for building gas natively on uclibc systems we have to link it with
+-lm so that it picks up missing symbols.
+
+/local/build_area/BUILD/arm_v5t_le_uclibc/binutils-2.17.50/objdir/libiberty/pic/libiberty.a(floatformat.o): In function `floatformat_from_double':
+floatformat.c:(.text+0x1ec): undefined reference to `frexp'
+floatformat.c:(.text+0x2f8): undefined reference to `ldexp'
+/local/build_area/BUILD/arm_v5t_le_uclibc/binutils-2.17.50/objdir/libiberty/pic/libiberty.a(floatformat.o): In function `floatformat_to_double':
+floatformat.c:(.text+0x38a): undefined reference to `ldexp'
+floatformat.c:(.text+0x3d2): undefined reference to `ldexp'
+floatformat.c:(.text+0x43e): undefined reference to `ldexp'                     floatformat.c:(.text+0x4e2): undefined reference to `ldexp'
+collect2: ld returned 1 exit status
+make[4]: *** [as-new] Error 1
+
+Index: binutils-2.17.50/gas/configure.tgt
+===================================================================
+--- binutils-2.17.50.orig/gas/configure.tgt
++++ binutils-2.17.50/gas/configure.tgt
+@@ -408,6 +408,12 @@ case ${generic_target} in
+   *-*-netware)				fmt=elf em=netware ;;
+ esac
+ 
++case ${generic_target} in
++  arm-*-*uclibc*)
++    need_libm=yes
++    ;;
++esac
++
+ case ${cpu_type} in
+   alpha | arm | i386 | ia64 | mips | ns32k | pdp11 | ppc | sparc | z80 | z8k)
+     bfd_gas=yes
+
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-x86_64_i386_biarch.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-x86_64_i386_biarch.patch
new file mode 100644
index 0000000000..4cd9e22438
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/binutils-x86_64_i386_biarch.patch
@@ -0,0 +1,26 @@
+#!/bin/sh -e
+## 127_x86_64_i386_biarch.dpatch
+##
+## DP: Description: Add (/usr)/lib32 to the search paths on x86_64.
+## DP: Author: Aurelien Jarno <aurel32.debian.org>
+## DP: Upstream status: Debian specific
+#
+# Hacked to apply with quilt
+# Adapted to binutils 2.18.50.0.7
+
+--- binutils/ld/emulparams/elf_i386.sh
++++ binutils/ld/emulparams/elf_i386.sh
+@@ -12,3 +12,13 @@
+ SEPARATE_GOTPLT=12
+ SHARABLE_SECTIONS=yes
+ IREL_IN_PLT=
++
++# Linux modify the default library search path to first include
++# a 32-bit specific directory.
++case "$target" in
++  x86_64*-linux* | i[3-7]86*-linux* | x86_64*-kfreebsd*-gnu | i[3-7]86*-kfreebsd*-gnu)
++    case "$EMULATION_NAME" in
++      *i386*) LIBPATH_SUFFIX=32 ;;
++    esac
++    ;;
++esac
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libiberty_path_fix.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libiberty_path_fix.patch
new file mode 100644
index 0000000000..36a14d7a18
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libiberty_path_fix.patch
@@ -0,0 +1,20 @@
+don't let the distro compiler point to the wrong installation location
+
+Thanks to RP for helping find the source code causing the issue.
+
+2010/08/13
+Nitin A Kamble <nitin.a.kamble@intel.com>
+Index: binutils-2.20.1/libiberty/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/libiberty/Makefile.in
++++ binutils-2.20.1/libiberty/Makefile.in
+@@ -327,7 +327,8 @@ install: install_to_$(INSTALL_DEST) inst
+ # multilib-specific flags, it's overridden by FLAGS_TO_PASS from the
+ # default multilib, so we have to take CFLAGS into account as well,
+ # since it will be passed the multilib flags.
+-MULTIOSDIR = `$(CC) $(CFLAGS) -print-multi-os-directory`
++#MULTIOSDIR = `$(CC) $(CFLAGS) -print-multi-os-directory`
++MULTIOSDIR = ""
+ install_to_libdir: all
+ 	${mkinstalldirs} $(DESTDIR)$(libdir)/$(MULTIOSDIR)
+ 	$(INSTALL_DATA) $(TARGETLIB) $(DESTDIR)$(libdir)/$(MULTIOSDIR)/$(TARGETLIB)n
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-2.4-update.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-2.4-update.patch
new file mode 100644
index 0000000000..f3a9203cd3
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-2.4-update.patch
@@ -0,0 +1,31174 @@
+Index: binutils-2.20.1/ltmain.sh
+===================================================================
+--- binutils-2.20.1.orig/ltmain.sh
++++ binutils-2.20.1/ltmain.sh
+@@ -1,9 +1,9 @@
+-# Generated from ltmain.m4sh.
+ 
+-# ltmain.sh (GNU libtool) 2.2.6
++# libtool (GNU libtool) 2.4
+ # Written by Gordon Matzigkeit <gord@gnu.ai.mit.edu>, 1996
+ 
+-# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006, 2007 2008 Free Software Foundation, Inc.
++# Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005, 2006,
++# 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+ # This is free software; see the source for copying conditions.  There is NO
+ # warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ 
+@@ -32,50 +32,56 @@
+ #
+ # Provide generalized library-building support services.
+ #
+-#     --config             show all configuration variables
+-#     --debug              enable verbose shell tracing
+-# -n, --dry-run            display commands without modifying any files
+-#     --features           display basic configuration information and exit
+-#     --mode=MODE          use operation mode MODE
+-#     --preserve-dup-deps  don't remove duplicate dependency libraries
+-#     --quiet, --silent    don't print informational messages
+-#     --tag=TAG            use configuration variables from tag TAG
+-# -v, --verbose            print informational messages (default)
+-#     --version            print version information
+-# -h, --help               print short or long help message
++#       --config             show all configuration variables
++#       --debug              enable verbose shell tracing
++#   -n, --dry-run            display commands without modifying any files
++#       --features           display basic configuration information and exit
++#       --mode=MODE          use operation mode MODE
++#       --preserve-dup-deps  don't remove duplicate dependency libraries
++#       --quiet, --silent    don't print informational messages
++#       --no-quiet, --no-silent
++#                            print informational messages (default)
++#       --tag=TAG            use configuration variables from tag TAG
++#   -v, --verbose            print more informational messages than default
++#       --no-verbose         don't print the extra informational messages
++#       --version            print version information
++#   -h, --help, --help-all   print short, long, or detailed help message
+ #
+ # MODE must be one of the following:
+ #
+-#       clean              remove files from the build directory
+-#       compile            compile a source file into a libtool object
+-#       execute            automatically set library path, then run a program
+-#       finish             complete the installation of libtool libraries
+-#       install            install libraries or executables
+-#       link               create a library or an executable
+-#       uninstall          remove libraries from an installed directory
++#         clean              remove files from the build directory
++#         compile            compile a source file into a libtool object
++#         execute            automatically set library path, then run a program
++#         finish             complete the installation of libtool libraries
++#         install            install libraries or executables
++#         link               create a library or an executable
++#         uninstall          remove libraries from an installed directory
+ #
+-# MODE-ARGS vary depending on the MODE.
++# MODE-ARGS vary depending on the MODE.  When passed as first option,
++# `--mode=MODE' may be abbreviated as `MODE' or a unique abbreviation of that.
+ # Try `$progname --help --mode=MODE' for a more detailed description of MODE.
+ #
+ # When reporting a bug, please describe a test case to reproduce it and
+ # include the following information:
+ #
+-#       host-triplet:	$host
+-#       shell:		$SHELL
+-#       compiler:		$LTCC
+-#       compiler flags:		$LTCFLAGS
+-#       linker:		$LD (gnu? $with_gnu_ld)
+-#       $progname:		(GNU libtool) 2.2.6
+-#       automake:		$automake_version
+-#       autoconf:		$autoconf_version
++#         host-triplet:	$host
++#         shell:		$SHELL
++#         compiler:		$LTCC
++#         compiler flags:		$LTCFLAGS
++#         linker:		$LD (gnu? $with_gnu_ld)
++#         $progname:	(GNU libtool) 2.4
++#         automake:	$automake_version
++#         autoconf:	$autoconf_version
+ #
+ # Report bugs to <bug-libtool@gnu.org>.
++# GNU libtool home page: <http://www.gnu.org/software/libtool/>.
++# General help using GNU software: <http://www.gnu.org/gethelp/>.
+ 
+-PROGRAM=ltmain.sh
++PROGRAM=libtool
+ PACKAGE=libtool
+-VERSION=2.2.6
++VERSION=2.4
+ TIMESTAMP=""
+-package_revision=1.3012
++package_revision=1.3293
+ 
+ # Be Bourne compatible
+ if test -n "${ZSH_VERSION+set}" && (emulate sh) >/dev/null 2>&1; then
+@@ -91,10 +97,15 @@ fi
+ BIN_SH=xpg4; export BIN_SH # for Tru64
+ DUALCASE=1; export DUALCASE # for MKS sh
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++}
++
+ # NLS nuisances: We save the old values to restore during execute mode.
+-# Only set LANG and LC_ALL to C if already set.
+-# These must not be set unconditionally because not all systems understand
+-# e.g. LANG=C (notably SCO).
+ lt_user_locale=
+ lt_safe_locale=
+ for lt_var in LANG LANGUAGE LC_ALL LC_CTYPE LC_COLLATE LC_MESSAGES
+@@ -107,24 +118,33 @@ do
+ 	  lt_safe_locale=\"$lt_var=C; \$lt_safe_locale\"
+ 	fi"
+ done
++LC_ALL=C
++LANGUAGE=C
++export LANGUAGE LC_ALL
+ 
+ $lt_unset CDPATH
+ 
+ 
++# Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh
++# is ksh but when the shell is invoked as "sh" and the current value of
++# the _XPG environment variable is not equal to 1 (one), the special
++# positional parameter $0, within a function call, is the name of the
++# function.
++progpath="$0"
+ 
+ 
+ 
+ : ${CP="cp -f"}
+-: ${ECHO="echo"}
+-: ${EGREP="/usr/bin/grep -E"}
+-: ${FGREP="/usr/bin/grep -F"}
+-: ${GREP="/usr/bin/grep"}
++test "${ECHO+set}" = set || ECHO=${as_echo-'printf %s\n'}
++: ${EGREP="/bin/grep -E"}
++: ${FGREP="/bin/grep -F"}
++: ${GREP="/bin/grep"}
+ : ${LN_S="ln -s"}
+ : ${MAKE="make"}
+ : ${MKDIR="mkdir"}
+ : ${MV="mv -f"}
+ : ${RM="rm -f"}
+-: ${SED="/opt/local/bin/gsed"}
++: ${SED="/bin/sed"}
+ : ${SHELL="${CONFIG_SHELL-/bin/sh}"}
+ : ${Xsed="$SED -e 1s/^X//"}
+ 
+@@ -144,6 +164,27 @@ IFS=" 	$lt_nl"
+ dirname="s,/[^/]*$,,"
+ basename="s,^.*/,,"
+ 
++# func_dirname file append nondir_replacement
++# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
++# otherwise set result to NONDIR_REPLACEMENT.
++func_dirname ()
++{
++    func_dirname_result=`$ECHO "${1}" | $SED "$dirname"`
++    if test "X$func_dirname_result" = "X${1}"; then
++      func_dirname_result="${3}"
++    else
++      func_dirname_result="$func_dirname_result${2}"
++    fi
++} # func_dirname may be replaced by extended shell implementation
++
++
++# func_basename file
++func_basename ()
++{
++    func_basename_result=`$ECHO "${1}" | $SED "$basename"`
++} # func_basename may be replaced by extended shell implementation
++
++
+ # func_dirname_and_basename file append nondir_replacement
+ # perform func_basename and func_dirname in a single function
+ # call:
+@@ -158,24 +199,41 @@ basename="s,^.*/,,"
+ # those functions but instead duplicate the functionality here.
+ func_dirname_and_basename ()
+ {
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
++    # Extract subdirectory from the argument.
++    func_dirname_result=`$ECHO "${1}" | $SED -e "$dirname"`
++    if test "X$func_dirname_result" = "X${1}"; then
++      func_dirname_result="${3}"
++    else
++      func_dirname_result="$func_dirname_result${2}"
++    fi
++    func_basename_result=`$ECHO "${1}" | $SED -e "$basename"`
++} # func_dirname_and_basename may be replaced by extended shell implementation
++
++
++# func_stripname prefix suffix name
++# strip PREFIX and SUFFIX off of NAME.
++# PREFIX and SUFFIX must not contain globbing or regex special
++# characters, hashes, percent signs, but SUFFIX may contain a leading
++# dot (in which case that matches only a dot).
++# func_strip_suffix prefix name
++func_stripname ()
++{
++    case ${2} in
++      .*) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%\\\\${2}\$%%"`;;
++      *)  func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%${2}\$%%"`;;
++    esac
++} # func_stripname may be replaced by extended shell implementation
+ 
+-# Generated shell functions inserted here.
+ 
+ # These SED scripts presuppose an absolute path with a trailing slash.
+-pathcar="s,^/\([^/]*\).*$,\1,"
+-pathcdr="s,^/[^/]*,,"
+-removedotparts="s@/\(\./\)\{1,\}@/@g;s,/\.$,/,"
+-collapseslashes="s@/\{1,\}@/@g"
+-finalslash="s,/*$,/,"
++pathcar='s,^/\([^/]*\).*$,\1,'
++pathcdr='s,^/[^/]*,,'
++removedotparts=':dotsl
++		s@/\./@/@g
++		t dotsl
++		s,/\.$,/,'
++collapseslashes='s@/\{1,\}@/@g'
++finalslash='s,/*$,/,'
+ 
+ # func_normal_abspath PATH
+ # Remove doubled-up and trailing slashes, "." path components,
+@@ -315,21 +373,9 @@ func_relative_path ()
+   fi
+ }
+ 
+-# Work around backward compatibility issue on IRIX 6.5. On IRIX 6.4+, sh
+-# is ksh but when the shell is invoked as "sh" and the current value of
+-# the _XPG environment variable is not equal to 1 (one), the special
+-# positional parameter $0, within a function call, is the name of the
+-# function.
+-progpath="$0"
+-
+ # The name of this program:
+-# In the unlikely event $progname began with a '-', it would play havoc with
+-# func_echo (imagine progname=-n), so we prepend ./ in that case:
+ func_dirname_and_basename "$progpath"
+ progname=$func_basename_result
+-case $progname in
+-  -*) progname=./$progname ;;
+-esac
+ 
+ # Make sure we have an absolute path for reexecution:
+ case $progpath in
+@@ -360,6 +406,15 @@ sed_quote_subst='s/\([`"$\\]\)/\\\1/g'
+ # Same as above, but do not quote variable references.
+ double_quote_subst='s/\(["`\\]\)/\\\1/g'
+ 
++# Sed substitution that turns a string into a regex matching for the
++# string literally.
++sed_make_literal_regex='s,[].[^$\\*\/],\\&,g'
++
++# Sed substitution that converts a w32 file name or path
++# which contains forward slashes, into one that contains
++# (escaped) backslashes.  A very naive implementation.
++lt_sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g'
++
+ # Re-`\' parameter expansions in output of double_quote_subst that were
+ # `\'-ed in input to the same.  If an odd number of `\' preceded a '$'
+ # in input to double_quote_subst, that '$' was protected from expansion.
+@@ -388,7 +443,7 @@ opt_warning=:
+ # name if it has been set yet.
+ func_echo ()
+ {
+-    $ECHO "$progname${mode+: }$mode: $*"
++    $ECHO "$progname: ${opt_mode+$opt_mode: }$*"
+ }
+ 
+ # func_verbose arg...
+@@ -403,18 +458,25 @@ func_verbose ()
+     :
+ }
+ 
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO "$*"
++}
++
+ # func_error arg...
+ # Echo program name prefixed message to standard error.
+ func_error ()
+ {
+-    $ECHO "$progname${mode+: }$mode: "${1+"$@"} 1>&2
++    $ECHO "$progname: ${opt_mode+$opt_mode: }"${1+"$@"} 1>&2
+ }
+ 
+ # func_warning arg...
+ # Echo program name prefixed warning message to standard error.
+ func_warning ()
+ {
+-    $opt_warning && $ECHO "$progname${mode+: }$mode: warning: "${1+"$@"} 1>&2
++    $opt_warning && $ECHO "$progname: ${opt_mode+$opt_mode: }warning: "${1+"$@"} 1>&2
+ 
+     # bash bug again:
+     :
+@@ -471,9 +533,9 @@ func_mkdir_p ()
+         case $my_directory_path in */*) ;; *) break ;; esac
+ 
+         # ...otherwise throw away the child directory and loop
+-        my_directory_path=`$ECHO "X$my_directory_path" | $Xsed -e "$dirname"`
++        my_directory_path=`$ECHO "$my_directory_path" | $SED -e "$dirname"`
+       done
+-      my_dir_list=`$ECHO "X$my_dir_list" | $Xsed -e 's,:*$,,'`
++      my_dir_list=`$ECHO "$my_dir_list" | $SED 's,:*$,,'`
+ 
+       save_mkdir_p_IFS="$IFS"; IFS=':'
+       for my_dir in $my_dir_list; do
+@@ -523,7 +585,7 @@ func_mktempdir ()
+         func_fatal_error "cannot create temporary directory \`$my_tmpdir'"
+     fi
+ 
+-    $ECHO "X$my_tmpdir" | $Xsed
++    $ECHO "$my_tmpdir"
+ }
+ 
+ 
+@@ -537,7 +599,7 @@ func_quote_for_eval ()
+ {
+     case $1 in
+       *[\\\`\"\$]*)
+-	func_quote_for_eval_unquoted_result=`$ECHO "X$1" | $Xsed -e "$sed_quote_subst"` ;;
++	func_quote_for_eval_unquoted_result=`$ECHO "$1" | $SED "$sed_quote_subst"` ;;
+       *)
+         func_quote_for_eval_unquoted_result="$1" ;;
+     esac
+@@ -564,7 +626,7 @@ func_quote_for_expand ()
+ {
+     case $1 in
+       *[\\\`\"]*)
+-	my_arg=`$ECHO "X$1" | $Xsed \
++	my_arg=`$ECHO "$1" | $SED \
+ 	    -e "$double_quote_subst" -e "$sed_double_backslash"` ;;
+       *)
+         my_arg="$1" ;;
+@@ -633,15 +695,39 @@ func_show_eval_locale ()
+     fi
+ }
+ 
+-
+-
++# func_tr_sh
++# Turn $1 into a string suitable for a shell variable name.
++# Result is stored in $func_tr_sh_result.  All characters
++# not in the set a-zA-Z0-9_ are replaced with '_'. Further,
++# if $1 begins with a digit, a '_' is prepended as well.
++func_tr_sh ()
++{
++  case $1 in
++  [0-9]* | *[!a-zA-Z0-9_]*)
++    func_tr_sh_result=`$ECHO "$1" | $SED 's/^\([0-9]\)/_\1/; s/[^a-zA-Z0-9_]/_/g'`
++    ;;
++  * )
++    func_tr_sh_result=$1
++    ;;
++  esac
++}
+ 
+ 
+ # func_version
+ # Echo version message to standard output and exit.
+ func_version ()
+ {
+-    $SED -n '/^# '$PROGRAM' (GNU /,/# warranty; / {
++    $opt_debug
++
++    $SED -n '/(C)/!b go
++	:more
++	/\./!{
++	  N
++	  s/\n# / /
++	  b more
++	}
++	:go
++	/^# '$PROGRAM' (GNU /,/# warranty; / {
+         s/^# //
+ 	s/^# *$//
+         s/\((C)\)[ 0-9,-]*\( [1-9][0-9]*\)/\1\2/
+@@ -654,22 +740,28 @@ func_version ()
+ # Echo short help message to standard output and exit.
+ func_usage ()
+ {
+-    $SED -n '/^# Usage:/,/# -h/ {
++    $opt_debug
++
++    $SED -n '/^# Usage:/,/^#  *.*--help/ {
+         s/^# //
+ 	s/^# *$//
+ 	s/\$progname/'$progname'/
+ 	p
+     }' < "$progpath"
+-    $ECHO
++    echo
+     $ECHO "run \`$progname --help | more' for full usage"
+     exit $?
+ }
+ 
+-# func_help
+-# Echo long help message to standard output and exit.
++# func_help [NOEXIT]
++# Echo long help message to standard output and exit,
++# unless 'noexit' is passed as argument.
+ func_help ()
+ {
++    $opt_debug
++
+     $SED -n '/^# Usage:/,/# Report bugs to/ {
++	:print
+         s/^# //
+ 	s/^# *$//
+ 	s*\$progname*'$progname'*
+@@ -682,8 +774,15 @@ func_help ()
+ 	s/\$automake_version/'"`(automake --version) 2>/dev/null |$SED 1q`"'/
+ 	s/\$autoconf_version/'"`(autoconf --version) 2>/dev/null |$SED 1q`"'/
+ 	p
+-     }' < "$progpath"
+-    exit $?
++	d
++     }
++     /^# .* home page:/b print
++     /^# General help using/b print
++     ' < "$progpath"
++    ret=$?
++    if test -z "$1"; then
++      exit $ret
++    fi
+ }
+ 
+ # func_missing_arg argname
+@@ -691,63 +790,106 @@ func_help ()
+ # exit_cmd.
+ func_missing_arg ()
+ {
+-    func_error "missing argument for $1"
++    $opt_debug
++
++    func_error "missing argument for $1."
+     exit_cmd=exit
+ }
+ 
+-exit_cmd=:
+ 
++# func_split_short_opt shortopt
++# Set func_split_short_opt_name and func_split_short_opt_arg shell
++# variables after splitting SHORTOPT after the 2nd character.
++func_split_short_opt ()
++{
++    my_sed_short_opt='1s/^\(..\).*$/\1/;q'
++    my_sed_short_rest='1s/^..\(.*\)$/\1/;q'
++
++    func_split_short_opt_name=`$ECHO "$1" | $SED "$my_sed_short_opt"`
++    func_split_short_opt_arg=`$ECHO "$1" | $SED "$my_sed_short_rest"`
++} # func_split_short_opt may be replaced by extended shell implementation
++
++
++# func_split_long_opt longopt
++# Set func_split_long_opt_name and func_split_long_opt_arg shell
++# variables after splitting LONGOPT at the `=' sign.
++func_split_long_opt ()
++{
++    my_sed_long_opt='1s/^\(--[^=]*\)=.*/\1/;q'
++    my_sed_long_arg='1s/^--[^=]*=//'
++
++    func_split_long_opt_name=`$ECHO "$1" | $SED "$my_sed_long_opt"`
++    func_split_long_opt_arg=`$ECHO "$1" | $SED "$my_sed_long_arg"`
++} # func_split_long_opt may be replaced by extended shell implementation
+ 
++exit_cmd=:
+ 
+ 
+ 
+-# Check that we have a working $ECHO.
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t'; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell, and then maybe $ECHO will work.
+-  exec $SHELL "$progpath" --no-reexec ${1+"$@"}
+-fi
+ 
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<EOF
+-$*
+-EOF
+-  exit $EXIT_SUCCESS
+-fi
+ 
+ magic="%%%MAGIC variable%%%"
+ magic_exe="%%%MAGIC EXE variable%%%"
+ 
+ # Global variables.
+-# $mode is unset
+ nonopt=
+-execute_dlfiles=
+ preserve_args=
+ lo2o="s/\\.lo\$/.${objext}/"
+ o2lo="s/\\.${objext}\$/.lo/"
+ extracted_archives=
+ extracted_serial=0
+ 
+-opt_dry_run=false
+-opt_duplicate_deps=false
+-opt_silent=false
+-opt_debug=:
+-
+ # If this variable is set in any of the actions, the command in it
+ # will be execed at the end.  This prevents here-documents from being
+ # left over by shells.
+ exec_cmd=
+ 
++# func_append var value
++# Append VALUE to the end of shell variable VAR.
++func_append ()
++{
++    eval "${1}=\$${1}\${2}"
++} # func_append may be replaced by extended shell implementation
++
++# func_append_quoted var value
++# Quote VALUE and append to the end of shell variable VAR, separated
++# by a space.
++func_append_quoted ()
++{
++    func_quote_for_eval "${2}"
++    eval "${1}=\$${1}\\ \$func_quote_for_eval_result"
++} # func_append_quoted may be replaced by extended shell implementation
++
++
++# func_arith arithmetic-term...
++func_arith ()
++{
++    func_arith_result=`expr "${@}"`
++} # func_arith may be replaced by extended shell implementation
++
++
++# func_len string
++# STRING may not start with a hyphen.
++func_len ()
++{
++    func_len_result=`expr "${1}" : ".*" 2>/dev/null || echo $max_cmd_len`
++} # func_len may be replaced by extended shell implementation
++
++
++# func_lo2o object
++func_lo2o ()
++{
++    func_lo2o_result=`$ECHO "${1}" | $SED "$lo2o"`
++} # func_lo2o may be replaced by extended shell implementation
++
++
++# func_xform libobj-or-source
++func_xform ()
++{
++    func_xform_result=`$ECHO "${1}" | $SED 's/\.[^.]*$/.lo/'`
++} # func_xform may be replaced by extended shell implementation
++
++
+ # func_fatal_configuration arg...
+ # Echo program name prefixed message to standard error, followed by
+ # a configuration failure hint, and exit.
+@@ -781,16 +923,16 @@ func_config ()
+ # Display the features supported by this script.
+ func_features ()
+ {
+-    $ECHO "host: $host"
++    echo "host: $host"
+     if test "$build_libtool_libs" = yes; then
+-      $ECHO "enable shared libraries"
++      echo "enable shared libraries"
+     else
+-      $ECHO "disable shared libraries"
++      echo "disable shared libraries"
+     fi
+     if test "$build_old_libs" = yes; then
+-      $ECHO "enable static libraries"
++      echo "enable static libraries"
+     else
+-      $ECHO "disable static libraries"
++      echo "disable static libraries"
+     fi
+ 
+     exit $?
+@@ -837,117 +979,204 @@ func_enable_tag ()
+   esac
+ }
+ 
+-# Parse options once, thoroughly.  This comes as soon as possible in
+-# the script to make things like `libtool --version' happen quickly.
++# func_check_version_match
++# Ensure that we are using m4 macros, and libtool script from the same
++# release of libtool.
++func_check_version_match ()
+ {
++  if test "$package_revision" != "$macro_revision"; then
++    if test "$VERSION" != "$macro_version"; then
++      if test -z "$macro_version"; then
++        cat >&2 <<_LT_EOF
++$progname: Version mismatch error.  This is $PACKAGE $VERSION, but the
++$progname: definition of this LT_INIT comes from an older release.
++$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION
++$progname: and run autoconf again.
++_LT_EOF
++      else
++        cat >&2 <<_LT_EOF
++$progname: Version mismatch error.  This is $PACKAGE $VERSION, but the
++$progname: definition of this LT_INIT comes from $PACKAGE $macro_version.
++$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION
++$progname: and run autoconf again.
++_LT_EOF
++      fi
++    else
++      cat >&2 <<_LT_EOF
++$progname: Version mismatch error.  This is $PACKAGE $VERSION, revision $package_revision,
++$progname: but the definition of this LT_INIT comes from revision $macro_revision.
++$progname: You should recreate aclocal.m4 with macros from revision $package_revision
++$progname: of $PACKAGE $VERSION and run autoconf again.
++_LT_EOF
++    fi
++
++    exit $EXIT_MISMATCH
++  fi
++}
++
++
++# Shorthand for --mode=foo, only valid as the first argument
++case $1 in
++clean|clea|cle|cl)
++  shift; set dummy --mode clean ${1+"$@"}; shift
++  ;;
++compile|compil|compi|comp|com|co|c)
++  shift; set dummy --mode compile ${1+"$@"}; shift
++  ;;
++execute|execut|execu|exec|exe|ex|e)
++  shift; set dummy --mode execute ${1+"$@"}; shift
++  ;;
++finish|finis|fini|fin|fi|f)
++  shift; set dummy --mode finish ${1+"$@"}; shift
++  ;;
++install|instal|insta|inst|ins|in|i)
++  shift; set dummy --mode install ${1+"$@"}; shift
++  ;;
++link|lin|li|l)
++  shift; set dummy --mode link ${1+"$@"}; shift
++  ;;
++uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u)
++  shift; set dummy --mode uninstall ${1+"$@"}; shift
++  ;;
++esac
++
++
++
++# Option defaults:
++opt_debug=:
++opt_dry_run=false
++opt_config=false
++opt_preserve_dup_deps=false
++opt_features=false
++opt_finish=false
++opt_help=false
++opt_help_all=false
++opt_silent=:
++opt_verbose=:
++opt_silent=false
++opt_verbose=false
+ 
+-  # Shorthand for --mode=foo, only valid as the first argument
+-  case $1 in
+-  clean|clea|cle|cl)
+-    shift; set dummy --mode clean ${1+"$@"}; shift
+-    ;;
+-  compile|compil|compi|comp|com|co|c)
+-    shift; set dummy --mode compile ${1+"$@"}; shift
+-    ;;
+-  execute|execut|execu|exec|exe|ex|e)
+-    shift; set dummy --mode execute ${1+"$@"}; shift
+-    ;;
+-  finish|finis|fini|fin|fi|f)
+-    shift; set dummy --mode finish ${1+"$@"}; shift
+-    ;;
+-  install|instal|insta|inst|ins|in|i)
+-    shift; set dummy --mode install ${1+"$@"}; shift
+-    ;;
+-  link|lin|li|l)
+-    shift; set dummy --mode link ${1+"$@"}; shift
+-    ;;
+-  uninstall|uninstal|uninsta|uninst|unins|unin|uni|un|u)
+-    shift; set dummy --mode uninstall ${1+"$@"}; shift
+-    ;;
+-  esac
+ 
+-  # Parse non-mode specific arguments:
+-  while test "$#" -gt 0; do
++# Parse options once, thoroughly.  This comes as soon as possible in the
++# script to make things like `--version' happen as quickly as we can.
++{
++  # this just eases exit handling
++  while test $# -gt 0; do
+     opt="$1"
+     shift
+-
+     case $opt in
+-      --config)		func_config					;;
+-
+-      --debug)		preserve_args="$preserve_args $opt"
++      --debug|-x)	opt_debug='set -x'
+ 			func_echo "enabling shell trace mode"
+-			opt_debug='set -x'
+ 			$opt_debug
+ 			;;
+-
+-      -dlopen)		test "$#" -eq 0 && func_missing_arg "$opt" && break
+-			execute_dlfiles="$execute_dlfiles $1"
+-			shift
++      --dry-run|--dryrun|-n)
++			opt_dry_run=:
+ 			;;
+-
+-      --dry-run | -n)	opt_dry_run=:					;;
+-      --features)       func_features					;;
+-      --finish)		mode="finish"					;;
+-
+-      --mode)		test "$#" -eq 0 && func_missing_arg "$opt" && break
+-			case $1 in
+-			  # Valid mode arguments:
+-			  clean)	;;
+-			  compile)	;;
+-			  execute)	;;
+-			  finish)	;;
+-			  install)	;;
+-			  link)		;;
+-			  relink)	;;
+-			  uninstall)	;;
+-
+-			  # Catch anything else as an error
+-			  *) func_error "invalid argument for $opt"
+-			     exit_cmd=exit
+-			     break
+-			     ;;
+-		        esac
+-
+-			mode="$1"
++      --config)
++			opt_config=:
++func_config
++			;;
++      --dlopen|-dlopen)
++			optarg="$1"
++			opt_dlopen="${opt_dlopen+$opt_dlopen
++}$optarg"
+ 			shift
+ 			;;
+-
+       --preserve-dup-deps)
+-			opt_duplicate_deps=:				;;
+-
+-      --quiet|--silent)	preserve_args="$preserve_args $opt"
+-			opt_silent=:
++			opt_preserve_dup_deps=:
+ 			;;
+-
+-      --verbose| -v)	preserve_args="$preserve_args $opt"
++      --features)
++			opt_features=:
++func_features
++			;;
++      --finish)
++			opt_finish=:
++set dummy --mode finish ${1+"$@"}; shift
++			;;
++      --help)
++			opt_help=:
++			;;
++      --help-all)
++			opt_help_all=:
++opt_help=': help-all'
++			;;
++      --mode)
++			test $# = 0 && func_missing_arg $opt && break
++			optarg="$1"
++			opt_mode="$optarg"
++case $optarg in
++  # Valid mode arguments:
++  clean|compile|execute|finish|install|link|relink|uninstall) ;;
++
++  # Catch anything else as an error
++  *) func_error "invalid argument for $opt"
++     exit_cmd=exit
++     break
++     ;;
++esac
++			shift
++			;;
++      --no-silent|--no-quiet)
+ 			opt_silent=false
++func_append preserve_args " $opt"
+ 			;;
+-
+-      --tag)		test "$#" -eq 0 && func_missing_arg "$opt" && break
+-			preserve_args="$preserve_args $opt $1"
+-			func_enable_tag "$1"	# tagname is set here
++      --no-verbose)
++			opt_verbose=false
++func_append preserve_args " $opt"
++			;;
++      --silent|--quiet)
++			opt_silent=:
++func_append preserve_args " $opt"
++        opt_verbose=false
++			;;
++      --verbose|-v)
++			opt_verbose=:
++func_append preserve_args " $opt"
++opt_silent=false
++			;;
++      --tag)
++			test $# = 0 && func_missing_arg $opt && break
++			optarg="$1"
++			opt_tag="$optarg"
++func_append preserve_args " $opt $optarg"
++func_enable_tag "$optarg"
+ 			shift
+ 			;;
+ 
++      -\?|-h)		func_usage				;;
++      --help)		func_help				;;
++      --version)	func_version				;;
++
+       # Separate optargs to long options:
+-      -dlopen=*|--mode=*|--tag=*)
+-			func_opt_split "$opt"
+-			set dummy "$func_opt_split_opt" "$func_opt_split_arg" ${1+"$@"}
++      --*=*)
++			func_split_long_opt "$opt"
++			set dummy "$func_split_long_opt_name" "$func_split_long_opt_arg" ${1+"$@"}
+ 			shift
+ 			;;
+ 
+-      -\?|-h)		func_usage					;;
+-      --help)		opt_help=:					;;
+-      --version)	func_version					;;
+-
+-      -*)		func_fatal_help "unrecognized option \`$opt'"	;;
+-
+-      *)		nonopt="$opt"
+-			break
++      # Separate non-argument short options:
++      -\?*|-h*|-n*|-v*)
++			func_split_short_opt "$opt"
++			set dummy "$func_split_short_opt_name" "-$func_split_short_opt_arg" ${1+"$@"}
++			shift
+ 			;;
++
++      --)		break					;;
++      -*)		func_fatal_help "unrecognized option \`$opt'" ;;
++      *)		set dummy "$opt" ${1+"$@"};	shift; break  ;;
+     esac
+   done
+ 
++  # Validate options:
++
++  # save first non-option argument
++  if test "$#" -gt 0; then
++    nonopt="$opt"
++    shift
++  fi
++
++  # preserve --debug
++  test "$opt_debug" = : || func_append preserve_args " --debug"
+ 
+   case $host in
+     *cygwin* | *mingw* | *pw32* | *cegcc*)
+@@ -955,82 +1184,44 @@ func_enable_tag ()
+       opt_duplicate_compiler_generated_deps=:
+       ;;
+     *)
+-      opt_duplicate_compiler_generated_deps=$opt_duplicate_deps
++      opt_duplicate_compiler_generated_deps=$opt_preserve_dup_deps
+       ;;
+   esac
+ 
+-  # Having warned about all mis-specified options, bail out if
+-  # anything was wrong.
+-  $exit_cmd $EXIT_FAILURE
+-}
++  $opt_help || {
++    # Sanity checks first:
++    func_check_version_match
+ 
+-# func_check_version_match
+-# Ensure that we are using m4 macros, and libtool script from the same
+-# release of libtool.
+-func_check_version_match ()
+-{
+-  if test "$package_revision" != "$macro_revision"; then
+-    if test "$VERSION" != "$macro_version"; then
+-      if test -z "$macro_version"; then
+-        cat >&2 <<_LT_EOF
+-$progname: Version mismatch error.  This is $PACKAGE $VERSION, but the
+-$progname: definition of this LT_INIT comes from an older release.
+-$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION
+-$progname: and run autoconf again.
+-_LT_EOF
+-      else
+-        cat >&2 <<_LT_EOF
+-$progname: Version mismatch error.  This is $PACKAGE $VERSION, but the
+-$progname: definition of this LT_INIT comes from $PACKAGE $macro_version.
+-$progname: You should recreate aclocal.m4 with macros from $PACKAGE $VERSION
+-$progname: and run autoconf again.
+-_LT_EOF
+-      fi
+-    else
+-      cat >&2 <<_LT_EOF
+-$progname: Version mismatch error.  This is $PACKAGE $VERSION, revision $package_revision,
+-$progname: but the definition of this LT_INIT comes from revision $macro_revision.
+-$progname: You should recreate aclocal.m4 with macros from revision $package_revision
+-$progname: of $PACKAGE $VERSION and run autoconf again.
+-_LT_EOF
++    if test "$build_libtool_libs" != yes && test "$build_old_libs" != yes; then
++      func_fatal_configuration "not configured to build any kind of library"
+     fi
+ 
+-    exit $EXIT_MISMATCH
+-  fi
+-}
+-
++    # Darwin sucks
++    eval std_shrext=\"$shrext_cmds\"
+ 
+-## ----------- ##
+-##    Main.    ##
+-## ----------- ##
+-
+-$opt_help || {
+-  # Sanity checks first:
+-  func_check_version_match
+-
+-  if test "$build_libtool_libs" != yes && test "$build_old_libs" != yes; then
+-    func_fatal_configuration "not configured to build any kind of library"
+-  fi
++    # Only execute mode is allowed to have -dlopen flags.
++    if test -n "$opt_dlopen" && test "$opt_mode" != execute; then
++      func_error "unrecognized option \`-dlopen'"
++      $ECHO "$help" 1>&2
++      exit $EXIT_FAILURE
++    fi
+ 
+-  test -z "$mode" && func_fatal_error "error: you must specify a MODE."
++    # Change the help message to a mode-specific one.
++    generic_help="$help"
++    help="Try \`$progname --help --mode=$opt_mode' for more information."
++  }
+ 
+ 
+-  # Darwin sucks
+-  eval std_shrext=\"$shrext_cmds\"
++  # Bail if the options were screwed
++  $exit_cmd $EXIT_FAILURE
++}
+ 
+ 
+-  # Only execute mode is allowed to have -dlopen flags.
+-  if test -n "$execute_dlfiles" && test "$mode" != execute; then
+-    func_error "unrecognized option \`-dlopen'"
+-    $ECHO "$help" 1>&2
+-    exit $EXIT_FAILURE
+-  fi
+ 
+-  # Change the help message to a mode-specific one.
+-  generic_help="$help"
+-  help="Try \`$progname --help --mode=$mode' for more information."
+-}
+ 
++## ----------- ##
++##    Main.    ##
++## ----------- ##
+ 
+ # func_lalib_p file
+ # True iff FILE is a libtool `.la' library or `.lo' object file.
+@@ -1095,12 +1286,9 @@ func_ltwrapper_executable_p ()
+ # temporary ltwrapper_script.
+ func_ltwrapper_scriptname ()
+ {
+-    func_ltwrapper_scriptname_result=""
+-    if func_ltwrapper_executable_p "$1"; then
+-	func_dirname_and_basename "$1" "" "."
+-	func_stripname '' '.exe' "$func_basename_result"
+-	func_ltwrapper_scriptname_result="$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper"
+-    fi
++    func_dirname_and_basename "$1" "" "."
++    func_stripname '' '.exe' "$func_basename_result"
++    func_ltwrapper_scriptname_result="$func_dirname_result/$objdir/${func_stripname_result}_ltshwrapper"
+ }
+ 
+ # func_ltwrapper_p file
+@@ -1146,6 +1334,37 @@ func_source ()
+ }
+ 
+ 
++# func_resolve_sysroot PATH
++# Replace a leading = in PATH with a sysroot.  Store the result into
++# func_resolve_sysroot_result
++func_resolve_sysroot ()
++{
++  func_resolve_sysroot_result=$1
++  case $func_resolve_sysroot_result in
++  =*)
++    func_stripname '=' '' "$func_resolve_sysroot_result"
++    func_resolve_sysroot_result=$lt_sysroot$func_stripname_result
++    ;;
++  esac
++}
++
++# func_replace_sysroot PATH
++# If PATH begins with the sysroot, replace it with = and
++# store the result into func_replace_sysroot_result.
++func_replace_sysroot ()
++{
++  case "$lt_sysroot:$1" in
++  ?*:"$lt_sysroot"*)
++    func_stripname "$lt_sysroot" '' "$1"
++    func_replace_sysroot_result="=$func_stripname_result"
++    ;;
++  *)
++    # Including no sysroot.
++    func_replace_sysroot_result=$1
++    ;;
++  esac
++}
++
+ # func_infer_tag arg
+ # Infer tagged configuration to use if any are available and
+ # if one wasn't chosen via the "--tag" command line option.
+@@ -1158,13 +1377,15 @@ func_infer_tag ()
+     if test -n "$available_tags" && test -z "$tagname"; then
+       CC_quoted=
+       for arg in $CC; do
+-        func_quote_for_eval "$arg"
+-	CC_quoted="$CC_quoted $func_quote_for_eval_result"
++	func_append_quoted CC_quoted "$arg"
+       done
++      CC_expanded=`func_echo_all $CC`
++      CC_quoted_expanded=`func_echo_all $CC_quoted`
+       case $@ in
+       # Blanks in the command may have been stripped by the calling shell,
+       # but not from the CC environment variable when configure was run.
+-      " $CC "* | "$CC "* | " `$ECHO $CC` "* | "`$ECHO $CC` "* | " $CC_quoted"* | "$CC_quoted "* | " `$ECHO $CC_quoted` "* | "`$ECHO $CC_quoted` "*) ;;
++      " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \
++      " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*) ;;
+       # Blanks at the start of $base_compile will cause this to fail
+       # if we don't check for them as well.
+       *)
+@@ -1175,11 +1396,13 @@ func_infer_tag ()
+ 	    CC_quoted=
+ 	    for arg in $CC; do
+ 	      # Double-quote args containing other shell metacharacters.
+-	      func_quote_for_eval "$arg"
+-	      CC_quoted="$CC_quoted $func_quote_for_eval_result"
++	      func_append_quoted CC_quoted "$arg"
+ 	    done
++	    CC_expanded=`func_echo_all $CC`
++	    CC_quoted_expanded=`func_echo_all $CC_quoted`
+ 	    case "$@ " in
+-	      " $CC "* | "$CC "* | " `$ECHO $CC` "* | "`$ECHO $CC` "* | " $CC_quoted"* | "$CC_quoted "* | " `$ECHO $CC_quoted` "* | "`$ECHO $CC_quoted` "*)
++	    " $CC "* | "$CC "* | " $CC_expanded "* | "$CC_expanded "* | \
++	    " $CC_quoted"* | "$CC_quoted "* | " $CC_quoted_expanded "* | "$CC_quoted_expanded "*)
+ 	      # The compiler in the base compile command matches
+ 	      # the one in the tagged configuration.
+ 	      # Assume this is the tagged configuration we want.
+@@ -1242,6 +1465,486 @@ EOF
+     }
+ }
+ 
++
++##################################################
++# FILE NAME AND PATH CONVERSION HELPER FUNCTIONS #
++##################################################
++
++# func_convert_core_file_wine_to_w32 ARG
++# Helper function used by file name conversion functions when $build is *nix,
++# and $host is mingw, cygwin, or some other w32 environment. Relies on a
++# correctly configured wine environment available, with the winepath program
++# in $build's $PATH.
++#
++# ARG is the $build file name to be converted to w32 format.
++# Result is available in $func_convert_core_file_wine_to_w32_result, and will
++# be empty on error (or when ARG is empty)
++func_convert_core_file_wine_to_w32 ()
++{
++  $opt_debug
++  func_convert_core_file_wine_to_w32_result="$1"
++  if test -n "$1"; then
++    # Unfortunately, winepath does not exit with a non-zero error code, so we
++    # are forced to check the contents of stdout. On the other hand, if the
++    # command is not found, the shell will set an exit code of 127 and print
++    # *an error message* to stdout. So we must check for both error code of
++    # zero AND non-empty stdout, which explains the odd construction:
++    func_convert_core_file_wine_to_w32_tmp=`winepath -w "$1" 2>/dev/null`
++    if test "$?" -eq 0 && test -n "${func_convert_core_file_wine_to_w32_tmp}"; then
++      func_convert_core_file_wine_to_w32_result=`$ECHO "$func_convert_core_file_wine_to_w32_tmp" |
++        $SED -e "$lt_sed_naive_backslashify"`
++    else
++      func_convert_core_file_wine_to_w32_result=
++    fi
++  fi
++}
++# end: func_convert_core_file_wine_to_w32
++
++
++# func_convert_core_path_wine_to_w32 ARG
++# Helper function used by path conversion functions when $build is *nix, and
++# $host is mingw, cygwin, or some other w32 environment. Relies on a correctly
++# configured wine environment available, with the winepath program in $build's
++# $PATH. Assumes ARG has no leading or trailing path separator characters.
++#
++# ARG is path to be converted from $build format to win32.
++# Result is available in $func_convert_core_path_wine_to_w32_result.
++# Unconvertible file (directory) names in ARG are skipped; if no directory names
++# are convertible, then the result may be empty.
++func_convert_core_path_wine_to_w32 ()
++{
++  $opt_debug
++  # unfortunately, winepath doesn't convert paths, only file names
++  func_convert_core_path_wine_to_w32_result=""
++  if test -n "$1"; then
++    oldIFS=$IFS
++    IFS=:
++    for func_convert_core_path_wine_to_w32_f in $1; do
++      IFS=$oldIFS
++      func_convert_core_file_wine_to_w32 "$func_convert_core_path_wine_to_w32_f"
++      if test -n "$func_convert_core_file_wine_to_w32_result" ; then
++        if test -z "$func_convert_core_path_wine_to_w32_result"; then
++          func_convert_core_path_wine_to_w32_result="$func_convert_core_file_wine_to_w32_result"
++        else
++          func_append func_convert_core_path_wine_to_w32_result ";$func_convert_core_file_wine_to_w32_result"
++        fi
++      fi
++    done
++    IFS=$oldIFS
++  fi
++}
++# end: func_convert_core_path_wine_to_w32
++
++
++# func_cygpath ARGS...
++# Wrapper around calling the cygpath program via LT_CYGPATH. This is used when
++# when (1) $build is *nix and Cygwin is hosted via a wine environment; or (2)
++# $build is MSYS and $host is Cygwin, or (3) $build is Cygwin. In case (1) or
++# (2), returns the Cygwin file name or path in func_cygpath_result (input
++# file name or path is assumed to be in w32 format, as previously converted
++# from $build's *nix or MSYS format). In case (3), returns the w32 file name
++# or path in func_cygpath_result (input file name or path is assumed to be in
++# Cygwin format). Returns an empty string on error.
++#
++# ARGS are passed to cygpath, with the last one being the file name or path to
++# be converted.
++#
++# Specify the absolute *nix (or w32) name to cygpath in the LT_CYGPATH
++# environment variable; do not put it in $PATH.
++func_cygpath ()
++{
++  $opt_debug
++  if test -n "$LT_CYGPATH" && test -f "$LT_CYGPATH"; then
++    func_cygpath_result=`$LT_CYGPATH "$@" 2>/dev/null`
++    if test "$?" -ne 0; then
++      # on failure, ensure result is empty
++      func_cygpath_result=
++    fi
++  else
++    func_cygpath_result=
++    func_error "LT_CYGPATH is empty or specifies non-existent file: \`$LT_CYGPATH'"
++  fi
++}
++#end: func_cygpath
++
++
++# func_convert_core_msys_to_w32 ARG
++# Convert file name or path ARG from MSYS format to w32 format.  Return
++# result in func_convert_core_msys_to_w32_result.
++func_convert_core_msys_to_w32 ()
++{
++  $opt_debug
++  # awkward: cmd appends spaces to result
++  func_convert_core_msys_to_w32_result=`( cmd //c echo "$1" ) 2>/dev/null |
++    $SED -e 's/[ ]*$//' -e "$lt_sed_naive_backslashify"`
++}
++#end: func_convert_core_msys_to_w32
++
++
++# func_convert_file_check ARG1 ARG2
++# Verify that ARG1 (a file name in $build format) was converted to $host
++# format in ARG2. Otherwise, emit an error message, but continue (resetting
++# func_to_host_file_result to ARG1).
++func_convert_file_check ()
++{
++  $opt_debug
++  if test -z "$2" && test -n "$1" ; then
++    func_error "Could not determine host file name corresponding to"
++    func_error "  \`$1'"
++    func_error "Continuing, but uninstalled executables may not work."
++    # Fallback:
++    func_to_host_file_result="$1"
++  fi
++}
++# end func_convert_file_check
++
++
++# func_convert_path_check FROM_PATHSEP TO_PATHSEP FROM_PATH TO_PATH
++# Verify that FROM_PATH (a path in $build format) was converted to $host
++# format in TO_PATH. Otherwise, emit an error message, but continue, resetting
++# func_to_host_file_result to a simplistic fallback value (see below).
++func_convert_path_check ()
++{
++  $opt_debug
++  if test -z "$4" && test -n "$3"; then
++    func_error "Could not determine the host path corresponding to"
++    func_error "  \`$3'"
++    func_error "Continuing, but uninstalled executables may not work."
++    # Fallback.  This is a deliberately simplistic "conversion" and
++    # should not be "improved".  See libtool.info.
++    if test "x$1" != "x$2"; then
++      lt_replace_pathsep_chars="s|$1|$2|g"
++      func_to_host_path_result=`echo "$3" |
++        $SED -e "$lt_replace_pathsep_chars"`
++    else
++      func_to_host_path_result="$3"
++    fi
++  fi
++}
++# end func_convert_path_check
++
++
++# func_convert_path_front_back_pathsep FRONTPAT BACKPAT REPL ORIG
++# Modifies func_to_host_path_result by prepending REPL if ORIG matches FRONTPAT
++# and appending REPL if ORIG matches BACKPAT.
++func_convert_path_front_back_pathsep ()
++{
++  $opt_debug
++  case $4 in
++  $1 ) func_to_host_path_result="$3$func_to_host_path_result"
++    ;;
++  esac
++  case $4 in
++  $2 ) func_append func_to_host_path_result "$3"
++    ;;
++  esac
++}
++# end func_convert_path_front_back_pathsep
++
++
++##################################################
++# $build to $host FILE NAME CONVERSION FUNCTIONS #
++##################################################
++# invoked via `$to_host_file_cmd ARG'
++#
++# In each case, ARG is the path to be converted from $build to $host format.
++# Result will be available in $func_to_host_file_result.
++
++
++# func_to_host_file ARG
++# Converts the file name ARG from $build format to $host format. Return result
++# in func_to_host_file_result.
++func_to_host_file ()
++{
++  $opt_debug
++  $to_host_file_cmd "$1"
++}
++# end func_to_host_file
++
++
++# func_to_tool_file ARG LAZY
++# converts the file name ARG from $build format to toolchain format. Return
++# result in func_to_tool_file_result.  If the conversion in use is listed
++# in (the comma separated) LAZY, no conversion takes place.
++func_to_tool_file ()
++{
++  $opt_debug
++  case ,$2, in
++    *,"$to_tool_file_cmd",*)
++      func_to_tool_file_result=$1
++      ;;
++    *)
++      $to_tool_file_cmd "$1"
++      func_to_tool_file_result=$func_to_host_file_result
++      ;;
++  esac
++}
++# end func_to_tool_file
++
++
++# func_convert_file_noop ARG
++# Copy ARG to func_to_host_file_result.
++func_convert_file_noop ()
++{
++  func_to_host_file_result="$1"
++}
++# end func_convert_file_noop
++
++
++# func_convert_file_msys_to_w32 ARG
++# Convert file name ARG from (mingw) MSYS to (mingw) w32 format; automatic
++# conversion to w32 is not available inside the cwrapper.  Returns result in
++# func_to_host_file_result.
++func_convert_file_msys_to_w32 ()
++{
++  $opt_debug
++  func_to_host_file_result="$1"
++  if test -n "$1"; then
++    func_convert_core_msys_to_w32 "$1"
++    func_to_host_file_result="$func_convert_core_msys_to_w32_result"
++  fi
++  func_convert_file_check "$1" "$func_to_host_file_result"
++}
++# end func_convert_file_msys_to_w32
++
++
++# func_convert_file_cygwin_to_w32 ARG
++# Convert file name ARG from Cygwin to w32 format.  Returns result in
++# func_to_host_file_result.
++func_convert_file_cygwin_to_w32 ()
++{
++  $opt_debug
++  func_to_host_file_result="$1"
++  if test -n "$1"; then
++    # because $build is cygwin, we call "the" cygpath in $PATH; no need to use
++    # LT_CYGPATH in this case.
++    func_to_host_file_result=`cygpath -m "$1"`
++  fi
++  func_convert_file_check "$1" "$func_to_host_file_result"
++}
++# end func_convert_file_cygwin_to_w32
++
++
++# func_convert_file_nix_to_w32 ARG
++# Convert file name ARG from *nix to w32 format.  Requires a wine environment
++# and a working winepath. Returns result in func_to_host_file_result.
++func_convert_file_nix_to_w32 ()
++{
++  $opt_debug
++  func_to_host_file_result="$1"
++  if test -n "$1"; then
++    func_convert_core_file_wine_to_w32 "$1"
++    func_to_host_file_result="$func_convert_core_file_wine_to_w32_result"
++  fi
++  func_convert_file_check "$1" "$func_to_host_file_result"
++}
++# end func_convert_file_nix_to_w32
++
++
++# func_convert_file_msys_to_cygwin ARG
++# Convert file name ARG from MSYS to Cygwin format.  Requires LT_CYGPATH set.
++# Returns result in func_to_host_file_result.
++func_convert_file_msys_to_cygwin ()
++{
++  $opt_debug
++  func_to_host_file_result="$1"
++  if test -n "$1"; then
++    func_convert_core_msys_to_w32 "$1"
++    func_cygpath -u "$func_convert_core_msys_to_w32_result"
++    func_to_host_file_result="$func_cygpath_result"
++  fi
++  func_convert_file_check "$1" "$func_to_host_file_result"
++}
++# end func_convert_file_msys_to_cygwin
++
++
++# func_convert_file_nix_to_cygwin ARG
++# Convert file name ARG from *nix to Cygwin format.  Requires Cygwin installed
++# in a wine environment, working winepath, and LT_CYGPATH set.  Returns result
++# in func_to_host_file_result.
++func_convert_file_nix_to_cygwin ()
++{
++  $opt_debug
++  func_to_host_file_result="$1"
++  if test -n "$1"; then
++    # convert from *nix to w32, then use cygpath to convert from w32 to cygwin.
++    func_convert_core_file_wine_to_w32 "$1"
++    func_cygpath -u "$func_convert_core_file_wine_to_w32_result"
++    func_to_host_file_result="$func_cygpath_result"
++  fi
++  func_convert_file_check "$1" "$func_to_host_file_result"
++}
++# end func_convert_file_nix_to_cygwin
++
++
++#############################################
++# $build to $host PATH CONVERSION FUNCTIONS #
++#############################################
++# invoked via `$to_host_path_cmd ARG'
++#
++# In each case, ARG is the path to be converted from $build to $host format.
++# The result will be available in $func_to_host_path_result.
++#
++# Path separators are also converted from $build format to $host format.  If
++# ARG begins or ends with a path separator character, it is preserved (but
++# converted to $host format) on output.
++#
++# All path conversion functions are named using the following convention:
++#   file name conversion function    : func_convert_file_X_to_Y ()
++#   path conversion function         : func_convert_path_X_to_Y ()
++# where, for any given $build/$host combination the 'X_to_Y' value is the
++# same.  If conversion functions are added for new $build/$host combinations,
++# the two new functions must follow this pattern, or func_init_to_host_path_cmd
++# will break.
++
++
++# func_init_to_host_path_cmd
++# Ensures that function "pointer" variable $to_host_path_cmd is set to the
++# appropriate value, based on the value of $to_host_file_cmd.
++to_host_path_cmd=
++func_init_to_host_path_cmd ()
++{
++  $opt_debug
++  if test -z "$to_host_path_cmd"; then
++    func_stripname 'func_convert_file_' '' "$to_host_file_cmd"
++    to_host_path_cmd="func_convert_path_${func_stripname_result}"
++  fi
++}
++
++
++# func_to_host_path ARG
++# Converts the path ARG from $build format to $host format. Return result
++# in func_to_host_path_result.
++func_to_host_path ()
++{
++  $opt_debug
++  func_init_to_host_path_cmd
++  $to_host_path_cmd "$1"
++}
++# end func_to_host_path
++
++
++# func_convert_path_noop ARG
++# Copy ARG to func_to_host_path_result.
++func_convert_path_noop ()
++{
++  func_to_host_path_result="$1"
++}
++# end func_convert_path_noop
++
++
++# func_convert_path_msys_to_w32 ARG
++# Convert path ARG from (mingw) MSYS to (mingw) w32 format; automatic
++# conversion to w32 is not available inside the cwrapper.  Returns result in
++# func_to_host_path_result.
++func_convert_path_msys_to_w32 ()
++{
++  $opt_debug
++  func_to_host_path_result="$1"
++  if test -n "$1"; then
++    # Remove leading and trailing path separator characters from ARG.  MSYS
++    # behavior is inconsistent here; cygpath turns them into '.;' and ';.';
++    # and winepath ignores them completely.
++    func_stripname : : "$1"
++    func_to_host_path_tmp1=$func_stripname_result
++    func_convert_core_msys_to_w32 "$func_to_host_path_tmp1"
++    func_to_host_path_result="$func_convert_core_msys_to_w32_result"
++    func_convert_path_check : ";" \
++      "$func_to_host_path_tmp1" "$func_to_host_path_result"
++    func_convert_path_front_back_pathsep ":*" "*:" ";" "$1"
++  fi
++}
++# end func_convert_path_msys_to_w32
++
++
++# func_convert_path_cygwin_to_w32 ARG
++# Convert path ARG from Cygwin to w32 format.  Returns result in
++# func_to_host_file_result.
++func_convert_path_cygwin_to_w32 ()
++{
++  $opt_debug
++  func_to_host_path_result="$1"
++  if test -n "$1"; then
++    # See func_convert_path_msys_to_w32:
++    func_stripname : : "$1"
++    func_to_host_path_tmp1=$func_stripname_result
++    func_to_host_path_result=`cygpath -m -p "$func_to_host_path_tmp1"`
++    func_convert_path_check : ";" \
++      "$func_to_host_path_tmp1" "$func_to_host_path_result"
++    func_convert_path_front_back_pathsep ":*" "*:" ";" "$1"
++  fi
++}
++# end func_convert_path_cygwin_to_w32
++
++
++# func_convert_path_nix_to_w32 ARG
++# Convert path ARG from *nix to w32 format.  Requires a wine environment and
++# a working winepath.  Returns result in func_to_host_file_result.
++func_convert_path_nix_to_w32 ()
++{
++  $opt_debug
++  func_to_host_path_result="$1"
++  if test -n "$1"; then
++    # See func_convert_path_msys_to_w32:
++    func_stripname : : "$1"
++    func_to_host_path_tmp1=$func_stripname_result
++    func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1"
++    func_to_host_path_result="$func_convert_core_path_wine_to_w32_result"
++    func_convert_path_check : ";" \
++      "$func_to_host_path_tmp1" "$func_to_host_path_result"
++    func_convert_path_front_back_pathsep ":*" "*:" ";" "$1"
++  fi
++}
++# end func_convert_path_nix_to_w32
++
++
++# func_convert_path_msys_to_cygwin ARG
++# Convert path ARG from MSYS to Cygwin format.  Requires LT_CYGPATH set.
++# Returns result in func_to_host_file_result.
++func_convert_path_msys_to_cygwin ()
++{
++  $opt_debug
++  func_to_host_path_result="$1"
++  if test -n "$1"; then
++    # See func_convert_path_msys_to_w32:
++    func_stripname : : "$1"
++    func_to_host_path_tmp1=$func_stripname_result
++    func_convert_core_msys_to_w32 "$func_to_host_path_tmp1"
++    func_cygpath -u -p "$func_convert_core_msys_to_w32_result"
++    func_to_host_path_result="$func_cygpath_result"
++    func_convert_path_check : : \
++      "$func_to_host_path_tmp1" "$func_to_host_path_result"
++    func_convert_path_front_back_pathsep ":*" "*:" : "$1"
++  fi
++}
++# end func_convert_path_msys_to_cygwin
++
++
++# func_convert_path_nix_to_cygwin ARG
++# Convert path ARG from *nix to Cygwin format.  Requires Cygwin installed in a
++# a wine environment, working winepath, and LT_CYGPATH set.  Returns result in
++# func_to_host_file_result.
++func_convert_path_nix_to_cygwin ()
++{
++  $opt_debug
++  func_to_host_path_result="$1"
++  if test -n "$1"; then
++    # Remove leading and trailing path separator characters from
++    # ARG. msys behavior is inconsistent here, cygpath turns them
++    # into '.;' and ';.', and winepath ignores them completely.
++    func_stripname : : "$1"
++    func_to_host_path_tmp1=$func_stripname_result
++    func_convert_core_path_wine_to_w32 "$func_to_host_path_tmp1"
++    func_cygpath -u -p "$func_convert_core_path_wine_to_w32_result"
++    func_to_host_path_result="$func_cygpath_result"
++    func_convert_path_check : : \
++      "$func_to_host_path_tmp1" "$func_to_host_path_result"
++    func_convert_path_front_back_pathsep ":*" "*:" : "$1"
++  fi
++}
++# end func_convert_path_nix_to_cygwin
++
++
+ # func_mode_compile arg...
+ func_mode_compile ()
+ {
+@@ -1282,12 +1985,12 @@ func_mode_compile ()
+ 	  ;;
+ 
+ 	-pie | -fpie | -fPIE)
+-          pie_flag="$pie_flag $arg"
++          func_append pie_flag " $arg"
+ 	  continue
+ 	  ;;
+ 
+ 	-shared | -static | -prefer-pic | -prefer-non-pic)
+-	  later="$later $arg"
++	  func_append later " $arg"
+ 	  continue
+ 	  ;;
+ 
+@@ -1308,15 +2011,14 @@ func_mode_compile ()
+ 	  save_ifs="$IFS"; IFS=','
+ 	  for arg in $args; do
+ 	    IFS="$save_ifs"
+-	    func_quote_for_eval "$arg"
+-	    lastarg="$lastarg $func_quote_for_eval_result"
++	    func_append_quoted lastarg "$arg"
+ 	  done
+ 	  IFS="$save_ifs"
+ 	  func_stripname ' ' '' "$lastarg"
+ 	  lastarg=$func_stripname_result
+ 
+ 	  # Add the arguments to base_compile.
+-	  base_compile="$base_compile $lastarg"
++	  func_append base_compile " $lastarg"
+ 	  continue
+ 	  ;;
+ 
+@@ -1332,8 +2034,7 @@ func_mode_compile ()
+       esac    #  case $arg_mode
+ 
+       # Aesthetically quote the previous argument.
+-      func_quote_for_eval "$lastarg"
+-      base_compile="$base_compile $func_quote_for_eval_result"
++      func_append_quoted base_compile "$lastarg"
+     done # for arg
+ 
+     case $arg_mode in
+@@ -1358,7 +2059,7 @@ func_mode_compile ()
+     *.[cCFSifmso] | \
+     *.ada | *.adb | *.ads | *.asm | \
+     *.c++ | *.cc | *.ii | *.class | *.cpp | *.cxx | \
+-    *.[fF][09]? | *.for | *.java | *.obj | *.sx)
++    *.[fF][09]? | *.for | *.java | *.obj | *.sx | *.cu | *.cup)
+       func_xform "$libobj"
+       libobj=$func_xform_result
+       ;;
+@@ -1433,7 +2134,7 @@ func_mode_compile ()
+     # Calculate the filename of the output object if compiler does
+     # not support -o with -c
+     if test "$compiler_c_o" = no; then
+-      output_obj=`$ECHO "X$srcfile" | $Xsed -e 's%^.*/%%' -e 's%\.[^.]*$%%'`.${objext}
++      output_obj=`$ECHO "$srcfile" | $SED 's%^.*/%%; s%\.[^.]*$%%'`.${objext}
+       lockfile="$output_obj.lock"
+     else
+       output_obj=
+@@ -1464,17 +2165,16 @@ compiler."
+ 	$opt_dry_run || $RM $removelist
+ 	exit $EXIT_FAILURE
+       fi
+-      removelist="$removelist $output_obj"
++      func_append removelist " $output_obj"
+       $ECHO "$srcfile" > "$lockfile"
+     fi
+ 
+     $opt_dry_run || $RM $removelist
+-    removelist="$removelist $lockfile"
++    func_append removelist " $lockfile"
+     trap '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE' 1 2 15
+ 
+-    if test -n "$fix_srcfile_path"; then
+-      eval srcfile=\"$fix_srcfile_path\"
+-    fi
++    func_to_tool_file "$srcfile" func_convert_file_msys_to_w32
++    srcfile=$func_to_tool_file_result
+     func_quote_for_eval "$srcfile"
+     qsrcfile=$func_quote_for_eval_result
+ 
+@@ -1494,7 +2194,7 @@ compiler."
+ 
+       if test -z "$output_obj"; then
+ 	# Place PIC objects in $objdir
+-	command="$command -o $lobj"
++	func_append command " -o $lobj"
+       fi
+ 
+       func_show_eval_locale "$command"	\
+@@ -1541,11 +2241,11 @@ compiler."
+ 	command="$base_compile $qsrcfile $pic_flag"
+       fi
+       if test "$compiler_c_o" = yes; then
+-	command="$command -o $obj"
++	func_append command " -o $obj"
+       fi
+ 
+       # Suppress compiler output if we already did a PIC compilation.
+-      command="$command$suppress_output"
++      func_append command "$suppress_output"
+       func_show_eval_locale "$command" \
+         '$opt_dry_run || $RM $removelist; exit $EXIT_FAILURE'
+ 
+@@ -1590,13 +2290,13 @@ compiler."
+ }
+ 
+ $opt_help || {
+-test "$mode" = compile && func_mode_compile ${1+"$@"}
++  test "$opt_mode" = compile && func_mode_compile ${1+"$@"}
+ }
+ 
+ func_mode_help ()
+ {
+     # We need to display help for each of the modes.
+-    case $mode in
++    case $opt_mode in
+       "")
+         # Generic help is extracted from the usage comments
+         # at the start of this file.
+@@ -1627,10 +2327,11 @@ This mode accepts the following addition
+ 
+   -o OUTPUT-FILE    set the output file name to OUTPUT-FILE
+   -no-suppress      do not suppress compiler output for multiple passes
+-  -prefer-pic       try to building PIC objects only
+-  -prefer-non-pic   try to building non-PIC objects only
++  -prefer-pic       try to build PIC objects only
++  -prefer-non-pic   try to build non-PIC objects only
+   -shared           do not build a \`.o' file suitable for static linking
+   -static           only build a \`.o' file suitable for static linking
++  -Wc,FLAG          pass FLAG directly to the compiler
+ 
+ COMPILE-COMMAND is a command to be used in creating a \`standard' object file
+ from the given SOURCEFILE.
+@@ -1683,7 +2384,7 @@ either the \`install' or \`cp' program.
+ 
+ The following components of INSTALL-COMMAND are treated specially:
+ 
+-  -inst-prefix PREFIX-DIR  Use PREFIX-DIR as a staging area for installation
++  -inst-prefix-dir PREFIX-DIR  Use PREFIX-DIR as a staging area for installation
+ 
+ The rest of the components are interpreted as arguments to that command (only
+ BSD-compatible install options are recognized)."
+@@ -1733,6 +2434,11 @@ The following components of LINK-COMMAND
+   -version-info CURRENT[:REVISION[:AGE]]
+                     specify library version info [each variable defaults to 0]
+   -weak LIBNAME     declare that the target provides the LIBNAME interface
++  -Wc,FLAG
++  -Xcompiler FLAG   pass linker-specific FLAG directly to the compiler
++  -Wl,FLAG
++  -Xlinker FLAG     pass linker-specific FLAG directly to the linker
++  -XCClinker FLAG   pass link-specific FLAG to the compiler driver (CC)
+ 
+ All other options (arguments beginning with \`-') are ignored.
+ 
+@@ -1766,18 +2472,44 @@ Otherwise, only FILE itself is deleted u
+         ;;
+ 
+       *)
+-        func_fatal_help "invalid operation mode \`$mode'"
++        func_fatal_help "invalid operation mode \`$opt_mode'"
+         ;;
+     esac
+ 
+-    $ECHO
++    echo
+     $ECHO "Try \`$progname --help' for more information about other modes."
+-
+-    exit $?
+ }
+ 
+-  # Now that we've collected a possible --mode arg, show help if necessary
+-  $opt_help && func_mode_help
++# Now that we've collected a possible --mode arg, show help if necessary
++if $opt_help; then
++  if test "$opt_help" = :; then
++    func_mode_help
++  else
++    {
++      func_help noexit
++      for opt_mode in compile link execute install finish uninstall clean; do
++	func_mode_help
++      done
++    } | sed -n '1p; 2,$s/^Usage:/  or: /p'
++    {
++      func_help noexit
++      for opt_mode in compile link execute install finish uninstall clean; do
++	echo
++	func_mode_help
++      done
++    } |
++    sed '1d
++      /^When reporting/,/^Report/{
++	H
++	d
++      }
++      $x
++      /information about other modes/d
++      /more detailed .*MODE/d
++      s/^Usage:.*--mode=\([^ ]*\) .*/Description of \1 mode:/'
++  fi
++  exit $?
++fi
+ 
+ 
+ # func_mode_execute arg...
+@@ -1790,13 +2522,16 @@ func_mode_execute ()
+       func_fatal_help "you must specify a COMMAND"
+ 
+     # Handle -dlopen flags immediately.
+-    for file in $execute_dlfiles; do
++    for file in $opt_dlopen; do
+       test -f "$file" \
+ 	|| func_fatal_help "\`$file' is not a file"
+ 
+       dir=
+       case $file in
+       *.la)
++	func_resolve_sysroot "$file"
++	file=$func_resolve_sysroot_result
++
+ 	# Check to see that this really is a libtool archive.
+ 	func_lalib_unsafe_p "$file" \
+ 	  || func_fatal_help "\`$lib' is not a valid libtool archive"
+@@ -1818,7 +2553,7 @@ func_mode_execute ()
+ 	dir="$func_dirname_result"
+ 
+ 	if test -f "$dir/$objdir/$dlname"; then
+-	  dir="$dir/$objdir"
++	  func_append dir "/$objdir"
+ 	else
+ 	  if test ! -f "$dir/$dlname"; then
+ 	    func_fatal_error "cannot find \`$dlname' in \`$dir' or \`$dir/$objdir'"
+@@ -1859,7 +2594,7 @@ func_mode_execute ()
+     for file
+     do
+       case $file in
+-      -*) ;;
++      -* | *.la | *.lo ) ;;
+       *)
+ 	# Do a test to see if this is really a libtool program.
+ 	if func_ltwrapper_script_p "$file"; then
+@@ -1875,8 +2610,7 @@ func_mode_execute ()
+ 	;;
+       esac
+       # Quote arguments (to preserve shell metacharacters).
+-      func_quote_for_eval "$file"
+-      args="$args $func_quote_for_eval_result"
++      func_append_quoted args "$file"
+     done
+ 
+     if test "X$opt_dry_run" = Xfalse; then
+@@ -1901,29 +2635,66 @@ func_mode_execute ()
+       # Display what would be done.
+       if test -n "$shlibpath_var"; then
+ 	eval "\$ECHO \"\$shlibpath_var=\$$shlibpath_var\""
+-	$ECHO "export $shlibpath_var"
++	echo "export $shlibpath_var"
+       fi
+       $ECHO "$cmd$args"
+       exit $EXIT_SUCCESS
+     fi
+ }
+ 
+-test "$mode" = execute && func_mode_execute ${1+"$@"}
++test "$opt_mode" = execute && func_mode_execute ${1+"$@"}
++
+ 
++# func_mode_finish arg...
++func_mode_finish ()
++{
++    $opt_debug
++    libs=
++    libdirs=
++    admincmds=
++
++    for opt in "$nonopt" ${1+"$@"}
++    do
++      if test -d "$opt"; then
++	func_append libdirs " $opt"
++
++      elif test -f "$opt"; then
++	if func_lalib_unsafe_p "$opt"; then
++	  func_append libs " $opt"
++	else
++	  func_warning "\`$opt' is not a valid libtool archive"
++	fi
++
++      else
++	func_fatal_error "invalid argument \`$opt'"
++      fi
++    done
++
++    if test -n "$libs"; then
++      if test -n "$lt_sysroot"; then
++        sysroot_regex=`$ECHO "$lt_sysroot" | $SED "$sed_make_literal_regex"`
++        sysroot_cmd="s/\([ ']\)$sysroot_regex/\1/g;"
++      else
++        sysroot_cmd=
++      fi
+ 
+-# func_mode_finish arg...
+-func_mode_finish ()
+-{
+-    $opt_debug
+-    libdirs="$nonopt"
+-    admincmds=
++      # Remove sysroot references
++      if $opt_dry_run; then
++        for lib in $libs; do
++          echo "removing references to $lt_sysroot and \`=' prefixes from $lib"
++        done
++      else
++        tmpdir=`func_mktempdir`
++        for lib in $libs; do
++	  sed -e "${sysroot_cmd} s/\([ ']-[LR]\)=/\1/g; s/\([ ']\)=/\1/g" $lib \
++	    > $tmpdir/tmp-la
++	  mv -f $tmpdir/tmp-la $lib
++	done
++        ${RM}r "$tmpdir"
++      fi
++    fi
+ 
+     if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then
+-      for dir
+-      do
+-	libdirs="$libdirs $dir"
+-      done
+-
+       for libdir in $libdirs; do
+ 	if test -n "$finish_cmds"; then
+ 	  # Do each command in the finish commands.
+@@ -1933,7 +2704,7 @@ func_mode_finish ()
+ 	if test -n "$finish_eval"; then
+ 	  # Do the single finish_eval.
+ 	  eval cmds=\"$finish_eval\"
+-	  $opt_dry_run || eval "$cmds" || admincmds="$admincmds
++	  $opt_dry_run || eval "$cmds" || func_append admincmds "
+        $cmds"
+ 	fi
+       done
+@@ -1942,53 +2713,55 @@ func_mode_finish ()
+     # Exit here if they wanted silent mode.
+     $opt_silent && exit $EXIT_SUCCESS
+ 
+-    $ECHO "X----------------------------------------------------------------------" | $Xsed
+-    $ECHO "Libraries have been installed in:"
+-    for libdir in $libdirs; do
+-      $ECHO "   $libdir"
+-    done
+-    $ECHO
+-    $ECHO "If you ever happen to want to link against installed libraries"
+-    $ECHO "in a given directory, LIBDIR, you must either use libtool, and"
+-    $ECHO "specify the full pathname of the library, or use the \`-LLIBDIR'"
+-    $ECHO "flag during linking and do at least one of the following:"
+-    if test -n "$shlibpath_var"; then
+-      $ECHO "   - add LIBDIR to the \`$shlibpath_var' environment variable"
+-      $ECHO "     during execution"
+-    fi
+-    if test -n "$runpath_var"; then
+-      $ECHO "   - add LIBDIR to the \`$runpath_var' environment variable"
+-      $ECHO "     during linking"
+-    fi
+-    if test -n "$hardcode_libdir_flag_spec"; then
+-      libdir=LIBDIR
+-      eval flag=\"$hardcode_libdir_flag_spec\"
++    if test -n "$finish_cmds$finish_eval" && test -n "$libdirs"; then
++      echo "----------------------------------------------------------------------"
++      echo "Libraries have been installed in:"
++      for libdir in $libdirs; do
++	$ECHO "   $libdir"
++      done
++      echo
++      echo "If you ever happen to want to link against installed libraries"
++      echo "in a given directory, LIBDIR, you must either use libtool, and"
++      echo "specify the full pathname of the library, or use the \`-LLIBDIR'"
++      echo "flag during linking and do at least one of the following:"
++      if test -n "$shlibpath_var"; then
++	echo "   - add LIBDIR to the \`$shlibpath_var' environment variable"
++	echo "     during execution"
++      fi
++      if test -n "$runpath_var"; then
++	echo "   - add LIBDIR to the \`$runpath_var' environment variable"
++	echo "     during linking"
++      fi
++      if test -n "$hardcode_libdir_flag_spec"; then
++	libdir=LIBDIR
++	eval flag=\"$hardcode_libdir_flag_spec\"
+ 
+-      $ECHO "   - use the \`$flag' linker flag"
+-    fi
+-    if test -n "$admincmds"; then
+-      $ECHO "   - have your system administrator run these commands:$admincmds"
+-    fi
+-    if test -f /etc/ld.so.conf; then
+-      $ECHO "   - have your system administrator add LIBDIR to \`/etc/ld.so.conf'"
+-    fi
+-    $ECHO
++	$ECHO "   - use the \`$flag' linker flag"
++      fi
++      if test -n "$admincmds"; then
++	$ECHO "   - have your system administrator run these commands:$admincmds"
++      fi
++      if test -f /etc/ld.so.conf; then
++	echo "   - have your system administrator add LIBDIR to \`/etc/ld.so.conf'"
++      fi
++      echo
+ 
+-    $ECHO "See any operating system documentation about shared libraries for"
+-    case $host in
+-      solaris2.[6789]|solaris2.1[0-9])
+-        $ECHO "more information, such as the ld(1), crle(1) and ld.so(8) manual"
+-	$ECHO "pages."
+-	;;
+-      *)
+-        $ECHO "more information, such as the ld(1) and ld.so(8) manual pages."
+-        ;;
+-    esac
+-    $ECHO "X----------------------------------------------------------------------" | $Xsed
++      echo "See any operating system documentation about shared libraries for"
++      case $host in
++	solaris2.[6789]|solaris2.1[0-9])
++	  echo "more information, such as the ld(1), crle(1) and ld.so(8) manual"
++	  echo "pages."
++	  ;;
++	*)
++	  echo "more information, such as the ld(1) and ld.so(8) manual pages."
++	  ;;
++      esac
++      echo "----------------------------------------------------------------------"
++    fi
+     exit $EXIT_SUCCESS
+ }
+ 
+-test "$mode" = finish && func_mode_finish ${1+"$@"}
++test "$opt_mode" = finish && func_mode_finish ${1+"$@"}
+ 
+ 
+ # func_mode_install arg...
+@@ -1999,7 +2772,7 @@ func_mode_install ()
+     # install_prog (especially on Windows NT).
+     if test "$nonopt" = "$SHELL" || test "$nonopt" = /bin/sh ||
+        # Allow the use of GNU shtool's install command.
+-       $ECHO "X$nonopt" | $GREP shtool >/dev/null; then
++       case $nonopt in *shtool*) :;; *) false;; esac; then
+       # Aesthetically quote it.
+       func_quote_for_eval "$nonopt"
+       install_prog="$func_quote_for_eval_result "
+@@ -2013,7 +2786,12 @@ func_mode_install ()
+     # The real first argument should be the name of the installation program.
+     # Aesthetically quote it.
+     func_quote_for_eval "$arg"
+-    install_prog="$install_prog$func_quote_for_eval_result"
++    func_append install_prog "$func_quote_for_eval_result"
++    install_shared_prog=$install_prog
++    case " $install_prog " in
++      *[\\\ /]cp\ *) install_cp=: ;;
++      *) install_cp=false ;;
++    esac
+ 
+     # We need to accept at least all the BSD install flags.
+     dest=
+@@ -2023,10 +2801,12 @@ func_mode_install ()
+     install_type=
+     isdir=no
+     stripme=
++    no_mode=:
+     for arg
+     do
++      arg2=
+       if test -n "$dest"; then
+-	files="$files $dest"
++	func_append files " $dest"
+ 	dest=$arg
+ 	continue
+       fi
+@@ -2034,10 +2814,9 @@ func_mode_install ()
+       case $arg in
+       -d) isdir=yes ;;
+       -f)
+-	case " $install_prog " in
+-	*[\\\ /]cp\ *) ;;
+-	*) prev=$arg ;;
+-	esac
++	if $install_cp; then :; else
++	  prev=$arg
++	fi
+ 	;;
+       -g | -m | -o)
+ 	prev=$arg
+@@ -2051,6 +2830,10 @@ func_mode_install ()
+       *)
+ 	# If the previous option needed an argument, then skip it.
+ 	if test -n "$prev"; then
++	  if test "x$prev" = x-m && test -n "$install_override_mode"; then
++	    arg2=$install_override_mode
++	    no_mode=false
++	  fi
+ 	  prev=
+ 	else
+ 	  dest=$arg
+@@ -2061,7 +2844,11 @@ func_mode_install ()
+ 
+       # Aesthetically quote the argument.
+       func_quote_for_eval "$arg"
+-      install_prog="$install_prog $func_quote_for_eval_result"
++      func_append install_prog " $func_quote_for_eval_result"
++      if test -n "$arg2"; then
++	func_quote_for_eval "$arg2"
++      fi
++      func_append install_shared_prog " $func_quote_for_eval_result"
+     done
+ 
+     test -z "$install_prog" && \
+@@ -2070,6 +2857,13 @@ func_mode_install ()
+     test -n "$prev" && \
+       func_fatal_help "the \`$prev' option requires an argument"
+ 
++    if test -n "$install_override_mode" && $no_mode; then
++      if $install_cp; then :; else
++	func_quote_for_eval "$install_override_mode"
++	func_append install_shared_prog " -m $func_quote_for_eval_result"
++      fi
++    fi
++
+     if test -z "$files"; then
+       if test -z "$dest"; then
+ 	func_fatal_help "no file or destination specified"
+@@ -2124,10 +2918,13 @@ func_mode_install ()
+       case $file in
+       *.$libext)
+ 	# Do the static libraries later.
+-	staticlibs="$staticlibs $file"
++	func_append staticlibs " $file"
+ 	;;
+ 
+       *.la)
++	func_resolve_sysroot "$file"
++	file=$func_resolve_sysroot_result
++
+ 	# Check to see that this really is a libtool archive.
+ 	func_lalib_unsafe_p "$file" \
+ 	  || func_fatal_help "\`$file' is not a valid libtool archive"
+@@ -2141,23 +2938,30 @@ func_mode_install ()
+ 	if test "X$destdir" = "X$libdir"; then
+ 	  case "$current_libdirs " in
+ 	  *" $libdir "*) ;;
+-	  *) current_libdirs="$current_libdirs $libdir" ;;
++	  *) func_append current_libdirs " $libdir" ;;
+ 	  esac
+ 	else
+ 	  # Note the libdir as a future libdir.
+ 	  case "$future_libdirs " in
+ 	  *" $libdir "*) ;;
+-	  *) future_libdirs="$future_libdirs $libdir" ;;
++	  *) func_append future_libdirs " $libdir" ;;
+ 	  esac
+ 	fi
+ 
+ 	func_dirname "$file" "/" ""
+ 	dir="$func_dirname_result"
+-	dir="$dir$objdir"
++	func_append dir "$objdir"
+ 
+ 	if test -n "$relink_command"; then
++      # Strip any trailing slash from the destination.
++      func_stripname '' '/' "$libdir"
++      destlibdir=$func_stripname_result
++
++      func_stripname '' '/' "$destdir"
++      s_destdir=$func_stripname_result
++
+ 	  # Determine the prefix the user has applied to our future dir.
+-	  inst_prefix_dir=`$ECHO "X$destdir" | $Xsed -e "s%$libdir\$%%"`
++	  inst_prefix_dir=`$ECHO "X$s_destdir" | $Xsed -e "s%$destlibdir\$%%"`
+ 
+ 	  # Don't allow the user to place us outside of our expected
+ 	  # location b/c this prevents finding dependent libraries that
+@@ -2170,9 +2974,9 @@ func_mode_install ()
+ 
+ 	  if test -n "$inst_prefix_dir"; then
+ 	    # Stick the inst_prefix_dir data into the link command.
+-	    relink_command=`$ECHO "X$relink_command" | $Xsed -e "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"`
++	    relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%-inst-prefix-dir $inst_prefix_dir%"`
+ 	  else
+-	    relink_command=`$ECHO "X$relink_command" | $Xsed -e "s%@inst_prefix_dir@%%"`
++	    relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"`
+ 	  fi
+ 
+ 	  func_warning "relinking \`$file'"
+@@ -2190,7 +2994,7 @@ func_mode_install ()
+ 	  test -n "$relink_command" && srcname="$realname"T
+ 
+ 	  # Install the shared library and build the symlinks.
+-	  func_show_eval "$install_prog $dir/$srcname $destdir/$realname" \
++	  func_show_eval "$install_shared_prog $dir/$srcname $destdir/$realname" \
+ 	      'exit $?'
+ 	  tstripme="$stripme"
+ 	  case $host_os in
+@@ -2230,7 +3034,7 @@ func_mode_install ()
+ 	func_show_eval "$install_prog $instname $destdir/$name" 'exit $?'
+ 
+ 	# Maybe install the static library, too.
+-	test -n "$old_library" && staticlibs="$staticlibs $dir/$old_library"
++	test -n "$old_library" && func_append staticlibs " $dir/$old_library"
+ 	;;
+ 
+       *.lo)
+@@ -2330,7 +3134,7 @@ func_mode_install ()
+ 	    if test -f "$lib"; then
+ 	      func_source "$lib"
+ 	    fi
+-	    libfile="$libdir/"`$ECHO "X$lib" | $Xsed -e 's%^.*/%%g'` ### testsuite: skip nested quoting test
++	    libfile="$libdir/"`$ECHO "$lib" | $SED 's%^.*/%%g'` ### testsuite: skip nested quoting test
+ 	    if test -n "$libdir" && test ! -f "$libfile"; then
+ 	      func_warning "\`$lib' has not been installed in \`$libdir'"
+ 	      finalize=no
+@@ -2349,7 +3153,7 @@ func_mode_install ()
+ 		file="$func_basename_result"
+ 	        outputname="$tmpdir/$file"
+ 	        # Replace the output file specification.
+-	        relink_command=`$ECHO "X$relink_command" | $Xsed -e 's%@OUTPUT@%'"$outputname"'%g'`
++	        relink_command=`$ECHO "$relink_command" | $SED 's%@OUTPUT@%'"$outputname"'%g'`
+ 
+ 	        $opt_silent || {
+ 	          func_quote_for_expand "$relink_command"
+@@ -2368,7 +3172,7 @@ func_mode_install ()
+ 	    }
+ 	  else
+ 	    # Install the binary that we compiled earlier.
+-	    file=`$ECHO "X$file$stripped_ext" | $Xsed -e "s%\([^/]*\)$%$objdir/\1%"`
++	    file=`$ECHO "$file$stripped_ext" | $SED "s%\([^/]*\)$%$objdir/\1%"`
+ 	  fi
+ 	fi
+ 
+@@ -2427,7 +3231,7 @@ func_mode_install ()
+     fi
+ }
+ 
+-test "$mode" = install && func_mode_install ${1+"$@"}
++test "$opt_mode" = install && func_mode_install ${1+"$@"}
+ 
+ 
+ # func_generate_dlsyms outputname originator pic_p
+@@ -2470,6 +3274,22 @@ func_generate_dlsyms ()
+ extern \"C\" {
+ #endif
+ 
++#if defined(__GNUC__) && (((__GNUC__ == 4) && (__GNUC_MINOR__ >= 4)) || (__GNUC__ > 4))
++#pragma GCC diagnostic ignored \"-Wstrict-prototypes\"
++#endif
++
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ /* External symbol declarations for the compiler. */\
+ "
+ 
+@@ -2479,10 +3299,11 @@ extern \"C\" {
+ 	  $opt_dry_run || echo ': @PROGRAM@ ' > "$nlist"
+ 
+ 	  # Add our own program objects to the symbol list.
+-	  progfiles=`$ECHO "X$objs$old_deplibs" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP`
++	  progfiles=`$ECHO "$objs$old_deplibs" | $SP2NL | $SED "$lo2o" | $NL2SP`
+ 	  for progfile in $progfiles; do
+-	    func_verbose "extracting global C symbols from \`$progfile'"
+-	    $opt_dry_run || eval "$NM $progfile | $global_symbol_pipe >> '$nlist'"
++	    func_to_tool_file "$progfile" func_convert_file_msys_to_w32
++	    func_verbose "extracting global C symbols from \`$func_to_tool_file_result'"
++	    $opt_dry_run || eval "$NM $func_to_tool_file_result | $global_symbol_pipe >> '$nlist'"
+ 	  done
+ 
+ 	  if test -n "$exclude_expsyms"; then
+@@ -2518,7 +3339,7 @@ extern \"C\" {
+ 	      eval '$GREP -f "$output_objdir/$outputname.exp" < "$nlist" > "$nlist"T'
+ 	      eval '$MV "$nlist"T "$nlist"'
+ 	      case $host in
+-	        *cygwin | *mingw* | *cegcc* )
++	        *cygwin* | *mingw* | *cegcc* )
+ 	          eval "echo EXPORTS "'> "$output_objdir/$outputname.def"'
+ 	          eval 'cat "$nlist" >> "$output_objdir/$outputname.def"'
+ 	          ;;
+@@ -2531,10 +3352,52 @@ extern \"C\" {
+ 	  func_verbose "extracting global C symbols from \`$dlprefile'"
+ 	  func_basename "$dlprefile"
+ 	  name="$func_basename_result"
+-	  $opt_dry_run || {
+-	    eval '$ECHO ": $name " >> "$nlist"'
+-	    eval "$NM $dlprefile 2>/dev/null | $global_symbol_pipe >> '$nlist'"
+-	  }
++          case $host in
++	    *cygwin* | *mingw* | *cegcc* )
++	      # if an import library, we need to obtain dlname
++	      if func_win32_import_lib_p "$dlprefile"; then
++	        func_tr_sh "$dlprefile"
++	        eval "curr_lafile=\$libfile_$func_tr_sh_result"
++	        dlprefile_dlbasename=""
++	        if test -n "$curr_lafile" && func_lalib_p "$curr_lafile"; then
++	          # Use subshell, to avoid clobbering current variable values
++	          dlprefile_dlname=`source "$curr_lafile" && echo "$dlname"`
++	          if test -n "$dlprefile_dlname" ; then
++	            func_basename "$dlprefile_dlname"
++	            dlprefile_dlbasename="$func_basename_result"
++	          else
++	            # no lafile. user explicitly requested -dlpreopen <import library>.
++	            $sharedlib_from_linklib_cmd "$dlprefile"
++	            dlprefile_dlbasename=$sharedlib_from_linklib_result
++	          fi
++	        fi
++	        $opt_dry_run || {
++	          if test -n "$dlprefile_dlbasename" ; then
++	            eval '$ECHO ": $dlprefile_dlbasename" >> "$nlist"'
++	          else
++	            func_warning "Could not compute DLL name from $name"
++	            eval '$ECHO ": $name " >> "$nlist"'
++	          fi
++	          func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32
++	          eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe |
++	            $SED -e '/I __imp/d' -e 's/I __nm_/D /;s/_nm__//' >> '$nlist'"
++	        }
++	      else # not an import lib
++	        $opt_dry_run || {
++	          eval '$ECHO ": $name " >> "$nlist"'
++	          func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32
++	          eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'"
++	        }
++	      fi
++	    ;;
++	    *)
++	      $opt_dry_run || {
++	        eval '$ECHO ": $name " >> "$nlist"'
++	        func_to_tool_file "$dlprefile" func_convert_file_msys_to_w32
++	        eval "$NM \"$func_to_tool_file_result\" 2>/dev/null | $global_symbol_pipe >> '$nlist'"
++	      }
++	    ;;
++          esac
+ 	done
+ 
+ 	$opt_dry_run || {
+@@ -2562,36 +3425,19 @@ extern \"C\" {
+ 	  if test -f "$nlist"S; then
+ 	    eval "$global_symbol_to_cdecl"' < "$nlist"S >> "$output_objdir/$my_dlsyms"'
+ 	  else
+-	    $ECHO '/* NONE */' >> "$output_objdir/$my_dlsyms"
++	    echo '/* NONE */' >> "$output_objdir/$my_dlsyms"
+ 	  fi
+ 
+-	  $ECHO >> "$output_objdir/$my_dlsyms" "\
++	  echo >> "$output_objdir/$my_dlsyms" "\
+ 
+ /* The mapping between symbol names and symbols.  */
+ typedef struct {
+   const char *name;
+   void *address;
+ } lt_dlsymlist;
+-"
+-	  case $host in
+-	  *cygwin* | *mingw* | *cegcc* )
+-	    $ECHO >> "$output_objdir/$my_dlsyms" "\
+-/* DATA imports from DLLs on WIN32 con't be const, because
+-   runtime relocations are performed -- see ld's documentation
+-   on pseudo-relocs.  */"
+-	    lt_dlsym_const= ;;
+-	  *osf5*)
+-	    echo >> "$output_objdir/$my_dlsyms" "\
+-/* This system does not cope well with relocations in const data */"
+-	    lt_dlsym_const= ;;
+-	  *)
+-	    lt_dlsym_const=const ;;
+-	  esac
+-
+-	  $ECHO >> "$output_objdir/$my_dlsyms" "\
+-extern $lt_dlsym_const lt_dlsymlist
++extern LT_DLSYM_CONST lt_dlsymlist
+ lt_${my_prefix}_LTX_preloaded_symbols[];
+-$lt_dlsym_const lt_dlsymlist
++LT_DLSYM_CONST lt_dlsymlist
+ lt_${my_prefix}_LTX_preloaded_symbols[] =
+ {\
+   { \"$my_originator\", (void *) 0 },"
+@@ -2604,7 +3450,7 @@ lt_${my_prefix}_LTX_preloaded_symbols[]
+ 	    eval "$global_symbol_to_c_name_address_lib_prefix" < "$nlist" >> "$output_objdir/$my_dlsyms"
+ 	    ;;
+ 	  esac
+-	  $ECHO >> "$output_objdir/$my_dlsyms" "\
++	  echo >> "$output_objdir/$my_dlsyms" "\
+   {0, (void *) 0}
+ };
+ 
+@@ -2647,7 +3493,7 @@ static const void *lt_preloaded_setup()
+ 	for arg in $LTCFLAGS; do
+ 	  case $arg in
+ 	  -pie | -fpie | -fPIE) ;;
+-	  *) symtab_cflags="$symtab_cflags $arg" ;;
++	  *) func_append symtab_cflags " $arg" ;;
+ 	  esac
+ 	done
+ 
+@@ -2662,16 +3508,16 @@ static const void *lt_preloaded_setup()
+ 	case $host in
+ 	*cygwin* | *mingw* | *cegcc* )
+ 	  if test -f "$output_objdir/$my_outputname.def"; then
+-	    compile_command=`$ECHO "X$compile_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"`
+-	    finalize_command=`$ECHO "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"`
++	    compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"`
++	    finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$output_objdir/$my_outputname.def $symfileobj%"`
+ 	  else
+-	    compile_command=`$ECHO "X$compile_command" | $Xsed -e "s%@SYMFILE@%$symfileobj%"`
+-	    finalize_command=`$ECHO "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$symfileobj%"`
++	    compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"`
++	    finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"`
+ 	  fi
+ 	  ;;
+ 	*)
+-	  compile_command=`$ECHO "X$compile_command" | $Xsed -e "s%@SYMFILE@%$symfileobj%"`
+-	  finalize_command=`$ECHO "X$finalize_command" | $Xsed -e "s%@SYMFILE@%$symfileobj%"`
++	  compile_command=`$ECHO "$compile_command" | $SED "s%@SYMFILE@%$symfileobj%"`
++	  finalize_command=`$ECHO "$finalize_command" | $SED "s%@SYMFILE@%$symfileobj%"`
+ 	  ;;
+ 	esac
+ 	;;
+@@ -2685,8 +3531,8 @@ static const void *lt_preloaded_setup()
+       # really was required.
+ 
+       # Nullify the symbol file.
+-      compile_command=`$ECHO "X$compile_command" | $Xsed -e "s% @SYMFILE@%%"`
+-      finalize_command=`$ECHO "X$finalize_command" | $Xsed -e "s% @SYMFILE@%%"`
++      compile_command=`$ECHO "$compile_command" | $SED "s% @SYMFILE@%%"`
++      finalize_command=`$ECHO "$finalize_command" | $SED "s% @SYMFILE@%%"`
+     fi
+ }
+ 
+@@ -2696,6 +3542,7 @@ static const void *lt_preloaded_setup()
+ # Need a lot of goo to handle *both* DLLs and import libs
+ # Has to be a shell function in order to 'eat' the argument
+ # that is supplied when $file_magic_command is called.
++# Despite the name, also deal with 64 bit binaries.
+ func_win32_libid ()
+ {
+   $opt_debug
+@@ -2706,9 +3553,11 @@ func_win32_libid ()
+     win32_libid_type="x86 archive import"
+     ;;
+   *ar\ archive*) # could be an import, or static
++    # Keep the egrep pattern in sync with the one in _LT_CHECK_MAGIC_METHOD.
+     if eval $OBJDUMP -f $1 | $SED -e '10q' 2>/dev/null |
+-       $EGREP 'file format pe-i386(.*architecture: i386)?' >/dev/null ; then
+-      win32_nmres=`eval $NM -f posix -A $1 |
++       $EGREP 'file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)' >/dev/null; then
++      func_to_tool_file "$1" func_convert_file_msys_to_w32
++      win32_nmres=`eval $NM -f posix -A \"$func_to_tool_file_result\" |
+ 	$SED -n -e '
+ 	    1,100{
+ 		/ I /{
+@@ -2737,6 +3586,131 @@ func_win32_libid ()
+   $ECHO "$win32_libid_type"
+ }
+ 
++# func_cygming_dll_for_implib ARG
++#
++# Platform-specific function to extract the
++# name of the DLL associated with the specified
++# import library ARG.
++# Invoked by eval'ing the libtool variable
++#    $sharedlib_from_linklib_cmd
++# Result is available in the variable
++#    $sharedlib_from_linklib_result
++func_cygming_dll_for_implib ()
++{
++  $opt_debug
++  sharedlib_from_linklib_result=`$DLLTOOL --identify-strict --identify "$1"`
++}
++
++# func_cygming_dll_for_implib_fallback_core SECTION_NAME LIBNAMEs
++#
++# The is the core of a fallback implementation of a
++# platform-specific function to extract the name of the
++# DLL associated with the specified import library LIBNAME.
++#
++# SECTION_NAME is either .idata$6 or .idata$7, depending
++# on the platform and compiler that created the implib.
++#
++# Echos the name of the DLL associated with the
++# specified import library.
++func_cygming_dll_for_implib_fallback_core ()
++{
++  $opt_debug
++  match_literal=`$ECHO "$1" | $SED "$sed_make_literal_regex"`
++  $OBJDUMP -s --section "$1" "$2" 2>/dev/null |
++    $SED '/^Contents of section '"$match_literal"':/{
++      # Place marker at beginning of archive member dllname section
++      s/.*/====MARK====/
++      p
++      d
++    }
++    # These lines can sometimes be longer than 43 characters, but
++    # are always uninteresting
++    /:[	 ]*file format pe[i]\{,1\}-/d
++    /^In archive [^:]*:/d
++    # Ensure marker is printed
++    /^====MARK====/p
++    # Remove all lines with less than 43 characters
++    /^.\{43\}/!d
++    # From remaining lines, remove first 43 characters
++    s/^.\{43\}//' |
++    $SED -n '
++      # Join marker and all lines until next marker into a single line
++      /^====MARK====/ b para
++      H
++      $ b para
++      b
++      :para
++      x
++      s/\n//g
++      # Remove the marker
++      s/^====MARK====//
++      # Remove trailing dots and whitespace
++      s/[\. \t]*$//
++      # Print
++      /./p' |
++    # we now have a list, one entry per line, of the stringified
++    # contents of the appropriate section of all members of the
++    # archive which possess that section. Heuristic: eliminate
++    # all those which have a first or second character that is
++    # a '.' (that is, objdump's representation of an unprintable
++    # character.) This should work for all archives with less than
++    # 0x302f exports -- but will fail for DLLs whose name actually
++    # begins with a literal '.' or a single character followed by
++    # a '.'.
++    #
++    # Of those that remain, print the first one.
++    $SED -e '/^\./d;/^.\./d;q'
++}
++
++# func_cygming_gnu_implib_p ARG
++# This predicate returns with zero status (TRUE) if
++# ARG is a GNU/binutils-style import library. Returns
++# with nonzero status (FALSE) otherwise.
++func_cygming_gnu_implib_p ()
++{
++  $opt_debug
++  func_to_tool_file "$1" func_convert_file_msys_to_w32
++  func_cygming_gnu_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $EGREP ' (_head_[A-Za-z0-9_]+_[ad]l*|[A-Za-z0-9_]+_[ad]l*_iname)$'`
++  test -n "$func_cygming_gnu_implib_tmp"
++}
++
++# func_cygming_ms_implib_p ARG
++# This predicate returns with zero status (TRUE) if
++# ARG is an MS-style import library. Returns
++# with nonzero status (FALSE) otherwise.
++func_cygming_ms_implib_p ()
++{
++  $opt_debug
++  func_to_tool_file "$1" func_convert_file_msys_to_w32
++  func_cygming_ms_implib_tmp=`$NM "$func_to_tool_file_result" | eval "$global_symbol_pipe" | $GREP '_NULL_IMPORT_DESCRIPTOR'`
++  test -n "$func_cygming_ms_implib_tmp"
++}
++
++# func_cygming_dll_for_implib_fallback ARG
++# Platform-specific function to extract the
++# name of the DLL associated with the specified
++# import library ARG.
++#
++# This fallback implementation is for use when $DLLTOOL
++# does not support the --identify-strict option.
++# Invoked by eval'ing the libtool variable
++#    $sharedlib_from_linklib_cmd
++# Result is available in the variable
++#    $sharedlib_from_linklib_result
++func_cygming_dll_for_implib_fallback ()
++{
++  $opt_debug
++  if func_cygming_gnu_implib_p "$1" ; then
++    # binutils import library
++    sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$7' "$1"`
++  elif func_cygming_ms_implib_p "$1" ; then
++    # ms-generated import library
++    sharedlib_from_linklib_result=`func_cygming_dll_for_implib_fallback_core '.idata$6' "$1"`
++  else
++    # unknown
++    sharedlib_from_linklib_result=""
++  fi
++}
+ 
+ 
+ # func_extract_an_archive dir oldlib
+@@ -2745,7 +3719,18 @@ func_extract_an_archive ()
+     $opt_debug
+     f_ex_an_ar_dir="$1"; shift
+     f_ex_an_ar_oldlib="$1"
+-    func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" 'exit $?'
++    if test "$lock_old_archive_extraction" = yes; then
++      lockfile=$f_ex_an_ar_oldlib.lock
++      until $opt_dry_run || ln "$progpath" "$lockfile" 2>/dev/null; do
++	func_echo "Waiting for $lockfile to be removed"
++	sleep 2
++      done
++    fi
++    func_show_eval "(cd \$f_ex_an_ar_dir && $AR x \"\$f_ex_an_ar_oldlib\")" \
++		   'stat=$?; rm -f "$lockfile"; exit $stat'
++    if test "$lock_old_archive_extraction" = yes; then
++      $opt_dry_run || rm -f "$lockfile"
++    fi
+     if ($AR t "$f_ex_an_ar_oldlib" | sort | sort -uc >/dev/null 2>&1); then
+      :
+     else
+@@ -2816,7 +3801,7 @@ func_extract_archives ()
+ 	    darwin_file=
+ 	    darwin_files=
+ 	    for darwin_file in $darwin_filelist; do
+-	      darwin_files=`find unfat-$$ -name $darwin_file -print | $NL2SP`
++	      darwin_files=`find unfat-$$ -name $darwin_file -print | sort | $NL2SP`
+ 	      $LIPO -create -output "$darwin_file" $darwin_files
+ 	    done # $darwin_filelist
+ 	    $RM -rf unfat-$$
+@@ -2831,25 +3816,30 @@ func_extract_archives ()
+         func_extract_an_archive "$my_xdir" "$my_xabs"
+ 	;;
+       esac
+-      my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | $NL2SP`
++      my_oldobjs="$my_oldobjs "`find $my_xdir -name \*.$objext -print -o -name \*.lo -print | sort | $NL2SP`
+     done
+ 
+     func_extract_archives_result="$my_oldobjs"
+ }
+ 
+ 
+-
+-# func_emit_wrapper_part1 [arg=no]
++# func_emit_wrapper [arg=no]
+ #
+-# Emit the first part of a libtool wrapper script on stdout.
+-# For more information, see the description associated with
+-# func_emit_wrapper(), below.
+-func_emit_wrapper_part1 ()
+-{
+-	func_emit_wrapper_part1_arg1=no
+-	if test -n "$1" ; then
+-	  func_emit_wrapper_part1_arg1=$1
+-	fi
++# Emit a libtool wrapper script on stdout.
++# Don't directly open a file because we may want to
++# incorporate the script contents within a cygwin/mingw
++# wrapper executable.  Must ONLY be called from within
++# func_mode_link because it depends on a number of variables
++# set therein.
++#
++# ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR
++# variable will take.  If 'yes', then the emitted script
++# will assume that the directory in which it is stored is
++# the $objdir directory.  This is a cygwin/mingw-specific
++# behavior.
++func_emit_wrapper ()
++{
++	func_emit_wrapper_arg1=${1-no}
+ 
+ 	$ECHO "\
+ #! $SHELL
+@@ -2865,7 +3855,6 @@ func_emit_wrapper_part1 ()
+ 
+ # Sed substitution that helps us do robust quoting.  It backslashifies
+ # metacharacters that are still active within double-quoted strings.
+-Xsed='${SED} -e 1s/^X//'
+ sed_quote_subst='$sed_quote_subst'
+ 
+ # Be Bourne compatible
+@@ -2896,31 +3885,132 @@ if test \"\$libtool_install_magic\" = \"
+ else
+   # When we are sourced in execute mode, \$file and \$ECHO are already set.
+   if test \"\$libtool_execute_magic\" != \"$magic\"; then
+-    ECHO=\"$qecho\"
+-    file=\"\$0\"
+-    # Make sure echo works.
+-    if test \"X\$1\" = X--no-reexec; then
+-      # Discard the --no-reexec flag, and continue.
+-      shift
+-    elif test \"X\`{ \$ECHO '\t'; } 2>/dev/null\`\" = 'X\t'; then
+-      # Yippee, \$ECHO works!
+-      :
+-    else
+-      # Restart under the correct shell, and then maybe \$ECHO will work.
+-      exec $SHELL \"\$0\" --no-reexec \${1+\"\$@\"}
+-    fi
+-  fi\
++    file=\"\$0\""
++
++    qECHO=`$ECHO "$ECHO" | $SED "$sed_quote_subst"`
++    $ECHO "\
++
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++    ECHO=\"$qECHO\"
++  fi
++
++# Very basic option parsing. These options are (a) specific to
++# the libtool wrapper, (b) are identical between the wrapper
++# /script/ and the wrapper /executable/ which is used only on
++# windows platforms, and (c) all begin with the string "--lt-"
++# (application programs are unlikely to have options which match
++# this pattern).
++#
++# There are only two supported options: --lt-debug and
++# --lt-dump-script. There is, deliberately, no --lt-help.
++#
++# The first argument to this parsing function should be the
++# script's $0 value, followed by "$@".
++lt_option_debug=
++func_parse_lt_options ()
++{
++  lt_script_arg0=\$0
++  shift
++  for lt_opt
++  do
++    case \"\$lt_opt\" in
++    --lt-debug) lt_option_debug=1 ;;
++    --lt-dump-script)
++        lt_dump_D=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%/[^/]*$%%'\`
++        test \"X\$lt_dump_D\" = \"X\$lt_script_arg0\" && lt_dump_D=.
++        lt_dump_F=\`\$ECHO \"X\$lt_script_arg0\" | $SED -e 's/^X//' -e 's%^.*/%%'\`
++        cat \"\$lt_dump_D/\$lt_dump_F\"
++        exit 0
++      ;;
++    --lt-*)
++        \$ECHO \"Unrecognized --lt- option: '\$lt_opt'\" 1>&2
++        exit 1
++      ;;
++    esac
++  done
++
++  # Print the debug banner immediately:
++  if test -n \"\$lt_option_debug\"; then
++    echo \"${outputname}:${output}:\${LINENO}: libtool wrapper (GNU $PACKAGE$TIMESTAMP) $VERSION\" 1>&2
++  fi
++}
++
++# Used when --lt-debug. Prints its arguments to stdout
++# (redirection is the responsibility of the caller)
++func_lt_dump_args ()
++{
++  lt_dump_args_N=1;
++  for lt_arg
++  do
++    \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[\$lt_dump_args_N]: \$lt_arg\"
++    lt_dump_args_N=\`expr \$lt_dump_args_N + 1\`
++  done
++}
++
++# Core function for launching the target application
++func_exec_program_core ()
++{
+ "
+-	$ECHO "\
++  case $host in
++  # Backslashes separate directories on plain windows
++  *-*-mingw | *-*-os2* | *-cegcc*)
++    $ECHO "\
++      if test -n \"\$lt_option_debug\"; then
++        \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir\\\\\$program\" 1>&2
++        func_lt_dump_args \${1+\"\$@\"} 1>&2
++      fi
++      exec \"\$progdir\\\\\$program\" \${1+\"\$@\"}
++"
++    ;;
++
++  *)
++    $ECHO "\
++      if test -n \"\$lt_option_debug\"; then
++        \$ECHO \"${outputname}:${output}:\${LINENO}: newargv[0]: \$progdir/\$program\" 1>&2
++        func_lt_dump_args \${1+\"\$@\"} 1>&2
++      fi
++      exec \"\$progdir/\$program\" \${1+\"\$@\"}
++"
++    ;;
++  esac
++  $ECHO "\
++      \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2
++      exit 1
++}
++
++# A function to encapsulate launching the target application
++# Strips options in the --lt-* namespace from \$@ and
++# launches target application with the remaining arguments.
++func_exec_program ()
++{
++  for lt_wr_arg
++  do
++    case \$lt_wr_arg in
++    --lt-*) ;;
++    *) set x \"\$@\" \"\$lt_wr_arg\"; shift;;
++    esac
++    shift
++  done
++  func_exec_program_core \${1+\"\$@\"}
++}
++
++  # Parse options
++  func_parse_lt_options \"\$0\" \${1+\"\$@\"}
+ 
+   # Find the directory that this script lives in.
+-  thisdir=\`\$ECHO \"X\$file\" | \$Xsed -e 's%/[^/]*$%%'\`
++  thisdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*$%%'\`
+   test \"x\$thisdir\" = \"x\$file\" && thisdir=.
+ 
+   # Follow symbolic links until we get to the real thisdir.
+-  file=\`ls -ld \"\$file\" | ${SED} -n 's/.*-> //p'\`
++  file=\`ls -ld \"\$file\" | $SED -n 's/.*-> //p'\`
+   while test -n \"\$file\"; do
+-    destdir=\`\$ECHO \"X\$file\" | \$Xsed -e 's%/[^/]*\$%%'\`
++    destdir=\`\$ECHO \"\$file\" | $SED 's%/[^/]*\$%%'\`
+ 
+     # If there was a directory component, then change thisdir.
+     if test \"x\$destdir\" != \"x\$file\"; then
+@@ -2930,30 +4020,13 @@ else
+       esac
+     fi
+ 
+-    file=\`\$ECHO \"X\$file\" | \$Xsed -e 's%^.*/%%'\`
+-    file=\`ls -ld \"\$thisdir/\$file\" | ${SED} -n 's/.*-> //p'\`
++    file=\`\$ECHO \"\$file\" | $SED 's%^.*/%%'\`
++    file=\`ls -ld \"\$thisdir/\$file\" | $SED -n 's/.*-> //p'\`
+   done
+-"
+-}
+-# end: func_emit_wrapper_part1
+-
+-# func_emit_wrapper_part2 [arg=no]
+-#
+-# Emit the second part of a libtool wrapper script on stdout.
+-# For more information, see the description associated with
+-# func_emit_wrapper(), below.
+-func_emit_wrapper_part2 ()
+-{
+-	func_emit_wrapper_part2_arg1=no
+-	if test -n "$1" ; then
+-	  func_emit_wrapper_part2_arg1=$1
+-	fi
+-
+-	$ECHO "\
+ 
+   # Usually 'no', except on cygwin/mingw when embedded into
+   # the cwrapper.
+-  WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_part2_arg1
++  WRAPPER_SCRIPT_BELONGS_IN_OBJDIR=$func_emit_wrapper_arg1
+   if test \"\$WRAPPER_SCRIPT_BELONGS_IN_OBJDIR\" = \"yes\"; then
+     # special case for '.'
+     if test \"\$thisdir\" = \".\"; then
+@@ -2961,7 +4034,7 @@ func_emit_wrapper_part2 ()
+     fi
+     # remove .libs from thisdir
+     case \"\$thisdir\" in
+-    *[\\\\/]$objdir ) thisdir=\`\$ECHO \"X\$thisdir\" | \$Xsed -e 's%[\\\\/][^\\\\/]*$%%'\` ;;
++    *[\\\\/]$objdir ) thisdir=\`\$ECHO \"\$thisdir\" | $SED 's%[\\\\/][^\\\\/]*$%%'\` ;;
+     $objdir )   thisdir=. ;;
+     esac
+   fi
+@@ -3016,6 +4089,18 @@ func_emit_wrapper_part2 ()
+ 
+   if test -f \"\$progdir/\$program\"; then"
+ 
++	# fixup the dll searchpath if we need to.
++	#
++	# Fix the DLL searchpath if we need to.  Do this before prepending
++	# to shlibpath, because on Windows, both are PATH and uninstalled
++	# libraries must come first.
++	if test -n "$dllsearchpath"; then
++	  $ECHO "\
++    # Add the dll search path components to the executable PATH
++    PATH=$dllsearchpath:\$PATH
++"
++	fi
++
+ 	# Export our shlibpath_var if we have one.
+ 	if test "$shlibpath_overrides_runpath" = yes && test -n "$shlibpath_var" && test -n "$temp_rpath"; then
+ 	  $ECHO "\
+@@ -3024,253 +4109,28 @@ func_emit_wrapper_part2 ()
+ 
+     # Some systems cannot cope with colon-terminated $shlibpath_var
+     # The second colon is a workaround for a bug in BeOS R4 sed
+-    $shlibpath_var=\`\$ECHO \"X\$$shlibpath_var\" | \$Xsed -e 's/::*\$//'\`
++    $shlibpath_var=\`\$ECHO \"\$$shlibpath_var\" | $SED 's/::*\$//'\`
+ 
+     export $shlibpath_var
+ "
+ 	fi
+ 
+-	# fixup the dll searchpath if we need to.
+-	if test -n "$dllsearchpath"; then
+-	  $ECHO "\
+-    # Add the dll search path components to the executable PATH
+-    PATH=$dllsearchpath:\$PATH
+-"
+-	fi
+-
+ 	$ECHO "\
+     if test \"\$libtool_execute_magic\" != \"$magic\"; then
+       # Run the actual program with our arguments.
+-"
+-	case $host in
+-	# Backslashes separate directories on plain windows
+-	*-*-mingw | *-*-os2* | *-cegcc*)
+-	  $ECHO "\
+-      exec \"\$progdir\\\\\$program\" \${1+\"\$@\"}
+-"
+-	  ;;
+-
+-	*)
+-	  $ECHO "\
+-      exec \"\$progdir/\$program\" \${1+\"\$@\"}
+-"
+-	  ;;
+-	esac
+-	$ECHO "\
+-      \$ECHO \"\$0: cannot exec \$program \$*\" 1>&2
+-      exit 1
++      func_exec_program \${1+\"\$@\"}
+     fi
+   else
+     # The program doesn't exist.
+-    \$ECHO \"\$0: error: \\\`\$progdir/\$program' does not exist\" 1>&2
+-    \$ECHO \"This script is just a wrapper for \$program.\" 1>&2
+-    $ECHO \"See the $PACKAGE documentation for more information.\" 1>&2
+-    exit 1
+-  fi
+-fi\
+-"
+-}
+-# end: func_emit_wrapper_part2
+-
+-
+-# func_emit_wrapper [arg=no]
+-#
+-# Emit a libtool wrapper script on stdout.
+-# Don't directly open a file because we may want to
+-# incorporate the script contents within a cygwin/mingw
+-# wrapper executable.  Must ONLY be called from within
+-# func_mode_link because it depends on a number of variables
+-# set therein.
+-#
+-# ARG is the value that the WRAPPER_SCRIPT_BELONGS_IN_OBJDIR
+-# variable will take.  If 'yes', then the emitted script
+-# will assume that the directory in which it is stored is
+-# the $objdir directory.  This is a cygwin/mingw-specific
+-# behavior.
+-func_emit_wrapper ()
+-{
+-	func_emit_wrapper_arg1=no
+-	if test -n "$1" ; then
+-	  func_emit_wrapper_arg1=$1
+-	fi
+-
+-	# split this up so that func_emit_cwrapperexe_src
+-	# can call each part independently.
+-	func_emit_wrapper_part1 "${func_emit_wrapper_arg1}"
+-	func_emit_wrapper_part2 "${func_emit_wrapper_arg1}"
+-}
+-
+-
+-# func_to_host_path arg
+-#
+-# Convert paths to host format when used with build tools.
+-# Intended for use with "native" mingw (where libtool itself
+-# is running under the msys shell), or in the following cross-
+-# build environments:
+-#    $build          $host
+-#    mingw (msys)    mingw  [e.g. native]
+-#    cygwin          mingw
+-#    *nix + wine     mingw
+-# where wine is equipped with the `winepath' executable.
+-# In the native mingw case, the (msys) shell automatically
+-# converts paths for any non-msys applications it launches,
+-# but that facility isn't available from inside the cwrapper.
+-# Similar accommodations are necessary for $host mingw and
+-# $build cygwin.  Calling this function does no harm for other
+-# $host/$build combinations not listed above.
+-#
+-# ARG is the path (on $build) that should be converted to
+-# the proper representation for $host. The result is stored
+-# in $func_to_host_path_result.
+-func_to_host_path ()
+-{
+-  func_to_host_path_result="$1"
+-  if test -n "$1" ; then
+-    case $host in
+-      *mingw* )
+-        lt_sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g'
+-        case $build in
+-          *mingw* ) # actually, msys
+-            # awkward: cmd appends spaces to result
+-            lt_sed_strip_trailing_spaces="s/[ ]*\$//"
+-            func_to_host_path_tmp1=`( cmd //c echo "$1" |\
+-              $SED -e "$lt_sed_strip_trailing_spaces" ) 2>/dev/null || echo ""`
+-            func_to_host_path_result=`echo "$func_to_host_path_tmp1" |\
+-              $SED -e "$lt_sed_naive_backslashify"`
+-            ;;
+-          *cygwin* )
+-            func_to_host_path_tmp1=`cygpath -w "$1"`
+-            func_to_host_path_result=`echo "$func_to_host_path_tmp1" |\
+-              $SED -e "$lt_sed_naive_backslashify"`
+-            ;;
+-          * )
+-            # Unfortunately, winepath does not exit with a non-zero
+-            # error code, so we are forced to check the contents of
+-            # stdout. On the other hand, if the command is not
+-            # found, the shell will set an exit code of 127 and print
+-            # *an error message* to stdout. So we must check for both
+-            # error code of zero AND non-empty stdout, which explains
+-            # the odd construction:
+-            func_to_host_path_tmp1=`winepath -w "$1" 2>/dev/null`
+-            if test "$?" -eq 0 && test -n "${func_to_host_path_tmp1}"; then
+-              func_to_host_path_result=`echo "$func_to_host_path_tmp1" |\
+-                $SED -e "$lt_sed_naive_backslashify"`
+-            else
+-              # Allow warning below.
+-              func_to_host_path_result=""
+-            fi
+-            ;;
+-        esac
+-        if test -z "$func_to_host_path_result" ; then
+-          func_error "Could not determine host path corresponding to"
+-          func_error "  '$1'"
+-          func_error "Continuing, but uninstalled executables may not work."
+-          # Fallback:
+-          func_to_host_path_result="$1"
+-        fi
+-        ;;
+-    esac
+-  fi
+-}
+-# end: func_to_host_path
+-
+-# func_to_host_pathlist arg
+-#
+-# Convert pathlists to host format when used with build tools.
+-# See func_to_host_path(), above. This function supports the
+-# following $build/$host combinations (but does no harm for
+-# combinations not listed here):
+-#    $build          $host
+-#    mingw (msys)    mingw  [e.g. native]
+-#    cygwin          mingw
+-#    *nix + wine     mingw
+-#
+-# Path separators are also converted from $build format to
+-# $host format. If ARG begins or ends with a path separator
+-# character, it is preserved (but converted to $host format)
+-# on output.
+-#
+-# ARG is a pathlist (on $build) that should be converted to
+-# the proper representation on $host. The result is stored
+-# in $func_to_host_pathlist_result.
+-func_to_host_pathlist ()
+-{
+-  func_to_host_pathlist_result="$1"
+-  if test -n "$1" ; then
+-    case $host in
+-      *mingw* )
+-        lt_sed_naive_backslashify='s|\\\\*|\\|g;s|/|\\|g;s|\\|\\\\|g'
+-        # Remove leading and trailing path separator characters from
+-        # ARG. msys behavior is inconsistent here, cygpath turns them
+-        # into '.;' and ';.', and winepath ignores them completely.
+-        func_to_host_pathlist_tmp2="$1"
+-        # Once set for this call, this variable should not be
+-        # reassigned. It is used in tha fallback case.
+-        func_to_host_pathlist_tmp1=`echo "$func_to_host_pathlist_tmp2" |\
+-          $SED -e 's|^:*||' -e 's|:*$||'`
+-        case $build in
+-          *mingw* ) # Actually, msys.
+-            # Awkward: cmd appends spaces to result.
+-            lt_sed_strip_trailing_spaces="s/[ ]*\$//"
+-            func_to_host_pathlist_tmp2=`( cmd //c echo "$func_to_host_pathlist_tmp1" |\
+-              $SED -e "$lt_sed_strip_trailing_spaces" ) 2>/dev/null || echo ""`
+-            func_to_host_pathlist_result=`echo "$func_to_host_pathlist_tmp2" |\
+-              $SED -e "$lt_sed_naive_backslashify"`
+-            ;;
+-          *cygwin* )
+-            func_to_host_pathlist_tmp2=`cygpath -w -p "$func_to_host_pathlist_tmp1"`
+-            func_to_host_pathlist_result=`echo "$func_to_host_pathlist_tmp2" |\
+-              $SED -e "$lt_sed_naive_backslashify"`
+-            ;;
+-          * )
+-            # unfortunately, winepath doesn't convert pathlists
+-            func_to_host_pathlist_result=""
+-            func_to_host_pathlist_oldIFS=$IFS
+-            IFS=:
+-            for func_to_host_pathlist_f in $func_to_host_pathlist_tmp1 ; do
+-              IFS=$func_to_host_pathlist_oldIFS
+-              if test -n "$func_to_host_pathlist_f" ; then
+-                func_to_host_path "$func_to_host_pathlist_f"
+-                if test -n "$func_to_host_path_result" ; then
+-                  if test -z "$func_to_host_pathlist_result" ; then
+-                    func_to_host_pathlist_result="$func_to_host_path_result"
+-                  else
+-                    func_to_host_pathlist_result="$func_to_host_pathlist_result;$func_to_host_path_result"
+-                  fi
+-                fi
+-              fi
+-              IFS=:
+-            done
+-            IFS=$func_to_host_pathlist_oldIFS
+-            ;;
+-        esac
+-        if test -z "$func_to_host_pathlist_result" ; then
+-          func_error "Could not determine the host path(s) corresponding to"
+-          func_error "  '$1'"
+-          func_error "Continuing, but uninstalled executables may not work."
+-          # Fallback. This may break if $1 contains DOS-style drive
+-          # specifications. The fix is not to complicate the expression
+-          # below, but for the user to provide a working wine installation
+-          # with winepath so that path translation in the cross-to-mingw
+-          # case works properly.
+-          lt_replace_pathsep_nix_to_dos="s|:|;|g"
+-          func_to_host_pathlist_result=`echo "$func_to_host_pathlist_tmp1" |\
+-            $SED -e "$lt_replace_pathsep_nix_to_dos"`
+-        fi
+-        # Now, add the leading and trailing path separators back
+-        case "$1" in
+-          :* ) func_to_host_pathlist_result=";$func_to_host_pathlist_result"
+-            ;;
+-        esac
+-        case "$1" in
+-          *: ) func_to_host_pathlist_result="$func_to_host_pathlist_result;"
+-            ;;
+-        esac
+-        ;;
+-    esac
++    \$ECHO \"\$0: error: \\\`\$progdir/\$program' does not exist\" 1>&2
++    \$ECHO \"This script is just a wrapper for \$program.\" 1>&2
++    \$ECHO \"See the $PACKAGE documentation for more information.\" 1>&2
++    exit 1
+   fi
++fi\
++"
+ }
+-# end: func_to_host_pathlist
++
+ 
+ # func_emit_cwrapperexe_src
+ # emit the source code for a wrapper executable on stdout
+@@ -3288,31 +4148,23 @@ func_emit_cwrapperexe_src ()
+ 
+    This wrapper executable should never be moved out of the build directory.
+    If it is, it will not operate correctly.
+-
+-   Currently, it simply execs the wrapper *script* "$SHELL $output",
+-   but could eventually absorb all of the scripts functionality and
+-   exec $objdir/$outputname directly.
+ */
+ EOF
+ 	    cat <<"EOF"
++#ifdef _MSC_VER
++# define _CRT_SECURE_NO_DEPRECATE 1
++#endif
+ #include <stdio.h>
+ #include <stdlib.h>
+ #ifdef _MSC_VER
+ # include <direct.h>
+ # include <process.h>
+ # include <io.h>
+-# define setmode _setmode
+ #else
+ # include <unistd.h>
+ # include <stdint.h>
+ # ifdef __CYGWIN__
+ #  include <io.h>
+-#  define HAVE_SETENV
+-#  ifdef __STRICT_ANSI__
+-char *realpath (const char *, char *);
+-int putenv (char *);
+-int setenv (const char *, const char *, int);
+-#  endif
+ # endif
+ #endif
+ #include <malloc.h>
+@@ -3324,6 +4176,44 @@ int setenv (const char *, const char *,
+ #include <fcntl.h>
+ #include <sys/stat.h>
+ 
++/* declarations of non-ANSI functions */
++#if defined(__MINGW32__)
++# ifdef __STRICT_ANSI__
++int _putenv (const char *);
++# endif
++#elif defined(__CYGWIN__)
++# ifdef __STRICT_ANSI__
++char *realpath (const char *, char *);
++int putenv (char *);
++int setenv (const char *, const char *, int);
++# endif
++/* #elif defined (other platforms) ... */
++#endif
++
++/* portability defines, excluding path handling macros */
++#if defined(_MSC_VER)
++# define setmode _setmode
++# define stat    _stat
++# define chmod   _chmod
++# define getcwd  _getcwd
++# define putenv  _putenv
++# define S_IXUSR _S_IEXEC
++# ifndef _INTPTR_T_DEFINED
++#  define _INTPTR_T_DEFINED
++#  define intptr_t int
++# endif
++#elif defined(__MINGW32__)
++# define setmode _setmode
++# define stat    _stat
++# define chmod   _chmod
++# define getcwd  _getcwd
++# define putenv  _putenv
++#elif defined(__CYGWIN__)
++# define HAVE_SETENV
++# define FOPEN_WB "wb"
++/* #elif defined (other platforms) ... */
++#endif
++
+ #if defined(PATH_MAX)
+ # define LT_PATHMAX PATH_MAX
+ #elif defined(MAXPATHLEN)
+@@ -3339,14 +4229,7 @@ int setenv (const char *, const char *,
+ # define S_IXGRP 0
+ #endif
+ 
+-#ifdef _MSC_VER
+-# define S_IXUSR _S_IEXEC
+-# define stat _stat
+-# ifndef _INTPTR_T_DEFINED
+-#  define intptr_t int
+-# endif
+-#endif
+-
++/* path handling portability macros */
+ #ifndef DIR_SEPARATOR
+ # define DIR_SEPARATOR '/'
+ # define PATH_SEPARATOR ':'
+@@ -3377,10 +4260,6 @@ int setenv (const char *, const char *,
+ # define IS_PATH_SEPARATOR(ch) ((ch) == PATH_SEPARATOR_2)
+ #endif /* PATH_SEPARATOR_2 */
+ 
+-#ifdef __CYGWIN__
+-# define FOPEN_WB "wb"
+-#endif
+-
+ #ifndef FOPEN_WB
+ # define FOPEN_WB "w"
+ #endif
+@@ -3393,22 +4272,13 @@ int setenv (const char *, const char *,
+   if (stale) { free ((void *) stale); stale = 0; } \
+ } while (0)
+ 
+-#undef LTWRAPPER_DEBUGPRINTF
+-#if defined DEBUGWRAPPER
+-# define LTWRAPPER_DEBUGPRINTF(args) ltwrapper_debugprintf args
+-static void
+-ltwrapper_debugprintf (const char *fmt, ...)
+-{
+-    va_list args;
+-    va_start (args, fmt);
+-    (void) vfprintf (stderr, fmt, args);
+-    va_end (args);
+-}
++#if defined(LT_DEBUGWRAPPER)
++static int lt_debug = 1;
+ #else
+-# define LTWRAPPER_DEBUGPRINTF(args)
++static int lt_debug = 0;
+ #endif
+ 
+-const char *program_name = NULL;
++const char *program_name = "libtool-wrapper"; /* in case xstrdup fails */
+ 
+ void *xmalloc (size_t num);
+ char *xstrdup (const char *string);
+@@ -3418,41 +4288,27 @@ char *chase_symlinks (const char *pathsp
+ int make_executable (const char *path);
+ int check_executable (const char *path);
+ char *strendzap (char *str, const char *pat);
+-void lt_fatal (const char *message, ...);
++void lt_debugprintf (const char *file, int line, const char *fmt, ...);
++void lt_fatal (const char *file, int line, const char *message, ...);
++static const char *nonnull (const char *s);
++static const char *nonempty (const char *s);
+ void lt_setenv (const char *name, const char *value);
+ char *lt_extend_str (const char *orig_value, const char *add, int to_end);
+-void lt_opt_process_env_set (const char *arg);
+-void lt_opt_process_env_prepend (const char *arg);
+-void lt_opt_process_env_append (const char *arg);
+-int lt_split_name_value (const char *arg, char** name, char** value);
+ void lt_update_exe_path (const char *name, const char *value);
+ void lt_update_lib_path (const char *name, const char *value);
+-
+-static const char *script_text_part1 =
+-EOF
+-
+-	    func_emit_wrapper_part1 yes |
+-	        $SED -e 's/\([\\"]\)/\\\1/g' \
+-	             -e 's/^/  "/' -e 's/$/\\n"/'
+-	    echo ";"
+-	    cat <<EOF
+-
+-static const char *script_text_part2 =
++char **prepare_spawn (char **argv);
++void lt_dump_script (FILE *f);
+ EOF
+-	    func_emit_wrapper_part2 yes |
+-	        $SED -e 's/\([\\"]\)/\\\1/g' \
+-	             -e 's/^/  "/' -e 's/$/\\n"/'
+-	    echo ";"
+ 
+ 	    cat <<EOF
+-const char * MAGIC_EXE = "$magic_exe";
++volatile const char * MAGIC_EXE = "$magic_exe";
+ const char * LIB_PATH_VARNAME = "$shlibpath_var";
+ EOF
+ 
+ 	    if test "$shlibpath_overrides_runpath" = yes && test -n "$shlibpath_var" && test -n "$temp_rpath"; then
+-              func_to_host_pathlist "$temp_rpath"
++              func_to_host_path "$temp_rpath"
+ 	      cat <<EOF
+-const char * LIB_PATH_VALUE   = "$func_to_host_pathlist_result";
++const char * LIB_PATH_VALUE   = "$func_to_host_path_result";
+ EOF
+ 	    else
+ 	      cat <<"EOF"
+@@ -3461,10 +4317,10 @@ EOF
+ 	    fi
+ 
+ 	    if test -n "$dllsearchpath"; then
+-              func_to_host_pathlist "$dllsearchpath:"
++              func_to_host_path "$dllsearchpath:"
+ 	      cat <<EOF
+ const char * EXE_PATH_VARNAME = "PATH";
+-const char * EXE_PATH_VALUE   = "$func_to_host_pathlist_result";
++const char * EXE_PATH_VALUE   = "$func_to_host_path_result";
+ EOF
+ 	    else
+ 	      cat <<"EOF"
+@@ -3487,24 +4343,10 @@ EOF
+ 	    cat <<"EOF"
+ 
+ #define LTWRAPPER_OPTION_PREFIX         "--lt-"
+-#define LTWRAPPER_OPTION_PREFIX_LENGTH  5
+ 
+-static const size_t opt_prefix_len         = LTWRAPPER_OPTION_PREFIX_LENGTH;
+ static const char *ltwrapper_option_prefix = LTWRAPPER_OPTION_PREFIX;
+-
+ static const char *dumpscript_opt       = LTWRAPPER_OPTION_PREFIX "dump-script";
+-
+-static const size_t env_set_opt_len     = LTWRAPPER_OPTION_PREFIX_LENGTH + 7;
+-static const char *env_set_opt          = LTWRAPPER_OPTION_PREFIX "env-set";
+-  /* argument is putenv-style "foo=bar", value of foo is set to bar */
+-
+-static const size_t env_prepend_opt_len = LTWRAPPER_OPTION_PREFIX_LENGTH + 11;
+-static const char *env_prepend_opt      = LTWRAPPER_OPTION_PREFIX "env-prepend";
+-  /* argument is putenv-style "foo=bar", new value of foo is bar${foo} */
+-
+-static const size_t env_append_opt_len  = LTWRAPPER_OPTION_PREFIX_LENGTH + 10;
+-static const char *env_append_opt       = LTWRAPPER_OPTION_PREFIX "env-append";
+-  /* argument is putenv-style "foo=bar", new value of foo is ${foo}bar */
++static const char *debug_opt            = LTWRAPPER_OPTION_PREFIX "debug";
+ 
+ int
+ main (int argc, char *argv[])
+@@ -3521,10 +4363,13 @@ main (int argc, char *argv[])
+   int i;
+ 
+   program_name = (char *) xstrdup (base_name (argv[0]));
+-  LTWRAPPER_DEBUGPRINTF (("(main) argv[0]      : %s\n", argv[0]));
+-  LTWRAPPER_DEBUGPRINTF (("(main) program_name : %s\n", program_name));
++  newargz = XMALLOC (char *, argc + 1);
+ 
+-  /* very simple arg parsing; don't want to rely on getopt */
++  /* very simple arg parsing; don't want to rely on getopt
++   * also, copy all non cwrapper options to newargz, except
++   * argz[0], which is handled differently
++   */
++  newargc=0;
+   for (i = 1; i < argc; i++)
+     {
+       if (strcmp (argv[i], dumpscript_opt) == 0)
+@@ -3538,25 +4383,57 @@ EOF
+ 	      esac
+ 
+ 	    cat <<"EOF"
+-	  printf ("%s", script_text_part1);
+-	  printf ("%s", script_text_part2);
++	  lt_dump_script (stdout);
+ 	  return 0;
+ 	}
++      if (strcmp (argv[i], debug_opt) == 0)
++	{
++          lt_debug = 1;
++          continue;
++	}
++      if (strcmp (argv[i], ltwrapper_option_prefix) == 0)
++        {
++          /* however, if there is an option in the LTWRAPPER_OPTION_PREFIX
++             namespace, but it is not one of the ones we know about and
++             have already dealt with, above (inluding dump-script), then
++             report an error. Otherwise, targets might begin to believe
++             they are allowed to use options in the LTWRAPPER_OPTION_PREFIX
++             namespace. The first time any user complains about this, we'll
++             need to make LTWRAPPER_OPTION_PREFIX a configure-time option
++             or a configure.ac-settable value.
++           */
++          lt_fatal (__FILE__, __LINE__,
++		    "unrecognized %s option: '%s'",
++                    ltwrapper_option_prefix, argv[i]);
++        }
++      /* otherwise ... */
++      newargz[++newargc] = xstrdup (argv[i]);
+     }
++  newargz[++newargc] = NULL;
++
++EOF
++	    cat <<EOF
++  /* The GNU banner must be the first non-error debug message */
++  lt_debugprintf (__FILE__, __LINE__, "libtool wrapper (GNU $PACKAGE$TIMESTAMP) $VERSION\n");
++EOF
++	    cat <<"EOF"
++  lt_debugprintf (__FILE__, __LINE__, "(main) argv[0]: %s\n", argv[0]);
++  lt_debugprintf (__FILE__, __LINE__, "(main) program_name: %s\n", program_name);
+ 
+-  newargz = XMALLOC (char *, argc + 1);
+   tmp_pathspec = find_executable (argv[0]);
+   if (tmp_pathspec == NULL)
+-    lt_fatal ("Couldn't find %s", argv[0]);
+-  LTWRAPPER_DEBUGPRINTF (("(main) found exe (before symlink chase) at : %s\n",
+-			  tmp_pathspec));
++    lt_fatal (__FILE__, __LINE__, "couldn't find %s", argv[0]);
++  lt_debugprintf (__FILE__, __LINE__,
++                  "(main) found exe (before symlink chase) at: %s\n",
++		  tmp_pathspec);
+ 
+   actual_cwrapper_path = chase_symlinks (tmp_pathspec);
+-  LTWRAPPER_DEBUGPRINTF (("(main) found exe (after symlink chase) at : %s\n",
+-			  actual_cwrapper_path));
++  lt_debugprintf (__FILE__, __LINE__,
++                  "(main) found exe (after symlink chase) at: %s\n",
++		  actual_cwrapper_path);
+   XFREE (tmp_pathspec);
+ 
+-  actual_cwrapper_name = xstrdup( base_name (actual_cwrapper_path));
++  actual_cwrapper_name = xstrdup (base_name (actual_cwrapper_path));
+   strendzap (actual_cwrapper_path, actual_cwrapper_name);
+ 
+   /* wrapper name transforms */
+@@ -3574,8 +4451,9 @@ EOF
+   target_name = tmp_pathspec;
+   tmp_pathspec = 0;
+ 
+-  LTWRAPPER_DEBUGPRINTF (("(main) libtool target name: %s\n",
+-			  target_name));
++  lt_debugprintf (__FILE__, __LINE__,
++		  "(main) libtool target name: %s\n",
++		  target_name);
+ EOF
+ 
+ 	    cat <<EOF
+@@ -3625,80 +4503,19 @@ EOF
+ 
+   lt_setenv ("BIN_SH", "xpg4"); /* for Tru64 */
+   lt_setenv ("DUALCASE", "1");  /* for MSK sh */
+-  lt_update_lib_path (LIB_PATH_VARNAME, LIB_PATH_VALUE);
++  /* Update the DLL searchpath.  EXE_PATH_VALUE ($dllsearchpath) must
++     be prepended before (that is, appear after) LIB_PATH_VALUE ($temp_rpath)
++     because on Windows, both *_VARNAMEs are PATH but uninstalled
++     libraries must come first. */
+   lt_update_exe_path (EXE_PATH_VARNAME, EXE_PATH_VALUE);
++  lt_update_lib_path (LIB_PATH_VARNAME, LIB_PATH_VALUE);
+ 
+-  newargc=0;
+-  for (i = 1; i < argc; i++)
+-    {
+-      if (strncmp (argv[i], env_set_opt, env_set_opt_len) == 0)
+-        {
+-          if (argv[i][env_set_opt_len] == '=')
+-            {
+-              const char *p = argv[i] + env_set_opt_len + 1;
+-              lt_opt_process_env_set (p);
+-            }
+-          else if (argv[i][env_set_opt_len] == '\0' && i + 1 < argc)
+-            {
+-              lt_opt_process_env_set (argv[++i]); /* don't copy */
+-            }
+-          else
+-            lt_fatal ("%s missing required argument", env_set_opt);
+-          continue;
+-        }
+-      if (strncmp (argv[i], env_prepend_opt, env_prepend_opt_len) == 0)
+-        {
+-          if (argv[i][env_prepend_opt_len] == '=')
+-            {
+-              const char *p = argv[i] + env_prepend_opt_len + 1;
+-              lt_opt_process_env_prepend (p);
+-            }
+-          else if (argv[i][env_prepend_opt_len] == '\0' && i + 1 < argc)
+-            {
+-              lt_opt_process_env_prepend (argv[++i]); /* don't copy */
+-            }
+-          else
+-            lt_fatal ("%s missing required argument", env_prepend_opt);
+-          continue;
+-        }
+-      if (strncmp (argv[i], env_append_opt, env_append_opt_len) == 0)
+-        {
+-          if (argv[i][env_append_opt_len] == '=')
+-            {
+-              const char *p = argv[i] + env_append_opt_len + 1;
+-              lt_opt_process_env_append (p);
+-            }
+-          else if (argv[i][env_append_opt_len] == '\0' && i + 1 < argc)
+-            {
+-              lt_opt_process_env_append (argv[++i]); /* don't copy */
+-            }
+-          else
+-            lt_fatal ("%s missing required argument", env_append_opt);
+-          continue;
+-        }
+-      if (strncmp (argv[i], ltwrapper_option_prefix, opt_prefix_len) == 0)
+-        {
+-          /* however, if there is an option in the LTWRAPPER_OPTION_PREFIX
+-             namespace, but it is not one of the ones we know about and
+-             have already dealt with, above (inluding dump-script), then
+-             report an error. Otherwise, targets might begin to believe
+-             they are allowed to use options in the LTWRAPPER_OPTION_PREFIX
+-             namespace. The first time any user complains about this, we'll
+-             need to make LTWRAPPER_OPTION_PREFIX a configure-time option
+-             or a configure.ac-settable value.
+-           */
+-          lt_fatal ("Unrecognized option in %s namespace: '%s'",
+-                    ltwrapper_option_prefix, argv[i]);
+-        }
+-      /* otherwise ... */
+-      newargz[++newargc] = xstrdup (argv[i]);
+-    }
+-  newargz[++newargc] = NULL;
+-
+-  LTWRAPPER_DEBUGPRINTF     (("(main) lt_argv_zero : %s\n", (lt_argv_zero ? lt_argv_zero : "<NULL>")));
++  lt_debugprintf (__FILE__, __LINE__, "(main) lt_argv_zero: %s\n",
++		  nonnull (lt_argv_zero));
+   for (i = 0; i < newargc; i++)
+     {
+-      LTWRAPPER_DEBUGPRINTF (("(main) newargz[%d]   : %s\n", i, (newargz[i] ? newargz[i] : "<NULL>")));
++      lt_debugprintf (__FILE__, __LINE__, "(main) newargz[%d]: %s\n",
++		      i, nonnull (newargz[i]));
+     }
+ 
+ EOF
+@@ -3707,11 +4524,14 @@ EOF
+ 	      mingw*)
+ 		cat <<"EOF"
+   /* execv doesn't actually work on mingw as expected on unix */
++  newargz = prepare_spawn (newargz);
+   rval = _spawnv (_P_WAIT, lt_argv_zero, (const char * const *) newargz);
+   if (rval == -1)
+     {
+       /* failed to start process */
+-      LTWRAPPER_DEBUGPRINTF (("(main) failed to launch target \"%s\": errno = %d\n", lt_argv_zero, errno));
++      lt_debugprintf (__FILE__, __LINE__,
++		      "(main) failed to launch target \"%s\": %s\n",
++		      lt_argv_zero, nonnull (strerror (errno)));
+       return 127;
+     }
+   return rval;
+@@ -3733,7 +4553,7 @@ xmalloc (size_t num)
+ {
+   void *p = (void *) malloc (num);
+   if (!p)
+-    lt_fatal ("Memory exhausted");
++    lt_fatal (__FILE__, __LINE__, "memory exhausted");
+ 
+   return p;
+ }
+@@ -3767,8 +4587,8 @@ check_executable (const char *path)
+ {
+   struct stat st;
+ 
+-  LTWRAPPER_DEBUGPRINTF (("(check_executable)  : %s\n",
+-			  path ? (*path ? path : "EMPTY!") : "NULL!"));
++  lt_debugprintf (__FILE__, __LINE__, "(check_executable): %s\n",
++                  nonempty (path));
+   if ((!path) || (!*path))
+     return 0;
+ 
+@@ -3785,8 +4605,8 @@ make_executable (const char *path)
+   int rval = 0;
+   struct stat st;
+ 
+-  LTWRAPPER_DEBUGPRINTF (("(make_executable)   : %s\n",
+-			  path ? (*path ? path : "EMPTY!") : "NULL!"));
++  lt_debugprintf (__FILE__, __LINE__, "(make_executable): %s\n",
++                  nonempty (path));
+   if ((!path) || (!*path))
+     return 0;
+ 
+@@ -3812,8 +4632,8 @@ find_executable (const char *wrapper)
+   int tmp_len;
+   char *concat_name;
+ 
+-  LTWRAPPER_DEBUGPRINTF (("(find_executable)   : %s\n",
+-			  wrapper ? (*wrapper ? wrapper : "EMPTY!") : "NULL!"));
++  lt_debugprintf (__FILE__, __LINE__, "(find_executable): %s\n",
++                  nonempty (wrapper));
+ 
+   if ((wrapper == NULL) || (*wrapper == '\0'))
+     return NULL;
+@@ -3866,7 +4686,8 @@ find_executable (const char *wrapper)
+ 		{
+ 		  /* empty path: current directory */
+ 		  if (getcwd (tmp, LT_PATHMAX) == NULL)
+-		    lt_fatal ("getcwd failed");
++		    lt_fatal (__FILE__, __LINE__, "getcwd failed: %s",
++                              nonnull (strerror (errno)));
+ 		  tmp_len = strlen (tmp);
+ 		  concat_name =
+ 		    XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1);
+@@ -3891,7 +4712,8 @@ find_executable (const char *wrapper)
+     }
+   /* Relative path | not found in path: prepend cwd */
+   if (getcwd (tmp, LT_PATHMAX) == NULL)
+-    lt_fatal ("getcwd failed");
++    lt_fatal (__FILE__, __LINE__, "getcwd failed: %s",
++              nonnull (strerror (errno)));
+   tmp_len = strlen (tmp);
+   concat_name = XMALLOC (char, tmp_len + 1 + strlen (wrapper) + 1);
+   memcpy (concat_name, tmp, tmp_len);
+@@ -3917,8 +4739,9 @@ chase_symlinks (const char *pathspec)
+   int has_symlinks = 0;
+   while (strlen (tmp_pathspec) && !has_symlinks)
+     {
+-      LTWRAPPER_DEBUGPRINTF (("checking path component for symlinks: %s\n",
+-			      tmp_pathspec));
++      lt_debugprintf (__FILE__, __LINE__,
++		      "checking path component for symlinks: %s\n",
++		      tmp_pathspec);
+       if (lstat (tmp_pathspec, &s) == 0)
+ 	{
+ 	  if (S_ISLNK (s.st_mode) != 0)
+@@ -3940,8 +4763,9 @@ chase_symlinks (const char *pathspec)
+ 	}
+       else
+ 	{
+-	  char *errstr = strerror (errno);
+-	  lt_fatal ("Error accessing file %s (%s)", tmp_pathspec, errstr);
++	  lt_fatal (__FILE__, __LINE__,
++		    "error accessing file \"%s\": %s",
++		    tmp_pathspec, nonnull (strerror (errno)));
+ 	}
+     }
+   XFREE (tmp_pathspec);
+@@ -3954,7 +4778,8 @@ chase_symlinks (const char *pathspec)
+   tmp_pathspec = realpath (pathspec, buf);
+   if (tmp_pathspec == 0)
+     {
+-      lt_fatal ("Could not follow symlinks for %s", pathspec);
++      lt_fatal (__FILE__, __LINE__,
++		"could not follow symlinks for %s", pathspec);
+     }
+   return xstrdup (tmp_pathspec);
+ #endif
+@@ -3980,11 +4805,25 @@ strendzap (char *str, const char *pat)
+   return str;
+ }
+ 
++void
++lt_debugprintf (const char *file, int line, const char *fmt, ...)
++{
++  va_list args;
++  if (lt_debug)
++    {
++      (void) fprintf (stderr, "%s:%s:%d: ", program_name, file, line);
++      va_start (args, fmt);
++      (void) vfprintf (stderr, fmt, args);
++      va_end (args);
++    }
++}
++
+ static void
+-lt_error_core (int exit_status, const char *mode,
++lt_error_core (int exit_status, const char *file,
++	       int line, const char *mode,
+ 	       const char *message, va_list ap)
+ {
+-  fprintf (stderr, "%s: %s: ", program_name, mode);
++  fprintf (stderr, "%s:%s:%d: %s: ", program_name, file, line, mode);
+   vfprintf (stderr, message, ap);
+   fprintf (stderr, ".\n");
+ 
+@@ -3993,20 +4832,32 @@ lt_error_core (int exit_status, const ch
+ }
+ 
+ void
+-lt_fatal (const char *message, ...)
++lt_fatal (const char *file, int line, const char *message, ...)
+ {
+   va_list ap;
+   va_start (ap, message);
+-  lt_error_core (EXIT_FAILURE, "FATAL", message, ap);
++  lt_error_core (EXIT_FAILURE, file, line, "FATAL", message, ap);
+   va_end (ap);
+ }
+ 
++static const char *
++nonnull (const char *s)
++{
++  return s ? s : "(null)";
++}
++
++static const char *
++nonempty (const char *s)
++{
++  return (s && !*s) ? "(empty)" : nonnull (s);
++}
++
+ void
+ lt_setenv (const char *name, const char *value)
+ {
+-  LTWRAPPER_DEBUGPRINTF (("(lt_setenv) setting '%s' to '%s'\n",
+-                          (name ? name : "<NULL>"),
+-                          (value ? value : "<NULL>")));
++  lt_debugprintf (__FILE__, __LINE__,
++		  "(lt_setenv) setting '%s' to '%s'\n",
++                  nonnull (name), nonnull (value));
+   {
+ #ifdef HAVE_SETENV
+     /* always make a copy, for consistency with !HAVE_SETENV */
+@@ -4051,95 +4902,12 @@ lt_extend_str (const char *orig_value, c
+   return new_value;
+ }
+ 
+-int
+-lt_split_name_value (const char *arg, char** name, char** value)
+-{
+-  const char *p;
+-  int len;
+-  if (!arg || !*arg)
+-    return 1;
+-
+-  p = strchr (arg, (int)'=');
+-
+-  if (!p)
+-    return 1;
+-
+-  *value = xstrdup (++p);
+-
+-  len = strlen (arg) - strlen (*value);
+-  *name = XMALLOC (char, len);
+-  strncpy (*name, arg, len-1);
+-  (*name)[len - 1] = '\0';
+-
+-  return 0;
+-}
+-
+-void
+-lt_opt_process_env_set (const char *arg)
+-{
+-  char *name = NULL;
+-  char *value = NULL;
+-
+-  if (lt_split_name_value (arg, &name, &value) != 0)
+-    {
+-      XFREE (name);
+-      XFREE (value);
+-      lt_fatal ("bad argument for %s: '%s'", env_set_opt, arg);
+-    }
+-
+-  lt_setenv (name, value);
+-  XFREE (name);
+-  XFREE (value);
+-}
+-
+-void
+-lt_opt_process_env_prepend (const char *arg)
+-{
+-  char *name = NULL;
+-  char *value = NULL;
+-  char *new_value = NULL;
+-
+-  if (lt_split_name_value (arg, &name, &value) != 0)
+-    {
+-      XFREE (name);
+-      XFREE (value);
+-      lt_fatal ("bad argument for %s: '%s'", env_prepend_opt, arg);
+-    }
+-
+-  new_value = lt_extend_str (getenv (name), value, 0);
+-  lt_setenv (name, new_value);
+-  XFREE (new_value);
+-  XFREE (name);
+-  XFREE (value);
+-}
+-
+-void
+-lt_opt_process_env_append (const char *arg)
+-{
+-  char *name = NULL;
+-  char *value = NULL;
+-  char *new_value = NULL;
+-
+-  if (lt_split_name_value (arg, &name, &value) != 0)
+-    {
+-      XFREE (name);
+-      XFREE (value);
+-      lt_fatal ("bad argument for %s: '%s'", env_append_opt, arg);
+-    }
+-
+-  new_value = lt_extend_str (getenv (name), value, 1);
+-  lt_setenv (name, new_value);
+-  XFREE (new_value);
+-  XFREE (name);
+-  XFREE (value);
+-}
+-
+ void
+ lt_update_exe_path (const char *name, const char *value)
+ {
+-  LTWRAPPER_DEBUGPRINTF (("(lt_update_exe_path) modifying '%s' by prepending '%s'\n",
+-                          (name ? name : "<NULL>"),
+-                          (value ? value : "<NULL>")));
++  lt_debugprintf (__FILE__, __LINE__,
++		  "(lt_update_exe_path) modifying '%s' by prepending '%s'\n",
++                  nonnull (name), nonnull (value));
+ 
+   if (name && *name && value && *value)
+     {
+@@ -4158,9 +4926,9 @@ lt_update_exe_path (const char *name, co
+ void
+ lt_update_lib_path (const char *name, const char *value)
+ {
+-  LTWRAPPER_DEBUGPRINTF (("(lt_update_lib_path) modifying '%s' by prepending '%s'\n",
+-                          (name ? name : "<NULL>"),
+-                          (value ? value : "<NULL>")));
++  lt_debugprintf (__FILE__, __LINE__,
++		  "(lt_update_lib_path) modifying '%s' by prepending '%s'\n",
++                  nonnull (name), nonnull (value));
+ 
+   if (name && *name && value && *value)
+     {
+@@ -4170,11 +4938,152 @@ lt_update_lib_path (const char *name, co
+     }
+ }
+ 
++EOF
++	    case $host_os in
++	      mingw*)
++		cat <<"EOF"
++
++/* Prepares an argument vector before calling spawn().
++   Note that spawn() does not by itself call the command interpreter
++     (getenv ("COMSPEC") != NULL ? getenv ("COMSPEC") :
++      ({ OSVERSIONINFO v; v.dwOSVersionInfoSize = sizeof(OSVERSIONINFO);
++         GetVersionEx(&v);
++         v.dwPlatformId == VER_PLATFORM_WIN32_NT;
++      }) ? "cmd.exe" : "command.com").
++   Instead it simply concatenates the arguments, separated by ' ', and calls
++   CreateProcess().  We must quote the arguments since Win32 CreateProcess()
++   interprets characters like ' ', '\t', '\\', '"' (but not '<' and '>') in a
++   special way:
++   - Space and tab are interpreted as delimiters. They are not treated as
++     delimiters if they are surrounded by double quotes: "...".
++   - Unescaped double quotes are removed from the input. Their only effect is
++     that within double quotes, space and tab are treated like normal
++     characters.
++   - Backslashes not followed by double quotes are not special.
++   - But 2*n+1 backslashes followed by a double quote become
++     n backslashes followed by a double quote (n >= 0):
++       \" -> "
++       \\\" -> \"
++       \\\\\" -> \\"
++ */
++#define SHELL_SPECIAL_CHARS "\"\\ \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037"
++#define SHELL_SPACE_CHARS " \001\002\003\004\005\006\007\010\011\012\013\014\015\016\017\020\021\022\023\024\025\026\027\030\031\032\033\034\035\036\037"
++char **
++prepare_spawn (char **argv)
++{
++  size_t argc;
++  char **new_argv;
++  size_t i;
++
++  /* Count number of arguments.  */
++  for (argc = 0; argv[argc] != NULL; argc++)
++    ;
++
++  /* Allocate new argument vector.  */
++  new_argv = XMALLOC (char *, argc + 1);
++
++  /* Put quoted arguments into the new argument vector.  */
++  for (i = 0; i < argc; i++)
++    {
++      const char *string = argv[i];
++
++      if (string[0] == '\0')
++	new_argv[i] = xstrdup ("\"\"");
++      else if (strpbrk (string, SHELL_SPECIAL_CHARS) != NULL)
++	{
++	  int quote_around = (strpbrk (string, SHELL_SPACE_CHARS) != NULL);
++	  size_t length;
++	  unsigned int backslashes;
++	  const char *s;
++	  char *quoted_string;
++	  char *p;
++
++	  length = 0;
++	  backslashes = 0;
++	  if (quote_around)
++	    length++;
++	  for (s = string; *s != '\0'; s++)
++	    {
++	      char c = *s;
++	      if (c == '"')
++		length += backslashes + 1;
++	      length++;
++	      if (c == '\\')
++		backslashes++;
++	      else
++		backslashes = 0;
++	    }
++	  if (quote_around)
++	    length += backslashes + 1;
++
++	  quoted_string = XMALLOC (char, length + 1);
++
++	  p = quoted_string;
++	  backslashes = 0;
++	  if (quote_around)
++	    *p++ = '"';
++	  for (s = string; *s != '\0'; s++)
++	    {
++	      char c = *s;
++	      if (c == '"')
++		{
++		  unsigned int j;
++		  for (j = backslashes + 1; j > 0; j--)
++		    *p++ = '\\';
++		}
++	      *p++ = c;
++	      if (c == '\\')
++		backslashes++;
++	      else
++		backslashes = 0;
++	    }
++	  if (quote_around)
++	    {
++	      unsigned int j;
++	      for (j = backslashes; j > 0; j--)
++		*p++ = '\\';
++	      *p++ = '"';
++	    }
++	  *p = '\0';
++
++	  new_argv[i] = quoted_string;
++	}
++      else
++	new_argv[i] = (char *) string;
++    }
++  new_argv[argc] = NULL;
++
++  return new_argv;
++}
++EOF
++		;;
++	    esac
++
++            cat <<"EOF"
++void lt_dump_script (FILE* f)
++{
++EOF
++	    func_emit_wrapper yes |
++              $SED -e 's/\([\\"]\)/\\\1/g' \
++	           -e 's/^/  fputs ("/' -e 's/$/\\n", f);/'
+ 
++            cat <<"EOF"
++}
+ EOF
+ }
+ # end: func_emit_cwrapperexe_src
+ 
++# func_win32_import_lib_p ARG
++# True if ARG is an import lib, as indicated by $file_magic_cmd
++func_win32_import_lib_p ()
++{
++    $opt_debug
++    case `eval $file_magic_cmd \"\$1\" 2>/dev/null | $SED -e 10q` in
++    *import*) : ;;
++    *) false ;;
++    esac
++}
++
+ # func_mode_link arg...
+ func_mode_link ()
+ {
+@@ -4348,9 +5257,9 @@ func_mode_link ()
+ 	    ;;
+ 	  *)
+ 	    if test "$prev" = dlfiles; then
+-	      dlfiles="$dlfiles $arg"
++	      func_append dlfiles " $arg"
+ 	    else
+-	      dlprefiles="$dlprefiles $arg"
++	      func_append dlprefiles " $arg"
+ 	    fi
+ 	    prev=
+ 	    continue
+@@ -4374,7 +5283,7 @@ func_mode_link ()
+ 	    *-*-darwin*)
+ 	      case "$deplibs " in
+ 		*" $qarg.ltframework "*) ;;
+-		*) deplibs="$deplibs $qarg.ltframework" # this is fixed later
++		*) func_append deplibs " $qarg.ltframework" # this is fixed later
+ 		   ;;
+ 	      esac
+ 	      ;;
+@@ -4393,7 +5302,7 @@ func_mode_link ()
+ 	    moreargs=
+ 	    for fil in `cat "$save_arg"`
+ 	    do
+-#	      moreargs="$moreargs $fil"
++#	      func_append moreargs " $fil"
+ 	      arg=$fil
+ 	      # A libtool-controlled object.
+ 
+@@ -4422,7 +5331,7 @@ func_mode_link ()
+ 
+ 		  if test "$prev" = dlfiles; then
+ 		    if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then
+-		      dlfiles="$dlfiles $pic_object"
++		      func_append dlfiles " $pic_object"
+ 		      prev=
+ 		      continue
+ 		    else
+@@ -4434,7 +5343,7 @@ func_mode_link ()
+ 		  # CHECK ME:  I think I busted this.  -Ossama
+ 		  if test "$prev" = dlprefiles; then
+ 		    # Preload the old-style object.
+-		    dlprefiles="$dlprefiles $pic_object"
++		    func_append dlprefiles " $pic_object"
+ 		    prev=
+ 		  fi
+ 
+@@ -4504,12 +5413,12 @@ func_mode_link ()
+ 	  if test "$prev" = rpath; then
+ 	    case "$rpath " in
+ 	    *" $arg "*) ;;
+-	    *) rpath="$rpath $arg" ;;
++	    *) func_append rpath " $arg" ;;
+ 	    esac
+ 	  else
+ 	    case "$xrpath " in
+ 	    *" $arg "*) ;;
+-	    *) xrpath="$xrpath $arg" ;;
++	    *) func_append xrpath " $arg" ;;
+ 	    esac
+ 	  fi
+ 	  prev=
+@@ -4521,28 +5430,28 @@ func_mode_link ()
+ 	  continue
+ 	  ;;
+ 	weak)
+-	  weak_libs="$weak_libs $arg"
++	  func_append weak_libs " $arg"
+ 	  prev=
+ 	  continue
+ 	  ;;
+ 	xcclinker)
+-	  linker_flags="$linker_flags $qarg"
+-	  compiler_flags="$compiler_flags $qarg"
++	  func_append linker_flags " $qarg"
++	  func_append compiler_flags " $qarg"
+ 	  prev=
+ 	  func_append compile_command " $qarg"
+ 	  func_append finalize_command " $qarg"
+ 	  continue
+ 	  ;;
+ 	xcompiler)
+-	  compiler_flags="$compiler_flags $qarg"
++	  func_append compiler_flags " $qarg"
+ 	  prev=
+ 	  func_append compile_command " $qarg"
+ 	  func_append finalize_command " $qarg"
+ 	  continue
+ 	  ;;
+ 	xlinker)
+-	  linker_flags="$linker_flags $qarg"
+-	  compiler_flags="$compiler_flags $wl$qarg"
++	  func_append linker_flags " $qarg"
++	  func_append compiler_flags " $wl$qarg"
+ 	  prev=
+ 	  func_append compile_command " $wl$qarg"
+ 	  func_append finalize_command " $wl$qarg"
+@@ -4633,15 +5542,16 @@ func_mode_link ()
+ 	;;
+ 
+       -L*)
+-	func_stripname '-L' '' "$arg"
+-	dir=$func_stripname_result
+-	if test -z "$dir"; then
++	func_stripname "-L" '' "$arg"
++	if test -z "$func_stripname_result"; then
+ 	  if test "$#" -gt 0; then
+ 	    func_fatal_error "require no space between \`-L' and \`$1'"
+ 	  else
+ 	    func_fatal_error "need path for \`-L' option"
+ 	  fi
+ 	fi
++	func_resolve_sysroot "$func_stripname_result"
++	dir=$func_resolve_sysroot_result
+ 	# We need an absolute path.
+ 	case $dir in
+ 	[\\/]* | [A-Za-z]:[\\/]*) ;;
+@@ -4653,24 +5563,30 @@ func_mode_link ()
+ 	  ;;
+ 	esac
+ 	case "$deplibs " in
+-	*" -L$dir "*) ;;
++	*" -L$dir "* | *" $arg "*)
++	  # Will only happen for absolute or sysroot arguments
++	  ;;
+ 	*)
+-	  deplibs="$deplibs -L$dir"
+-	  lib_search_path="$lib_search_path $dir"
++	  # Preserve sysroot, but never include relative directories
++	  case $dir in
++	    [\\/]* | [A-Za-z]:[\\/]* | =*) func_append deplibs " $arg" ;;
++	    *) func_append deplibs " -L$dir" ;;
++	  esac
++	  func_append lib_search_path " $dir"
+ 	  ;;
+ 	esac
+ 	case $host in
+ 	*-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-cegcc*)
+-	  testbindir=`$ECHO "X$dir" | $Xsed -e 's*/lib$*/bin*'`
++	  testbindir=`$ECHO "$dir" | $SED 's*/lib$*/bin*'`
+ 	  case :$dllsearchpath: in
+ 	  *":$dir:"*) ;;
+ 	  ::) dllsearchpath=$dir;;
+-	  *) dllsearchpath="$dllsearchpath:$dir";;
++	  *) func_append dllsearchpath ":$dir";;
+ 	  esac
+ 	  case :$dllsearchpath: in
+ 	  *":$testbindir:"*) ;;
+ 	  ::) dllsearchpath=$testbindir;;
+-	  *) dllsearchpath="$dllsearchpath:$testbindir";;
++	  *) func_append dllsearchpath ":$testbindir";;
+ 	  esac
+ 	  ;;
+ 	esac
+@@ -4680,7 +5596,7 @@ func_mode_link ()
+       -l*)
+ 	if test "X$arg" = "X-lc" || test "X$arg" = "X-lm"; then
+ 	  case $host in
+-	  *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-beos* | *-cegcc*)
++	  *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-beos* | *-cegcc* | *-*-haiku*)
+ 	    # These systems don't actually have a C or math library (as such)
+ 	    continue
+ 	    ;;
+@@ -4694,7 +5610,7 @@ func_mode_link ()
+ 	    ;;
+ 	  *-*-rhapsody* | *-*-darwin1.[012])
+ 	    # Rhapsody C and math libraries are in the System framework
+-	    deplibs="$deplibs System.ltframework"
++	    func_append deplibs " System.ltframework"
+ 	    continue
+ 	    ;;
+ 	  *-*-sco3.2v5* | *-*-sco5v6*)
+@@ -4714,7 +5630,7 @@ func_mode_link ()
+ 	   ;;
+ 	 esac
+ 	fi
+-	deplibs="$deplibs $arg"
++	func_append deplibs " $arg"
+ 	continue
+ 	;;
+ 
+@@ -4726,8 +5642,8 @@ func_mode_link ()
+       # Tru64 UNIX uses -model [arg] to determine the layout of C++
+       # classes, name mangling, and exception handling.
+       # Darwin uses the -arch flag to determine output architecture.
+-      -model|-arch|-isysroot)
+-	compiler_flags="$compiler_flags $arg"
++      -model|-arch|-isysroot|--sysroot)
++	func_append compiler_flags " $arg"
+ 	func_append compile_command " $arg"
+ 	func_append finalize_command " $arg"
+ 	prev=xcompiler
+@@ -4735,12 +5651,12 @@ func_mode_link ()
+ 	;;
+ 
+       -mt|-mthreads|-kthread|-Kthread|-pthread|-pthreads|--thread-safe|-threads)
+-	compiler_flags="$compiler_flags $arg"
++	func_append compiler_flags " $arg"
+ 	func_append compile_command " $arg"
+ 	func_append finalize_command " $arg"
+ 	case "$new_inherited_linker_flags " in
+ 	    *" $arg "*) ;;
+-	    * ) new_inherited_linker_flags="$new_inherited_linker_flags $arg" ;;
++	    * ) func_append new_inherited_linker_flags " $arg" ;;
+ 	esac
+ 	continue
+ 	;;
+@@ -4807,13 +5723,17 @@ func_mode_link ()
+ 	# We need an absolute path.
+ 	case $dir in
+ 	[\\/]* | [A-Za-z]:[\\/]*) ;;
++	=*)
++	  func_stripname '=' '' "$dir"
++	  dir=$lt_sysroot$func_stripname_result
++	  ;;
+ 	*)
+ 	  func_fatal_error "only absolute run-paths are allowed"
+ 	  ;;
+ 	esac
+ 	case "$xrpath " in
+ 	*" $dir "*) ;;
+-	*) xrpath="$xrpath $dir" ;;
++	*) func_append xrpath " $dir" ;;
+ 	esac
+ 	continue
+ 	;;
+@@ -4866,8 +5786,8 @@ func_mode_link ()
+ 	for flag in $args; do
+ 	  IFS="$save_ifs"
+           func_quote_for_eval "$flag"
+-	  arg="$arg $wl$func_quote_for_eval_result"
+-	  compiler_flags="$compiler_flags $func_quote_for_eval_result"
++	  func_append arg " $func_quote_for_eval_result"
++	  func_append compiler_flags " $func_quote_for_eval_result"
+ 	done
+ 	IFS="$save_ifs"
+ 	func_stripname ' ' '' "$arg"
+@@ -4882,9 +5802,9 @@ func_mode_link ()
+ 	for flag in $args; do
+ 	  IFS="$save_ifs"
+           func_quote_for_eval "$flag"
+-	  arg="$arg $wl$func_quote_for_eval_result"
+-	  compiler_flags="$compiler_flags $wl$func_quote_for_eval_result"
+-	  linker_flags="$linker_flags $func_quote_for_eval_result"
++	  func_append arg " $wl$func_quote_for_eval_result"
++	  func_append compiler_flags " $wl$func_quote_for_eval_result"
++	  func_append linker_flags " $func_quote_for_eval_result"
+ 	done
+ 	IFS="$save_ifs"
+ 	func_stripname ' ' '' "$arg"
+@@ -4912,23 +5832,27 @@ func_mode_link ()
+ 	arg="$func_quote_for_eval_result"
+ 	;;
+ 
+-      # -64, -mips[0-9] enable 64-bit mode on the SGI compiler
+-      # -r[0-9][0-9]* specifies the processor on the SGI compiler
+-      # -xarch=*, -xtarget=* enable 64-bit mode on the Sun compiler
+-      # +DA*, +DD* enable 64-bit mode on the HP compiler
+-      # -q* pass through compiler args for the IBM compiler
+-      # -m*, -t[45]*, -txscale* pass through architecture-specific
+-      # compiler args for GCC
+-      # -F/path gives path to uninstalled frameworks, gcc on darwin
+-      # -p, -pg, --coverage, -fprofile-* pass through profiling flag for GCC
+-      # @file GCC response files
++      # Flags to be passed through unchanged, with rationale:
++      # -64, -mips[0-9]      enable 64-bit mode for the SGI compiler
++      # -r[0-9][0-9]*        specify processor for the SGI compiler
++      # -xarch=*, -xtarget=* enable 64-bit mode for the Sun compiler
++      # +DA*, +DD*           enable 64-bit mode for the HP compiler
++      # -q*                  compiler args for the IBM compiler
++      # -m*, -t[45]*, -txscale* architecture-specific flags for GCC
++      # -F/path              path to uninstalled frameworks, gcc on darwin
++      # -p, -pg, --coverage, -fprofile-*  profiling flags for GCC
++      # @file                GCC response files
++      # -tp=*                Portland pgcc target processor selection
++      # --sysroot=*          for sysroot support
++      # -O*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization
+       -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \
+-      -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*)
++      -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \
++      -O*|-flto*|-fwhopr*|-fuse-linker-plugin)
+         func_quote_for_eval "$arg"
+ 	arg="$func_quote_for_eval_result"
+         func_append compile_command " $arg"
+         func_append finalize_command " $arg"
+-        compiler_flags="$compiler_flags $arg"
++        func_append compiler_flags " $arg"
+         continue
+         ;;
+ 
+@@ -4940,7 +5864,7 @@ func_mode_link ()
+ 
+       *.$objext)
+ 	# A standard object.
+-	objs="$objs $arg"
++	func_append objs " $arg"
+ 	;;
+ 
+       *.lo)
+@@ -4971,7 +5895,7 @@ func_mode_link ()
+ 
+ 	    if test "$prev" = dlfiles; then
+ 	      if test "$build_libtool_libs" = yes && test "$dlopen_support" = yes; then
+-		dlfiles="$dlfiles $pic_object"
++		func_append dlfiles " $pic_object"
+ 		prev=
+ 		continue
+ 	      else
+@@ -4983,7 +5907,7 @@ func_mode_link ()
+ 	    # CHECK ME:  I think I busted this.  -Ossama
+ 	    if test "$prev" = dlprefiles; then
+ 	      # Preload the old-style object.
+-	      dlprefiles="$dlprefiles $pic_object"
++	      func_append dlprefiles " $pic_object"
+ 	      prev=
+ 	    fi
+ 
+@@ -5028,24 +5952,25 @@ func_mode_link ()
+ 
+       *.$libext)
+ 	# An archive.
+-	deplibs="$deplibs $arg"
+-	old_deplibs="$old_deplibs $arg"
++	func_append deplibs " $arg"
++	func_append old_deplibs " $arg"
+ 	continue
+ 	;;
+ 
+       *.la)
+ 	# A libtool-controlled library.
+ 
++	func_resolve_sysroot "$arg"
+ 	if test "$prev" = dlfiles; then
+ 	  # This library was specified with -dlopen.
+-	  dlfiles="$dlfiles $arg"
++	  func_append dlfiles " $func_resolve_sysroot_result"
+ 	  prev=
+ 	elif test "$prev" = dlprefiles; then
+ 	  # The library was specified with -dlpreopen.
+-	  dlprefiles="$dlprefiles $arg"
++	  func_append dlprefiles " $func_resolve_sysroot_result"
+ 	  prev=
+ 	else
+-	  deplibs="$deplibs $arg"
++	  func_append deplibs " $func_resolve_sysroot_result"
+ 	fi
+ 	continue
+ 	;;
+@@ -5083,7 +6008,7 @@ func_mode_link ()
+ 
+     if test -n "$shlibpath_var"; then
+       # get the directories listed in $shlibpath_var
+-      eval shlib_search_path=\`\$ECHO \"X\${$shlibpath_var}\" \| \$Xsed -e \'s/:/ /g\'\`
++      eval shlib_search_path=\`\$ECHO \"\${$shlibpath_var}\" \| \$SED \'s/:/ /g\'\`
+     else
+       shlib_search_path=
+     fi
+@@ -5092,6 +6017,8 @@ func_mode_link ()
+ 
+     func_dirname "$output" "/" ""
+     output_objdir="$func_dirname_result$objdir"
++    func_to_tool_file "$output_objdir/"
++    tool_output_objdir=$func_to_tool_file_result
+     # Create the object directory.
+     func_mkdir_p "$output_objdir"
+ 
+@@ -5112,12 +6039,12 @@ func_mode_link ()
+     # Find all interdependent deplibs by searching for libraries
+     # that are linked more than once (e.g. -la -lb -la)
+     for deplib in $deplibs; do
+-      if $opt_duplicate_deps ; then
++      if $opt_preserve_dup_deps ; then
+ 	case "$libs " in
+-	*" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;;
++	*" $deplib "*) func_append specialdeplibs " $deplib" ;;
+ 	esac
+       fi
+-      libs="$libs $deplib"
++      func_append libs " $deplib"
+     done
+ 
+     if test "$linkmode" = lib; then
+@@ -5130,9 +6057,9 @@ func_mode_link ()
+       if $opt_duplicate_compiler_generated_deps; then
+ 	for pre_post_dep in $predeps $postdeps; do
+ 	  case "$pre_post_deps " in
+-	  *" $pre_post_dep "*) specialdeplibs="$specialdeplibs $pre_post_deps" ;;
++	  *" $pre_post_dep "*) func_append specialdeplibs " $pre_post_deps" ;;
+ 	  esac
+-	  pre_post_deps="$pre_post_deps $pre_post_dep"
++	  func_append pre_post_deps " $pre_post_dep"
+ 	done
+       fi
+       pre_post_deps=
+@@ -5199,17 +6126,19 @@ func_mode_link ()
+ 	for lib in $dlprefiles; do
+ 	  # Ignore non-libtool-libs
+ 	  dependency_libs=
++	  func_resolve_sysroot "$lib"
+ 	  case $lib in
+-	  *.la)	func_source "$lib" ;;
++	  *.la)	func_source "$func_resolve_sysroot_result" ;;
+ 	  esac
+ 
+ 	  # Collect preopened libtool deplibs, except any this library
+ 	  # has declared as weak libs
+ 	  for deplib in $dependency_libs; do
+-            deplib_base=`$ECHO "X$deplib" | $Xsed -e "$basename"`
++	    func_basename "$deplib"
++            deplib_base=$func_basename_result
+ 	    case " $weak_libs " in
+ 	    *" $deplib_base "*) ;;
+-	    *) deplibs="$deplibs $deplib" ;;
++	    *) func_append deplibs " $deplib" ;;
+ 	    esac
+ 	  done
+ 	done
+@@ -5230,11 +6159,11 @@ func_mode_link ()
+ 	    compile_deplibs="$deplib $compile_deplibs"
+ 	    finalize_deplibs="$deplib $finalize_deplibs"
+ 	  else
+-	    compiler_flags="$compiler_flags $deplib"
++	    func_append compiler_flags " $deplib"
+ 	    if test "$linkmode" = lib ; then
+ 		case "$new_inherited_linker_flags " in
+ 		    *" $deplib "*) ;;
+-		    * ) new_inherited_linker_flags="$new_inherited_linker_flags $deplib" ;;
++		    * ) func_append new_inherited_linker_flags " $deplib" ;;
+ 		esac
+ 	    fi
+ 	  fi
+@@ -5319,7 +6248,7 @@ func_mode_link ()
+ 	    if test "$linkmode" = lib ; then
+ 		case "$new_inherited_linker_flags " in
+ 		    *" $deplib "*) ;;
+-		    * ) new_inherited_linker_flags="$new_inherited_linker_flags $deplib" ;;
++		    * ) func_append new_inherited_linker_flags " $deplib" ;;
+ 		esac
+ 	    fi
+ 	  fi
+@@ -5332,7 +6261,8 @@ func_mode_link ()
+ 	    test "$pass" = conv && continue
+ 	    newdependency_libs="$deplib $newdependency_libs"
+ 	    func_stripname '-L' '' "$deplib"
+-	    newlib_search_path="$newlib_search_path $func_stripname_result"
++	    func_resolve_sysroot "$func_stripname_result"
++	    func_append newlib_search_path " $func_resolve_sysroot_result"
+ 	    ;;
+ 	  prog)
+ 	    if test "$pass" = conv; then
+@@ -5346,7 +6276,8 @@ func_mode_link ()
+ 	      finalize_deplibs="$deplib $finalize_deplibs"
+ 	    fi
+ 	    func_stripname '-L' '' "$deplib"
+-	    newlib_search_path="$newlib_search_path $func_stripname_result"
++	    func_resolve_sysroot "$func_stripname_result"
++	    func_append newlib_search_path " $func_resolve_sysroot_result"
+ 	    ;;
+ 	  *)
+ 	    func_warning "\`-L' is ignored for archives/objects"
+@@ -5357,17 +6288,21 @@ func_mode_link ()
+ 	-R*)
+ 	  if test "$pass" = link; then
+ 	    func_stripname '-R' '' "$deplib"
+-	    dir=$func_stripname_result
++	    func_resolve_sysroot "$func_stripname_result"
++	    dir=$func_resolve_sysroot_result
+ 	    # Make sure the xrpath contains only unique directories.
+ 	    case "$xrpath " in
+ 	    *" $dir "*) ;;
+-	    *) xrpath="$xrpath $dir" ;;
++	    *) func_append xrpath " $dir" ;;
+ 	    esac
+ 	  fi
+ 	  deplibs="$deplib $deplibs"
+ 	  continue
+ 	  ;;
+-	*.la) lib="$deplib" ;;
++	*.la)
++	  func_resolve_sysroot "$deplib"
++	  lib=$func_resolve_sysroot_result
++	  ;;
+ 	*.$libext)
+ 	  if test "$pass" = conv; then
+ 	    deplibs="$deplib $deplibs"
+@@ -5385,7 +6320,7 @@ func_mode_link ()
+ 		match_pattern*)
+ 		  set dummy $deplibs_check_method; shift
+ 		  match_pattern_regex=`expr "$deplibs_check_method" : "$1 \(.*\)"`
+-		  if eval "\$ECHO \"X$deplib\"" 2>/dev/null | $Xsed -e 10q \
++		  if eval "\$ECHO \"$deplib\"" 2>/dev/null | $SED 10q \
+ 		    | $EGREP "$match_pattern_regex" > /dev/null; then
+ 		    valid_a_lib=yes
+ 		  fi
+@@ -5395,15 +6330,15 @@ func_mode_link ()
+ 		;;
+ 	      esac
+ 	      if test "$valid_a_lib" != yes; then
+-		$ECHO
++		echo
+ 		$ECHO "*** Warning: Trying to link with static lib archive $deplib."
+-		$ECHO "*** I have the capability to make that library automatically link in when"
+-		$ECHO "*** you link to this library.  But I can only do this if you have a"
+-		$ECHO "*** shared version of the library, which you do not appear to have"
+-		$ECHO "*** because the file extensions .$libext of this argument makes me believe"
+-		$ECHO "*** that it is just a static archive that I should not use here."
++		echo "*** I have the capability to make that library automatically link in when"
++		echo "*** you link to this library.  But I can only do this if you have a"
++		echo "*** shared version of the library, which you do not appear to have"
++		echo "*** because the file extensions .$libext of this argument makes me believe"
++		echo "*** that it is just a static archive that I should not use here."
+ 	      else
+-		$ECHO
++		echo
+ 		$ECHO "*** Warning: Linking the shared library $output against the"
+ 		$ECHO "*** static library $deplib is not portable!"
+ 		deplibs="$deplib $deplibs"
+@@ -5430,11 +6365,11 @@ func_mode_link ()
+ 	    if test "$pass" = dlpreopen || test "$dlopen_support" != yes || test "$build_libtool_libs" = no; then
+ 	      # If there is no dlopen support or we're linking statically,
+ 	      # we need to preload.
+-	      newdlprefiles="$newdlprefiles $deplib"
++	      func_append newdlprefiles " $deplib"
+ 	      compile_deplibs="$deplib $compile_deplibs"
+ 	      finalize_deplibs="$deplib $finalize_deplibs"
+ 	    else
+-	      newdlfiles="$newdlfiles $deplib"
++	      func_append newdlfiles " $deplib"
+ 	    fi
+ 	  fi
+ 	  continue
+@@ -5476,20 +6411,20 @@ func_mode_link ()
+ 
+ 	# Convert "-framework foo" to "foo.ltframework"
+ 	if test -n "$inherited_linker_flags"; then
+-	  tmp_inherited_linker_flags=`$ECHO "X$inherited_linker_flags" | $Xsed -e 's/-framework \([^ $]*\)/\1.ltframework/g'`
++	  tmp_inherited_linker_flags=`$ECHO "$inherited_linker_flags" | $SED 's/-framework \([^ $]*\)/\1.ltframework/g'`
+ 	  for tmp_inherited_linker_flag in $tmp_inherited_linker_flags; do
+ 	    case " $new_inherited_linker_flags " in
+ 	      *" $tmp_inherited_linker_flag "*) ;;
+-	      *) new_inherited_linker_flags="$new_inherited_linker_flags $tmp_inherited_linker_flag";;
++	      *) func_append new_inherited_linker_flags " $tmp_inherited_linker_flag";;
+ 	    esac
+ 	  done
+ 	fi
+-	dependency_libs=`$ECHO "X $dependency_libs" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
++	dependency_libs=`$ECHO " $dependency_libs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
+ 	if test "$linkmode,$pass" = "lib,link" ||
+ 	   test "$linkmode,$pass" = "prog,scan" ||
+ 	   { test "$linkmode" != prog && test "$linkmode" != lib; }; then
+-	  test -n "$dlopen" && dlfiles="$dlfiles $dlopen"
+-	  test -n "$dlpreopen" && dlprefiles="$dlprefiles $dlpreopen"
++	  test -n "$dlopen" && func_append dlfiles " $dlopen"
++	  test -n "$dlpreopen" && func_append dlprefiles " $dlpreopen"
+ 	fi
+ 
+ 	if test "$pass" = conv; then
+@@ -5500,20 +6435,20 @@ func_mode_link ()
+ 	      func_fatal_error "cannot find name of link library for \`$lib'"
+ 	    fi
+ 	    # It is a libtool convenience library, so add in its objects.
+-	    convenience="$convenience $ladir/$objdir/$old_library"
+-	    old_convenience="$old_convenience $ladir/$objdir/$old_library"
++	    func_append convenience " $ladir/$objdir/$old_library"
++	    func_append old_convenience " $ladir/$objdir/$old_library"
+ 	  elif test "$linkmode" != prog && test "$linkmode" != lib; then
+ 	    func_fatal_error "\`$lib' is not a convenience library"
+ 	  fi
+ 	  tmp_libs=
+ 	  for deplib in $dependency_libs; do
+ 	    deplibs="$deplib $deplibs"
+-	    if $opt_duplicate_deps ; then
++	    if $opt_preserve_dup_deps ; then
+ 	      case "$tmp_libs " in
+-	      *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;;
++	      *" $deplib "*) func_append specialdeplibs " $deplib" ;;
+ 	      esac
+ 	    fi
+-	    tmp_libs="$tmp_libs $deplib"
++	    func_append tmp_libs " $deplib"
+ 	  done
+ 	  continue
+ 	fi # $pass = conv
+@@ -5521,9 +6456,15 @@ func_mode_link ()
+ 
+ 	# Get the name of the library we link against.
+ 	linklib=
+-	for l in $old_library $library_names; do
+-	  linklib="$l"
+-	done
++	if test -n "$old_library" &&
++	   { test "$prefer_static_libs" = yes ||
++	     test "$prefer_static_libs,$installed" = "built,no"; }; then
++	  linklib=$old_library
++	else
++	  for l in $old_library $library_names; do
++	    linklib="$l"
++	  done
++	fi
+ 	if test -z "$linklib"; then
+ 	  func_fatal_error "cannot find name of link library for \`$lib'"
+ 	fi
+@@ -5540,9 +6481,9 @@ func_mode_link ()
+ 	    # statically, we need to preload.  We also need to preload any
+ 	    # dependent libraries so libltdl's deplib preloader doesn't
+ 	    # bomb out in the load deplibs phase.
+-	    dlprefiles="$dlprefiles $lib $dependency_libs"
++	    func_append dlprefiles " $lib $dependency_libs"
+ 	  else
+-	    newdlfiles="$newdlfiles $lib"
++	    func_append newdlfiles " $lib"
+ 	  fi
+ 	  continue
+ 	fi # $pass = dlopen
+@@ -5564,14 +6505,14 @@ func_mode_link ()
+ 
+ 	# Find the relevant object directory and library name.
+ 	if test "X$installed" = Xyes; then
+-	  if test ! -f "$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then
++	  if test ! -f "$lt_sysroot$libdir/$linklib" && test -f "$abs_ladir/$linklib"; then
+ 	    func_warning "library \`$lib' was moved."
+ 	    dir="$ladir"
+ 	    absdir="$abs_ladir"
+ 	    libdir="$abs_ladir"
+ 	  else
+-	    dir="$libdir"
+-	    absdir="$libdir"
++	    dir="$lt_sysroot$libdir"
++	    absdir="$lt_sysroot$libdir"
+ 	  fi
+ 	  test "X$hardcode_automatic" = Xyes && avoidtemprpath=yes
+ 	else
+@@ -5579,12 +6520,12 @@ func_mode_link ()
+ 	    dir="$ladir"
+ 	    absdir="$abs_ladir"
+ 	    # Remove this search path later
+-	    notinst_path="$notinst_path $abs_ladir"
++	    func_append notinst_path " $abs_ladir"
+ 	  else
+ 	    dir="$ladir/$objdir"
+ 	    absdir="$abs_ladir/$objdir"
+ 	    # Remove this search path later
+-	    notinst_path="$notinst_path $abs_ladir"
++	    func_append notinst_path " $abs_ladir"
+ 	  fi
+ 	fi # $installed = yes
+ 	func_stripname 'lib' '.la' "$laname"
+@@ -5595,20 +6536,46 @@ func_mode_link ()
+ 	  if test -z "$libdir" && test "$linkmode" = prog; then
+ 	    func_fatal_error "only libraries may -dlpreopen a convenience library: \`$lib'"
+ 	  fi
+-	  # Prefer using a static library (so that no silly _DYNAMIC symbols
+-	  # are required to link).
+-	  if test -n "$old_library"; then
+-	    newdlprefiles="$newdlprefiles $dir/$old_library"
+-	    # Keep a list of preopened convenience libraries to check
+-	    # that they are being used correctly in the link pass.
+-	    test -z "$libdir" && \
+-		dlpreconveniencelibs="$dlpreconveniencelibs $dir/$old_library"
+-	  # Otherwise, use the dlname, so that lt_dlopen finds it.
+-	  elif test -n "$dlname"; then
+-	    newdlprefiles="$newdlprefiles $dir/$dlname"
+-	  else
+-	    newdlprefiles="$newdlprefiles $dir/$linklib"
+-	  fi
++	  case "$host" in
++	    # special handling for platforms with PE-DLLs.
++	    *cygwin* | *mingw* | *cegcc* )
++	      # Linker will automatically link against shared library if both
++	      # static and shared are present.  Therefore, ensure we extract
++	      # symbols from the import library if a shared library is present
++	      # (otherwise, the dlopen module name will be incorrect).  We do
++	      # this by putting the import library name into $newdlprefiles.
++	      # We recover the dlopen module name by 'saving' the la file
++	      # name in a special purpose variable, and (later) extracting the
++	      # dlname from the la file.
++	      if test -n "$dlname"; then
++	        func_tr_sh "$dir/$linklib"
++	        eval "libfile_$func_tr_sh_result=\$abs_ladir/\$laname"
++	        func_append newdlprefiles " $dir/$linklib"
++	      else
++	        func_append newdlprefiles " $dir/$old_library"
++	        # Keep a list of preopened convenience libraries to check
++	        # that they are being used correctly in the link pass.
++	        test -z "$libdir" && \
++	          func_append dlpreconveniencelibs " $dir/$old_library"
++	      fi
++	    ;;
++	    * )
++	      # Prefer using a static library (so that no silly _DYNAMIC symbols
++	      # are required to link).
++	      if test -n "$old_library"; then
++	        func_append newdlprefiles " $dir/$old_library"
++	        # Keep a list of preopened convenience libraries to check
++	        # that they are being used correctly in the link pass.
++	        test -z "$libdir" && \
++	          func_append dlpreconveniencelibs " $dir/$old_library"
++	      # Otherwise, use the dlname, so that lt_dlopen finds it.
++	      elif test -n "$dlname"; then
++	        func_append newdlprefiles " $dir/$dlname"
++	      else
++	        func_append newdlprefiles " $dir/$linklib"
++	      fi
++	    ;;
++	  esac
+ 	fi # $pass = dlpreopen
+ 
+ 	if test -z "$libdir"; then
+@@ -5626,7 +6593,7 @@ func_mode_link ()
+ 
+ 
+ 	if test "$linkmode" = prog && test "$pass" != link; then
+-	  newlib_search_path="$newlib_search_path $ladir"
++	  func_append newlib_search_path " $ladir"
+ 	  deplibs="$lib $deplibs"
+ 
+ 	  linkalldeplibs=no
+@@ -5639,7 +6606,8 @@ func_mode_link ()
+ 	  for deplib in $dependency_libs; do
+ 	    case $deplib in
+ 	    -L*) func_stripname '-L' '' "$deplib"
+-	         newlib_search_path="$newlib_search_path $func_stripname_result"
++	         func_resolve_sysroot "$func_stripname_result"
++	         func_append newlib_search_path " $func_resolve_sysroot_result"
+ 		 ;;
+ 	    esac
+ 	    # Need to link against all dependency_libs?
+@@ -5650,12 +6618,12 @@ func_mode_link ()
+ 	      # or/and link against static libraries
+ 	      newdependency_libs="$deplib $newdependency_libs"
+ 	    fi
+-	    if $opt_duplicate_deps ; then
++	    if $opt_preserve_dup_deps ; then
+ 	      case "$tmp_libs " in
+-	      *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;;
++	      *" $deplib "*) func_append specialdeplibs " $deplib" ;;
+ 	      esac
+ 	    fi
+-	    tmp_libs="$tmp_libs $deplib"
++	    func_append tmp_libs " $deplib"
+ 	  done # for deplib
+ 	  continue
+ 	fi # $linkmode = prog...
+@@ -5670,7 +6638,7 @@ func_mode_link ()
+ 	      # Make sure the rpath contains only unique directories.
+ 	      case "$temp_rpath:" in
+ 	      *"$absdir:"*) ;;
+-	      *) temp_rpath="$temp_rpath$absdir:" ;;
++	      *) func_append temp_rpath "$absdir:" ;;
+ 	      esac
+ 	    fi
+ 
+@@ -5682,7 +6650,7 @@ func_mode_link ()
+ 	    *)
+ 	      case "$compile_rpath " in
+ 	      *" $absdir "*) ;;
+-	      *) compile_rpath="$compile_rpath $absdir"
++	      *) func_append compile_rpath " $absdir" ;;
+ 	      esac
+ 	      ;;
+ 	    esac
+@@ -5691,7 +6659,7 @@ func_mode_link ()
+ 	    *)
+ 	      case "$finalize_rpath " in
+ 	      *" $libdir "*) ;;
+-	      *) finalize_rpath="$finalize_rpath $libdir"
++	      *) func_append finalize_rpath " $libdir" ;;
+ 	      esac
+ 	      ;;
+ 	    esac
+@@ -5716,12 +6684,12 @@ func_mode_link ()
+ 	  case $host in
+ 	  *cygwin* | *mingw* | *cegcc*)
+ 	      # No point in relinking DLLs because paths are not encoded
+-	      notinst_deplibs="$notinst_deplibs $lib"
++	      func_append notinst_deplibs " $lib"
+ 	      need_relink=no
+ 	    ;;
+ 	  *)
+ 	    if test "$installed" = no; then
+-	      notinst_deplibs="$notinst_deplibs $lib"
++	      func_append notinst_deplibs " $lib"
+ 	      need_relink=yes
+ 	    fi
+ 	    ;;
+@@ -5738,7 +6706,7 @@ func_mode_link ()
+ 	    fi
+ 	  done
+ 	  if test -z "$dlopenmodule" && test "$shouldnotlink" = yes && test "$pass" = link; then
+-	    $ECHO
++	    echo
+ 	    if test "$linkmode" = prog; then
+ 	      $ECHO "*** Warning: Linking the executable $output against the loadable module"
+ 	    else
+@@ -5756,7 +6724,7 @@ func_mode_link ()
+ 	    *)
+ 	      case "$compile_rpath " in
+ 	      *" $absdir "*) ;;
+-	      *) compile_rpath="$compile_rpath $absdir"
++	      *) func_append compile_rpath " $absdir" ;;
+ 	      esac
+ 	      ;;
+ 	    esac
+@@ -5765,7 +6733,7 @@ func_mode_link ()
+ 	    *)
+ 	      case "$finalize_rpath " in
+ 	      *" $libdir "*) ;;
+-	      *) finalize_rpath="$finalize_rpath $libdir"
++	      *) func_append finalize_rpath " $libdir" ;;
+ 	      esac
+ 	      ;;
+ 	    esac
+@@ -5819,7 +6787,7 @@ func_mode_link ()
+ 	    linklib=$newlib
+ 	  fi # test -n "$old_archive_from_expsyms_cmds"
+ 
+-	  if test "$linkmode" = prog || test "$mode" != relink; then
++	  if test "$linkmode" = prog || test "$opt_mode" != relink; then
+ 	    add_shlibpath=
+ 	    add_dir=
+ 	    add=
+@@ -5841,9 +6809,9 @@ func_mode_link ()
+ 		      if test "X$dlopenmodule" != "X$lib"; then
+ 			$ECHO "*** Warning: lib $linklib is a module, not a shared library"
+ 			if test -z "$old_library" ; then
+-			  $ECHO
+-			  $ECHO "*** And there doesn't seem to be a static archive available"
+-			  $ECHO "*** The link will probably fail, sorry"
++			  echo
++			  echo "*** And there doesn't seem to be a static archive available"
++			  echo "*** The link will probably fail, sorry"
+ 			else
+ 			  add="$dir/$old_library"
+ 			fi
+@@ -5875,7 +6843,7 @@ func_mode_link ()
+ 		if test -n "$inst_prefix_dir"; then
+ 		  case $libdir in
+ 		    [\\/]*)
+-		      add_dir="$add_dir -L$inst_prefix_dir$libdir"
++		      func_append add_dir " -L$inst_prefix_dir$libdir"
+ 		      ;;
+ 		  esac
+ 		fi
+@@ -5897,7 +6865,7 @@ func_mode_link ()
+ 	    if test -n "$add_shlibpath"; then
+ 	      case :$compile_shlibpath: in
+ 	      *":$add_shlibpath:"*) ;;
+-	      *) compile_shlibpath="$compile_shlibpath$add_shlibpath:" ;;
++	      *) func_append compile_shlibpath "$add_shlibpath:" ;;
+ 	      esac
+ 	    fi
+ 	    if test "$linkmode" = prog; then
+@@ -5911,13 +6879,13 @@ func_mode_link ()
+ 		 test "$hardcode_shlibpath_var" = yes; then
+ 		case :$finalize_shlibpath: in
+ 		*":$libdir:"*) ;;
+-		*) finalize_shlibpath="$finalize_shlibpath$libdir:" ;;
++		*) func_append finalize_shlibpath "$libdir:" ;;
+ 		esac
+ 	      fi
+ 	    fi
+ 	  fi
+ 
+-	  if test "$linkmode" = prog || test "$mode" = relink; then
++	  if test "$linkmode" = prog || test "$opt_mode" = relink; then
+ 	    add_shlibpath=
+ 	    add_dir=
+ 	    add=
+@@ -5931,7 +6899,7 @@ func_mode_link ()
+ 	    elif test "$hardcode_shlibpath_var" = yes; then
+ 	      case :$finalize_shlibpath: in
+ 	      *":$libdir:"*) ;;
+-	      *) finalize_shlibpath="$finalize_shlibpath$libdir:" ;;
++	      *) func_append finalize_shlibpath "$libdir:" ;;
+ 	      esac
+ 	      add="-l$name"
+ 	    elif test "$hardcode_automatic" = yes; then
+@@ -5942,13 +6910,11 @@ func_mode_link ()
+ 		add="$libdir/$linklib"
+ 	      fi
+ 	    else
+-	      # We cannot seem to hardcode it, guess we'll fake it.
+-	      add_dir="-L$libdir"
+ 	      # Try looking first in the location we're being installed to.
+ 	      if test -n "$inst_prefix_dir"; then
+ 		case $libdir in
+ 		  [\\/]*)
+-		    add_dir="$add_dir -L$inst_prefix_dir$libdir"
++		    func_append add_dir " -L$inst_prefix_dir$libdir"
+ 		    ;;
+ 		esac
+ 	      fi
+@@ -5983,21 +6949,21 @@ func_mode_link ()
+ 
+ 	    # Just print a warning and add the library to dependency_libs so
+ 	    # that the program can be linked against the static library.
+-	    $ECHO
++	    echo
+ 	    $ECHO "*** Warning: This system can not link to static lib archive $lib."
+-	    $ECHO "*** I have the capability to make that library automatically link in when"
+-	    $ECHO "*** you link to this library.  But I can only do this if you have a"
+-	    $ECHO "*** shared version of the library, which you do not appear to have."
++	    echo "*** I have the capability to make that library automatically link in when"
++	    echo "*** you link to this library.  But I can only do this if you have a"
++	    echo "*** shared version of the library, which you do not appear to have."
+ 	    if test "$module" = yes; then
+-	      $ECHO "*** But as you try to build a module library, libtool will still create "
+-	      $ECHO "*** a static module, that should work as long as the dlopening application"
+-	      $ECHO "*** is linked with the -dlopen flag to resolve symbols at runtime."
++	      echo "*** But as you try to build a module library, libtool will still create "
++	      echo "*** a static module, that should work as long as the dlopening application"
++	      echo "*** is linked with the -dlopen flag to resolve symbols at runtime."
+ 	      if test -z "$global_symbol_pipe"; then
+-		$ECHO
+-		$ECHO "*** However, this would only work if libtool was able to extract symbol"
+-		$ECHO "*** lists from a program, using \`nm' or equivalent, but libtool could"
+-		$ECHO "*** not find such a program.  So, this module is probably useless."
+-		$ECHO "*** \`nm' from GNU binutils and a full rebuild may help."
++		echo
++		echo "*** However, this would only work if libtool was able to extract symbol"
++		echo "*** lists from a program, using \`nm' or equivalent, but libtool could"
++		echo "*** not find such a program.  So, this module is probably useless."
++		echo "*** \`nm' from GNU binutils and a full rebuild may help."
+ 	      fi
+ 	      if test "$build_old_libs" = no; then
+ 		build_libtool_libs=module
+@@ -6025,37 +6991,46 @@ func_mode_link ()
+ 	           temp_xrpath=$func_stripname_result
+ 		   case " $xrpath " in
+ 		   *" $temp_xrpath "*) ;;
+-		   *) xrpath="$xrpath $temp_xrpath";;
++		   *) func_append xrpath " $temp_xrpath";;
+ 		   esac;;
+-	      *) temp_deplibs="$temp_deplibs $libdir";;
++	      *) func_append temp_deplibs " $libdir";;
+ 	      esac
+ 	    done
+ 	    dependency_libs="$temp_deplibs"
+ 	  fi
+ 
+-	  newlib_search_path="$newlib_search_path $absdir"
++	  func_append newlib_search_path " $absdir"
+ 	  # Link against this library
+ 	  test "$link_static" = no && newdependency_libs="$abs_ladir/$laname $newdependency_libs"
+ 	  # ... and its dependency_libs
+ 	  tmp_libs=
+ 	  for deplib in $dependency_libs; do
+ 	    newdependency_libs="$deplib $newdependency_libs"
+-	    if $opt_duplicate_deps ; then
++	    case $deplib in
++              -L*) func_stripname '-L' '' "$deplib"
++                   func_resolve_sysroot "$func_stripname_result";;
++              *) func_resolve_sysroot "$deplib" ;;
++            esac
++	    if $opt_preserve_dup_deps ; then
+ 	      case "$tmp_libs " in
+-	      *" $deplib "*) specialdeplibs="$specialdeplibs $deplib" ;;
++	      *" $func_resolve_sysroot_result "*)
++                func_append specialdeplibs " $func_resolve_sysroot_result" ;;
+ 	      esac
+ 	    fi
+-	    tmp_libs="$tmp_libs $deplib"
++	    func_append tmp_libs " $func_resolve_sysroot_result"
+ 	  done
+ 
+ 	  if test "$link_all_deplibs" != no; then
+ 	    # Add the search paths of all dependency libraries
+ 	    for deplib in $dependency_libs; do
++	      path=
+ 	      case $deplib in
+ 	      -L*) path="$deplib" ;;
+ 	      *.la)
++	        func_resolve_sysroot "$deplib"
++	        deplib=$func_resolve_sysroot_result
+ 	        func_dirname "$deplib" "" "."
+-		dir="$func_dirname_result"
++		dir=$func_dirname_result
+ 		# We need an absolute path.
+ 		case $dir in
+ 		[\\/]* | [A-Za-z]:[\\/]*) absdir="$dir" ;;
+@@ -6082,15 +7057,25 @@ func_mode_link ()
+                       if test -z "$darwin_install_name"; then
+                           darwin_install_name=`${OTOOL64} -L $depdepl  | awk '{if (NR == 2) {print $1;exit}}'`
+                       fi
+-		      compiler_flags="$compiler_flags ${wl}-dylib_file ${wl}${darwin_install_name}:${depdepl}"
+-		      linker_flags="$linker_flags -dylib_file ${darwin_install_name}:${depdepl}"
++		      func_append compiler_flags " ${wl}-dylib_file ${wl}${darwin_install_name}:${depdepl}"
++		      func_append linker_flags " -dylib_file ${darwin_install_name}:${depdepl}"
+ 		      path=
+ 		    fi
+ 		  fi
+ 		  ;;
+ 		*)
+-		  path="-L$absdir/$objdir"
+-		  ;;
++                  # OE sets installed=no in staging. We need to look in $objdir and $absdir,
++                  # preferring $objdir. RP 31/04/2008
++		  if test -f "$absdir/$objdir/$depdepl" ; then
++		    depdepl="$absdir/$objdir/$depdepl"
++		    path="-L$absdir/$objdir"
++		  elif test -f "$absdir/$depdepl" ; then
++		    depdepl="$absdir/$depdepl"
++		    path="-L$absdir"
++		  else
++		    path="-L$absdir/$objdir"
++		  fi
++		;;
+ 		esac
+ 		else
+ 		  eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $deplib`
+@@ -6116,7 +7101,7 @@ func_mode_link ()
+ 	  compile_deplibs="$new_inherited_linker_flags $compile_deplibs"
+ 	  finalize_deplibs="$new_inherited_linker_flags $finalize_deplibs"
+ 	else
+-	  compiler_flags="$compiler_flags "`$ECHO "X $new_inherited_linker_flags" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
++	  compiler_flags="$compiler_flags "`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
+ 	fi
+       fi
+       dependency_libs="$newdependency_libs"
+@@ -6133,7 +7118,7 @@ func_mode_link ()
+ 	  for dir in $newlib_search_path; do
+ 	    case "$lib_search_path " in
+ 	    *" $dir "*) ;;
+-	    *) lib_search_path="$lib_search_path $dir" ;;
++	    *) func_append lib_search_path " $dir" ;;
+ 	    esac
+ 	  done
+ 	  newlib_search_path=
+@@ -6191,10 +7176,10 @@ func_mode_link ()
+ 	    -L*)
+ 	      case " $tmp_libs " in
+ 	      *" $deplib "*) ;;
+-	      *) tmp_libs="$tmp_libs $deplib" ;;
++	      *) func_append tmp_libs " $deplib" ;;
+ 	      esac
+ 	      ;;
+-	    *) tmp_libs="$tmp_libs $deplib" ;;
++	    *) func_append tmp_libs " $deplib" ;;
+ 	    esac
+ 	  done
+ 	  eval $var=\"$tmp_libs\"
+@@ -6210,7 +7195,7 @@ func_mode_link ()
+ 	  ;;
+ 	esac
+ 	if test -n "$i" ; then
+-	  tmp_libs="$tmp_libs $i"
++	  func_append tmp_libs " $i"
+ 	fi
+       done
+       dependency_libs=$tmp_libs
+@@ -6251,7 +7236,7 @@ func_mode_link ()
+       # Now set the variables for building old libraries.
+       build_libtool_libs=no
+       oldlibs="$output"
+-      objs="$objs$old_deplibs"
++      func_append objs "$old_deplibs"
+       ;;
+ 
+     lib)
+@@ -6284,10 +7269,10 @@ func_mode_link ()
+ 	if test "$deplibs_check_method" != pass_all; then
+ 	  func_fatal_error "cannot build libtool library \`$output' from non-libtool objects on this host:$objs"
+ 	else
+-	  $ECHO
++	  echo
+ 	  $ECHO "*** Warning: Linking the shared library $output against the non-libtool"
+ 	  $ECHO "*** objects $objs is not portable!"
+-	  libobjs="$libobjs $objs"
++	  func_append libobjs " $objs"
+ 	fi
+       fi
+ 
+@@ -6352,7 +7337,7 @@ func_mode_link ()
+ 	    age="$number_minor"
+ 	    revision="$number_revision"
+ 	    ;;
+-	  freebsd-aout|freebsd-elf|sunos)
++	  freebsd-aout|freebsd-elf|qnx|sunos)
+ 	    current="$number_major"
+ 	    revision="$number_minor"
+ 	    age="0"
+@@ -6485,7 +7470,7 @@ func_mode_link ()
+ 	  done
+ 
+ 	  # Make executables depend on our current version.
+-	  verstring="$verstring:${current}.0"
++	  func_append verstring ":${current}.0"
+ 	  ;;
+ 
+ 	qnx)
+@@ -6553,10 +7538,10 @@ func_mode_link ()
+       fi
+ 
+       func_generate_dlsyms "$libname" "$libname" "yes"
+-      libobjs="$libobjs $symfileobj"
++      func_append libobjs " $symfileobj"
+       test "X$libobjs" = "X " && libobjs=
+ 
+-      if test "$mode" != relink; then
++      if test "$opt_mode" != relink; then
+ 	# Remove our outputs, but don't remove object files since they
+ 	# may have been created when compiling PIC objects.
+ 	removelist=
+@@ -6572,7 +7557,7 @@ func_mode_link ()
+ 		   continue
+ 		 fi
+ 	       fi
+-	       removelist="$removelist $p"
++	       func_append removelist " $p"
+ 	       ;;
+ 	    *) ;;
+ 	  esac
+@@ -6583,27 +7568,28 @@ func_mode_link ()
+ 
+       # Now set the variables for building old libraries.
+       if test "$build_old_libs" = yes && test "$build_libtool_libs" != convenience ; then
+-	oldlibs="$oldlibs $output_objdir/$libname.$libext"
++	func_append oldlibs " $output_objdir/$libname.$libext"
+ 
+ 	# Transform .lo files to .o files.
+-	oldobjs="$objs "`$ECHO "X$libobjs" | $SP2NL | $Xsed -e '/\.'${libext}'$/d' -e "$lo2o" | $NL2SP`
++	oldobjs="$objs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; $lo2o" | $NL2SP`
+       fi
+ 
+       # Eliminate all temporary directories.
+       #for path in $notinst_path; do
+-      #	lib_search_path=`$ECHO "X$lib_search_path " | $Xsed -e "s% $path % %g"`
+-      #	deplibs=`$ECHO "X$deplibs " | $Xsed -e "s% -L$path % %g"`
+-      #	dependency_libs=`$ECHO "X$dependency_libs " | $Xsed -e "s% -L$path % %g"`
++      #	lib_search_path=`$ECHO "$lib_search_path " | $SED "s% $path % %g"`
++      #	deplibs=`$ECHO "$deplibs " | $SED "s% -L$path % %g"`
++      #	dependency_libs=`$ECHO "$dependency_libs " | $SED "s% -L$path % %g"`
+       #done
+ 
+       if test -n "$xrpath"; then
+ 	# If the user specified any rpath flags, then add them.
+ 	temp_xrpath=
+ 	for libdir in $xrpath; do
+-	  temp_xrpath="$temp_xrpath -R$libdir"
++	  func_replace_sysroot "$libdir"
++	  func_append temp_xrpath " -R$func_replace_sysroot_result"
+ 	  case "$finalize_rpath " in
+ 	  *" $libdir "*) ;;
+-	  *) finalize_rpath="$finalize_rpath $libdir" ;;
++	  *) func_append finalize_rpath " $libdir" ;;
+ 	  esac
+ 	done
+ 	if test "$hardcode_into_libs" != yes || test "$build_old_libs" = yes; then
+@@ -6617,7 +7603,7 @@ func_mode_link ()
+       for lib in $old_dlfiles; do
+ 	case " $dlprefiles $dlfiles " in
+ 	*" $lib "*) ;;
+-	*) dlfiles="$dlfiles $lib" ;;
++	*) func_append dlfiles " $lib" ;;
+ 	esac
+       done
+ 
+@@ -6627,19 +7613,19 @@ func_mode_link ()
+       for lib in $old_dlprefiles; do
+ 	case "$dlprefiles " in
+ 	*" $lib "*) ;;
+-	*) dlprefiles="$dlprefiles $lib" ;;
++	*) func_append dlprefiles " $lib" ;;
+ 	esac
+       done
+ 
+       if test "$build_libtool_libs" = yes; then
+ 	if test -n "$rpath"; then
+ 	  case $host in
+-	  *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc*)
++	  *-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-os2* | *-*-beos* | *-cegcc* | *-*-haiku*)
+ 	    # these systems don't actually have a c library (as such)!
+ 	    ;;
+ 	  *-*-rhapsody* | *-*-darwin1.[012])
+ 	    # Rhapsody C library is in the System framework
+-	    deplibs="$deplibs System.ltframework"
++	    func_append deplibs " System.ltframework"
+ 	    ;;
+ 	  *-*-netbsd*)
+ 	    # Don't link with libc until the a.out ld.so is fixed.
+@@ -6656,7 +7642,7 @@ func_mode_link ()
+ 	  *)
+ 	    # Add libc to deplibs on all other systems if necessary.
+ 	    if test "$build_libtool_need_lc" = "yes"; then
+-	      deplibs="$deplibs -lc"
++	      func_append deplibs " -lc"
+ 	    fi
+ 	    ;;
+ 	  esac
+@@ -6705,7 +7691,7 @@ EOF
+ 		if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then
+ 		  case " $predeps $postdeps " in
+ 		  *" $i "*)
+-		    newdeplibs="$newdeplibs $i"
++		    func_append newdeplibs " $i"
+ 		    i=""
+ 		    ;;
+ 		  esac
+@@ -6716,21 +7702,21 @@ EOF
+ 		  set dummy $deplib_matches; shift
+ 		  deplib_match=$1
+ 		  if test `expr "$ldd_output" : ".*$deplib_match"` -ne 0 ; then
+-		    newdeplibs="$newdeplibs $i"
++		    func_append newdeplibs " $i"
+ 		  else
+ 		    droppeddeps=yes
+-		    $ECHO
++		    echo
+ 		    $ECHO "*** Warning: dynamic linker does not accept needed library $i."
+-		    $ECHO "*** I have the capability to make that library automatically link in when"
+-		    $ECHO "*** you link to this library.  But I can only do this if you have a"
+-		    $ECHO "*** shared version of the library, which I believe you do not have"
+-		    $ECHO "*** because a test_compile did reveal that the linker did not use it for"
+-		    $ECHO "*** its dynamic dependency list that programs get resolved with at runtime."
++		    echo "*** I have the capability to make that library automatically link in when"
++		    echo "*** you link to this library.  But I can only do this if you have a"
++		    echo "*** shared version of the library, which I believe you do not have"
++		    echo "*** because a test_compile did reveal that the linker did not use it for"
++		    echo "*** its dynamic dependency list that programs get resolved with at runtime."
+ 		  fi
+ 		fi
+ 		;;
+ 	      *)
+-		newdeplibs="$newdeplibs $i"
++		func_append newdeplibs " $i"
+ 		;;
+ 	      esac
+ 	    done
+@@ -6748,7 +7734,7 @@ EOF
+ 		  if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then
+ 		    case " $predeps $postdeps " in
+ 		    *" $i "*)
+-		      newdeplibs="$newdeplibs $i"
++		      func_append newdeplibs " $i"
+ 		      i=""
+ 		      ;;
+ 		    esac
+@@ -6759,29 +7745,29 @@ EOF
+ 		    set dummy $deplib_matches; shift
+ 		    deplib_match=$1
+ 		    if test `expr "$ldd_output" : ".*$deplib_match"` -ne 0 ; then
+-		      newdeplibs="$newdeplibs $i"
++		      func_append newdeplibs " $i"
+ 		    else
+ 		      droppeddeps=yes
+-		      $ECHO
++		      echo
+ 		      $ECHO "*** Warning: dynamic linker does not accept needed library $i."
+-		      $ECHO "*** I have the capability to make that library automatically link in when"
+-		      $ECHO "*** you link to this library.  But I can only do this if you have a"
+-		      $ECHO "*** shared version of the library, which you do not appear to have"
+-		      $ECHO "*** because a test_compile did reveal that the linker did not use this one"
+-		      $ECHO "*** as a dynamic dependency that programs can get resolved with at runtime."
++		      echo "*** I have the capability to make that library automatically link in when"
++		      echo "*** you link to this library.  But I can only do this if you have a"
++		      echo "*** shared version of the library, which you do not appear to have"
++		      echo "*** because a test_compile did reveal that the linker did not use this one"
++		      echo "*** as a dynamic dependency that programs can get resolved with at runtime."
+ 		    fi
+ 		  fi
+ 		else
+ 		  droppeddeps=yes
+-		  $ECHO
++		  echo
+ 		  $ECHO "*** Warning!  Library $i is needed by this library but I was not able to"
+-		  $ECHO "*** make it link in!  You will probably need to install it or some"
+-		  $ECHO "*** library that it depends on before this library will be fully"
+-		  $ECHO "*** functional.  Installing it before continuing would be even better."
++		  echo "*** make it link in!  You will probably need to install it or some"
++		  echo "*** library that it depends on before this library will be fully"
++		  echo "*** functional.  Installing it before continuing would be even better."
+ 		fi
+ 		;;
+ 	      *)
+-		newdeplibs="$newdeplibs $i"
++		func_append newdeplibs " $i"
+ 		;;
+ 	      esac
+ 	    done
+@@ -6798,15 +7784,27 @@ EOF
+ 	      if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then
+ 		case " $predeps $postdeps " in
+ 		*" $a_deplib "*)
+-		  newdeplibs="$newdeplibs $a_deplib"
++		  func_append newdeplibs " $a_deplib"
+ 		  a_deplib=""
+ 		  ;;
+ 		esac
+ 	      fi
+ 	      if test -n "$a_deplib" ; then
+ 		libname=`eval "\\$ECHO \"$libname_spec\""`
++		if test -n "$file_magic_glob"; then
++		  libnameglob=`func_echo_all "$libname" | $SED -e $file_magic_glob`
++		else
++		  libnameglob=$libname
++		fi
++		test "$want_nocaseglob" = yes && nocaseglob=`shopt -p nocaseglob`
+ 		for i in $lib_search_path $sys_lib_search_path $shlib_search_path; do
+-		  potential_libs=`ls $i/$libname[.-]* 2>/dev/null`
++		  if test "$want_nocaseglob" = yes; then
++		    shopt -s nocaseglob
++		    potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null`
++		    $nocaseglob
++		  else
++		    potential_libs=`ls $i/$libnameglob[.-]* 2>/dev/null`
++		  fi
+ 		  for potent_lib in $potential_libs; do
+ 		      # Follow soft links.
+ 		      if ls -lLd "$potent_lib" 2>/dev/null |
+@@ -6823,13 +7821,13 @@ EOF
+ 			potliblink=`ls -ld $potlib | ${SED} 's/.* -> //'`
+ 			case $potliblink in
+ 			[\\/]* | [A-Za-z]:[\\/]*) potlib="$potliblink";;
+-			*) potlib=`$ECHO "X$potlib" | $Xsed -e 's,[^/]*$,,'`"$potliblink";;
++			*) potlib=`$ECHO "$potlib" | $SED 's,[^/]*$,,'`"$potliblink";;
+ 			esac
+ 		      done
+ 		      if eval $file_magic_cmd \"\$potlib\" 2>/dev/null |
+ 			 $SED -e 10q |
+ 			 $EGREP "$file_magic_regex" > /dev/null; then
+-			newdeplibs="$newdeplibs $a_deplib"
++			func_append newdeplibs " $a_deplib"
+ 			a_deplib=""
+ 			break 2
+ 		      fi
+@@ -6838,12 +7836,12 @@ EOF
+ 	      fi
+ 	      if test -n "$a_deplib" ; then
+ 		droppeddeps=yes
+-		$ECHO
++		echo
+ 		$ECHO "*** Warning: linker path does not have real file for library $a_deplib."
+-		$ECHO "*** I have the capability to make that library automatically link in when"
+-		$ECHO "*** you link to this library.  But I can only do this if you have a"
+-		$ECHO "*** shared version of the library, which you do not appear to have"
+-		$ECHO "*** because I did check the linker path looking for a file starting"
++		echo "*** I have the capability to make that library automatically link in when"
++		echo "*** you link to this library.  But I can only do this if you have a"
++		echo "*** shared version of the library, which you do not appear to have"
++		echo "*** because I did check the linker path looking for a file starting"
+ 		if test -z "$potlib" ; then
+ 		  $ECHO "*** with $libname but no candidates were found. (...for file magic test)"
+ 		else
+@@ -6854,7 +7852,7 @@ EOF
+ 	      ;;
+ 	    *)
+ 	      # Add a -L argument.
+-	      newdeplibs="$newdeplibs $a_deplib"
++	      func_append newdeplibs " $a_deplib"
+ 	      ;;
+ 	    esac
+ 	  done # Gone through all deplibs.
+@@ -6870,7 +7868,7 @@ EOF
+ 	      if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then
+ 		case " $predeps $postdeps " in
+ 		*" $a_deplib "*)
+-		  newdeplibs="$newdeplibs $a_deplib"
++		  func_append newdeplibs " $a_deplib"
+ 		  a_deplib=""
+ 		  ;;
+ 		esac
+@@ -6881,9 +7879,9 @@ EOF
+ 		  potential_libs=`ls $i/$libname[.-]* 2>/dev/null`
+ 		  for potent_lib in $potential_libs; do
+ 		    potlib="$potent_lib" # see symlink-check above in file_magic test
+-		    if eval "\$ECHO \"X$potent_lib\"" 2>/dev/null | $Xsed -e 10q | \
++		    if eval "\$ECHO \"$potent_lib\"" 2>/dev/null | $SED 10q | \
+ 		       $EGREP "$match_pattern_regex" > /dev/null; then
+-		      newdeplibs="$newdeplibs $a_deplib"
++		      func_append newdeplibs " $a_deplib"
+ 		      a_deplib=""
+ 		      break 2
+ 		    fi
+@@ -6892,12 +7890,12 @@ EOF
+ 	      fi
+ 	      if test -n "$a_deplib" ; then
+ 		droppeddeps=yes
+-		$ECHO
++		echo
+ 		$ECHO "*** Warning: linker path does not have real file for library $a_deplib."
+-		$ECHO "*** I have the capability to make that library automatically link in when"
+-		$ECHO "*** you link to this library.  But I can only do this if you have a"
+-		$ECHO "*** shared version of the library, which you do not appear to have"
+-		$ECHO "*** because I did check the linker path looking for a file starting"
++		echo "*** I have the capability to make that library automatically link in when"
++		echo "*** you link to this library.  But I can only do this if you have a"
++		echo "*** shared version of the library, which you do not appear to have"
++		echo "*** because I did check the linker path looking for a file starting"
+ 		if test -z "$potlib" ; then
+ 		  $ECHO "*** with $libname but no candidates were found. (...for regex pattern test)"
+ 		else
+@@ -6908,32 +7906,32 @@ EOF
+ 	      ;;
+ 	    *)
+ 	      # Add a -L argument.
+-	      newdeplibs="$newdeplibs $a_deplib"
++	      func_append newdeplibs " $a_deplib"
+ 	      ;;
+ 	    esac
+ 	  done # Gone through all deplibs.
+ 	  ;;
+ 	none | unknown | *)
+ 	  newdeplibs=""
+-	  tmp_deplibs=`$ECHO "X $deplibs" | $Xsed \
+-	      -e 's/ -lc$//' -e 's/ -[LR][^ ]*//g'`
++	  tmp_deplibs=`$ECHO " $deplibs" | $SED 's/ -lc$//; s/ -[LR][^ ]*//g'`
+ 	  if test "X$allow_libtool_libs_with_static_runtimes" = "Xyes" ; then
+ 	    for i in $predeps $postdeps ; do
+ 	      # can't use Xsed below, because $i might contain '/'
+-	      tmp_deplibs=`$ECHO "X $tmp_deplibs" | $Xsed -e "s,$i,,"`
++	      tmp_deplibs=`$ECHO " $tmp_deplibs" | $SED "s,$i,,"`
+ 	    done
+ 	  fi
+-	  if $ECHO "X $tmp_deplibs" | $Xsed -e 's/[	 ]//g' |
+-	     $GREP . >/dev/null; then
+-	    $ECHO
++	  case $tmp_deplibs in
++	  *[!\	\ ]*)
++	    echo
+ 	    if test "X$deplibs_check_method" = "Xnone"; then
+-	      $ECHO "*** Warning: inter-library dependencies are not supported in this platform."
++	      echo "*** Warning: inter-library dependencies are not supported in this platform."
+ 	    else
+-	      $ECHO "*** Warning: inter-library dependencies are not known to be supported."
++	      echo "*** Warning: inter-library dependencies are not known to be supported."
+ 	    fi
+-	    $ECHO "*** All declared inter-library dependencies are being dropped."
++	    echo "*** All declared inter-library dependencies are being dropped."
+ 	    droppeddeps=yes
+-	  fi
++	    ;;
++	  esac
+ 	  ;;
+ 	esac
+ 	versuffix=$versuffix_save
+@@ -6945,23 +7943,23 @@ EOF
+ 	case $host in
+ 	*-*-rhapsody* | *-*-darwin1.[012])
+ 	  # On Rhapsody replace the C library with the System framework
+-	  newdeplibs=`$ECHO "X $newdeplibs" | $Xsed -e 's/ -lc / System.ltframework /'`
++	  newdeplibs=`$ECHO " $newdeplibs" | $SED 's/ -lc / System.ltframework /'`
+ 	  ;;
+ 	esac
+ 
+ 	if test "$droppeddeps" = yes; then
+ 	  if test "$module" = yes; then
+-	    $ECHO
+-	    $ECHO "*** Warning: libtool could not satisfy all declared inter-library"
++	    echo
++	    echo "*** Warning: libtool could not satisfy all declared inter-library"
+ 	    $ECHO "*** dependencies of module $libname.  Therefore, libtool will create"
+-	    $ECHO "*** a static module, that should work as long as the dlopening"
+-	    $ECHO "*** application is linked with the -dlopen flag."
++	    echo "*** a static module, that should work as long as the dlopening"
++	    echo "*** application is linked with the -dlopen flag."
+ 	    if test -z "$global_symbol_pipe"; then
+-	      $ECHO
+-	      $ECHO "*** However, this would only work if libtool was able to extract symbol"
+-	      $ECHO "*** lists from a program, using \`nm' or equivalent, but libtool could"
+-	      $ECHO "*** not find such a program.  So, this module is probably useless."
+-	      $ECHO "*** \`nm' from GNU binutils and a full rebuild may help."
++	      echo
++	      echo "*** However, this would only work if libtool was able to extract symbol"
++	      echo "*** lists from a program, using \`nm' or equivalent, but libtool could"
++	      echo "*** not find such a program.  So, this module is probably useless."
++	      echo "*** \`nm' from GNU binutils and a full rebuild may help."
+ 	    fi
+ 	    if test "$build_old_libs" = no; then
+ 	      oldlibs="$output_objdir/$libname.$libext"
+@@ -6971,16 +7969,16 @@ EOF
+ 	      build_libtool_libs=no
+ 	    fi
+ 	  else
+-	    $ECHO "*** The inter-library dependencies that have been dropped here will be"
+-	    $ECHO "*** automatically added whenever a program is linked with this library"
+-	    $ECHO "*** or is declared to -dlopen it."
++	    echo "*** The inter-library dependencies that have been dropped here will be"
++	    echo "*** automatically added whenever a program is linked with this library"
++	    echo "*** or is declared to -dlopen it."
+ 
+ 	    if test "$allow_undefined" = no; then
+-	      $ECHO
+-	      $ECHO "*** Since this library must not contain undefined symbols,"
+-	      $ECHO "*** because either the platform does not support them or"
+-	      $ECHO "*** it was explicitly requested with -no-undefined,"
+-	      $ECHO "*** libtool will only create a static version of it."
++	      echo
++	      echo "*** Since this library must not contain undefined symbols,"
++	      echo "*** because either the platform does not support them or"
++	      echo "*** it was explicitly requested with -no-undefined,"
++	      echo "*** libtool will only create a static version of it."
+ 	      if test "$build_old_libs" = no; then
+ 		oldlibs="$output_objdir/$libname.$libext"
+ 		build_libtool_libs=module
+@@ -6997,9 +7995,9 @@ EOF
+       # Time to change all our "foo.ltframework" stuff back to "-framework foo"
+       case $host in
+ 	*-*-darwin*)
+-	  newdeplibs=`$ECHO "X $newdeplibs" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
+-	  new_inherited_linker_flags=`$ECHO "X $new_inherited_linker_flags" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
+-	  deplibs=`$ECHO "X $deplibs" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
++	  newdeplibs=`$ECHO " $newdeplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
++	  new_inherited_linker_flags=`$ECHO " $new_inherited_linker_flags" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
++	  deplibs=`$ECHO " $deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
+ 	  ;;
+       esac
+ 
+@@ -7012,7 +8010,7 @@ EOF
+ 	*)
+ 	  case " $deplibs " in
+ 	  *" -L$path/$objdir "*)
+-	    new_libs="$new_libs -L$path/$objdir" ;;
++	    func_append new_libs " -L$path/$objdir" ;;
+ 	  esac
+ 	  ;;
+ 	esac
+@@ -7022,10 +8020,10 @@ EOF
+ 	-L*)
+ 	  case " $new_libs " in
+ 	  *" $deplib "*) ;;
+-	  *) new_libs="$new_libs $deplib" ;;
++	  *) func_append new_libs " $deplib" ;;
+ 	  esac
+ 	  ;;
+-	*) new_libs="$new_libs $deplib" ;;
++	*) func_append new_libs " $deplib" ;;
+ 	esac
+       done
+       deplibs="$new_libs"
+@@ -7042,10 +8040,12 @@ EOF
+ 	  hardcode_libdirs=
+ 	  dep_rpath=
+ 	  rpath="$finalize_rpath"
+-	  test "$mode" != relink && rpath="$compile_rpath$rpath"
++	  test "$opt_mode" != relink && rpath="$compile_rpath$rpath"
+ 	  for libdir in $rpath; do
+ 	    if test -n "$hardcode_libdir_flag_spec"; then
+ 	      if test -n "$hardcode_libdir_separator"; then
++		func_replace_sysroot "$libdir"
++		libdir=$func_replace_sysroot_result
+ 		if test -z "$hardcode_libdirs"; then
+ 		  hardcode_libdirs="$libdir"
+ 		else
+@@ -7054,18 +8054,18 @@ EOF
+ 		  *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*)
+ 		    ;;
+ 		  *)
+-		    hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir"
++		    func_append hardcode_libdirs "$hardcode_libdir_separator$libdir"
+ 		    ;;
+ 		  esac
+ 		fi
+ 	      else
+ 		eval flag=\"$hardcode_libdir_flag_spec\"
+-		dep_rpath="$dep_rpath $flag"
++		func_append dep_rpath " $flag"
+ 	      fi
+ 	    elif test -n "$runpath_var"; then
+ 	      case "$perm_rpath " in
+ 	      *" $libdir "*) ;;
+-	      *) perm_rpath="$perm_rpath $libdir" ;;
++	      *) func_apped perm_rpath " $libdir" ;;
+ 	      esac
+ 	    fi
+ 	  done
+@@ -7083,7 +8083,7 @@ EOF
+ 	    # We should set the runpath_var.
+ 	    rpath=
+ 	    for dir in $perm_rpath; do
+-	      rpath="$rpath$dir:"
++	      func_append rpath "$dir:"
+ 	    done
+ 	    eval "$runpath_var='$rpath\$$runpath_var'; export $runpath_var"
+ 	  fi
+@@ -7091,7 +8091,7 @@ EOF
+ 	fi
+ 
+ 	shlibpath="$finalize_shlibpath"
+-	test "$mode" != relink && shlibpath="$compile_shlibpath$shlibpath"
++	test "$opt_mode" != relink && shlibpath="$compile_shlibpath$shlibpath"
+ 	if test -n "$shlibpath"; then
+ 	  eval "$shlibpath_var='$shlibpath\$$shlibpath_var'; export $shlibpath_var"
+ 	fi
+@@ -7117,18 +8117,18 @@ EOF
+ 	linknames=
+ 	for link
+ 	do
+-	  linknames="$linknames $link"
++	  func_append linknames " $link"
+ 	done
+ 
+ 	# Use standard objects if they are pic
+-	test -z "$pic_flag" && libobjs=`$ECHO "X$libobjs" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP`
++	test -z "$pic_flag" && libobjs=`$ECHO "$libobjs" | $SP2NL | $SED "$lo2o" | $NL2SP`
+ 	test "X$libobjs" = "X " && libobjs=
+ 
+ 	delfiles=
+ 	if test -n "$export_symbols" && test -n "$include_expsyms"; then
+ 	  $opt_dry_run || cp "$export_symbols" "$output_objdir/$libname.uexp"
+ 	  export_symbols="$output_objdir/$libname.uexp"
+-	  delfiles="$delfiles $export_symbols"
++	  func_append delfiles " $export_symbols"
+ 	fi
+ 
+ 	orig_export_symbols=
+@@ -7159,13 +8159,45 @@ EOF
+ 	    $opt_dry_run || $RM $export_symbols
+ 	    cmds=$export_symbols_cmds
+ 	    save_ifs="$IFS"; IFS='~'
+-	    for cmd in $cmds; do
++	    for cmd1 in $cmds; do
+ 	      IFS="$save_ifs"
+-	      eval cmd=\"$cmd\"
+-	      func_len " $cmd"
+-	      len=$func_len_result
+-	      if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then
++	      # Take the normal branch if the nm_file_list_spec branch
++	      # doesn't work or if tool conversion is not needed.
++	      case $nm_file_list_spec~$to_tool_file_cmd in
++		*~func_convert_file_noop | *~func_convert_file_msys_to_w32 | ~*)
++		  try_normal_branch=yes
++		  eval cmd=\"$cmd1\"
++		  func_len " $cmd"
++		  len=$func_len_result
++		  ;;
++		*)
++		  try_normal_branch=no
++		  ;;
++	      esac
++	      if test "$try_normal_branch" = yes \
++		 && { test "$len" -lt "$max_cmd_len" \
++		      || test "$max_cmd_len" -le -1; }
++	      then
++		func_show_eval "$cmd" 'exit $?'
++		skipped_export=false
++	      elif test -n "$nm_file_list_spec"; then
++		func_basename "$output"
++		output_la=$func_basename_result
++		save_libobjs=$libobjs
++		save_output=$output
++		output=${output_objdir}/${output_la}.nm
++		func_to_tool_file "$output"
++		libobjs=$nm_file_list_spec$func_to_tool_file_result
++		func_append delfiles " $output"
++		func_verbose "creating $NM input file list: $output"
++		for obj in $save_libobjs; do
++		  func_to_tool_file "$obj"
++		  $ECHO "$func_to_tool_file_result"
++		done > "$output"
++		eval cmd=\"$cmd1\"
+ 		func_show_eval "$cmd" 'exit $?'
++		output=$save_output
++		libobjs=$save_libobjs
+ 		skipped_export=false
+ 	      else
+ 		# The command line is too long to execute in one step.
+@@ -7187,7 +8219,7 @@ EOF
+ 	if test -n "$export_symbols" && test -n "$include_expsyms"; then
+ 	  tmp_export_symbols="$export_symbols"
+ 	  test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols"
+-	  $opt_dry_run || eval '$ECHO "X$include_expsyms" | $Xsed | $SP2NL >> "$tmp_export_symbols"'
++	  $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"'
+ 	fi
+ 
+ 	if test "X$skipped_export" != "X:" && test -n "$orig_export_symbols"; then
+@@ -7199,7 +8231,7 @@ EOF
+ 	  # global variables. join(1) would be nice here, but unfortunately
+ 	  # isn't a blessed tool.
+ 	  $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter
+-	  delfiles="$delfiles $export_symbols $output_objdir/$libname.filter"
++	  func_append delfiles " $export_symbols $output_objdir/$libname.filter"
+ 	  export_symbols=$output_objdir/$libname.def
+ 	  $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols
+ 	fi
+@@ -7209,7 +8241,7 @@ EOF
+ 	  case " $convenience " in
+ 	  *" $test_deplib "*) ;;
+ 	  *)
+-	    tmp_deplibs="$tmp_deplibs $test_deplib"
++	    func_append tmp_deplibs " $test_deplib"
+ 	    ;;
+ 	  esac
+ 	done
+@@ -7229,21 +8261,21 @@ EOF
+ 	    test "X$libobjs" = "X " && libobjs=
+ 	  else
+ 	    gentop="$output_objdir/${outputname}x"
+-	    generated="$generated $gentop"
++	    func_append generated " $gentop"
+ 
+ 	    func_extract_archives $gentop $convenience
+-	    libobjs="$libobjs $func_extract_archives_result"
++	    func_append libobjs " $func_extract_archives_result"
+ 	    test "X$libobjs" = "X " && libobjs=
+ 	  fi
+ 	fi
+ 
+ 	if test "$thread_safe" = yes && test -n "$thread_safe_flag_spec"; then
+ 	  eval flag=\"$thread_safe_flag_spec\"
+-	  linker_flags="$linker_flags $flag"
++	  func_append linker_flags " $flag"
+ 	fi
+ 
+ 	# Make a backup of the uninstalled library when relinking
+-	if test "$mode" = relink; then
++	if test "$opt_mode" = relink; then
+ 	  $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}U && $MV $realname ${realname}U)' || exit $?
+ 	fi
+ 
+@@ -7288,7 +8320,8 @@ EOF
+ 	    save_libobjs=$libobjs
+ 	  fi
+ 	  save_output=$output
+-	  output_la=`$ECHO "X$output" | $Xsed -e "$basename"`
++	  func_basename "$output"
++	  output_la=$func_basename_result
+ 
+ 	  # Clear the reloadable object creation command queue and
+ 	  # initialize k to one.
+@@ -7301,13 +8334,16 @@ EOF
+ 	  if test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "$with_gnu_ld" = yes; then
+ 	    output=${output_objdir}/${output_la}.lnkscript
+ 	    func_verbose "creating GNU ld script: $output"
+-	    $ECHO 'INPUT (' > $output
++	    echo 'INPUT (' > $output
+ 	    for obj in $save_libobjs
+ 	    do
+-	      $ECHO "$obj" >> $output
++	      func_to_tool_file "$obj"
++	      $ECHO "$func_to_tool_file_result" >> $output
+ 	    done
+-	    $ECHO ')' >> $output
+-	    delfiles="$delfiles $output"
++	    echo ')' >> $output
++	    func_append delfiles " $output"
++	    func_to_tool_file "$output"
++	    output=$func_to_tool_file_result
+ 	  elif test -n "$save_libobjs" && test "X$skipped_export" != "X:" && test "X$file_list_spec" != X; then
+ 	    output=${output_objdir}/${output_la}.lnk
+ 	    func_verbose "creating linker input file list: $output"
+@@ -7321,10 +8357,12 @@ EOF
+ 	    fi
+ 	    for obj
+ 	    do
+-	      $ECHO "$obj" >> $output
++	      func_to_tool_file "$obj"
++	      $ECHO "$func_to_tool_file_result" >> $output
+ 	    done
+-	    delfiles="$delfiles $output"
+-	    output=$firstobj\"$file_list_spec$output\"
++	    func_append delfiles " $output"
++	    func_to_tool_file "$output"
++	    output=$firstobj\"$file_list_spec$func_to_tool_file_result\"
+ 	  else
+ 	    if test -n "$save_libobjs"; then
+ 	      func_verbose "creating reloadable object files..."
+@@ -7348,17 +8386,19 @@ EOF
+ 		  # command to the queue.
+ 		  if test "$k" -eq 1 ; then
+ 		    # The first file doesn't have a previous command to add.
+-		    eval concat_cmds=\"$reload_cmds $objlist $last_robj\"
++		    reload_objs=$objlist
++		    eval concat_cmds=\"$reload_cmds\"
+ 		  else
+ 		    # All subsequent reloadable object files will link in
+ 		    # the last one created.
+-		    eval concat_cmds=\"\$concat_cmds~$reload_cmds $objlist $last_robj~\$RM $last_robj\"
++		    reload_objs="$objlist $last_robj"
++		    eval concat_cmds=\"\$concat_cmds~$reload_cmds~\$RM $last_robj\"
+ 		  fi
+ 		  last_robj=$output_objdir/$output_la-${k}.$objext
+ 		  func_arith $k + 1
+ 		  k=$func_arith_result
+ 		  output=$output_objdir/$output_la-${k}.$objext
+-		  objlist=$obj
++		  objlist=" $obj"
+ 		  func_len " $last_robj"
+ 		  func_arith $len0 + $func_len_result
+ 		  len=$func_arith_result
+@@ -7368,11 +8408,12 @@ EOF
+ 	      # reloadable object file.  All subsequent reloadable object
+ 	      # files will link in the last one created.
+ 	      test -z "$concat_cmds" || concat_cmds=$concat_cmds~
+-	      eval concat_cmds=\"\${concat_cmds}$reload_cmds $objlist $last_robj\"
++	      reload_objs="$objlist $last_robj"
++	      eval concat_cmds=\"\${concat_cmds}$reload_cmds\"
+ 	      if test -n "$last_robj"; then
+ 	        eval concat_cmds=\"\${concat_cmds}~\$RM $last_robj\"
+ 	      fi
+-	      delfiles="$delfiles $output"
++	      func_append delfiles " $output"
+ 
+ 	    else
+ 	      output=
+@@ -7406,7 +8447,7 @@ EOF
+ 		lt_exit=$?
+ 
+ 		# Restore the uninstalled library and exit
+-		if test "$mode" = relink; then
++		if test "$opt_mode" = relink; then
+ 		  ( cd "$output_objdir" && \
+ 		    $RM "${realname}T" && \
+ 		    $MV "${realname}U" "$realname" )
+@@ -7427,7 +8468,7 @@ EOF
+ 	    if test -n "$export_symbols" && test -n "$include_expsyms"; then
+ 	      tmp_export_symbols="$export_symbols"
+ 	      test -n "$orig_export_symbols" && tmp_export_symbols="$orig_export_symbols"
+-	      $opt_dry_run || eval '$ECHO "X$include_expsyms" | $Xsed | $SP2NL >> "$tmp_export_symbols"'
++	      $opt_dry_run || eval '$ECHO "$include_expsyms" | $SP2NL >> "$tmp_export_symbols"'
+ 	    fi
+ 
+ 	    if test -n "$orig_export_symbols"; then
+@@ -7439,7 +8480,7 @@ EOF
+ 	      # global variables. join(1) would be nice here, but unfortunately
+ 	      # isn't a blessed tool.
+ 	      $opt_dry_run || $SED -e '/[ ,]DATA/!d;s,\(.*\)\([ \,].*\),s|^\1$|\1\2|,' < $export_symbols > $output_objdir/$libname.filter
+-	      delfiles="$delfiles $export_symbols $output_objdir/$libname.filter"
++	      func_append delfiles " $export_symbols $output_objdir/$libname.filter"
+ 	      export_symbols=$output_objdir/$libname.def
+ 	      $opt_dry_run || $SED -f $output_objdir/$libname.filter < $orig_export_symbols > $export_symbols
+ 	    fi
+@@ -7480,10 +8521,10 @@ EOF
+ 	# Add any objects from preloaded convenience libraries
+ 	if test -n "$dlprefiles"; then
+ 	  gentop="$output_objdir/${outputname}x"
+-	  generated="$generated $gentop"
++	  func_append generated " $gentop"
+ 
+ 	  func_extract_archives $gentop $dlprefiles
+-	  libobjs="$libobjs $func_extract_archives_result"
++	  func_append libobjs " $func_extract_archives_result"
+ 	  test "X$libobjs" = "X " && libobjs=
+ 	fi
+ 
+@@ -7499,7 +8540,7 @@ EOF
+ 	    lt_exit=$?
+ 
+ 	    # Restore the uninstalled library and exit
+-	    if test "$mode" = relink; then
++	    if test "$opt_mode" = relink; then
+ 	      ( cd "$output_objdir" && \
+ 	        $RM "${realname}T" && \
+ 		$MV "${realname}U" "$realname" )
+@@ -7511,7 +8552,7 @@ EOF
+ 	IFS="$save_ifs"
+ 
+ 	# Restore the uninstalled library and exit
+-	if test "$mode" = relink; then
++	if test "$opt_mode" = relink; then
+ 	  $opt_dry_run || eval '(cd $output_objdir && $RM ${realname}T && $MV $realname ${realname}T && $MV ${realname}U $realname)' || exit $?
+ 
+ 	  if test -n "$convenience"; then
+@@ -7592,18 +8633,21 @@ EOF
+       if test -n "$convenience"; then
+ 	if test -n "$whole_archive_flag_spec"; then
+ 	  eval tmp_whole_archive_flags=\"$whole_archive_flag_spec\"
+-	  reload_conv_objs=$reload_objs\ `$ECHO "X$tmp_whole_archive_flags" | $Xsed -e 's|,| |g'`
++	  reload_conv_objs=$reload_objs\ `$ECHO "$tmp_whole_archive_flags" | $SED 's|,| |g'`
+ 	else
+ 	  gentop="$output_objdir/${obj}x"
+-	  generated="$generated $gentop"
++	  func_append generated " $gentop"
+ 
+ 	  func_extract_archives $gentop $convenience
+ 	  reload_conv_objs="$reload_objs $func_extract_archives_result"
+ 	fi
+       fi
+ 
++      # If we're not building shared, we need to use non_pic_objs
++      test "$build_libtool_libs" != yes && libobjs="$non_pic_objects"
++
+       # Create the old-style object.
+-      reload_objs="$objs$old_deplibs "`$ECHO "X$libobjs" | $SP2NL | $Xsed -e '/\.'${libext}$'/d' -e '/\.lib$/d' -e "$lo2o" | $NL2SP`" $reload_conv_objs" ### testsuite: skip nested quoting test
++      reload_objs="$objs$old_deplibs "`$ECHO "$libobjs" | $SP2NL | $SED "/\.${libext}$/d; /\.lib$/d; $lo2o" | $NL2SP`" $reload_conv_objs" ### testsuite: skip nested quoting test
+ 
+       output="$obj"
+       func_execute_cmds "$reload_cmds" 'exit $?'
+@@ -7663,8 +8707,8 @@ EOF
+       case $host in
+       *-*-rhapsody* | *-*-darwin1.[012])
+ 	# On Rhapsody replace the C library is the System framework
+-	compile_deplibs=`$ECHO "X $compile_deplibs" | $Xsed -e 's/ -lc / System.ltframework /'`
+-	finalize_deplibs=`$ECHO "X $finalize_deplibs" | $Xsed -e 's/ -lc / System.ltframework /'`
++	compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's/ -lc / System.ltframework /'`
++	finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's/ -lc / System.ltframework /'`
+ 	;;
+       esac
+ 
+@@ -7675,14 +8719,14 @@ EOF
+ 	if test "$tagname" = CXX ; then
+ 	  case ${MACOSX_DEPLOYMENT_TARGET-10.0} in
+ 	    10.[0123])
+-	      compile_command="$compile_command ${wl}-bind_at_load"
+-	      finalize_command="$finalize_command ${wl}-bind_at_load"
++	      func_append compile_command " ${wl}-bind_at_load"
++	      func_append finalize_command " ${wl}-bind_at_load"
+ 	    ;;
+ 	  esac
+ 	fi
+ 	# Time to change all our "foo.ltframework" stuff back to "-framework foo"
+-	compile_deplibs=`$ECHO "X $compile_deplibs" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
+-	finalize_deplibs=`$ECHO "X $finalize_deplibs" | $Xsed -e 's% \([^ $]*\).ltframework% -framework \1%g'`
++	compile_deplibs=`$ECHO " $compile_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
++	finalize_deplibs=`$ECHO " $finalize_deplibs" | $SED 's% \([^ $]*\).ltframework% -framework \1%g'`
+ 	;;
+       esac
+ 
+@@ -7696,7 +8740,7 @@ EOF
+ 	*)
+ 	  case " $compile_deplibs " in
+ 	  *" -L$path/$objdir "*)
+-	    new_libs="$new_libs -L$path/$objdir" ;;
++	    func_append new_libs " -L$path/$objdir" ;;
+ 	  esac
+ 	  ;;
+ 	esac
+@@ -7706,17 +8750,17 @@ EOF
+ 	-L*)
+ 	  case " $new_libs " in
+ 	  *" $deplib "*) ;;
+-	  *) new_libs="$new_libs $deplib" ;;
++	  *) func_append new_libs " $deplib" ;;
+ 	  esac
+ 	  ;;
+-	*) new_libs="$new_libs $deplib" ;;
++	*) func_append new_libs " $deplib" ;;
+ 	esac
+       done
+       compile_deplibs="$new_libs"
+ 
+ 
+-      compile_command="$compile_command $compile_deplibs"
+-      finalize_command="$finalize_command $finalize_deplibs"
++      func_append compile_command " $compile_deplibs"
++      func_append finalize_command " $finalize_deplibs"
+ 
+       if test -n "$rpath$xrpath"; then
+ 	# If the user specified any rpath flags, then add them.
+@@ -7724,7 +8768,7 @@ EOF
+ 	  # This is the magic to use -rpath.
+ 	  case "$finalize_rpath " in
+ 	  *" $libdir "*) ;;
+-	  *) finalize_rpath="$finalize_rpath $libdir" ;;
++	  *) func_append finalize_rpath " $libdir" ;;
+ 	  esac
+ 	done
+       fi
+@@ -7743,18 +8787,18 @@ EOF
+ 	      *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*)
+ 		;;
+ 	      *)
+-		hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir"
++		func_append hardcode_libdirs "$hardcode_libdir_separator$libdir"
+ 		;;
+ 	      esac
+ 	    fi
+ 	  else
+ 	    eval flag=\"$hardcode_libdir_flag_spec\"
+-	    rpath="$rpath $flag"
++	    func_append rpath " $flag"
+ 	  fi
+ 	elif test -n "$runpath_var"; then
+ 	  case "$perm_rpath " in
+ 	  *" $libdir "*) ;;
+-	  *) perm_rpath="$perm_rpath $libdir" ;;
++	  *) func_append perm_rpath " $libdir" ;;
+ 	  esac
+ 	fi
+ 	case $host in
+@@ -7763,12 +8807,12 @@ EOF
+ 	  case :$dllsearchpath: in
+ 	  *":$libdir:"*) ;;
+ 	  ::) dllsearchpath=$libdir;;
+-	  *) dllsearchpath="$dllsearchpath:$libdir";;
++	  *) func_append dllsearchpath ":$libdir";;
+ 	  esac
+ 	  case :$dllsearchpath: in
+ 	  *":$testbindir:"*) ;;
+ 	  ::) dllsearchpath=$testbindir;;
+-	  *) dllsearchpath="$dllsearchpath:$testbindir";;
++	  *) func_append dllsearchpath ":$testbindir";;
+ 	  esac
+ 	  ;;
+ 	esac
+@@ -7794,18 +8838,18 @@ EOF
+ 	      *"$hardcode_libdir_separator$libdir$hardcode_libdir_separator"*)
+ 		;;
+ 	      *)
+-		hardcode_libdirs="$hardcode_libdirs$hardcode_libdir_separator$libdir"
++		func_append hardcode_libdirs "$hardcode_libdir_separator$libdir"
+ 		;;
+ 	      esac
+ 	    fi
+ 	  else
+ 	    eval flag=\"$hardcode_libdir_flag_spec\"
+-	    rpath="$rpath $flag"
++	    func_append rpath " $flag"
+ 	  fi
+ 	elif test -n "$runpath_var"; then
+ 	  case "$finalize_perm_rpath " in
+ 	  *" $libdir "*) ;;
+-	  *) finalize_perm_rpath="$finalize_perm_rpath $libdir" ;;
++	  *) func_append finalize_perm_rpath " $libdir" ;;
+ 	  esac
+ 	fi
+       done
+@@ -7819,8 +8863,8 @@ EOF
+ 
+       if test -n "$libobjs" && test "$build_old_libs" = yes; then
+ 	# Transform all the library objects into standard objects.
+-	compile_command=`$ECHO "X$compile_command" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP`
+-	finalize_command=`$ECHO "X$finalize_command" | $SP2NL | $Xsed -e "$lo2o" | $NL2SP`
++	compile_command=`$ECHO "$compile_command" | $SP2NL | $SED "$lo2o" | $NL2SP`
++	finalize_command=`$ECHO "$finalize_command" | $SP2NL | $SED "$lo2o" | $NL2SP`
+       fi
+ 
+       func_generate_dlsyms "$outputname" "@PROGRAM@" "no"
+@@ -7832,15 +8876,15 @@ EOF
+ 
+       wrappers_required=yes
+       case $host in
++      *cegcc* | *mingw32ce*)
++        # Disable wrappers for cegcc and mingw32ce hosts, we are cross compiling anyway.
++        wrappers_required=no
++        ;;
+       *cygwin* | *mingw* )
+         if test "$build_libtool_libs" != yes; then
+           wrappers_required=no
+         fi
+         ;;
+-      *cegcc)
+-        # Disable wrappers for cegcc, we are cross compiling anyway.
+-        wrappers_required=no
+-        ;;
+       *)
+         if test "$need_relink" = no || test "$build_libtool_libs" != yes; then
+           wrappers_required=no
+@@ -7849,13 +8893,19 @@ EOF
+       esac
+       if test "$wrappers_required" = no; then
+ 	# Replace the output file specification.
+-	compile_command=`$ECHO "X$compile_command" | $Xsed -e 's%@OUTPUT@%'"$output"'%g'`
++	compile_command=`$ECHO "$compile_command" | $SED 's%@OUTPUT@%'"$output"'%g'`
+ 	link_command="$compile_command$compile_rpath"
+ 
+ 	# We have no uninstalled library dependencies, so finalize right now.
+ 	exit_status=0
+ 	func_show_eval "$link_command" 'exit_status=$?'
+ 
++	if test -n "$postlink_cmds"; then
++	  func_to_tool_file "$output"
++	  postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'`
++	  func_execute_cmds "$postlink_cmds" 'exit $?'
++	fi
++
+ 	# Delete the generated files.
+ 	if test -f "$output_objdir/${outputname}S.${objext}"; then
+ 	  func_show_eval '$RM "$output_objdir/${outputname}S.${objext}"'
+@@ -7878,7 +8928,7 @@ EOF
+ 	  # We should set the runpath_var.
+ 	  rpath=
+ 	  for dir in $perm_rpath; do
+-	    rpath="$rpath$dir:"
++	    func_append rpath "$dir:"
+ 	  done
+ 	  compile_var="$runpath_var=\"$rpath\$$runpath_var\" "
+ 	fi
+@@ -7886,7 +8936,7 @@ EOF
+ 	  # We should set the runpath_var.
+ 	  rpath=
+ 	  for dir in $finalize_perm_rpath; do
+-	    rpath="$rpath$dir:"
++	    func_append rpath "$dir:"
+ 	  done
+ 	  finalize_var="$runpath_var=\"$rpath\$$runpath_var\" "
+ 	fi
+@@ -7896,11 +8946,18 @@ EOF
+ 	# We don't need to create a wrapper script.
+ 	link_command="$compile_var$compile_command$compile_rpath"
+ 	# Replace the output file specification.
+-	link_command=`$ECHO "X$link_command" | $Xsed -e 's%@OUTPUT@%'"$output"'%g'`
++	link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output"'%g'`
+ 	# Delete the old output file.
+ 	$opt_dry_run || $RM $output
+ 	# Link the executable and exit
+ 	func_show_eval "$link_command" 'exit $?'
++
++	if test -n "$postlink_cmds"; then
++	  func_to_tool_file "$output"
++	  postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'`
++	  func_execute_cmds "$postlink_cmds" 'exit $?'
++	fi
++
+ 	exit $EXIT_SUCCESS
+       fi
+ 
+@@ -7915,7 +8972,7 @@ EOF
+ 	if test "$fast_install" != no; then
+ 	  link_command="$finalize_var$compile_command$finalize_rpath"
+ 	  if test "$fast_install" = yes; then
+-	    relink_command=`$ECHO "X$compile_var$compile_command$compile_rpath" | $Xsed -e 's%@OUTPUT@%\$progdir/\$file%g'`
++	    relink_command=`$ECHO "$compile_var$compile_command$compile_rpath" | $SED 's%@OUTPUT@%\$progdir/\$file%g'`
+ 	  else
+ 	    # fast_install is set to needless
+ 	    relink_command=
+@@ -7927,13 +8984,19 @@ EOF
+       fi
+ 
+       # Replace the output file specification.
+-      link_command=`$ECHO "X$link_command" | $Xsed -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'`
++      link_command=`$ECHO "$link_command" | $SED 's%@OUTPUT@%'"$output_objdir/$outputname"'%g'`
+ 
+       # Delete the old output files.
+       $opt_dry_run || $RM $output $output_objdir/$outputname $output_objdir/lt-$outputname
+ 
+       func_show_eval "$link_command" 'exit $?'
+ 
++      if test -n "$postlink_cmds"; then
++	func_to_tool_file "$output_objdir/$outputname"
++	postlink_cmds=`func_echo_all "$postlink_cmds" | $SED -e 's%@OUTPUT@%'"$output_objdir/$outputname"'%g' -e 's%@TOOL_OUTPUT@%'"$func_to_tool_file_result"'%g'`
++	func_execute_cmds "$postlink_cmds" 'exit $?'
++      fi
++
+       # Now create the wrapper script.
+       func_verbose "creating $output"
+ 
+@@ -7951,18 +9014,7 @@ EOF
+ 	  fi
+ 	done
+ 	relink_command="(cd `pwd`; $relink_command)"
+-	relink_command=`$ECHO "X$relink_command" | $Xsed -e "$sed_quote_subst"`
+-      fi
+-
+-      # Quote $ECHO for shipping.
+-      if test "X$ECHO" = "X$SHELL $progpath --fallback-echo"; then
+-	case $progpath in
+-	[\\/]* | [A-Za-z]:[\\/]*) qecho="$SHELL $progpath --fallback-echo";;
+-	*) qecho="$SHELL `pwd`/$progpath --fallback-echo";;
+-	esac
+-	qecho=`$ECHO "X$qecho" | $Xsed -e "$sed_quote_subst"`
+-      else
+-	qecho=`$ECHO "X$ECHO" | $Xsed -e "$sed_quote_subst"`
++	relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"`
+       fi
+ 
+       # Only actually do things if not in dry run mode.
+@@ -8042,7 +9094,7 @@ EOF
+ 	else
+ 	  oldobjs="$old_deplibs $non_pic_objects"
+ 	  if test "$preload" = yes && test -f "$symfileobj"; then
+-	    oldobjs="$oldobjs $symfileobj"
++	    func_append oldobjs " $symfileobj"
+ 	  fi
+ 	fi
+ 	addlibs="$old_convenience"
+@@ -8050,10 +9102,10 @@ EOF
+ 
+       if test -n "$addlibs"; then
+ 	gentop="$output_objdir/${outputname}x"
+-	generated="$generated $gentop"
++	func_append generated " $gentop"
+ 
+ 	func_extract_archives $gentop $addlibs
+-	oldobjs="$oldobjs $func_extract_archives_result"
++	func_append oldobjs " $func_extract_archives_result"
+       fi
+ 
+       # Do each command in the archive commands.
+@@ -8064,10 +9116,10 @@ EOF
+ 	# Add any objects from preloaded convenience libraries
+ 	if test -n "$dlprefiles"; then
+ 	  gentop="$output_objdir/${outputname}x"
+-	  generated="$generated $gentop"
++	  func_append generated " $gentop"
+ 
+ 	  func_extract_archives $gentop $dlprefiles
+-	  oldobjs="$oldobjs $func_extract_archives_result"
++	  func_append oldobjs " $func_extract_archives_result"
+ 	fi
+ 
+ 	# POSIX demands no paths to be encoded in archives.  We have
+@@ -8083,9 +9135,9 @@ EOF
+ 	    done | sort | sort -uc >/dev/null 2>&1); then
+ 	  :
+ 	else
+-	  $ECHO "copying selected object files to avoid basename conflicts..."
++	  echo "copying selected object files to avoid basename conflicts..."
+ 	  gentop="$output_objdir/${outputname}x"
+-	  generated="$generated $gentop"
++	  func_append generated " $gentop"
+ 	  func_mkdir_p "$gentop"
+ 	  save_oldobjs=$oldobjs
+ 	  oldobjs=
+@@ -8109,9 +9161,9 @@ EOF
+ 		esac
+ 	      done
+ 	      func_show_eval "ln $obj $gentop/$newobj || cp $obj $gentop/$newobj"
+-	      oldobjs="$oldobjs $gentop/$newobj"
++	      func_append oldobjs " $gentop/$newobj"
+ 	      ;;
+-	    *) oldobjs="$oldobjs $obj" ;;
++	    *) func_append oldobjs " $obj" ;;
+ 	    esac
+ 	  done
+ 	fi
+@@ -8121,6 +9173,16 @@ EOF
+ 	len=$func_len_result
+ 	if test "$len" -lt "$max_cmd_len" || test "$max_cmd_len" -le -1; then
+ 	  cmds=$old_archive_cmds
++	elif test -n "$archiver_list_spec"; then
++	  func_verbose "using command file archive linking..."
++	  for obj in $oldobjs
++	  do
++	    func_to_tool_file "$obj"
++	    $ECHO "$func_to_tool_file_result"
++	  done > $output_objdir/$libname.libcmd
++	  func_to_tool_file "$output_objdir/$libname.libcmd"
++	  oldobjs=" $archiver_list_spec$func_to_tool_file_result"
++	  cmds=$old_archive_cmds
+ 	else
+ 	  # the command line is too long to link in one step, link in parts
+ 	  func_verbose "using piecewise archive linking..."
+@@ -8194,7 +9256,7 @@ EOF
+       done
+       # Quote the link command for shipping.
+       relink_command="(cd `pwd`; $SHELL $progpath $preserve_args --mode=relink $libtool_args @inst_prefix_dir@)"
+-      relink_command=`$ECHO "X$relink_command" | $Xsed -e "$sed_quote_subst"`
++      relink_command=`$ECHO "$relink_command" | $SED "$sed_quote_subst"`
+       if test "$hardcode_automatic" = yes ; then
+ 	relink_command=
+       fi
+@@ -8214,12 +9276,23 @@ EOF
+ 	      *.la)
+ 		func_basename "$deplib"
+ 		name="$func_basename_result"
+-		eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $deplib`
++		func_resolve_sysroot "$deplib"
++		eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $func_resolve_sysroot_result`
+ 		test -z "$libdir" && \
+ 		  func_fatal_error "\`$deplib' is not a valid libtool archive"
+-		newdependency_libs="$newdependency_libs $libdir/$name"
++		func_append newdependency_libs " ${lt_sysroot:+=}$libdir/$name"
++		;;
++	      -L*)
++		func_stripname -L '' "$deplib"
++		func_replace_sysroot "$func_stripname_result"
++		func_append newdependency_libs " -L$func_replace_sysroot_result"
+ 		;;
+-	      *) newdependency_libs="$newdependency_libs $deplib" ;;
++	      -R*)
++		func_stripname -R '' "$deplib"
++		func_replace_sysroot "$func_stripname_result"
++		func_append newdependency_libs " -R$func_replace_sysroot_result"
++		;;
++	      *) func_append newdependency_libs " $deplib" ;;
+ 	      esac
+ 	    done
+ 	    dependency_libs="$newdependency_libs"
+@@ -8233,9 +9306,9 @@ EOF
+ 		eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib`
+ 		test -z "$libdir" && \
+ 		  func_fatal_error "\`$lib' is not a valid libtool archive"
+-		newdlfiles="$newdlfiles $libdir/$name"
++		func_append newdlfiles " ${lt_sysroot:+=}$libdir/$name"
+ 		;;
+-	      *) newdlfiles="$newdlfiles $lib" ;;
++	      *) func_append newdlfiles " $lib" ;;
+ 	      esac
+ 	    done
+ 	    dlfiles="$newdlfiles"
+@@ -8252,7 +9325,7 @@ EOF
+ 		eval libdir=`${SED} -n -e 's/^libdir=\(.*\)$/\1/p' $lib`
+ 		test -z "$libdir" && \
+ 		  func_fatal_error "\`$lib' is not a valid libtool archive"
+-		newdlprefiles="$newdlprefiles $libdir/$name"
++		func_append newdlprefiles " ${lt_sysroot:+=}$libdir/$name"
+ 		;;
+ 	      esac
+ 	    done
+@@ -8264,7 +9337,7 @@ EOF
+ 		[\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;;
+ 		*) abs=`pwd`"/$lib" ;;
+ 	      esac
+-	      newdlfiles="$newdlfiles $abs"
++	      func_append newdlfiles " $abs"
+ 	    done
+ 	    dlfiles="$newdlfiles"
+ 	    newdlprefiles=
+@@ -8273,7 +9346,7 @@ EOF
+ 		[\\/]* | [A-Za-z]:[\\/]*) abs="$lib" ;;
+ 		*) abs=`pwd`"/$lib" ;;
+ 	      esac
+-	      newdlprefiles="$newdlprefiles $abs"
++	      func_append newdlprefiles " $abs"
+ 	    done
+ 	    dlprefiles="$newdlprefiles"
+ 	  fi
+@@ -8358,7 +9431,7 @@ relink_command=\"$relink_command\""
+     exit $EXIT_SUCCESS
+ }
+ 
+-{ test "$mode" = link || test "$mode" = relink; } &&
++{ test "$opt_mode" = link || test "$opt_mode" = relink; } &&
+     func_mode_link ${1+"$@"}
+ 
+ 
+@@ -8378,9 +9451,9 @@ func_mode_uninstall ()
+     for arg
+     do
+       case $arg in
+-      -f) RM="$RM $arg"; rmforce=yes ;;
+-      -*) RM="$RM $arg" ;;
+-      *) files="$files $arg" ;;
++      -f) func_append RM " $arg"; rmforce=yes ;;
++      -*) func_append RM " $arg" ;;
++      *) func_append files " $arg" ;;
+       esac
+     done
+ 
+@@ -8389,24 +9462,23 @@ func_mode_uninstall ()
+ 
+     rmdirs=
+ 
+-    origobjdir="$objdir"
+     for file in $files; do
+       func_dirname "$file" "" "."
+       dir="$func_dirname_result"
+       if test "X$dir" = X.; then
+-	objdir="$origobjdir"
++	odir="$objdir"
+       else
+-	objdir="$dir/$origobjdir"
++	odir="$dir/$objdir"
+       fi
+       func_basename "$file"
+       name="$func_basename_result"
+-      test "$mode" = uninstall && objdir="$dir"
++      test "$opt_mode" = uninstall && odir="$dir"
+ 
+-      # Remember objdir for removal later, being careful to avoid duplicates
+-      if test "$mode" = clean; then
++      # Remember odir for removal later, being careful to avoid duplicates
++      if test "$opt_mode" = clean; then
+ 	case " $rmdirs " in
+-	  *" $objdir "*) ;;
+-	  *) rmdirs="$rmdirs $objdir" ;;
++	  *" $odir "*) ;;
++	  *) func_append rmdirs " $odir" ;;
+ 	esac
+       fi
+ 
+@@ -8432,18 +9504,17 @@ func_mode_uninstall ()
+ 
+ 	  # Delete the libtool libraries and symlinks.
+ 	  for n in $library_names; do
+-	    rmfiles="$rmfiles $objdir/$n"
++	    func_append rmfiles " $odir/$n"
+ 	  done
+-	  test -n "$old_library" && rmfiles="$rmfiles $objdir/$old_library"
++	  test -n "$old_library" && func_append rmfiles " $odir/$old_library"
+ 
+-	  case "$mode" in
++	  case "$opt_mode" in
+ 	  clean)
+-	    case "  $library_names " in
+-	    # "  " in the beginning catches empty $dlname
++	    case " $library_names " in
+ 	    *" $dlname "*) ;;
+-	    *) rmfiles="$rmfiles $objdir/$dlname" ;;
++	    *) test -n "$dlname" && func_append rmfiles " $odir/$dlname" ;;
+ 	    esac
+-	    test -n "$libdir" && rmfiles="$rmfiles $objdir/$name $objdir/${name}i"
++	    test -n "$libdir" && func_append rmfiles " $odir/$name $odir/${name}i"
+ 	    ;;
+ 	  uninstall)
+ 	    if test -n "$library_names"; then
+@@ -8471,19 +9542,19 @@ func_mode_uninstall ()
+ 	  # Add PIC object to the list of files to remove.
+ 	  if test -n "$pic_object" &&
+ 	     test "$pic_object" != none; then
+-	    rmfiles="$rmfiles $dir/$pic_object"
++	    func_append rmfiles " $dir/$pic_object"
+ 	  fi
+ 
+ 	  # Add non-PIC object to the list of files to remove.
+ 	  if test -n "$non_pic_object" &&
+ 	     test "$non_pic_object" != none; then
+-	    rmfiles="$rmfiles $dir/$non_pic_object"
++	    func_append rmfiles " $dir/$non_pic_object"
+ 	  fi
+ 	fi
+ 	;;
+ 
+       *)
+-	if test "$mode" = clean ; then
++	if test "$opt_mode" = clean ; then
+ 	  noexename=$name
+ 	  case $file in
+ 	  *.exe)
+@@ -8493,7 +9564,7 @@ func_mode_uninstall ()
+ 	    noexename=$func_stripname_result
+ 	    # $file with .exe has already been added to rmfiles,
+ 	    # add $file without .exe
+-	    rmfiles="$rmfiles $file"
++	    func_append rmfiles " $file"
+ 	    ;;
+ 	  esac
+ 	  # Do a test to see if this is a libtool program.
+@@ -8502,7 +9573,7 @@ func_mode_uninstall ()
+ 	      func_ltwrapper_scriptname "$file"
+ 	      relink_command=
+ 	      func_source $func_ltwrapper_scriptname_result
+-	      rmfiles="$rmfiles $func_ltwrapper_scriptname_result"
++	      func_append rmfiles " $func_ltwrapper_scriptname_result"
+ 	    else
+ 	      relink_command=
+ 	      func_source $dir/$noexename
+@@ -8510,12 +9581,12 @@ func_mode_uninstall ()
+ 
+ 	    # note $name still contains .exe if it was in $file originally
+ 	    # as does the version of $file that was added into $rmfiles
+-	    rmfiles="$rmfiles $objdir/$name $objdir/${name}S.${objext}"
++	    func_append rmfiles " $odir/$name $odir/${name}S.${objext}"
+ 	    if test "$fast_install" = yes && test -n "$relink_command"; then
+-	      rmfiles="$rmfiles $objdir/lt-$name"
++	      func_append rmfiles " $odir/lt-$name"
+ 	    fi
+ 	    if test "X$noexename" != "X$name" ; then
+-	      rmfiles="$rmfiles $objdir/lt-${noexename}.c"
++	      func_append rmfiles " $odir/lt-${noexename}.c"
+ 	    fi
+ 	  fi
+ 	fi
+@@ -8523,7 +9594,6 @@ func_mode_uninstall ()
+       esac
+       func_show_eval "$RM $rmfiles" 'exit_status=1'
+     done
+-    objdir="$origobjdir"
+ 
+     # Try to remove the ${objdir}s in the directories where we deleted files
+     for dir in $rmdirs; do
+@@ -8535,16 +9605,16 @@ func_mode_uninstall ()
+     exit $exit_status
+ }
+ 
+-{ test "$mode" = uninstall || test "$mode" = clean; } &&
++{ test "$opt_mode" = uninstall || test "$opt_mode" = clean; } &&
+     func_mode_uninstall ${1+"$@"}
+ 
+-test -z "$mode" && {
++test -z "$opt_mode" && {
+   help="$generic_help"
+   func_fatal_help "you must specify a MODE"
+ }
+ 
+ test -z "$exec_cmd" && \
+-  func_fatal_help "invalid operation mode \`$mode'"
++  func_fatal_help "invalid operation mode \`$opt_mode'"
+ 
+ if test -n "$exec_cmd"; then
+   eval exec "$exec_cmd"
+@@ -8579,3 +9649,4 @@ build_old_libs=`case $build_libtool_libs
+ # sh-indentation:2
+ # End:
+ # vi:sw=2
++
+Index: binutils-2.20.1/ltoptions.m4
+===================================================================
+--- binutils-2.20.1.orig/ltoptions.m4
++++ binutils-2.20.1/ltoptions.m4
+@@ -1,13 +1,14 @@
+ # Helper functions for option handling.                    -*- Autoconf -*-
+ #
+-#   Copyright (C) 2004, 2005, 2007, 2008 Free Software Foundation, Inc.
++#   Copyright (C) 2004, 2005, 2007, 2008, 2009 Free Software Foundation,
++#   Inc.
+ #   Written by Gary V. Vaughan, 2004
+ #
+ # This file is free software; the Free Software Foundation gives
+ # unlimited permission to copy and/or distribute it, with or without
+ # modifications, as long as this notice is preserved.
+ 
+-# serial 6 ltoptions.m4
++# serial 7 ltoptions.m4
+ 
+ # This is to help aclocal find these macros, as it can't see m4_define.
+ AC_DEFUN([LTOPTIONS_VERSION], [m4_if([1])])
+@@ -125,7 +126,7 @@ LT_OPTION_DEFINE([LT_INIT], [win32-dll],
+ [enable_win32_dll=yes
+ 
+ case $host in
+-*-*-cygwin* | *-*-mingw* | *-*-pw32* | *-cegcc*)
++*-*-cygwin* | *-*-mingw* | *-*-pw32* | *-*-cegcc*)
+   AC_CHECK_TOOL(AS, as, false)
+   AC_CHECK_TOOL(DLLTOOL, dlltool, false)
+   AC_CHECK_TOOL(OBJDUMP, objdump, false)
+@@ -133,13 +134,13 @@ case $host in
+ esac
+ 
+ test -z "$AS" && AS=as
+-_LT_DECL([], [AS],      [0], [Assembler program])dnl
++_LT_DECL([], [AS],      [1], [Assembler program])dnl
+ 
+ test -z "$DLLTOOL" && DLLTOOL=dlltool
+-_LT_DECL([], [DLLTOOL], [0], [DLL creation program])dnl
++_LT_DECL([], [DLLTOOL], [1], [DLL creation program])dnl
+ 
+ test -z "$OBJDUMP" && OBJDUMP=objdump
+-_LT_DECL([], [OBJDUMP], [0], [Object dumper program])dnl
++_LT_DECL([], [OBJDUMP], [1], [Object dumper program])dnl
+ ])# win32-dll
+ 
+ AU_DEFUN([AC_LIBTOOL_WIN32_DLL],
+Index: binutils-2.20.1/ltversion.m4
+===================================================================
+--- binutils-2.20.1.orig/ltversion.m4
++++ binutils-2.20.1/ltversion.m4
+@@ -7,17 +7,17 @@
+ # unlimited permission to copy and/or distribute it, with or without
+ # modifications, as long as this notice is preserved.
+ 
+-# Generated from ltversion.in.
++# @configure_input@
+ 
+-# serial 3012 ltversion.m4
++# serial 3293 ltversion.m4
+ # This file is part of GNU Libtool
+ 
+-m4_define([LT_PACKAGE_VERSION], [2.2.6])
+-m4_define([LT_PACKAGE_REVISION], [1.3012])
++m4_define([LT_PACKAGE_VERSION], [2.4])
++m4_define([LT_PACKAGE_REVISION], [1.3293])
+ 
+ AC_DEFUN([LTVERSION_VERSION],
+-[macro_version='2.2.6'
+-macro_revision='1.3012'
++[macro_version='2.4'
++macro_revision='1.3293'
+ _LT_DECL(, macro_version, 0, [Which release of libtool.m4 was used?])
+ _LT_DECL(, macro_revision, 0)
+ ])
+Index: binutils-2.20.1/lt~obsolete.m4
+===================================================================
+--- binutils-2.20.1.orig/lt~obsolete.m4
++++ binutils-2.20.1/lt~obsolete.m4
+@@ -1,13 +1,13 @@
+ # lt~obsolete.m4 -- aclocal satisfying obsolete definitions.    -*-Autoconf-*-
+ #
+-#   Copyright (C) 2004, 2005, 2007 Free Software Foundation, Inc.
++#   Copyright (C) 2004, 2005, 2007, 2009 Free Software Foundation, Inc.
+ #   Written by Scott James Remnant, 2004.
+ #
+ # This file is free software; the Free Software Foundation gives
+ # unlimited permission to copy and/or distribute it, with or without
+ # modifications, as long as this notice is preserved.
+ 
+-# serial 4 lt~obsolete.m4
++# serial 5 lt~obsolete.m4
+ 
+ # These exist entirely to fool aclocal when bootstrapping libtool.
+ #
+@@ -77,7 +77,6 @@ m4_ifndef([AC_DISABLE_FAST_INSTALL],	[AC
+ m4_ifndef([_LT_AC_LANG_CXX],		[AC_DEFUN([_LT_AC_LANG_CXX])])
+ m4_ifndef([_LT_AC_LANG_F77],		[AC_DEFUN([_LT_AC_LANG_F77])])
+ m4_ifndef([_LT_AC_LANG_GCJ],		[AC_DEFUN([_LT_AC_LANG_GCJ])])
+-m4_ifndef([AC_LIBTOOL_RC],		[AC_DEFUN([AC_LIBTOOL_RC])])
+ m4_ifndef([AC_LIBTOOL_LANG_C_CONFIG],	[AC_DEFUN([AC_LIBTOOL_LANG_C_CONFIG])])
+ m4_ifndef([_LT_AC_LANG_C_CONFIG],	[AC_DEFUN([_LT_AC_LANG_C_CONFIG])])
+ m4_ifndef([AC_LIBTOOL_LANG_CXX_CONFIG],	[AC_DEFUN([AC_LIBTOOL_LANG_CXX_CONFIG])])
+@@ -90,3 +89,10 @@ m4_ifndef([AC_LIBTOOL_LANG_RC_CONFIG],	[
+ m4_ifndef([_LT_AC_LANG_RC_CONFIG],	[AC_DEFUN([_LT_AC_LANG_RC_CONFIG])])
+ m4_ifndef([AC_LIBTOOL_CONFIG],		[AC_DEFUN([AC_LIBTOOL_CONFIG])])
+ m4_ifndef([_LT_AC_FILE_LTDLL_C],	[AC_DEFUN([_LT_AC_FILE_LTDLL_C])])
++m4_ifndef([_LT_REQUIRED_DARWIN_CHECKS],	[AC_DEFUN([_LT_REQUIRED_DARWIN_CHECKS])])
++m4_ifndef([_LT_AC_PROG_CXXCPP],		[AC_DEFUN([_LT_AC_PROG_CXXCPP])])
++m4_ifndef([_LT_PREPARE_SED_QUOTE_VARS],	[AC_DEFUN([_LT_PREPARE_SED_QUOTE_VARS])])
++m4_ifndef([_LT_PROG_ECHO_BACKSLASH],	[AC_DEFUN([_LT_PROG_ECHO_BACKSLASH])])
++m4_ifndef([_LT_PROG_F77],		[AC_DEFUN([_LT_PROG_F77])])
++m4_ifndef([_LT_PROG_FC],		[AC_DEFUN([_LT_PROG_FC])])
++m4_ifndef([_LT_PROG_CXX],		[AC_DEFUN([_LT_PROG_CXX])])
+Index: binutils-2.20.1/libtool.m4
+===================================================================
+--- binutils-2.20.1.orig/libtool.m4
++++ binutils-2.20.1/libtool.m4
+@@ -1,7 +1,8 @@
+ # libtool.m4 - Configure libtool for the host system. -*-Autoconf-*-
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ # This file is free software; the Free Software Foundation gives
+@@ -10,7 +11,8 @@
+ 
+ m4_define([_LT_COPYING], [dnl
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -37,7 +39,7 @@ m4_define([_LT_COPYING], [dnl
+ # 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
+ ])
+ 
+-# serial 56 LT_INIT
++# serial 57 LT_INIT
+ 
+ 
+ # LT_PREREQ(VERSION)
+@@ -66,6 +68,7 @@ esac
+ # ------------------
+ AC_DEFUN([LT_INIT],
+ [AC_PREREQ([2.58])dnl We use AC_INCLUDES_DEFAULT
++AC_REQUIRE([AC_CONFIG_AUX_DIR_DEFAULT])dnl
+ AC_BEFORE([$0], [LT_LANG])dnl
+ AC_BEFORE([$0], [LT_OUTPUT])dnl
+ AC_BEFORE([$0], [LTDL_INIT])dnl
+@@ -82,6 +85,8 @@ AC_REQUIRE([LTVERSION_VERSION])dnl
+ AC_REQUIRE([LTOBSOLETE_VERSION])dnl
+ m4_require([_LT_PROG_LTMAIN])dnl
+ 
++_LT_SHELL_INIT([SHELL=${CONFIG_SHELL-/bin/sh}])
++
+ dnl Parse OPTIONS
+ _LT_SET_OPTIONS([$0], [$1])
+ 
+@@ -89,7 +94,8 @@ _LT_SET_OPTIONS([$0], [$1])
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
+ AC_SUBST(LIBTOOL)dnl
+ 
+ _LT_SETUP
+@@ -118,7 +124,7 @@ m4_defun([_LT_CC_BASENAME],
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ ])
+ 
+ 
+@@ -138,6 +144,9 @@ m4_defun([_LT_FILEUTILS_DEFAULTS],
+ m4_defun([_LT_SETUP],
+ [AC_REQUIRE([AC_CANONICAL_HOST])dnl
+ AC_REQUIRE([AC_CANONICAL_BUILD])dnl
++AC_REQUIRE([_LT_PREPARE_SED_QUOTE_VARS])dnl
++AC_REQUIRE([_LT_PROG_ECHO_BACKSLASH])dnl
++
+ _LT_DECL([], [host_alias], [0], [The host system])dnl
+ _LT_DECL([], [host], [0])dnl
+ _LT_DECL([], [host_os], [0])dnl
+@@ -160,10 +169,13 @@ _LT_DECL([], [exeext], [0], [Executable
+ dnl
+ m4_require([_LT_FILEUTILS_DEFAULTS])dnl
+ m4_require([_LT_CHECK_SHELL_FEATURES])dnl
++m4_require([_LT_PATH_CONVERSION_FUNCTIONS])dnl
+ m4_require([_LT_CMD_RELOAD])dnl
+ m4_require([_LT_CHECK_MAGIC_METHOD])dnl
++m4_require([_LT_CHECK_SHAREDLIB_FROM_LINKLIB])dnl
+ m4_require([_LT_CMD_OLD_ARCHIVE])dnl
+ m4_require([_LT_CMD_GLOBAL_SYMBOLS])dnl
++m4_require([_LT_WITH_SYSROOT])dnl
+ 
+ _LT_CONFIG_LIBTOOL_INIT([
+ # See if we are running on zsh, and set the options which allow our
+@@ -179,7 +191,6 @@ fi
+ _LT_CHECK_OBJDIR
+ 
+ m4_require([_LT_TAG_COMPILER])dnl
+-_LT_PROG_ECHO_BACKSLASH
+ 
+ case $host_os in
+ aix3*)
+@@ -193,25 +204,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\([["`$\\]]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\([["`\\]]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -250,6 +244,28 @@ _LT_CONFIG_COMMANDS
+ ])# _LT_SETUP
+ 
+ 
++# _LT_PREPARE_SED_QUOTE_VARS
++# --------------------------
++# Define a few sed substitution that help us do robust quoting.
++m4_defun([_LT_PREPARE_SED_QUOTE_VARS],
++[# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\([["`$\\]]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\([["`\\]]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++])
++
+ # _LT_PROG_LTMAIN
+ # ---------------
+ # Note that this code is called both from `configure', and `config.status'
+@@ -408,7 +424,7 @@ m4_define([_lt_decl_all_varnames],
+ # declaration there will have the same value as in `configure'.  VARNAME
+ # must have a single quote delimited value for this to work.
+ m4_define([_LT_CONFIG_STATUS_DECLARE],
+-[$1='`$ECHO "X$][$1" | $Xsed -e "$delay_single_quote_subst"`'])
++[$1='`$ECHO "$][$1" | $SED "$delay_single_quote_subst"`'])
+ 
+ 
+ # _LT_CONFIG_STATUS_DECLARATIONS
+@@ -418,7 +434,7 @@ m4_define([_LT_CONFIG_STATUS_DECLARE],
+ # embedded single quotes properly.  In configure, this macro expands
+ # each variable declared with _LT_DECL (and _LT_TAGDECL) into:
+ #
+-#    <var>='`$ECHO "X$<var>" | $Xsed -e "$delay_single_quote_subst"`'
++#    <var>='`$ECHO "$<var>" | $SED "$delay_single_quote_subst"`'
+ m4_defun([_LT_CONFIG_STATUS_DECLARATIONS],
+ [m4_foreach([_lt_var], m4_quote(lt_decl_all_varnames),
+     [m4_n([_LT_CONFIG_STATUS_DECLARE(_lt_var)])])])
+@@ -517,12 +533,20 @@ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$[]1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+ for var in lt_decl_all_varnames([[ \
+ ]], lt_decl_quote_varnames); do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[[\\\\\\\`\\"\\\$]]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -533,9 +557,9 @@ done
+ # Double-quote double-evaled strings.
+ for var in lt_decl_all_varnames([[ \
+ ]], lt_decl_dquote_varnames); do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[[\\\\\\\`\\"\\\$]]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -543,16 +567,38 @@ for var in lt_decl_all_varnames([[ \
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\[$]0 --fallback-echo"')dnl "
+-  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\[$]0 --fallback-echo"\[$]/\[$]0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ _LT_OUTPUT_LIBTOOL_INIT
+ ])
+ 
++# _LT_GENERATED_FILE_INIT(FILE, [COMMENT])
++# ------------------------------------
++# Generate a child script FILE with all initialization necessary to
++# reuse the environment learned by the parent script, and make the
++# file executable.  If COMMENT is supplied, it is inserted after the
++# `#!' sequence but before initialization text begins.  After this
++# macro, additional text can be appended to FILE to form the body of
++# the child script.  The macro ends with non-zero status if the
++# file could not be fully written (such as if the disk is full).
++m4_ifdef([AS_INIT_GENERATED],
++[m4_defun([_LT_GENERATED_FILE_INIT],[AS_INIT_GENERATED($@)])],
++[m4_defun([_LT_GENERATED_FILE_INIT],
++[m4_require([AS_PREPARE])]dnl
++[m4_pushdef([AS_MESSAGE_LOG_FD])]dnl
++[lt_write_fail=0
++cat >$1 <<_ASEOF || lt_write_fail=1
++#! $SHELL
++# Generated by $as_me.
++$2
++SHELL=\${CONFIG_SHELL-$SHELL}
++export SHELL
++_ASEOF
++cat >>$1 <<\_ASEOF || lt_write_fail=1
++AS_SHELL_SANITIZE
++_AS_PREPARE
++exec AS_MESSAGE_FD>&1
++_ASEOF
++test $lt_write_fail = 0 && chmod +x $1[]dnl
++m4_popdef([AS_MESSAGE_LOG_FD])])])# _LT_GENERATED_FILE_INIT
+ 
+ # LT_OUTPUT
+ # ---------
+@@ -562,20 +608,11 @@ _LT_OUTPUT_LIBTOOL_INIT
+ AC_DEFUN([LT_OUTPUT],
+ [: ${CONFIG_LT=./config.lt}
+ AC_MSG_NOTICE([creating $CONFIG_LT])
+-cat >"$CONFIG_LT" <<_LTEOF
+-#! $SHELL
+-# Generated by $as_me.
+-# Run this file to recreate a libtool stub with the current configuration.
+-
+-lt_cl_silent=false
+-SHELL=\${CONFIG_SHELL-$SHELL}
+-_LTEOF
++_LT_GENERATED_FILE_INIT(["$CONFIG_LT"],
++[# Run this file to recreate a libtool stub with the current configuration.])
+ 
+ cat >>"$CONFIG_LT" <<\_LTEOF
+-AS_SHELL_SANITIZE
+-_AS_PREPARE
+-
+-exec AS_MESSAGE_FD>&1
++lt_cl_silent=false
+ exec AS_MESSAGE_LOG_FD>>config.log
+ {
+   echo
+@@ -601,7 +638,7 @@ m4_ifset([AC_PACKAGE_NAME], [AC_PACKAGE_
+ m4_ifset([AC_PACKAGE_VERSION], [ AC_PACKAGE_VERSION])
+ configured by $[0], generated by m4_PACKAGE_STRING.
+ 
+-Copyright (C) 2008 Free Software Foundation, Inc.
++Copyright (C) 2010 Free Software Foundation, Inc.
+ This config.lt script is free software; the Free Software Foundation
+ gives unlimited permision to copy, distribute and modify it."
+ 
+@@ -646,15 +683,13 @@ chmod +x "$CONFIG_LT"
+ # appending to config.log, which fails on DOS, as config.log is still kept
+ # open by configure.  Here we exec the FD to /dev/null, effectively closing
+ # config.log, so it can be properly (re)opened and appended to by config.lt.
+-if test "$no_create" != yes; then
+-  lt_cl_success=:
+-  test "$silent" = yes &&
+-    lt_config_lt_args="$lt_config_lt_args --quiet"
+-  exec AS_MESSAGE_LOG_FD>/dev/null
+-  $SHELL "$CONFIG_LT" $lt_config_lt_args || lt_cl_success=false
+-  exec AS_MESSAGE_LOG_FD>>config.log
+-  $lt_cl_success || AS_EXIT(1)
+-fi
++lt_cl_success=:
++test "$silent" = yes &&
++  lt_config_lt_args="$lt_config_lt_args --quiet"
++exec AS_MESSAGE_LOG_FD>/dev/null
++$SHELL "$CONFIG_LT" $lt_config_lt_args || lt_cl_success=false
++exec AS_MESSAGE_LOG_FD>>config.log
++$lt_cl_success || AS_EXIT(1)
+ ])# LT_OUTPUT
+ 
+ 
+@@ -717,15 +752,12 @@ _LT_EOF
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
+-  _LT_PROG_XSI_SHELLFNS
++  _LT_PROG_REPLACE_SHELLFNS
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ ],
+@@ -831,11 +863,13 @@ AU_DEFUN([AC_LIBTOOL_CXX], [LT_LANG(C++)
+ AU_DEFUN([AC_LIBTOOL_F77], [LT_LANG(Fortran 77)])
+ AU_DEFUN([AC_LIBTOOL_FC], [LT_LANG(Fortran)])
+ AU_DEFUN([AC_LIBTOOL_GCJ], [LT_LANG(Java)])
++AU_DEFUN([AC_LIBTOOL_RC], [LT_LANG(Windows Resource)])
+ dnl aclocal-1.4 backwards compatibility:
+ dnl AC_DEFUN([AC_LIBTOOL_CXX], [])
+ dnl AC_DEFUN([AC_LIBTOOL_F77], [])
+ dnl AC_DEFUN([AC_LIBTOOL_FC], [])
+ dnl AC_DEFUN([AC_LIBTOOL_GCJ], [])
++dnl AC_DEFUN([AC_LIBTOOL_RC], [])
+ 
+ 
+ # _LT_TAG_COMPILER
+@@ -940,6 +974,31 @@ m4_defun_once([_LT_REQUIRED_DARWIN_CHECK
+ 	[lt_cv_ld_exported_symbols_list=no])
+ 	LDFLAGS="$save_LDFLAGS"
+     ])
++    AC_CACHE_CHECK([for -force_load linker flag],[lt_cv_ld_force_load],
++      [lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&AS_MESSAGE_LOG_FD
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&AS_MESSAGE_LOG_FD
++      echo "$AR cru libconftest.a conftest.o" >&AS_MESSAGE_LOG_FD
++      $AR cru libconftest.a conftest.o 2>&AS_MESSAGE_LOG_FD
++      echo "$RANLIB libconftest.a" >&AS_MESSAGE_LOG_FD
++      $RANLIB libconftest.a 2>&AS_MESSAGE_LOG_FD
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&AS_MESSAGE_LOG_FD
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&AS_MESSAGE_LOG_FD
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++    ])
+     case $host_os in
+     rhapsody* | darwin1.[[012]])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -967,7 +1026,7 @@ m4_defun_once([_LT_REQUIRED_DARWIN_CHECK
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -987,7 +1046,11 @@ m4_defun([_LT_DARWIN_LINKER_FEATURES],
+   _LT_TAGVAR(hardcode_direct, $1)=no
+   _LT_TAGVAR(hardcode_automatic, $1)=yes
+   _LT_TAGVAR(hardcode_shlibpath_var, $1)=unsupported
+-  _LT_TAGVAR(whole_archive_flag_spec, $1)=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    _LT_TAGVAR(whole_archive_flag_spec, $1)='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    _LT_TAGVAR(whole_archive_flag_spec, $1)=''
++  fi
+   _LT_TAGVAR(link_all_deplibs, $1)=yes
+   _LT_TAGVAR(allow_undefined_flag, $1)="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -995,7 +1058,7 @@ m4_defun([_LT_DARWIN_LINKER_FEATURES],
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     _LT_TAGVAR(archive_cmds, $1)="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     _LT_TAGVAR(module_cmds, $1)="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     _LT_TAGVAR(archive_expsym_cmds, $1)="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -1011,203 +1074,142 @@ m4_defun([_LT_DARWIN_LINKER_FEATURES],
+   fi
+ ])
+ 
+-# _LT_SYS_MODULE_PATH_AIX
+-# -----------------------
++# _LT_SYS_MODULE_PATH_AIX([TAGNAME])
++# ----------------------------------
+ # Links a minimal program and checks the executable
+ # for the system default hardcoded library path. In most cases,
+ # this is /usr/lib:/lib, but when the MPI compilers are used
+ # the location of the communication and MPI libs are included too.
+ # If we don't find anything, use the default library path according
+ # to the aix ld manual.
++# Store the results from the different compilers for each TAGNAME.
++# Allow to override them for all tags through lt_cv_aix_libpath.
+ m4_defun([_LT_SYS_MODULE_PATH_AIX],
+ [m4_require([_LT_DECL_SED])dnl
+-AC_LINK_IFELSE(AC_LANG_PROGRAM,[
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi],[])
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  AC_CACHE_VAL([_LT_TAGVAR([lt_cv_aix_libpath_], [$1])],
++  [AC_LINK_IFELSE([AC_LANG_PROGRAM],[
++  lt_aix_libpath_sed='[
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }]'
++  _LT_TAGVAR([lt_cv_aix_libpath_], [$1])=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$_LT_TAGVAR([lt_cv_aix_libpath_], [$1])"; then
++    _LT_TAGVAR([lt_cv_aix_libpath_], [$1])=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi],[])
++  if test -z "$_LT_TAGVAR([lt_cv_aix_libpath_], [$1])"; then
++    _LT_TAGVAR([lt_cv_aix_libpath_], [$1])="/usr/lib:/lib"
++  fi
++  ])
++  aix_libpath=$_LT_TAGVAR([lt_cv_aix_libpath_], [$1])
++fi
+ ])# _LT_SYS_MODULE_PATH_AIX
+ 
+ 
+ # _LT_SHELL_INIT(ARG)
+ # -------------------
+ m4_define([_LT_SHELL_INIT],
+-[ifdef([AC_DIVERSION_NOTICE],
+-	     [AC_DIVERT_PUSH(AC_DIVERSION_NOTICE)],
+-	 [AC_DIVERT_PUSH(NOTICE)])
+-$1
+-AC_DIVERT_POP
+-])# _LT_SHELL_INIT
++[m4_divert_text([M4SH-INIT], [$1
++])])# _LT_SHELL_INIT
++
+ 
+ 
+ # _LT_PROG_ECHO_BACKSLASH
+ # -----------------------
+-# Add some code to the start of the generated configure script which
+-# will find an echo command which doesn't interpret backslashes.
++# Find how we can fake an echo command that does not interpret backslash.
++# In particular, with Autoconf 2.60 or later we add some code to the start
++# of the generated configure script which will find a shell with a builtin
++# printf (which we can use as an echo command).
+ m4_defun([_LT_PROG_ECHO_BACKSLASH],
+-[_LT_SHELL_INIT([
+-# Check that we are running under the correct shell.
+-SHELL=${CONFIG_SHELL-/bin/sh}
+-
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\[$]\\[$]0,'[$]0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X[$]1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X[$]1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
++[ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++AC_MSG_CHECKING([how to print strings])
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
+ else
+-  # Restart under the correct shell.
+-  exec $SHELL "[$]0" --no-reexec ${1+"[$]@"}
+-fi
+-
+-if test "X[$]1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-[$]*
+-_LT_EOF
+-  exit 0
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$[]1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
+ fi
+ 
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "[$]0"' 'sed 20q "[$]0"' 'sed 10q "[$]0"' 'sed 2q "[$]0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "[$]0" --no-reexec ${1+"[$]@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL [$]0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "[$]0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL [$]0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "[$]0"' 'sed 10q "[$]0"' 'sed 20q "[$]0"' 'sed 50q "[$]0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO "$*" 
++}
+ 
+-	  if test "$prev" != 'sed 50q "[$]0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "[$]0" ${1+"[$]@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
++case "$ECHO" in
++  printf*) AC_MSG_RESULT([printf]) ;;
++  print*) AC_MSG_RESULT([print -r]) ;;
++  *) AC_MSG_RESULT([cat]) ;;
++esac
+ 
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL [$]0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\[$]0 --fallback-echo"
+-fi
++m4_ifdef([_AS_DETECT_SUGGESTED],
++[_AS_DETECT_SUGGESTED([
++  test -n "${ZSH_VERSION+set}${BASH_VERSION+set}" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++    ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test "X`printf %s $ECHO`" = "X$ECHO" \
++      || test "X`print -r -- $ECHO`" = "X$ECHO" )])])
+ 
+-AC_SUBST(lt_ECHO)
+-])
+ _LT_DECL([], [SHELL], [1], [Shell to use when invoking shell scripts])
+-_LT_DECL([], [ECHO], [1],
+-    [An echo program that does not interpret backslashes])
++_LT_DECL([], [ECHO], [1], [An echo program that protects backslashes])
+ ])# _LT_PROG_ECHO_BACKSLASH
+ 
+ 
++# _LT_WITH_SYSROOT
++# ----------------
++AC_DEFUN([_LT_WITH_SYSROOT],
++[AC_MSG_CHECKING([for sysroot])
++AC_ARG_WITH([sysroot],
++[  --with-libtool-sysroot[=DIR] Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).],
++[], [with_libtool_sysroot=no])
++
++dnl lt_sysroot will always be passed unquoted.  We quote it here
++dnl in case the user passed a directory name.
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   AC_MSG_RESULT([${with_libtool_sysroot}])
++   AC_MSG_ERROR([The sysroot must be an absolute path.])
++   ;;
++esac
++
++ AC_MSG_RESULT([${lt_sysroot:-no}])
++_LT_DECL([], [lt_sysroot], [0], [The root where to search for ]dnl
++[dependent libraries, and in which our libraries should be installed.])])
++
+ # _LT_ENABLE_LOCK
+ # ---------------
+ m4_defun([_LT_ENABLE_LOCK],
+@@ -1236,7 +1238,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '[#]line __oline__ "configure"' > conftest.$ac_ext
++  echo '[#]line '$LINENO' "configure"' > conftest.$ac_ext
+   if AC_TRY_EVAL(ac_compile); then
+     if test "$lt_cv_prog_gnu_ld" = yes; then
+       case `/usr/bin/file conftest.$ac_objext` in
+@@ -1354,14 +1356,47 @@ need_locks="$enable_libtool_lock"
+ ])# _LT_ENABLE_LOCK
+ 
+ 
++# _LT_PROG_AR
++# -----------
++m4_defun([_LT_PROG_AR],
++[AC_CHECK_TOOLS(AR, [ar], false)
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++_LT_DECL([], [AR], [1], [The archiver])
++_LT_DECL([], [AR_FLAGS], [1], [Flags to create an archive])
++
++AC_CACHE_CHECK([for archiver @FILE support], [lt_cv_ar_at_file],
++  [lt_cv_ar_at_file=no
++   AC_COMPILE_IFELSE([AC_LANG_PROGRAM],
++     [echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&AS_MESSAGE_LOG_FD'
++      AC_TRY_EVAL([lt_ar_try])
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	AC_TRY_EVAL([lt_ar_try])
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++     ])
++  ])
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++_LT_DECL([], [archiver_list_spec], [1],
++  [How to feed a file listing to the archiver])
++])# _LT_PROG_AR
++
++
+ # _LT_CMD_OLD_ARCHIVE
+ # -------------------
+ m4_defun([_LT_CMD_OLD_ARCHIVE],
+-[AC_CHECK_TOOL(AR, ar, false)
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
+-_LT_DECL([], [AR], [1], [The archiver])
+-_LT_DECL([], [AR_FLAGS], [1])
++[_LT_PROG_AR
+ 
+ AC_CHECK_TOOL(STRIP, strip, :)
+ test -z "$STRIP" && STRIP=:
+@@ -1388,10 +1423,19 @@ if test -n "$RANLIB"; then
+   esac
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
++
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
+ _LT_DECL([], [old_postinstall_cmds], [2])
+ _LT_DECL([], [old_postuninstall_cmds], [2])
+ _LT_TAGDECL([], [old_archive_cmds], [2],
+     [Commands used to build an old-style archive])
++_LT_DECL([], [lock_old_archive_extraction], [0],
++    [Whether to use a lock for old archive extraction])
+ ])# _LT_CMD_OLD_ARCHIVE
+ 
+ 
+@@ -1416,15 +1460,15 @@ AC_CACHE_CHECK([$1], [$2],
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:__oline__: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&AS_MESSAGE_LOG_FD
+-   echo "$as_me:__oline__: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
++   echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        $2=yes
+@@ -1464,7 +1508,7 @@ AC_CACHE_CHECK([$1], [$2],
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&AS_MESSAGE_LOG_FD
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          $2=yes
+@@ -1527,6 +1571,11 @@ AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [d
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -1591,8 +1640,8 @@ AC_CACHE_VAL([lt_cv_sys_max_cmd_len], [d
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL [$]0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -1643,7 +1692,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-[#line __oline__ "configure"
++[#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -1684,7 +1733,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -1693,7 +1748,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -1869,16 +1928,16 @@ AC_CACHE_CHECK([if $compiler supports -c
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [[^ ]]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:__oline__: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&AS_MESSAGE_LOG_FD)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&AS_MESSAGE_LOG_FD
+-   echo "$as_me:__oline__: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
++   echo "$as_me:$LINENO: \$? = $ac_status" >&AS_MESSAGE_LOG_FD
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        _LT_TAGVAR(lt_cv_prog_compiler_c_o, $1)=yes
+@@ -2037,6 +2096,7 @@ m4_require([_LT_DECL_EGREP])dnl
+ m4_require([_LT_FILEUTILS_DEFAULTS])dnl
+ m4_require([_LT_DECL_OBJDUMP])dnl
+ m4_require([_LT_DECL_SED])dnl
++m4_require([_LT_CHECK_SHELL_FEATURES])dnl
+ AC_MSG_CHECKING([dynamic linker characteristics])
+ m4_if([$1],
+ 	[], [
+@@ -2045,16 +2105,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([[A-Za-z]]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -2067,7 +2134,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -2087,7 +2154,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[[lt_foo]]++; }
+   if (lt_freq[[lt_foo]] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([[A-Za-z]]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi])
+@@ -2175,7 +2248,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([[^/]]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -2206,8 +2279,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -2228,36 +2302,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++m4_if([$1], [],[
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"])
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | [$GREP ';[c-zC-Z]:/' >/dev/null]; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([[a-zA-Z]]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | [$GREP ';[c-zC-Z]:/' >/dev/null]; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[[.]]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -2344,6 +2465,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -2386,8 +2520,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[[3-9]]*)
+@@ -2477,7 +2613,7 @@ linux* | k*bsd*-gnu | kopensolaris*-gnu)
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \[$]2)); skip = 1; } { if (!skip) print \[$]0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \[$]2)); skip = 1; } { if (!skip) print \[$]0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -2710,6 +2846,8 @@ _LT_DECL([], [library_names_spec], [1],
+     The last name is the one that the linker finds with -lNAME]])
+ _LT_DECL([], [soname_spec], [1],
+     [[The coded name of the library, if different from the real name]])
++_LT_DECL([], [install_override_mode], [1],
++    [Permission mode override for installation of shared libraries])
+ _LT_DECL([], [postinstall_cmds], [2],
+     [Command to use after installation of a shared archive])
+ _LT_DECL([], [postuninstall_cmds], [2],
+@@ -2822,6 +2960,7 @@ AC_REQUIRE([AC_CANONICAL_HOST])dnl
+ AC_REQUIRE([AC_CANONICAL_BUILD])dnl
+ m4_require([_LT_DECL_SED])dnl
+ m4_require([_LT_DECL_EGREP])dnl
++m4_require([_LT_PROG_ECHO_BACKSLASH])dnl
+ 
+ AC_ARG_WITH([gnu-ld],
+     [AS_HELP_STRING([--with-gnu-ld],
+@@ -2943,6 +3082,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -2951,8 +3095,8 @@ case $host_os in
+     fi
+     ;;
+ esac
+-_LT_DECL([], [reload_flag], [1], [How to create reloadable object files])dnl
+-_LT_DECL([], [reload_cmds], [2])dnl
++_LT_TAGDECL([], [reload_flag], [1], [How to create reloadable object files])dnl
++_LT_TAGDECL([], [reload_cmds], [2])dnl
+ ])# _LT_CMD_RELOAD
+ 
+ 
+@@ -3004,16 +3148,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -3043,6 +3189,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -3051,11 +3201,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    [lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]']
++    [lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]']
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]].[[0-9]]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[[0-9]][[0-9]][[0-9]]|PA-RISC[[0-9]]\.[[0-9]]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -3155,6 +3305,21 @@ tpf*)
+   ;;
+ esac
+ ])
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[[\1]]\/[[\1]]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -3162,7 +3327,11 @@ test -z "$deplibs_check_method" && depli
+ _LT_DECL([], [deplibs_check_method], [1],
+     [Method to check whether dependent libraries are shared objects])
+ _LT_DECL([], [file_magic_cmd], [1],
+-    [Command to use when deplibs_check_method == "file_magic"])
++    [Command to use when deplibs_check_method = "file_magic"])
++_LT_DECL([], [file_magic_glob], [1],
++    [How to find potential files when deplibs_check_method = "file_magic"])
++_LT_DECL([], [want_nocaseglob], [1],
++    [Find potential files using nocaseglob when deplibs_check_method = "file_magic"])
+ ])# _LT_CHECK_MAGIC_METHOD
+ 
+ 
+@@ -3219,7 +3388,19 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  AC_CHECK_TOOLS(DUMPBIN, ["dumpbin -symbols" "link -dump -symbols"], :)
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    AC_CHECK_TOOLS(DUMPBIN, [dumpbin "link -dump"], :)
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+   AC_SUBST([DUMPBIN])
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -3232,13 +3413,13 @@ _LT_DECL([], [NM], [1], [A BSD- or MS-co
+ AC_CACHE_CHECK([the name lister ($NM) interface], [lt_cv_nm_interface],
+   [lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:__oline__: $ac_compile\"" >&AS_MESSAGE_LOG_FD)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&AS_MESSAGE_LOG_FD)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&AS_MESSAGE_LOG_FD
+-  (eval echo "\"\$as_me:__oline__: $NM \\\"conftest.$ac_objext\\\"\"" >&AS_MESSAGE_LOG_FD)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&AS_MESSAGE_LOG_FD)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&AS_MESSAGE_LOG_FD
+-  (eval echo "\"\$as_me:__oline__: output\"" >&AS_MESSAGE_LOG_FD)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&AS_MESSAGE_LOG_FD)
+   cat conftest.out >&AS_MESSAGE_LOG_FD
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -3253,6 +3434,67 @@ dnl aclocal-1.4 backwards compatibility:
+ dnl AC_DEFUN([AM_PROG_NM], [])
+ dnl AC_DEFUN([AC_PROG_NM], [])
+ 
++# _LT_CHECK_SHAREDLIB_FROM_LINKLIB
++# --------------------------------
++# how to determine the name of the shared library
++# associated with a specific link library.
++#  -- PORTME fill in with the dynamic library characteristics
++m4_defun([_LT_CHECK_SHAREDLIB_FROM_LINKLIB],
++[m4_require([_LT_DECL_EGREP])
++m4_require([_LT_DECL_OBJDUMP])
++m4_require([_LT_DECL_DLLTOOL])
++AC_CACHE_CHECK([how to associate runtime and link libraries],
++lt_cv_sharedlib_from_linklib_cmd,
++[lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++])
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
++
++_LT_DECL([], [sharedlib_from_linklib_cmd], [1],
++    [Command to associate shared and link libraries])
++])# _LT_CHECK_SHAREDLIB_FROM_LINKLIB
++
++
++# _LT_PATH_MANIFEST_TOOL
++# ----------------------
++# locate the manifest tool
++m4_defun([_LT_PATH_MANIFEST_TOOL],
++[AC_CHECK_TOOL(MANIFEST_TOOL, mt, :)
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++AC_CACHE_CHECK([if $MANIFEST_TOOL is a manifest tool], [lt_cv_path_mainfest_tool],
++  [lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&AS_MESSAGE_LOG_FD
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&AS_MESSAGE_LOG_FD
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*])
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++_LT_DECL([], [MANIFEST_TOOL], [1], [Manifest tool])dnl
++])# _LT_PATH_MANIFEST_TOOL
++
+ 
+ # LT_LIB_M
+ # --------
+@@ -3261,7 +3503,7 @@ AC_DEFUN([LT_LIB_M],
+ [AC_REQUIRE([AC_CANONICAL_HOST])dnl
+ LIBM=
+ case $host in
+-*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
++*-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*)
+   # These system don't have libm, or don't need it
+   ;;
+ *-ncr-sysv4.3*)
+@@ -3289,7 +3531,12 @@ m4_defun([_LT_COMPILER_NO_RTTI],
+ _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=
+ 
+ if test "$GCC" = yes; then
+-  _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -Xcompiler -fno-builtin' ;;
++  *)
++    _LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)=' -fno-builtin' ;;
++  esac
+ 
+   _LT_COMPILER_OPTION([if $compiler supports -fno-rtti -fno-exceptions],
+     lt_cv_prog_compiler_rtti_exceptions,
+@@ -3306,6 +3553,7 @@ _LT_TAGDECL([no_builtin_flag], [lt_prog_
+ m4_defun([_LT_CMD_GLOBAL_SYMBOLS],
+ [AC_REQUIRE([AC_CANONICAL_HOST])dnl
+ AC_REQUIRE([AC_PROG_CC])dnl
++AC_REQUIRE([AC_PROG_AWK])dnl
+ AC_REQUIRE([LT_PATH_NM])dnl
+ AC_REQUIRE([LT_PATH_LD])dnl
+ m4_require([_LT_DECL_SED])dnl
+@@ -3373,8 +3621,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([[^ ]]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \(lib[[^ ]]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([[^ ]]*\)[[ ]]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([[^ ]]*\) \(lib[[^ ]]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([[^ ]]*\) \([[^ ]]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -3410,6 +3658,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[[	 ]]\($symcode$symcode*\)[[	 ]][[	 ]]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -3431,7 +3680,7 @@ _LT_EOF
+   if AC_TRY_EVAL(ac_compile); then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if AC_TRY_EVAL(NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) && test -s "$nlist"; then
++    if AC_TRY_EVAL(NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) && test -s "$nlist"; then
+       # Try sorting and uniquifying the output.
+       if sort "$nlist" | uniq > "$nlist"T; then
+ 	mv -f "$nlist"T "$nlist"
+@@ -3443,6 +3692,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT@&t@_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT@&t@_DLSYM_CONST
++#else
++# define LT@&t@_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -3454,7 +3715,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT@&t@_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -3480,15 +3741,15 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$_LT_TAGVAR(lt_prog_compiler_no_builtin_flag, $1)"
+ 	  if AC_TRY_EVAL(ac_link) && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&AS_MESSAGE_LOG_FD
+ 	fi
+@@ -3521,6 +3782,13 @@ else
+   AC_MSG_RESULT(ok)
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[[@]]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
+ _LT_DECL([global_symbol_pipe], [lt_cv_sys_global_symbol_pipe], [1],
+     [Take the output of nm and produce a listing of raw symbols and C names])
+ _LT_DECL([global_symbol_to_cdecl], [lt_cv_sys_global_symbol_to_cdecl], [1],
+@@ -3531,6 +3799,8 @@ _LT_DECL([global_symbol_to_c_name_addres
+ _LT_DECL([global_symbol_to_c_name_address_lib_prefix],
+     [lt_cv_sys_global_symbol_to_c_name_address_lib_prefix], [1],
+     [Transform the output of nm in a C name address pair when lib prefix is needed])
++_LT_DECL([], [nm_file_list_spec], [1],
++    [Specify filename containing input files for $NM])
+ ]) # _LT_CMD_GLOBAL_SYMBOLS
+ 
+ 
+@@ -3542,7 +3812,6 @@ _LT_TAGVAR(lt_prog_compiler_wl, $1)=
+ _LT_TAGVAR(lt_prog_compiler_pic, $1)=
+ _LT_TAGVAR(lt_prog_compiler_static, $1)=
+ 
+-AC_MSG_CHECKING([for $compiler option to produce PIC])
+ m4_if([$1], [CXX], [
+   # C++ specific cases for pic, static, wl, etc.
+   if test "$GXX" = yes; then
+@@ -3593,6 +3862,11 @@ m4_if([$1], [CXX], [
+       # DJGPP does not support shared libraries at all
+       _LT_TAGVAR(lt_prog_compiler_pic, $1)=
+       ;;
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      _LT_TAGVAR(lt_prog_compiler_static, $1)=
++      ;;
+     interix[[3-9]]*)
+       # Interix 3.x gcc -fpic/-fPIC options generate broken code.
+       # Instead, we relocate shared libraries at runtime.
+@@ -3642,6 +3916,12 @@ m4_if([$1], [CXX], [
+ 	  ;;
+ 	esac
+ 	;;
++      mingw* | cygwin* | os2* | pw32* | cegcc*)
++	# This hack is so that the source file can tell whether it is being
++	# built for inclusion in a dll (and should export symbols for example).
++	m4_if([$1], [GCJ], [],
++	  [_LT_TAGVAR(lt_prog_compiler_pic, $1)='-DDLL_EXPORT'])
++	;;
+       dgux*)
+ 	case $cc_basename in
+ 	  ec++*)
+@@ -3731,8 +4011,8 @@ m4_if([$1], [CXX], [
+ 	    _LT_TAGVAR(lt_prog_compiler_pic, $1)=
+ 	    _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+ 	    ;;
+-	  xlc* | xlC*)
+-	    # IBM XL 8.0 on PPC
++	  xlc* | xlC* | bgxl[[cC]]* | mpixl[[cC]]*)
++	    # IBM XL 8.0, 9.0 on PPC and BlueGene
+ 	    _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+ 	    _LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic'
+ 	    _LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink'
+@@ -3794,7 +4074,7 @@ m4_if([$1], [CXX], [
+ 	;;
+       solaris*)
+ 	case $cc_basename in
+-	  CC*)
++	  CC* | sunCC*)
+ 	    # Sun C++ 4.2, 5.x and Centerline C++
+ 	    _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+ 	    _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+@@ -3898,6 +4178,12 @@ m4_if([$1], [CXX], [
+       _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      _LT_TAGVAR(lt_prog_compiler_static, $1)=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -3940,6 +4226,13 @@ m4_if([$1], [CXX], [
+       _LT_TAGVAR(lt_prog_compiler_pic, $1)='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Xlinker '
++      _LT_TAGVAR(lt_prog_compiler_pic, $1)='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -4003,7 +4296,13 @@ m4_if([$1], [CXX], [
+ 	_LT_TAGVAR(lt_prog_compiler_pic, $1)='--shared'
+ 	_LT_TAGVAR(lt_prog_compiler_static, $1)='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	_LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,-Wl,,'
++	_LT_TAGVAR(lt_prog_compiler_pic, $1)='-PIC'
++	_LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	_LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+@@ -4015,25 +4314,25 @@ m4_if([$1], [CXX], [
+         # All Alpha code is PIC.
+         _LT_TAGVAR(lt_prog_compiler_static, $1)='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	_LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+ 	_LT_TAGVAR(lt_prog_compiler_pic, $1)='-qpic'
+ 	_LT_TAGVAR(lt_prog_compiler_static, $1)='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+ 	  _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+-	  _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
++	  _LT_TAGVAR(lt_prog_compiler_wl, $1)=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+ 	  _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+-	  _LT_TAGVAR(lt_prog_compiler_wl, $1)=''
++	  _LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -4065,7 +4364,7 @@ m4_if([$1], [CXX], [
+       _LT_TAGVAR(lt_prog_compiler_pic, $1)='-KPIC'
+       _LT_TAGVAR(lt_prog_compiler_static, $1)='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	_LT_TAGVAR(lt_prog_compiler_wl, $1)='-Qoption ld ';;
+       *)
+ 	_LT_TAGVAR(lt_prog_compiler_wl, $1)='-Wl,';;
+@@ -4122,9 +4421,11 @@ case $host_os in
+     _LT_TAGVAR(lt_prog_compiler_pic, $1)="$_LT_TAGVAR(lt_prog_compiler_pic, $1)@&t@m4_if([$1],[],[ -DPIC],[m4_if([$1],[CXX],[ -DPIC],[])])"
+     ;;
+ esac
+-AC_MSG_RESULT([$_LT_TAGVAR(lt_prog_compiler_pic, $1)])
+-_LT_TAGDECL([wl], [lt_prog_compiler_wl], [1],
+-	[How to pass a linker flag through the compiler])
++
++AC_CACHE_CHECK([for $compiler option to produce PIC],
++  [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)],
++  [_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_prog_compiler_pic, $1)])
++_LT_TAGVAR(lt_prog_compiler_pic, $1)=$_LT_TAGVAR(lt_cv_prog_compiler_pic, $1)
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -4143,6 +4444,8 @@ fi
+ _LT_TAGDECL([pic_flag], [lt_prog_compiler_pic], [1],
+ 	[Additional compiler flags for building library objects])
+ 
++_LT_TAGDECL([wl], [lt_prog_compiler_wl], [1],
++	[How to pass a linker flag through the compiler])
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -4163,6 +4466,7 @@ _LT_TAGDECL([link_static_flag], [lt_prog
+ m4_defun([_LT_LINKER_SHLIBS],
+ [AC_REQUIRE([LT_PATH_LD])dnl
+ AC_REQUIRE([LT_PATH_NM])dnl
++m4_require([_LT_PATH_MANIFEST_TOOL])dnl
+ m4_require([_LT_FILEUTILS_DEFAULTS])dnl
+ m4_require([_LT_DECL_EGREP])dnl
+ m4_require([_LT_DECL_SED])dnl
+@@ -4171,27 +4475,35 @@ m4_require([_LT_TAG_COMPILER])dnl
+ AC_MSG_CHECKING([whether the $compiler linker ($LD) supports shared libraries])
+ m4_if([$1], [CXX], [
+   _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
++  _LT_TAGVAR(exclude_expsyms, $1)=['_GLOBAL_OFFSET_TABLE_|_GLOBAL__F[ID]_.*']
+   case $host_os in
+   aix[[4-9]]*)
+     # If we're using GNU nm, then we don't want the "-C" option.
+     # -C means demangle to AIX nm, but means don't demangle with GNU nm
++    # Also, AIX nm treats weak defined symbols like other global defined
++    # symbols, whereas GNU nm marks them as "W".
+     if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-      _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++      _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+     else
+       _LT_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+     fi
+     ;;
+   pw32*)
+     _LT_TAGVAR(export_symbols_cmds, $1)="$ltdll_cmds"
+-  ;;
++    ;;
+   cygwin* | mingw* | cegcc*)
+-    _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/;/^.*[[ ]]__nm__/s/^.*[[ ]]__nm__\([[^ ]]*\)[[ ]][[^ ]]*/\1 DATA/;/^I[[ ]]/d;/^[[AITW]][[ ]]/s/.* //'\'' | sort | uniq > $export_symbols'
+-  ;;
++    case $cc_basename in
++    cl*) ;;
++    *)
++      _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/;s/^.*[[ ]]__nm__\([[^ ]]*\)[[ ]][[^ ]]*/\1 DATA/;/^I[[ ]]/d;/^[[AITW]][[ ]]/s/.* //'\'' | sort | uniq > $export_symbols'
++      _LT_TAGVAR(exclude_expsyms, $1)=['[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname']
++      ;;
++    esac
++    ;;
+   *)
+     _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED '\''s/.* //'\'' | sort | uniq > $export_symbols'
+-  ;;
++    ;;
+   esac
+-  _LT_TAGVAR(exclude_expsyms, $1)=['_GLOBAL_OFFSET_TABLE_|_GLOBAL__F[ID]_.*']
+ ], [
+   runpath_var=
+   _LT_TAGVAR(allow_undefined_flag, $1)=
+@@ -4254,7 +4566,33 @@ dnl Note also adjust exclude_expsyms for
+   esac
+ 
+   _LT_TAGVAR(ld_shlibs, $1)=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[[2-9]]*) ;;
++	  *\ \(GNU\ Binutils\)\ [[3-9]]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -4272,6 +4610,7 @@ dnl Note also adjust exclude_expsyms for
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [[01]].* | *\ 2.[[0-9]].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -4287,11 +4626,12 @@ dnl Note also adjust exclude_expsyms for
+ 	_LT_TAGVAR(ld_shlibs, $1)=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -4327,10 +4667,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless,
+       # as there is no search path for DLLs.
+       _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
++      _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-all-symbols'
+       _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
+       _LT_TAGVAR(always_export_symbols, $1)=no
+       _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
+-      _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/'\'' | $SED -e '\''/^[[AITW]][[ ]]/s/.*[[ ]]//'\'' | sort | uniq > $export_symbols'
++      _LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1 DATA/;s/^.*[[ ]]__nm__\([[^ ]]*\)[[ ]][[^ ]]*/\1 DATA/;/^I[[ ]]/d;/^[[AITW]][[ ]]/s/.* //'\'' | sort | uniq > $export_symbols'
++      _LT_TAGVAR(exclude_expsyms, $1)=['[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname']
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -4348,6 +4690,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      _LT_TAGVAR(link_all_deplibs, $1)=yes
++      ;;
++
+     interix[[3-9]]*)
+       _LT_TAGVAR(hardcode_direct, $1)=no
+       _LT_TAGVAR(hardcode_shlibpath_var, $1)=no
+@@ -4373,15 +4720,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -4392,13 +4740,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  _LT_TAGVAR(whole_archive_flag_spec, $1)=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[[cC]]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[[cC]]* | bgxl[[cC]]* | mpixl[[cC]]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  _LT_TAGVAR(compiler_needs_object, $1)=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  _LT_TAGVAR(compiler_needs_object, $1)=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -4414,17 +4766,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  _LT_TAGVAR(whole_archive_flag_spec, $1)='--whole-archive$convenience --no-whole-archive'
+ 	  _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=
+ 	  _LT_TAGVAR(hardcode_libdir_flag_spec_ld, $1)='-rpath $libdir'
+-	  _LT_TAGVAR(archive_cmds, $1)='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  _LT_TAGVAR(archive_cmds, $1)='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -4438,8 +4790,8 @@ _LT_EOF
+ 	_LT_TAGVAR(archive_cmds, $1)='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -4457,8 +4809,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	_LT_TAGVAR(ld_shlibs, $1)=no
+       fi
+@@ -4504,8 +4856,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	_LT_TAGVAR(ld_shlibs, $1)=no
+       fi
+@@ -4545,8 +4897,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  _LT_TAGVAR(export_symbols_cmds, $1)='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  _LT_TAGVAR(export_symbols_cmds, $1)='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && ([substr](\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -4633,9 +4987,9 @@ _LT_EOF
+ 	_LT_TAGVAR(allow_undefined_flag, $1)='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        _LT_SYS_MODULE_PATH_AIX
++        _LT_SYS_MODULE_PATH_AIX([$1])
+         _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib'
+@@ -4644,14 +4998,19 @@ _LT_EOF
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 _LT_SYS_MODULE_PATH_AIX
++	 _LT_SYS_MODULE_PATH_AIX([$1])
+ 	 _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok'
+ 	  _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience'
++	  fi
+ 	  _LT_TAGVAR(archive_cmds_need_lc, $1)=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  _LT_TAGVAR(archive_expsym_cmds, $1)="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -4683,20 +5042,63 @@ _LT_EOF
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' '
+-      _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      _LT_TAGVAR(archive_cmds, $1)='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      _LT_TAGVAR(old_archive_from_new_cmds, $1)='true'
+-      # FIXME: Should let the user specify the lib program.
+-      _LT_TAGVAR(old_archive_cmds, $1)='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      _LT_TAGVAR(fix_srcfile_path, $1)='`cygpath -w "$srcfile"`'
+-      _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	_LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' '
++	_LT_TAGVAR(allow_undefined_flag, $1)=unsupported
++	_LT_TAGVAR(always_export_symbols, $1)=yes
++	_LT_TAGVAR(file_list_spec, $1)='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	_LT_TAGVAR(archive_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	_LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, $1)='true'
++	_LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
++	_LT_TAGVAR(export_symbols_cmds, $1)='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[[BCDGRS]][[ ]]/s/.*[[ ]]\([[^ ]]*\)/\1,DATA/'\'' | $SED -e '\''/^[[AITW]][[ ]]/s/.*[[ ]]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	_LT_TAGVAR(old_postinstall_cmds, $1)='chmod 644 $oldlib'
++	_LT_TAGVAR(postlink_cmds, $1)='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	_LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' '
++	_LT_TAGVAR(allow_undefined_flag, $1)=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	_LT_TAGVAR(archive_cmds, $1)='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	_LT_TAGVAR(old_archive_from_new_cmds, $1)='true'
++	# FIXME: Should let the user specify the lib program.
++	_LT_TAGVAR(old_archive_cmds, $1)='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	_LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -4734,7 +5136,7 @@ _LT_EOF
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      _LT_TAGVAR(archive_cmds, $1)='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+       _LT_TAGVAR(hardcode_direct, $1)=yes
+       _LT_TAGVAR(hardcode_shlibpath_var, $1)=no
+@@ -4742,7 +5144,7 @@ _LT_EOF
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	_LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	_LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -4757,8 +5159,8 @@ _LT_EOF
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	_LT_TAGVAR(archive_cmds, $1)='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -4776,16 +5178,16 @@ _LT_EOF
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  _LT_TAGVAR(archive_cmds, $1)='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  _LT_TAGVAR(archive_cmds, $1)='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -4797,7 +5199,14 @@ _LT_EOF
+ 	  _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  _LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	m4_if($1, [], [
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  _LT_LINKER_OPTION([if $CC understands -b],
++	    _LT_TAGVAR(lt_cv_prog_compiler__b, $1), [-b],
++	    [_LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'],
++	    [_LT_TAGVAR(archive_cmds, $1)='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'])],
++	  [_LT_TAGVAR(archive_cmds, $1)='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'])
+ 	  ;;
+ 	esac
+       fi
+@@ -4825,19 +5234,34 @@ _LT_EOF
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        AC_LINK_IFELSE(int foo(void) {},
+-          _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-        )
+-        LDFLAGS="$save_LDFLAGS"
++	# This should be the same for all languages, so no per-tag cache variable.
++	AC_CACHE_CHECK([whether the $host_os linker accepts -exported_symbol],
++	  [lt_cv_irix_exported_symbol],
++	  [save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   AC_LINK_IFELSE(
++	     [AC_LANG_SOURCE(
++	        [AC_LANG_CASE([C], [[int foo (void) { return 0; }]],
++			      [C++], [[int foo (void) { return 0; }]],
++			      [Fortran 77], [[
++      subroutine foo
++      end]],
++			      [Fortran], [[
++      subroutine foo
++      end]])])],
++	      [lt_cv_irix_exported_symbol=yes],
++	      [lt_cv_irix_exported_symbol=no])
++           LDFLAGS="$save_LDFLAGS"])
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       _LT_TAGVAR(archive_cmds_need_lc, $1)='no'
+       _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+@@ -4899,17 +5323,17 @@ _LT_EOF
+       _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+       _LT_TAGVAR(hardcode_minus_L, $1)=yes
+       _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
+-      _LT_TAGVAR(archive_cmds, $1)='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      _LT_TAGVAR(archive_cmds, $1)='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       _LT_TAGVAR(old_archive_from_new_cmds, $1)='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	_LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	_LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       _LT_TAGVAR(archive_cmds_need_lc, $1)='no'
+       _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+@@ -4919,13 +5343,13 @@ _LT_EOF
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	_LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	_LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+       else
+ 	_LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	_LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	_LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir'
+@@ -4938,9 +5362,9 @@ _LT_EOF
+       _LT_TAGVAR(no_undefined_flag, $1)=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	_LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	_LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	_LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -5212,8 +5636,6 @@ _LT_TAGDECL([], [inherit_rpath], [0],
+     to runtime path list])
+ _LT_TAGDECL([], [link_all_deplibs], [0],
+     [Whether libtool must link a program against all its dependency libraries])
+-_LT_TAGDECL([], [fix_srcfile_path], [1],
+-    [Fix the shell variable $srcfile for the compiler])
+ _LT_TAGDECL([], [always_export_symbols], [0],
+     [Set to "yes" if exported symbols are required])
+ _LT_TAGDECL([], [export_symbols_cmds], [2],
+@@ -5224,6 +5646,8 @@ _LT_TAGDECL([], [include_expsyms], [1],
+     [Symbols that must always be exported])
+ _LT_TAGDECL([], [prelink_cmds], [2],
+     [Commands necessary for linking programs (against libraries) with templates])
++_LT_TAGDECL([], [postlink_cmds], [2],
++    [Commands necessary for finishing linking programs])
+ _LT_TAGDECL([], [file_list_spec], [1],
+     [Specify filename containing input files])
+ dnl FIXME: Not yet implemented
+@@ -5317,37 +5741,22 @@ CC="$lt_save_CC"
+ ])# _LT_LANG_C_CONFIG
+ 
+ 
+-# _LT_PROG_CXX
+-# ------------
+-# Since AC_PROG_CXX is broken, in that it returns g++ if there is no c++
+-# compiler, we have our own version here.
+-m4_defun([_LT_PROG_CXX],
+-[
+-pushdef([AC_MSG_ERROR], [_lt_caught_CXX_error=yes])
+-AC_PROG_CXX
+-if test -n "$CXX" && ( test "X$CXX" != "Xno" &&
+-    ( (test "X$CXX" = "Xg++" && `g++ -v >/dev/null 2>&1` ) ||
+-    (test "X$CXX" != "Xg++"))) ; then
+-  AC_PROG_CXXCPP
+-else
+-  _lt_caught_CXX_error=yes
+-fi
+-popdef([AC_MSG_ERROR])
+-])# _LT_PROG_CXX
+-
+-dnl aclocal-1.4 backwards compatibility:
+-dnl AC_DEFUN([_LT_PROG_CXX], [])
+-
+-
+ # _LT_LANG_CXX_CONFIG([TAG])
+ # --------------------------
+ # Ensure that the configuration variables for a C++ compiler are suitably
+ # defined.  These variables are subsequently used by _LT_CONFIG to write
+ # the compiler configuration to `libtool'.
+ m4_defun([_LT_LANG_CXX_CONFIG],
+-[AC_REQUIRE([_LT_PROG_CXX])dnl
+-m4_require([_LT_FILEUTILS_DEFAULTS])dnl
++[m4_require([_LT_FILEUTILS_DEFAULTS])dnl
+ m4_require([_LT_DECL_EGREP])dnl
++m4_require([_LT_PATH_MANIFEST_TOOL])dnl
++if test -n "$CXX" && ( test "X$CXX" != "Xno" &&
++    ( (test "X$CXX" = "Xg++" && `g++ -v >/dev/null 2>&1` ) ||
++    (test "X$CXX" != "Xg++"))) ; then
++  AC_PROG_CXXCPP
++else
++  _lt_caught_CXX_error=yes
++fi
+ 
+ AC_LANG_PUSH(C++)
+ _LT_TAGVAR(archive_cmds_need_lc, $1)=no
+@@ -5369,6 +5778,8 @@ _LT_TAGVAR(module_cmds, $1)=
+ _LT_TAGVAR(module_expsym_cmds, $1)=
+ _LT_TAGVAR(link_all_deplibs, $1)=unknown
+ _LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
++_LT_TAGVAR(reload_flag, $1)=$reload_flag
++_LT_TAGVAR(reload_cmds, $1)=$reload_cmds
+ _LT_TAGVAR(no_undefined_flag, $1)=
+ _LT_TAGVAR(whole_archive_flag_spec, $1)=
+ _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+@@ -5400,6 +5811,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 
+   # Allow CC to be a program name with arguments.
+   lt_save_CC=$CC
++  lt_save_CFLAGS=$CFLAGS
+   lt_save_LD=$LD
+   lt_save_GCC=$GCC
+   GCC=$GXX
+@@ -5417,6 +5829,7 @@ if test "$_lt_caught_CXX_error" != yes;
+   fi
+   test -z "${LDCXX+set}" || LD=$LDCXX
+   CC=${CXX-"c++"}
++  CFLAGS=$CXXFLAGS
+   compiler=$CC
+   _LT_TAGVAR(compiler, $1)=$CC
+   _LT_CC_BASENAME([$compiler])
+@@ -5438,8 +5851,8 @@ if test "$_lt_caught_CXX_error" != yes;
+       # Check if GNU C++ uses GNU ld as the underlying linker, since the
+       # archiving commands below assume that GNU ld is being used.
+       if test "$with_gnu_ld" = yes; then
+-        _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-        _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++        _LT_TAGVAR(archive_cmds, $1)='$CC $pic_flag -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname -o $lib'
++        _LT_TAGVAR(archive_expsym_cmds, $1)='$CC $pic_flag -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+ 
+         _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+         _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+@@ -5471,7 +5884,7 @@ if test "$_lt_caught_CXX_error" != yes;
+       # Commands to make compiler produce verbose output that lists
+       # what "hidden" libraries, object files and flags are used when
+       # linking a shared library.
+-      output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "\-L"'
++      output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"'
+ 
+     else
+       GXX=no
+@@ -5580,10 +5993,10 @@ if test "$_lt_caught_CXX_error" != yes;
+           _LT_TAGVAR(allow_undefined_flag, $1)='-berok'
+           # Determine the default libpath from the value encoded in an empty
+           # executable.
+-          _LT_SYS_MODULE_PATH_AIX
++          _LT_SYS_MODULE_PATH_AIX([$1])
+           _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 
+-          _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++          _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+         else
+           if test "$host_cpu" = ia64; then
+ 	    _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $libdir:/usr/lib:/lib'
+@@ -5592,14 +6005,19 @@ if test "$_lt_caught_CXX_error" != yes;
+           else
+ 	    # Determine the default libpath from the value encoded in an
+ 	    # empty executable.
+-	    _LT_SYS_MODULE_PATH_AIX
++	    _LT_SYS_MODULE_PATH_AIX([$1])
+ 	    _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	    # Warning - without using the other run time loading flags,
+ 	    # -berok will link without error, but may produce a broken library.
+ 	    _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-bernotok'
+ 	    _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-berok'
+-	    # Exported symbols can be pulled into shared objects from archives
+-	    _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience'
++	    if test "$with_gnu_ld" = yes; then
++	      # We only use this code for GNU lds that support --whole-archive.
++	      _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	    else
++	      # Exported symbols can be pulled into shared objects from archives
++	      _LT_TAGVAR(whole_archive_flag_spec, $1)='$convenience'
++	    fi
+ 	    _LT_TAGVAR(archive_cmds_need_lc, $1)=yes
+ 	    # This is similar to how AIX traditionally builds its shared
+ 	    # libraries.
+@@ -5629,28 +6047,75 @@ if test "$_lt_caught_CXX_error" != yes;
+         ;;
+ 
+       cygwin* | mingw* | pw32* | cegcc*)
+-        # _LT_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless,
+-        # as there is no search path for DLLs.
+-        _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
+-        _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
+-        _LT_TAGVAR(always_export_symbols, $1)=no
+-        _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
+-
+-        if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+-          _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+-          # If the export-symbols file already is a .def file (1st line
+-          # is EXPORTS), use it as is; otherwise, prepend...
+-          _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
+-	    cp $export_symbols $output_objdir/$soname.def;
+-          else
+-	    echo EXPORTS > $output_objdir/$soname.def;
+-	    cat $export_symbols >> $output_objdir/$soname.def;
+-          fi~
+-          $CC -shared -nostdlib $output_objdir/$soname.def $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+-        else
+-          _LT_TAGVAR(ld_shlibs, $1)=no
+-        fi
+-        ;;
++	case $GXX,$cc_basename in
++	,cl* | no,cl*)
++	  # Native MSVC
++	  # hardcode_libdir_flag_spec is actually meaningless, as there is
++	  # no search path for DLLs.
++	  _LT_TAGVAR(hardcode_libdir_flag_spec, $1)=' '
++	  _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
++	  _LT_TAGVAR(always_export_symbols, $1)=yes
++	  _LT_TAGVAR(file_list_spec, $1)='@'
++	  # Tell ltmain to make .lib files, not .a files.
++	  libext=lib
++	  # Tell ltmain to make .dll files, not .so files.
++	  shrext_cmds=".dll"
++	  # FIXME: Setting linknames here is a bad hack.
++	  _LT_TAGVAR(archive_cmds, $1)='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	  _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	      $SED -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	    else
++	      $SED -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	    fi~
++	    $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	    linknames='
++	  # The linker will not automatically build a static lib if we build a DLL.
++	  # _LT_TAGVAR(old_archive_from_new_cmds, $1)='true'
++	  _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
++	  # Don't use ranlib
++	  _LT_TAGVAR(old_postinstall_cmds, $1)='chmod 644 $oldlib'
++	  _LT_TAGVAR(postlink_cmds, $1)='lt_outputfile="@OUTPUT@"~
++	    lt_tool_outputfile="@TOOL_OUTPUT@"~
++	    case $lt_outputfile in
++	      *.exe|*.EXE) ;;
++	      *)
++		lt_outputfile="$lt_outputfile.exe"
++		lt_tool_outputfile="$lt_tool_outputfile.exe"
++		;;
++	    esac~
++	    func_to_tool_file "$lt_outputfile"~
++	    if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	      $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	      $RM "$lt_outputfile.manifest";
++	    fi'
++	  ;;
++	*)
++	  # g++
++	  # _LT_TAGVAR(hardcode_libdir_flag_spec, $1) is actually meaningless,
++	  # as there is no search path for DLLs.
++	  _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-L$libdir'
++	  _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-all-symbols'
++	  _LT_TAGVAR(allow_undefined_flag, $1)=unsupported
++	  _LT_TAGVAR(always_export_symbols, $1)=no
++	  _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=yes
++
++	  if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
++	    _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
++	    # If the export-symbols file already is a .def file (1st line
++	    # is EXPORTS), use it as is; otherwise, prepend...
++	    _LT_TAGVAR(archive_expsym_cmds, $1)='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	      cp $export_symbols $output_objdir/$soname.def;
++	    else
++	      echo EXPORTS > $output_objdir/$soname.def;
++	      cat $export_symbols >> $output_objdir/$soname.def;
++	    fi~
++	    $CC -shared -nostdlib $output_objdir/$soname.def $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
++	  else
++	    _LT_TAGVAR(ld_shlibs, $1)=no
++	  fi
++	  ;;
++	esac
++	;;
+       darwin* | rhapsody*)
+         _LT_DARWIN_LINKER_FEATURES($1)
+ 	;;
+@@ -5692,6 +6157,11 @@ if test "$_lt_caught_CXX_error" != yes;
+       gnu*)
+         ;;
+ 
++      haiku*)
++        _LT_TAGVAR(archive_cmds, $1)='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++        _LT_TAGVAR(link_all_deplibs, $1)=yes
++        ;;
++
+       hpux9*)
+         _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}+b ${wl}$libdir'
+         _LT_TAGVAR(hardcode_libdir_separator, $1)=:
+@@ -5716,11 +6186,11 @@ if test "$_lt_caught_CXX_error" != yes;
+             # explicitly linking system object files so we need to strip them
+             # from the output so that they don't get included in the library
+             # dependencies.
+-            output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $EGREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; $ECHO "X$list" | $Xsed'
++            output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $EGREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"'
+             ;;
+           *)
+             if test "$GXX" = yes; then
+-              _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared -nostdlib -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++              _LT_TAGVAR(archive_cmds, $1)='$RM $output_objdir/$soname~$CC -shared -nostdlib $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+             else
+               # FIXME: insert proper C++ library support
+               _LT_TAGVAR(ld_shlibs, $1)=no
+@@ -5781,7 +6251,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    # explicitly linking system object files so we need to strip them
+ 	    # from the output so that they don't get included in the library
+ 	    # dependencies.
+-	    output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $GREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; $ECHO "X$list" | $Xsed'
++	    output_verbose_link_cmd='templist=`($CC -b $CFLAGS -v conftest.$objext 2>&1) | $GREP "\-L"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"'
+ 	    ;;
+           *)
+ 	    if test "$GXX" = yes; then
+@@ -5791,10 +6261,10 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	            _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib -fPIC ${wl}+h ${wl}$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
+ 	            ;;
+ 	          ia64*)
+-	            _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
++	            _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
+ 	            ;;
+ 	          *)
+-	            _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
++	            _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
+ 	            ;;
+ 	        esac
+ 	      fi
+@@ -5824,7 +6294,7 @@ if test "$_lt_caught_CXX_error" != yes;
+         case $cc_basename in
+           CC*)
+ 	    # SGI C++
+-	    _LT_TAGVAR(archive_cmds, $1)='$CC -shared -all -multigot $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	    _LT_TAGVAR(archive_cmds, $1)='$CC -shared -all -multigot $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 
+ 	    # Archives containing C++ object files must be created using
+ 	    # "CC -ar", where "CC" is the IRIX C++ compiler.  This is
+@@ -5835,9 +6305,9 @@ if test "$_lt_caught_CXX_error" != yes;
+           *)
+ 	    if test "$GXX" = yes; then
+ 	      if test "$with_gnu_ld" = no; then
+-	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	      else
+-	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` -o $lib'
++	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` -o $lib'
+ 	      fi
+ 	    fi
+ 	    _LT_TAGVAR(link_all_deplibs, $1)=yes
+@@ -5866,7 +6336,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    # explicitly linking system object files so we need to strip them
+ 	    # from the output so that they don't get included in the library
+ 	    # dependencies.
+-	    output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; $ECHO "X$list" | $Xsed'
++	    output_verbose_link_cmd='templist=`$CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1 | $GREP "ld"`; rm -f libconftest$shared_ext; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"'
+ 
+ 	    _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath,$libdir'
+ 	    _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+@@ -5903,26 +6373,26 @@ if test "$_lt_caught_CXX_error" != yes;
+           pgCC* | pgcpp*)
+             # Portland Group C++ compiler
+ 	    case `$CC -V` in
+-	    *pgCC\ [[1-5]]* | *pgcpp\ [[1-5]]*)
++	    *pgCC\ [[1-5]].* | *pgcpp\ [[1-5]].*)
+ 	      _LT_TAGVAR(prelink_cmds, $1)='tpldir=Template.dir~
+ 		rm -rf $tpldir~
+ 		$CC --prelink_objects --instantiation_dir $tpldir $objs $libobjs $compile_deplibs~
+-		compile_command="$compile_command `find $tpldir -name \*.o | $NL2SP`"'
++		compile_command="$compile_command `find $tpldir -name \*.o | sort | $NL2SP`"'
+ 	      _LT_TAGVAR(old_archive_cmds, $1)='tpldir=Template.dir~
+ 		rm -rf $tpldir~
+ 		$CC --prelink_objects --instantiation_dir $tpldir $oldobjs$old_deplibs~
+-		$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | $NL2SP`~
++		$AR $AR_FLAGS $oldlib$oldobjs$old_deplibs `find $tpldir -name \*.o | sort | $NL2SP`~
+ 		$RANLIB $oldlib'
+ 	      _LT_TAGVAR(archive_cmds, $1)='tpldir=Template.dir~
+ 		rm -rf $tpldir~
+ 		$CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~
+-		$CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib'
++		$CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib'
+ 	      _LT_TAGVAR(archive_expsym_cmds, $1)='tpldir=Template.dir~
+ 		rm -rf $tpldir~
+ 		$CC --prelink_objects --instantiation_dir $tpldir $predep_objects $libobjs $deplibs $convenience $postdep_objects~
+-		$CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib'
++		$CC -shared $pic_flag $predep_objects $libobjs $deplibs `find $tpldir -name \*.o | sort | $NL2SP` $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib'
+ 	      ;;
+-	    *) # Version 6 will use weak symbols
++	    *) # Version 6 and above use weak symbols
+ 	      _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname -o $lib'
+ 	      _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -shared $pic_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname ${wl}-retain-symbols-file ${wl}$export_symbols -o $lib'
+ 	      ;;
+@@ -5930,7 +6400,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 
+ 	    _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}--rpath ${wl}$libdir'
+ 	    _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+-	    _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	    _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+             ;;
+ 	  cxx*)
+ 	    # Compaq C++
+@@ -5949,9 +6419,9 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    # explicitly linking system object files so we need to strip them
+ 	    # from the output so that they don't get included in the library
+ 	    # dependencies.
+-	    output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; templist=`$ECHO "X$templist" | $Xsed -e "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; $ECHO "X$list" | $Xsed'
++	    output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld"`; templist=`func_echo_all "$templist" | $SED "s/\(^.*ld.*\)\( .*ld .*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "X$list" | $Xsed'
+ 	    ;;
+-	  xl*)
++	  xl* | mpixl* | bgxl*)
+ 	    # IBM XL 8.0 on PPC, with GNU ld
+ 	    _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+ 	    _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}--export-dynamic'
+@@ -5971,13 +6441,13 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	      _LT_TAGVAR(archive_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags'
+ 	      _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G${allow_undefined_flag} -h$soname -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-retain-symbols-file ${wl}$export_symbols'
+ 	      _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-R$libdir'
+-	      _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	      _LT_TAGVAR(whole_archive_flag_spec, $1)='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	      _LT_TAGVAR(compiler_needs_object, $1)=yes
+ 
+ 	      # Not sure whether something based on
+ 	      # $CC $CFLAGS -v conftest.$objext -o libconftest$shared_ext 2>&1
+ 	      # would be better.
+-	      output_verbose_link_cmd='echo'
++	      output_verbose_link_cmd='func_echo_all'
+ 
+ 	      # Archives containing C++ object files must be created using
+ 	      # "CC -xar", where "CC" is the Sun C++ compiler.  This is
+@@ -6046,7 +6516,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    _LT_TAGVAR(export_dynamic_flag_spec, $1)='${wl}-E'
+ 	    _LT_TAGVAR(whole_archive_flag_spec, $1)="$wlarc"'--whole-archive$convenience '"$wlarc"'--no-whole-archive'
+ 	  fi
+-	  output_verbose_link_cmd=echo
++	  output_verbose_link_cmd=func_echo_all
+ 	else
+ 	  _LT_TAGVAR(ld_shlibs, $1)=no
+ 	fi
+@@ -6081,15 +6551,15 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    case $host in
+ 	      osf3*)
+ 	        _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+-	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $soname `test -n "$verstring" && $ECHO "X${wl}-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname $soname `test -n "$verstring" && func_echo_all "${wl}-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	        _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-rpath ${wl}$libdir'
+ 		;;
+ 	      *)
+ 	        _LT_TAGVAR(allow_undefined_flag, $1)=' -expect_unresolved \*'
+-	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	        _LT_TAGVAR(archive_expsym_cmds, $1)='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done~
+ 	          echo "-hidden">> $lib.exp~
+-	          $CC -shared$allow_undefined_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname ${wl}-input ${wl}$lib.exp  `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~
++	          $CC -shared$allow_undefined_flag $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags -msym -soname $soname ${wl}-input ${wl}$lib.exp  `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~
+ 	          $RM $lib.exp'
+ 	        _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='-rpath $libdir'
+ 		;;
+@@ -6105,17 +6575,17 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    # explicitly linking system object files so we need to strip them
+ 	    # from the output so that they don't get included in the library
+ 	    # dependencies.
+-	    output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld" | $GREP -v "ld:"`; templist=`$ECHO "X$templist" | $Xsed -e "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; $ECHO "X$list" | $Xsed'
++	    output_verbose_link_cmd='templist=`$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "ld" | $GREP -v "ld:"`; templist=`func_echo_all "$templist" | $SED "s/\(^.*ld.*\)\( .*ld.*$\)/\1/"`; list=""; for z in $templist; do case $z in conftest.$objext) list="$list $z";; *.$objext);; *) list="$list $z";;esac; done; func_echo_all "$list"'
+ 	    ;;
+ 	  *)
+ 	    if test "$GXX" = yes && test "$with_gnu_ld" = no; then
+ 	      _LT_TAGVAR(allow_undefined_flag, $1)=' ${wl}-expect_unresolved ${wl}\*'
+ 	      case $host in
+ 	        osf3*)
+-	          _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	          _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 		  ;;
+ 	        *)
+-	          _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	          _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib ${allow_undefined_flag} $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 		  ;;
+ 	      esac
+ 
+@@ -6125,7 +6595,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	      # Commands to make compiler produce verbose output that lists
+ 	      # what "hidden" libraries, object files and flags are used when
+ 	      # linking a shared library.
+-	      output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "\-L"'
++	      output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"'
+ 
+ 	    else
+ 	      # FIXME: insert proper C++ library support
+@@ -6161,7 +6631,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 
+       solaris*)
+         case $cc_basename in
+-          CC*)
++          CC* | sunCC*)
+ 	    # Sun C++ 4.2, 5.x and Centerline C++
+             _LT_TAGVAR(archive_cmds_need_lc,$1)=yes
+ 	    _LT_TAGVAR(no_undefined_flag, $1)=' -zdefs'
+@@ -6182,7 +6652,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    esac
+ 	    _LT_TAGVAR(link_all_deplibs, $1)=yes
+ 
+-	    output_verbose_link_cmd='echo'
++	    output_verbose_link_cmd='func_echo_all'
+ 
+ 	    # Archives containing C++ object files must be created using
+ 	    # "CC -xar", where "CC" is the Sun C++ compiler.  This is
+@@ -6202,14 +6672,14 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	    if test "$GXX" = yes && test "$with_gnu_ld" = no; then
+ 	      _LT_TAGVAR(no_undefined_flag, $1)=' ${wl}-z ${wl}defs'
+ 	      if $CC --version | $GREP -v '^2\.7' > /dev/null; then
+-	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib'
++	        _LT_TAGVAR(archive_cmds, $1)='$CC -shared $pic_flag -nostdlib $LDFLAGS $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags ${wl}-h $wl$soname -o $lib'
+ 	        _LT_TAGVAR(archive_expsym_cmds, $1)='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-		  $CC -shared -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$RM $lib.exp'
++		  $CC -shared $pic_flag -nostdlib ${wl}-M $wl$lib.exp -o $lib $predep_objects $libobjs $deplibs $postdep_objects $compiler_flags~$RM $lib.exp'
+ 
+ 	        # Commands to make compiler produce verbose output that lists
+ 	        # what "hidden" libraries, object files and flags are used when
+ 	        # linking a shared library.
+-	        output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP "\-L"'
++	        output_verbose_link_cmd='$CC -shared $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"'
+ 	      else
+ 	        # g++ 2.7 appears to require `-G' NOT `-shared' on this
+ 	        # platform.
+@@ -6220,7 +6690,7 @@ if test "$_lt_caught_CXX_error" != yes;
+ 	        # Commands to make compiler produce verbose output that lists
+ 	        # what "hidden" libraries, object files and flags are used when
+ 	        # linking a shared library.
+-	        output_verbose_link_cmd='$CC -G $CFLAGS -v conftest.$objext 2>&1 | $GREP "\-L"'
++	        output_verbose_link_cmd='$CC -G $CFLAGS -v conftest.$objext 2>&1 | $GREP -v "^Configured with:" | $GREP "\-L"'
+ 	      fi
+ 
+ 	      _LT_TAGVAR(hardcode_libdir_flag_spec, $1)='${wl}-R $wl$libdir'
+@@ -6274,6 +6744,10 @@ if test "$_lt_caught_CXX_error" != yes;
+           CC*)
+ 	    _LT_TAGVAR(archive_cmds, $1)='$CC -G ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	    _LT_TAGVAR(archive_expsym_cmds, $1)='$CC -G ${wl}-Bexport:$export_symbols ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags'
++	    _LT_TAGVAR(old_archive_cmds, $1)='$CC -Tprelink_objects $oldobjs~
++	      '"$_LT_TAGVAR(old_archive_cmds, $1)"
++	    _LT_TAGVAR(reload_cmds, $1)='$CC -Tprelink_objects $reload_objs~
++	      '"$_LT_TAGVAR(reload_cmds, $1)"
+ 	    ;;
+ 	  *)
+ 	    _LT_TAGVAR(archive_cmds, $1)='$CC -shared ${wl}-h,$soname -o $lib $libobjs $deplibs $compiler_flags'
+@@ -6329,6 +6803,7 @@ if test "$_lt_caught_CXX_error" != yes;
+   fi # test -n "$compiler"
+ 
+   CC=$lt_save_CC
++  CFLAGS=$lt_save_CFLAGS
+   LDCXX=$LD
+   LD=$lt_save_LD
+   GCC=$lt_save_GCC
+@@ -6343,6 +6818,29 @@ AC_LANG_POP
+ ])# _LT_LANG_CXX_CONFIG
+ 
+ 
++# _LT_FUNC_STRIPNAME_CNF
++# ----------------------
++# func_stripname_cnf prefix suffix name
++# strip PREFIX and SUFFIX off of NAME.
++# PREFIX and SUFFIX must not contain globbing or regex special
++# characters, hashes, percent signs, but SUFFIX may contain a leading
++# dot (in which case that matches only a dot).
++#
++# This function is identical to the (non-XSI) version of func_stripname,
++# except this one can be used by m4 code that may be executed by configure,
++# rather than the libtool script.
++m4_defun([_LT_FUNC_STRIPNAME_CNF],[dnl
++AC_REQUIRE([_LT_DECL_SED])
++AC_REQUIRE([_LT_PROG_ECHO_BACKSLASH])
++func_stripname_cnf ()
++{
++  case ${2} in
++  .*) func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%\\\\${2}\$%%"`;;
++  *)  func_stripname_result=`$ECHO "${3}" | $SED "s%^${1}%%; s%${2}\$%%"`;;
++  esac
++} # func_stripname_cnf
++])# _LT_FUNC_STRIPNAME_CNF
++
+ # _LT_SYS_HIDDEN_LIBDEPS([TAGNAME])
+ # ---------------------------------
+ # Figure out "hidden" library dependencies from verbose
+@@ -6351,6 +6849,7 @@ AC_LANG_POP
+ # objects, libraries and library flags.
+ m4_defun([_LT_SYS_HIDDEN_LIBDEPS],
+ [m4_require([_LT_FILEUTILS_DEFAULTS])dnl
++AC_REQUIRE([_LT_FUNC_STRIPNAME_CNF])dnl
+ # Dependencies to place before and after the object being linked:
+ _LT_TAGVAR(predep_objects, $1)=
+ _LT_TAGVAR(postdep_objects, $1)=
+@@ -6401,6 +6900,13 @@ public class foo {
+ };
+ _LT_EOF
+ ])
++
++_lt_libdeps_save_CFLAGS=$CFLAGS
++case "$CC $CFLAGS " in #(
++*\ -flto*\ *) CFLAGS="$CFLAGS -fno-lto" ;;
++*\ -fwhopr*\ *) CFLAGS="$CFLAGS -fno-whopr" ;;
++esac
++
+ dnl Parse the compiler output and extract the necessary
+ dnl objects, libraries and library flags.
+ if AC_TRY_EVAL(ac_compile); then
+@@ -6412,7 +6918,7 @@ if AC_TRY_EVAL(ac_compile); then
+   pre_test_object_deps_done=no
+ 
+   for p in `eval "$output_verbose_link_cmd"`; do
+-    case $p in
++    case ${prev}${p} in
+ 
+     -L* | -R* | -l*)
+        # Some compilers place space between "-{L,R}" and the path.
+@@ -6421,13 +6927,22 @@ if AC_TRY_EVAL(ac_compile); then
+           test $p = "-R"; then
+ 	 prev=$p
+ 	 continue
+-       else
+-	 prev=
+        fi
+ 
++       # Expand the sysroot to ease extracting the directories later.
++       if test -z "$prev"; then
++         case $p in
++         -L*) func_stripname_cnf '-L' '' "$p"; prev=-L; p=$func_stripname_result ;;
++         -R*) func_stripname_cnf '-R' '' "$p"; prev=-R; p=$func_stripname_result ;;
++         -l*) func_stripname_cnf '-l' '' "$p"; prev=-l; p=$func_stripname_result ;;
++         esac
++       fi
++       case $p in
++       =*) func_stripname_cnf '=' '' "$p"; p=$lt_sysroot$func_stripname_result ;;
++       esac
+        if test "$pre_test_object_deps_done" = no; then
+-	 case $p in
+-	 -L* | -R*)
++	 case ${prev} in
++	 -L | -R)
+ 	   # Internal compiler library paths should come after those
+ 	   # provided the user.  The postdeps already come after the
+ 	   # user supplied libs so there is no need to process them.
+@@ -6447,8 +6962,10 @@ if AC_TRY_EVAL(ac_compile); then
+ 	   _LT_TAGVAR(postdeps, $1)="${_LT_TAGVAR(postdeps, $1)} ${prev}${p}"
+ 	 fi
+        fi
++       prev=
+        ;;
+ 
++    *.lto.$objext) ;; # Ignore GCC LTO objects
+     *.$objext)
+        # This assumes that the test object file only shows up
+        # once in the compiler output.
+@@ -6484,6 +7001,7 @@ else
+ fi
+ 
+ $RM -f confest.$objext
++CFLAGS=$_lt_libdeps_save_CFLAGS
+ 
+ # PORTME: override above test on systems where it is broken
+ m4_if([$1], [CXX],
+@@ -6520,7 +7038,7 @@ linux*)
+ 
+ solaris*)
+   case $cc_basename in
+-  CC*)
++  CC* | sunCC*)
+     # The more standards-conforming stlport4 library is
+     # incompatible with the Cstd library. Avoid specifying
+     # it if it's in CXXFLAGS. Ignore libCrun as
+@@ -6564,32 +7082,16 @@ _LT_TAGDECL([], [compiler_lib_search_pat
+ ])# _LT_SYS_HIDDEN_LIBDEPS
+ 
+ 
+-# _LT_PROG_F77
+-# ------------
+-# Since AC_PROG_F77 is broken, in that it returns the empty string
+-# if there is no fortran compiler, we have our own version here.
+-m4_defun([_LT_PROG_F77],
+-[
+-pushdef([AC_MSG_ERROR], [_lt_disable_F77=yes])
+-AC_PROG_F77
+-if test -z "$F77" || test "X$F77" = "Xno"; then
+-  _lt_disable_F77=yes
+-fi
+-popdef([AC_MSG_ERROR])
+-])# _LT_PROG_F77
+-
+-dnl aclocal-1.4 backwards compatibility:
+-dnl AC_DEFUN([_LT_PROG_F77], [])
+-
+-
+ # _LT_LANG_F77_CONFIG([TAG])
+ # --------------------------
+ # Ensure that the configuration variables for a Fortran 77 compiler are
+ # suitably defined.  These variables are subsequently used by _LT_CONFIG
+ # to write the compiler configuration to `libtool'.
+ m4_defun([_LT_LANG_F77_CONFIG],
+-[AC_REQUIRE([_LT_PROG_F77])dnl
+-AC_LANG_PUSH(Fortran 77)
++[AC_LANG_PUSH(Fortran 77)
++if test -z "$F77" || test "X$F77" = "Xno"; then
++  _lt_disable_F77=yes
++fi
+ 
+ _LT_TAGVAR(archive_cmds_need_lc, $1)=no
+ _LT_TAGVAR(allow_undefined_flag, $1)=
+@@ -6608,6 +7110,8 @@ _LT_TAGVAR(module_cmds, $1)=
+ _LT_TAGVAR(module_expsym_cmds, $1)=
+ _LT_TAGVAR(link_all_deplibs, $1)=unknown
+ _LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
++_LT_TAGVAR(reload_flag, $1)=$reload_flag
++_LT_TAGVAR(reload_cmds, $1)=$reload_cmds
+ _LT_TAGVAR(no_undefined_flag, $1)=
+ _LT_TAGVAR(whole_archive_flag_spec, $1)=
+ _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+@@ -6647,7 +7151,9 @@ if test "$_lt_disable_F77" != yes; then
+   # Allow CC to be a program name with arguments.
+   lt_save_CC="$CC"
+   lt_save_GCC=$GCC
++  lt_save_CFLAGS=$CFLAGS
+   CC=${F77-"f77"}
++  CFLAGS=$FFLAGS
+   compiler=$CC
+   _LT_TAGVAR(compiler, $1)=$CC
+   _LT_CC_BASENAME([$compiler])
+@@ -6701,38 +7207,24 @@ if test "$_lt_disable_F77" != yes; then
+ 
+   GCC=$lt_save_GCC
+   CC="$lt_save_CC"
++  CFLAGS="$lt_save_CFLAGS"
+ fi # test "$_lt_disable_F77" != yes
+ 
+ AC_LANG_POP
+ ])# _LT_LANG_F77_CONFIG
+ 
+ 
+-# _LT_PROG_FC
+-# -----------
+-# Since AC_PROG_FC is broken, in that it returns the empty string
+-# if there is no fortran compiler, we have our own version here.
+-m4_defun([_LT_PROG_FC],
+-[
+-pushdef([AC_MSG_ERROR], [_lt_disable_FC=yes])
+-AC_PROG_FC
+-if test -z "$FC" || test "X$FC" = "Xno"; then
+-  _lt_disable_FC=yes
+-fi
+-popdef([AC_MSG_ERROR])
+-])# _LT_PROG_FC
+-
+-dnl aclocal-1.4 backwards compatibility:
+-dnl AC_DEFUN([_LT_PROG_FC], [])
+-
+-
+ # _LT_LANG_FC_CONFIG([TAG])
+ # -------------------------
+ # Ensure that the configuration variables for a Fortran compiler are
+ # suitably defined.  These variables are subsequently used by _LT_CONFIG
+ # to write the compiler configuration to `libtool'.
+ m4_defun([_LT_LANG_FC_CONFIG],
+-[AC_REQUIRE([_LT_PROG_FC])dnl
+-AC_LANG_PUSH(Fortran)
++[AC_LANG_PUSH(Fortran)
++
++if test -z "$FC" || test "X$FC" = "Xno"; then
++  _lt_disable_FC=yes
++fi
+ 
+ _LT_TAGVAR(archive_cmds_need_lc, $1)=no
+ _LT_TAGVAR(allow_undefined_flag, $1)=
+@@ -6751,6 +7243,8 @@ _LT_TAGVAR(module_cmds, $1)=
+ _LT_TAGVAR(module_expsym_cmds, $1)=
+ _LT_TAGVAR(link_all_deplibs, $1)=unknown
+ _LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
++_LT_TAGVAR(reload_flag, $1)=$reload_flag
++_LT_TAGVAR(reload_cmds, $1)=$reload_cmds
+ _LT_TAGVAR(no_undefined_flag, $1)=
+ _LT_TAGVAR(whole_archive_flag_spec, $1)=
+ _LT_TAGVAR(enable_shared_with_static_runtimes, $1)=no
+@@ -6790,7 +7284,9 @@ if test "$_lt_disable_FC" != yes; then
+   # Allow CC to be a program name with arguments.
+   lt_save_CC="$CC"
+   lt_save_GCC=$GCC
++  lt_save_CFLAGS=$CFLAGS
+   CC=${FC-"f95"}
++  CFLAGS=$FCFLAGS
+   compiler=$CC
+   GCC=$ac_cv_fc_compiler_gnu
+ 
+@@ -6846,7 +7342,8 @@ if test "$_lt_disable_FC" != yes; then
+   fi # test -n "$compiler"
+ 
+   GCC=$lt_save_GCC
+-  CC="$lt_save_CC"
++  CC=$lt_save_CC
++  CFLAGS=$lt_save_CFLAGS
+ fi # test "$_lt_disable_FC" != yes
+ 
+ AC_LANG_POP
+@@ -6883,10 +7380,12 @@ _LT_COMPILER_BOILERPLATE
+ _LT_LINKER_BOILERPLATE
+ 
+ # Allow CC to be a program name with arguments.
+-lt_save_CC="$CC"
++lt_save_CC=$CC
++lt_save_CFLAGS=$CFLAGS
+ lt_save_GCC=$GCC
+ GCC=yes
+ CC=${GCJ-"gcj"}
++CFLAGS=$GCJFLAGS
+ compiler=$CC
+ _LT_TAGVAR(compiler, $1)=$CC
+ _LT_TAGVAR(LD, $1)="$LD"
+@@ -6896,6 +7395,8 @@ _LT_CC_BASENAME([$compiler])
+ _LT_TAGVAR(archive_cmds_need_lc, $1)=no
+ 
+ _LT_TAGVAR(old_archive_cmds, $1)=$old_archive_cmds
++_LT_TAGVAR(reload_flag, $1)=$reload_flag
++_LT_TAGVAR(reload_cmds, $1)=$reload_cmds
+ 
+ ## CAVEAT EMPTOR:
+ ## There is no encapsulation within the following macros, do not change
+@@ -6915,7 +7416,8 @@ fi
+ AC_LANG_RESTORE
+ 
+ GCC=$lt_save_GCC
+-CC="$lt_save_CC"
++CC=$lt_save_CC
++CFLAGS=$lt_save_CFLAGS
+ ])# _LT_LANG_GCJ_CONFIG
+ 
+ 
+@@ -6950,9 +7452,11 @@ _LT_LINKER_BOILERPLATE
+ 
+ # Allow CC to be a program name with arguments.
+ lt_save_CC="$CC"
++lt_save_CFLAGS=$CFLAGS
+ lt_save_GCC=$GCC
+ GCC=
+ CC=${RC-"windres"}
++CFLAGS=
+ compiler=$CC
+ _LT_TAGVAR(compiler, $1)=$CC
+ _LT_CC_BASENAME([$compiler])
+@@ -6965,7 +7469,8 @@ fi
+ 
+ GCC=$lt_save_GCC
+ AC_LANG_RESTORE
+-CC="$lt_save_CC"
++CC=$lt_save_CC
++CFLAGS=$lt_save_CFLAGS
+ ])# _LT_LANG_RC_CONFIG
+ 
+ 
+@@ -7024,6 +7529,15 @@ _LT_DECL([], [OBJDUMP], [1], [An object
+ AC_SUBST([OBJDUMP])
+ ])
+ 
++# _LT_DECL_DLLTOOL
++# ----------------
++# Ensure DLLTOOL variable is set.
++m4_defun([_LT_DECL_DLLTOOL],
++[AC_CHECK_TOOL(DLLTOOL, dlltool, false)
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++_LT_DECL([], [DLLTOOL], [1], [DLL creation program])
++AC_SUBST([DLLTOOL])
++])
+ 
+ # _LT_DECL_SED
+ # ------------
+@@ -7117,8 +7631,8 @@ m4_defun([_LT_CHECK_SHELL_FEATURES],
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -7157,208 +7671,162 @@ _LT_DECL([NL2SP], [lt_NL2SP], [1], [turn
+ ])# _LT_CHECK_SHELL_FEATURES
+ 
+ 
+-# _LT_PROG_XSI_SHELLFNS
+-# ---------------------
+-# Bourne and XSI compatible variants of some useful shell functions.
+-m4_defun([_LT_PROG_XSI_SHELLFNS],
+-[case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
++# _LT_PROG_FUNCTION_REPLACE (FUNCNAME, REPLACEMENT-BODY)
++# ------------------------------------------------------
++# In `$cfgfile', look for function FUNCNAME delimited by `^FUNCNAME ()$' and
++# '^} FUNCNAME ', and replace its body with REPLACEMENT-BODY.
++m4_defun([_LT_PROG_FUNCTION_REPLACE],
++[dnl {
++sed -e '/^$1 ()$/,/^} # $1 /c\
++$1 ()\
++{\
++m4_bpatsubsts([$2], [$], [\\], [^\([	 ]\)], [\\\1])
++} # Extended-shell $1 implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++])
+ 
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $[*] ))
+-}
+ 
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
++# _LT_PROG_REPLACE_SHELLFNS
++# -------------------------
++# Replace existing portable implementations of several shell functions with
++# equivalent extended shell implementations where those features are available..
++m4_defun([_LT_PROG_REPLACE_SHELLFNS],
++[if test x"$xsi_shell" = xyes; then
++  _LT_PROG_FUNCTION_REPLACE([func_dirname], [dnl
++    case ${1} in
++      */*) func_dirname_result="${1%/*}${2}" ;;
++      *  ) func_dirname_result="${3}" ;;
++    esac])
++
++  _LT_PROG_FUNCTION_REPLACE([func_basename], [dnl
++    func_basename_result="${1##*/}"])
++
++  _LT_PROG_FUNCTION_REPLACE([func_dirname_and_basename], [dnl
++    case ${1} in
++      */*) func_dirname_result="${1%/*}${2}" ;;
++      *  ) func_dirname_result="${3}" ;;
++    esac
++    func_basename_result="${1##*/}"])
+ 
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
++  _LT_PROG_FUNCTION_REPLACE([func_stripname], [dnl
++    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
++    # positional parameters, so assign one to ordinary parameter first.
++    func_stripname_result=${3}
++    func_stripname_result=${func_stripname_result#"${1}"}
++    func_stripname_result=${func_stripname_result%"${2}"}])
+ 
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_split_long_opt], [dnl
++    func_split_long_opt_name=${1%%=*}
++    func_split_long_opt_arg=${1#*=}])
+ 
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_split_short_opt], [dnl
++    func_split_short_opt_arg=${1#??}
++    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}])
+ 
+-dnl func_dirname_and_basename
+-dnl A portable version of this function is already defined in general.m4sh
+-dnl so there is no need for it here.
++  _LT_PROG_FUNCTION_REPLACE([func_lo2o], [dnl
++    case ${1} in
++      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
++      *)    func_lo2o_result=${1} ;;
++    esac])
+ 
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_xform], [    func_xform_result=${1%.*}.lo])
+ 
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[[^=]]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[[^=]]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_arith], [    func_arith_result=$(( $[*] ))])
+ 
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_len], [    func_len_result=${#1}])
++fi
+ 
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[[^.]]*$/.lo/'`
+-}
++if test x"$lt_shell_append" = xyes; then
++  _LT_PROG_FUNCTION_REPLACE([func_append], [    eval "${1}+=\\${2}"])
+ 
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$[@]"`
+-}
++  _LT_PROG_FUNCTION_REPLACE([func_append_quoted], [dnl
++    func_quote_for_eval "${2}"
++dnl m4 expansion turns \\\\ into \\, and then the shell eval turns that into \
++    eval "${1}+=\\\\ \\$func_quote_for_eval_result"])
+ 
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$[1]" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([[a-zA-Z_]]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([[a-zA-Z_]]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
+ 
+-_LT_EOF
+-esac
++if test x"$_lt_function_replace_fail" = x":"; then
++  AC_MSG_WARN([Unable to substitute extended shell functions in $ofile])
++fi
++])
+ 
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$[1]+=\$[2]"
+-}
+-_LT_EOF
++# _LT_PATH_CONVERSION_FUNCTIONS
++# -----------------------------
++# Determine which file name conversion functions should be used by
++# func_to_host_file (and, implicitly, by func_to_host_path).  These are needed
++# for certain cross-compile configurations and native mingw.
++m4_defun([_LT_PATH_CONVERSION_FUNCTIONS],
++[AC_REQUIRE([AC_CANONICAL_HOST])dnl
++AC_REQUIRE([AC_CANONICAL_BUILD])dnl
++AC_MSG_CHECKING([how to convert $build file names to $host format])
++AC_CACHE_VAL(lt_cv_to_host_file_cmd,
++[case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
+     ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$[1]=\$$[1]\$[2]"
+-}
+-
+-_LT_EOF
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
+     ;;
+-  esac
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++])
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++AC_MSG_RESULT([$lt_cv_to_host_file_cmd])
++_LT_DECL([to_host_file_cmd], [lt_cv_to_host_file_cmd],
++         [0], [convert $build file names to $host format])dnl
++
++AC_MSG_CHECKING([how to convert $build file names to toolchain format])
++AC_CACHE_VAL(lt_cv_to_tool_file_cmd,
++[#assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
+ ])
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++AC_MSG_RESULT([$lt_cv_to_tool_file_cmd])
++_LT_DECL([to_tool_file_cmd], [lt_cv_to_tool_file_cmd],
++         [0], [convert $build files to toolchain format])dnl
++])# _LT_PATH_CONVERSION_FUNCTIONS
+Index: binutils-2.20.1/bfd/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/bfd/Makefile.in
++++ binutils-2.20.1/bfd/Makefile.in
+@@ -172,6 +172,7 @@ DATADIRNAME = @DATADIRNAME@
+ DEBUGDIR = @DEBUGDIR@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -205,6 +206,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -244,6 +246,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ all_backends = @all_backends@
+@@ -289,7 +292,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/bfd/configure
+===================================================================
+--- binutils-2.20.1.orig/bfd/configure
++++ binutils-2.20.1/bfd/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -805,7 +666,9 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
++ac_ct_AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -918,6 +781,7 @@ enable_static
+ with_pic
+ enable_fast_install
+ with_gnu_ld
++with_libtool_sysroot
+ enable_libtool_lock
+ enable_plugins
+ enable_largefile
+@@ -1588,6 +1452,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+   --with-mmap             try using mmap for BFD input files if available
+   --with-separate-debug-dir=DIR
+                           Look for global separate debug info in DIR
+@@ -5511,8 +5377,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5528,6 +5394,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5863,8 +5798,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -5908,7 +5846,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -5963,6 +5901,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -5982,13 +5929,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:5985: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5988: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5991: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -6045,6 +5992,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -6109,8 +6061,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -6152,8 +6104,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -6202,6 +6154,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -6218,6 +6244,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6381,16 +6412,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6420,6 +6453,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6428,11 +6465,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6535,6 +6572,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6550,16 +6602,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6568,7 +6630,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6578,10 +6640,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6589,17 +6651,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6608,7 +6670,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6618,17 +6680,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6636,18 +6698,54 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
++
++
++
+ 
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
+ 
+ 
+ 
+@@ -6656,15 +6754,17 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6673,7 +6773,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6683,28 +6783,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6713,7 +6817,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6723,11 +6827,176 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
+-else
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+@@ -6870,6 +7139,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6977,8 +7258,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -7014,6 +7295,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -7039,8 +7321,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -7055,6 +7337,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -7066,7 +7360,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -7092,8 +7386,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -7103,8 +7397,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -7141,6 +7435,17 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
+ 
+ 
+ 
+@@ -7162,6 +7467,44 @@ fi
+ 
+ 
+ 
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
++
++
++
+ # Check whether --enable-libtool-lock was given.
+ if test "${enable_libtool_lock+set}" = set; then :
+   enableval=$enable_libtool_lock;
+@@ -7193,7 +7536,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 7196 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7355,6 +7698,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -7905,6 +8365,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -7932,7 +8424,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -7955,6 +8447,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ enable_dlopen=yes
+ 
+@@ -8050,7 +8544,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -8125,19 +8621,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -8150,25 +8633,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -8195,7 +8661,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8404,7 +8870,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8424,15 +8895,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8427: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8431: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8461,8 +8932,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8510,6 +8979,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8552,6 +9027,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8614,7 +9096,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8626,25 +9114,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8676,7 +9164,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8733,13 +9221,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8763,15 +9255,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8766: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8770: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8800,6 +9292,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8819,7 +9316,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -8868,16 +9365,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8871: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8875: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8923,16 +9420,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8926: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8930: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -9045,7 +9542,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -9063,6 +9586,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -9078,11 +9602,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -9118,10 +9643,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -9139,6 +9666,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -9164,15 +9696,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -9183,13 +9716,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -9205,17 +9742,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -9229,8 +9766,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -9248,8 +9785,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9295,8 +9832,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9336,8 +9873,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9424,7 +9963,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9437,25 +9982,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9464,7 +10016,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9477,30 +10035,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9532,20 +10102,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9555,7 +10168,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9563,7 +10180,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9606,7 +10223,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9614,7 +10231,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9629,8 +10246,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9648,16 +10265,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9669,7 +10286,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9697,26 +10353,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9778,17 +10447,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9798,13 +10467,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9817,9 +10486,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -10221,16 +10890,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -10243,7 +10919,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -10263,7 +10939,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10351,7 +11033,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10382,8 +11064,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10404,36 +11087,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10520,6 +11250,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10562,8 +11305,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10672,7 +11417,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -10975,6 +11720,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -11305,7 +12055,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11308 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11346,7 +12096,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11355,7 +12111,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11401,7 +12161,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11404 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11442,7 +12202,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11451,7 +12217,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -14503,7 +15273,7 @@ $as_echo "$bfd_cv_ld_as_needed" >&6; }
+ 
+ LIBM=
+ case $host in
+-*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
++*-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*)
+   # These system don't have libm, or don't need it
+   ;;
+ *-ncr-sysv4.3*)
+@@ -14644,7 +15414,7 @@ SHARED_LDFLAGS=
+ if test "$enable_shared" = "yes"; then
+   x=`sed -n -e 's/^[ 	]*PICFLAG[ 	]*=[ 	]*//p' < ../libiberty/Makefile | sed -n '$p'`
+   if test -n "$x"; then
+-    SHARED_LIBADD="-L`pwd`/../libiberty/pic -liberty"
++    SHARED_LIBADD="`pwd`/../libiberty/pic/libiberty.a"
+   fi
+ 
+ # More hacks to build DLLs on Windows.
+@@ -16182,131 +16952,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -16319,8 +17111,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -16330,14 +17127,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -16353,7 +17150,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -16361,12 +17157,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -16388,14 +17185,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -16403,12 +17201,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -17173,7 +17965,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -17221,6 +18014,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -17270,9 +18069,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -17280,13 +18081,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -17295,6 +18113,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -17313,14 +18134,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -17328,6 +18149,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -17384,6 +18208,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -17423,6 +18250,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -17435,12 +18266,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -17527,9 +18358,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -17545,6 +18373,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -17577,212 +18408,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/bfd/doc/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/bfd/doc/Makefile.in
++++ binutils-2.20.1/bfd/doc/Makefile.in
+@@ -132,6 +132,7 @@ DATADIRNAME = @DATADIRNAME@
+ DEBUGDIR = @DEBUGDIR@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -165,6 +166,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -204,6 +206,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ all_backends = @all_backends@
+@@ -244,7 +247,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/binutils/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/binutils/Makefile.in
++++ binutils-2.20.1/binutils/Makefile.in
+@@ -241,6 +241,7 @@ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEMANGLER_NAME = @DEMANGLER_NAME@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DLLTOOL_DEFS = @DLLTOOL_DEFS@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+@@ -281,6 +282,7 @@ LTLIBICONV = @LTLIBICONV@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -318,6 +320,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -350,7 +353,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/binutils/configure
+===================================================================
+--- binutils-2.20.1.orig/binutils/configure
++++ binutils-2.20.1/binutils/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -793,9 +654,11 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
+ RANLIB
++ac_ct_AR
+ AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -908,6 +771,7 @@ enable_static
+ with_pic
+ enable_fast_install
+ with_gnu_ld
++with_libtool_sysroot
+ enable_libtool_lock
+ enable_targets
+ enable_werror
+@@ -1569,6 +1433,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+   --with-gnu-ld           assume the C compiler uses GNU ld default=no
+   --with-libiconv-prefix[=DIR]  search for libiconv in DIR/include and DIR/lib
+   --without-libiconv-prefix     don't search for libiconv in includedir and libdir
+@@ -5271,8 +5137,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5288,6 +5154,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5623,8 +5558,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -5668,7 +5606,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -5723,6 +5661,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -5742,13 +5689,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:5745: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5748: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5751: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -5805,6 +5752,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -5869,8 +5821,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -5912,8 +5864,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -5962,6 +5914,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -5978,6 +6004,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6141,16 +6172,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6180,6 +6213,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6188,11 +6225,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6295,6 +6332,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6310,16 +6362,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6328,7 +6390,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6338,10 +6400,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6349,17 +6411,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6368,7 +6430,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6378,17 +6440,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6396,19 +6458,55 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
++
++
+ 
+ 
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
++
+ 
+ 
+ 
+@@ -6416,15 +6514,17 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6433,7 +6533,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6443,28 +6543,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6473,7 +6577,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6483,19 +6587,184 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_STRIP" = x; then
+-    STRIP=":"
+-  else
+-    case $cross_compiling:$ac_tool_warned in
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_STRIP" = x; then
++    STRIP=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
+ yes:)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+@@ -6630,6 +6899,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6737,8 +7018,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -6774,6 +7055,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -6799,8 +7081,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -6815,6 +7097,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -6826,7 +7120,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -6852,8 +7146,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -6863,8 +7157,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -6901,6 +7195,19 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6921,6 +7228,42 @@ fi
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
++
++
+ 
+ # Check whether --enable-libtool-lock was given.
+ if test "${enable_libtool_lock+set}" = set; then :
+@@ -6953,7 +7296,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 6956 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7115,6 +7458,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -7665,6 +8125,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -7692,7 +8184,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -7715,6 +8207,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ 
+ 
+@@ -7841,7 +8335,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -7916,19 +8412,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -7941,25 +8424,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -7986,7 +8452,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8195,7 +8661,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8215,15 +8686,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8218: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8222: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8252,8 +8723,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8301,6 +8770,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8343,6 +8818,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8405,7 +8887,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8417,25 +8905,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8467,7 +8955,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8524,13 +9012,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8554,15 +9046,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8557: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8561: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8591,6 +9083,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8610,7 +9107,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -8659,16 +9156,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8662: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8666: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8714,16 +9211,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8717: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8721: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8836,7 +9333,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -8854,6 +9377,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -8869,11 +9393,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -8909,10 +9434,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -8930,6 +9457,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -8955,15 +9487,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -8974,13 +9507,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -8996,17 +9533,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -9020,8 +9557,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -9039,8 +9576,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9086,8 +9623,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9127,8 +9664,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9215,7 +9754,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9228,25 +9773,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9255,7 +9807,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9268,30 +9826,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9323,20 +9893,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9346,7 +9959,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9354,7 +9971,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9397,7 +10014,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9405,7 +10022,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9420,8 +10037,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9439,16 +10056,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9460,7 +10077,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9488,26 +10144,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9569,17 +10238,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9589,13 +10258,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9608,9 +10277,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -10012,16 +10681,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -10034,7 +10710,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -10054,7 +10730,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10142,7 +10824,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10173,8 +10855,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10195,36 +10878,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10311,6 +11041,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10353,8 +11096,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10463,7 +11208,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -10766,6 +11511,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -11096,7 +11846,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11099 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11137,7 +11887,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11146,7 +11902,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11192,7 +11952,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11195 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11233,7 +11993,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11242,7 +12008,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -14706,131 +15476,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -14843,8 +15635,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -14854,14 +15651,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -14877,7 +15674,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -14885,12 +15681,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -14912,14 +15709,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -14927,12 +15725,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -15675,7 +16467,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -15723,6 +16516,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -15772,9 +16571,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -15782,13 +16583,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -15797,6 +16615,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -15815,14 +16636,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -15830,6 +16651,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -15886,6 +16710,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -15925,6 +16752,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -15937,12 +16768,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -16029,9 +16860,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -16047,6 +16875,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -16079,212 +16910,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/binutils/doc/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/binutils/doc/Makefile.in
++++ binutils-2.20.1/binutils/doc/Makefile.in
+@@ -129,6 +129,7 @@ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEMANGLER_NAME = @DEMANGLER_NAME@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DLLTOOL_DEFS = @DLLTOOL_DEFS@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+@@ -169,6 +170,7 @@ LTLIBICONV = @LTLIBICONV@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -206,6 +208,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -238,7 +241,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/configure
+===================================================================
+--- binutils-2.20.1.orig/configure
++++ binutils-2.20.1/configure
+@@ -2646,7 +2646,7 @@ host_libs="intl mmalloc libiberty opcode
+ # binutils, gas and ld appear in that order because it makes sense to run
+ # "make check" in that particular order.
+ # If --enable-gold is used, "gold" will replace "ld".
+-host_tools="texinfo byacc flex bison binutils gas ld fixincludes gcc cgen sid sim gdb make patch prms send-pr gprof etc expect dejagnu ash bash bzip2 m4 autoconf automake libtool diff rcs fileutils shellutils time textutils wdiff find uudecode hello tar gzip indent recode release sed utils guile perl gawk findutils gettext zip fastjar gnattools"
++host_tools="byacc flex bison binutils gas ld fixincludes gcc cgen sid sim gdb make patch prms send-pr gprof etc expect dejagnu ash bash bzip2 m4 autoconf automake libtool diff rcs fileutils shellutils time textutils wdiff find uudecode hello tar gzip indent recode release sed utils guile perl gawk findutils gettext zip fastjar gnattools"
+ 
+ # libgcj represents the runtime libraries only used by gcj.
+ libgcj="target-libffi \
+@@ -3054,7 +3054,7 @@ case "${target}" in
+   am33_2.0-*-linux*)
+     noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
+     ;;
+-  sh*-*-linux*)
++  sh-*-linux*)
+     noconfigdirs="$noconfigdirs ${libgcj} target-newlib target-libgloss"
+     ;;
+   sh*-*-pe|mips*-*-pe|*arm-wince-pe)
+@@ -3390,7 +3390,7 @@ case "${target}" in
+   romp-*-*)
+     noconfigdirs="$noconfigdirs bfd binutils ld gas opcodes target-libgloss ${libgcj}"
+     ;;
+-  sh*-*-* | sh64-*-*)
++  sh-*-* | sh64-*-*)
+     case "${host}" in
+       i[3456789]86-*-vsta) ;; # don't add gprof back in
+       i[3456789]86-*-go32*) ;; # don't add gprof back in
+@@ -7275,7 +7275,7 @@ case " $build_configdirs " in
+     # For an installed makeinfo, we require it to be from texinfo 4.7 or
+     # higher, else we use the "missing" dummy.
+     if ${MAKEINFO} --version \
+-       | egrep 'texinfo[^0-9]*(4\.([7-9]|[1-9][0-9])|[5-9]|[1-9][0-9])' >/dev/null 2>&1; then
++       | egrep 'texinfo[^0-9]*([1-3][0-9]|4.[4-9]|4.[1-9][0-9]+|[5-9])' >/dev/null 2>&1; then
+       :
+     else
+       MAKEINFO="$MISSING makeinfo"
+Index: binutils-2.20.1/gas/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/gas/Makefile.in
++++ binutils-2.20.1/gas/Makefile.in
+@@ -146,6 +146,7 @@ CYGPATH_W = @CYGPATH_W@
+ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -181,6 +182,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -217,6 +219,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -253,7 +256,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ obj_format = @obj_format@
+Index: binutils-2.20.1/gas/configure
+===================================================================
+--- binutils-2.20.1.orig/gas/configure
++++ binutils-2.20.1/gas/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -784,9 +645,11 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
+ RANLIB
++ac_ct_AR
+ AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -898,6 +761,7 @@ enable_static
+ with_pic
+ enable_fast_install
+ with_gnu_ld
++with_libtool_sysroot
+ enable_libtool_lock
+ enable_targets
+ enable_checking
+@@ -1557,6 +1421,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+ 
+ Some influential environment variables:
+   CC          C compiler command
+@@ -5228,8 +5094,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5245,6 +5111,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5580,8 +5515,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -5625,7 +5563,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -5680,6 +5618,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -5699,13 +5646,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:5702: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5705: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5708: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -5762,6 +5709,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -5826,8 +5778,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -5869,8 +5821,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -5919,6 +5871,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -5935,6 +5961,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6098,16 +6129,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6137,6 +6170,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6145,11 +6182,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6252,6 +6289,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6267,16 +6319,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6285,7 +6347,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6295,10 +6357,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6306,17 +6368,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6325,7 +6387,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6335,17 +6397,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6353,18 +6415,54 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
++
++
++
+ 
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
+ 
+ 
+ 
+@@ -6373,15 +6471,17 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6390,7 +6490,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6400,28 +6500,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6430,7 +6534,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6440,20 +6544,185 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_STRIP" = x; then
+-    STRIP=":"
+-  else
+-    case $cross_compiling:$ac_tool_warned in
+-yes:)
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_STRIP" = x; then
++    STRIP=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+@@ -6587,6 +6856,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6694,8 +6975,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -6731,6 +7012,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -6756,8 +7038,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -6772,6 +7054,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -6783,7 +7077,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -6809,8 +7103,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -6820,8 +7114,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -6858,6 +7152,19 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6878,6 +7185,42 @@ fi
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
++
++
+ 
+ # Check whether --enable-libtool-lock was given.
+ if test "${enable_libtool_lock+set}" = set; then :
+@@ -6910,7 +7253,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 6913 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7072,6 +7415,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -7622,6 +8082,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -7649,7 +8141,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -7672,6 +8164,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ 
+ 
+@@ -7798,7 +8292,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -7873,19 +8369,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -7898,25 +8381,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -7943,7 +8409,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8152,7 +8618,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8172,15 +8643,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8175: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8179: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8209,8 +8680,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8258,6 +8727,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8300,6 +8775,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8362,7 +8844,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8374,25 +8862,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8424,7 +8912,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8481,13 +8969,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8511,15 +9003,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8514: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8518: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8548,6 +9040,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8567,7 +9064,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -8616,16 +9113,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8619: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8623: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8671,16 +9168,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8674: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8678: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8793,7 +9290,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -8811,6 +9334,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -8826,11 +9350,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -8866,10 +9391,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -8887,6 +9414,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -8912,15 +9444,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -8931,13 +9464,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -8953,17 +9490,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -8977,8 +9514,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -8996,8 +9533,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9043,8 +9580,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9084,8 +9621,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9172,7 +9711,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9185,25 +9730,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9212,7 +9764,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9225,30 +9783,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9280,20 +9850,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9303,7 +9916,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9311,7 +9928,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9354,7 +9971,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9362,7 +9979,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9377,8 +9994,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9396,16 +10013,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9417,7 +10034,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9445,26 +10101,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9526,17 +10195,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9546,13 +10215,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9565,9 +10234,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -9969,16 +10638,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -9991,7 +10667,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -10011,7 +10687,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10099,7 +10781,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10130,8 +10812,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10152,36 +10835,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10268,6 +10998,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10310,8 +11053,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10420,7 +11165,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -10723,6 +11468,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -11053,7 +11803,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11056 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11094,7 +11844,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11103,7 +11859,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11149,7 +11909,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11152 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11190,7 +11950,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11199,7 +11965,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -13276,7 +14046,7 @@ case "${need_libm}" in
+ yes)
+   LIBM=
+ case $host in
+-*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
++*-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*)
+   # These system don't have libm, or don't need it
+   ;;
+ *-ncr-sysv4.3*)
+@@ -14635,131 +15405,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -14772,8 +15564,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -14783,14 +15580,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -14806,7 +15603,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -14814,12 +15610,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -14841,14 +15638,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -14856,12 +15654,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -15611,7 +16403,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -15659,6 +16452,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -15708,9 +16507,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -15718,13 +16519,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -15733,6 +16551,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -15751,14 +16572,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -15766,6 +16587,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -15822,6 +16646,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -15861,6 +16688,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -15873,12 +16704,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -15965,9 +16796,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -15983,6 +16811,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -16015,212 +16846,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/gas/doc/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/gas/doc/Makefile.in
++++ binutils-2.20.1/gas/doc/Makefile.in
+@@ -116,6 +116,7 @@ CYGPATH_W = @CYGPATH_W@
+ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -151,6 +152,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -187,6 +189,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -223,7 +226,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ obj_format = @obj_format@
+Index: binutils-2.20.1/gprof/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/gprof/Makefile.in
++++ binutils-2.20.1/gprof/Makefile.in
+@@ -159,6 +159,7 @@ CYGPATH_W = @CYGPATH_W@
+ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -189,6 +190,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -222,6 +224,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -254,7 +257,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/gprof/configure
+===================================================================
+--- binutils-2.20.1.orig/gprof/configure
++++ binutils-2.20.1/gprof/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -768,9 +629,11 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
+ RANLIB
++ac_ct_AR
+ AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -882,6 +745,7 @@ enable_static
+ with_pic
+ enable_fast_install
+ with_gnu_ld
++with_libtool_sysroot
+ enable_libtool_lock
+ enable_nls
+ enable_maintainer_mode
+@@ -1535,6 +1399,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+ 
+ Some influential environment variables:
+   CC          C compiler command
+@@ -5166,8 +5032,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5183,6 +5049,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5518,8 +5453,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -5563,7 +5501,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -5618,6 +5556,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -5637,13 +5584,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:5640: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5643: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5646: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -5700,6 +5647,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -5764,8 +5716,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -5807,8 +5759,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -5857,6 +5809,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -5873,6 +5899,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6036,16 +6067,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6075,6 +6108,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6083,11 +6120,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6113,11 +6150,6 @@ linux* | k*bsd*-gnu | kopensolaris*-gnu)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
+-linux-uclibc*)
+-  lt_cv_deplibs_check_method=pass_all
+-  lt_cv_file_magic_test_file=`echo /lib/libuClibc-*.so`
+-  ;;
+-
+ netbsd*)
+   if echo __ELF__ | $CC -E - | $GREP __ELF__ > /dev/null; then
+     lt_cv_deplibs_check_method='match_pattern /lib[^/]+(\.so\.[0-9]+\.[0-9]+|_pic\.a)$'
+@@ -6195,6 +6227,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6210,16 +6257,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6228,7 +6285,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6238,10 +6295,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6249,17 +6306,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6268,7 +6325,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6278,17 +6335,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6296,14 +6353,16 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
+ 
+ 
+ 
+@@ -6311,20 +6370,56 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
++
++
++
+ 
+ 
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6333,7 +6428,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6343,28 +6438,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6373,7 +6472,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6383,17 +6482,182 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_STRIP" = x; then
+-    STRIP=":"
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_STRIP" = x; then
++    STRIP=":"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6530,6 +6794,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6637,8 +6913,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -6674,6 +6950,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -6699,8 +6976,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -6715,6 +6992,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -6726,7 +7015,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -6752,8 +7041,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -6763,8 +7052,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -6801,6 +7090,20 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6820,6 +7123,41 @@ fi
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
++
+ 
+ 
+ # Check whether --enable-libtool-lock was given.
+@@ -6853,7 +7191,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 6851 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7015,6 +7353,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -7565,6 +8020,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -7592,7 +8079,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -7615,6 +8102,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ 
+ 
+@@ -7741,7 +8230,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -7816,19 +8307,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -7841,25 +8319,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -7886,7 +8347,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8095,7 +8556,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8115,15 +8581,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8113: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8117: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8152,8 +8618,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8201,6 +8665,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8243,6 +8713,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8305,7 +8782,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8317,25 +8800,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8367,7 +8850,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8424,13 +8907,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8454,15 +8941,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8452: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8456: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8491,6 +8978,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8510,7 +9002,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -8559,16 +9051,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8557: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8561: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8614,16 +9106,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8612: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8616: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8736,7 +9228,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -8754,6 +9272,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -8769,11 +9288,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -8809,10 +9329,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -8830,6 +9352,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -8855,15 +9382,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -8874,13 +9402,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -8896,17 +9428,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -8920,8 +9452,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -8939,8 +9471,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -8986,8 +9518,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9027,8 +9559,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9115,7 +9649,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9128,25 +9668,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9155,7 +9702,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9168,30 +9721,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9223,20 +9788,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9246,7 +9854,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9254,7 +9866,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9297,7 +9909,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9305,7 +9917,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9320,8 +9932,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9339,16 +9951,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9360,7 +9972,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9388,26 +10039,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9469,17 +10133,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9489,13 +10153,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9508,9 +10172,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -9912,16 +10576,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -9934,7 +10605,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -9954,7 +10625,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10042,7 +10719,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10073,8 +10750,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10095,36 +10773,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10211,6 +10936,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10253,8 +10991,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10363,7 +11103,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -10666,6 +11406,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -10996,7 +11741,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 10994 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11037,7 +11782,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11046,7 +11797,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11092,7 +11847,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11090 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11133,7 +11888,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11142,7 +11903,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -12631,131 +13396,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -12768,8 +13555,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -12779,14 +13571,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -12802,7 +13594,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -12810,12 +13601,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -12837,14 +13629,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -12852,12 +13645,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -13599,7 +14386,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -13647,6 +14435,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -13696,9 +14490,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -13706,13 +14502,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -13721,6 +14534,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -13739,14 +14555,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -13754,6 +14570,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -13810,6 +14629,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -13849,6 +14671,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -13861,12 +14687,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -13953,9 +14779,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -13971,6 +14794,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -14003,212 +14829,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/ld/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/ld/Makefile.in
++++ binutils-2.20.1/ld/Makefile.in
+@@ -171,6 +171,7 @@ CYGPATH_W = @CYGPATH_W@
+ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -222,6 +223,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -264,6 +266,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -297,7 +300,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/ld/configure
+===================================================================
+--- binutils-2.20.1.orig/ld/configure
++++ binutils-2.20.1/ld/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -780,9 +641,11 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
+ RANLIB
++ac_ct_AR
+ AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -1568,6 +1431,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+ 
+ Some influential environment variables:
+   CC          C compiler command
+@@ -5616,8 +5481,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5633,6 +5498,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5968,8 +5902,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -6013,7 +5950,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -6068,6 +6005,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -6087,13 +6033,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:6090: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:6093: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:6096: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -6150,6 +6096,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -6214,8 +6165,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -6257,8 +6208,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -6307,6 +6258,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -6323,6 +6348,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6486,16 +6516,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6525,6 +6557,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6533,11 +6569,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6640,6 +6676,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6655,16 +6706,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6673,7 +6734,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6683,10 +6744,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6694,17 +6755,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6713,7 +6774,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6723,17 +6784,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6741,18 +6802,54 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
++
++
++
+ 
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
+ 
+ 
+ 
+@@ -6761,15 +6858,17 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6778,7 +6877,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6788,28 +6887,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6818,7 +6921,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6828,20 +6931,185 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_STRIP" = x; then
+-    STRIP=":"
+-  else
+-    case $cross_compiling:$ac_tool_warned in
+-yes:)
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_STRIP" = x; then
++    STRIP=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
+ { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+@@ -6975,6 +7243,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -7082,8 +7362,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -7119,6 +7399,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -7144,8 +7425,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -7160,6 +7441,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -7171,7 +7464,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -7197,8 +7490,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -7208,8 +7501,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -7246,6 +7539,21 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -7264,6 +7572,40 @@ fi
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
+ 
+ 
+ 
+@@ -7298,7 +7640,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 7301 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7460,6 +7802,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -8010,6 +8469,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -8037,7 +8528,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -8060,6 +8551,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ 
+ 
+@@ -8186,7 +8679,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -8261,19 +8756,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -8286,25 +8768,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -8331,7 +8796,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8540,7 +9005,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8560,15 +9030,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8563: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8567: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8597,8 +9067,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8646,6 +9114,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8688,6 +9162,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8750,7 +9231,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8762,25 +9249,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8812,7 +9299,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8869,13 +9356,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8899,15 +9390,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8902: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8906: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8936,6 +9427,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8955,7 +9451,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -9004,16 +9500,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:9007: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:9011: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -9059,16 +9555,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:9062: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:9066: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -9181,7 +9677,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -9199,6 +9721,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -9214,11 +9737,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -9254,10 +9778,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -9275,6 +9801,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -9300,15 +9831,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -9319,13 +9851,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -9341,17 +9877,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -9365,8 +9901,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -9384,8 +9920,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9431,8 +9967,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9472,8 +10008,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9560,7 +10098,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9573,25 +10117,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9600,7 +10151,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9613,30 +10170,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9668,20 +10237,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9691,7 +10303,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9699,7 +10315,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9742,7 +10358,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9750,7 +10366,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9765,8 +10381,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9784,16 +10400,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9805,7 +10421,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9833,26 +10488,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9914,17 +10582,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9934,13 +10602,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9953,9 +10621,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -10357,16 +11025,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -10379,7 +11054,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -10399,7 +11074,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10487,7 +11168,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10518,8 +11199,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10540,36 +11222,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10656,6 +11385,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10698,8 +11440,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10808,7 +11552,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -11111,6 +11855,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -11441,7 +12190,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11444 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11482,7 +12231,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11491,7 +12246,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11537,7 +12296,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11540 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11578,7 +12337,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11587,7 +12352,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -13694,131 +14463,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -13831,8 +14622,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -13842,14 +14638,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -13865,7 +14661,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -13873,12 +14668,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -13900,14 +14696,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -13915,12 +14712,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -14701,7 +15492,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -14749,6 +15541,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -14798,9 +15596,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -14808,13 +15608,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -14823,6 +15640,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -14841,14 +15661,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -14856,6 +15676,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -14912,6 +15735,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -14951,6 +15777,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -14963,12 +15793,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -15055,9 +15885,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -15073,6 +15900,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -15105,212 +15935,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/opcodes/configure
+===================================================================
+--- binutils-2.20.1.orig/opcodes/configure
++++ binutils-2.20.1/opcodes/configure
+@@ -169,7 +169,15 @@ test x\$exitcode = x0 || exit 1"
+   as_lineno_2=";as_suggested=$as_suggested$LINENO;as_suggested=$as_suggested" as_lineno_2a=\$LINENO
+   eval 'test \"x\$as_lineno_1'\$as_run'\" != \"x\$as_lineno_2'\$as_run'\" &&
+   test \"x\`expr \$as_lineno_1'\$as_run' + 1\`\" = \"x\$as_lineno_2'\$as_run'\"' || exit 1
+-test \$(( 1 + 1 )) = 2 || exit 1"
++test \$(( 1 + 1 )) = 2 || exit 1
++
++  test -n \"\${ZSH_VERSION+set}\${BASH_VERSION+set}\" || (
++    ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    ECHO=\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO\$ECHO
++    PATH=/empty FPATH=/empty; export PATH FPATH
++    test \"X\`printf %s \$ECHO\`\" = \"X\$ECHO\" \\
++      || test \"X\`print -r -- \$ECHO\`\" = \"X\$ECHO\" ) || exit 1"
+   if (eval "$as_required") 2>/dev/null; then :
+   as_have_required=yes
+ else
+@@ -523,155 +531,8 @@ as_tr_cpp="eval sed 'y%*$as_cr_letters%P
+ # Sed expression to map a string onto a valid variable name.
+ as_tr_sh="eval sed 'y%*+%pp%;s%[^_$as_cr_alnum]%_%g'"
+ 
+-
+-
+-# Check that we are running under the correct shell.
+ SHELL=${CONFIG_SHELL-/bin/sh}
+ 
+-case X$lt_ECHO in
+-X*--fallback-echo)
+-  # Remove one level of quotation (which was required for Make).
+-  ECHO=`echo "$lt_ECHO" | sed 's,\\\\\$\\$0,'$0','`
+-  ;;
+-esac
+-
+-ECHO=${lt_ECHO-echo}
+-if test "X$1" = X--no-reexec; then
+-  # Discard the --no-reexec flag, and continue.
+-  shift
+-elif test "X$1" = X--fallback-echo; then
+-  # Avoid inline document here, it may be left over
+-  :
+-elif test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' ; then
+-  # Yippee, $ECHO works!
+-  :
+-else
+-  # Restart under the correct shell.
+-  exec $SHELL "$0" --no-reexec ${1+"$@"}
+-fi
+-
+-if test "X$1" = X--fallback-echo; then
+-  # used as fallback echo
+-  shift
+-  cat <<_LT_EOF
+-$*
+-_LT_EOF
+-  exit 0
+-fi
+-
+-# The HP-UX ksh and POSIX shell print the target directory to stdout
+-# if CDPATH is set.
+-(unset CDPATH) >/dev/null 2>&1 && unset CDPATH
+-
+-if test -z "$lt_ECHO"; then
+-  if test "X${echo_test_string+set}" != Xset; then
+-    # find a string as large as possible, as long as the shell can cope with it
+-    for cmd in 'sed 50q "$0"' 'sed 20q "$0"' 'sed 10q "$0"' 'sed 2q "$0"' 'echo test'; do
+-      # expected sizes: less than 2Kb, 1Kb, 512 bytes, 16 bytes, ...
+-      if { echo_test_string=`eval $cmd`; } 2>/dev/null &&
+-	 { test "X$echo_test_string" = "X$echo_test_string"; } 2>/dev/null
+-      then
+-        break
+-      fi
+-    done
+-  fi
+-
+-  if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-     echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-     test "X$echo_testing_string" = "X$echo_test_string"; then
+-    :
+-  else
+-    # The Solaris, AIX, and Digital Unix default echo programs unquote
+-    # backslashes.  This makes it impossible to quote backslashes using
+-    #   echo "$something" | sed 's/\\/\\\\/g'
+-    #
+-    # So, first we look for a working echo in the user's PATH.
+-
+-    lt_save_ifs="$IFS"; IFS=$PATH_SEPARATOR
+-    for dir in $PATH /usr/ucb; do
+-      IFS="$lt_save_ifs"
+-      if (test -f $dir/echo || test -f $dir/echo$ac_exeext) &&
+-         test "X`($dir/echo '\t') 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`($dir/echo "$echo_test_string") 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        ECHO="$dir/echo"
+-        break
+-      fi
+-    done
+-    IFS="$lt_save_ifs"
+-
+-    if test "X$ECHO" = Xecho; then
+-      # We didn't find a better echo, so look for alternatives.
+-      if test "X`{ print -r '\t'; } 2>/dev/null`" = 'X\t' &&
+-         echo_testing_string=`{ print -r "$echo_test_string"; } 2>/dev/null` &&
+-         test "X$echo_testing_string" = "X$echo_test_string"; then
+-        # This shell has a builtin print -r that does the trick.
+-        ECHO='print -r'
+-      elif { test -f /bin/ksh || test -f /bin/ksh$ac_exeext; } &&
+-	   test "X$CONFIG_SHELL" != X/bin/ksh; then
+-        # If we have ksh, try running configure again with it.
+-        ORIGINAL_CONFIG_SHELL=${CONFIG_SHELL-/bin/sh}
+-        export ORIGINAL_CONFIG_SHELL
+-        CONFIG_SHELL=/bin/ksh
+-        export CONFIG_SHELL
+-        exec $CONFIG_SHELL "$0" --no-reexec ${1+"$@"}
+-      else
+-        # Try using printf.
+-        ECHO='printf %s\n'
+-        if test "X`{ $ECHO '\t'; } 2>/dev/null`" = 'X\t' &&
+-	   echo_testing_string=`{ $ECHO "$echo_test_string"; } 2>/dev/null` &&
+-	   test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  # Cool, printf works
+-	  :
+-        elif echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($ORIGINAL_CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  CONFIG_SHELL=$ORIGINAL_CONFIG_SHELL
+-	  export CONFIG_SHELL
+-	  SHELL="$CONFIG_SHELL"
+-	  export SHELL
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        elif echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo '\t') 2>/dev/null` &&
+-	     test "X$echo_testing_string" = 'X\t' &&
+-	     echo_testing_string=`($CONFIG_SHELL "$0" --fallback-echo "$echo_test_string") 2>/dev/null` &&
+-	     test "X$echo_testing_string" = "X$echo_test_string"; then
+-	  ECHO="$CONFIG_SHELL $0 --fallback-echo"
+-        else
+-	  # maybe with a smaller string...
+-	  prev=:
+-
+-	  for cmd in 'echo test' 'sed 2q "$0"' 'sed 10q "$0"' 'sed 20q "$0"' 'sed 50q "$0"'; do
+-	    if { test "X$echo_test_string" = "X`eval $cmd`"; } 2>/dev/null
+-	    then
+-	      break
+-	    fi
+-	    prev="$cmd"
+-	  done
+-
+-	  if test "$prev" != 'sed 50q "$0"'; then
+-	    echo_test_string=`eval $prev`
+-	    export echo_test_string
+-	    exec ${ORIGINAL_CONFIG_SHELL-${CONFIG_SHELL-/bin/sh}} "$0" ${1+"$@"}
+-	  else
+-	    # Oops.  We lost completely, so just stick with echo.
+-	    ECHO=echo
+-	  fi
+-        fi
+-      fi
+-    fi
+-  fi
+-fi
+-
+-# Copy echo and quote the copy suitably for passing to libtool from
+-# the Makefile, instead of quoting the original, which is used later.
+-lt_ECHO=$ECHO
+-if test "X$lt_ECHO" = "X$CONFIG_SHELL $0 --fallback-echo"; then
+-   lt_ECHO="$CONFIG_SHELL \\\$\$0 --fallback-echo"
+-fi
+-
+-
+-
+ 
+ exec 7<&0 </dev/null 6>&1
+ 
+@@ -786,7 +647,9 @@ OTOOL
+ LIPO
+ NMEDIT
+ DSYMUTIL
+-lt_ECHO
++MANIFEST_TOOL
++ac_ct_AR
++DLLTOOL
+ OBJDUMP
+ LN_S
+ NM
+@@ -899,6 +762,7 @@ enable_static
+ with_pic
+ enable_fast_install
+ with_gnu_ld
++with_libtool_sysroot
+ enable_libtool_lock
+ enable_targets
+ enable_werror
+@@ -1557,6 +1421,8 @@ Optional Packages:
+   --with-pic              try to use only PIC/non-PIC objects [default=use
+                           both]
+   --with-gnu-ld           assume the C compiler uses GNU ld [default=no]
++  --with-libtool-sysroot=DIR Search for dependent libraries within DIR
++                        (or the compiler's sysroot if not specified).
+ 
+ Some influential environment variables:
+   CC          C compiler command
+@@ -5246,8 +5112,8 @@ esac
+ 
+ 
+ 
+-macro_version='2.2.6'
+-macro_revision='1.3012'
++macro_version='2.4'
++macro_revision='1.3293'
+ 
+ 
+ 
+@@ -5263,6 +5129,75 @@ macro_revision='1.3012'
+ 
+ ltmain="$ac_aux_dir/ltmain.sh"
+ 
++# Backslashify metacharacters that are still active within
++# double-quoted strings.
++sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
++
++# Same as above, but do not quote variable references.
++double_quote_subst='s/\(["`\\]\)/\\\1/g'
++
++# Sed substitution to delay expansion of an escaped shell variable in a
++# double_quote_subst'ed string.
++delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
++
++# Sed substitution to delay expansion of an escaped single quote.
++delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
++
++# Sed substitution to avoid accidental globbing in evaled expressions
++no_glob_subst='s/\*/\\\*/g'
++
++ECHO='\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\'
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO
++ECHO=$ECHO$ECHO$ECHO$ECHO$ECHO$ECHO
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to print strings" >&5
++$as_echo_n "checking how to print strings... " >&6; }
++# Test print first, because it will be a builtin if present.
++if test "X`( print -r -- -n ) 2>/dev/null`" = X-n && \
++   test "X`print -r -- $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='print -r --'
++elif test "X`printf %s $ECHO 2>/dev/null`" = "X$ECHO"; then
++  ECHO='printf %s\n'
++else
++  # Use this function as a fallback that always works.
++  func_fallback_echo ()
++  {
++    eval 'cat <<_LTECHO_EOF
++$1
++_LTECHO_EOF'
++  }
++  ECHO='func_fallback_echo'
++fi
++
++# func_echo_all arg...
++# Invoke $ECHO with all args, space-separated.
++func_echo_all ()
++{
++    $ECHO ""
++}
++
++case "$ECHO" in
++  printf*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: printf" >&5
++$as_echo "printf" >&6; } ;;
++  print*) { $as_echo "$as_me:${as_lineno-$LINENO}: result: print -r" >&5
++$as_echo "print -r" >&6; } ;;
++  *) { $as_echo "$as_me:${as_lineno-$LINENO}: result: cat" >&5
++$as_echo "cat" >&6; } ;;
++esac
++
++
++
++
++
++
++
++
++
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for a sed that does not truncate output" >&5
+ $as_echo_n "checking for a sed that does not truncate output... " >&6; }
+ if test "${ac_cv_path_SED+set}" = set; then :
+@@ -5598,8 +5533,11 @@ if test "$lt_cv_path_NM" != "no"; then
+   NM="$lt_cv_path_NM"
+ else
+   # Didn't find any BSD compatible name lister, look for dumpbin.
+-  if test -n "$ac_tool_prefix"; then
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  if test -n "$DUMPBIN"; then :
++    # Let the user override the test.
++  else
++    if test -n "$ac_tool_prefix"; then
++  for ac_prog in dumpbin "link -dump"
+   do
+     # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
+ set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+@@ -5643,7 +5581,7 @@ fi
+ fi
+ if test -z "$DUMPBIN"; then
+   ac_ct_DUMPBIN=$DUMPBIN
+-  for ac_prog in "dumpbin -symbols" "link -dump -symbols"
++  for ac_prog in dumpbin "link -dump"
+ do
+   # Extract the first word of "$ac_prog", so it can be a program name with args.
+ set dummy $ac_prog; ac_word=$2
+@@ -5698,6 +5636,15 @@ esac
+   fi
+ fi
+ 
++    case `$DUMPBIN -symbols /dev/null 2>&1 | sed '1q'` in
++    *COFF*)
++      DUMPBIN="$DUMPBIN -symbols"
++      ;;
++    *)
++      DUMPBIN=:
++      ;;
++    esac
++  fi
+ 
+   if test "$DUMPBIN" != ":"; then
+     NM="$DUMPBIN"
+@@ -5717,13 +5664,13 @@ if test "${lt_cv_nm_interface+set}" = se
+ else
+   lt_cv_nm_interface="BSD nm"
+   echo "int some_variable = 0;" > conftest.$ac_ext
+-  (eval echo "\"\$as_me:5720: $ac_compile\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $ac_compile\"" >&5)
+   (eval "$ac_compile" 2>conftest.err)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5723: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: $NM \\\"conftest.$ac_objext\\\"\"" >&5)
+   (eval "$NM \"conftest.$ac_objext\"" 2>conftest.err > conftest.out)
+   cat conftest.err >&5
+-  (eval echo "\"\$as_me:5726: output\"" >&5)
++  (eval echo "\"\$as_me:$LINENO: output\"" >&5)
+   cat conftest.out >&5
+   if $GREP 'External.*some_variable' conftest.out > /dev/null; then
+     lt_cv_nm_interface="MS dumpbin"
+@@ -5780,6 +5727,11 @@ else
+     lt_cv_sys_max_cmd_len=8192;
+     ;;
+ 
++  mint*)
++    # On MiNT this can take a long time and run out of memory.
++    lt_cv_sys_max_cmd_len=8192;
++    ;;
++
+   amigaos*)
+     # On AmigaOS with pdksh, this test takes hours, literally.
+     # So we just punt and use a minimum line length of 8192.
+@@ -5844,8 +5796,8 @@ else
+       # If test is not a shell built-in, we'll probably end up computing a
+       # maximum length that is only half of the actual maximum length, but
+       # we can't tell.
+-      while { test "X"`$SHELL $0 --fallback-echo "X$teststring$teststring" 2>/dev/null` \
+-	         = "XX$teststring$teststring"; } >/dev/null 2>&1 &&
++      while { test "X"`func_fallback_echo "$teststring$teststring" 2>/dev/null` \
++	         = "X$teststring$teststring"; } >/dev/null 2>&1 &&
+ 	      test $i != 17 # 1/2 MB should be enough
+       do
+         i=`expr $i + 1`
+@@ -5887,8 +5839,8 @@ $as_echo_n "checking whether the shell u
+ # Try some XSI features
+ xsi_shell=no
+ ( _lt_dummy="a/b/c"
+-  test "${_lt_dummy##*/},${_lt_dummy%/*},"${_lt_dummy%"$_lt_dummy"}, \
+-      = c,a/b,, \
++  test "${_lt_dummy##*/},${_lt_dummy%/*},${_lt_dummy#??}"${_lt_dummy%"$_lt_dummy"}, \
++      = c,a/b,b/c, \
+     && eval 'test $(( 1 + 1 )) -eq 2 \
+     && test "${#_lt_dummy}" -eq 5' ) >/dev/null 2>&1 \
+   && xsi_shell=yes
+@@ -5937,6 +5889,80 @@ esac
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to $host format" >&5
++$as_echo_n "checking how to convert $build file names to $host format... " >&6; }
++if test "${lt_cv_to_host_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_w32
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_cygwin_to_w32
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_w32
++        ;;
++    esac
++    ;;
++  *-*-cygwin* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_host_file_cmd=func_convert_file_msys_to_cygwin
++        ;;
++      *-*-cygwin* )
++        lt_cv_to_host_file_cmd=func_convert_file_noop
++        ;;
++      * ) # otherwise, assume *nix
++        lt_cv_to_host_file_cmd=func_convert_file_nix_to_cygwin
++        ;;
++    esac
++    ;;
++  * ) # unhandled hosts (and "normal" native builds)
++    lt_cv_to_host_file_cmd=func_convert_file_noop
++    ;;
++esac
++
++fi
++
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_host_file_cmd" >&5
++$as_echo "$lt_cv_to_host_file_cmd" >&6; }
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to convert $build file names to toolchain format" >&5
++$as_echo_n "checking how to convert $build file names to toolchain format... " >&6; }
++if test "${lt_cv_to_tool_file_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  #assume ordinary cross tools, or native build.
++lt_cv_to_tool_file_cmd=func_convert_file_noop
++case $host in
++  *-*-mingw* )
++    case $build in
++      *-*-mingw* ) # actually msys
++        lt_cv_to_tool_file_cmd=func_convert_file_msys_to_w32
++        ;;
++    esac
++    ;;
++esac
++
++fi
++
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_to_tool_file_cmd" >&5
++$as_echo "$lt_cv_to_tool_file_cmd" >&6; }
++
++
++
++
++
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $LD option to reload object files" >&5
+ $as_echo_n "checking for $LD option to reload object files... " >&6; }
+ if test "${lt_cv_ld_reload_flag+set}" = set; then :
+@@ -5953,6 +5979,11 @@ case $reload_flag in
+ esac
+ reload_cmds='$LD$reload_flag -o $output$reload_objs'
+ case $host_os in
++  cygwin* | mingw* | pw32* | cegcc*)
++    if test "$GCC" != yes; then
++      reload_cmds=false
++    fi
++    ;;
+   darwin*)
+     if test "$GCC" = yes; then
+       reload_cmds='$LTCC $LTCFLAGS -nostdlib ${wl}-r -o $output$reload_objs'
+@@ -6116,16 +6147,18 @@ mingw* | pw32*)
+   # Base MSYS/MinGW do not provide the 'file' command needed by
+   # func_win32_libid shell function, so use a weaker test based on 'objdump',
+   # unless we find 'file', for example because we are cross-compiling.
+-  if ( file / ) >/dev/null 2>&1; then
++  # func_win32_libid assumes BSD nm, so disallow it if using MS dumpbin.
++  if ( test "$lt_cv_nm_interface" = "BSD nm" && file / ) >/dev/null 2>&1; then
+     lt_cv_deplibs_check_method='file_magic ^x86 archive import|^x86 DLL'
+     lt_cv_file_magic_cmd='func_win32_libid'
+   else
+-    lt_cv_deplibs_check_method='file_magic file format pei*-i386(.*architecture: i386)?'
++    # Keep this pattern in sync with the one in func_win32_libid.
++    lt_cv_deplibs_check_method='file_magic file format (pei*-i386(.*architecture: i386)?|pe-arm-wince|pe-x86-64)'
+     lt_cv_file_magic_cmd='$OBJDUMP -f'
+   fi
+   ;;
+ 
+-cegcc)
++cegcc*)
+   # use the weaker test based on 'objdump'. See mingw*.
+   lt_cv_deplibs_check_method='file_magic file format pe-arm-.*little(.*architecture: arm)?'
+   lt_cv_file_magic_cmd='$OBJDUMP -f'
+@@ -6155,6 +6188,10 @@ gnu*)
+   lt_cv_deplibs_check_method=pass_all
+   ;;
+ 
++haiku*)
++  lt_cv_deplibs_check_method=pass_all
++  ;;
++
+ hpux10.20* | hpux11*)
+   lt_cv_file_magic_cmd=/usr/bin/file
+   case $host_cpu in
+@@ -6163,11 +6200,11 @@ hpux10.20* | hpux11*)
+     lt_cv_file_magic_test_file=/usr/lib/hpux32/libc.so
+     ;;
+   hppa*64*)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF-[0-9][0-9]) shared object file - PA-RISC [0-9].[0-9]'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|ELF[ -][0-9][0-9])(-bit)?( [LM]SB)? shared object( file)?[, -]* PA-RISC [0-9]\.[0-9]'
+     lt_cv_file_magic_test_file=/usr/lib/pa20_64/libc.sl
+     ;;
+   *)
+-    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9].[0-9]) shared library'
++    lt_cv_deplibs_check_method='file_magic (s[0-9][0-9][0-9]|PA-RISC[0-9]\.[0-9]) shared library'
+     lt_cv_file_magic_test_file=/usr/lib/libc.sl
+     ;;
+   esac
+@@ -6270,6 +6307,21 @@ esac
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_deplibs_check_method" >&5
+ $as_echo "$lt_cv_deplibs_check_method" >&6; }
++
++file_magic_glob=
++want_nocaseglob=no
++if test "$build" = "$host"; then
++  case $host_os in
++  mingw* | pw32*)
++    if ( shopt | grep nocaseglob ) >/dev/null 2>&1; then
++      want_nocaseglob=yes
++    else
++      file_magic_glob=`echo aAbBcCdDeEfFgGhHiIjJkKlLmMnNoOpPqQrRsStTuUvVwWxXyYzZ | $SED -e "s/\(..\)/s\/[\1]\/[\1]\/g;/g"`
++    fi
++    ;;
++  esac
++fi
++
+ file_magic_cmd=$lt_cv_file_magic_cmd
+ deplibs_check_method=$lt_cv_deplibs_check_method
+ test -z "$deplibs_check_method" && deplibs_check_method=unknown
+@@ -6285,16 +6337,26 @@ test -z "$deplibs_check_method" && depli
+ 
+ 
+ 
++
++
++
++
++
++
++
++
++
++
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}ar; ac_word=$2
++  # Extract the first word of "${ac_tool_prefix}dlltool", so it can be a program name with args.
++set dummy ${ac_tool_prefix}dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_AR+set}" = set; then :
++if test "${ac_cv_prog_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$AR"; then
+-  ac_cv_prog_AR="$AR" # Let the user override the test.
++  if test -n "$DLLTOOL"; then
++  ac_cv_prog_DLLTOOL="$DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6303,7 +6365,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_AR="${ac_tool_prefix}ar"
++    ac_cv_prog_DLLTOOL="${ac_tool_prefix}dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6313,10 +6375,10 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-AR=$ac_cv_prog_AR
+-if test -n "$AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
+-$as_echo "$AR" >&6; }
++DLLTOOL=$ac_cv_prog_DLLTOOL
++if test -n "$DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $DLLTOOL" >&5
++$as_echo "$DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+@@ -6324,17 +6386,17 @@ fi
+ 
+ 
+ fi
+-if test -z "$ac_cv_prog_AR"; then
+-  ac_ct_AR=$AR
+-  # Extract the first word of "ar", so it can be a program name with args.
+-set dummy ar; ac_word=$2
++if test -z "$ac_cv_prog_DLLTOOL"; then
++  ac_ct_DLLTOOL=$DLLTOOL
++  # Extract the first word of "dlltool", so it can be a program name with args.
++set dummy dlltool; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_DLLTOOL+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_AR"; then
+-  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
++  if test -n "$ac_ct_DLLTOOL"; then
++  ac_cv_prog_ac_ct_DLLTOOL="$ac_ct_DLLTOOL" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6343,7 +6405,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_AR="ar"
++    ac_cv_prog_ac_ct_DLLTOOL="dlltool"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6353,17 +6415,17 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_AR=$ac_cv_prog_ac_ct_AR
+-if test -n "$ac_ct_AR"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
+-$as_echo "$ac_ct_AR" >&6; }
++ac_ct_DLLTOOL=$ac_cv_prog_ac_ct_DLLTOOL
++if test -n "$ac_ct_DLLTOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_DLLTOOL" >&5
++$as_echo "$ac_ct_DLLTOOL" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+-  if test "x$ac_ct_AR" = x; then
+-    AR="false"
++  if test "x$ac_ct_DLLTOOL" = x; then
++    DLLTOOL="false"
+   else
+     case $cross_compiling:$ac_tool_warned in
+ yes:)
+@@ -6371,18 +6433,54 @@ yes:)
+ $as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
+ ac_tool_warned=yes ;;
+ esac
+-    AR=$ac_ct_AR
++    DLLTOOL=$ac_ct_DLLTOOL
+   fi
+ else
+-  AR="$ac_cv_prog_AR"
++  DLLTOOL="$ac_cv_prog_DLLTOOL"
+ fi
+ 
+-test -z "$AR" && AR=ar
+-test -z "$AR_FLAGS" && AR_FLAGS=cru
++test -z "$DLLTOOL" && DLLTOOL=dlltool
++
++
++
++
++
++
+ 
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking how to associate runtime and link libraries" >&5
++$as_echo_n "checking how to associate runtime and link libraries... " >&6; }
++if test "${lt_cv_sharedlib_from_linklib_cmd+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_sharedlib_from_linklib_cmd='unknown'
++
++case $host_os in
++cygwin* | mingw* | pw32* | cegcc*)
++  # two different shell functions defined in ltmain.sh
++  # decide which to use based on capabilities of $DLLTOOL
++  case `$DLLTOOL --help 2>&1` in
++  *--identify-strict*)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib
++    ;;
++  *)
++    lt_cv_sharedlib_from_linklib_cmd=func_cygming_dll_for_implib_fallback
++    ;;
++  esac
++  ;;
++*)
++  # fallback: assume linklib IS sharedlib
++  lt_cv_sharedlib_from_linklib_cmd="$ECHO"
++  ;;
++esac
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_sharedlib_from_linklib_cmd" >&5
++$as_echo "$lt_cv_sharedlib_from_linklib_cmd" >&6; }
++sharedlib_from_linklib_cmd=$lt_cv_sharedlib_from_linklib_cmd
++test -z "$sharedlib_from_linklib_cmd" && sharedlib_from_linklib_cmd=$ECHO
+ 
+ 
+ 
+@@ -6391,15 +6489,17 @@ test -z "$AR_FLAGS" && AR_FLAGS=cru
+ 
+ 
+ if test -n "$ac_tool_prefix"; then
+-  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
+-set dummy ${ac_tool_prefix}strip; ac_word=$2
++  for ac_prog in ar
++  do
++    # Extract the first word of "$ac_tool_prefix$ac_prog", so it can be a program name with args.
++set dummy $ac_tool_prefix$ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_STRIP+set}" = set; then :
++if test "${ac_cv_prog_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$STRIP"; then
+-  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++  if test -n "$AR"; then
++  ac_cv_prog_AR="$AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6408,7 +6508,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    ac_cv_prog_AR="$ac_tool_prefix$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6418,28 +6518,32 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-STRIP=$ac_cv_prog_STRIP
+-if test -n "$STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
+-$as_echo "$STRIP" >&6; }
++AR=$ac_cv_prog_AR
++if test -n "$AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $AR" >&5
++$as_echo "$AR" >&6; }
+ else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+ 
+ 
++    test -n "$AR" && break
++  done
+ fi
+-if test -z "$ac_cv_prog_STRIP"; then
+-  ac_ct_STRIP=$STRIP
+-  # Extract the first word of "strip", so it can be a program name with args.
+-set dummy strip; ac_word=$2
++if test -z "$AR"; then
++  ac_ct_AR=$AR
++  for ac_prog in ar
++do
++  # Extract the first word of "$ac_prog", so it can be a program name with args.
++set dummy $ac_prog; ac_word=$2
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
+ $as_echo_n "checking for $ac_word... " >&6; }
+-if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++if test "${ac_cv_prog_ac_ct_AR+set}" = set; then :
+   $as_echo_n "(cached) " >&6
+ else
+-  if test -n "$ac_ct_STRIP"; then
+-  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++  if test -n "$ac_ct_AR"; then
++  ac_cv_prog_ac_ct_AR="$ac_ct_AR" # Let the user override the test.
+ else
+ as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
+ for as_dir in $PATH
+@@ -6448,7 +6552,7 @@ do
+   test -z "$as_dir" && as_dir=.
+     for ac_exec_ext in '' $ac_executable_extensions; do
+   if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
+-    ac_cv_prog_ac_ct_STRIP="strip"
++    ac_cv_prog_ac_ct_AR="$ac_prog"
+     $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
+     break 2
+   fi
+@@ -6458,11 +6562,176 @@ IFS=$as_save_IFS
+ 
+ fi
+ fi
+-ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
+-if test -n "$ac_ct_STRIP"; then
+-  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
+-$as_echo "$ac_ct_STRIP" >&6; }
+-else
++ac_ct_AR=$ac_cv_prog_ac_ct_AR
++if test -n "$ac_ct_AR"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_AR" >&5
++$as_echo "$ac_ct_AR" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++  test -n "$ac_ct_AR" && break
++done
++
++  if test "x$ac_ct_AR" = x; then
++    AR="false"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    AR=$ac_ct_AR
++  fi
++fi
++
++: ${AR=ar}
++: ${AR_FLAGS=cru}
++
++
++
++
++
++
++
++
++
++
++
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for archiver @FILE support" >&5
++$as_echo_n "checking for archiver @FILE support... " >&6; }
++if test "${lt_cv_ar_at_file+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ar_at_file=no
++   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++/* end confdefs.h.  */
++
++int
++main ()
++{
++
++  ;
++  return 0;
++}
++_ACEOF
++if ac_fn_c_try_compile "$LINENO"; then :
++  echo conftest.$ac_objext > conftest.lst
++      lt_ar_try='$AR $AR_FLAGS libconftest.a @conftest.lst >&5'
++      { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++      if test "$ac_status" -eq 0; then
++	# Ensure the archiver fails upon bogus file names.
++	rm -f conftest.$ac_objext libconftest.a
++	{ { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$lt_ar_try\""; } >&5
++  (eval $lt_ar_try) 2>&5
++  ac_status=$?
++  $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
++  test $ac_status = 0; }
++	if test "$ac_status" -ne 0; then
++          lt_cv_ar_at_file=@
++        fi
++      fi
++      rm -f conftest.* libconftest.a
++
++fi
++rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ar_at_file" >&5
++$as_echo "$lt_cv_ar_at_file" >&6; }
++
++if test "x$lt_cv_ar_at_file" = xno; then
++  archiver_list_spec=
++else
++  archiver_list_spec=$lt_cv_ar_at_file
++fi
++
++
++
++
++
++
++
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args.
++set dummy ${ac_tool_prefix}strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$STRIP"; then
++  ac_cv_prog_STRIP="$STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_STRIP="${ac_tool_prefix}strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++STRIP=$ac_cv_prog_STRIP
++if test -n "$STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $STRIP" >&5
++$as_echo "$STRIP" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_STRIP"; then
++  ac_ct_STRIP=$STRIP
++  # Extract the first word of "strip", so it can be a program name with args.
++set dummy strip; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_STRIP+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_STRIP"; then
++  ac_cv_prog_ac_ct_STRIP="$ac_ct_STRIP" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_STRIP="strip"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_STRIP=$ac_cv_prog_ac_ct_STRIP
++if test -n "$ac_ct_STRIP"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_STRIP" >&5
++$as_echo "$ac_ct_STRIP" >&6; }
++else
+   { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
+ $as_echo "no" >&6; }
+ fi
+@@ -6605,6 +6874,18 @@ if test -n "$RANLIB"; then
+   old_archive_cmds="$old_archive_cmds~\$RANLIB \$oldlib"
+ fi
+ 
++case $host_os in
++  darwin*)
++    lock_old_archive_extraction=yes ;;
++  *)
++    lock_old_archive_extraction=no ;;
++esac
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6712,8 +6993,8 @@ esac
+ lt_cv_sys_global_symbol_to_cdecl="sed -n -e 's/^T .* \(.*\)$/extern int \1();/p' -e 's/^$symcode* .* \(.*\)$/extern char \1;/p'"
+ 
+ # Transform an extracted symbol line into symbol name and symbol address
+-lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\) $/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"\2\", (void *) \&\2},/p'"
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix="sed -n -e 's/^: \([^ ]*\)[ ]*$/  {\\\"\1\\\", (void *) 0},/p' -e 's/^$symcode* \([^ ]*\) \(lib[^ ]*\)$/  {\"\2\", (void *) \&\2},/p' -e 's/^$symcode* \([^ ]*\) \([^ ]*\)$/  {\"lib\2\", (void *) \&\2},/p'"
+ 
+ # Handle CRLF in mingw tool chain
+ opt_cr=
+@@ -6749,6 +7030,7 @@ for ac_symprfx in "" "_"; do
+   else
+     lt_cv_sys_global_symbol_pipe="sed -n -e 's/^.*[	 ]\($symcode$symcode*\)[	 ][	 ]*$ac_symprfx$sympat$opt_cr$/$symxfrm/p'"
+   fi
++  lt_cv_sys_global_symbol_pipe="$lt_cv_sys_global_symbol_pipe | sed '/ __gnu_lto/d'"
+ 
+   # Check to see that the pipe works correctly.
+   pipe_works=no
+@@ -6774,8 +7056,8 @@ _LT_EOF
+   test $ac_status = 0; }; then
+     # Now try to grab the symbols.
+     nlist=conftest.nm
+-    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist\""; } >&5
+-  (eval $NM conftest.$ac_objext \| $lt_cv_sys_global_symbol_pipe \> $nlist) 2>&5
++    if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist\""; } >&5
++  (eval $NM conftest.$ac_objext \| "$lt_cv_sys_global_symbol_pipe" \> $nlist) 2>&5
+   ac_status=$?
+   $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+   test $ac_status = 0; } && test -s "$nlist"; then
+@@ -6790,6 +7072,18 @@ _LT_EOF
+       if $GREP ' nm_test_var$' "$nlist" >/dev/null; then
+ 	if $GREP ' nm_test_func$' "$nlist" >/dev/null; then
+ 	  cat <<_LT_EOF > conftest.$ac_ext
++/* Keep this code in sync between libtool.m4, ltmain, lt_system.h, and tests.  */
++#if defined(_WIN32) || defined(__CYGWIN__) || defined(_WIN32_WCE)
++/* DATA imports from DLLs on WIN32 con't be const, because runtime
++   relocations are performed -- see ld's documentation on pseudo-relocs.  */
++# define LT_DLSYM_CONST
++#elif defined(__osf__)
++/* This system does not cope well with relocations in const data.  */
++# define LT_DLSYM_CONST
++#else
++# define LT_DLSYM_CONST const
++#endif
++
+ #ifdef __cplusplus
+ extern "C" {
+ #endif
+@@ -6801,7 +7095,7 @@ _LT_EOF
+ 	  cat <<_LT_EOF >> conftest.$ac_ext
+ 
+ /* The mapping between symbol names and symbols.  */
+-const struct {
++LT_DLSYM_CONST struct {
+   const char *name;
+   void       *address;
+ }
+@@ -6827,8 +7121,8 @@ static const void *lt_preloaded_setup()
+ _LT_EOF
+ 	  # Now try linking the two files.
+ 	  mv conftest.$ac_objext conftstm.$ac_objext
+-	  lt_save_LIBS="$LIBS"
+-	  lt_save_CFLAGS="$CFLAGS"
++	  lt_globsym_save_LIBS=$LIBS
++	  lt_globsym_save_CFLAGS=$CFLAGS
+ 	  LIBS="conftstm.$ac_objext"
+ 	  CFLAGS="$CFLAGS$lt_prog_compiler_no_builtin_flag"
+ 	  if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_link\""; } >&5
+@@ -6838,8 +7132,8 @@ _LT_EOF
+   test $ac_status = 0; } && test -s conftest${ac_exeext}; then
+ 	    pipe_works=yes
+ 	  fi
+-	  LIBS="$lt_save_LIBS"
+-	  CFLAGS="$lt_save_CFLAGS"
++	  LIBS=$lt_globsym_save_LIBS
++	  CFLAGS=$lt_globsym_save_CFLAGS
+ 	else
+ 	  echo "cannot find nm_test_func in $nlist" >&5
+ 	fi
+@@ -6876,6 +7170,19 @@ else
+ $as_echo "ok" >&6; }
+ fi
+ 
++# Response file support.
++if test "$lt_cv_nm_interface" = "MS dumpbin"; then
++  nm_file_list_spec='@'
++elif $NM --help 2>/dev/null | grep '[@]FILE' >/dev/null; then
++  nm_file_list_spec='@'
++fi
++
++
++
++
++
++
++
+ 
+ 
+ 
+@@ -6896,6 +7203,42 @@ fi
+ 
+ 
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for sysroot" >&5
++$as_echo_n "checking for sysroot... " >&6; }
++
++# Check whether --with-libtool-sysroot was given.
++if test "${with_libtool_sysroot+set}" = set; then :
++  withval=$with_libtool_sysroot;
++else
++  with_libtool_sysroot=no
++fi
++
++
++lt_sysroot=
++case ${with_libtool_sysroot} in #(
++ yes)
++   if test "$GCC" = yes; then
++     lt_sysroot=`$CC --print-sysroot 2>/dev/null`
++   fi
++   ;; #(
++ /*)
++   lt_sysroot=`echo "$with_libtool_sysroot" | sed -e "$sed_quote_subst"`
++   ;; #(
++ no|'')
++   ;; #(
++ *)
++   { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${with_libtool_sysroot}" >&5
++$as_echo "${with_libtool_sysroot}" >&6; }
++   as_fn_error "The sysroot must be an absolute path." "$LINENO" 5
++   ;;
++esac
++
++ { $as_echo "$as_me:${as_lineno-$LINENO}: result: ${lt_sysroot:-no}" >&5
++$as_echo "${lt_sysroot:-no}" >&6; }
++
++
++
++
+ 
+ # Check whether --enable-libtool-lock was given.
+ if test "${enable_libtool_lock+set}" = set; then :
+@@ -6928,7 +7271,7 @@ ia64-*-hpux*)
+   ;;
+ *-*-irix6*)
+   # Find out which ABI we are using.
+-  echo '#line 6931 "configure"' > conftest.$ac_ext
++  echo '#line '$LINENO' "configure"' > conftest.$ac_ext
+   if { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_compile\""; } >&5
+   (eval $ac_compile) 2>&5
+   ac_status=$?
+@@ -7090,6 +7433,123 @@ esac
+ 
+ need_locks="$enable_libtool_lock"
+ 
++if test -n "$ac_tool_prefix"; then
++  # Extract the first word of "${ac_tool_prefix}mt", so it can be a program name with args.
++set dummy ${ac_tool_prefix}mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$MANIFEST_TOOL"; then
++  ac_cv_prog_MANIFEST_TOOL="$MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_MANIFEST_TOOL="${ac_tool_prefix}mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++MANIFEST_TOOL=$ac_cv_prog_MANIFEST_TOOL
++if test -n "$MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $MANIFEST_TOOL" >&5
++$as_echo "$MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++
++fi
++if test -z "$ac_cv_prog_MANIFEST_TOOL"; then
++  ac_ct_MANIFEST_TOOL=$MANIFEST_TOOL
++  # Extract the first word of "mt", so it can be a program name with args.
++set dummy mt; ac_word=$2
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $ac_word" >&5
++$as_echo_n "checking for $ac_word... " >&6; }
++if test "${ac_cv_prog_ac_ct_MANIFEST_TOOL+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  if test -n "$ac_ct_MANIFEST_TOOL"; then
++  ac_cv_prog_ac_ct_MANIFEST_TOOL="$ac_ct_MANIFEST_TOOL" # Let the user override the test.
++else
++as_save_IFS=$IFS; IFS=$PATH_SEPARATOR
++for as_dir in $PATH
++do
++  IFS=$as_save_IFS
++  test -z "$as_dir" && as_dir=.
++    for ac_exec_ext in '' $ac_executable_extensions; do
++  if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then
++    ac_cv_prog_ac_ct_MANIFEST_TOOL="mt"
++    $as_echo "$as_me:${as_lineno-$LINENO}: found $as_dir/$ac_word$ac_exec_ext" >&5
++    break 2
++  fi
++done
++  done
++IFS=$as_save_IFS
++
++fi
++fi
++ac_ct_MANIFEST_TOOL=$ac_cv_prog_ac_ct_MANIFEST_TOOL
++if test -n "$ac_ct_MANIFEST_TOOL"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: $ac_ct_MANIFEST_TOOL" >&5
++$as_echo "$ac_ct_MANIFEST_TOOL" >&6; }
++else
++  { $as_echo "$as_me:${as_lineno-$LINENO}: result: no" >&5
++$as_echo "no" >&6; }
++fi
++
++  if test "x$ac_ct_MANIFEST_TOOL" = x; then
++    MANIFEST_TOOL=":"
++  else
++    case $cross_compiling:$ac_tool_warned in
++yes:)
++{ $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: using cross tools not prefixed with host triplet" >&5
++$as_echo "$as_me: WARNING: using cross tools not prefixed with host triplet" >&2;}
++ac_tool_warned=yes ;;
++esac
++    MANIFEST_TOOL=$ac_ct_MANIFEST_TOOL
++  fi
++else
++  MANIFEST_TOOL="$ac_cv_prog_MANIFEST_TOOL"
++fi
++
++test -z "$MANIFEST_TOOL" && MANIFEST_TOOL=mt
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking if $MANIFEST_TOOL is a manifest tool" >&5
++$as_echo_n "checking if $MANIFEST_TOOL is a manifest tool... " >&6; }
++if test "${lt_cv_path_mainfest_tool+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_path_mainfest_tool=no
++  echo "$as_me:$LINENO: $MANIFEST_TOOL '-?'" >&5
++  $MANIFEST_TOOL '-?' 2>conftest.err > conftest.out
++  cat conftest.err >&5
++  if $GREP 'Manifest Tool' conftest.out > /dev/null; then
++    lt_cv_path_mainfest_tool=yes
++  fi
++  rm -f conftest*
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_path_mainfest_tool" >&5
++$as_echo "$lt_cv_path_mainfest_tool" >&6; }
++if test "x$lt_cv_path_mainfest_tool" != xyes; then
++  MANIFEST_TOOL=:
++fi
++
++
++
++
++
+ 
+   case $host_os in
+     rhapsody* | darwin*)
+@@ -7640,6 +8100,38 @@ rm -f core conftest.err conftest.$ac_obj
+ fi
+ { $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_exported_symbols_list" >&5
+ $as_echo "$lt_cv_ld_exported_symbols_list" >&6; }
++    { $as_echo "$as_me:${as_lineno-$LINENO}: checking for -force_load linker flag" >&5
++$as_echo_n "checking for -force_load linker flag... " >&6; }
++if test "${lt_cv_ld_force_load+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_ld_force_load=no
++      cat > conftest.c << _LT_EOF
++int forced_loaded() { return 2;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS -c -o conftest.o conftest.c" >&5
++      $LTCC $LTCFLAGS -c -o conftest.o conftest.c 2>&5
++      echo "$AR cru libconftest.a conftest.o" >&5
++      $AR cru libconftest.a conftest.o 2>&5
++      echo "$RANLIB libconftest.a" >&5
++      $RANLIB libconftest.a 2>&5
++      cat > conftest.c << _LT_EOF
++int main() { return 0;}
++_LT_EOF
++      echo "$LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a" >&5
++      $LTCC $LTCFLAGS $LDFLAGS -o conftest conftest.c -Wl,-force_load,./libconftest.a 2>conftest.err
++      _lt_result=$?
++      if test -f conftest && test ! -s conftest.err && test $_lt_result = 0 && $GREP forced_load conftest 2>&1 >/dev/null; then
++	lt_cv_ld_force_load=yes
++      else
++	cat conftest.err >&5
++      fi
++        rm -f conftest.err libconftest.a conftest conftest.c
++        rm -rf conftest.dSYM
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_ld_force_load" >&5
++$as_echo "$lt_cv_ld_force_load" >&6; }
+     case $host_os in
+     rhapsody* | darwin1.[012])
+       _lt_dar_allow_undefined='${wl}-undefined ${wl}suppress' ;;
+@@ -7667,7 +8159,7 @@ $as_echo "$lt_cv_ld_exported_symbols_lis
+     else
+       _lt_dar_export_syms='~$NMEDIT -s $output_objdir/${libname}-symbols.expsym ${lib}'
+     fi
+-    if test "$DSYMUTIL" != ":"; then
++    if test "$DSYMUTIL" != ":" && test "$lt_cv_ld_force_load" = "no"; then
+       _lt_dsymutil='~$DSYMUTIL $lib || :'
+     else
+       _lt_dsymutil=
+@@ -7690,6 +8182,8 @@ done
+ 
+ 
+ 
++
++
+ # Set options
+ 
+ 
+@@ -7786,7 +8280,9 @@ fi
+ LIBTOOL_DEPS="$ltmain"
+ 
+ # Always use our own libtool.
+-LIBTOOL='$(SHELL) $(top_builddir)/libtool'
++LIBTOOL='$(SHELL) $(top_builddir)'
++LIBTOOL="$LIBTOOL/${host_alias}-libtool"
++
+ 
+ 
+ 
+@@ -7861,19 +8357,6 @@ _ACEOF
+ 
+ 
+ 
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+-
+ case $host_os in
+ aix3*)
+   # AIX sometimes has problems with the GCC collect2 program.  For some
+@@ -7886,25 +8369,8 @@ aix3*)
+   ;;
+ esac
+ 
+-# Sed substitution that helps us do robust quoting.  It backslashifies
+-# metacharacters that are still active within double-quoted strings.
+-sed_quote_subst='s/\(["`$\\]\)/\\\1/g'
+-
+-# Same as above, but do not quote variable references.
+-double_quote_subst='s/\(["`\\]\)/\\\1/g'
+-
+-# Sed substitution to delay expansion of an escaped shell variable in a
+-# double_quote_subst'ed string.
+-delay_variable_subst='s/\\\\\\\\\\\$/\\\\\\$/g'
+-
+-# Sed substitution to delay expansion of an escaped single quote.
+-delay_single_quote_subst='s/'\''/'\'\\\\\\\'\''/g'
+-
+-# Sed substitution to avoid accidental globbing in evaled expressions
+-no_glob_subst='s/\*/\\\*/g'
+-
+ # Global variables:
+-ofile=libtool
++ofile=${host_alias}-libtool
+ can_build_shared=yes
+ 
+ # All known linkers require a `.a' archive for static linking (except MSVC,
+@@ -7931,7 +8397,7 @@ for cc_temp in $compiler""; do
+     *) break;;
+   esac
+ done
+-cc_basename=`$ECHO "X$cc_temp" | $Xsed -e 's%.*/%%' -e "s%^$host_alias-%%"`
++cc_basename=`$ECHO "$cc_temp" | $SED "s%.*/%%; s%^$host_alias-%%"`
+ 
+ 
+ # Only perform the check for file, if the check method requires it
+@@ -8140,7 +8606,12 @@ if test -n "$compiler"; then
+ lt_prog_compiler_no_builtin_flag=
+ 
+ if test "$GCC" = yes; then
+-  lt_prog_compiler_no_builtin_flag=' -fno-builtin'
++  case $cc_basename in
++  nvcc*)
++    lt_prog_compiler_no_builtin_flag=' -Xcompiler -fno-builtin' ;;
++  *)
++    lt_prog_compiler_no_builtin_flag=' -fno-builtin' ;;
++  esac
+ 
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $compiler supports -fno-rtti -fno-exceptions" >&5
+ $as_echo_n "checking if $compiler supports -fno-rtti -fno-exceptions... " >&6; }
+@@ -8160,15 +8631,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8163: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8167: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_rtti_exceptions=yes
+@@ -8197,8 +8668,6 @@ fi
+ lt_prog_compiler_pic=
+ lt_prog_compiler_static=
+ 
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
+-$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
+ 
+   if test "$GCC" = yes; then
+     lt_prog_compiler_wl='-Wl,'
+@@ -8246,6 +8715,12 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fno-common'
+       ;;
+ 
++    haiku*)
++      # PIC is the default for Haiku.
++      # The "-static" flag exists, but is broken.
++      lt_prog_compiler_static=
++      ;;
++
+     hpux*)
+       # PIC is the default for 64-bit PA HP-UX, but not for 32-bit
+       # PA HP-UX.  On IA64 HP-UX, PIC is the default but the pic flag
+@@ -8288,6 +8763,13 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-fPIC'
+       ;;
+     esac
++
++    case $cc_basename in
++    nvcc*) # Cuda Compiler Driver 2.2
++      lt_prog_compiler_wl='-Xlinker '
++      lt_prog_compiler_pic='-Xcompiler -fPIC'
++      ;;
++    esac
+   else
+     # PORTME Check for flag to pass linker flags through the system compiler.
+     case $host_os in
+@@ -8350,7 +8832,13 @@ $as_echo_n "checking for $compiler optio
+ 	lt_prog_compiler_pic='--shared'
+ 	lt_prog_compiler_static='--static'
+ 	;;
+-      pgcc* | pgf77* | pgf90* | pgf95*)
++      nagfor*)
++	# NAG Fortran compiler
++	lt_prog_compiler_wl='-Wl,-Wl,,'
++	lt_prog_compiler_pic='-PIC'
++	lt_prog_compiler_static='-Bstatic'
++	;;
++      pgcc* | pgf77* | pgf90* | pgf95* | pgfortran*)
+         # Portland Group compilers (*not* the Pentium gcc compiler,
+ 	# which looks to be a dead project)
+ 	lt_prog_compiler_wl='-Wl,'
+@@ -8362,25 +8850,25 @@ $as_echo_n "checking for $compiler optio
+         # All Alpha code is PIC.
+         lt_prog_compiler_static='-non_shared'
+         ;;
+-      xl*)
+-	# IBM XL C 8.0/Fortran 10.1 on PPC
++      xl* | bgxl* | bgf* | mpixl*)
++	# IBM XL C 8.0/Fortran 10.1, 11.1 on PPC and BlueGene
+ 	lt_prog_compiler_wl='-Wl,'
+ 	lt_prog_compiler_pic='-qpic'
+ 	lt_prog_compiler_static='-qstaticlink'
+ 	;;
+       *)
+ 	case `$CC -V 2>&1 | sed 5q` in
+-	*Sun\ C*)
+-	  # Sun C 5.9
++	*Sun\ F* | *Sun*Fortran*)
++	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl='-Wl,'
++	  lt_prog_compiler_wl=''
+ 	  ;;
+-	*Sun\ F*)
+-	  # Sun Fortran 8.3 passes all unrecognized flags to the linker
++	*Sun\ C*)
++	  # Sun C 5.9
+ 	  lt_prog_compiler_pic='-KPIC'
+ 	  lt_prog_compiler_static='-Bstatic'
+-	  lt_prog_compiler_wl=''
++	  lt_prog_compiler_wl='-Wl,'
+ 	  ;;
+ 	esac
+ 	;;
+@@ -8412,7 +8900,7 @@ $as_echo_n "checking for $compiler optio
+       lt_prog_compiler_pic='-KPIC'
+       lt_prog_compiler_static='-Bstatic'
+       case $cc_basename in
+-      f77* | f90* | f95*)
++      f77* | f90* | f95* | sunf77* | sunf90* | sunf95*)
+ 	lt_prog_compiler_wl='-Qoption ld ';;
+       *)
+ 	lt_prog_compiler_wl='-Wl,';;
+@@ -8469,13 +8957,17 @@ case $host_os in
+     lt_prog_compiler_pic="$lt_prog_compiler_pic -DPIC"
+     ;;
+ esac
+-{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_prog_compiler_pic" >&5
+-$as_echo "$lt_prog_compiler_pic" >&6; }
+-
+-
+-
+-
+ 
++{ $as_echo "$as_me:${as_lineno-$LINENO}: checking for $compiler option to produce PIC" >&5
++$as_echo_n "checking for $compiler option to produce PIC... " >&6; }
++if test "${lt_cv_prog_compiler_pic+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler_pic=$lt_prog_compiler_pic
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler_pic" >&5
++$as_echo "$lt_cv_prog_compiler_pic" >&6; }
++lt_prog_compiler_pic=$lt_cv_prog_compiler_pic
+ 
+ #
+ # Check to make sure the PIC flag actually works.
+@@ -8499,15 +8991,15 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8502: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>conftest.err)
+    ac_status=$?
+    cat conftest.err >&5
+-   echo "$as_me:8506: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s "$ac_outfile"; then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings other than the usual output.
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' >conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' >conftest.exp
+      $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+      if test ! -s conftest.er2 || diff conftest.exp conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_pic_works=yes
+@@ -8536,6 +9028,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+ #
+ # Check to make sure the static flag actually works.
+ #
+@@ -8555,7 +9052,7 @@ else
+      if test -s conftest.err; then
+        # Append any errors to the config.log.
+        cat conftest.err 1>&5
+-       $ECHO "X$_lt_linker_boilerplate" | $Xsed -e '/^$/d' > conftest.exp
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
+        $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
+        if diff conftest.exp conftest.er2 >/dev/null; then
+          lt_cv_prog_compiler_static_works=yes
+@@ -8604,16 +9101,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8607: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8611: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8659,16 +9156,16 @@ else
+    -e 's:.*FLAGS}\{0,1\} :&$lt_compiler_flag :; t' \
+    -e 's: [^ ]*conftest\.: $lt_compiler_flag&:; t' \
+    -e 's:$: $lt_compiler_flag:'`
+-   (eval echo "\"\$as_me:8662: $lt_compile\"" >&5)
++   (eval echo "\"\$as_me:$LINENO: $lt_compile\"" >&5)
+    (eval "$lt_compile" 2>out/conftest.err)
+    ac_status=$?
+    cat out/conftest.err >&5
+-   echo "$as_me:8666: \$? = $ac_status" >&5
++   echo "$as_me:$LINENO: \$? = $ac_status" >&5
+    if (exit $ac_status) && test -s out/conftest2.$ac_objext
+    then
+      # The compiler can only warn and ignore the option if not recognized
+      # So say no if there are warnings
+-     $ECHO "X$_lt_compiler_boilerplate" | $Xsed -e '/^$/d' > out/conftest.exp
++     $ECHO "$_lt_compiler_boilerplate" | $SED '/^$/d' > out/conftest.exp
+      $SED '/^$/d; /^ *+/d' out/conftest.err >out/conftest.er2
+      if test ! -s out/conftest.er2 || diff out/conftest.exp out/conftest.er2 >/dev/null; then
+        lt_cv_prog_compiler_c_o=yes
+@@ -8781,7 +9278,33 @@ $as_echo_n "checking whether the $compil
+   esac
+ 
+   ld_shlibs=yes
++
++  # On some targets, GNU ld is compatible enough with the native linker
++  # that we're better off using the native interface for both.
++  lt_use_gnu_ld_interface=no
+   if test "$with_gnu_ld" = yes; then
++    case $host_os in
++      aix*)
++	# The AIX port of GNU ld has always aspired to compatibility
++	# with the native linker.  However, as the warning in the GNU ld
++	# block says, versions before 2.19.5* couldn't really create working
++	# shared libraries, regardless of the interface used.
++	case `$LD -v 2>&1` in
++	  *\ \(GNU\ Binutils\)\ 2.19.5*) ;;
++	  *\ \(GNU\ Binutils\)\ 2.[2-9]*) ;;
++	  *\ \(GNU\ Binutils\)\ [3-9]*) ;;
++	  *)
++	    lt_use_gnu_ld_interface=yes
++	    ;;
++	esac
++	;;
++      *)
++	lt_use_gnu_ld_interface=yes
++	;;
++    esac
++  fi
++
++  if test "$lt_use_gnu_ld_interface" = yes; then
+     # If archive_cmds runs LD, not CC, wlarc should be empty
+     wlarc='${wl}'
+ 
+@@ -8799,6 +9322,7 @@ $as_echo_n "checking whether the $compil
+     fi
+     supports_anon_versioning=no
+     case `$LD -v 2>&1` in
++      *GNU\ gold*) supports_anon_versioning=yes ;;
+       *\ [01].* | *\ 2.[0-9].* | *\ 2.10.*) ;; # catch versions < 2.11
+       *\ 2.11.93.0.2\ *) supports_anon_versioning=yes ;; # RH7.3 ...
+       *\ 2.11.92.0.12\ *) supports_anon_versioning=yes ;; # Mandrake 8.2 ...
+@@ -8814,11 +9338,12 @@ $as_echo_n "checking whether the $compil
+ 	ld_shlibs=no
+ 	cat <<_LT_EOF 1>&2
+ 
+-*** Warning: the GNU linker, at least up to release 2.9.1, is reported
++*** Warning: the GNU linker, at least up to release 2.19, is reported
+ *** to be unable to reliably create shared libraries on AIX.
+ *** Therefore, libtool is disabling shared libraries support.  If you
+-*** really care for shared libraries, you may want to modify your PATH
+-*** so that a non-GNU linker is found, and then restart.
++*** really care for shared libraries, you may want to install binutils
++*** 2.20 or above, or modify your PATH so that a non-GNU linker is found.
++*** You will then need to restart the configuration process.
+ 
+ _LT_EOF
+       fi
+@@ -8854,10 +9379,12 @@ _LT_EOF
+       # _LT_TAGVAR(hardcode_libdir_flag_spec, ) is actually meaningless,
+       # as there is no search path for DLLs.
+       hardcode_libdir_flag_spec='-L$libdir'
++      export_dynamic_flag_spec='${wl}--export-all-symbols'
+       allow_undefined_flag=unsupported
+       always_export_symbols=no
+       enable_shared_with_static_runtimes=yes
+-      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++      export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1 DATA/;s/^.*[ ]__nm__\([^ ]*\)[ ][^ ]*/\1 DATA/;/^I[ ]/d;/^[AITW][ ]/s/.* //'\'' | sort | uniq > $export_symbols'
++      exclude_expsyms='[_]+GLOBAL_OFFSET_TABLE_|[_]+GLOBAL__[FID]_.*|[_]+head_[A-Za-z0-9_]+_dll|[A-Za-z0-9_]+_dll_iname'
+ 
+       if $LD --help 2>&1 | $GREP 'auto-import' > /dev/null; then
+         archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -o $output_objdir/$soname ${wl}--enable-auto-image-base -Xlinker --out-implib -Xlinker $lib'
+@@ -8875,6 +9402,11 @@ _LT_EOF
+       fi
+       ;;
+ 
++    haiku*)
++      archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++      link_all_deplibs=yes
++      ;;
++
+     interix[3-9]*)
+       hardcode_direct=no
+       hardcode_shlibpath_var=no
+@@ -8900,15 +9432,16 @@ _LT_EOF
+       if $LD --help 2>&1 | $EGREP ': supported targets:.* elf' > /dev/null \
+ 	 && test "$tmp_diet" = no
+       then
+-	tmp_addflag=
++	tmp_addflag=' $pic_flag'
+ 	tmp_sharedflag='-shared'
+ 	case $cc_basename,$host_cpu in
+         pgcc*)				# Portland Group C compiler
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag'
+ 	  ;;
+-	pgf77* | pgf90* | pgf95*)	# Portland Group f77 and f90 compilers
+-	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	pgf77* | pgf90* | pgf95* | pgfortran*)
++					# Portland Group f77 and f90 compilers
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  tmp_addflag=' $pic_flag -Mnomain' ;;
+ 	ecc*,ia64* | icc*,ia64*)	# Intel C compiler on ia64
+ 	  tmp_addflag=' -i_dynamic' ;;
+@@ -8919,13 +9452,17 @@ _LT_EOF
+ 	lf95*)				# Lahey Fortran 8.1
+ 	  whole_archive_flag_spec=
+ 	  tmp_sharedflag='--shared' ;;
+-	xl[cC]*)			# IBM XL C 8.0 on PPC (deal with xlf below)
++	xl[cC]* | bgxl[cC]* | mpixl[cC]*) # IBM XL C 8.0 on PPC (deal with xlf below)
+ 	  tmp_sharedflag='-qmkshrobj'
+ 	  tmp_addflag= ;;
++	nvcc*)	# Cuda Compiler Driver 2.2
++	  whole_archive_flag_spec='${wl}--whole-archive`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
++	  compiler_needs_object=yes
++	  ;;
+ 	esac
+ 	case `$CC -V 2>&1 | sed 5q` in
+ 	*Sun\ C*)			# Sun C 5.9
+-	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; $ECHO \"$new_convenience\"` ${wl}--no-whole-archive'
++	  whole_archive_flag_spec='${wl}--whole-archive`new_convenience=; for conv in $convenience\"\"; do test -z \"$conv\" || new_convenience=\"$new_convenience,$conv\"; done; func_echo_all \"$new_convenience\"` ${wl}--no-whole-archive'
+ 	  compiler_needs_object=yes
+ 	  tmp_sharedflag='-G' ;;
+ 	*Sun\ F*)			# Sun Fortran 8.3
+@@ -8941,17 +9478,17 @@ _LT_EOF
+         fi
+ 
+ 	case $cc_basename in
+-	xlf*)
++	xlf* | bgf* | bgxlf* | mpixlf*)
+ 	  # IBM XL Fortran 10.1 on PPC cannot create shared libs itself
+ 	  whole_archive_flag_spec='--whole-archive$convenience --no-whole-archive'
+ 	  hardcode_libdir_flag_spec=
+ 	  hardcode_libdir_flag_spec_ld='-rpath $libdir'
+-	  archive_cmds='$LD -shared $libobjs $deplibs $compiler_flags -soname $soname -o $lib'
++	  archive_cmds='$LD -shared $libobjs $deplibs $linker_flags -soname $soname -o $lib'
+ 	  if test "x$supports_anon_versioning" = xyes; then
+ 	    archive_expsym_cmds='echo "{ global:" > $output_objdir/$libname.ver~
+ 	      cat $export_symbols | sed -e "s/\(.*\)/\1;/" >> $output_objdir/$libname.ver~
+ 	      echo "local: *; };" >> $output_objdir/$libname.ver~
+-	      $LD -shared $libobjs $deplibs $compiler_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
++	      $LD -shared $libobjs $deplibs $linker_flags -soname $soname -version-script $output_objdir/$libname.ver -o $lib'
+ 	  fi
+ 	  ;;
+ 	esac
+@@ -8965,8 +9502,8 @@ _LT_EOF
+ 	archive_cmds='$LD -Bshareable $libobjs $deplibs $linker_flags -o $lib'
+ 	wlarc=
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       fi
+       ;;
+ 
+@@ -8984,8 +9521,8 @@ _LT_EOF
+ 
+ _LT_EOF
+       elif $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9031,8 +9568,8 @@ _LT_EOF
+ 
+     *)
+       if $LD --help 2>&1 | $GREP ': supported targets:.* elf' > /dev/null; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname -o $lib'
++	archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname $wl$soname ${wl}-retain-symbols-file $wl$export_symbols -o $lib'
+       else
+ 	ld_shlibs=no
+       fi
+@@ -9072,8 +9609,10 @@ _LT_EOF
+       else
+ 	# If we're using GNU nm, then we don't want the "-C" option.
+ 	# -C means demangle to AIX nm, but means don't demangle with GNU nm
++	# Also, AIX nm treats weak defined symbols like other global
++	# defined symbols, whereas GNU nm marks them as "W".
+ 	if $NM -V 2>&1 | $GREP 'GNU' > /dev/null; then
+-	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
++	  export_symbols_cmds='$NM -Bpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B") || (\$ 2 == "W")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	else
+ 	  export_symbols_cmds='$NM -BCpg $libobjs $convenience | awk '\''{ if (((\$ 2 == "T") || (\$ 2 == "D") || (\$ 2 == "B")) && (substr(\$ 3,1,1) != ".")) { print \$ 3 } }'\'' | sort -u > $export_symbols'
+ 	fi
+@@ -9160,7 +9699,13 @@ _LT_EOF
+ 	allow_undefined_flag='-berok'
+         # Determine the default libpath from the value encoded in an
+         # empty executable.
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++        if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9173,25 +9718,32 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+         hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+-        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then $ECHO "X${wl}${allow_undefined_flag}" | $Xsed; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
++        archive_expsym_cmds='$CC -o $output_objdir/$soname $libobjs $deplibs '"\${wl}$no_entry_flag"' $compiler_flags `if test "x${allow_undefined_flag}" != "x"; then func_echo_all "${wl}${allow_undefined_flag}"; else :; fi` '"\${wl}$exp_sym_flag:\$export_symbols $shared_flag"
+       else
+ 	if test "$host_cpu" = ia64; then
+ 	  hardcode_libdir_flag_spec='${wl}-R $libdir:/usr/lib:/lib'
+@@ -9200,7 +9752,13 @@ if test -z "$aix_libpath"; then aix_libp
+ 	else
+ 	 # Determine the default libpath from the value encoded in an
+ 	 # empty executable.
+-	 cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	 if test "${lt_cv_aix_libpath+set}" = set; then
++  aix_libpath=$lt_cv_aix_libpath
++else
++  if test "${lt_cv_aix_libpath_+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+ 
+ int
+@@ -9213,30 +9771,42 @@ main ()
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+ 
+-lt_aix_libpath_sed='
+-    /Import File Strings/,/^$/ {
+-	/^0/ {
+-	    s/^0  *\(.*\)$/\1/
+-	    p
+-	}
+-    }'
+-aix_libpath=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-# Check for a 64-bit object if we didn't find anything.
+-if test -z "$aix_libpath"; then
+-  aix_libpath=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
+-fi
++  lt_aix_libpath_sed='
++      /Import File Strings/,/^$/ {
++	  /^0/ {
++	      s/^0  *\([^ ]*\) *$/\1/
++	      p
++	  }
++      }'
++  lt_cv_aix_libpath_=`dump -H conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  # Check for a 64-bit object if we didn't find anything.
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_=`dump -HX64 conftest$ac_exeext 2>/dev/null | $SED -n -e "$lt_aix_libpath_sed"`
++  fi
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-if test -z "$aix_libpath"; then aix_libpath="/usr/lib:/lib"; fi
++  if test -z "$lt_cv_aix_libpath_"; then
++    lt_cv_aix_libpath_="/usr/lib:/lib"
++  fi
++
++fi
++
++  aix_libpath=$lt_cv_aix_libpath_
++fi
+ 
+ 	 hardcode_libdir_flag_spec='${wl}-blibpath:$libdir:'"$aix_libpath"
+ 	  # Warning - without using the other run time loading flags,
+ 	  # -berok will link without error, but may produce a broken library.
+ 	  no_undefined_flag=' ${wl}-bernotok'
+ 	  allow_undefined_flag=' ${wl}-berok'
+-	  # Exported symbols can be pulled into shared objects from archives
+-	  whole_archive_flag_spec='$convenience'
++	  if test "$with_gnu_ld" = yes; then
++	    # We only use this code for GNU lds that support --whole-archive.
++	    whole_archive_flag_spec='${wl}--whole-archive$convenience ${wl}--no-whole-archive'
++	  else
++	    # Exported symbols can be pulled into shared objects from archives
++	    whole_archive_flag_spec='$convenience'
++	  fi
+ 	  archive_cmds_need_lc=yes
+ 	  # This is similar to how AIX traditionally builds its shared libraries.
+ 	  archive_expsym_cmds="\$CC $shared_flag"' -o $output_objdir/$soname $libobjs $deplibs ${wl}-bnoentry $compiler_flags ${wl}-bE:$export_symbols${allow_undefined_flag}~$AR $AR_FLAGS $output_objdir/$libname$release.a $output_objdir/$soname'
+@@ -9268,20 +9838,63 @@ if test -z "$aix_libpath"; then aix_libp
+       # Microsoft Visual C++.
+       # hardcode_libdir_flag_spec is actually meaningless, as there is
+       # no search path for DLLs.
+-      hardcode_libdir_flag_spec=' '
+-      allow_undefined_flag=unsupported
+-      # Tell ltmain to make .lib files, not .a files.
+-      libext=lib
+-      # Tell ltmain to make .dll files, not .so files.
+-      shrext_cmds=".dll"
+-      # FIXME: Setting linknames here is a bad hack.
+-      archive_cmds='$CC -o $lib $libobjs $compiler_flags `$ECHO "X$deplibs" | $Xsed -e '\''s/ -lc$//'\''` -link -dll~linknames='
+-      # The linker will automatically build a .lib file if we build a DLL.
+-      old_archive_from_new_cmds='true'
+-      # FIXME: Should let the user specify the lib program.
+-      old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
+-      fix_srcfile_path='`cygpath -w "$srcfile"`'
+-      enable_shared_with_static_runtimes=yes
++      case $cc_basename in
++      cl*)
++	# Native MSVC
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	always_export_symbols=yes
++	file_list_spec='@'
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $output_objdir/$soname $libobjs $compiler_flags $deplibs -Wl,-dll~linknames='
++	archive_expsym_cmds='if test "x`$SED 1q $export_symbols`" = xEXPORTS; then
++	    sed -n -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' -e '1\\\!p' < $export_symbols > $output_objdir/$soname.exp;
++	  else
++	    sed -e 's/\\\\\\\(.*\\\\\\\)/-link\\\ -EXPORT:\\\\\\\1/' < $export_symbols > $output_objdir/$soname.exp;
++	  fi~
++	  $CC -o $tool_output_objdir$soname $libobjs $compiler_flags $deplibs "@$tool_output_objdir$soname.exp" -Wl,-DLL,-IMPLIB:"$tool_output_objdir$libname.dll.lib"~
++	  linknames='
++	# The linker will not automatically build a static lib if we build a DLL.
++	# _LT_TAGVAR(old_archive_from_new_cmds, )='true'
++	enable_shared_with_static_runtimes=yes
++	export_symbols_cmds='$NM $libobjs $convenience | $global_symbol_pipe | $SED -e '\''/^[BCDGRS][ ]/s/.*[ ]\([^ ]*\)/\1,DATA/'\'' | $SED -e '\''/^[AITW][ ]/s/.*[ ]//'\'' | sort | uniq > $export_symbols'
++	# Don't use ranlib
++	old_postinstall_cmds='chmod 644 $oldlib'
++	postlink_cmds='lt_outputfile="@OUTPUT@"~
++	  lt_tool_outputfile="@TOOL_OUTPUT@"~
++	  case $lt_outputfile in
++	    *.exe|*.EXE) ;;
++	    *)
++	      lt_outputfile="$lt_outputfile.exe"
++	      lt_tool_outputfile="$lt_tool_outputfile.exe"
++	      ;;
++	  esac~
++	  if test "$MANIFEST_TOOL" != ":" && test -f "$lt_outputfile.manifest"; then
++	    $MANIFEST_TOOL -manifest "$lt_tool_outputfile.manifest" -outputresource:"$lt_tool_outputfile" || exit 1;
++	    $RM "$lt_outputfile.manifest";
++	  fi'
++	;;
++      *)
++	# Assume MSVC wrapper
++	hardcode_libdir_flag_spec=' '
++	allow_undefined_flag=unsupported
++	# Tell ltmain to make .lib files, not .a files.
++	libext=lib
++	# Tell ltmain to make .dll files, not .so files.
++	shrext_cmds=".dll"
++	# FIXME: Setting linknames here is a bad hack.
++	archive_cmds='$CC -o $lib $libobjs $compiler_flags `func_echo_all "$deplibs" | $SED '\''s/ -lc$//'\''` -link -dll~linknames='
++	# The linker will automatically build a .lib file if we build a DLL.
++	old_archive_from_new_cmds='true'
++	# FIXME: Should let the user specify the lib program.
++	old_archive_cmds='lib -OUT:$oldlib$oldobjs$old_deplibs'
++	enable_shared_with_static_runtimes=yes
++	;;
++      esac
+       ;;
+ 
+     darwin* | rhapsody*)
+@@ -9291,7 +9904,11 @@ if test -z "$aix_libpath"; then aix_libp
+   hardcode_direct=no
+   hardcode_automatic=yes
+   hardcode_shlibpath_var=unsupported
+-  whole_archive_flag_spec=''
++  if test "$lt_cv_ld_force_load" = "yes"; then
++    whole_archive_flag_spec='`for conv in $convenience\"\"; do test  -n \"$conv\" && new_convenience=\"$new_convenience ${wl}-force_load,$conv\"; done; func_echo_all \"$new_convenience\"`'
++  else
++    whole_archive_flag_spec=''
++  fi
+   link_all_deplibs=yes
+   allow_undefined_flag="$_lt_dar_allow_undefined"
+   case $cc_basename in
+@@ -9299,7 +9916,7 @@ if test -z "$aix_libpath"; then aix_libp
+      *) _lt_dar_can_shared=$GCC ;;
+   esac
+   if test "$_lt_dar_can_shared" = "yes"; then
+-    output_verbose_link_cmd=echo
++    output_verbose_link_cmd=func_echo_all
+     archive_cmds="\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring $_lt_dar_single_mod${_lt_dsymutil}"
+     module_cmds="\$CC \$allow_undefined_flag -o \$lib -bundle \$libobjs \$deplibs \$compiler_flags${_lt_dsymutil}"
+     archive_expsym_cmds="sed 's,^,_,' < \$export_symbols > \$output_objdir/\${libname}-symbols.expsym~\$CC -dynamiclib \$allow_undefined_flag -o \$lib \$libobjs \$deplibs \$compiler_flags -install_name \$rpath/\$soname \$verstring ${_lt_dar_single_mod}${_lt_dar_export_syms}${_lt_dsymutil}"
+@@ -9342,7 +9959,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     # FreeBSD 3 and greater uses gcc -shared to do shared libraries.
+     freebsd* | dragonfly*)
+-      archive_cmds='$CC -shared -o $lib $libobjs $deplibs $compiler_flags'
++      archive_cmds='$CC -shared $pic_flag -o $lib $libobjs $deplibs $compiler_flags'
+       hardcode_libdir_flag_spec='-R$libdir'
+       hardcode_direct=yes
+       hardcode_shlibpath_var=no
+@@ -9350,7 +9967,7 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     hpux9*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$RM $output_objdir/$soname~$CC -shared -fPIC ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
++	archive_cmds='$RM $output_objdir/$soname~$CC -shared $pic_flag ${wl}+b ${wl}$install_libdir -o $output_objdir/$soname $libobjs $deplibs $compiler_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       else
+ 	archive_cmds='$RM $output_objdir/$soname~$LD -b +b $install_libdir -o $output_objdir/$soname $libobjs $deplibs $linker_flags~test $output_objdir/$soname = $lib || mv $output_objdir/$soname $lib'
+       fi
+@@ -9365,8 +9982,8 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux10*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
+-	archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
++	archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+       else
+ 	archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
+       fi
+@@ -9384,16 +10001,16 @@ if test -z "$aix_libpath"; then aix_libp
+       ;;
+ 
+     hpux11*)
+-      if test "$GCC" = yes -a "$with_gnu_ld" = no; then
++      if test "$GCC" = yes && test "$with_gnu_ld" = no; then
+ 	case $host_cpu in
+ 	hppa*64*)
+ 	  archive_cmds='$CC -shared ${wl}+h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	ia64*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -shared -fPIC ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++	  archive_cmds='$CC -shared $pic_flag ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	esac
+       else
+@@ -9405,7 +10022,46 @@ if test -z "$aix_libpath"; then aix_libp
+ 	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+nodefaultrpath -o $lib $libobjs $deplibs $compiler_flags'
+ 	  ;;
+ 	*)
+-	  archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++
++	  # Older versions of the 11.00 compiler do not understand -b yet
++	  # (HP92453-01 A.11.01.20 doesn't, HP92453-01 B.11.X.35175-35176.GP does)
++	  { $as_echo "$as_me:${as_lineno-$LINENO}: checking if $CC understands -b" >&5
++$as_echo_n "checking if $CC understands -b... " >&6; }
++if test "${lt_cv_prog_compiler__b+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  lt_cv_prog_compiler__b=no
++   save_LDFLAGS="$LDFLAGS"
++   LDFLAGS="$LDFLAGS -b"
++   echo "$lt_simple_link_test_code" > conftest.$ac_ext
++   if (eval $ac_link 2>conftest.err) && test -s conftest$ac_exeext; then
++     # The linker can only warn and ignore the option if not recognized
++     # So say no if there are warnings
++     if test -s conftest.err; then
++       # Append any errors to the config.log.
++       cat conftest.err 1>&5
++       $ECHO "$_lt_linker_boilerplate" | $SED '/^$/d' > conftest.exp
++       $SED '/^$/d; /^ *+/d' conftest.err >conftest.er2
++       if diff conftest.exp conftest.er2 >/dev/null; then
++         lt_cv_prog_compiler__b=yes
++       fi
++     else
++       lt_cv_prog_compiler__b=yes
++     fi
++   fi
++   $RM -r conftest*
++   LDFLAGS="$save_LDFLAGS"
++
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_prog_compiler__b" >&5
++$as_echo "$lt_cv_prog_compiler__b" >&6; }
++
++if test x"$lt_cv_prog_compiler__b" = xyes; then
++    archive_cmds='$CC -b ${wl}+h ${wl}$soname ${wl}+b ${wl}$install_libdir -o $lib $libobjs $deplibs $compiler_flags'
++else
++    archive_cmds='$LD -b +h $soname +b $install_libdir -o $lib $libobjs $deplibs $linker_flags'
++fi
++
+ 	  ;;
+ 	esac
+       fi
+@@ -9433,26 +10089,39 @@ if test -z "$aix_libpath"; then aix_libp
+ 
+     irix5* | irix6* | nonstopux*)
+       if test "$GCC" = yes; then
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	# Try to use the -exported_symbol ld option, if it does not
+ 	# work, assume that -exports_file does not work either and
+ 	# implicitly export all symbols.
+-        save_LDFLAGS="$LDFLAGS"
+-        LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
+-        cat confdefs.h - <<_ACEOF >conftest.$ac_ext
++	# This should be the same for all languages, so no per-tag cache variable.
++	{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether the $host_os linker accepts -exported_symbol" >&5
++$as_echo_n "checking whether the $host_os linker accepts -exported_symbol... " >&6; }
++if test "${lt_cv_irix_exported_symbol+set}" = set; then :
++  $as_echo_n "(cached) " >&6
++else
++  save_LDFLAGS="$LDFLAGS"
++	   LDFLAGS="$LDFLAGS -shared ${wl}-exported_symbol ${wl}foo ${wl}-update_registry ${wl}/dev/null"
++	   cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+ /* end confdefs.h.  */
+-int foo(void) {}
++int foo (void) { return 0; }
+ _ACEOF
+ if ac_fn_c_try_link "$LINENO"; then :
+-  archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
+-
++  lt_cv_irix_exported_symbol=yes
++else
++  lt_cv_irix_exported_symbol=no
+ fi
+ rm -f core conftest.err conftest.$ac_objext \
+     conftest$ac_exeext conftest.$ac_ext
+-        LDFLAGS="$save_LDFLAGS"
++           LDFLAGS="$save_LDFLAGS"
++fi
++{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $lt_cv_irix_exported_symbol" >&5
++$as_echo "$lt_cv_irix_exported_symbol" >&6; }
++	if test "$lt_cv_irix_exported_symbol" = yes; then
++          archive_expsym_cmds='$CC -shared $pic_flag $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations ${wl}-exports_file ${wl}$export_symbols -o $lib'
++	fi
+       else
+-	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
+-	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
++	archive_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_expsym_cmds='$CC -shared $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -exports_file $export_symbols -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9514,17 +10183,17 @@ rm -f core conftest.err conftest.$ac_obj
+       hardcode_libdir_flag_spec='-L$libdir'
+       hardcode_minus_L=yes
+       allow_undefined_flag=unsupported
+-      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~$ECHO DATA >> $output_objdir/$libname.def~$ECHO " SINGLE NONSHARED" >> $output_objdir/$libname.def~$ECHO EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
++      archive_cmds='$ECHO "LIBRARY $libname INITINSTANCE" > $output_objdir/$libname.def~$ECHO "DESCRIPTION \"$libname\"" >> $output_objdir/$libname.def~echo DATA >> $output_objdir/$libname.def~echo " SINGLE NONSHARED" >> $output_objdir/$libname.def~echo EXPORTS >> $output_objdir/$libname.def~emxexp $libobjs >> $output_objdir/$libname.def~$CC -Zdll -Zcrtdll -o $lib $libobjs $deplibs $compiler_flags $output_objdir/$libname.def'
+       old_archive_from_new_cmds='emximp -o $output_objdir/$libname.a $output_objdir/$libname.def'
+       ;;
+ 
+     osf3*)
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+       fi
+       archive_cmds_need_lc='no'
+       hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+@@ -9534,13 +10203,13 @@ rm -f core conftest.err conftest.$ac_obj
+     osf4* | osf5*)	# as osf3* with the addition of -msym flag
+       if test "$GCC" = yes; then
+ 	allow_undefined_flag=' ${wl}-expect_unresolved ${wl}\*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && $ECHO "X${wl}-set_version ${wl}$verstring" | $Xsed` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $pic_flag $libobjs $deplibs $compiler_flags ${wl}-msym ${wl}-soname ${wl}$soname `test -n "$verstring" && func_echo_all "${wl}-set_version ${wl}$verstring"` ${wl}-update_registry ${wl}${output_objdir}/so_locations -o $lib'
+ 	hardcode_libdir_flag_spec='${wl}-rpath ${wl}$libdir'
+       else
+ 	allow_undefined_flag=' -expect_unresolved \*'
+-	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib'
++	archive_cmds='$CC -shared${allow_undefined_flag} $libobjs $deplibs $compiler_flags -msym -soname $soname `test -n "$verstring" && func_echo_all "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib'
+ 	archive_expsym_cmds='for i in `cat $export_symbols`; do printf "%s %s\\n" -exported_symbol "\$i" >> $lib.exp; done; printf "%s\\n" "-hidden">> $lib.exp~
+-	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "X-set_version $verstring" | $Xsed` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
++	$CC -shared${allow_undefined_flag} ${wl}-input ${wl}$lib.exp $compiler_flags $libobjs $deplibs -soname $soname `test -n "$verstring" && $ECHO "-set_version $verstring"` -update_registry ${output_objdir}/so_locations -o $lib~$RM $lib.exp'
+ 
+ 	# Both c and cxx compiler support -rpath directly
+ 	hardcode_libdir_flag_spec='-rpath $libdir'
+@@ -9553,9 +10222,9 @@ rm -f core conftest.err conftest.$ac_obj
+       no_undefined_flag=' -z defs'
+       if test "$GCC" = yes; then
+ 	wlarc='${wl}'
+-	archive_cmds='$CC -shared ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
++	archive_cmds='$CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags'
+ 	archive_expsym_cmds='echo "{ global:" > $lib.exp~cat $export_symbols | $SED -e "s/\(.*\)/\1;/" >> $lib.exp~echo "local: *; };" >> $lib.exp~
+-	  $CC -shared ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
++	  $CC -shared $pic_flag ${wl}-z ${wl}text ${wl}-M ${wl}$lib.exp ${wl}-h ${wl}$soname -o $lib $libobjs $deplibs $compiler_flags~$RM $lib.exp'
+       else
+ 	case `$CC -V 2>&1` in
+ 	*"Compilers 5.0"*)
+@@ -9957,16 +10626,23 @@ if test "$GCC" = yes; then
+     darwin*) lt_awk_arg="/^libraries:/,/LR/" ;;
+     *) lt_awk_arg="/^libraries:/" ;;
+   esac
+-  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-  if $ECHO "$lt_search_path_spec" | $GREP ';' >/dev/null ; then
++  case $host_os in
++    mingw* | cegcc*) lt_sed_strip_eq="s,=\([A-Za-z]:\),\1,g" ;;
++    *) lt_sed_strip_eq="s,=/,/,g" ;;
++  esac
++  lt_search_path_spec=`$CC -print-search-dirs | awk $lt_awk_arg | $SED -e "s/^libraries://" -e $lt_sed_strip_eq`
++  case $lt_search_path_spec in
++  *\;*)
+     # if the path contains ";" then we assume it to be the separator
+     # otherwise default to the standard path separator (i.e. ":") - it is
+     # assumed that no part of a normal pathname contains ";" but that should
+     # okay in the real world where ";" in dirpaths is itself problematic.
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED -e 's/;/ /g'`
+-  else
+-    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-  fi
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED 's/;/ /g'`
++    ;;
++  *)
++    lt_search_path_spec=`$ECHO "$lt_search_path_spec" | $SED "s/$PATH_SEPARATOR/ /g"`
++    ;;
++  esac
+   # Ok, now we have the path, separated by spaces, we can step through it
+   # and add multilib dir if necessary.
+   lt_tmp_lt_search_path_spec=
+@@ -9979,7 +10655,7 @@ if test "$GCC" = yes; then
+ 	lt_tmp_lt_search_path_spec="$lt_tmp_lt_search_path_spec $lt_sys_path"
+     fi
+   done
+-  lt_search_path_spec=`$ECHO $lt_tmp_lt_search_path_spec | awk '
++  lt_search_path_spec=`$ECHO "$lt_tmp_lt_search_path_spec" | awk '
+ BEGIN {RS=" "; FS="/|\n";} {
+   lt_foo="";
+   lt_count=0;
+@@ -9999,7 +10675,13 @@ BEGIN {RS=" "; FS="/|\n";} {
+   if (lt_foo != "") { lt_freq[lt_foo]++; }
+   if (lt_freq[lt_foo] == 1) { print lt_foo; }
+ }'`
+-  sys_lib_search_path_spec=`$ECHO $lt_search_path_spec`
++  # AWK program above erroneously prepends '/' to C:/dos/paths
++  # for these hosts.
++  case $host_os in
++    mingw* | cegcc*) lt_search_path_spec=`$ECHO "$lt_search_path_spec" |\
++      $SED 's,/\([A-Za-z]:\),\1,g'` ;;
++  esac
++  sys_lib_search_path_spec=`$ECHO "$lt_search_path_spec" | $lt_NL2SP`
+ else
+   sys_lib_search_path_spec="/lib /usr/lib /usr/local/lib"
+ fi
+@@ -10087,7 +10769,7 @@ amigaos*)
+   m68k)
+     library_names_spec='$libname.ixlibrary $libname.a'
+     # Create ${libname}_ixlibrary.a entries in /sys/libs.
+-    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`$ECHO "X$lib" | $Xsed -e '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
++    finish_eval='for lib in `ls $libdir/*.ixlibrary 2>/dev/null`; do libname=`func_echo_all "$lib" | $SED '\''s%^.*/\([^/]*\)\.ixlibrary$%\1%'\''`; test $RM /sys/libs/${libname}_ixlibrary.a; $show "cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a"; cd /sys/libs && $LN_S $lib ${libname}_ixlibrary.a || exit 1; done'
+     ;;
+   esac
+   ;;
+@@ -10118,8 +10800,9 @@ cygwin* | mingw* | pw32* | cegcc*)
+   need_version=no
+   need_lib_prefix=no
+ 
+-  case $GCC,$host_os in
+-  yes,cygwin* | yes,mingw* | yes,pw32* | yes,cegcc*)
++  case $GCC,$cc_basename in
++  yes,*)
++    # gcc
+     library_names_spec='$libname.dll.a'
+     # DLL is installed to $(libdir)/../bin by postinstall_cmds
+     postinstall_cmds='base_file=`basename \${file}`~
+@@ -10140,36 +10823,83 @@ cygwin* | mingw* | pw32* | cegcc*)
+     cygwin*)
+       # Cygwin DLLs use 'cyg' prefix rather than 'lib'
+       soname_spec='`echo ${libname} | sed -e 's/^lib/cyg/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec="/usr/lib /lib/w32api /lib /usr/local/lib"
++
++      sys_lib_search_path_spec="$sys_lib_search_path_spec /usr/lib/w32api"
+       ;;
+     mingw* | cegcc*)
+       # MinGW DLLs use traditional 'lib' prefix
+       soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+-      sys_lib_search_path_spec=`$CC -print-search-dirs | $GREP "^libraries:" | $SED -e "s/^libraries://" -e "s,=/,/,g"`
+-      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
+-        # It is most probably a Windows format PATH printed by
+-        # mingw gcc, but we are running on Cygwin. Gcc prints its search
+-        # path with ; separators, and with drive letters. We can handle the
+-        # drive letters (cygwin fileutils understands them), so leave them,
+-        # especially as we might pass files found there to a mingw objdump,
+-        # which wouldn't understand a cygwinified path. Ahh.
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
+-      else
+-        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED  -e "s/$PATH_SEPARATOR/ /g"`
+-      fi
+       ;;
+     pw32*)
+       # pw32 DLLs use 'pw' prefix rather than 'lib'
+       library_names_spec='`echo ${libname} | sed -e 's/^lib/pw/'``echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
+       ;;
+     esac
++    dynamic_linker='Win32 ld.exe'
++    ;;
++
++  *,cl*)
++    # Native MSVC
++    libname_spec='$name'
++    soname_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext}'
++    library_names_spec='${libname}.dll.lib'
++
++    case $build_os in
++    mingw*)
++      sys_lib_search_path_spec=
++      lt_save_ifs=$IFS
++      IFS=';'
++      for lt_path in $LIB
++      do
++        IFS=$lt_save_ifs
++        # Let DOS variable expansion print the short 8.3 style file name.
++        lt_path=`cd "$lt_path" 2>/dev/null && cmd //C "for %i in (".") do @echo %~si"`
++        sys_lib_search_path_spec="$sys_lib_search_path_spec $lt_path"
++      done
++      IFS=$lt_save_ifs
++      # Convert to MSYS style.
++      sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | sed -e 's|\\\\|/|g' -e 's| \\([a-zA-Z]\\):| /\\1|g' -e 's|^ ||'`
++      ;;
++    cygwin*)
++      # Convert to unix form, then to dos form, then back to unix form
++      # but this time dos style (no spaces!) so that the unix form looks
++      # like /cygdrive/c/PROGRA~1:/cygdr...
++      sys_lib_search_path_spec=`cygpath --path --unix "$LIB"`
++      sys_lib_search_path_spec=`cygpath --path --dos "$sys_lib_search_path_spec" 2>/dev/null`
++      sys_lib_search_path_spec=`cygpath --path --unix "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      ;;
++    *)
++      sys_lib_search_path_spec="$LIB"
++      if $ECHO "$sys_lib_search_path_spec" | $GREP ';[c-zC-Z]:/' >/dev/null; then
++        # It is most probably a Windows format PATH.
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e 's/;/ /g'`
++      else
++        sys_lib_search_path_spec=`$ECHO "$sys_lib_search_path_spec" | $SED -e "s/$PATH_SEPARATOR/ /g"`
++      fi
++      # FIXME: find the short name or the path components, as spaces are
++      # common. (e.g. "Program Files" -> "PROGRA~1")
++      ;;
++    esac
++
++    # DLL is installed to $(libdir)/../bin by postinstall_cmds
++    postinstall_cmds='base_file=`basename \${file}`~
++      dlpath=`$SHELL 2>&1 -c '\''. $dir/'\''\${base_file}'\''i; echo \$dlname'\''`~
++      dldir=$destdir/`dirname \$dlpath`~
++      test -d \$dldir || mkdir -p \$dldir~
++      $install_prog $dir/$dlname \$dldir/$dlname'
++    postuninstall_cmds='dldll=`$SHELL 2>&1 -c '\''. $file; echo \$dlname'\''`~
++      dlpath=$dir/\$dldll~
++       $RM \$dlpath'
++    shlibpath_overrides_runpath=yes
++    dynamic_linker='Win32 link.exe'
+     ;;
+ 
+   *)
++    # Assume MSVC wrapper
+     library_names_spec='${libname}`echo ${release} | $SED -e 's/[.]/-/g'`${versuffix}${shared_ext} $libname.lib'
++    dynamic_linker='Win32 ld.exe'
+     ;;
+   esac
+-  dynamic_linker='Win32 ld.exe'
+   # FIXME: first we should search . and the directory the executable is in
+   shlibpath_var=PATH
+   ;;
+@@ -10256,6 +10986,19 @@ gnu*)
+   hardcode_into_libs=yes
+   ;;
+ 
++haiku*)
++  version_type=linux
++  need_lib_prefix=no
++  need_version=no
++  dynamic_linker="$host_os runtime_loader"
++  library_names_spec='${libname}${release}${shared_ext}$versuffix ${libname}${release}${shared_ext}${major} ${libname}${shared_ext}'
++  soname_spec='${libname}${release}${shared_ext}$major'
++  shlibpath_var=LIBRARY_PATH
++  shlibpath_overrides_runpath=yes
++  sys_lib_dlsearch_path_spec='/boot/home/config/lib /boot/common/lib /boot/system/lib'
++  hardcode_into_libs=yes
++  ;;
++
+ hpux9* | hpux10* | hpux11*)
+   # Give a soname corresponding to the major version so that dld.sl refuses to
+   # link against other versions.
+@@ -10298,8 +11041,10 @@ hpux9* | hpux10* | hpux11*)
+     soname_spec='${libname}${release}${shared_ext}$major'
+     ;;
+   esac
+-  # HP-UX runs *really* slowly unless shared libraries are mode 555.
++  # HP-UX runs *really* slowly unless shared libraries are mode 555, ...
+   postinstall_cmds='chmod 555 $lib'
++  # or fails outright, so override atomically:
++  install_override_mode=555
+   ;;
+ 
+ interix[3-9]*)
+@@ -10408,7 +11153,7 @@ fi
+ 
+   # Append ld.so.conf contents to the search path
+   if test -f /etc/ld.so.conf; then
+-    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;/^$/d' | tr '\n' ' '`
++    lt_ld_extra=`awk '/^include / { system(sprintf("cd /etc; cat %s 2>/dev/null", \$2)); skip = 1; } { if (!skip) print \$0; skip = 0; }' < /etc/ld.so.conf | $SED -e 's/#.*//;/^[	 ]*hwcap[	 ]/d;s/[:,	]/ /g;s/=[^=]*$//;s/=[^= ]* / /g;s/"//g;/^$/d' | tr '\n' ' '`
+     sys_lib_dlsearch_path_spec="/lib /usr/lib $lt_ld_extra"
+   fi
+ 
+@@ -10711,6 +11456,11 @@ fi
+ 
+ 
+ 
++
++
++
++
++
+   { $as_echo "$as_me:${as_lineno-$LINENO}: checking how to hardcode library paths into programs" >&5
+ $as_echo_n "checking how to hardcode library paths into programs... " >&6; }
+ hardcode_action=
+@@ -11041,7 +11791,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11044 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11082,7 +11832,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11091,7 +11847,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -11137,7 +11897,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 11140 "configure"
++#line $LINENO "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -11178,7 +11938,13 @@ else
+ #  endif
+ #endif
+ 
+-void fnord() { int i=42;}
++/* When -fvisbility=hidden is used, assume the code has been annotated
++   correspondingly for the symbols needed.  */
++#if defined(__GNUC__) && (((__GNUC__ == 3) && (__GNUC_MINOR__ >= 3)) || (__GNUC__ > 3))
++int fnord () __attribute__((visibility("default")));
++#endif
++
++int fnord () { return 42; }
+ int main ()
+ {
+   void *self = dlopen (0, LT_DLGLOBAL|LT_DLLAZY_OR_NOW);
+@@ -11187,7 +11953,11 @@ int main ()
+   if (self)
+     {
+       if (dlsym (self,"fnord"))       status = $lt_dlno_uscore;
+-      else if (dlsym( self,"_fnord")) status = $lt_dlneed_uscore;
++      else
++        {
++	  if (dlsym( self,"_fnord"))  status = $lt_dlneed_uscore;
++          else puts (dlerror ());
++	}
+       /* dlclose (self); */
+     }
+   else
+@@ -12033,7 +12803,7 @@ $as_echo "$bfd_cv_ld_as_needed" >&6; }
+ 
+ LIBM=
+ case $host in
+-*-*-beos* | *-*-cygwin* | *-*-pw32* | *-*-darwin*)
++*-*-beos* | *-*-cegcc* | *-*-cygwin* | *-*-haiku* | *-*-pw32* | *-*-darwin*)
+   # These system don't have libm, or don't need it
+   ;;
+ *-ncr-sysv4.3*)
+@@ -12195,7 +12965,7 @@ if test "$enable_shared" = "yes"; then
+ # since libbfd may not pull in the entirety of libiberty.
+   x=`sed -n -e 's/^[ 	]*PICFLAG[ 	]*=[ 	]*//p' < ../libiberty/Makefile | sed -n '$p'`
+   if test -n "$x"; then
+-    SHARED_LIBADD="-L`pwd`/../libiberty/pic -liberty"
++    SHARED_LIBADD="`pwd`/../libiberty/pic/libiberty.a"
+   fi
+ 
+   case "${host}" in
+@@ -13127,131 +13897,153 @@ AMDEP_TRUE="$AMDEP_TRUE" ac_aux_dir="$ac
+ sed_quote_subst='$sed_quote_subst'
+ double_quote_subst='$double_quote_subst'
+ delay_variable_subst='$delay_variable_subst'
+-enable_shared='`$ECHO "X$enable_shared" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_version='`$ECHO "X$macro_version" | $Xsed -e "$delay_single_quote_subst"`'
+-macro_revision='`$ECHO "X$macro_revision" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_static='`$ECHO "X$enable_static" | $Xsed -e "$delay_single_quote_subst"`'
+-pic_mode='`$ECHO "X$pic_mode" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_fast_install='`$ECHO "X$enable_fast_install" | $Xsed -e "$delay_single_quote_subst"`'
+-host_alias='`$ECHO "X$host_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-host='`$ECHO "X$host" | $Xsed -e "$delay_single_quote_subst"`'
+-host_os='`$ECHO "X$host_os" | $Xsed -e "$delay_single_quote_subst"`'
+-build_alias='`$ECHO "X$build_alias" | $Xsed -e "$delay_single_quote_subst"`'
+-build='`$ECHO "X$build" | $Xsed -e "$delay_single_quote_subst"`'
+-build_os='`$ECHO "X$build_os" | $Xsed -e "$delay_single_quote_subst"`'
+-SED='`$ECHO "X$SED" | $Xsed -e "$delay_single_quote_subst"`'
+-Xsed='`$ECHO "X$Xsed" | $Xsed -e "$delay_single_quote_subst"`'
+-GREP='`$ECHO "X$GREP" | $Xsed -e "$delay_single_quote_subst"`'
+-EGREP='`$ECHO "X$EGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-FGREP='`$ECHO "X$FGREP" | $Xsed -e "$delay_single_quote_subst"`'
+-LD='`$ECHO "X$LD" | $Xsed -e "$delay_single_quote_subst"`'
+-NM='`$ECHO "X$NM" | $Xsed -e "$delay_single_quote_subst"`'
+-LN_S='`$ECHO "X$LN_S" | $Xsed -e "$delay_single_quote_subst"`'
+-max_cmd_len='`$ECHO "X$max_cmd_len" | $Xsed -e "$delay_single_quote_subst"`'
+-ac_objext='`$ECHO "X$ac_objext" | $Xsed -e "$delay_single_quote_subst"`'
+-exeext='`$ECHO "X$exeext" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_unset='`$ECHO "X$lt_unset" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_SP2NL='`$ECHO "X$lt_SP2NL" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_NL2SP='`$ECHO "X$lt_NL2SP" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_flag='`$ECHO "X$reload_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-reload_cmds='`$ECHO "X$reload_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-OBJDUMP='`$ECHO "X$OBJDUMP" | $Xsed -e "$delay_single_quote_subst"`'
+-deplibs_check_method='`$ECHO "X$deplibs_check_method" | $Xsed -e "$delay_single_quote_subst"`'
+-file_magic_cmd='`$ECHO "X$file_magic_cmd" | $Xsed -e "$delay_single_quote_subst"`'
+-AR='`$ECHO "X$AR" | $Xsed -e "$delay_single_quote_subst"`'
+-AR_FLAGS='`$ECHO "X$AR_FLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-STRIP='`$ECHO "X$STRIP" | $Xsed -e "$delay_single_quote_subst"`'
+-RANLIB='`$ECHO "X$RANLIB" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postinstall_cmds='`$ECHO "X$old_postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_postuninstall_cmds='`$ECHO "X$old_postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_cmds='`$ECHO "X$old_archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-CC='`$ECHO "X$CC" | $Xsed -e "$delay_single_quote_subst"`'
+-CFLAGS='`$ECHO "X$CFLAGS" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler='`$ECHO "X$compiler" | $Xsed -e "$delay_single_quote_subst"`'
+-GCC='`$ECHO "X$GCC" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_pipe='`$ECHO "X$lt_cv_sys_global_symbol_pipe" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_cdecl='`$ECHO "X$lt_cv_sys_global_symbol_to_cdecl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "X$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-objdir='`$ECHO "X$objdir" | $Xsed -e "$delay_single_quote_subst"`'
+-SHELL='`$ECHO "X$SHELL" | $Xsed -e "$delay_single_quote_subst"`'
+-ECHO='`$ECHO "X$ECHO" | $Xsed -e "$delay_single_quote_subst"`'
+-MAGIC_CMD='`$ECHO "X$MAGIC_CMD" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_no_builtin_flag='`$ECHO "X$lt_prog_compiler_no_builtin_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_wl='`$ECHO "X$lt_prog_compiler_wl" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_pic='`$ECHO "X$lt_prog_compiler_pic" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_prog_compiler_static='`$ECHO "X$lt_prog_compiler_static" | $Xsed -e "$delay_single_quote_subst"`'
+-lt_cv_prog_compiler_c_o='`$ECHO "X$lt_cv_prog_compiler_c_o" | $Xsed -e "$delay_single_quote_subst"`'
+-need_locks='`$ECHO "X$need_locks" | $Xsed -e "$delay_single_quote_subst"`'
+-DSYMUTIL='`$ECHO "X$DSYMUTIL" | $Xsed -e "$delay_single_quote_subst"`'
+-NMEDIT='`$ECHO "X$NMEDIT" | $Xsed -e "$delay_single_quote_subst"`'
+-LIPO='`$ECHO "X$LIPO" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL='`$ECHO "X$OTOOL" | $Xsed -e "$delay_single_quote_subst"`'
+-OTOOL64='`$ECHO "X$OTOOL64" | $Xsed -e "$delay_single_quote_subst"`'
+-libext='`$ECHO "X$libext" | $Xsed -e "$delay_single_quote_subst"`'
+-shrext_cmds='`$ECHO "X$shrext_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-extract_expsyms_cmds='`$ECHO "X$extract_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds_need_lc='`$ECHO "X$archive_cmds_need_lc" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_shared_with_static_runtimes='`$ECHO "X$enable_shared_with_static_runtimes" | $Xsed -e "$delay_single_quote_subst"`'
+-export_dynamic_flag_spec='`$ECHO "X$export_dynamic_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-whole_archive_flag_spec='`$ECHO "X$whole_archive_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-compiler_needs_object='`$ECHO "X$compiler_needs_object" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_new_cmds='`$ECHO "X$old_archive_from_new_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-old_archive_from_expsyms_cmds='`$ECHO "X$old_archive_from_expsyms_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_cmds='`$ECHO "X$archive_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-archive_expsym_cmds='`$ECHO "X$archive_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_cmds='`$ECHO "X$module_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-module_expsym_cmds='`$ECHO "X$module_expsym_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-with_gnu_ld='`$ECHO "X$with_gnu_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-allow_undefined_flag='`$ECHO "X$allow_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-no_undefined_flag='`$ECHO "X$no_undefined_flag" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec='`$ECHO "X$hardcode_libdir_flag_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_flag_spec_ld='`$ECHO "X$hardcode_libdir_flag_spec_ld" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_libdir_separator='`$ECHO "X$hardcode_libdir_separator" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct='`$ECHO "X$hardcode_direct" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_direct_absolute='`$ECHO "X$hardcode_direct_absolute" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_minus_L='`$ECHO "X$hardcode_minus_L" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_shlibpath_var='`$ECHO "X$hardcode_shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_automatic='`$ECHO "X$hardcode_automatic" | $Xsed -e "$delay_single_quote_subst"`'
+-inherit_rpath='`$ECHO "X$inherit_rpath" | $Xsed -e "$delay_single_quote_subst"`'
+-link_all_deplibs='`$ECHO "X$link_all_deplibs" | $Xsed -e "$delay_single_quote_subst"`'
+-fix_srcfile_path='`$ECHO "X$fix_srcfile_path" | $Xsed -e "$delay_single_quote_subst"`'
+-always_export_symbols='`$ECHO "X$always_export_symbols" | $Xsed -e "$delay_single_quote_subst"`'
+-export_symbols_cmds='`$ECHO "X$export_symbols_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-exclude_expsyms='`$ECHO "X$exclude_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-include_expsyms='`$ECHO "X$include_expsyms" | $Xsed -e "$delay_single_quote_subst"`'
+-prelink_cmds='`$ECHO "X$prelink_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-file_list_spec='`$ECHO "X$file_list_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-variables_saved_for_relink='`$ECHO "X$variables_saved_for_relink" | $Xsed -e "$delay_single_quote_subst"`'
+-need_lib_prefix='`$ECHO "X$need_lib_prefix" | $Xsed -e "$delay_single_quote_subst"`'
+-need_version='`$ECHO "X$need_version" | $Xsed -e "$delay_single_quote_subst"`'
+-version_type='`$ECHO "X$version_type" | $Xsed -e "$delay_single_quote_subst"`'
+-runpath_var='`$ECHO "X$runpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_var='`$ECHO "X$shlibpath_var" | $Xsed -e "$delay_single_quote_subst"`'
+-shlibpath_overrides_runpath='`$ECHO "X$shlibpath_overrides_runpath" | $Xsed -e "$delay_single_quote_subst"`'
+-libname_spec='`$ECHO "X$libname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-library_names_spec='`$ECHO "X$library_names_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-soname_spec='`$ECHO "X$soname_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-postinstall_cmds='`$ECHO "X$postinstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-postuninstall_cmds='`$ECHO "X$postuninstall_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_cmds='`$ECHO "X$finish_cmds" | $Xsed -e "$delay_single_quote_subst"`'
+-finish_eval='`$ECHO "X$finish_eval" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_into_libs='`$ECHO "X$hardcode_into_libs" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_search_path_spec='`$ECHO "X$sys_lib_search_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-sys_lib_dlsearch_path_spec='`$ECHO "X$sys_lib_dlsearch_path_spec" | $Xsed -e "$delay_single_quote_subst"`'
+-hardcode_action='`$ECHO "X$hardcode_action" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen='`$ECHO "X$enable_dlopen" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self='`$ECHO "X$enable_dlopen_self" | $Xsed -e "$delay_single_quote_subst"`'
+-enable_dlopen_self_static='`$ECHO "X$enable_dlopen_self_static" | $Xsed -e "$delay_single_quote_subst"`'
+-old_striplib='`$ECHO "X$old_striplib" | $Xsed -e "$delay_single_quote_subst"`'
+-striplib='`$ECHO "X$striplib" | $Xsed -e "$delay_single_quote_subst"`'
++enable_shared='`$ECHO "$enable_shared" | $SED "$delay_single_quote_subst"`'
++macro_version='`$ECHO "$macro_version" | $SED "$delay_single_quote_subst"`'
++macro_revision='`$ECHO "$macro_revision" | $SED "$delay_single_quote_subst"`'
++enable_static='`$ECHO "$enable_static" | $SED "$delay_single_quote_subst"`'
++pic_mode='`$ECHO "$pic_mode" | $SED "$delay_single_quote_subst"`'
++enable_fast_install='`$ECHO "$enable_fast_install" | $SED "$delay_single_quote_subst"`'
++SHELL='`$ECHO "$SHELL" | $SED "$delay_single_quote_subst"`'
++ECHO='`$ECHO "$ECHO" | $SED "$delay_single_quote_subst"`'
++host_alias='`$ECHO "$host_alias" | $SED "$delay_single_quote_subst"`'
++host='`$ECHO "$host" | $SED "$delay_single_quote_subst"`'
++host_os='`$ECHO "$host_os" | $SED "$delay_single_quote_subst"`'
++build_alias='`$ECHO "$build_alias" | $SED "$delay_single_quote_subst"`'
++build='`$ECHO "$build" | $SED "$delay_single_quote_subst"`'
++build_os='`$ECHO "$build_os" | $SED "$delay_single_quote_subst"`'
++SED='`$ECHO "$SED" | $SED "$delay_single_quote_subst"`'
++Xsed='`$ECHO "$Xsed" | $SED "$delay_single_quote_subst"`'
++GREP='`$ECHO "$GREP" | $SED "$delay_single_quote_subst"`'
++EGREP='`$ECHO "$EGREP" | $SED "$delay_single_quote_subst"`'
++FGREP='`$ECHO "$FGREP" | $SED "$delay_single_quote_subst"`'
++LD='`$ECHO "$LD" | $SED "$delay_single_quote_subst"`'
++NM='`$ECHO "$NM" | $SED "$delay_single_quote_subst"`'
++LN_S='`$ECHO "$LN_S" | $SED "$delay_single_quote_subst"`'
++max_cmd_len='`$ECHO "$max_cmd_len" | $SED "$delay_single_quote_subst"`'
++ac_objext='`$ECHO "$ac_objext" | $SED "$delay_single_quote_subst"`'
++exeext='`$ECHO "$exeext" | $SED "$delay_single_quote_subst"`'
++lt_unset='`$ECHO "$lt_unset" | $SED "$delay_single_quote_subst"`'
++lt_SP2NL='`$ECHO "$lt_SP2NL" | $SED "$delay_single_quote_subst"`'
++lt_NL2SP='`$ECHO "$lt_NL2SP" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_host_file_cmd='`$ECHO "$lt_cv_to_host_file_cmd" | $SED "$delay_single_quote_subst"`'
++lt_cv_to_tool_file_cmd='`$ECHO "$lt_cv_to_tool_file_cmd" | $SED "$delay_single_quote_subst"`'
++reload_flag='`$ECHO "$reload_flag" | $SED "$delay_single_quote_subst"`'
++reload_cmds='`$ECHO "$reload_cmds" | $SED "$delay_single_quote_subst"`'
++OBJDUMP='`$ECHO "$OBJDUMP" | $SED "$delay_single_quote_subst"`'
++deplibs_check_method='`$ECHO "$deplibs_check_method" | $SED "$delay_single_quote_subst"`'
++file_magic_cmd='`$ECHO "$file_magic_cmd" | $SED "$delay_single_quote_subst"`'
++file_magic_glob='`$ECHO "$file_magic_glob" | $SED "$delay_single_quote_subst"`'
++want_nocaseglob='`$ECHO "$want_nocaseglob" | $SED "$delay_single_quote_subst"`'
++DLLTOOL='`$ECHO "$DLLTOOL" | $SED "$delay_single_quote_subst"`'
++sharedlib_from_linklib_cmd='`$ECHO "$sharedlib_from_linklib_cmd" | $SED "$delay_single_quote_subst"`'
++AR='`$ECHO "$AR" | $SED "$delay_single_quote_subst"`'
++AR_FLAGS='`$ECHO "$AR_FLAGS" | $SED "$delay_single_quote_subst"`'
++archiver_list_spec='`$ECHO "$archiver_list_spec" | $SED "$delay_single_quote_subst"`'
++STRIP='`$ECHO "$STRIP" | $SED "$delay_single_quote_subst"`'
++RANLIB='`$ECHO "$RANLIB" | $SED "$delay_single_quote_subst"`'
++old_postinstall_cmds='`$ECHO "$old_postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_postuninstall_cmds='`$ECHO "$old_postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_cmds='`$ECHO "$old_archive_cmds" | $SED "$delay_single_quote_subst"`'
++lock_old_archive_extraction='`$ECHO "$lock_old_archive_extraction" | $SED "$delay_single_quote_subst"`'
++CC='`$ECHO "$CC" | $SED "$delay_single_quote_subst"`'
++CFLAGS='`$ECHO "$CFLAGS" | $SED "$delay_single_quote_subst"`'
++compiler='`$ECHO "$compiler" | $SED "$delay_single_quote_subst"`'
++GCC='`$ECHO "$GCC" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_pipe='`$ECHO "$lt_cv_sys_global_symbol_pipe" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_cdecl='`$ECHO "$lt_cv_sys_global_symbol_to_cdecl" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address" | $SED "$delay_single_quote_subst"`'
++lt_cv_sys_global_symbol_to_c_name_address_lib_prefix='`$ECHO "$lt_cv_sys_global_symbol_to_c_name_address_lib_prefix" | $SED "$delay_single_quote_subst"`'
++nm_file_list_spec='`$ECHO "$nm_file_list_spec" | $SED "$delay_single_quote_subst"`'
++lt_sysroot='`$ECHO "$lt_sysroot" | $SED "$delay_single_quote_subst"`'
++objdir='`$ECHO "$objdir" | $SED "$delay_single_quote_subst"`'
++MAGIC_CMD='`$ECHO "$MAGIC_CMD" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_no_builtin_flag='`$ECHO "$lt_prog_compiler_no_builtin_flag" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_pic='`$ECHO "$lt_prog_compiler_pic" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_wl='`$ECHO "$lt_prog_compiler_wl" | $SED "$delay_single_quote_subst"`'
++lt_prog_compiler_static='`$ECHO "$lt_prog_compiler_static" | $SED "$delay_single_quote_subst"`'
++lt_cv_prog_compiler_c_o='`$ECHO "$lt_cv_prog_compiler_c_o" | $SED "$delay_single_quote_subst"`'
++need_locks='`$ECHO "$need_locks" | $SED "$delay_single_quote_subst"`'
++MANIFEST_TOOL='`$ECHO "$MANIFEST_TOOL" | $SED "$delay_single_quote_subst"`'
++DSYMUTIL='`$ECHO "$DSYMUTIL" | $SED "$delay_single_quote_subst"`'
++NMEDIT='`$ECHO "$NMEDIT" | $SED "$delay_single_quote_subst"`'
++LIPO='`$ECHO "$LIPO" | $SED "$delay_single_quote_subst"`'
++OTOOL='`$ECHO "$OTOOL" | $SED "$delay_single_quote_subst"`'
++OTOOL64='`$ECHO "$OTOOL64" | $SED "$delay_single_quote_subst"`'
++libext='`$ECHO "$libext" | $SED "$delay_single_quote_subst"`'
++shrext_cmds='`$ECHO "$shrext_cmds" | $SED "$delay_single_quote_subst"`'
++extract_expsyms_cmds='`$ECHO "$extract_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds_need_lc='`$ECHO "$archive_cmds_need_lc" | $SED "$delay_single_quote_subst"`'
++enable_shared_with_static_runtimes='`$ECHO "$enable_shared_with_static_runtimes" | $SED "$delay_single_quote_subst"`'
++export_dynamic_flag_spec='`$ECHO "$export_dynamic_flag_spec" | $SED "$delay_single_quote_subst"`'
++whole_archive_flag_spec='`$ECHO "$whole_archive_flag_spec" | $SED "$delay_single_quote_subst"`'
++compiler_needs_object='`$ECHO "$compiler_needs_object" | $SED "$delay_single_quote_subst"`'
++old_archive_from_new_cmds='`$ECHO "$old_archive_from_new_cmds" | $SED "$delay_single_quote_subst"`'
++old_archive_from_expsyms_cmds='`$ECHO "$old_archive_from_expsyms_cmds" | $SED "$delay_single_quote_subst"`'
++archive_cmds='`$ECHO "$archive_cmds" | $SED "$delay_single_quote_subst"`'
++archive_expsym_cmds='`$ECHO "$archive_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++module_cmds='`$ECHO "$module_cmds" | $SED "$delay_single_quote_subst"`'
++module_expsym_cmds='`$ECHO "$module_expsym_cmds" | $SED "$delay_single_quote_subst"`'
++with_gnu_ld='`$ECHO "$with_gnu_ld" | $SED "$delay_single_quote_subst"`'
++allow_undefined_flag='`$ECHO "$allow_undefined_flag" | $SED "$delay_single_quote_subst"`'
++no_undefined_flag='`$ECHO "$no_undefined_flag" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec='`$ECHO "$hardcode_libdir_flag_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_flag_spec_ld='`$ECHO "$hardcode_libdir_flag_spec_ld" | $SED "$delay_single_quote_subst"`'
++hardcode_libdir_separator='`$ECHO "$hardcode_libdir_separator" | $SED "$delay_single_quote_subst"`'
++hardcode_direct='`$ECHO "$hardcode_direct" | $SED "$delay_single_quote_subst"`'
++hardcode_direct_absolute='`$ECHO "$hardcode_direct_absolute" | $SED "$delay_single_quote_subst"`'
++hardcode_minus_L='`$ECHO "$hardcode_minus_L" | $SED "$delay_single_quote_subst"`'
++hardcode_shlibpath_var='`$ECHO "$hardcode_shlibpath_var" | $SED "$delay_single_quote_subst"`'
++hardcode_automatic='`$ECHO "$hardcode_automatic" | $SED "$delay_single_quote_subst"`'
++inherit_rpath='`$ECHO "$inherit_rpath" | $SED "$delay_single_quote_subst"`'
++link_all_deplibs='`$ECHO "$link_all_deplibs" | $SED "$delay_single_quote_subst"`'
++always_export_symbols='`$ECHO "$always_export_symbols" | $SED "$delay_single_quote_subst"`'
++export_symbols_cmds='`$ECHO "$export_symbols_cmds" | $SED "$delay_single_quote_subst"`'
++exclude_expsyms='`$ECHO "$exclude_expsyms" | $SED "$delay_single_quote_subst"`'
++include_expsyms='`$ECHO "$include_expsyms" | $SED "$delay_single_quote_subst"`'
++prelink_cmds='`$ECHO "$prelink_cmds" | $SED "$delay_single_quote_subst"`'
++postlink_cmds='`$ECHO "$postlink_cmds" | $SED "$delay_single_quote_subst"`'
++file_list_spec='`$ECHO "$file_list_spec" | $SED "$delay_single_quote_subst"`'
++variables_saved_for_relink='`$ECHO "$variables_saved_for_relink" | $SED "$delay_single_quote_subst"`'
++need_lib_prefix='`$ECHO "$need_lib_prefix" | $SED "$delay_single_quote_subst"`'
++need_version='`$ECHO "$need_version" | $SED "$delay_single_quote_subst"`'
++version_type='`$ECHO "$version_type" | $SED "$delay_single_quote_subst"`'
++runpath_var='`$ECHO "$runpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_var='`$ECHO "$shlibpath_var" | $SED "$delay_single_quote_subst"`'
++shlibpath_overrides_runpath='`$ECHO "$shlibpath_overrides_runpath" | $SED "$delay_single_quote_subst"`'
++libname_spec='`$ECHO "$libname_spec" | $SED "$delay_single_quote_subst"`'
++library_names_spec='`$ECHO "$library_names_spec" | $SED "$delay_single_quote_subst"`'
++soname_spec='`$ECHO "$soname_spec" | $SED "$delay_single_quote_subst"`'
++install_override_mode='`$ECHO "$install_override_mode" | $SED "$delay_single_quote_subst"`'
++postinstall_cmds='`$ECHO "$postinstall_cmds" | $SED "$delay_single_quote_subst"`'
++postuninstall_cmds='`$ECHO "$postuninstall_cmds" | $SED "$delay_single_quote_subst"`'
++finish_cmds='`$ECHO "$finish_cmds" | $SED "$delay_single_quote_subst"`'
++finish_eval='`$ECHO "$finish_eval" | $SED "$delay_single_quote_subst"`'
++hardcode_into_libs='`$ECHO "$hardcode_into_libs" | $SED "$delay_single_quote_subst"`'
++sys_lib_search_path_spec='`$ECHO "$sys_lib_search_path_spec" | $SED "$delay_single_quote_subst"`'
++sys_lib_dlsearch_path_spec='`$ECHO "$sys_lib_dlsearch_path_spec" | $SED "$delay_single_quote_subst"`'
++hardcode_action='`$ECHO "$hardcode_action" | $SED "$delay_single_quote_subst"`'
++enable_dlopen='`$ECHO "$enable_dlopen" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self='`$ECHO "$enable_dlopen_self" | $SED "$delay_single_quote_subst"`'
++enable_dlopen_self_static='`$ECHO "$enable_dlopen_self_static" | $SED "$delay_single_quote_subst"`'
++old_striplib='`$ECHO "$old_striplib" | $SED "$delay_single_quote_subst"`'
++striplib='`$ECHO "$striplib" | $SED "$delay_single_quote_subst"`'
+ 
+ LTCC='$LTCC'
+ LTCFLAGS='$LTCFLAGS'
+ compiler='$compiler_DEFAULT'
+ 
++# A function that is used when there is no print builtin or printf.
++func_fallback_echo ()
++{
++  eval 'cat <<_LTECHO_EOF
++\$1
++_LTECHO_EOF'
++}
++
+ # Quote evaled strings.
+-for var in SED \
++for var in SHELL \
++ECHO \
++SED \
+ GREP \
+ EGREP \
+ FGREP \
+@@ -13264,8 +14056,13 @@ reload_flag \
+ OBJDUMP \
+ deplibs_check_method \
+ file_magic_cmd \
++file_magic_glob \
++want_nocaseglob \
++DLLTOOL \
++sharedlib_from_linklib_cmd \
+ AR \
+ AR_FLAGS \
++archiver_list_spec \
+ STRIP \
+ RANLIB \
+ CC \
+@@ -13275,14 +14072,14 @@ lt_cv_sys_global_symbol_pipe \
+ lt_cv_sys_global_symbol_to_cdecl \
+ lt_cv_sys_global_symbol_to_c_name_address \
+ lt_cv_sys_global_symbol_to_c_name_address_lib_prefix \
+-SHELL \
+-ECHO \
++nm_file_list_spec \
+ lt_prog_compiler_no_builtin_flag \
+-lt_prog_compiler_wl \
+ lt_prog_compiler_pic \
++lt_prog_compiler_wl \
+ lt_prog_compiler_static \
+ lt_cv_prog_compiler_c_o \
+ need_locks \
++MANIFEST_TOOL \
+ DSYMUTIL \
+ NMEDIT \
+ LIPO \
+@@ -13298,7 +14095,6 @@ no_undefined_flag \
+ hardcode_libdir_flag_spec \
+ hardcode_libdir_flag_spec_ld \
+ hardcode_libdir_separator \
+-fix_srcfile_path \
+ exclude_expsyms \
+ include_expsyms \
+ file_list_spec \
+@@ -13306,12 +14102,13 @@ variables_saved_for_relink \
+ libname_spec \
+ library_names_spec \
+ soname_spec \
++install_override_mode \
+ finish_eval \
+ old_striplib \
+ striplib; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED \\"\\\$sed_quote_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -13333,14 +14130,15 @@ module_cmds \
+ module_expsym_cmds \
+ export_symbols_cmds \
+ prelink_cmds \
++postlink_cmds \
+ postinstall_cmds \
+ postuninstall_cmds \
+ finish_cmds \
+ sys_lib_search_path_spec \
+ sys_lib_dlsearch_path_spec; do
+-    case \`eval \\\\\$ECHO "X\\\\\$\$var"\` in
++    case \`eval \\\\\$ECHO \\\\""\\\\\$\$var"\\\\"\` in
+     *[\\\\\\\`\\"\\\$]*)
+-      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"X\\\$\$var\\" | \\\$Xsed -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
++      eval "lt_\$var=\\\\\\"\\\`\\\$ECHO \\"\\\$\$var\\" | \\\$SED -e \\"\\\$double_quote_subst\\" -e \\"\\\$sed_quote_subst\\" -e \\"\\\$delay_variable_subst\\"\\\`\\\\\\""
+       ;;
+     *)
+       eval "lt_\$var=\\\\\\"\\\$\$var\\\\\\""
+@@ -13348,12 +14146,6 @@ sys_lib_dlsearch_path_spec; do
+     esac
+ done
+ 
+-# Fix-up fallback echo if it was mangled by the above quoting rules.
+-case \$lt_ECHO in
+-*'\\\$0 --fallback-echo"')  lt_ECHO=\`\$ECHO "X\$lt_ECHO" | \$Xsed -e 's/\\\\\\\\\\\\\\\$0 --fallback-echo"\$/\$0 --fallback-echo"/'\`
+-  ;;
+-esac
+-
+ ac_aux_dir='$ac_aux_dir'
+ xsi_shell='$xsi_shell'
+ lt_shell_append='$lt_shell_append'
+@@ -14095,7 +14887,8 @@ $as_echo X"$file" |
+ # NOTE: Changes made to this file will be lost: look at ltmain.sh.
+ #
+ #   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2003, 2004, 2005,
+-#                 2006, 2007, 2008 Free Software Foundation, Inc.
++#                 2006, 2007, 2008, 2009, 2010 Free Software Foundation,
++#                 Inc.
+ #   Written by Gordon Matzigkeit, 1996
+ #
+ #   This file is part of GNU Libtool.
+@@ -14143,6 +14936,12 @@ pic_mode=$pic_mode
+ # Whether or not to optimize for fast installation.
+ fast_install=$enable_fast_install
+ 
++# Shell to use when invoking shell scripts.
++SHELL=$lt_SHELL
++
++# An echo program that protects backslashes.
++ECHO=$lt_ECHO
++
+ # The host system.
+ host_alias=$host_alias
+ host=$host
+@@ -14192,9 +14991,11 @@ SP2NL=$lt_lt_SP2NL
+ # turn newlines into spaces.
+ NL2SP=$lt_lt_NL2SP
+ 
+-# How to create reloadable object files.
+-reload_flag=$lt_reload_flag
+-reload_cmds=$lt_reload_cmds
++# convert \$build file names to \$host format.
++to_host_file_cmd=$lt_cv_to_host_file_cmd
++
++# convert \$build files to toolchain format.
++to_tool_file_cmd=$lt_cv_to_tool_file_cmd
+ 
+ # An object symbol dumper.
+ OBJDUMP=$lt_OBJDUMP
+@@ -14202,13 +15003,30 @@ OBJDUMP=$lt_OBJDUMP
+ # Method to check whether dependent libraries are shared objects.
+ deplibs_check_method=$lt_deplibs_check_method
+ 
+-# Command to use when deplibs_check_method == "file_magic".
++# Command to use when deplibs_check_method = "file_magic".
+ file_magic_cmd=$lt_file_magic_cmd
+ 
++# How to find potential files when deplibs_check_method = "file_magic".
++file_magic_glob=$lt_file_magic_glob
++
++# Find potential files using nocaseglob when deplibs_check_method = "file_magic".
++want_nocaseglob=$lt_want_nocaseglob
++
++# DLL creation program.
++DLLTOOL=$lt_DLLTOOL
++
++# Command to associate shared and link libraries.
++sharedlib_from_linklib_cmd=$lt_sharedlib_from_linklib_cmd
++
+ # The archiver.
+ AR=$lt_AR
++
++# Flags to create an archive.
+ AR_FLAGS=$lt_AR_FLAGS
+ 
++# How to feed a file listing to the archiver.
++archiver_list_spec=$lt_archiver_list_spec
++
+ # A symbol stripping program.
+ STRIP=$lt_STRIP
+ 
+@@ -14217,6 +15035,9 @@ RANLIB=$lt_RANLIB
+ old_postinstall_cmds=$lt_old_postinstall_cmds
+ old_postuninstall_cmds=$lt_old_postuninstall_cmds
+ 
++# Whether to use a lock for old archive extraction.
++lock_old_archive_extraction=$lock_old_archive_extraction
++
+ # A C compiler.
+ LTCC=$lt_CC
+ 
+@@ -14235,14 +15056,14 @@ global_symbol_to_c_name_address=$lt_lt_c
+ # Transform the output of nm in a C name address pair when lib prefix is needed.
+ global_symbol_to_c_name_address_lib_prefix=$lt_lt_cv_sys_global_symbol_to_c_name_address_lib_prefix
+ 
+-# The name of the directory that contains temporary libtool files.
+-objdir=$objdir
++# Specify filename containing input files for \$NM.
++nm_file_list_spec=$lt_nm_file_list_spec
+ 
+-# Shell to use when invoking shell scripts.
+-SHELL=$lt_SHELL
++# The root where to search for dependent libraries,and in which our libraries should be installed.
++lt_sysroot=$lt_sysroot
+ 
+-# An echo program that does not interpret backslashes.
+-ECHO=$lt_ECHO
++# The name of the directory that contains temporary libtool files.
++objdir=$objdir
+ 
+ # Used to examine libraries when file_magic_cmd begins with "file".
+ MAGIC_CMD=$MAGIC_CMD
+@@ -14250,6 +15071,9 @@ MAGIC_CMD=$MAGIC_CMD
+ # Must we lock files when doing compilation?
+ need_locks=$lt_need_locks
+ 
++# Manifest tool.
++MANIFEST_TOOL=$lt_MANIFEST_TOOL
++
+ # Tool to manipulate archived DWARF debug symbol files on Mac OS X.
+ DSYMUTIL=$lt_DSYMUTIL
+ 
+@@ -14306,6 +15130,9 @@ library_names_spec=$lt_library_names_spe
+ # The coded name of the library, if different from the real name.
+ soname_spec=$lt_soname_spec
+ 
++# Permission mode override for installation of shared libraries.
++install_override_mode=$lt_install_override_mode
++
+ # Command to use after installation of a shared archive.
+ postinstall_cmds=$lt_postinstall_cmds
+ 
+@@ -14345,6 +15172,10 @@ striplib=$lt_striplib
+ # The linker used to build libraries.
+ LD=$lt_LD
+ 
++# How to create reloadable object files.
++reload_flag=$lt_reload_flag
++reload_cmds=$lt_reload_cmds
++
+ # Commands used to build an old-style archive.
+ old_archive_cmds=$lt_old_archive_cmds
+ 
+@@ -14357,12 +15188,12 @@ with_gcc=$GCC
+ # Compiler flag to turn off builtin functions.
+ no_builtin_flag=$lt_lt_prog_compiler_no_builtin_flag
+ 
+-# How to pass a linker flag through the compiler.
+-wl=$lt_lt_prog_compiler_wl
+-
+ # Additional compiler flags for building library objects.
+ pic_flag=$lt_lt_prog_compiler_pic
+ 
++# How to pass a linker flag through the compiler.
++wl=$lt_lt_prog_compiler_wl
++
+ # Compiler flag to prevent dynamic linking.
+ link_static_flag=$lt_lt_prog_compiler_static
+ 
+@@ -14449,9 +15280,6 @@ inherit_rpath=$inherit_rpath
+ # Whether libtool must link a program against all its dependency libraries.
+ link_all_deplibs=$link_all_deplibs
+ 
+-# Fix the shell variable \$srcfile for the compiler.
+-fix_srcfile_path=$lt_fix_srcfile_path
+-
+ # Set to "yes" if exported symbols are required.
+ always_export_symbols=$always_export_symbols
+ 
+@@ -14467,6 +15295,9 @@ include_expsyms=$lt_include_expsyms
+ # Commands necessary for linking programs (against libraries) with templates.
+ prelink_cmds=$lt_prelink_cmds
+ 
++# Commands necessary for finishing linking programs.
++postlink_cmds=$lt_postlink_cmds
++
+ # Specify filename containing input files.
+ file_list_spec=$lt_file_list_spec
+ 
+@@ -14499,212 +15330,169 @@ ltmain="$ac_aux_dir/ltmain.sh"
+   # if finds mixed CR/LF and LF-only lines.  Since sed operates in
+   # text mode, it properly converts lines to CR/LF.  This bash problem
+   # is reportedly fixed, but why not run on old versions too?
+-  sed '/^# Generated shell functions inserted here/q' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+-
+-  case $xsi_shell in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_dirname_and_basename file append nondir_replacement
+-# perform func_basename and func_dirname in a single function
+-# call:
+-#   dirname:  Compute the dirname of FILE.  If nonempty,
+-#             add APPEND to the result, otherwise set result
+-#             to NONDIR_REPLACEMENT.
+-#             value returned in "$func_dirname_result"
+-#   basename: Compute filename of FILE.
+-#             value retuned in "$func_basename_result"
+-# Implementation must be kept synchronized with func_dirname
+-# and func_basename. For efficiency, we do not delegate to
+-# those functions but instead duplicate the functionality here.
+-func_dirname_and_basename ()
+-{
+-  case ${1} in
+-    */*) func_dirname_result="${1%/*}${2}" ;;
+-    *  ) func_dirname_result="${3}" ;;
+-  esac
+-  func_basename_result="${1##*/}"
+-}
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-func_stripname ()
+-{
+-  # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are
+-  # positional parameters, so assign one to ordinary parameter first.
+-  func_stripname_result=${3}
+-  func_stripname_result=${func_stripname_result#"${1}"}
+-  func_stripname_result=${func_stripname_result%"${2}"}
+-}
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=${1%%=*}
+-  func_opt_split_arg=${1#*=}
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  case ${1} in
+-    *.lo) func_lo2o_result=${1%.lo}.${objext} ;;
+-    *)    func_lo2o_result=${1} ;;
+-  esac
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=${1%.*}.lo
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=$(( $* ))
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=${#1}
+-}
+-
+-_LT_EOF
+-    ;;
+-  *) # Bourne compatible functions.
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_dirname file append nondir_replacement
+-# Compute the dirname of FILE.  If nonempty, add APPEND to the result,
+-# otherwise set result to NONDIR_REPLACEMENT.
+-func_dirname ()
+-{
+-  # Extract subdirectory from the argument.
+-  func_dirname_result=`$ECHO "X${1}" | $Xsed -e "$dirname"`
+-  if test "X$func_dirname_result" = "X${1}"; then
+-    func_dirname_result="${3}"
+-  else
+-    func_dirname_result="$func_dirname_result${2}"
+-  fi
+-}
+-
+-# func_basename file
+-func_basename ()
+-{
+-  func_basename_result=`$ECHO "X${1}" | $Xsed -e "$basename"`
+-}
+-
+-
+-# func_stripname prefix suffix name
+-# strip PREFIX and SUFFIX off of NAME.
+-# PREFIX and SUFFIX must not contain globbing or regex special
+-# characters, hashes, percent signs, but SUFFIX may contain a leading
+-# dot (in which case that matches only a dot).
+-# func_strip_suffix prefix name
+-func_stripname ()
+-{
+-  case ${2} in
+-    .*) func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%\\\\${2}\$%%"`;;
+-    *)  func_stripname_result=`$ECHO "X${3}" \
+-           | $Xsed -e "s%^${1}%%" -e "s%${2}\$%%"`;;
+-  esac
+-}
+-
+-# sed scripts:
+-my_sed_long_opt='1s/^\(-[^=]*\)=.*/\1/;q'
+-my_sed_long_arg='1s/^-[^=]*=//'
+-
+-# func_opt_split
+-func_opt_split ()
+-{
+-  func_opt_split_opt=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_opt"`
+-  func_opt_split_arg=`$ECHO "X${1}" | $Xsed -e "$my_sed_long_arg"`
+-}
+-
+-# func_lo2o object
+-func_lo2o ()
+-{
+-  func_lo2o_result=`$ECHO "X${1}" | $Xsed -e "$lo2o"`
+-}
+-
+-# func_xform libobj-or-source
+-func_xform ()
+-{
+-  func_xform_result=`$ECHO "X${1}" | $Xsed -e 's/\.[^.]*$/.lo/'`
+-}
+-
+-# func_arith arithmetic-term...
+-func_arith ()
+-{
+-  func_arith_result=`expr "$@"`
+-}
+-
+-# func_len string
+-# STRING may not start with a hyphen.
+-func_len ()
+-{
+-  func_len_result=`expr "$1" : ".*" 2>/dev/null || echo $max_cmd_len`
+-}
+-
+-_LT_EOF
+-esac
+-
+-case $lt_shell_append in
+-  yes)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1+=\$2"
+-}
+-_LT_EOF
+-    ;;
+-  *)
+-    cat << \_LT_EOF >> "$cfgfile"
+-
+-# func_append var value
+-# Append VALUE to the end of shell variable VAR.
+-func_append ()
+-{
+-  eval "$1=\$$1\$2"
+-}
+-
+-_LT_EOF
+-    ;;
+-  esac
++  sed '$q' "$ltmain" >> "$cfgfile" \
++     || (rm -f "$cfgfile"; exit 1)
+ 
++  if test x"$xsi_shell" = xyes; then
++  sed -e '/^func_dirname ()$/,/^} # func_dirname /c\
++func_dirname ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++} # Extended-shell func_dirname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_basename ()$/,/^} # func_basename /c\
++func_basename ()\
++{\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_dirname_and_basename ()$/,/^} # func_dirname_and_basename /c\
++func_dirname_and_basename ()\
++{\
++\    case ${1} in\
++\      */*) func_dirname_result="${1%/*}${2}" ;;\
++\      *  ) func_dirname_result="${3}" ;;\
++\    esac\
++\    func_basename_result="${1##*/}"\
++} # Extended-shell func_dirname_and_basename implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_stripname ()$/,/^} # func_stripname /c\
++func_stripname ()\
++{\
++\    # pdksh 5.2.14 does not do ${X%$Y} correctly if both X and Y are\
++\    # positional parameters, so assign one to ordinary parameter first.\
++\    func_stripname_result=${3}\
++\    func_stripname_result=${func_stripname_result#"${1}"}\
++\    func_stripname_result=${func_stripname_result%"${2}"}\
++} # Extended-shell func_stripname implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_long_opt ()$/,/^} # func_split_long_opt /c\
++func_split_long_opt ()\
++{\
++\    func_split_long_opt_name=${1%%=*}\
++\    func_split_long_opt_arg=${1#*=}\
++} # Extended-shell func_split_long_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_split_short_opt ()$/,/^} # func_split_short_opt /c\
++func_split_short_opt ()\
++{\
++\    func_split_short_opt_arg=${1#??}\
++\    func_split_short_opt_name=${1%"$func_split_short_opt_arg"}\
++} # Extended-shell func_split_short_opt implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_lo2o ()$/,/^} # func_lo2o /c\
++func_lo2o ()\
++{\
++\    case ${1} in\
++\      *.lo) func_lo2o_result=${1%.lo}.${objext} ;;\
++\      *)    func_lo2o_result=${1} ;;\
++\    esac\
++} # Extended-shell func_lo2o implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_xform ()$/,/^} # func_xform /c\
++func_xform ()\
++{\
++    func_xform_result=${1%.*}.lo\
++} # Extended-shell func_xform implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_arith ()$/,/^} # func_arith /c\
++func_arith ()\
++{\
++    func_arith_result=$(( $* ))\
++} # Extended-shell func_arith implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_len ()$/,/^} # func_len /c\
++func_len ()\
++{\
++    func_len_result=${#1}\
++} # Extended-shell func_len implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++fi
++
++if test x"$lt_shell_append" = xyes; then
++  sed -e '/^func_append ()$/,/^} # func_append /c\
++func_append ()\
++{\
++    eval "${1}+=\\${2}"\
++} # Extended-shell func_append implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  sed -e '/^func_append_quoted ()$/,/^} # func_append_quoted /c\
++func_append_quoted ()\
++{\
++\    func_quote_for_eval "${2}"\
++\    eval "${1}+=\\\\ \\$func_quote_for_eval_result"\
++} # Extended-shell func_append_quoted implementation' "$cfgfile" > $cfgfile.tmp \
++  && mv -f "$cfgfile.tmp" "$cfgfile" \
++    || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++test 0 -eq $? || _lt_function_replace_fail=:
++
++
++  # Save a `func_append' function call where possible by direct use of '+='
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1+="%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++else
++  # Save a `func_append' function call even when '+=' is not available
++  sed -e 's%func_append \([a-zA-Z_]\{1,\}\) "%\1="$\1%g' $cfgfile > $cfgfile.tmp \
++    && mv -f "$cfgfile.tmp" "$cfgfile" \
++      || (rm -f "$cfgfile" && cp "$cfgfile.tmp" "$cfgfile" && rm -f "$cfgfile.tmp")
++  test 0 -eq $? || _lt_function_replace_fail=:
++fi
++
++if test x"$_lt_function_replace_fail" = x":"; then
++  { $as_echo "$as_me:${as_lineno-$LINENO}: WARNING: Unable to substitute extended shell functions in $ofile" >&5
++$as_echo "$as_me: WARNING: Unable to substitute extended shell functions in $ofile" >&2;}
++fi
+ 
+-  sed -n '/^# Generated shell functions inserted here/,$p' "$ltmain" >> "$cfgfile" \
+-    || (rm -f "$cfgfile"; exit 1)
+ 
+-  mv -f "$cfgfile" "$ofile" ||
++   mv -f "$cfgfile" "$ofile" ||
+     (rm -f "$ofile" && cp "$cfgfile" "$ofile" && rm -f "$cfgfile")
+   chmod +x "$ofile"
+ 
+Index: binutils-2.20.1/opcodes/Makefile.in
+===================================================================
+--- binutils-2.20.1.orig/opcodes/Makefile.in
++++ binutils-2.20.1/opcodes/Makefile.in
+@@ -154,6 +154,7 @@ CYGPATH_W = @CYGPATH_W@
+ DATADIRNAME = @DATADIRNAME@
+ DEFS = @DEFS@
+ DEPDIR = @DEPDIR@
++DLLTOOL = @DLLTOOL@
+ DSYMUTIL = @DSYMUTIL@
+ DUMPBIN = @DUMPBIN@
+ ECHO_C = @ECHO_C@
+@@ -187,6 +188,7 @@ LN_S = @LN_S@
+ LTLIBOBJS = @LTLIBOBJS@
+ MAINT = @MAINT@
+ MAKEINFO = @MAKEINFO@
++MANIFEST_TOOL = @MANIFEST_TOOL@
+ MKDIR_P = @MKDIR_P@
+ MKINSTALLDIRS = @MKINSTALLDIRS@
+ MSGFMT = @MSGFMT@
+@@ -223,6 +225,7 @@ abs_builddir = @abs_builddir@
+ abs_srcdir = @abs_srcdir@
+ abs_top_builddir = @abs_top_builddir@
+ abs_top_srcdir = @abs_top_srcdir@
++ac_ct_AR = @ac_ct_AR@
+ ac_ct_CC = @ac_ct_CC@
+ ac_ct_DUMPBIN = @ac_ct_DUMPBIN@
+ am__include = @am__include@
+@@ -263,7 +266,6 @@ libdir = @libdir@
+ libexecdir = @libexecdir@
+ localedir = @localedir@
+ localstatedir = @localstatedir@
+-lt_ECHO = @lt_ECHO@
+ mandir = @mandir@
+ mkdir_p = @mkdir_p@
+ oldincludedir = @oldincludedir@
+Index: binutils-2.20.1/bfd/configure.in
+===================================================================
+--- binutils-2.20.1.orig/bfd/configure.in
++++ binutils-2.20.1/bfd/configure.in
+@@ -532,7 +532,7 @@ changequote(,)dnl
+   x=`sed -n -e 's/^[ 	]*PICFLAG[ 	]*=[ 	]*//p' < ../libiberty/Makefile | sed -n '$p'`
+ changequote([,])dnl
+   if test -n "$x"; then
+-    SHARED_LIBADD="-L`pwd`/../libiberty/pic -liberty"
++    SHARED_LIBADD="`pwd`/../libiberty/pic/libiberty.a"
+   fi
+ 
+ # More hacks to build DLLs on Windows.
+Index: binutils-2.20.1/opcodes/configure.in
+===================================================================
+--- binutils-2.20.1.orig/opcodes/configure.in
++++ binutils-2.20.1/opcodes/configure.in
+@@ -134,7 +134,7 @@ changequote(,)dnl
+   x=`sed -n -e 's/^[ 	]*PICFLAG[ 	]*=[ 	]*//p' < ../libiberty/Makefile | sed -n '$p'`
+ changequote([,])dnl
+   if test -n "$x"; then
+-    SHARED_LIBADD="-L`pwd`/../libiberty/pic -liberty"
++    SHARED_LIBADD="`pwd`/../libiberty/pic/libiberty.a"
+   fi
+ 
+   case "${host}" in
diff --git a/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-rpath-fix.patch b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-rpath-fix.patch
new file mode 100644
index 0000000000..a0058c1a4f
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-2.20.1/libtool-rpath-fix.patch
@@ -0,0 +1,36 @@
+Enabling sysroot support in libtool exposed a bug where the final
+library had an RPATH encoded into it which still pointed to the
+sysroot. This works around the issue until it gets sorted out
+upstream.
+
+Fix suggested by Richard Purdie <richard.purdie@linuxfoundation.org> 
+Signed-off-by: Scott Garman <scott.a.garman@intel.com>
+
+diff -urN binutils-2.21.orig//ltmain.sh binutils-2.21/ltmain.sh
+--- binutils-2.21.orig//ltmain.sh	2011-01-18 11:50:40.821710085 -0800
++++ binutils-2.21/ltmain.sh	2011-01-18 11:51:38.774952785 -0800
+@@ -8035,9 +8035,11 @@
+ 	  test "$opt_mode" != relink && rpath="$compile_rpath$rpath"
+ 	  for libdir in $rpath; do
+ 	    if test -n "$hardcode_libdir_flag_spec"; then
++		  func_replace_sysroot "$libdir"
++		  libdir=$func_replace_sysroot_result
++		  func_stripname '=' '' "$libdir"
++		  libdir=$func_stripname_result
+ 	      if test -n "$hardcode_libdir_separator"; then
+-		func_replace_sysroot "$libdir"
+-		libdir=$func_replace_sysroot_result
+ 		if test -z "$hardcode_libdirs"; then
+ 		  hardcode_libdirs="$libdir"
+ 		else
+@@ -8770,6 +8772,10 @@
+       hardcode_libdirs=
+       for libdir in $compile_rpath $finalize_rpath; do
+ 	if test -n "$hardcode_libdir_flag_spec"; then
++	  func_replace_sysroot "$libdir"
++	  libdir=$func_replace_sysroot_result
++	  func_stripname '=' '' "$libdir"
++	  libdir=$func_stripname_result
+ 	  if test -n "$hardcode_libdir_separator"; then
+ 	    if test -z "$hardcode_libdirs"; then
+ 	      hardcode_libdirs="$libdir"
diff --git a/meta-oe/recipes-devtools/binutils/binutils-cross-canadian.inc b/meta-oe/recipes-devtools/binutils/binutils-cross-canadian.inc
new file mode 100644
index 0000000000..95e535a1b7
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-cross-canadian.inc
@@ -0,0 +1,22 @@
+inherit cross-canadian
+
+DESCRIPTION = "A GNU collection of cross-canadian binary utilities for ${TARGET_ARCH} target"
+PN = "binutils-cross-canadian-${TRANSLATED_TARGET_ARCH}"
+BPN = "binutils"
+
+DEPENDS = "flex-native bison-native virtual/${HOST_PREFIX}gcc-crosssdk virtual/libc-nativesdk zlib-nativesdk gettext-nativesdk"
+EXTRA_OECONF = "--with-sysroot=${SDKPATH}/sysroots/${TARGET_SYS} \
+                --program-prefix=${TARGET_PREFIX} \
+                --disable-werror"
+
+do_install () {
+	autotools_do_install
+
+	# We're not interested in the libs or headers, these would come from the 
+	# nativesdk or target version of the binutils recipe
+	rm -rf ${D}${prefix}/${TARGET_SYS}
+	rm -f ${D}${libdir}/libbfd*
+	rm -f ${D}${libdir}/libiberty*
+	rm -f ${D}${libdir}/libopcodes*
+	rm -f ${D}${includedir}/*.h
+}
diff --git a/meta-oe/recipes-devtools/binutils/binutils-cross-canadian_2.20.1.bb b/meta-oe/recipes-devtools/binutils/binutils-cross-canadian_2.20.1.bb
new file mode 100644
index 0000000000..1621b77e9d
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-cross-canadian_2.20.1.bb
@@ -0,0 +1,3 @@
+require binutils_${PV}.bb
+require binutils-cross-canadian.inc
+PR = "r6"
diff --git a/meta-oe/recipes-devtools/binutils/binutils-cross.inc b/meta-oe/recipes-devtools/binutils/binutils-cross.inc
new file mode 100644
index 0000000000..4b909720de
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-cross.inc
@@ -0,0 +1,26 @@
+inherit cross
+PROVIDES = "virtual/${TARGET_PREFIX}binutils"
+
+EXTRA_OECONF = "--with-sysroot=${STAGING_DIR_TARGET} \
+                --program-prefix=${TARGET_PREFIX} \
+                --disable-install-libbfd \
+                --disable-werror \
+                --enable-poison-system-directories"
+
+do_install () {
+	oe_runmake 'DESTDIR=${D}' install
+
+	# We don't really need these, so we'll remove them...
+	rm -rf ${D}${STAGING_DIR_NATIVE}${libdir_native}/libiberty.a
+	rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/${TARGET_SYS}
+	rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/lib/ldscripts
+	rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/share/info
+	rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/share/locale
+	rm -rf ${D}${STAGING_DIR_NATIVE}${prefix_native}/share/man
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/share || :
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/${libdir}/gcc-lib || :
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/${libdir}64/gcc-lib || :
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/${libdir} || :
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/${libdir}64 || :
+	rmdir ${D}${STAGING_DIR_NATIVE}${prefix_native}/${prefix} || :
+}
diff --git a/meta-oe/recipes-devtools/binutils/binutils-cross_2.20.1.bb b/meta-oe/recipes-devtools/binutils/binutils-cross_2.20.1.bb
new file mode 100644
index 0000000000..8c7e4bc1a3
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-cross_2.20.1.bb
@@ -0,0 +1,3 @@
+require binutils_${PV}.bb
+require binutils-cross.inc
+
diff --git a/meta-oe/recipes-devtools/binutils/binutils-crosssdk_2.20.1.bb b/meta-oe/recipes-devtools/binutils/binutils-crosssdk_2.20.1.bb
new file mode 100644
index 0000000000..88627f87be
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils-crosssdk_2.20.1.bb
@@ -0,0 +1,12 @@
+require binutils-cross_${PV}.bb
+
+inherit crosssdk
+
+PROVIDES = "virtual/${TARGET_PREFIX}binutils-crosssdk"
+
+PR = "r4"
+
+do_configure_prepend () {
+	sed -i 's#/usr/local/lib /lib /usr/lib#${SDKPATHNATIVE}/lib ${SDKPATHNATIVE}/usr/lib /usr/local/lib /lib /usr/lib#' ${S}/ld/configure.tgt
+}
+
diff --git a/meta-oe/recipes-devtools/binutils/binutils.inc b/meta-oe/recipes-devtools/binutils/binutils.inc
new file mode 100644
index 0000000000..d9e859ef2b
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils.inc
@@ -0,0 +1,149 @@
+SUMMARY = "A GNU collection of binary utilities"
+DESCRIPTION = "The GNU Binutils are a collection of binary tools. \
+The main ones are ld (GNU Linker), and as (GNU Assembler). This \
+package also includes addition tools such as addr2line (Converts \
+addresses into filenames and line numbers), ar (utility for creating, \
+modifying and extracting archives), nm (list symbols in object \
+files), objcopy (copy and translate object files), objdump (Display \
+object information), and other tools and related libraries."
+HOMEPAGE = "http://www.gnu.org/software/binutils/"
+BUGTRACKER = "http://sourceware.org/bugzilla/"
+SECTION = "devel"
+LICENSE = "GPLv3"
+
+DEPENDS = "flex-native bison-native"
+
+inherit autotools gettext
+
+PACKAGES += "${PN}-symlinks"
+
+FILES_${PN} = " \
+	${bindir}/${TARGET_PREFIX}* \
+	${libdir}/lib*-*.so \
+	${prefix}/${TARGET_SYS}/bin/*"
+
+FILES_${PN}-dev = " \
+	${includedir} \
+	${libdir}/*.a \
+	${libdir}/*.la \
+	${libdir}/libbfd.so \
+	${libdir}/libopcodes.so"
+
+FILES_${PN}-symlinks = " \
+	${bindir}/addr2line \
+	${bindir}/as \
+	${bindir}/c++filt \
+	${bindir}/gprof \
+	${bindir}/ld \
+	${bindir}/nm \
+	${bindir}/objcopy \
+	${bindir}/objdump \
+	${bindir}/ranlib \
+	${bindir}/readelf \
+	${bindir}/size \
+	${bindir}/strip"
+
+B = "${S}/build.${HOST_SYS}.${TARGET_SYS}"
+
+EXTRA_OECONF = "--program-prefix=${TARGET_PREFIX} \
+                --enable-install-libbfd \
+                --enable-shared"
+
+EXTRA_OECONF_virtclass-native = "--enable-target=all --enable-64-bit-bfd --enable-install-libbfd"
+
+# This is necessary due to a bug in the binutils Makefiles
+# EXTRA_OEMAKE = "configure-build-libiberty all"
+
+export AR = "${HOST_PREFIX}ar"
+export AS = "${HOST_PREFIX}as"
+export LD = "${HOST_PREFIX}ld"
+export NM = "${HOST_PREFIX}nm"
+export RANLIB = "${HOST_PREFIX}ranlib"
+export OBJCOPY = "${HOST_PREFIX}objcopy"
+export OBJDUMP = "${HOST_PREFIX}objdump"
+
+export AR_FOR_TARGET = "${TARGET_PREFIX}ar"
+export AS_FOR_TARGET = "${TARGET_PREFIX}as"
+export LD_FOR_TARGET = "${TARGET_PREFIX}ld"
+export NM_FOR_TARGET = "${TARGET_PREFIX}nm"
+export RANLIB_FOR_TARGET = "${TARGET_PREFIX}ranlib"
+
+export CC_FOR_HOST = "${CCACHE}${HOST_PREFIX}gcc ${HOST_CC_ARCH}"
+export CXX_FOR_HOST = "${CCACHE}${HOST_PREFIX}gcc ${HOST_CC_ARCH}"
+
+export CC_FOR_BUILD = "${BUILD_CC}"
+export CPP_FOR_BUILD = "${BUILD_CPP}"
+export CFLAGS_FOR_BUILD = "${BUILD_CFLAGS}"
+
+do_configure () {
+	(cd ${S}; gnu-configize) || die "Failed to run gnu-configize"
+	oe_runconf
+#
+# must prime config.cache to ensure the build of libiberty
+#
+	mkdir -p ${B}/build-${BUILD_SYS}
+	for i in ${CONFIG_SITE}; do
+		cat $i >> ${B}/build-${BUILD_SYS}/config.cache
+	done
+}
+
+do_install () {
+	autotools_do_install
+
+	# We don't really need these, so we'll remove them...
+	rm -rf ${D}${libdir}/ldscripts
+
+	# Fix the /usr/${TARGET_SYS}/bin/* links
+	for l in ${D}${prefix}/${TARGET_SYS}/bin/*; do
+		rm -f $l
+		ln -sf `echo ${prefix}/${TARGET_SYS}/bin \
+			| tr -s / \
+			| sed -e 's,^/,,' -e 's,[^/]*,..,g'`${bindir}/${TARGET_PREFIX}`basename $l` $l
+	done
+
+	# Install the libiberty header
+	install -d ${D}${includedir}
+	install -m 644 ${S}/include/ansidecl.h ${D}${includedir}
+	install -m 644 ${S}/include/libiberty.h ${D}${includedir}
+
+	cd ${D}${bindir}
+
+	# Symlinks for ease of running these on the native target
+	for p in ${TARGET_SYS}-* ; do
+		ln -sf $p `echo $p | sed -e s,${TARGET_SYS}-,,`
+	done
+
+	rm ${D}${bindir}/ar ${D}${bindir}/strings
+}
+
+do_install_virtclass-native () {
+	autotools_do_install
+
+	# Install the libiberty header
+	install -d ${D}${includedir}
+	install -m 644 ${S}/include/ansidecl.h ${D}${includedir}
+	install -m 644 ${S}/include/libiberty.h ${D}${includedir}
+
+	# We only want libiberty, libbfd and libopcodes
+	rm -rf ${D}${bindir}
+	rm -rf ${D}${prefix}/${TARGET_SYS}
+	rm -rf ${D}${prefix}/lib/ldscripts
+	rm -rf ${D}${prefix}/share/info
+	rm -rf ${D}${prefix}/share/locale
+	rm -rf ${D}${prefix}/share/man
+	rmdir ${D}${prefix}/share || :
+	rmdir ${D}/${libdir}/gcc-lib || :
+	rmdir ${D}/${libdir}64/gcc-lib || :
+	rmdir ${D}/${libdir} || :
+	rmdir ${D}/${libdir}64 || :
+}
+
+pkg_postinst_${PN}-symlinks () {
+	update-alternatives --install ${bindir}/ar ar ${TARGET_SYS}-ar 100
+	update-alternatives --install ${bindir}/strings strings ${TARGET_SYS}-strings 100
+}
+
+pkg_prerm_${PN}-symlinks () {
+	update-alternatives --remove ar ${TARGET_SYS}-ar
+	update-alternatives --remove strings ${TARGET_SYS}-strings
+}
diff --git a/meta-oe/recipes-devtools/binutils/binutils_2.20.1.bb b/meta-oe/recipes-devtools/binutils/binutils_2.20.1.bb
new file mode 100644
index 0000000000..6961a46f7f
--- /dev/null
+++ b/meta-oe/recipes-devtools/binutils/binutils_2.20.1.bb
@@ -0,0 +1,38 @@
+require binutils.inc
+
+PR = "r5"
+
+LIC_FILES_CHKSUM="\
+    file://src-release;endline=17;md5=4830a9ef968f3b18dd5e9f2c00db2d35\
+    file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552\
+    file://COPYING.LIB;md5=9f604d8a4f8e74f4f5140845a21b6674\
+    file://COPYING3;md5=d32239bcb673463ab874e80d47fae504\
+    file://COPYING3.LIB;md5=6a6a8e020838b23406c81b19c1d46df6\
+    file://gas/COPYING;md5=d32239bcb673463ab874e80d47fae504\
+    file://include/COPYING;md5=59530bdf33659b29e73d4adb9f9f6552\
+    file://include/COPYING3;md5=d32239bcb673463ab874e80d47fae504\
+    file://libiberty/COPYING.LIB;md5=a916467b91076e631dd8edb7424769c7\
+    file://bfd/COPYING;md5=d32239bcb673463ab874e80d47fae504\
+    "
+
+SRC_URI = "\
+     ${GNU_MIRROR}/binutils/binutils-${PV}.tar.bz2 \
+     file://binutils-uclibc-100-uclibc-conf.patch \
+     file://110-arm-eabi-conf.patch \
+     file://binutils-uclibc-300-001_ld_makefile_patch.patch \
+     file://binutils-uclibc-300-006_better_file_error.patch \
+     file://binutils-uclibc-300-012_check_ldrunpath_length.patch \
+     file://binutils-uclibc-gas-needs-libm.patch \
+     file://binutils-x86_64_i386_biarch.patch \
+     file://binutils-mips-pie.patch \
+     file://libtool-2.4-update.patch \
+     file://binutils-2.19.1-ld-sysroot.patch \
+     file://libiberty_path_fix.patch \
+     file://binutils-poison.patch \
+     file://libtool-rpath-fix.patch \
+     "
+
+SRC_URI[md5sum] = "9cdfb9d6ec0578c166d3beae5e15c4e5"
+SRC_URI[sha256sum] = "228b84722d87e88e7fdd36869e590e649ab523a0800a7d53df906498afe6f6f8"
+
+BBCLASSEXTEND = "native"
diff --git a/meta-oe/recipes-devtools/cppunit/cppunit_1.12.1.bb b/meta-oe/recipes-devtools/cppunit/cppunit_1.12.1.bb
new file mode 100644
index 0000000000..738b5df636
--- /dev/null
+++ b/meta-oe/recipes-devtools/cppunit/cppunit_1.12.1.bb
@@ -0,0 +1,19 @@
+# cppunit OE build file
+# Copyright (C) 2005, Koninklijke Philips Electronics NV.  All Rights Reserved
+# Released under the MIT license (see packages/COPYING)
+
+DESCRIPTION = "Unit Testing Library for C++"
+HOMEPAGE = "http://cppunit.sourceforge.net/"
+LICENSE = "LGPL"
+SECTION = "devel"
+PR = "r1"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/cppunit/cppunit-${PV}.tar.gz"
+
+inherit autotools binconfig
+
+CXXFLAGS_powerpc += "-lstdc++"
+
+
+SRC_URI[md5sum] = "bd30e9cf5523cdfc019b94f5e1d7fd19"
+SRC_URI[sha256sum] = "ac28a04c8e6c9217d910b0ae7122832d28d9917fa668bcc9e0b8b09acb4ea44a"
diff --git a/meta-oe/recipes-devtools/gcc/files/canadian-build-modules-configure.patch b/meta-oe/recipes-devtools/gcc/files/canadian-build-modules-configure.patch
new file mode 100644
index 0000000000..8aede105c5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/canadian-build-modules-configure.patch
@@ -0,0 +1,22 @@
+diff -urN gcc-4.2.2-orig/gcc/configure gcc-4.2.2/gcc/configure
+--- gcc-4.2.2-orig/gcc/configure	2008-08-31 23:10:56.000000000 +0200
++++ gcc-4.2.2/gcc/configure	2008-08-31 23:03:02.000000000 +0200
+@@ -12716,6 +12716,7 @@
+ 	esac
+ 	saved_CFLAGS="${CFLAGS}"
+ 	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
++	CPP="${CPP_FOR_BUILD}" CPPFLAGS="${CPPFLAGS_FOR_BUILD}" \
+ 	CONFIG_SITE= ${realsrcdir}/configure --cache-file=./other.cache \
+ 		--enable-languages=${enable_languages-all} \
+ 		--target=$target_alias --host=$build_alias --build=$build_alias
+diff -urN gcc-4.2.2-orig/gcc/configure.ac gcc-4.2.2/gcc/configure.ac
+--- gcc-4.2.2-orig/gcc/configure.ac	2008-08-31 23:10:53.000000000 +0200
++++ gcc-4.2.2/gcc/configure.ac	2008-08-31 23:03:29.000000000 +0200
+@@ -1490,6 +1490,7 @@
+ 	esac
+ 	saved_CFLAGS="${CFLAGS}"
+ 	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
++	CPP="${CPP_FOR_BUILD}" CPPFLAGS="${CPPFLAGS_FOR_BUILD}" \
+ 	${realsrcdir}/configure \
+ 		--enable-languages=${enable_languages-all} \
+ 		--target=$target_alias --host=$build_alias --build=$build_alias
diff --git a/meta-oe/recipes-devtools/gcc/files/gcc-4.3.3-fix-EXTRA_BUILD.patch b/meta-oe/recipes-devtools/gcc/files/gcc-4.3.3-fix-EXTRA_BUILD.patch
new file mode 100644
index 0000000000..8a2a4c4040
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gcc-4.3.3-fix-EXTRA_BUILD.patch
@@ -0,0 +1,12 @@
+Index: gcc-4.3.3/Makefile.in
+===================================================================
+--- gcc-4.3.3.orig/Makefile.in	2010-06-16 18:04:38.379008150 +0400
++++ gcc-4.3.3/Makefile.in	2010-06-16 18:05:29.115006261 +0400
+@@ -148,6 +148,7 @@
+ # built for the build system to override those in BASE_FLAGS_TO_PASSS.
+ EXTRA_BUILD_FLAGS = \
+ 	CFLAGS="$(CFLAGS_FOR_BUILD)" \
++	LIBCFLAGS="$(CFLAGS_FOR_BUILD)" \
+ 	LDFLAGS="$(LDFLAGS_FOR_BUILD)"
+ 
+ # This is the list of directories to built for the host system.
diff --git a/meta-oe/recipes-devtools/gcc/files/gcc-4.3.x-fix-EXTRA_BUILD.patch b/meta-oe/recipes-devtools/gcc/files/gcc-4.3.x-fix-EXTRA_BUILD.patch
new file mode 100644
index 0000000000..b3753364f8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gcc-4.3.x-fix-EXTRA_BUILD.patch
@@ -0,0 +1,13 @@
+Index: gcc-4.3.1/Makefile.in
+===================================================================
+--- gcc-4.3.1.orig/Makefile.in	2010-07-07 13:08:44.000000000 +0200
++++ gcc-4.3.1/Makefile.in	2010-07-07 13:11:59.246625709 +0200
+@@ -149,7 +149,7 @@
+ EXTRA_BUILD_FLAGS = \
+ 	CFLAGS="$(CFLAGS_FOR_BUILD)" \
+ 	LDFLAGS="$(LDFLAGS_FOR_BUILD)" \
+-	LIBCFLAGS=""
++        LIBCFLAGS="$(CFLAGS_FOR_BUILD)"
+ 
+ # This is the list of directories to built for the host system.
+ SUBDIRS = @configdirs@
diff --git a/meta-oe/recipes-devtools/gcc/files/gcc-posix-open-fix.patch b/meta-oe/recipes-devtools/gcc/files/gcc-posix-open-fix.patch
new file mode 100644
index 0000000000..99f813e866
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gcc-posix-open-fix.patch
@@ -0,0 +1,11 @@
+--- gcc-3.4.6/gcc/collect2.c	2008-10-04 18:17:17.796750393 +0400
++++ gcc-3.4.6/gcc/collect2.new	2008-10-04 18:24:10.120748711 +0400
+@@ -1534,7 +1534,7 @@ collect_execute (const char *prog, char 
+   if (redir)
+     {
+       /* Open response file.  */
+-      redir_handle = open (redir, O_WRONLY | O_TRUNC | O_CREAT);
++      redir_handle = open (redir, O_WRONLY | O_TRUNC | O_CREAT, S_IWUSR);
+ 
+       /* Duplicate the stdout and stderr file handles
+ 	 so they can be restored later.  */
diff --git a/meta-oe/recipes-devtools/gcc/files/gcc4-mtune-compat.patch b/meta-oe/recipes-devtools/gcc/files/gcc4-mtune-compat.patch
new file mode 100644
index 0000000000..0da2811d37
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gcc4-mtune-compat.patch
@@ -0,0 +1,14 @@
+Patch for gcc3 to support gcc4-compatible (and consistent) values for -mtune= option.
+
+--- gcc-3.4.4/gcc/config/arm/arm.c.org	2007-12-15 23:58:35.000000000 +0200
++++ gcc-3.4.4/gcc/config/arm/arm.c	2007-12-16 00:20:39.000000000 +0200
+@@ -432,7 +432,9 @@
+   {"arm10tdmi",	                         FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED             | FL_ARCH5 },
+   {"arm1020t",	                         FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED             | FL_ARCH5 },
+   {"arm926ejs",                          FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB                          | FL_ARCH5 | FL_ARCH5E },
++  {"arm926ej-s",                         FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB                          | FL_ARCH5 | FL_ARCH5E },
+   {"arm1026ejs",                         FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB                          | FL_ARCH5 | FL_ARCH5E },
++  {"arm1026ej-s",                        FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB                          | FL_ARCH5 | FL_ARCH5E },
+   {"xscale",                             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE },
+   {"iwmmxt",                             FL_MODE32 | FL_FAST_MULT | FL_ARCH4 | FL_THUMB | FL_LDSCHED | FL_STRONG | FL_ARCH5 | FL_ARCH5E | FL_XSCALE | FL_IWMMXT },
+   /* V6 Architecture Processors */
diff --git a/meta-oe/recipes-devtools/gcc/files/gfortran-4.3.x.patch b/meta-oe/recipes-devtools/gcc/files/gfortran-4.3.x.patch
new file mode 100644
index 0000000000..0c42851ce1
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gfortran-4.3.x.patch
@@ -0,0 +1,40 @@
+The patch below fixes a crash building libgfortran on arm-linux-gnueabi.
+
+This target doesn't really have a 128-bit integer type, however it does use 
+TImode to represent the return value of certain special ABI defined library 
+functions. This results in type_for_size(TImode) being called.
+
+Because TImode deosn't correspond to any gfortran integer kind 
+gfc_type_for_size returns NULL and we segfault shortly after.
+
+The patch below fixes this by making gfc_type_for_size handle TImode in the 
+same way as the C frontend.
+
+Tested on x86_64-linux and arm-linux-gnueabi.
+Applied to trunk.
+
+Paul
+
+2007-05-15  Paul Brook  <paul@codesourcery.com>
+
+	gcc/fortran/
+	* trans-types.c (gfc_type_for_size): Handle signed TImode.
+
+Index: gcc-4.2.1/gcc/fortran/trans-types.c
+===================================================================
+--- gcc-4.2.1/gcc/fortran/trans-types.c	(revision 170435)
++++ gcc-4.2.1/gcc/fortran/trans-types.c	(working copy)
+@@ -1800,6 +1800,13 @@ gfc_type_for_size (unsigned bits, int un
+ 	  if (type && bits == TYPE_PRECISION (type))
+ 	    return type;
+ 	}
++
++      /* Handle TImode as a special case because it is used by some backends
++         (eg. ARM) even though it is not available for normal use.  */
++#if HOST_BITS_PER_WIDE_INT >= 65
++      if (bits == TYPE_PRECISION (intTI_type_node))
++	return intTI_type_node;
++#endif
+     }
+   else
+     {
diff --git a/meta-oe/recipes-devtools/gcc/files/gfortran.patch b/meta-oe/recipes-devtools/gcc/files/gfortran.patch
new file mode 100644
index 0000000000..96905e5d7d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/gfortran.patch
@@ -0,0 +1,40 @@
+The patch below fixes a crash building libgfortran on arm-linux-gnueabi.
+
+This target doesn't really have a 128-bit integer type, however it does use 
+TImode to represent the return value of certain special ABI defined library 
+functions. This results in type_for_size(TImode) being called.
+
+Because TImode deosn't correspond to any gfortran integer kind 
+gfc_type_for_size returns NULL and we segfault shortly after.
+
+The patch below fixes this by making gfc_type_for_size handle TImode in the 
+same way as the C frontend.
+
+Tested on x86_64-linux and arm-linux-gnueabi.
+Applied to trunk.
+
+Paul
+
+2007-05-15  Paul Brook  <paul@codesourcery.com>
+
+	gcc/fortran/
+	* trans-types.c (gfc_type_for_size): Handle signed TImode.
+
+Index: gcc-4.2.1/gcc/fortran/trans-types.c
+===================================================================
+--- gcc-4.2.1/gcc/fortran/trans-types.c	(revision 170435)
++++ gcc-4.2.1/gcc/fortran/trans-types.c	(working copy)
+@@ -1800,6 +1800,13 @@ gfc_type_for_size (unsigned bits, int un
+ 	  if (type && bits == TYPE_PRECISION (type))
+ 	    return type;
+ 	}
++
++      /* Handle TImode as a special case because it is used by some backends
++         (eg. ARM) even though it is not available for normal use.  */
++#if HOST_BITS_PER_WIDE_INT >= 64
++      if (bits == TYPE_PRECISION (intTI_type_node))
++	return intTI_type_node;
++#endif
+     }
+   else
+     {
diff --git a/meta-oe/recipes-devtools/gcc/files/pr22133-mingw-path-fixup.patch b/meta-oe/recipes-devtools/gcc/files/pr22133-mingw-path-fixup.patch
new file mode 100644
index 0000000000..429e9ffd0c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/pr22133-mingw-path-fixup.patch
@@ -0,0 +1,29 @@
+diff -rupN gcc-4.2.orig/gcc/c-incpath.c gcc-4.2/gcc/c-incpath.c
+--- gcc-4.2.orig/gcc/c-incpath.c	2007-09-01 11:28:30.000000000 -0400
++++ gcc-4.2/gcc/c-incpath.c	2008-08-17 16:56:01.000000000 -0400
+@@ -340,13 +340,18 @@ add_path (char *path, int chain, int cxx
+   cpp_dir *p;
+ 
+ #if defined (HAVE_DOS_BASED_FILE_SYSTEM)
+-  /* Convert all backslashes to slashes.  The native CRT stat()
+-     function does not recognize a directory that ends in a backslash
+-     (unless it is a drive root dir, such "c:\").  Forward slashes,
+-     trailing or otherwise, cause no problems for stat().  */
+-  char* c;
+-  for (c = path; *c; c++)
+-    if (*c == '\\') *c = '/';
++  /* Remove unnecessary trailing slashes.  On some versions of MS
++     Windows, trailing  _forward_ slashes cause no problems for stat().
++     On newer versions, stat() does not recognise a directory that ends
++     in a '\\' or '/', unless it is a drive root dir, such as "c:/",
++     where it is obligatory.  */
++  int pathlen = strlen (path);
++  char* end = path + pathlen - 1;
++  /* Preserve the lead '/' or lead "c:/".  */
++  char* start = path + (pathlen > 2 && path[1] == ':' ? 3 : 1);
++  
++  for (; end > start && IS_DIR_SEPARATOR (*end); end--)
++    *end = 0;
+ #endif
+ 
+   p = XNEW (cpp_dir);
diff --git a/meta-oe/recipes-devtools/gcc/files/pr33281-mingw-host-fragment.patch b/meta-oe/recipes-devtools/gcc/files/pr33281-mingw-host-fragment.patch
new file mode 100644
index 0000000000..e16fb4464a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/pr33281-mingw-host-fragment.patch
@@ -0,0 +1,38 @@
+---
+ config/mh-mingw |    3 +++
+ configure       |    1 +
+ configure.in    |    1 +
+ 3 files changed, 5 insertions(+)
+
+Index: gcc-4.2.3/config/mh-mingw
+===================================================================
+--- /dev/null
++++ gcc-4.2.3/config/mh-mingw
+@@ -0,0 +1,3 @@
++# Add -D__USE_MINGW_ACCESS to enable the built compiler to work on Windows
++# Vista (see PR33281 for details).
++BOOT_CFLAGS += -D__USE_MINGW_ACCESS
+Index: gcc-4.2.3/configure.in
+===================================================================
+--- gcc-4.2.3.orig/configure.in
++++ gcc-4.2.3/configure.in
+@@ -929,6 +929,7 @@ case "${host}" in
+     host_makefile_frag="config/mh-cygwin"
+     ;;
+   *-mingw32*)
++    host_makefile_frag="config/mh-mingw"
+     ;;
+   *-interix*)
+     host_makefile_frag="config/mh-interix"
+Index: gcc-4.2.3/configure
+===================================================================
+--- gcc-4.2.3.orig/configure
++++ gcc-4.2.3/configure
+@@ -1769,6 +1769,7 @@ case "${host}" in
+     host_makefile_frag="config/mh-cygwin"
+     ;;
+   *-mingw32*)
++    host_makefile_frag="config/mh-mingw"
+     ;;
+   *-interix*)
+     host_makefile_frag="config/mh-interix"
diff --git a/meta-oe/recipes-devtools/gcc/files/pr35916-mingw-__USE_MINGW_ACCESS-everywhere.patch b/meta-oe/recipes-devtools/gcc/files/pr35916-mingw-__USE_MINGW_ACCESS-everywhere.patch
new file mode 100644
index 0000000000..faf44c27f9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/files/pr35916-mingw-__USE_MINGW_ACCESS-everywhere.patch
@@ -0,0 +1,13 @@
+---
+ config/mh-mingw |    1 +
+ 1 file changed, 1 insertion(+)
+
+Index: gcc-4.2.3/config/mh-mingw
+===================================================================
+--- gcc-4.2.3.orig/config/mh-mingw
++++ gcc-4.2.3/config/mh-mingw
+@@ -1,3 +1,4 @@
+ # Add -D__USE_MINGW_ACCESS to enable the built compiler to work on Windows
+ # Vista (see PR33281 for details).
+ BOOT_CFLAGS += -D__USE_MINGW_ACCESS
++CFLAGS += -D__USE_MINGW_ACCESS
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5.inc b/meta-oe/recipes-devtools/gcc/gcc-4.5.inc
new file mode 100644
index 0000000000..52fca37015
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5.inc
@@ -0,0 +1,219 @@
+require recipes-devtools/gcc/gcc-common.inc
+
+DEPENDS =+ "mpfr gmp libmpc elfutils"
+NATIVEDEPS = "mpfr-native gmp-native gettext-native libmpc-native elfutils-native"
+
+LICENSE="GCC RUNTIME LIBRARY EXCEPTION & GPLv2 & GPLv3 & LGPLv2.1 & LGPLv3"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \
+                    file://COPYING3;md5=d32239bcb673463ab874e80d47fae504 \
+                    file://COPYING3.LIB;md5=6a6a8e020838b23406c81b19c1d46df6 \
+                    file://COPYING.LIB;md5=2d5025d4aa3495befef8f17206a5b0a1 \
+                    file://COPYING.RUNTIME;md5=fe60d87048567d4fe8c8a0ed2448bcc8"
+
+
+SRCREV = "170880"
+PV = "4.5"
+INC_PR = "r32"
+
+# BINV should be incremented after updating to a revision
+# after a minor gcc release (e.g. 4.5.1 or 4.5.2) has been made
+# the value will be minor-release+1 e.g. if minor release was
+# 4.5.1 then the value below will be 2 which will mean 4.5.2
+# which will be next minor release and so on.
+
+BINV = "${PV}.3"
+BRANCH = "gcc-4_5-branch"
+PR_append = "+svnr${SRCPV}"
+
+SRC_URI = "svn://gcc.gnu.org/svn/gcc/branches;module=${BRANCH} \
+       file://gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch \
+       file://100-uclibc-conf.patch \
+       file://gcc-uclibc-locale-ctype_touplow_t.patch \
+       file://cache-amnesia.patch \
+       file://gcc-flags-for-build.patch \
+       file://libstdc++-emit-__cxa_end_cleanup-in-text.patch \
+       file://Makefile.in.patch \
+       file://gcc-armv4-pass-fix-v4bx-to-ld.patch \
+       file://sh4-multilib.patch \
+       file://arm-lib1funcs.as-fix-mismatch-between-conditions-of-an-IT-block.patch \
+       file://linaro/gcc-4.5-linaro-r99297.patch \
+       file://linaro/gcc-4.5-linaro-r99298.patch \
+       file://linaro/gcc-4.5-linaro-r99299.patch \
+       file://linaro/gcc-4.5-linaro-r99300.patch \
+       file://linaro/gcc-4.5-linaro-r99301.patch \
+       file://linaro/gcc-4.5-linaro-r99302.patch \
+       file://linaro/gcc-4.5-linaro-r99303.patch \
+       file://linaro/gcc-4.5-linaro-r99304.patch \
+       file://linaro/gcc-4.5-linaro-r99305.patch \
+       file://linaro/gcc-4.5-linaro-r99306.patch \
+       file://linaro/gcc-4.5-linaro-r99307.patch \
+       file://linaro/gcc-4.5-linaro-r99308.patch \
+       file://linaro/gcc-4.5-linaro-r99310.patch \
+       file://linaro/gcc-4.5-linaro-r99312.patch \
+       file://linaro/gcc-4.5-linaro-r99313.patch \
+       file://linaro/gcc-4.5-linaro-r99314.patch \
+       file://linaro/gcc-4.5-linaro-r99315.patch \
+       file://linaro/gcc-4.5-linaro-r99316.patch \
+       file://linaro/gcc-4.5-linaro-r99318.patch \
+       file://linaro/gcc-4.5-linaro-r99319.patch \
+       file://linaro/gcc-4.5-linaro-r99320.patch \
+       file://linaro/gcc-4.5-linaro-r99321.patch \
+       file://linaro/gcc-4.5-linaro-r99322.patch \
+       file://linaro/gcc-4.5-linaro-r99323.patch \
+       file://linaro/gcc-4.5-linaro-r99324.patch \
+       file://linaro/gcc-4.5-linaro-r99325.patch \
+       file://linaro/gcc-4.5-linaro-r99326.patch \
+       file://linaro/gcc-4.5-linaro-r99327.patch \
+       file://linaro/gcc-4.5-linaro-r99332.patch \
+       file://linaro/gcc-4.5-linaro-r99335.patch \
+       file://linaro/gcc-4.5-linaro-r99336.patch \
+       file://linaro/gcc-4.5-linaro-r99337.patch \
+       file://linaro/gcc-4.5-linaro-r99338.patch \
+       file://linaro/gcc-4.5-linaro-r99339.patch \
+       file://linaro/gcc-4.5-linaro-r99340.patch \
+       file://linaro/gcc-4.5-linaro-r99341.patch \
+       file://linaro/gcc-4.5-linaro-r99342.patch \
+       file://linaro/gcc-4.5-linaro-r99343.patch \
+       file://linaro/gcc-4.5-linaro-r99344.patch \
+       file://linaro/gcc-4.5-linaro-r99345.patch \
+       file://linaro/gcc-4.5-linaro-r99346.patch \
+       file://linaro/gcc-4.5-linaro-r99347.patch \
+       file://linaro/gcc-4.5-linaro-r99348.patch \
+       file://linaro/gcc-4.5-linaro-r99349.patch \
+       file://linaro/gcc-4.5-linaro-r99351.patch \
+       file://linaro/gcc-4.5-linaro-r99352.patch \
+       file://linaro/gcc-4.5-linaro-r99353.patch \
+       file://linaro/gcc-4.5-linaro-r99354.patch \
+       file://linaro/gcc-4.5-linaro-r99355.patch \
+       file://linaro/gcc-4.5-linaro-r99356.patch \
+       file://linaro/gcc-4.5-linaro-r99357.patch \
+       file://linaro/gcc-4.5-linaro-r99358.patch \
+       file://linaro/gcc-4.5-linaro-r99359.patch \
+       file://linaro/gcc-4.5-linaro-r99360.patch \
+       file://linaro/gcc-4.5-linaro-r99361.patch \
+       file://linaro/gcc-4.5-linaro-r99363.patch \
+       file://linaro/gcc-4.5-linaro-r99364.patch \
+       file://linaro/gcc-4.5-linaro-r99365.patch \
+       file://linaro/gcc-4.5-linaro-r99366.patch \
+       file://linaro/gcc-4.5-linaro-r99367.patch \
+       file://linaro/gcc-4.5-linaro-r99368.patch \
+       file://linaro/gcc-4.5-linaro-r99369.patch \
+       file://linaro/gcc-4.5-linaro-r99371.patch \
+       file://linaro/gcc-4.5-linaro-r99372.patch \
+       file://linaro/gcc-4.5-linaro-r99373.patch \
+       file://linaro/gcc-4.5-linaro-r99374.patch \
+       file://linaro/gcc-4.5-linaro-r99375.patch \
+       file://linaro/gcc-4.5-linaro-r99376.patch \
+       file://linaro/gcc-4.5-linaro-r99377.patch \
+       file://linaro/gcc-4.5-linaro-r99378.patch \
+       file://linaro/gcc-4.5-linaro-r99379.patch \
+       file://linaro/gcc-4.5-linaro-r99380.patch \
+       file://linaro/gcc-4.5-linaro-r99381.patch \
+       file://linaro/gcc-4.5-linaro-r99383.patch \
+       file://linaro/gcc-4.5-linaro-r99384.patch \
+       file://linaro/gcc-4.5-linaro-r99385.patch \
+       file://linaro/gcc-4.5-linaro-r99388.patch \
+       file://linaro/gcc-4.5-linaro-r99391.patch \
+       file://linaro/gcc-4.5-linaro-r99392.patch \
+       file://linaro/gcc-4.5-linaro-r99393.patch \
+       file://linaro/gcc-4.5-linaro-r99395.patch \
+       file://linaro/gcc-4.5-linaro-r99396.patch \
+       file://linaro/gcc-4.5-linaro-r99397.patch \
+       file://linaro/gcc-4.5-linaro-r99398.patch \
+       file://linaro/gcc-4.5-linaro-r99402.patch \
+       file://linaro/gcc-4.5-linaro-r99403.patch \
+       file://linaro/gcc-4.5-linaro-r99404.patch \
+       file://linaro/gcc-4.5-linaro-r99405.patch \
+       file://linaro/gcc-4.5-linaro-r99406.patch \
+       file://linaro/gcc-4.5-linaro-r99407.patch \
+       file://linaro/gcc-4.5-linaro-r99408.patch \
+       file://linaro/gcc-4.5-linaro-r99409.patch \
+       file://linaro/gcc-4.5-linaro-r99410.patch \
+       file://linaro/gcc-4.5-linaro-r99411.patch \
+       file://linaro/gcc-4.5-linaro-r99412.patch \
+       file://linaro/gcc-4.5-linaro-r99413.patch \
+       file://linaro/gcc-4.5-linaro-r99415.patch \
+       file://linaro/gcc-4.5-linaro-r99416.patch \
+       file://linaro/gcc-4.5-linaro-r99417.patch \
+       file://linaro/gcc-4.5-linaro-r99418.patch \
+       file://linaro/gcc-4.5-linaro-r99419.patch \
+       file://linaro/gcc-4.5-linaro-r99420.patch \
+       file://linaro/gcc-4.5-linaro-r99421.patch \
+       file://linaro/gcc-4.5-linaro-r99423.patch \
+       file://linaro/gcc-4.5-linaro-r99424.patch \
+       file://linaro/gcc-4.5-linaro-r99425.patch \
+       file://linaro/gcc-4.5-linaro-r99426.patch \
+       file://linaro/gcc-4.5-linaro-r99429.patch \
+       file://linaro/gcc-4.5-linaro-r99432.patch \
+       file://linaro/gcc-4.5-linaro-r99433.patch \
+       file://linaro/gcc-4.5-linaro-r99434.patch \
+       file://linaro/gcc-4.5-linaro-r99435.patch \
+       file://linaro/gcc-4.5-linaro-r99436.patch \
+       file://linaro/gcc-4.5-linaro-r99437.patch \
+       file://linaro/gcc-4.5-linaro-r99439.patch \
+       file://linaro/gcc-4.5-linaro-r99440.patch \
+       file://linaro/gcc-4.5-linaro-r99441.patch \
+       file://linaro/gcc-4.5-linaro-r99442.patch \
+       file://linaro/gcc-4.5-linaro-r99443.patch \
+       file://linaro/gcc-4.5-linaro-r99444.patch \
+       file://linaro/gcc-4.5-linaro-r99449.patch \
+       file://linaro/gcc-4.5-linaro-r99450.patch \
+       file://linaro/gcc-4.5-linaro-r99451.patch \
+       file://linaro/gcc-4.5-linaro-r99452.patch \
+       file://linaro/gcc-4.5-linaro-r99453.patch \
+       file://linaro/gcc-4.5-linaro-r99454.patch \
+       file://linaro/gcc-4.5-linaro-r99455.patch \
+       file://linaro/gcc-4.5-linaro-r99464.patch \
+       file://linaro/gcc-4.5-linaro-r99465.patch \
+       file://linaro/gcc-4.5-linaro-r99466.patch \
+       file://linaro/gcc-4.5-linaro-r99468.patch \
+       file://linaro/gcc-4.5-linaro-r99473.patch \
+       file://linaro/gcc-4.5-linaro-r99474.patch \
+       file://linaro/gcc-4.5-linaro-r99475.patch \
+       file://linaro/gcc-4.5-linaro-r99478.patch \
+       file://linaro/gcc-4.5-linaro-r99479.patch \
+       file://linaro/gcc-4.5-linaro-r99480.patch \
+       file://linaro/gcc-4.5-linaro-r99481.patch \
+       file://linaro/gcc-4.5-linaro-r99482.patch \
+       file://linaro/gcc-4.5-linaro-r99483.patch \
+       file://more-epilogues.patch \
+       file://gcc-scalar-widening-pr45847.patch \
+       file://gcc-arm-volatile-bitfield-fix.patch \
+       \
+       file://optional_libstdc.patch \
+       file://64bithack.patch \
+       file://GPLUSPLUS_INCLUDE_DIR_with_sysroot.patch \
+       "
+
+# Language Overrides
+FORTRAN = ""
+JAVA = ""
+
+S = "${WORKDIR}/${BRANCH}"
+
+#EXTRA_OECONF_BASE = "  --enable-cheaders=c_std \
+#			--enable-libssp \
+#			--disable-bootstrap \
+#			--disable-libgomp \
+#			--disable-libmudflap"
+EXTRA_OECONF_BASE = "--enable-lto \
+                     --enable-libssp \
+                     --disable-bootstrap \
+                     --disable-libgomp \
+                     --disable-libmudflap \
+                     --enable-cheaders=c_global "
+
+EXTRA_OECONF_INITIAL = "--disable-libmudflap \
+                        --disable-libgomp \
+                        --disable-libssp \
+                        --enable-decimal-float=no"
+
+EXTRA_OECONF_INTERMEDIATE = "--disable-libmudflap \
+                             --disable-libgomp \
+                             --disable-libssp"
+
+EXTRA_OECONF_append_libc-uclibc = " --disable-decimal-float "
+EXTRA_OECONF_append_mips64 = " --with-arch-64=mips64 --with-tune-64=mips64"
+EXTRA_OECONF_append_mips64el = " --with-arch-64=mips64 --with-tune-64=mips64"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/100-uclibc-conf.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/100-uclibc-conf.patch
new file mode 100644
index 0000000000..0b799607e8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/100-uclibc-conf.patch
@@ -0,0 +1,37 @@
+Index: gcc-4.3.1/contrib/regression/objs-gcc.sh
+===================================================================
+--- gcc-4.3.1.orig/contrib/regression/objs-gcc.sh	2007-12-24 15:18:57.000000000 -0800
++++ gcc-4.3.1/contrib/regression/objs-gcc.sh	2008-08-16 01:15:12.000000000 -0700
+@@ -105,6 +105,10 @@
+  then
+   make all-gdb all-dejagnu all-ld || exit 1
+   make install-gdb install-dejagnu install-ld || exit 1
++elif [ $H_REAL_TARGET = $H_REAL_HOST -a $H_REAL_TARGET = i686-pc-linux-uclibc ]
++ then
++  make all-gdb all-dejagnu all-ld || exit 1
++  make install-gdb install-dejagnu install-ld || exit 1
+ elif [ $H_REAL_TARGET = $H_REAL_HOST ] ; then
+   make bootstrap || exit 1
+   make install || exit 1
+Index: gcc-4.3.1/libjava/classpath/ltconfig
+===================================================================
+--- gcc-4.3.1.orig/libjava/classpath/ltconfig	2007-06-03 16:18:43.000000000 -0700
++++ gcc-4.3.1/libjava/classpath/ltconfig	2008-08-16 01:15:12.000000000 -0700
+@@ -603,7 +603,7 @@
+ 
+ # Transform linux* to *-*-linux-gnu*, to support old configure scripts.
+ case $host_os in
+-linux-gnu*) ;;
++linux-gnu*|linux-uclibc*) ;;
+ linux*) host=`echo $host | sed 's/^\(.*-.*-linux\)\(.*\)$/\1-gnu\2/'`
+ esac
+ 
+@@ -1251,7 +1251,7 @@
+   ;;
+ 
+ # This must be Linux ELF.
+-linux-gnu*)
++linux*)
+   version_type=linux
+   need_lib_prefix=no
+   need_version=no
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/602-sdk-libstdc++-includes.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/602-sdk-libstdc++-includes.patch
new file mode 100644
index 0000000000..23fce7544d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/602-sdk-libstdc++-includes.patch
@@ -0,0 +1,20 @@
+--- gcc-4.1.0/libstdc++-v3/fragment.am	2005-03-21 11:40:14.000000000 -0600
++++ gcc-4.1.0-patched/libstdc++-v3/fragment.am	2005-04-25 20:14:39.856251785 -0500
+@@ -21,5 +21,5 @@
+ 	$(WARN_FLAGS) $(WERROR) -fdiagnostics-show-location=once
+ 
+ # -I/-D flags to pass when compiling.
+-AM_CPPFLAGS = $(GLIBCXX_INCLUDES)
++AM_CPPFLAGS = $(GLIBCXX_INCLUDES) -I$(toplevel_srcdir)/include
+ 
+--- gcc-4.1.0/libstdc++-v3/libmath/Makefile.am	2005-03-21 11:40:18.000000000 -0600
++++ gcc-4.1.0-patched/libstdc++-v3/libmath/Makefile.am	2005-04-25 20:14:39.682280735 -0500
+@@ -35,7 +35,7 @@
+ 
+ libmath_la_SOURCES = stubs.c
+ 
+-AM_CPPFLAGS = $(CANADIAN_INCLUDES)
++AM_CPPFLAGS = $(CANADIAN_INCLUDES) -I$(toplevel_srcdir)/include
+ 
+ # Only compiling "C" sources in this directory.
+ LIBTOOL = @LIBTOOL@ --tag CC
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/64bithack.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/64bithack.patch
new file mode 100644
index 0000000000..067676ab63
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/64bithack.patch
@@ -0,0 +1,33 @@
+By default gcc places 64 bit libs in a lib64 directory. This makes it use 
+"lib" instead.
+
+RP 25/7/10
+
+Index: gcc-4.5.0/gcc/config/i386/t-linux64
+===================================================================
+--- gcc-4.5.0.orig/gcc/config/i386/t-linux64	2010-08-10 15:47:42.000000000 +0100
++++ gcc-4.5.0/gcc/config/i386/t-linux64	2010-08-10 15:47:47.000000000 +0100
+@@ -24,8 +24,8 @@
+ # MULTILIB_OSDIRNAMES according to what is found on the target.
+ 
+ MULTILIB_OPTIONS = m64/m32
+-MULTILIB_DIRNAMES = 64 32 
+-MULTILIB_OSDIRNAMES = ../lib64 $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)
++MULTILIB_DIRNAMES = . 32 
++MULTILIB_OSDIRNAMES = . $(if $(wildcard $(shell echo $(SYSTEM_HEADER_DIR))/../../usr/lib32),../lib32,../lib)
+ 
+ LIBGCC = stmp-multilib
+ INSTALL_LIBGCC = install-multilib
+Index: gcc-4.5.0/gcc/config/i386/linux64.h
+===================================================================
+--- gcc-4.5.0.orig/gcc/config/i386/linux64.h	2010-08-10 15:49:06.000000000 +0100
++++ gcc-4.5.0/gcc/config/i386/linux64.h	2010-08-10 15:49:16.000000000 +0100
+@@ -59,7 +59,7 @@
+    done.  */
+ 
+ #define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
+-#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
++#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-linux-x86-64.so.2"
+ 
+ #if TARGET_64BIT_DEFAULT
+ #define SPEC_32 "m32"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/740-sh-pr24836.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/740-sh-pr24836.patch
new file mode 100644
index 0000000000..d84889259d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/740-sh-pr24836.patch
@@ -0,0 +1,29 @@
+http://sourceforge.net/mailarchive/forum.php?thread_id=8959304&forum_id=5348
+http://gcc.gnu.org/bugzilla/show_bug.cgi?id=24836
+
+Index: gcc-4.5.0/gcc/configure.ac
+===================================================================
+--- gcc-4.5.0.orig/gcc/configure.ac	2010-03-25 22:40:32.000000000 -0700
++++ gcc-4.5.0/gcc/configure.ac	2010-06-25 11:02:48.489057877 -0700
+@@ -2784,7 +2784,7 @@
+ 	tls_first_minor=14
+ 	tls_as_opt="-m64 -Aesame --fatal-warnings"
+ 	;;
+-  sh-*-* | sh[34]-*-*)
++  sh-*-* | sh[34]*-*-*)
+     conftest_s='
+ 	.section ".tdata","awT",@progbits
+ foo:	.long	25
+Index: gcc-4.5.0/gcc/configure
+===================================================================
+--- gcc-4.5.0.orig/gcc/configure	2010-03-25 22:40:32.000000000 -0700
++++ gcc-4.5.0/gcc/configure	2010-06-25 11:02:48.508381845 -0700
+@@ -22156,7 +22156,7 @@
+ 	tls_first_minor=14
+ 	tls_as_opt="-m64 -Aesame --fatal-warnings"
+ 	;;
+-  sh-*-* | sh[34]-*-*)
++  sh-*-* | sh[34]*-*-*)
+     conftest_s='
+ 	.section ".tdata","awT",@progbits
+ foo:	.long	25
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/800-arm-bigendian.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/800-arm-bigendian.patch
new file mode 100644
index 0000000000..77d02c3abd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/800-arm-bigendian.patch
@@ -0,0 +1,34 @@
+By Lennert Buytenhek <buytenh@wantstofly.org>
+Adds support for arm*b-linux* big-endian ARM targets
+
+See http://gcc.gnu.org/PR16350
+
+Index: gcc-4.5.0/gcc/config/arm/linux-elf.h
+===================================================================
+--- gcc-4.5.0.orig/gcc/config/arm/linux-elf.h	2009-11-05 06:47:45.000000000 -0800
++++ gcc-4.5.0/gcc/config/arm/linux-elf.h	2010-06-25 11:03:06.997132728 -0700
+@@ -51,7 +51,7 @@
+ 
+ #undef  MULTILIB_DEFAULTS
+ #define MULTILIB_DEFAULTS \
+-	{ "marm", "mlittle-endian", "mhard-float", "mno-thumb-interwork" }
++	{ "marm", TARGET_ENDIAN_OPTION, "mhard-float", "mno-thumb-interwork" }
+ 
+ /* Now we define the strings used to build the spec file.  */
+ #undef  LIB_SPEC
+Index: gcc-4.5.0/gcc/config.gcc
+===================================================================
+--- gcc-4.5.0.orig/gcc/config.gcc	2010-06-25 10:40:33.321880880 -0700
++++ gcc-4.5.0/gcc/config.gcc	2010-06-25 11:03:07.013133525 -0700
+@@ -734,6 +734,11 @@
+ 	esac
+ 	tmake_file="${tmake_file} t-linux arm/t-arm"
+ 	case ${target} in
++	arm*b-*)
++		tm_defines="${tm_defines} TARGET_BIG_ENDIAN_DEFAULT=1"
++		;;
++	esac
++	case ${target} in
+ 	arm*-*-linux-*eabi)
+ 	    tm_file="$tm_file arm/bpabi.h arm/linux-eabi.h"
+ 	    tmake_file="$tmake_file arm/t-arm-elf arm/t-bpabi arm/t-linux-eabi t-slibgcc-libgcc"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/904-flatten-switch-stmt-00.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/904-flatten-switch-stmt-00.patch
new file mode 100644
index 0000000000..c4641dc63e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/904-flatten-switch-stmt-00.patch
@@ -0,0 +1,74 @@
+Hi,
+
+The attached patch makes sure that we create smaller object code for
+simple switch statements. We just make sure to flatten the switch
+statement into an if-else chain, basically.
+
+This fixes a size-regression as compared to gcc-3.4, as can be seen
+below.
+
+2007-04-15  Bernhard Fischer  <..>
+
+	* stmt.c (expand_case): Do not create a complex binary tree when
+	optimizing for size but rather use the simple ordered list.
+	(emit_case_nodes): do not emit jumps to the default_label when
+	optimizing for size.
+
+Not regtested so far.
+Comments?
+
+Attached is the test switch.c mentioned below.
+
+$ for i in 2.95 3.3 3.4 4.0 4.1 4.2.orig-HEAD 4.3.orig-HEAD 4.3-HEAD;do
+gcc-$i  -DCHAIN -Os -o switch-CHAIN-$i.o -c switch.c ;done
+$ for i in 2.95 3.3 3.4 4.0 4.1 4.2.orig-HEAD 4.3.orig-HEAD 4.3-HEAD;do
+gcc-$i  -UCHAIN -Os -o switch-$i.o -c switch.c ;done
+
+$ size switch-*.o
+   text	   data	    bss	    dec	    hex	filename
+    169	      0	      0	    169	     a9	switch-2.95.o
+    115	      0	      0	    115	     73	switch-3.3.o
+    103	      0	      0	    103	     67	switch-3.4.o
+    124	      0	      0	    124	     7c	switch-4.0.o
+    124	      0	      0	    124	     7c	switch-4.1.o
+    124	      0	      0	    124	     7c	switch-4.2.orig-HEAD.o
+     95	      0	      0	     95	     5f	switch-4.3-HEAD.o
+    124	      0	      0	    124	     7c	switch-4.3.orig-HEAD.o
+    166	      0	      0	    166	     a6	switch-CHAIN-2.95.o
+    111	      0	      0	    111	     6f	switch-CHAIN-3.3.o
+     95	      0	      0	     95	     5f	switch-CHAIN-3.4.o
+     95	      0	      0	     95	     5f	switch-CHAIN-4.0.o
+     95	      0	      0	     95	     5f	switch-CHAIN-4.1.o
+     95	      0	      0	     95	     5f	switch-CHAIN-4.2.orig-HEAD.o
+     95	      0	      0	     95	     5f	switch-CHAIN-4.3-HEAD.o
+     95	      0	      0	     95	     5f	switch-CHAIN-4.3.orig-HEAD.o
+
+
+Content-Type: text/x-diff; charset=us-ascii
+Content-Disposition: attachment; filename="gcc-4.3.gcc-flatten-switch-stmt.00.diff"
+
+Index: gcc-4.5.0/gcc/stmt.c
+===================================================================
+--- gcc-4.5.0.orig/gcc/stmt.c	2010-02-19 01:53:51.000000000 -0800
++++ gcc-4.5.0/gcc/stmt.c	2010-06-25 11:05:31.816881094 -0700
+@@ -2440,7 +2440,11 @@
+ 	     default code is emitted.  */
+ 
+ 	  use_cost_table = estimate_case_costs (case_list);
+-	  balance_case_nodes (&case_list, NULL);
++	  /* When optimizing for size, we want a straight list to avoid
++	     jumps as much as possible. This basically creates an if-else
++	     chain.  */
++	  if (!optimize_size)
++	    balance_case_nodes (&case_list, NULL);
+ 	  emit_case_nodes (index, case_list, default_label, index_type);
+ 	  if (default_label)
+ 	    emit_jump (default_label);
+@@ -3008,6 +3012,7 @@
+ 	    {
+ 	      if (!node_has_low_bound (node, index_type))
+ 		{
++		  if (!optimize_size) /* don't jl to the .default_label. */
+ 		  emit_cmp_and_jump_insns (index,
+ 					   convert_modes
+ 					   (mode, imode,
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/GPLUSPLUS_INCLUDE_DIR_with_sysroot.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/GPLUSPLUS_INCLUDE_DIR_with_sysroot.patch
new file mode 100644
index 0000000000..9ae01c3fc7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/GPLUSPLUS_INCLUDE_DIR_with_sysroot.patch
@@ -0,0 +1,33 @@
+# by default c++ include directories are not relative to "--sysroot"
+# which brings one trouble when using the toolchain in an environment
+# where the build directory generating that toolchain doesn't exist,
+# e.g. in sstate, machine specific sysroot and relocatable SDK
+# toolchain. This patch now enables c++ include paths under sysroot.
+# This way it's enough as long as "--sysroot" is correctly enabled
+# in the new environment.
+#
+# Signed-off-by Kevin Tian <kevin.tian@intel.com>, 2010-12-30
+
+diff --git a/gcc/cppdefault.c b/gcc/cppdefault.c
+index 5024f48..9b47d1c 100644
+--- a/gcc/cppdefault.c
++++ b/gcc/cppdefault.c
+@@ -48,15 +48,15 @@ const struct default_include cpp_include_defaults[]
+ = {
+ #ifdef GPLUSPLUS_INCLUDE_DIR
+     /* Pick up GNU C++ generic include files.  */
+-    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, 0, 0 },
++    { GPLUSPLUS_INCLUDE_DIR, "G++", 1, 1, 1, 0 },
+ #endif
+ #ifdef GPLUSPLUS_TOOL_INCLUDE_DIR
+     /* Pick up GNU C++ target-dependent include files.  */
+-    { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, 0, 1 },
++    { GPLUSPLUS_TOOL_INCLUDE_DIR, "G++", 1, 1, 1, 1 },
+ #endif
+ #ifdef GPLUSPLUS_BACKWARD_INCLUDE_DIR
+     /* Pick up GNU C++ backward and deprecated include files.  */
+-    { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, 0, 0 },
++    { GPLUSPLUS_BACKWARD_INCLUDE_DIR, "G++", 1, 1, 1, 0 },
+ #endif
+ #ifdef LOCAL_INCLUDE_DIR
+     /* /usr/local/include comes before the fixincluded header files.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/Makefile.in.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/Makefile.in.patch
new file mode 100644
index 0000000000..45df47c5bf
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/Makefile.in.patch
@@ -0,0 +1,30 @@
+Index: gcc-4.5/gcc/Makefile.in
+===================================================================
+--- gcc-4.5.orig/gcc/Makefile.in
++++ gcc-4.5/gcc/Makefile.in
+@@ -656,7 +656,7 @@ LIBGCC2_INCLUDES =
+ TARGET_LIBGCC2_CFLAGS =
+ 
+ # Options to use when compiling crtbegin/end.
+-CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -g0 \
++CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(TARGET_INCLUDES) $(MULTILIB_CFLAGS) -g0 \
+   -finhibit-size-directive -fno-inline -fno-exceptions \
+   -fno-zero-initialized-in-bss -fno-toplevel-reorder -fno-tree-vectorize \
+   $(INHIBIT_LIBC_CFLAGS)
+@@ -1038,10 +1038,14 @@ BUILD_ERRORS = build/errors.o
+ # -I$(@D) and -I$(srcdir)/$(@D) cause the subdirectory of the file
+ # currently being compiled, in both source trees, to be examined as well.
+ # libintl.h will be found in ../intl if we are using the included libintl.
+-INCLUDES = -I. -I$(@D) -I$(srcdir) -I$(srcdir)/$(@D) \
++#
++# TARGET_INCLUDES is added to avoid that GMPINC (which points to the host
++# include dir) is used for compiling libgcc.a
++TARGET_INCLUDES = -I. -I$(@D) -I$(srcdir) -I$(srcdir)/$(@D) \
+ 	   -I$(srcdir)/../include @INCINTL@ \
+-	   $(CPPINC) $(GMPINC) $(DECNUMINC) \
++	   $(CPPINC) $(DECNUMINC) \
+ 	   $(PPLINC) $(CLOOGINC) $(LIBELFINC)
++INCLUDES = $(TARGET_INCLUDES) $(GMPINC)
+ 
+ .c.o:
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $< $(OUTPUT_OPTION)
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-lib1funcs.as-fix-mismatch-between-conditions-of-an-IT-block.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-lib1funcs.as-fix-mismatch-between-conditions-of-an-IT-block.patch
new file mode 100644
index 0000000000..39c90e7e74
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-lib1funcs.as-fix-mismatch-between-conditions-of-an-IT-block.patch
@@ -0,0 +1,18 @@
+Fix for http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43999
+
+http://patchwork.ozlabs.org/patch/72260/ is the patch that made into
+upstream gcc
+
+diff --git a/gcc/config/arm/lib1funcs.asm b/gcc/config/arm/lib1funcs.asm
+index 085e690..2e76c01 100644
+--- a/gcc/config/arm/lib1funcs.asm
++++ b/gcc/config/arm/lib1funcs.asm
+@@ -641,7 +641,7 @@ pc		.req	r15
+ 	subhs	\dividend, \dividend, \divisor, lsr #3
+ 	orrhs	\result,   \result,   \curbit,  lsr #3
+ 	cmp	\dividend, #0			@ Early termination?
+-	do_it	hs, t
++	do_it	ne, t
+ 	movnes	\curbit,   \curbit,  lsr #4	@ No, any more bits to do?
+ 	movne	\divisor,  \divisor, lsr #4
+ 	bne	1b
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-unbreak-eabi-armv4t.dpatch b/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-unbreak-eabi-armv4t.dpatch
new file mode 100644
index 0000000000..7bb8887068
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/arm-unbreak-eabi-armv4t.dpatch
@@ -0,0 +1,36 @@
+#! /bin/sh -e
+
+# DP: Fix armv4t build on ARM
+
+dir=
+if [ $# -eq 3 -a "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+    -patch)
+        patch $pdir -f --no-backup-if-mismatch -p1 < $0
+        ;;
+    -unpatch)
+        patch $pdir -f --no-backup-if-mismatch -R -p1 < $0
+        ;;
+    *)
+        echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+        exit 1
+esac
+exit 0
+
+--- src/gcc/config/arm/linux-eabi.h.orig	2007-11-24 12:37:38.000000000 +0000
++++ src/gcc/config/arm/linux-eabi.h	2007-11-24 12:39:41.000000000 +0000
+@@ -44,7 +44,7 @@
+    The ARM10TDMI core is the default for armv5t, so set
+    SUBTARGET_CPU_DEFAULT to achieve this.  */
+ #undef  SUBTARGET_CPU_DEFAULT
+-#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm10tdmi
++#define SUBTARGET_CPU_DEFAULT TARGET_CPU_arm9tdmi
+ 
+ /* TARGET_BIG_ENDIAN_DEFAULT is set in
+    config.gcc for big endian configurations.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/cache-amnesia.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/cache-amnesia.patch
new file mode 100644
index 0000000000..b889f9b6ca
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/cache-amnesia.patch
@@ -0,0 +1,31 @@
+---
+ gcc/configure    |    2 +-
+ gcc/configure.ac |    2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: gcc-4.5+svnr155514/gcc/configure
+===================================================================
+--- gcc-4.5+svnr155514.orig/gcc/configure	2009-12-29 22:00:40.000000000 -0800
++++ gcc-4.5+svnr155514/gcc/configure	2009-12-29 23:52:43.381592113 -0800
+@@ -10467,7 +10467,7 @@ else
+ 	saved_CFLAGS="${CFLAGS}"
+ 	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
+ 	LDFLAGS="${LDFLAGS_FOR_BUILD}" \
+-	${realsrcdir}/configure \
++	CONFIG_SITE= ${realsrcdir}/configure --cache-file=./other.cache \
+ 		--enable-languages=${enable_languages-all} \
+ 		--target=$target_alias --host=$build_alias --build=$build_alias
+ 	CFLAGS="${saved_CFLAGS}"
+Index: gcc-4.5+svnr155514/gcc/configure.ac
+===================================================================
+--- gcc-4.5+svnr155514.orig/gcc/configure.ac	2009-12-29 22:00:40.000000000 -0800
++++ gcc-4.5+svnr155514/gcc/configure.ac	2009-12-29 23:51:54.589091778 -0800
+@@ -1458,7 +1458,7 @@ else
+ 	saved_CFLAGS="${CFLAGS}"
+ 	CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \
+ 	LDFLAGS="${LDFLAGS_FOR_BUILD}" \
+-	${realsrcdir}/configure \
++	CONFIG_SITE= ${realsrcdir}/configure --cache-file=./other.cache \
+ 		--enable-languages=${enable_languages-all} \
+ 		--target=$target_alias --host=$build_alias --build=$build_alias
+ 	CFLAGS="${saved_CFLAGS}"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/disable_relax_pic_calls_flag.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/disable_relax_pic_calls_flag.patch
new file mode 100644
index 0000000000..b1d5a1a3cb
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/disable_relax_pic_calls_flag.patch
@@ -0,0 +1,44 @@
+GCC: disable MASK_RELAX_PIC_CALLS bit
+
+The new feature added after 4.3.3
+"http://www.pubbs.net/200909/gcc/94048-patch-add-support-for-rmipsjalr.html"
+will cause cc1plus eat up all the system memory when build webkit-gtk.
+The function mips_get_pic_call_symbol keeps on recursively calling itself.
+Disable this feature to walk aside the bug.
+
+Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
+
+diff -ruN gcc-4.5.0-orig/gcc/configure gcc-4.5.0/gcc/configure
+--- gcc-4.5.0-orig/gcc/configure	2010-09-17 23:30:21.000000000 +0800
++++ gcc-4.5.0/gcc/configure	2010-09-19 18:21:28.000000000 +0800
+@@ -23945,13 +23945,6 @@
+         rm -f conftest.*
+       fi
+     fi
+-    if test $gcc_cv_as_ld_jalr_reloc = yes; then
+-      if test x$target_cpu_default = x; then
+-        target_cpu_default=MASK_RELAX_PIC_CALLS
+-      else
+-        target_cpu_default="($target_cpu_default)|MASK_RELAX_PIC_CALLS"
+-      fi
+-    fi
+     { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_ld_jalr_reloc" >&5
+ $as_echo "$gcc_cv_as_ld_jalr_reloc" >&6; }
+ 
+diff -ruN gcc-4.5.0-orig/gcc/configure.ac gcc-4.5.0/gcc/configure.ac
+--- gcc-4.5.0-orig/gcc/configure.ac	2010-09-17 23:30:21.000000000 +0800
++++ gcc-4.5.0/gcc/configure.ac	2010-09-19 18:21:11.000000000 +0800
+@@ -3467,13 +3467,6 @@
+         rm -f conftest.*
+       fi
+     fi
+-    if test $gcc_cv_as_ld_jalr_reloc = yes; then
+-      if test x$target_cpu_default = x; then
+-        target_cpu_default=MASK_RELAX_PIC_CALLS
+-      else
+-        target_cpu_default="($target_cpu_default)|MASK_RELAX_PIC_CALLS"
+-      fi
+-    fi
+     AC_MSG_RESULT($gcc_cv_as_ld_jalr_reloc)
+ 
+     AC_CACHE_CHECK([linker for .eh_frame personality relaxation],
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-c++-builtin-redecl.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-c++-builtin-redecl.patch
new file mode 100644
index 0000000000..a149eae98e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-c++-builtin-redecl.patch
@@ -0,0 +1,114 @@
+2007-10-02  Jakub Jelinek  <jakub@redhat.com>
+
+	* decl.c (duplicate_decls): When redeclaring a builtin function,
+	keep the merged decl builtin whenever types match, even if new
+	decl defines a function.
+
+	* gcc.dg/builtins-65.c: New test.
+	* g++.dg/ext/builtin10.C: New test.
+
+Index: gcc/cp/decl.c
+===================================================================
+--- gcc/cp/decl.c.orig	2010-04-01 11:48:46.000000000 -0700
++++ gcc/cp/decl.c	2010-06-25 10:10:54.749131719 -0700
+@@ -2021,23 +2021,21 @@
+ 	  DECL_ARGUMENTS (olddecl) = DECL_ARGUMENTS (newdecl);
+ 	  DECL_RESULT (olddecl) = DECL_RESULT (newdecl);
+ 	}
++      /* If redeclaring a builtin function, it stays built in.  */
++      if (types_match && DECL_BUILT_IN (olddecl))
++	{
++	  DECL_BUILT_IN_CLASS (newdecl) = DECL_BUILT_IN_CLASS (olddecl);
++	  DECL_FUNCTION_CODE (newdecl) = DECL_FUNCTION_CODE (olddecl);
++	  /* If we're keeping the built-in definition, keep the rtl,
++	     regardless of declaration matches.  */
++	  COPY_DECL_RTL (olddecl, newdecl);
++	}
+       if (new_defines_function)
+ 	/* If defining a function declared with other language
+ 	   linkage, use the previously declared language linkage.  */
+ 	SET_DECL_LANGUAGE (newdecl, DECL_LANGUAGE (olddecl));
+       else if (types_match)
+ 	{
+-	  /* If redeclaring a builtin function, and not a definition,
+-	     it stays built in.  */
+-	  if (DECL_BUILT_IN (olddecl))
+-	    {
+-	      DECL_BUILT_IN_CLASS (newdecl) = DECL_BUILT_IN_CLASS (olddecl);
+-	      DECL_FUNCTION_CODE (newdecl) = DECL_FUNCTION_CODE (olddecl);
+-	      /* If we're keeping the built-in definition, keep the rtl,
+-		 regardless of declaration matches.  */
+-	      COPY_DECL_RTL (olddecl, newdecl);
+-	    }
+-
+ 	  DECL_RESULT (newdecl) = DECL_RESULT (olddecl);
+ 	  /* Don't clear out the arguments if we're just redeclaring a
+ 	     function.  */
+Index: gcc/testsuite/gcc.dg/builtins-65.c
+===================================================================
+--- gcc/testsuite/gcc.dg/builtins-65.c.orig	2009-06-26 02:02:04.000000000 -0700
++++ gcc/testsuite/gcc.dg/builtins-65.c	2010-06-25 10:10:54.784464429 -0700
+@@ -1,3 +1,28 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef __SIZE_TYPE__ size_t;
++extern void __chk_fail (void);
++extern int snprintf (char *, size_t, const char *, ...);
++extern inline __attribute__((gnu_inline, always_inline)) int snprintf (char *a, size_t b, const char *fmt, ...)
++{
++  if (__builtin_object_size (a, 0) != -1UL && __builtin_object_size (a, 0) < b)
++    __chk_fail ();
++  return __builtin_snprintf (a, b, fmt, __builtin_va_arg_pack ());
++}
++extern int snprintf (char *, size_t, const char *, ...) __asm ("mysnprintf");
++
++char buf[10];
++
++int
++main (void)
++{
++  snprintf (buf, 10, "%d%d\n", 10, 10);
++  return 0;
++}
++
++/* { dg-final { scan-assembler "mysnprintf" } } */
++/* { dg-final { scan-assembler-not "__chk_fail" } } */
+ /* { dg-do link } */
+ /* { dg-options "-O2 -ffast-math" } */
+ /* { dg-require-effective-target c99_runtime } */
+Index: gcc/testsuite/g++.dg/ext/builtin10.C
+===================================================================
+--- gcc/testsuite/g++.dg/ext/builtin10.C.orig	2009-02-02 03:27:50.000000000 -0800
++++ gcc/testsuite/g++.dg/ext/builtin10.C	2010-06-25 10:10:54.816467202 -0700
+@@ -1,3 +1,30 @@
++// { dg-do compile }
++// { dg-options "-O2" }
++
++typedef __SIZE_TYPE__ size_t;
++extern "C" {
++extern void __chk_fail (void);
++extern int snprintf (char *, size_t, const char *, ...);
++extern inline __attribute__((gnu_inline, always_inline)) int snprintf (char *a, size_t b, const char *fmt, ...)
++{
++  if (__builtin_object_size (a, 0) != -1UL && __builtin_object_size (a, 0) < b)
++    __chk_fail ();
++  return __builtin_snprintf (a, b, fmt, __builtin_va_arg_pack ());
++}
++extern int snprintf (char *, size_t, const char *, ...) __asm ("mysnprintf");
++}
++
++char buf[10];
++
++int
++main (void)
++{
++  snprintf (buf, 10, "%d%d\n", 10, 10);
++  return 0;
++}
++
++// { dg-final { scan-assembler "mysnprintf" } }
++// { dg-final { scan-assembler-not "__chk_fail" } }
+ // { dg-do compile { target correct_iso_cpp_string_wchar_protos } }
+ // { dg-options "-O2 -fdump-tree-optimized" }
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-cpp-pragma.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-cpp-pragma.patch
new file mode 100644
index 0000000000..00d37bd7ce
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-cpp-pragma.patch
@@ -0,0 +1,284 @@
+2008-02-26  Jakub Jelinek  <jakub@redhat.com>
+
+	* c-ppoutput.c (scan_translation_unit): Handle CPP_PRAGMA
+	and CPP_PRAGMA_EOL.
+	* c-pragma.c (pragma_ns_name): New typedef.
+	(registered_pp_pragmas): New variable.
+	(c_pp_lookup_pragma): New function.
+	(c_register_pragma_1): If flag_preprocess_only, do nothing
+	for non-expanded pragmas, for expanded ones push pragma's
+	namespace and name into registered_pp_pragmas vector.
+	(c_invoke_pragma_handler): Register OpenMP pragmas even when
+	flag_preprocess_only, don't register GCC pch_preprocess
+	pragma if flag_preprocess_only.
+	* c-opts.c (c_common_init): Call init_pragma even if
+	flag_preprocess_only.
+	* c-pragma.c (c_pp_lookup_pragma): New prototype.
+	* config/darwin.h (DARWIN_REGISTER_TARGET_PRAGMAS): Don't call
+	cpp_register_pragma if flag_preprocess_only.
+
+	* gcc.dg/gomp/preprocess-1.c: New test.
+
+--- gcc/c-ppoutput.c.jj	2008-01-26 18:01:16.000000000 +0100
++++ gcc/c-ppoutput.c	2008-02-26 22:54:57.000000000 +0100
+@@ -1,6 +1,6 @@
+ /* Preprocess only, using cpplib.
+-   Copyright (C) 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2007
+-   Free Software Foundation, Inc.
++   Copyright (C) 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2007,
++   2008 Free Software Foundation, Inc.
+    Written by Per Bothner, 1994-95.
+ 
+    This program is free software; you can redistribute it and/or modify it
+@@ -177,7 +177,24 @@ scan_translation_unit (cpp_reader *pfile
+       avoid_paste = false;
+       print.source = NULL;
+       print.prev = token;
+-      cpp_output_token (token, print.outf);
++      if (token->type == CPP_PRAGMA)
++	{
++	  const char *space;
++	  const char *name;
++
++	  maybe_print_line (token->src_loc);
++	  fputs ("#pragma ", print.outf);
++	  c_pp_lookup_pragma (token->val.pragma, &space, &name);
++	  if (space)
++	    fprintf (print.outf, "%s %s", space, name);
++	  else
++	    fprintf (print.outf, "%s", name);
++	  print.printed = 1;
++	}
++      else if (token->type == CPP_PRAGMA_EOL)
++	maybe_print_line (token->src_loc);
++      else
++	cpp_output_token (token, print.outf);
+ 
+       if (token->type == CPP_COMMENT)
+ 	account_for_newlines (token->val.str.text, token->val.str.len);
+--- gcc/c-pragma.c.jj	2008-02-15 18:43:03.000000000 +0100
++++ gcc/c-pragma.c	2008-02-26 22:59:44.000000000 +0100
+@@ -1,6 +1,6 @@
+ /* Handle #pragma, system V.4 style.  Supports #pragma weak and #pragma pack.
+    Copyright (C) 1992, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+-   2006, 2007 Free Software Foundation, Inc.
++   2006, 2007, 2008 Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+@@ -872,6 +872,61 @@ DEF_VEC_ALLOC_O (pragma_handler, heap);
+ 
+ static VEC(pragma_handler, heap) *registered_pragmas;
+ 
++typedef struct
++{
++  const char *space;
++  const char *name;
++} pragma_ns_name;
++
++DEF_VEC_O (pragma_ns_name);
++DEF_VEC_ALLOC_O (pragma_ns_name, heap);
++
++static VEC(pragma_ns_name, heap) *registered_pp_pragmas;
++
++struct omp_pragma_def { const char *name; unsigned int id; };
++static const struct omp_pragma_def omp_pragmas[] = {
++  { "atomic", PRAGMA_OMP_ATOMIC },
++  { "barrier", PRAGMA_OMP_BARRIER },
++  { "critical", PRAGMA_OMP_CRITICAL },
++  { "flush", PRAGMA_OMP_FLUSH },
++  { "for", PRAGMA_OMP_FOR },
++  { "master", PRAGMA_OMP_MASTER },
++  { "ordered", PRAGMA_OMP_ORDERED },
++  { "parallel", PRAGMA_OMP_PARALLEL },
++  { "section", PRAGMA_OMP_SECTION },
++  { "sections", PRAGMA_OMP_SECTIONS },
++  { "single", PRAGMA_OMP_SINGLE },
++  { "threadprivate", PRAGMA_OMP_THREADPRIVATE }
++};
++
++void
++c_pp_lookup_pragma (unsigned int id, const char **space, const char **name)
++{
++  const int n_omp_pragmas = sizeof (omp_pragmas) / sizeof (*omp_pragmas);
++  int i;
++
++  for (i = 0; i < n_omp_pragmas; ++i)
++    if (omp_pragmas[i].id == id)
++      {
++	*space = "omp";
++	*name = omp_pragmas[i].name;
++	return;
++      }
++
++  if (id >= PRAGMA_FIRST_EXTERNAL
++      && (id < PRAGMA_FIRST_EXTERNAL
++	  + VEC_length (pragma_ns_name, registered_pp_pragmas)))
++    {
++      *space = VEC_index (pragma_ns_name, registered_pp_pragmas,
++			  id - PRAGMA_FIRST_EXTERNAL)->space;
++      *name = VEC_index (pragma_ns_name, registered_pp_pragmas,
++			 id - PRAGMA_FIRST_EXTERNAL)->name;
++      return;
++    }
++
++  gcc_unreachable ();
++}
++
+ /* Front-end wrappers for pragma registration to avoid dragging
+    cpplib.h in almost everywhere.  */
+ 
+@@ -881,13 +936,29 @@ c_register_pragma_1 (const char *space, 
+ {
+   unsigned id;
+ 
+-  VEC_safe_push (pragma_handler, heap, registered_pragmas, &handler);
+-  id = VEC_length (pragma_handler, registered_pragmas);
+-  id += PRAGMA_FIRST_EXTERNAL - 1;
+-
+-  /* The C++ front end allocates 6 bits in cp_token; the C front end
+-     allocates 7 bits in c_token.  At present this is sufficient.  */
+-  gcc_assert (id < 64);
++  if (flag_preprocess_only)
++    {
++      pragma_ns_name ns_name;
++
++      if (!allow_expansion)
++	return;
++
++      ns_name.space = space;
++      ns_name.name = name;
++      VEC_safe_push (pragma_ns_name, heap, registered_pp_pragmas, &ns_name);
++      id = VEC_length (pragma_ns_name, registered_pp_pragmas);
++      id += PRAGMA_FIRST_EXTERNAL - 1;
++    }
++  else
++    {
++      VEC_safe_push (pragma_handler, heap, registered_pragmas, &handler);
++      id = VEC_length (pragma_handler, registered_pragmas);
++      id += PRAGMA_FIRST_EXTERNAL - 1;
++
++      /* The C++ front end allocates 6 bits in cp_token; the C front end
++	 allocates 7 bits in c_token.  At present this is sufficient.  */
++      gcc_assert (id < 64);
++    }
+ 
+   cpp_register_deferred_pragma (parse_in, space, name, id,
+ 				allow_expansion, false);
+@@ -921,24 +992,8 @@ c_invoke_pragma_handler (unsigned int id
+ void
+ init_pragma (void)
+ {
+-  if (flag_openmp && !flag_preprocess_only)
++  if (flag_openmp)
+     {
+-      struct omp_pragma_def { const char *name; unsigned int id; };
+-      static const struct omp_pragma_def omp_pragmas[] = {
+-	{ "atomic", PRAGMA_OMP_ATOMIC },
+-	{ "barrier", PRAGMA_OMP_BARRIER },
+-	{ "critical", PRAGMA_OMP_CRITICAL },
+-	{ "flush", PRAGMA_OMP_FLUSH },
+-	{ "for", PRAGMA_OMP_FOR },
+-	{ "master", PRAGMA_OMP_MASTER },
+-	{ "ordered", PRAGMA_OMP_ORDERED },
+-	{ "parallel", PRAGMA_OMP_PARALLEL },
+-	{ "section", PRAGMA_OMP_SECTION },
+-	{ "sections", PRAGMA_OMP_SECTIONS },
+-	{ "single", PRAGMA_OMP_SINGLE },
+-	{ "threadprivate", PRAGMA_OMP_THREADPRIVATE }
+-      };
+-
+       const int n_omp_pragmas = sizeof (omp_pragmas) / sizeof (*omp_pragmas);
+       int i;
+ 
+@@ -947,8 +1002,9 @@ init_pragma (void)
+ 				      omp_pragmas[i].id, true, true);
+     }
+ 
+-  cpp_register_deferred_pragma (parse_in, "GCC", "pch_preprocess",
+-				PRAGMA_GCC_PCH_PREPROCESS, false, false);
++  if (!flag_preprocess_only)
++    cpp_register_deferred_pragma (parse_in, "GCC", "pch_preprocess",
++				  PRAGMA_GCC_PCH_PREPROCESS, false, false);
+ 
+ #ifdef HANDLE_PRAGMA_PACK
+ #ifdef HANDLE_PRAGMA_PACK_WITH_EXPANSION
+--- gcc/c-opts.c.jj	2008-02-26 22:53:23.000000000 +0100
++++ gcc/c-opts.c	2008-02-26 22:54:57.000000000 +0100
+@@ -1,5 +1,5 @@
+ /* C/ObjC/C++ command line option handling.
+-   Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
++   Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008
+    Free Software Foundation, Inc.
+    Contributed by Neil Booth.
+ 
+@@ -1239,6 +1239,9 @@ c_common_init (void)
+   if (version_flag)
+     c_common_print_pch_checksum (stderr);
+ 
++  /* Has to wait until now so that cpplib has its hash table.  */
++  init_pragma ();
++
+   if (flag_preprocess_only)
+     {
+       finish_options ();
+@@ -1246,9 +1249,6 @@ c_common_init (void)
+       return false;
+     }
+ 
+-  /* Has to wait until now so that cpplib has its hash table.  */
+-  init_pragma ();
+-
+   return true;
+ }
+ 
+--- gcc/c-pragma.h.jj	2008-01-26 18:01:16.000000000 +0100
++++ gcc/c-pragma.h	2008-02-26 22:54:57.000000000 +0100
+@@ -1,6 +1,6 @@
+ /* Pragma related interfaces.
+    Copyright (C) 1995, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+-   2007  Free Software Foundation, Inc.
++   2007, 2008  Free Software Foundation, Inc.
+ 
+ This file is part of GCC.
+ 
+@@ -124,4 +124,6 @@ extern enum cpp_ttype pragma_lex (tree *
+ extern enum cpp_ttype c_lex_with_flags (tree *, location_t *, unsigned char *,
+ 					int);
+ 
++extern void c_pp_lookup_pragma (unsigned int, const char **, const char **);
++
+ #endif /* GCC_C_PRAGMA_H */
+--- gcc/config/darwin.h.jj	2008-02-11 14:48:12.000000000 +0100
++++ gcc/config/darwin.h	2008-02-26 22:54:57.000000000 +0100
+@@ -892,8 +892,9 @@ enum machopic_addr_class {
+ 
+ #define DARWIN_REGISTER_TARGET_PRAGMAS()			\
+   do {								\
+-    cpp_register_pragma (parse_in, NULL, "mark",		\
+-			 darwin_pragma_ignore, false);		\
++    if (!flag_preprocess_only)					\
++      cpp_register_pragma (parse_in, NULL, "mark",		\
++			   darwin_pragma_ignore, false);	\
+     c_register_pragma (0, "options", darwin_pragma_options);	\
+     c_register_pragma (0, "segment", darwin_pragma_ignore);	\
+     c_register_pragma (0, "unused", darwin_pragma_unused);	\
+--- gcc/testsuite/gcc.dg/gomp/preprocess-1.c.jj	2008-02-26 22:54:57.000000000 +0100
++++ gcc/testsuite/gcc.dg/gomp/preprocess-1.c	2008-02-26 22:54:57.000000000 +0100
+@@ -0,0 +1,16 @@
++/* { dg-do preprocess } */
++
++void foo (void)
++{
++  int i1, j1, k1;
++#define p parallel
++#define P(x) private (x##1)
++#define S(x) shared (x##1)
++#define F(x) firstprivate (x##1)
++#pragma omp p P(i) \
++  S(j) \
++  F(k)
++  ;
++}
++
++/* { dg-final { scan-file preprocess-1.i "(^|\n)#pragma omp parallel private \\(i1\\) shared \\(j1\\) firstprivate \\(k1\\)($|\n)" } } */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-i386-libgomp.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-i386-libgomp.patch
new file mode 100644
index 0000000000..a588db28e8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-i386-libgomp.patch
@@ -0,0 +1,65 @@
+Build i386.rpm libgomp and libsupc++.a(guard.o) as i486+, pre-i486
+hardware isn't supported because NPTL doesn't support it anyway.
+
+Index: libgomp/configure.tgt
+===================================================================
+--- libgomp/configure.tgt.orig	2010-01-28 13:47:59.000000000 -0800
++++ libgomp/configure.tgt	2010-06-25 10:32:26.706135558 -0700
+@@ -48,14 +48,14 @@
+ 	;;
+ 
+     # Note that bare i386 is not included here.  We need cmpxchg.
+-    i[456]86-*-linux*)
++    i[3456]86-*-linux*)
+ 	config_path="linux/x86 linux posix"
+ 	case " ${CC} ${CFLAGS} " in
+ 	  *" -m64 "*)
+ 	    ;;
+ 	  *)
+ 	    if test -z "$with_arch"; then
+-	      XCFLAGS="${XCFLAGS} -march=i486 -mtune=${target_cpu}"
++	      XCFLAGS="${XCFLAGS} -march=i486 -mtune=generic"
+ 	    fi
+ 	esac
+ 	;;
+@@ -67,7 +67,7 @@
+ 	config_path="linux/x86 linux posix"
+ 	case " ${CC} ${CFLAGS} " in
+ 	  *" -m32 "*)
+-	    XCFLAGS="${XCFLAGS} -march=i486 -mtune=i686"
++	    XCFLAGS="${XCFLAGS} -march=i486 -mtune=generic"
+ 	    ;;
+ 	esac
+ 	;;
+Index: libstdc++-v3/libsupc++/guard.cc
+===================================================================
+--- libstdc++-v3/libsupc++/guard.cc.orig	2009-11-09 14:09:30.000000000 -0800
++++ libstdc++-v3/libsupc++/guard.cc	2010-06-25 10:32:26.710135964 -0700
+@@ -30,6 +30,27 @@
+ #include <new>
+ #include <ext/atomicity.h>
+ #include <ext/concurrence.h>
++#if defined __i386__ && !defined _GLIBCXX_ATOMIC_BUILTINS
++# define _GLIBCXX_ATOMIC_BUILTINS 1
++# define __sync_val_compare_and_swap(a, b, c) \
++  ({								\
++     typedef char sltast[sizeof (*a) == sizeof (int) ? 1 : -1];	\
++     int sltas;							\
++     __asm __volatile ("lock; cmpxchgl %3, (%1)"		\
++		       : "=a" (sltas)				\
++		       : "r" (a), "0" (b), "r" (c) : "memory");	\
++     sltas;							\
++   })
++# define __sync_lock_test_and_set(a, b) \
++  ({								\
++     typedef char sltast[sizeof (*a) == sizeof (int) ? 1 : -1];	\
++     int sltas;							\
++     __asm __volatile ("xchgl (%1), %0"				\
++		       : "=r" (sltas)				\
++		       : "r" (a), "0" (b) : "memory");		\
++     sltas;							\
++   })
++#endif
+ #if defined(__GTHREADS) && defined(__GTHREAD_HAS_COND) \
+     && defined(_GLIBCXX_ATOMIC_BUILTINS_4) && defined(_GLIBCXX_HAVE_LINUX_FUTEX)
+ # include <climits>
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ia64-libunwind.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ia64-libunwind.patch
new file mode 100644
index 0000000000..cad13d1228
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ia64-libunwind.patch
@@ -0,0 +1,550 @@
+2004-11-27  Jakub Jelinek  <jakub@redhat.com>
+
+	* config.gcc (ia64*-*-linux*): If native and libelf is installed,
+	use ia64/t-glibc-no-libunwind instead of the other t-*unwind*
+	fragments.
+	* config/ia64/t-glibc-no-libunwind: New file.
+	* config/ia64/change-symver.c: New file.
+	* config/ia64/unwind-ia64.c: If USE_SYMVER_GLOBAL and SHARED,
+	define _Unwind_* to __symverglobal_Unwind_*.
+	(alias): Undefine.
+	(symverglobal): Define.  Use it on _Unwind_*.
+	* config/ia64/mkmap-symver-multi.awk: New file.
+	* config/ia64/libgcc-ia64-no-libunwind.ver: New file.
+
+Index: gcc/config.gcc
+===================================================================
+--- gcc/config.gcc.orig	2010-04-07 03:34:00.000000000 -0700
++++ gcc/config.gcc	2010-06-25 10:15:25.133131055 -0700
+@@ -1457,9 +1457,16 @@
+ 	;;
+ ia64*-*-linux*)
+ 	tm_file="${tm_file} dbxelf.h elfos.h svr4.h linux.h glibc-stdint.h ia64/sysv4.h ia64/linux.h"
+-	tmake_file="${tmake_file} ia64/t-ia64 t-libunwind ia64/t-glibc"
+-	if test x$with_system_libunwind != xyes ; then
+-		tmake_file="${tmake_file} t-libunwind-elf ia64/t-glibc-libunwind"
++	tmake_file="${tmake_file} ia64/t-ia64"
++	if test x${target} = x${host} && test x${target} = x${build} \
++	   && grep gelf_getverdef /usr/include/gelf.h > /dev/null 2>&1 \
++	   && test -f /usr/lib/libelf.so; then
++		tmake_file="${tmake_file} ia64/t-glibc-no-libunwind"
++	else
++		tmake_file="${tmake_file} t-libunwind ia64/t-glibc"
++		if test x$with_system_libunwind != xyes ; then
++			tmake_file="${tmake_file} t-libunwind-elf ia64/t-glibc-libunwind"
++		fi
+ 	fi
+ 	target_cpu_default="MASK_GNU_AS|MASK_GNU_LD"
+ 	extra_parts="crtbegin.o crtend.o crtbeginS.o crtendS.o crtfastmath.o"
+Index: gcc/config/ia64/t-glibc-no-libunwind
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/config/ia64/t-glibc-no-libunwind	2010-06-25 10:14:32.521880765 -0700
+@@ -0,0 +1,30 @@
++# Don't use system libunwind library on IA-64 GLIBC based system,
++# but make _Unwind_* symbols unversioned, so that created programs
++# are usable even when libgcc_s uses libunwind.
++LIB2ADDEH += $(srcdir)/config/ia64/fde-glibc.c
++SHLIB_MAPFILES += $(srcdir)/config/ia64/libgcc-ia64-no-libunwind.ver
++SHLIB_MKMAP = $(srcdir)/config/ia64/mkmap-symver-multi.awk
++
++SHLIB_LINK = $(GCC_FOR_TARGET) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \
++	-Wl,--soname=$(SHLIB_SONAME) \
++	-Wl,--version-script=$(SHLIB_MAP) \
++	-o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ $(SHLIB_OBJS) -lc && \
++	rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \
++	if [ -f $(SHLIB_DIR)/$(SHLIB_SONAME) ]; then \
++	  mv -f $(SHLIB_DIR)/$(SHLIB_SONAME) \
++		$(SHLIB_DIR)/$(SHLIB_SONAME).backup; \
++	else true; fi && \
++	gcc -O2 -o $(SHLIB_DIR)/$(SHLIB_SONAME).tweak \
++	  $$(gcc_srcdir)/config/ia64/change-symver.c -lelf && \
++	$(SHLIB_DIR)/$(SHLIB_SONAME).tweak $(SHLIB_DIR)/$(SHLIB_SONAME).tmp \
++	GCC_3.4.2 _GLOBAL_ \
++	_Unwind_GetGR _Unwind_RaiseException _Unwind_GetRegionStart _Unwind_SetIP \
++	_Unwind_GetIP _Unwind_GetLanguageSpecificData _Unwind_Resume \
++	_Unwind_DeleteException _Unwind_SetGR _Unwind_ForcedUnwind \
++	_Unwind_Backtrace _Unwind_FindEnclosingFunction _Unwind_GetCFA \
++	_Unwind_Resume_or_Rethrow _Unwind_GetBSP && \
++	rm -f $(SHLIB_DIR)/$(SHLIB_SONAME).tweak && \
++	mv $(SHLIB_DIR)/$(SHLIB_SONAME).tmp $(SHLIB_DIR)/$(SHLIB_SONAME) && \
++	$(LN_S) $(SHLIB_SONAME) $(SHLIB_DIR)/$(SHLIB_SOLINK)
++
++TARGET_LIBGCC2_CFLAGS += -DUSE_SYMVER_GLOBAL
+Index: gcc/config/ia64/change-symver.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/config/ia64/change-symver.c	2010-06-25 10:14:32.521880765 -0700
+@@ -0,0 +1,211 @@
++#define _GNU_SOURCE 1
++#define _FILE_OFFSET_BITS 64
++#include <endian.h>
++#include <errno.h>
++#include <error.h>
++#include <fcntl.h>
++#include <fnmatch.h>
++#include <gelf.h>
++#include <stdlib.h>
++#include <string.h>
++#include <unistd.h>
++
++int
++compute_veridx (const char *name, Elf *elf, Elf_Data *verd, GElf_Shdr *verd_shdr)
++{
++  if (strcmp (name, "_GLOBAL_") == 0)
++    return 1;
++
++  int cnt;
++  size_t offset = 0;
++  for (cnt = verd_shdr->sh_info; --cnt >= 0; )
++    {
++      GElf_Verdef defmem;
++      GElf_Verdef *def;
++      GElf_Verdaux auxmem;
++      GElf_Verdaux *aux;
++      unsigned int auxoffset;
++
++      /* Get the data at the next offset.  */
++      def = gelf_getverdef (verd, offset, &defmem);
++      if (def == NULL)
++	break;
++
++      auxoffset = offset + def->vd_aux;
++      aux = gelf_getverdaux (verd, auxoffset, &auxmem);
++      if (aux == NULL)
++	break;
++
++      if (strcmp (name, elf_strptr (elf, verd_shdr->sh_link,
++		  aux->vda_name)) == 0)
++	return def->vd_ndx;
++
++      /* Find the next offset.  */
++      offset += def->vd_next;
++    }
++
++  return -1;
++}
++
++int
++main (int argc, char **argv)
++{
++  if (argc < 4)
++    error (1, 0, "Usage: change_symver library from_symver to_symver symbol...\nExample: change_symver libfoo.so FOO_1.0 *global* bar baz");
++
++  const char *fname = argv[1];
++
++  /* Open the file.  */
++  int fd;
++  fd = open (fname, O_RDWR);
++  if (fd == -1)
++    error (1, errno, fname);
++
++  elf_version (EV_CURRENT);
++
++  /* Now get the ELF descriptor.  */
++  Elf *elf = elf_begin (fd, ELF_C_READ_MMAP, NULL);
++  if (elf == NULL || elf_kind (elf) != ELF_K_ELF)
++    error (1, 0, "Couldn't open %s: %s", fname, elf_errmsg (-1));
++
++  size_t shstrndx;
++  /* Get the section header string table index.  */
++  if (elf_getshstrndx (elf, &shstrndx) < 0)
++    error (1, 0, "cannot get shstrndx from %s", fname);
++
++  GElf_Ehdr ehdr_mem;
++  GElf_Ehdr *ehdr;
++
++  /* We need the ELF header in a few places.  */
++  ehdr = gelf_getehdr (elf, &ehdr_mem);
++  if (ehdr == NULL)
++    error (1, 0, "couldn't get ELF headers %s: %s", fname, elf_errmsg (-1));
++
++  Elf_Scn *scn = NULL;
++  GElf_Shdr shdr_mem, verd_shdr, ver_shdr, dynsym_shdr;
++  Elf_Data *ver = NULL, *verd = NULL, *dynsym = NULL;
++
++  while ((scn = elf_nextscn (elf, scn)) != NULL)
++    {
++      GElf_Shdr *shdr = gelf_getshdr (scn, &shdr_mem);
++
++      if (shdr == NULL)
++	error (1, 0, "couldn't get shdr from %s", fname);
++
++      if ((shdr->sh_flags & SHF_ALLOC) != 0)
++	{
++	  const char *name = elf_strptr (elf, shstrndx, shdr->sh_name);
++	  Elf_Data **p;
++
++	  if (strcmp (name, ".gnu.version") == 0)
++	    {
++	      p = &ver;
++	      ver_shdr = *shdr;
++	    }
++	  else if (strcmp (name, ".gnu.version_d") == 0)
++	    {
++	      p = &verd;
++	      verd_shdr = *shdr;
++	    }
++	  else if (strcmp (name, ".dynsym") == 0)
++	    {
++	      p = &dynsym;
++	      dynsym_shdr = *shdr;
++	    }
++	  else
++	    continue;
++
++	  if (*p != NULL)
++	    error (1, 0, "Two %s sections in %s", name, fname);
++	  *p = elf_getdata (scn, NULL);
++	  if (*p == NULL || elf_getdata (scn, *p) != NULL)
++	    error (1, 0, "No data or non-contiguous data in %s section in %s",
++		   name, fname);
++	}
++    }
++
++  if (ver == NULL || verd == NULL || dynsym == NULL)
++    error (1, 0, "Couldn't find one of the needed sections in %s", fname);
++
++  int from_idx = compute_veridx (argv[2], elf, verd, &verd_shdr);
++  if (from_idx == -1)
++    error (1, 0, "Could not find symbol version %s in %s", argv[2], fname);
++
++  int to_idx = compute_veridx (argv[3], elf, verd, &verd_shdr);
++  if (to_idx == -1)
++    error (1, 0, "Could not find symbol version %s in %s", argv[3], fname);
++
++  if (dynsym_shdr.sh_entsize != gelf_fsize (elf, ELF_T_SYM, 1, ehdr->e_version)
++      || dynsym_shdr.sh_size % dynsym_shdr.sh_entsize
++      || ver_shdr.sh_entsize != 2
++      || (ver_shdr.sh_size & 1)
++      || dynsym_shdr.sh_size / dynsym_shdr.sh_entsize != ver_shdr.sh_size / 2)
++    error (1, 0, "Unexpected sh_size or sh_entsize in %s", fname);
++
++  size_t nentries = ver_shdr.sh_size / 2;
++  size_t cnt;
++  GElf_Versym array[nentries];
++  for (cnt = 0; cnt < nentries; ++cnt)
++    {
++      GElf_Versym vsymmem;
++      GElf_Versym *vsym;
++
++      vsym = gelf_getversym (ver, cnt, &vsymmem);
++      if (vsym == NULL)
++	error (1, 0, "gelt_getversym failed in %s: %s", fname, elf_errmsg (-1));
++
++      array[cnt] = *vsym;
++      if (*vsym != from_idx)
++	continue;
++
++      GElf_Sym sym_mem;
++      GElf_Sym *sym;
++      sym = gelf_getsym (dynsym, cnt, &sym_mem);
++      if (sym == NULL)
++	error (1, 0, "gelt_getsym failed in %s: %s", fname, elf_errmsg (-1));
++
++      const char *name = elf_strptr (elf, dynsym_shdr.sh_link, sym->st_name);
++
++      int argn;
++      for (argn = 4; argn < argc; ++argn)
++	if (fnmatch (argv[argn], name, 0) == 0)
++	  {
++	    array[cnt] = to_idx;
++	    break;
++	  }
++    }
++
++  if (sizeof (array[0]) != 2)
++    abort ();
++
++#if __BYTE_ORDER == __LITTLE_ENDIAN
++  if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
++    ;
++  else if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB)
++#elif __BYTE_ORDER == __BIG_ENDIAN
++  if (ehdr->e_ident[EI_DATA] == ELFDATA2MSB)
++    ;
++  else if (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
++#else
++# error Unsupported endianity
++#endif
++    {
++      for (cnt = 0; cnt < nentries; ++cnt)
++	array[cnt] = ((array[cnt] & 0xff) << 8) | ((array[cnt] & 0xff00) >> 8);
++    }
++  else
++    error (1, 0, "Unknown EI_DATA %d in %s", ehdr->e_ident[EI_DATA], fname);
++
++  if (elf_end (elf) != 0)
++    error (1, 0, "couldn't close %s: %s", fname, elf_errmsg (-1));
++
++  if (lseek (fd, ver_shdr.sh_offset, SEEK_SET) != (off_t) ver_shdr.sh_offset)
++    error (1, 0, "failed to seek to %zd in %s", (size_t) ver_shdr.sh_offset,
++	   fname);
++
++  if (write (fd, array, 2 * nentries) != (ssize_t) (2 * nentries))
++    error (1, 0, "failed to write .gnu.version section into %s", fname);
++
++  close (fd);
++  return 0;
++}
+Index: gcc/config/ia64/unwind-ia64.c
+===================================================================
+--- gcc/config/ia64/unwind-ia64.c.orig	2009-09-07 08:41:52.000000000 -0700
++++ gcc/config/ia64/unwind-ia64.c	2010-06-25 10:14:32.521880765 -0700
+@@ -48,6 +48,51 @@
+ #define MD_UNW_COMPATIBLE_PERSONALITY_P(HEADER) 1
+ #endif
+ 
++#if defined (USE_SYMVER_GLOBAL) && defined (SHARED)
++extern _Unwind_Reason_Code __symverglobal_Unwind_Backtrace
++  (_Unwind_Trace_Fn, void *);
++extern void __symverglobal_Unwind_DeleteException
++  (struct _Unwind_Exception *);
++extern void * __symverglobal_Unwind_FindEnclosingFunction (void *);
++extern _Unwind_Reason_Code __symverglobal_Unwind_ForcedUnwind
++  (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
++extern _Unwind_Word __symverglobal_Unwind_GetCFA
++  (struct _Unwind_Context *);
++extern _Unwind_Word __symverglobal_Unwind_GetBSP
++  (struct _Unwind_Context *);
++extern _Unwind_Word __symverglobal_Unwind_GetGR
++  (struct _Unwind_Context *, int );
++extern _Unwind_Ptr __symverglobal_Unwind_GetIP (struct _Unwind_Context *);
++extern void *__symverglobal_Unwind_GetLanguageSpecificData
++  (struct _Unwind_Context *);
++extern _Unwind_Ptr __symverglobal_Unwind_GetRegionStart
++  (struct _Unwind_Context *);
++extern _Unwind_Reason_Code __symverglobal_Unwind_RaiseException
++  (struct _Unwind_Exception *);
++extern void __symverglobal_Unwind_Resume (struct _Unwind_Exception *);
++extern _Unwind_Reason_Code __symverglobal_Unwind_Resume_or_Rethrow
++   (struct _Unwind_Exception *);
++extern void __symverglobal_Unwind_SetGR
++  (struct _Unwind_Context *, int, _Unwind_Word);
++extern void __symverglobal_Unwind_SetIP
++  (struct _Unwind_Context *, _Unwind_Ptr);
++#define _Unwind_Backtrace __symverglobal_Unwind_Backtrace
++#define _Unwind_DeleteException __symverglobal_Unwind_DeleteException
++#define _Unwind_FindEnclosingFunction __symverglobal_Unwind_FindEnclosingFunction
++#define _Unwind_ForcedUnwind __symverglobal_Unwind_ForcedUnwind
++#define _Unwind_GetBSP __symverglobal_Unwind_GetBSP
++#define _Unwind_GetCFA __symverglobal_Unwind_GetCFA
++#define _Unwind_GetGR __symverglobal_Unwind_GetGR
++#define _Unwind_GetIP __symverglobal_Unwind_GetIP
++#define _Unwind_GetLanguageSpecificData __symverglobal_Unwind_GetLanguageSpecificData
++#define _Unwind_GetRegionStart __symverglobal_Unwind_GetRegionStart
++#define _Unwind_RaiseException __symverglobal_Unwind_RaiseException
++#define _Unwind_Resume __symverglobal_Unwind_Resume
++#define _Unwind_Resume_or_Rethrow __symverglobal_Unwind_Resume_or_Rethrow
++#define _Unwind_SetGR __symverglobal_Unwind_SetGR
++#define _Unwind_SetIP __symverglobal_Unwind_SetIP
++#endif
++
+ enum unw_application_register
+ {
+   UNW_AR_BSP,
+@@ -2457,4 +2502,44 @@
+ alias (_Unwind_SetIP);
+ #endif
+ 
++#if defined (USE_SYMVER_GLOBAL) && defined (SHARED)
++#undef alias
++#define symverglobal(name, version) \
++__typeof (__symverglobal##name) __symverlocal##name		\
++  __attribute__ ((alias ("__symverglobal" #name)));		\
++__asm__ (".symver __symverglobal" #name"," #name "@@GCC_3.4.2");\
++__asm__ (".symver __symverlocal" #name"," #name "@" #version)
++
++#undef _Unwind_Backtrace
++#undef _Unwind_DeleteException
++#undef _Unwind_FindEnclosingFunction
++#undef _Unwind_ForcedUnwind
++#undef _Unwind_GetBSP
++#undef _Unwind_GetCFA
++#undef _Unwind_GetGR
++#undef _Unwind_GetIP
++#undef _Unwind_GetLanguageSpecificData
++#undef _Unwind_GetRegionStart
++#undef _Unwind_RaiseException
++#undef _Unwind_Resume
++#undef _Unwind_Resume_or_Rethrow
++#undef _Unwind_SetGR
++#undef _Unwind_SetIP
++symverglobal (_Unwind_Backtrace, GCC_3.3);
++symverglobal (_Unwind_DeleteException, GCC_3.0);
++symverglobal (_Unwind_FindEnclosingFunction, GCC_3.3);
++symverglobal (_Unwind_ForcedUnwind, GCC_3.0);
++symverglobal (_Unwind_GetBSP, GCC_3.3.2);
++symverglobal (_Unwind_GetCFA, GCC_3.3);
++symverglobal (_Unwind_GetGR, GCC_3.0);
++symverglobal (_Unwind_GetIP, GCC_3.0);
++symverglobal (_Unwind_GetLanguageSpecificData, GCC_3.0);
++symverglobal (_Unwind_GetRegionStart, GCC_3.0);
++symverglobal (_Unwind_RaiseException, GCC_3.0);
++symverglobal (_Unwind_Resume, GCC_3.0);
++symverglobal (_Unwind_Resume_or_Rethrow, GCC_3.3);
++symverglobal (_Unwind_SetGR, GCC_3.0);
++symverglobal (_Unwind_SetIP, GCC_3.0);
++#endif
++
+ #endif
+Index: gcc/config/ia64/mkmap-symver-multi.awk
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/config/ia64/mkmap-symver-multi.awk	2010-06-25 10:14:32.521880765 -0700
+@@ -0,0 +1,133 @@
++# Generate an ELF symbol version map a-la Solaris and GNU ld.
++#	Contributed by Richard Henderson <rth@cygnus.com>
++#
++# This file is part of GCC.
++#
++# GCC is free software; you can redistribute it and/or modify it under
++# the terms of the GNU General Public License as published by the Free
++# Software Foundation; either version 2, or (at your option) any later
++# version.
++#
++# GCC is distributed in the hope that it will be useful, but WITHOUT
++# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++# or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++# License for more details.
++#
++# You should have received a copy of the GNU General Public License
++# along with GCC; see the file COPYING.  If not, write to the Free
++# Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
++# 02110-1301, USA.
++
++BEGIN {
++  state = "nm";
++  sawsymbol = 0;
++}
++
++# Remove comment and blank lines.
++/^ *#/ || /^ *$/ {
++  next;
++}
++
++# We begin with nm input.  Collect the set of symbols that are present
++# so that we can not emit them into the final version script -- Solaris
++# complains at us if we do.
++
++state == "nm" && /^%%/ {
++  state = "ver";
++  next;
++}
++
++state == "nm" && ($1 == "U" || $2 == "U") {
++  next;
++}
++
++state == "nm" && NF == 3 {
++  if ($3 ~ /^[^@]*@GCC_[0-9.]*$/) {
++    def[$3] = 1
++    tl=$3
++    sub(/^.*@/,"",tl)
++    ver[$3] = tl
++  } else {
++    sub(/@@?GCC_[0-9.]*$/,"",$3)
++    def[$3] = 1;
++  }
++  sawsymbol = 1;
++  next;
++}
++
++state == "nm" {
++  next;
++}
++
++# Now we process a simplified variant of the Solaris symbol version
++# script.  We have one symbol per line, no semicolons, simple markers
++# for beginning and ending each section, and %inherit markers for
++# describing version inheritence.  A symbol may appear in more than
++# one symbol version, and the last seen takes effect.
++
++NF == 3 && $1 == "%inherit" {
++  inherit[$2] = $3;
++  next;
++}
++
++NF == 2 && $2 == "{" {
++  libs[$1] = 1;
++  thislib = $1;
++  next;
++}
++
++$1 == "}" {
++  thislib = "";
++  next;
++}
++
++{
++  ver[$1] = thislib;
++  next;
++}
++
++END {
++  if (!sawsymbol)
++    {
++      print "No symbols seen -- broken or mis-installed nm?" | "cat 1>&2";
++      exit 1;
++    }
++  for (l in libs)
++    output(l);
++}
++
++function output(lib) {
++  if (done[lib])
++    return;
++  done[lib] = 1;
++  if (inherit[lib])
++    output(inherit[lib]);
++
++  empty=1
++  for (sym in ver)
++    if ((ver[sym] == lib) && (sym in def))
++      {
++	if (empty)
++	  {
++	    printf("%s {\n", lib);
++	    printf("  global:\n");
++	    empty = 0;
++	  }
++	symp = sym;
++	sub(/@GCC_[0-9.]*$/,"",symp);
++	printf("\t%s;\n", symp);
++	if (dotsyms)
++	  printf("\t.%s;\n", symp);
++      }
++
++  if (empty)
++    {
++      for (l in libs)
++	if (inherit[l] == lib)
++	  inherit[l] = inherit[lib];
++    }
++  else if (inherit[lib])
++    printf("} %s;\n", inherit[lib]);
++  else
++    printf ("\n  local:\n\t*;\n};\n");
++}
+Index: gcc/config/ia64/libgcc-ia64-no-libunwind.ver
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/config/ia64/libgcc-ia64-no-libunwind.ver	2010-06-25 10:14:32.525880902 -0700
+@@ -0,0 +1,17 @@
++GCC_3.4.2 {
++  _Unwind_GetGR
++  _Unwind_RaiseException
++  _Unwind_GetRegionStart
++  _Unwind_SetIP
++  _Unwind_GetIP
++  _Unwind_GetLanguageSpecificData
++  _Unwind_Resume
++  _Unwind_DeleteException
++  _Unwind_SetGR
++  _Unwind_ForcedUnwind
++  _Unwind_Backtrace
++  _Unwind_FindEnclosingFunction
++  _Unwind_GetCFA
++  _Unwind_Resume_or_Rethrow
++  _Unwind_GetBSP
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-debug-iface-type.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-debug-iface-type.patch
new file mode 100644
index 0000000000..de14a50018
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-debug-iface-type.patch
@@ -0,0 +1,19 @@
+2008-01-25  Jakub Jelinek  <jakub@redhat.com>
+
+	* lang.c (java_classify_record): Revert 2007-12-20 change.
+
+Index: gcc/java/lang.c
+===================================================================
+--- gcc/java/lang.c.orig	2010-01-20 00:17:00.000000000 -0800
++++ gcc/java/lang.c	2010-06-25 10:28:46.569383189 -0700
+@@ -881,9 +881,7 @@
+   if (! CLASS_P (type))
+     return RECORD_IS_STRUCT;
+ 
+-  /* ??? GDB does not support DW_TAG_interface_type as of December,
+-     2007.  Re-enable this at a later time.  */
+-  if (0 && CLASS_INTERFACE (TYPE_NAME (type)))
++  if (CLASS_INTERFACE (TYPE_NAME (type)))
+     return RECORD_IS_INTERFACE;
+ 
+   return RECORD_IS_CLASS;
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-nomulti.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-nomulti.patch
new file mode 100644
index 0000000000..3cb10f3c23
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-java-nomulti.patch
@@ -0,0 +1,48 @@
+Index: libjava/configure.ac
+===================================================================
+--- libjava/configure.ac.orig	2010-03-21 12:41:37.000000000 -0700
++++ libjava/configure.ac	2010-06-25 10:17:47.489886278 -0700
+@@ -139,6 +139,13 @@
+ 	[allow rebuilding of .class and .h files]))
+ AM_CONDITIONAL(JAVA_MAINTAINER_MODE, test "$enable_java_maintainer_mode" = yes)
+ 
++AC_ARG_ENABLE(libjava-multilib,
++	AS_HELP_STRING([--enable-libjava-multilib], [build libjava as multilib]))
++if test "$enable_libjava_multilib" = no; then
++  multilib=no
++  ac_configure_args="$ac_configure_args --disable-multilib"
++fi
++
+ # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX.
+ GCC_NO_EXECUTABLES
+ 
+Index: libjava/configure
+===================================================================
+--- libjava/configure.orig	2010-04-02 11:18:06.000000000 -0700
++++ libjava/configure	2010-06-25 10:17:47.516381209 -0700
+@@ -1609,6 +1609,8 @@
+                           default=yes
+   --enable-java-maintainer-mode
+                           allow rebuilding of .class and .h files
++  --enable-libjava-multilib
++                          build libjava as multilib
+   --disable-dependency-tracking  speeds up one-time build
+   --enable-dependency-tracking   do not reject slow dependency extractors
+   --enable-maintainer-mode  enable make rules and dependencies not useful
+@@ -3346,6 +3348,16 @@
+ fi
+ 
+ 
++# Check whether --enable-libjava-multilib was given.
++if test "${enable_libjava_multilib+set}" = set; then
++  enableval=$enable_libjava_multilib;
++fi
++
++if test "$enable_libjava_multilib" = no; then
++  multilib=no
++  ac_configure_args="$ac_configure_args --disable-multilib"
++fi
++
+ # It may not be safe to run linking tests in AC_PROG_CC/AC_PROG_CXX.
+ 
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-libgomp-speedup.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-libgomp-speedup.patch
new file mode 100644
index 0000000000..da85e556ec
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-libgomp-speedup.patch
@@ -0,0 +1,2797 @@
+2008-03-28  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/linux/sparc/futex.h (atomic_write_barrier): Fix membar
+	argument.
+
+2008-03-27  Jakub Jelinek  <jakub@redhat.com>
+
+	* libgomp.h (struct gomp_team_state): Remove single_count field
+	ifndef HAVE_SYNC_BUILTINS.
+	(struct gomp_team): Likewise.  Add work_share_list_free_lock
+	ifndef HAVE_SYNC_BUILTINS.
+	* team.c (gomp_new_team): If HAVE_SYNC_BUILTINS is not defined,
+	don't initialize single_count, but instead initialize
+	work_share_list_free_lock.
+	(free_team): Destroy work_share_list_free_lock ifndef
+	HAVE_SYNC_BUILTINS.
+	(gomp_team_start): Don't initialize ts.single_count ifndef
+	HAVE_SYNC_BUILTINS.
+	* work.c (alloc_work_share, free_work_share): Use
+	work_share_list_free_lock instead of atomic chaining ifndef
+	HAVE_SYNC_BUILTINS.
+
+2008-03-26  Jakub Jelinek  <jakub@redhat.com>
+
+	* loop.c (gomp_loop_init): Fix GFS_DYNAMIC ws->mode setting.
+	* testsuite/libgomp.c/loop-4.c: New test.
+
+	* libgomp.h (struct gomp_team_state): Add single_count field.
+	(struct gomp_team): Likewise.
+	* team.c (gomp_new_team): Clear single_count.
+	(gomp_team_start): Likewise.
+	* single.c (GOMP_single_start): Rewritten if HAVE_SYNC_BUILTINS.
+
+2008-03-25  Jakub Jelinek  <jakub@redhat.com>
+
+	* team.c (gomp_thread_start): Don't clear ts.static_trip here.
+	* loop.c (gomp_loop_static_start, gomp_loop_dynamic_start): Clear
+	ts.static_trip here.
+	* work.c (gomp_work_share_start): Don't clear ts.static_trip here.
+
+2008-03-21  Jakub Jelinek  <jakub@redhat.com>
+
+	* libgomp.h: Include ptrlock.h.
+	(struct gomp_work_share): Reshuffle fields.  Add next_alloc,
+	next_ws, next_free and inline_ordered_team_ids fields, change
+	ordered_team_ids into pointer from flexible array member.
+	(struct gomp_team_state): Add last_work_share field, remove
+	work_share_generation.
+	(struct gomp_team): Remove work_share_lock, generation_mask,
+	oldest_live_gen, num_live_gen and init_work_shares fields, add
+	work work_share_list_alloc, work_share_list_free and work_share_chunk
+	fields.  Change work_shares from pointer to pointers into an array.
+	(gomp_new_team): New prototype.
+	(gomp_team_start): Change type of last argument.
+	(gomp_new_work_share): Removed.
+	(gomp_init_work_share, gomp_fini_work_share): New prototypes.
+	(gomp_work_share_init_done): New static inline.
+	* team.c (gomp_thread_start): Clear ts.last_work_share, don't clear
+	ts.work_share_generation.
+	(new_team): Removed.
+	(gomp_new_team): New function.
+	(free_team): Free gomp_work_share blocks chained through next_alloc,
+	instead of freeing work_shares and destroying work_share_lock.
+	(gomp_team_start): Change last argument from ws to team, don't create
+	new team, set ts.work_share to &team->work_shares[0] and clear
+	ts.last_work_share.  Don't clear ts.work_share_generation.
+	(gomp_team_end): Call gomp_fini_work_share.
+	* work.c (gomp_new_work_share): Removed.
+	(alloc_work_share, gomp_init_work_share, gomp_fini_work_share): New
+	functions.
+	(free_work_share): Add team argument.  Call gomp_fini_work_share
+	and then either free ws if orphaned, or put it into
+	work_share_list_free list of the current team.
+	(gomp_work_share_start, gomp_work_share_end,
+	gomp_work_share_end_nowait): Rewritten.
+	* sections.c (GOMP_sections_start): Call gomp_work_share_init_done
+	after gomp_sections_init.  If HAVE_SYNC_BUILTINS, call
+	gomp_iter_dynamic_next instead of the _locked variant and don't take
+	lock around it, otherwise acquire it before calling
+	gomp_iter_dynamic_next_locked.
+	(GOMP_sections_next): If HAVE_SYNC_BUILTINS, call
+	gomp_iter_dynamic_next instead of the _locked variant and don't take
+	lock around it.
+	(GOMP_parallel_sections_start): Call gomp_new_team instead of
+	gomp_new_work_share.  Call gomp_sections_init on &team->work_shares[0].
+	Adjust gomp_team_start caller.
+	* loop.c (gomp_loop_static_start, gomp_loop_ordered_static_start): Call
+	gomp_work_share_init_done after gomp_loop_init.  Don't unlock ws->lock.
+	(gomp_loop_dynamic_start, gomp_loop_guided_start): Call
+	gomp_work_share_init_done after gomp_loop_init.  If HAVE_SYNC_BUILTINS,
+	don't unlock ws->lock, otherwise lock it.
+	(gomp_loop_ordered_dynamic_start, gomp_loop_ordered_guided_start): Call
+	gomp_work_share_init_done after gomp_loop_init.  Lock ws->lock.
+	(gomp_parallel_loop_start): Call gomp_new_team instead of
+	gomp_new_work_share.  Call gomp_loop_init on &team->work_shares[0].
+	Adjust gomp_team_start caller.
+	* single.c (GOMP_single_start, GOMP_single_copy_start): Call
+	gomp_work_share_init_done if gomp_work_share_start returned true.
+	Don't unlock ws->lock.
+	* parallel.c (GOMP_parallel_start): Call gomp_new_team and pass that
+	as last argument to gomp_team_start.
+	* config/linux/ptrlock.c: New file.
+	* config/linux/ptrlock.h: New file.
+	* config/posix/ptrlock.c: New file.
+	* config/posix/ptrlock.h: New file.
+	* Makefile.am (libgomp_la_SOURCES): Add ptrlock.c.
+	* Makefile.in: Regenerated.
+	* testsuite/Makefile.in: Regenerated.
+
+2008-03-19  Jakub Jelinek  <jakub@redhat.com>
+
+	* libgomp.h (gomp_active_wait_policy): Remove decl.
+	(gomp_throttled_spin_count_var, gomp_available_cpus,
+	gomp_managed_threads): New extern decls.
+	* team.c (gomp_team_start, gomp_team_end): If number of threads
+	changed, adjust atomically gomp_managed_threads.
+	* env.c (gomp_active_wait_policy, gomp_block_time_var): Remove.
+	(gomp_throttled_spin_count_var, gomp_available_cpus,
+	gomp_managed_threads): New variables.
+	(parse_millis): Removed.
+	(parse_spincount): New function.
+	(parse_wait_policy): Return -1/0/1 instead of setting
+	gomp_active_wait_policy.
+	(initialize_env): Call gomp_init_num_threads unconditionally.
+	Initialize gomp_available_cpus.  Call parse_spincount instead
+	of parse_millis, initialize gomp_{,throttled_}spin_count_var
+	depending on presence and value of OMP_WAIT_POLICY and
+	GOMP_SPINCOUNT env vars.
+	* config/linux/wait.h (do_wait): Use gomp_throttled_spin_count_var
+	instead of gomp_spin_count_var if gomp_managed_threads >
+	gomp_available_cpus.
+
+	* config/linux/wait.h: Include errno.h.
+	(FUTEX_WAIT, FUTEX_WAKE, FUTEX_PRIVATE_FLAG): Define.
+	(gomp_futex_wake, gomp_futex_wait): New extern decls.
+	* config/linux/mutex.c (gomp_futex_wake, gomp_futex_wait): New
+	variables.
+	* config/linux/powerpc/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(sys_futex0): Return error code.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+	* config/linux/alpha/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+	* config/linux/x86/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(sys_futex0): Return error code.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+	* config/linux/s390/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(sys_futex0): Return error code.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+	* config/linux/ia64/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(sys_futex0): Return error code.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+	* config/linux/sparc/futex.h (FUTEX_WAIT, FUTEX_WAKE): Remove.
+	(sys_futex0): Return error code.
+	(futex_wake, futex_wait): If ENOSYS was returned, clear
+	FUTEX_PRIVATE_FLAG in gomp_futex_wa{ke,it} and retry.
+
+2008-03-18  Jakub Jelinek  <jakub@redhat.com>
+
+	* libgomp.h (struct gomp_work_share): Add mode field.  Put lock and
+	next into a different cache line from most of the write-once fields.
+	* loop.c: Include limits.h.
+	(gomp_loop_init): For GFS_DYNAMIC, multiply ws->chunk_size by incr.
+	If adding ws->chunk_size nthreads + 1 times after end won't
+	overflow, set ws->mode to 1.
+	* iter.c (gomp_iter_dynamic_next_locked): Don't multiply
+	ws->chunk_size by incr.
+	(gomp_iter_dynamic_next): Likewise.  If ws->mode, use more efficient
+	code.
+	* work.c: Include stddef.h.
+	(gomp_new_work_share): Use offsetof rather than sizeof.
+
+2008-03-17  Jakub Jelinek  <jakub@redhat.com>
+
+	* libgomp.h (struct gomp_team): Change ordered_release field
+	into gomp_sem_t ** from flexible array member.  Add implicit_task
+	and initial_work_shares fields.
+	(gomp_new_task): Removed.
+	(gomp_init_task): New prototype.
+	* team.c (new_team): Allocate implicit_task for each thread
+	and initial work_shares together with gomp_team allocation.
+	(free_team): Only free work_shares if it is not init_work_shares.
+	(gomp_team_start): Use gomp_init_task instead of gomp_new_task,
+	set thr->task to the corresponding implicit_task array entry.
+	* task.c (gomp_new_task): Removed.
+	(gomp_init_task): New function.
+	(gomp_end_task): Don't free the task.
+	(GOMP_task): Allocate struct gomp_task on the stack, call
+	gomp_init_task rather than gomp_new_task.
+	* work.c (gomp_work_share_start): If work_shares ==
+	init_work_shares, gomp_malloc + memcpy rather than gomp_realloc.
+
+2008-03-15  Jakub Jelinek  <jakub@redhat.com>
+	    Ulrich Drepper  <drepper@redhat.com>
+
+	* config/linux/bar.h (gomp_barrier_state_t): Rewritten.
+	(gomp_barrier_state_t): Change to unsigned int.
+	(gomp_barrier_init, gomp_barrier_reinit, gomp_barrier_destroy,
+	gomp_barrier_wait_start, gomp_barrier_last_thread): Rewritten.
+	(gomp_barrier_wait_last): Prototype rather than inline.
+	* config/linux/bar.c (gomp_barrier_wait_end): Rewritten.
+	(gomp_barrier_wait_last): New function.
+
+2008-03-15  Jakub Jelinek  <jakub@redhat.com>
+
+	* team.c (gomp_thread_start): Use gomp_barrier_wait_last instead
+	of gomp_barrier_wait.
+	* env.c (gomp_block_time_var, gomp_spin_count_var): New variables.
+	(parse_millis): New function.
+	(initialize_env): Handle GOMP_BLOCKTIME env var.
+	* libgomp.h (struct gomp_team): Move close to the end of the struct.
+	(gomp_spin_count_var): New extern var decl.
+	* work.c (gomp_work_share_end): Use gomp_barrier_state_t bstate
+	var instead of bool last, call gomp_barrier_last_thread to check
+	for last thread, pass bstate to gomp_barrier_wait_end.
+	* config/linux/wait.h: New file.
+	* config/linux/mutex.c: Include wait.h instead of libgomp.h and
+	futex.h.
+	(gomp_mutex_lock_slow): Call do_wait instead of futex_wait.
+	* config/linux/bar.c: Include wait.h instead of libgomp.h and
+	futex.h.
+	(gomp_barrier_wait_end): Change second argument to
+	gomp_barrier_state_t.  Call do_wait instead of futex_wait.
+	* config/linux/sem.c: Include wait.h instead of libgomp.h and
+	futex.h.
+	(gomp_sem_wait_slow): Call do_wait instead of futex_wait.
+	* config/linux/lock.c: Include wait.h instead of libgomp.h and
+	futex.h.
+	(gomp_set_nest_lock_25): Call do_wait instead of futex_wait.
+	* config/linux/affinity.c: Assume HAVE_SYNC_BUILTINS.
+	* config/linux/bar.h (gomp_barrier_state_t): New typedef.
+	(gomp_barrier_wait_end): Change second argument to
+	gomp_barrier_state_t.
+	(gomp_barrier_wait_start): Return gomp_barrier_state_t.
+	(gomp_barrier_last_thread, gomp_barrier_wait_last): New static
+	inlines.
+	* config/linux/powerpc/futex.h (cpu_relax, atomic_write_barrier): New
+	static inlines.
+	* config/linux/alpha/futex.h (cpu_relax, atomic_write_barrier):
+	Likewise.
+	* config/linux/x86/futex.h (cpu_relax, atomic_write_barrier):
+	Likewise.
+	* config/linux/s390/futex.h (cpu_relax, atomic_write_barrier):
+	Likewise.
+	* config/linux/ia64/futex.h (cpu_relax, atomic_write_barrier):
+	Likewise.
+	* config/linux/sparc/futex.h (cpu_relax, atomic_write_barrier):
+	Likewise.
+	* config/posix/bar.c (gomp_barrier_wait_end): Change second argument
+	to gomp_barrier_state_t.
+	* config/posix/bar.h (gomp_barrier_state_t): New typedef.
+	(gomp_barrier_wait_end): Change second argument to
+	gomp_barrier_state_t.
+	(gomp_barrier_wait_start): Return gomp_barrier_state_t.
+	(gomp_barrier_last_thread, gomp_barrier_wait_last): New static
+	inlines.
+
+--- libgomp/parallel.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/parallel.c	2008-03-26 15:32:06.000000000 +0100
+@@ -68,7 +68,7 @@ void
+ GOMP_parallel_start (void (*fn) (void *), void *data, unsigned num_threads)
+ {
+   num_threads = gomp_resolve_num_threads (num_threads);
+-  gomp_team_start (fn, data, num_threads, NULL);
++  gomp_team_start (fn, data, num_threads, gomp_new_team (num_threads));
+ }
+ 
+ void
+--- libgomp/sections.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/sections.c	2008-03-26 15:33:06.000000000 +0100
+@@ -59,14 +59,24 @@ GOMP_sections_start (unsigned count)
+   long s, e, ret;
+ 
+   if (gomp_work_share_start (false))
+-    gomp_sections_init (thr->ts.work_share, count);
++    {
++      gomp_sections_init (thr->ts.work_share, count);
++      gomp_work_share_init_done ();
++    }
+ 
++#ifdef HAVE_SYNC_BUILTINS
++  if (gomp_iter_dynamic_next (&s, &e))
++    ret = s;
++  else
++    ret = 0;
++#else
++  gomp_mutex_lock (&thr->ts.work_share->lock);
+   if (gomp_iter_dynamic_next_locked (&s, &e))
+     ret = s;
+   else
+     ret = 0;
+-
+   gomp_mutex_unlock (&thr->ts.work_share->lock);
++#endif
+ 
+   return ret;
+ }
+@@ -83,15 +93,23 @@ GOMP_sections_start (unsigned count)
+ unsigned
+ GOMP_sections_next (void)
+ {
+-  struct gomp_thread *thr = gomp_thread ();
+   long s, e, ret;
+ 
++#ifdef HAVE_SYNC_BUILTINS
++  if (gomp_iter_dynamic_next (&s, &e))
++    ret = s;
++  else
++    ret = 0;
++#else
++  struct gomp_thread *thr = gomp_thread ();
++
+   gomp_mutex_lock (&thr->ts.work_share->lock);
+   if (gomp_iter_dynamic_next_locked (&s, &e))
+     ret = s;
+   else
+     ret = 0;
+   gomp_mutex_unlock (&thr->ts.work_share->lock);
++#endif
+ 
+   return ret;
+ }
+@@ -103,15 +121,15 @@ void
+ GOMP_parallel_sections_start (void (*fn) (void *), void *data,
+ 			      unsigned num_threads, unsigned count)
+ {
+-  struct gomp_work_share *ws;
++  struct gomp_team *team;
+ 
+   num_threads = gomp_resolve_num_threads (num_threads);
+   if (gomp_dyn_var && num_threads > count)
+     num_threads = count;
+ 
+-  ws = gomp_new_work_share (false, num_threads);
+-  gomp_sections_init (ws, count);
+-  gomp_team_start (fn, data, num_threads, ws);
++  team = gomp_new_team (num_threads);
++  gomp_sections_init (&team->work_shares[0], count);
++  gomp_team_start (fn, data, num_threads, team);
+ }
+ 
+ /* The GOMP_section_end* routines are called after the thread is told
+--- libgomp/env.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/env.c	2008-03-26 16:40:26.000000000 +0100
+@@ -44,6 +44,11 @@ enum gomp_schedule_type gomp_run_sched_v
+ unsigned long gomp_run_sched_chunk = 1;
+ unsigned short *gomp_cpu_affinity;
+ size_t gomp_cpu_affinity_len;
++#ifndef HAVE_SYNC_BUILTINS
++gomp_mutex_t gomp_remaining_threads_lock;
++#endif
++unsigned long gomp_available_cpus = 1, gomp_managed_threads = 1;
++unsigned long long gomp_spin_count_var, gomp_throttled_spin_count_var;
+ 
+ /* Parse the OMP_SCHEDULE environment variable.  */
+ 
+@@ -147,6 +152,79 @@ parse_unsigned_long (const char *name, u
+   return false;
+ }
+ 
++/* Parse the GOMP_SPINCOUNT environment varible.  Return true if one was
++   present and it was successfully parsed.  */
++
++static bool
++parse_spincount (const char *name, unsigned long long *pvalue)
++{
++  char *env, *end;
++  unsigned long long value, mult = 1;
++
++  env = getenv (name);
++  if (env == NULL)
++    return false;
++
++  while (isspace ((unsigned char) *env))
++    ++env;
++  if (*env == '\0')
++    goto invalid;
++
++  if (strncasecmp (env, "infinite", 8) == 0
++      || strncasecmp (env, "infinity", 8) == 0)
++    {
++      value = ~0ULL;
++      end = env + 8;
++      goto check_tail;
++    }
++
++  errno = 0;
++  value = strtoull (env, &end, 10);
++  if (errno)
++    goto invalid;
++
++  while (isspace ((unsigned char) *end))
++    ++end;
++  if (*end != '\0')
++    {
++      switch (tolower (*end))
++	{
++	case 'k':
++	  mult = 1000LL;
++	  break;
++	case 'm':
++	  mult = 1000LL * 1000LL;
++	  break;
++	case 'g':
++	  mult = 1000LL * 1000LL * 1000LL;
++	  break;
++	case 't':
++	  mult = 1000LL * 1000LL * 1000LL * 1000LL;
++	  break;
++	default:
++	  goto invalid;
++	}
++      ++end;
++     check_tail:
++      while (isspace ((unsigned char) *end))
++	++end;
++      if (*end != '\0')
++	goto invalid;
++    }
++
++  if (value > ~0ULL / mult)
++    value = ~0ULL;
++  else
++    value *= mult;
++
++  *pvalue = value;
++  return true;
++
++ invalid:
++  gomp_error ("Invalid value for environment variable %s", name);
++  return false;
++}
++
+ /* Parse a boolean value for environment variable NAME and store the 
+    result in VALUE.  */
+ 
+@@ -281,10 +359,25 @@ initialize_env (void)
+   parse_schedule ();
+   parse_boolean ("OMP_DYNAMIC", &gomp_dyn_var);
+   parse_boolean ("OMP_NESTED", &gomp_nest_var);
++  gomp_init_num_threads ();
++  gomp_available_cpus = gomp_nthreads_var;
+   if (!parse_unsigned_long ("OMP_NUM_THREADS", &gomp_nthreads_var))
+-    gomp_init_num_threads ();
++    gomp_nthreads_var = gomp_available_cpus;
+   if (parse_affinity ())
+     gomp_init_affinity ();
++  if (!parse_spincount ("GOMP_SPINCOUNT", &gomp_spin_count_var))
++    {
++      /* Using a rough estimation of 100000 spins per msec,
++	 use 200 msec blocking.
++	 Depending on the CPU speed, this can be e.g. 5 times longer
++	 or 5 times shorter.  */
++      gomp_spin_count_var = 20000000LL;
++    }
++  /* gomp_throttled_spin_count_var is used when there are more libgomp
++     managed threads than available CPUs.  Use very short spinning.  */
++  gomp_throttled_spin_count_var = 100LL;
++  if (gomp_throttled_spin_count_var > gomp_spin_count_var)
++    gomp_throttled_spin_count_var = gomp_spin_count_var;
+ 
+   /* Not strictly environment related, but ordering constructors is tricky.  */
+   pthread_attr_init (&gomp_thread_attr);
+--- libgomp/libgomp.h.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/libgomp.h	2008-03-27 12:21:51.000000000 +0100
+@@ -50,6 +50,7 @@
+ #include "sem.h"
+ #include "mutex.h"
+ #include "bar.h"
++#include "ptrlock.h"
+ 
+ 
+ /* This structure contains the data to control one work-sharing construct,
+@@ -70,6 +71,8 @@ struct gomp_work_share
+      If this is a SECTIONS construct, this value will always be DYNAMIC.  */
+   enum gomp_schedule_type sched;
+ 
++  int mode;
++
+   /* This is the chunk_size argument to the SCHEDULE clause.  */
+   long chunk_size;
+ 
+@@ -81,17 +84,38 @@ struct gomp_work_share
+      is always 1.  */
+   long incr;
+ 
+-  /* This lock protects the update of the following members.  */
+-  gomp_mutex_t lock;
++  /* This is a circular queue that details which threads will be allowed
++     into the ordered region and in which order.  When a thread allocates
++     iterations on which it is going to work, it also registers itself at
++     the end of the array.  When a thread reaches the ordered region, it
++     checks to see if it is the one at the head of the queue.  If not, it
++     blocks on its RELEASE semaphore.  */
++  unsigned *ordered_team_ids;
+ 
+-  union {
+-    /* This is the next iteration value to be allocated.  In the case of
+-       GFS_STATIC loops, this the iteration start point and never changes.  */
+-    long next;
++  /* This is the number of threads that have registered themselves in
++     the circular queue ordered_team_ids.  */
++  unsigned ordered_num_used;
+ 
+-    /* This is the returned data structure for SINGLE COPYPRIVATE.  */
+-    void *copyprivate;
+-  };
++  /* This is the team_id of the currently acknowledged owner of the ordered
++     section, or -1u if the ordered section has not been acknowledged by
++     any thread.  This is distinguished from the thread that is *allowed*
++     to take the section next.  */
++  unsigned ordered_owner;
++
++  /* This is the index into the circular queue ordered_team_ids of the
++     current thread that's allowed into the ordered reason.  */
++  unsigned ordered_cur;
++
++  /* This is a chain of allocated gomp_work_share blocks, valid only
++     in the first gomp_work_share struct in the block.  */
++  struct gomp_work_share *next_alloc;
++
++  /* The above fields are written once during workshare initialization,
++     or related to ordered worksharing.  Make sure the following fields
++     are in a different cache line.  */
++
++  /* This lock protects the update of the following members.  */
++  gomp_mutex_t lock __attribute__((aligned (64)));
+ 
+   /* This is the count of the number of threads that have exited the work
+      share construct.  If the construct was marked nowait, they have moved on
+@@ -99,27 +123,28 @@ struct gomp_work_share
+      of the team to exit the work share construct must deallocate it.  */
+   unsigned threads_completed;
+ 
+-  /* This is the index into the circular queue ordered_team_ids of the 
+-     current thread that's allowed into the ordered reason.  */
+-  unsigned ordered_cur;
++  union {
++    /* This is the next iteration value to be allocated.  In the case of
++       GFS_STATIC loops, this the iteration start point and never changes.  */
++    long next;
+ 
+-  /* This is the number of threads that have registered themselves in
+-     the circular queue ordered_team_ids.  */
+-  unsigned ordered_num_used;
++    /* This is the returned data structure for SINGLE COPYPRIVATE.  */
++    void *copyprivate;
++  };
+ 
+-  /* This is the team_id of the currently acknoledged owner of the ordered
+-     section, or -1u if the ordered section has not been acknowledged by
+-     any thread.  This is distinguished from the thread that is *allowed*
+-     to take the section next.  */
+-  unsigned ordered_owner;
++  union {
++    /* Link to gomp_work_share struct for next work sharing construct
++       encountered after this one.  */
++    gomp_ptrlock_t next_ws;
++
++    /* gomp_work_share structs are chained in the free work share cache
++       through this.  */
++    struct gomp_work_share *next_free;
++  };
+ 
+-  /* This is a circular queue that details which threads will be allowed
+-     into the ordered region and in which order.  When a thread allocates
+-     iterations on which it is going to work, it also registers itself at
+-     the end of the array.  When a thread reaches the ordered region, it
+-     checks to see if it is the one at the head of the queue.  If not, it
+-     blocks on its RELEASE semaphore.  */
+-  unsigned ordered_team_ids[];
++  /* If only few threads are in the team, ordered_team_ids can point
++     to this array which fills the padding at the end of this struct.  */
++  unsigned inline_ordered_team_ids[0];
+ };
+ 
+ /* This structure contains all of the thread-local data associated with 
+@@ -133,21 +158,24 @@ struct gomp_team_state
+ 
+   /* This is the work share construct which this thread is currently
+      processing.  Recall that with NOWAIT, not all threads may be 
+-     processing the same construct.  This value is NULL when there
+-     is no construct being processed.  */
++     processing the same construct.  */
+   struct gomp_work_share *work_share;
+ 
++  /* This is the previous work share construct or NULL if there wasn't any.
++     When all threads are done with the current work sharing construct,
++     the previous one can be freed.  The current one can't, as its
++     next_ws field is used.  */
++  struct gomp_work_share *last_work_share;
++
+   /* This is the ID of this thread within the team.  This value is
+      guaranteed to be between 0 and N-1, where N is the number of
+      threads in the team.  */
+   unsigned team_id;
+ 
+-  /* The work share "generation" is a number that increases by one for
+-     each work share construct encountered in the dynamic flow of the
+-     program.  It is used to find the control data for the work share
+-     when encountering it for the first time.  This particular number
+-     reflects the generation of the work_share member of this struct.  */
+-  unsigned work_share_generation;
++#ifdef HAVE_SYNC_BUILTINS
++  /* Number of single stmts encountered.  */
++  unsigned long single_count;
++#endif
+ 
+   /* For GFS_RUNTIME loops that resolved to GFS_STATIC, this is the
+      trip number through the loop.  So first time a particular loop
+@@ -163,41 +191,53 @@ struct gomp_team_state
+ 
+ struct gomp_team
+ {
+-  /* This lock protects access to the following work shares data structures.  */
+-  gomp_mutex_t work_share_lock;
+-
+-  /* This is a dynamically sized array containing pointers to the control
+-     structs for all "live" work share constructs.  Here "live" means that
+-     the construct has been encountered by at least one thread, and not
+-     completed by all threads.  */
+-  struct gomp_work_share **work_shares;
+-
+-  /* The work_shares array is indexed by "generation & generation_mask".
+-     The mask will be 2**N - 1, where 2**N is the size of the array.  */
+-  unsigned generation_mask;
+-
+-  /* These two values define the bounds of the elements of the work_shares
+-     array that are currently in use.  */
+-  unsigned oldest_live_gen;
+-  unsigned num_live_gen;
+-
+   /* This is the number of threads in the current team.  */
+   unsigned nthreads;
+ 
++  /* This is number of gomp_work_share structs that have been allocated
++     as a block last time.  */
++  unsigned work_share_chunk;
++
+   /* This is the saved team state that applied to a master thread before
+      the current thread was created.  */
+   struct gomp_team_state prev_ts;
+ 
+-  /* This barrier is used for most synchronization of the team.  */
+-  gomp_barrier_t barrier;
+-
+   /* This semaphore should be used by the master thread instead of its
+      "native" semaphore in the thread structure.  Required for nested
+      parallels, as the master is a member of two teams.  */
+   gomp_sem_t master_release;
+ 
+-  /* This array contains pointers to the release semaphore of the threads
+-     in the team.  */
++  /* List of gomp_work_share structs chained through next_free fields.
++     This is populated and taken off only by the first thread in the
++     team encountering a new work sharing construct, in a critical
++     section.  */
++  struct gomp_work_share *work_share_list_alloc;
++
++  /* List of gomp_work_share structs freed by free_work_share.  New
++     entries are atomically added to the start of the list, and
++     alloc_work_share can safely only move all but the first entry
++     to work_share_list alloc, as free_work_share can happen concurrently
++     with alloc_work_share.  */
++  struct gomp_work_share *work_share_list_free;
++
++#ifdef HAVE_SYNC_BUILTINS
++  /* Number of simple single regions encountered by threads in this
++     team.  */
++  unsigned long single_count;
++#else
++  /* Mutex protecting addition of workshares to work_share_list_free.  */
++  gomp_mutex_t work_share_list_free_lock;
++#endif
++
++  /* This barrier is used for most synchronization of the team.  */
++  gomp_barrier_t barrier;
++
++  /* Initial work shares, to avoid allocating any gomp_work_share
++     structs in the common case.  */
++  struct gomp_work_share work_shares[8];
++
++  /* This is an array with pointers to the release semaphore
++     of the threads in the team.  */
+   gomp_sem_t *ordered_release[];
+ };
+ 
+@@ -242,6 +282,11 @@ extern bool gomp_dyn_var;
+ extern bool gomp_nest_var;
+ extern enum gomp_schedule_type gomp_run_sched_var;
+ extern unsigned long gomp_run_sched_chunk;
++#ifndef HAVE_SYNC_BUILTINS
++extern gomp_mutex_t gomp_remaining_threads_lock;
++#endif
++extern unsigned long long gomp_spin_count_var, gomp_throttled_spin_count_var;
++extern unsigned long gomp_available_cpus, gomp_managed_threads;
+ 
+ /* The attributes to be used during thread creation.  */
+ extern pthread_attr_t gomp_thread_attr;
+@@ -306,17 +351,27 @@ extern unsigned gomp_dynamic_max_threads
+ 
+ /* team.c */
+ 
++extern struct gomp_team *gomp_new_team (unsigned);
+ extern void gomp_team_start (void (*) (void *), void *, unsigned,
+-			     struct gomp_work_share *);
++			     struct gomp_team *);
+ extern void gomp_team_end (void);
+ 
+ /* work.c */
+ 
+-extern struct gomp_work_share * gomp_new_work_share (bool, unsigned);
++extern void gomp_init_work_share (struct gomp_work_share *, bool, unsigned);
++extern void gomp_fini_work_share (struct gomp_work_share *);
+ extern bool gomp_work_share_start (bool);
+ extern void gomp_work_share_end (void);
+ extern void gomp_work_share_end_nowait (void);
+ 
++static inline void
++gomp_work_share_init_done (void)
++{
++  struct gomp_thread *thr = gomp_thread ();
++  if (__builtin_expect (thr->ts.last_work_share != NULL, 1))
++    gomp_ptrlock_set (&thr->ts.last_work_share->next_ws, thr->ts.work_share);
++}
++
+ #ifdef HAVE_ATTRIBUTE_VISIBILITY
+ # pragma GCC visibility pop
+ #endif
+--- libgomp/iter.c.jj	2008-03-26 14:48:34.000000000 +0100
++++ libgomp/iter.c	2008-03-26 15:11:23.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -154,7 +154,7 @@ gomp_iter_dynamic_next_locked (long *pst
+   if (start == ws->end)
+     return false;
+ 
+-  chunk = ws->chunk_size * ws->incr;
++  chunk = ws->chunk_size;
+   left = ws->end - start;
+   if (ws->incr < 0)
+     {
+@@ -186,11 +186,38 @@ gomp_iter_dynamic_next (long *pstart, lo
+   struct gomp_work_share *ws = thr->ts.work_share;
+   long start, end, nend, chunk, incr;
+ 
+-  start = ws->next;
+   end = ws->end;
+   incr = ws->incr;
+-  chunk = ws->chunk_size * incr;
++  chunk = ws->chunk_size;
++
++  if (__builtin_expect (ws->mode, 1))
++    {
++      long tmp = __sync_fetch_and_add (&ws->next, chunk);
++      if (incr > 0)
++	{
++	  if (tmp >= end)
++	    return false;
++	  nend = tmp + chunk;
++	  if (nend > end)
++	    nend = end;
++	  *pstart = tmp;
++	  *pend = nend;
++	  return true;
++	}
++      else
++	{
++	  if (tmp <= end)
++	    return false;
++	  nend = tmp + chunk;
++	  if (nend < end)
++	    nend = end;
++	  *pstart = tmp;
++	  *pend = nend;
++	  return true;
++	}
++    }
+ 
++  start = ws->next;
+   while (1)
+     {
+       long left = end - start;
+--- libgomp/work.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/work.c	2008-03-27 12:21:51.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -29,39 +29,138 @@
+    of threads.  */
+ 
+ #include "libgomp.h"
++#include <stddef.h>
+ #include <stdlib.h>
+ #include <string.h>
+ 
+ 
+-/* Create a new work share structure.  */
++/* Allocate a new work share structure, preferably from current team's
++   free gomp_work_share cache.  */
+ 
+-struct gomp_work_share *
+-gomp_new_work_share (bool ordered, unsigned nthreads)
++static struct gomp_work_share *
++alloc_work_share (struct gomp_team *team)
+ {
+   struct gomp_work_share *ws;
+-  size_t size;
++  unsigned int i;
+ 
+-  size = sizeof (*ws);
+-  if (ordered)
+-    size += nthreads * sizeof (ws->ordered_team_ids[0]);
++  /* This is called in a critical section.  */
++  if (team->work_share_list_alloc != NULL)
++    {
++      ws = team->work_share_list_alloc;
++      team->work_share_list_alloc = ws->next_free;
++      return ws;
++    }
+ 
+-  ws = gomp_malloc_cleared (size);
+-  gomp_mutex_init (&ws->lock);
+-  ws->ordered_owner = -1;
++#ifdef HAVE_SYNC_BUILTINS
++  ws = team->work_share_list_free;
++  /* We need atomic read from work_share_list_free,
++     as free_work_share can be called concurrently.  */
++  __asm ("" : "+r" (ws));
++
++  if (ws && ws->next_free)
++    {
++      struct gomp_work_share *next = ws->next_free;
++      ws->next_free = NULL;
++      team->work_share_list_alloc = next->next_free;
++      return next;
++    }
++#else
++  gomp_mutex_lock (&team->work_share_list_free_lock);
++  ws = team->work_share_list_free;
++  if (ws)
++    {
++      team->work_share_list_alloc = ws->next_free;
++      team->work_share_list_free = NULL;
++      gomp_mutex_unlock (&team->work_share_list_free_lock);
++      return ws;
++    }
++  gomp_mutex_unlock (&team->work_share_list_free_lock);
++#endif
+ 
++  team->work_share_chunk *= 2;
++  ws = gomp_malloc (team->work_share_chunk * sizeof (struct gomp_work_share));
++  ws->next_alloc = team->work_shares[0].next_alloc;
++  team->work_shares[0].next_alloc = ws;
++  team->work_share_list_alloc = &ws[1];
++  for (i = 1; i < team->work_share_chunk - 1; i++)
++    ws[i].next_free = &ws[i + 1];
++  ws[i].next_free = NULL;
+   return ws;
+ }
+ 
++/* Initialize an already allocated struct gomp_work_share.
++   This shouldn't touch the next_alloc field.  */
++
++void
++gomp_init_work_share (struct gomp_work_share *ws, bool ordered,
++		      unsigned nthreads)
++{
++  gomp_mutex_init (&ws->lock);
++  if (__builtin_expect (ordered, 0))
++    {
++#define INLINE_ORDERED_TEAM_IDS_CNT \
++  ((sizeof (struct gomp_work_share) \
++    - offsetof (struct gomp_work_share, inline_ordered_team_ids)) \
++   / sizeof (((struct gomp_work_share *) 0)->inline_ordered_team_ids[0]))
++
++      if (nthreads > INLINE_ORDERED_TEAM_IDS_CNT)
++	ws->ordered_team_ids
++	  = gomp_malloc (nthreads * sizeof (*ws->ordered_team_ids));
++      else
++	ws->ordered_team_ids = ws->inline_ordered_team_ids;
++      memset (ws->ordered_team_ids, '\0',
++	      nthreads * sizeof (*ws->ordered_team_ids));
++      ws->ordered_num_used = 0;
++      ws->ordered_owner = -1;
++      ws->ordered_cur = 0;
++    }
++  else
++    ws->ordered_team_ids = NULL;
++  gomp_ptrlock_init (&ws->next_ws, NULL);
++  ws->threads_completed = 0;
++}
+ 
+-/* Free a work share structure.  */
++/* Do any needed destruction of gomp_work_share fields before it
++   is put back into free gomp_work_share cache or freed.  */
+ 
+-static void
+-free_work_share (struct gomp_work_share *ws)
++void
++gomp_fini_work_share (struct gomp_work_share *ws)
+ {
+   gomp_mutex_destroy (&ws->lock);
+-  free (ws);
++  if (ws->ordered_team_ids != ws->inline_ordered_team_ids)
++    free (ws->ordered_team_ids);
++  gomp_ptrlock_destroy (&ws->next_ws);
+ }
+ 
++/* Free a work share struct, if not orphaned, put it into current
++   team's free gomp_work_share cache.  */
++
++static inline void
++free_work_share (struct gomp_team *team, struct gomp_work_share *ws)
++{
++  gomp_fini_work_share (ws);
++  if (__builtin_expect (team == NULL, 0))
++    free (ws);
++  else
++    {
++      struct gomp_work_share *next_ws;
++#ifdef HAVE_SYNC_BUILTINS
++      do
++	{
++	  next_ws = team->work_share_list_free;
++	  ws->next_free = next_ws;
++	}
++      while (!__sync_bool_compare_and_swap (&team->work_share_list_free,
++					    next_ws, ws));
++#else
++      gomp_mutex_lock (&team->work_share_list_free_lock);
++      next_ws = team->work_share_list_free;
++      ws->next_free = next_ws;
++      team->work_share_list_free = ws;
++      gomp_mutex_unlock (&team->work_share_list_free_lock);
++#endif
++    }
++}
+ 
+ /* The current thread is ready to begin the next work sharing construct.
+    In all cases, thr->ts.work_share is updated to point to the new
+@@ -74,71 +173,34 @@ gomp_work_share_start (bool ordered)
+   struct gomp_thread *thr = gomp_thread ();
+   struct gomp_team *team = thr->ts.team;
+   struct gomp_work_share *ws;
+-  unsigned ws_index, ws_gen;
+ 
+   /* Work sharing constructs can be orphaned.  */
+   if (team == NULL)
+     {
+-      ws = gomp_new_work_share (ordered, 1);
++      ws = gomp_malloc (sizeof (*ws));
++      gomp_init_work_share (ws, ordered, 1);
+       thr->ts.work_share = ws;
+-      thr->ts.static_trip = 0;
+-      gomp_mutex_lock (&ws->lock);
+-      return true;
++      return ws;
+     }
+ 
+-  gomp_mutex_lock (&team->work_share_lock);
+-
+-  /* This thread is beginning its next generation.  */
+-  ws_gen = ++thr->ts.work_share_generation;
+-
+-  /* If this next generation is not newer than any other generation in
+-     the team, then simply reference the existing construct.  */
+-  if (ws_gen - team->oldest_live_gen < team->num_live_gen)
++  ws = thr->ts.work_share;
++  thr->ts.last_work_share = ws;
++  ws = gomp_ptrlock_get (&ws->next_ws);
++  if (ws == NULL)
+     {
+-      ws_index = ws_gen & team->generation_mask;
+-      ws = team->work_shares[ws_index];
++      /* This thread encountered a new ws first.  */
++      struct gomp_work_share *ws = alloc_work_share (team);
++      gomp_init_work_share (ws, ordered, team->nthreads);
+       thr->ts.work_share = ws;
+-      thr->ts.static_trip = 0;
+-
+-      gomp_mutex_lock (&ws->lock);
+-      gomp_mutex_unlock (&team->work_share_lock);
+-
+-      return false;
++      return true;
+     }
+-
+-  /* Resize the work shares queue if we've run out of space.  */
+-  if (team->num_live_gen++ == team->generation_mask)
++  else
+     {
+-      team->work_shares = gomp_realloc (team->work_shares,
+-					2 * team->num_live_gen
+-					* sizeof (*team->work_shares));
+-
+-      /* Unless oldest_live_gen is zero, the sequence of live elements
+-	 wraps around the end of the array.  If we do nothing, we break
+-	 lookup of the existing elements.  Fix that by unwrapping the
+-	 data from the front to the end.  */
+-      if (team->oldest_live_gen > 0)
+-	memcpy (team->work_shares + team->num_live_gen,
+-		team->work_shares,
+-		(team->oldest_live_gen & team->generation_mask)
+-		* sizeof (*team->work_shares));
+-
+-      team->generation_mask = team->generation_mask * 2 + 1;
+-    }
+-
+-  ws_index = ws_gen & team->generation_mask;
+-  ws = gomp_new_work_share (ordered, team->nthreads);
+-  thr->ts.work_share = ws;
+-  thr->ts.static_trip = 0;
+-  team->work_shares[ws_index] = ws;
+-
+-  gomp_mutex_lock (&ws->lock);
+-  gomp_mutex_unlock (&team->work_share_lock);
+-
+-  return true;
++      thr->ts.work_share = ws;
++      return false;
++    }
+ }
+ 
+-
+ /* The current thread is done with its current work sharing construct.
+    This version does imply a barrier at the end of the work-share.  */
+ 
+@@ -147,36 +209,28 @@ gomp_work_share_end (void)
+ {
+   struct gomp_thread *thr = gomp_thread ();
+   struct gomp_team *team = thr->ts.team;
+-  struct gomp_work_share *ws = thr->ts.work_share;
+-  bool last;
+-
+-  thr->ts.work_share = NULL;
++  gomp_barrier_state_t bstate;
+ 
+   /* Work sharing constructs can be orphaned.  */
+   if (team == NULL)
+     {
+-      free_work_share (ws);
++      free_work_share (NULL, thr->ts.work_share);
++      thr->ts.work_share = NULL;
+       return;
+     }
+ 
+-  last = gomp_barrier_wait_start (&team->barrier);
++  bstate = gomp_barrier_wait_start (&team->barrier);
+ 
+-  if (last)
++  if (gomp_barrier_last_thread (bstate))
+     {
+-      unsigned ws_index;
+-
+-      ws_index = thr->ts.work_share_generation & team->generation_mask;
+-      team->work_shares[ws_index] = NULL;
+-      team->oldest_live_gen++;
+-      team->num_live_gen = 0;
+-
+-      free_work_share (ws);
++      if (__builtin_expect (thr->ts.last_work_share != NULL, 1))
++	free_work_share (team, thr->ts.last_work_share);
+     }
+ 
+-  gomp_barrier_wait_end (&team->barrier, last);
++  gomp_barrier_wait_end (&team->barrier, bstate);
++  thr->ts.last_work_share = NULL;
+ }
+ 
+-
+ /* The current thread is done with its current work sharing construct.
+    This version does NOT imply a barrier at the end of the work-share.  */
+ 
+@@ -188,15 +242,17 @@ gomp_work_share_end_nowait (void)
+   struct gomp_work_share *ws = thr->ts.work_share;
+   unsigned completed;
+ 
+-  thr->ts.work_share = NULL;
+-
+   /* Work sharing constructs can be orphaned.  */
+   if (team == NULL)
+     {
+-      free_work_share (ws);
++      free_work_share (NULL, ws);
++      thr->ts.work_share = NULL;
+       return;
+     }
+ 
++  if (__builtin_expect (thr->ts.last_work_share == NULL, 0))
++    return;
++
+ #ifdef HAVE_SYNC_BUILTINS
+   completed = __sync_add_and_fetch (&ws->threads_completed, 1);
+ #else
+@@ -206,18 +262,6 @@ gomp_work_share_end_nowait (void)
+ #endif
+ 
+   if (completed == team->nthreads)
+-    {
+-      unsigned ws_index;
+-
+-      gomp_mutex_lock (&team->work_share_lock);
+-
+-      ws_index = thr->ts.work_share_generation & team->generation_mask;
+-      team->work_shares[ws_index] = NULL;
+-      team->oldest_live_gen++;
+-      team->num_live_gen--;
+-
+-      gomp_mutex_unlock (&team->work_share_lock);
+-
+-      free_work_share (ws);
+-    }
++    free_work_share (team, thr->ts.last_work_share);
++  thr->ts.last_work_share = NULL;
+ }
+--- libgomp/single.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/single.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -37,10 +37,24 @@
+ bool
+ GOMP_single_start (void)
+ {
++#ifdef HAVE_SYNC_BUILTINS
++  struct gomp_thread *thr = gomp_thread ();
++  struct gomp_team *team = thr->ts.team;
++  unsigned long single_count;
++
++  if (__builtin_expect (team == NULL, 0))
++    return true;
++
++  single_count = thr->ts.single_count++;
++  return __sync_bool_compare_and_swap (&team->single_count, single_count,
++				       single_count + 1L);
++#else
+   bool ret = gomp_work_share_start (false);
+-  gomp_mutex_unlock (&gomp_thread ()->ts.work_share->lock);
++  if (ret)
++    gomp_work_share_init_done ();
+   gomp_work_share_end_nowait ();
+   return ret;
++#endif
+ }
+ 
+ /* This routine is called when first encountering a SINGLE construct that
+@@ -57,10 +71,12 @@ GOMP_single_copy_start (void)
+   void *ret;
+ 
+   first = gomp_work_share_start (false);
+-  gomp_mutex_unlock (&thr->ts.work_share->lock);
+   
+   if (first)
+-    ret = NULL;
++    {
++      gomp_work_share_init_done ();
++      ret = NULL;
++    }
+   else
+     {
+       gomp_barrier_wait (&thr->ts.team->barrier);
+--- libgomp/loop.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/loop.c	2008-03-26 18:47:04.000000000 +0100
+@@ -27,8 +27,9 @@
+ 
+ /* This file handles the LOOP (FOR/DO) construct.  */
+ 
+-#include "libgomp.h"
++#include <limits.h>
+ #include <stdlib.h>
++#include "libgomp.h"
+ 
+ 
+ /* Initialize the given work share construct from the given arguments.  */
+@@ -44,6 +45,39 @@ gomp_loop_init (struct gomp_work_share *
+ 	    ? start : end;
+   ws->incr = incr;
+   ws->next = start;
++  if (sched == GFS_DYNAMIC)
++    {
++      ws->chunk_size *= incr;
++
++#ifdef HAVE_SYNC_BUILTINS
++      {
++	/* For dynamic scheduling prepare things to make each iteration
++	   faster.  */
++	struct gomp_thread *thr = gomp_thread ();
++	struct gomp_team *team = thr->ts.team;
++	long nthreads = team ? team->nthreads : 1;
++
++	if (__builtin_expect (incr > 0, 1))
++	  {
++	    /* Cheap overflow protection.  */
++	    if (__builtin_expect ((nthreads | ws->chunk_size)
++				  >= 1UL << (sizeof (long)
++					     * __CHAR_BIT__ / 2 - 1), 0))
++	      ws->mode = 0;
++	    else
++	      ws->mode = ws->end < (LONG_MAX
++				    - (nthreads + 1) * ws->chunk_size);
++	  }
++	/* Cheap overflow protection.  */
++	else if (__builtin_expect ((nthreads | -ws->chunk_size)
++				   >= 1UL << (sizeof (long)
++					      * __CHAR_BIT__ / 2 - 1), 0))
++	  ws->mode = 0;
++	else
++	  ws->mode = ws->end > (nthreads + 1) * -ws->chunk_size - LONG_MAX;
++      }
++#endif
++    }
+ }
+ 
+ /* The *_start routines are called when first encountering a loop construct
+@@ -68,10 +102,13 @@ gomp_loop_static_start (long start, long
+ {
+   struct gomp_thread *thr = gomp_thread ();
+ 
++  thr->ts.static_trip = 0;
+   if (gomp_work_share_start (false))
+-    gomp_loop_init (thr->ts.work_share, start, end, incr,
+-		    GFS_STATIC, chunk_size);
+-  gomp_mutex_unlock (&thr->ts.work_share->lock);
++    {
++      gomp_loop_init (thr->ts.work_share, start, end, incr,
++		      GFS_STATIC, chunk_size);
++      gomp_work_share_init_done ();
++    }
+ 
+   return !gomp_iter_static_next (istart, iend);
+ }
+@@ -84,13 +121,16 @@ gomp_loop_dynamic_start (long start, lon
+   bool ret;
+ 
+   if (gomp_work_share_start (false))
+-    gomp_loop_init (thr->ts.work_share, start, end, incr,
+-		    GFS_DYNAMIC, chunk_size);
++    {
++      gomp_loop_init (thr->ts.work_share, start, end, incr,
++		      GFS_DYNAMIC, chunk_size);
++      gomp_work_share_init_done ();
++    }
+ 
+ #ifdef HAVE_SYNC_BUILTINS
+-  gomp_mutex_unlock (&thr->ts.work_share->lock);
+   ret = gomp_iter_dynamic_next (istart, iend);
+ #else
++  gomp_mutex_lock (&thr->ts.work_share->lock);
+   ret = gomp_iter_dynamic_next_locked (istart, iend);
+   gomp_mutex_unlock (&thr->ts.work_share->lock);
+ #endif
+@@ -106,13 +146,16 @@ gomp_loop_guided_start (long start, long
+   bool ret;
+ 
+   if (gomp_work_share_start (false))
+-    gomp_loop_init (thr->ts.work_share, start, end, incr,
+-		    GFS_GUIDED, chunk_size);
++    {
++      gomp_loop_init (thr->ts.work_share, start, end, incr,
++		      GFS_GUIDED, chunk_size);
++      gomp_work_share_init_done ();
++    }
+ 
+ #ifdef HAVE_SYNC_BUILTINS
+-  gomp_mutex_unlock (&thr->ts.work_share->lock);
+   ret = gomp_iter_guided_next (istart, iend);
+ #else
++  gomp_mutex_lock (&thr->ts.work_share->lock);
+   ret = gomp_iter_guided_next_locked (istart, iend);
+   gomp_mutex_unlock (&thr->ts.work_share->lock);
+ #endif
+@@ -149,13 +192,14 @@ gomp_loop_ordered_static_start (long sta
+ {
+   struct gomp_thread *thr = gomp_thread ();
+ 
++  thr->ts.static_trip = 0;
+   if (gomp_work_share_start (true))
+     {
+       gomp_loop_init (thr->ts.work_share, start, end, incr,
+ 		      GFS_STATIC, chunk_size);
+       gomp_ordered_static_init ();
++      gomp_work_share_init_done ();
+     }
+-  gomp_mutex_unlock (&thr->ts.work_share->lock);
+ 
+   return !gomp_iter_static_next (istart, iend);
+ }
+@@ -168,8 +212,14 @@ gomp_loop_ordered_dynamic_start (long st
+   bool ret;
+ 
+   if (gomp_work_share_start (true))
+-    gomp_loop_init (thr->ts.work_share, start, end, incr,
+-		    GFS_DYNAMIC, chunk_size);
++    {
++      gomp_loop_init (thr->ts.work_share, start, end, incr,
++		      GFS_DYNAMIC, chunk_size);
++      gomp_mutex_lock (&thr->ts.work_share->lock);
++      gomp_work_share_init_done ();
++    }
++  else
++    gomp_mutex_lock (&thr->ts.work_share->lock);
+ 
+   ret = gomp_iter_dynamic_next_locked (istart, iend);
+   if (ret)
+@@ -187,8 +237,14 @@ gomp_loop_ordered_guided_start (long sta
+   bool ret;
+ 
+   if (gomp_work_share_start (true))
+-    gomp_loop_init (thr->ts.work_share, start, end, incr,
+-		    GFS_GUIDED, chunk_size);
++    {
++      gomp_loop_init (thr->ts.work_share, start, end, incr,
++		      GFS_GUIDED, chunk_size);
++      gomp_mutex_lock (&thr->ts.work_share->lock);
++      gomp_work_share_init_done ();
++    }
++  else
++    gomp_mutex_lock (&thr->ts.work_share->lock);
+ 
+   ret = gomp_iter_guided_next_locked (istart, iend);
+   if (ret)
+@@ -375,12 +431,12 @@ gomp_parallel_loop_start (void (*fn) (vo
+ 			  long incr, enum gomp_schedule_type sched,
+ 			  long chunk_size)
+ {
+-  struct gomp_work_share *ws;
++  struct gomp_team *team;
+ 
+   num_threads = gomp_resolve_num_threads (num_threads);
+-  ws = gomp_new_work_share (false, num_threads);
+-  gomp_loop_init (ws, start, end, incr, sched, chunk_size);
+-  gomp_team_start (fn, data, num_threads, ws);
++  team = gomp_new_team (num_threads);
++  gomp_loop_init (&team->work_shares[0], start, end, incr, sched, chunk_size);
++  gomp_team_start (fn, data, num_threads, team);
+ }
+ 
+ void
+--- libgomp/Makefile.in.jj	2008-01-10 20:53:47.000000000 +0100
++++ libgomp/Makefile.in	2008-03-26 18:51:01.000000000 +0100
+@@ -83,7 +83,7 @@ libgomp_la_LIBADD =
+ am_libgomp_la_OBJECTS = alloc.lo barrier.lo critical.lo env.lo \
+ 	error.lo iter.lo loop.lo ordered.lo parallel.lo sections.lo \
+ 	single.lo team.lo work.lo lock.lo mutex.lo proc.lo sem.lo \
+-	bar.lo time.lo fortran.lo affinity.lo
++	bar.lo ptrlock.lo time.lo fortran.lo affinity.lo
+ libgomp_la_OBJECTS = $(am_libgomp_la_OBJECTS)
+ DEFAULT_INCLUDES = -I. -I$(srcdir) -I.
+ depcomp = $(SHELL) $(top_srcdir)/../depcomp
+@@ -292,7 +292,7 @@ libgomp_version_info = -version-info $(l
+ libgomp_la_LDFLAGS = $(libgomp_version_info) $(libgomp_version_script)
+ libgomp_la_SOURCES = alloc.c barrier.c critical.c env.c error.c iter.c \
+ 	loop.c ordered.c parallel.c sections.c single.c team.c work.c \
+-	lock.c mutex.c proc.c sem.c bar.c time.c fortran.c affinity.c
++	lock.c mutex.c proc.c sem.c bar.c ptrlock.c time.c fortran.c affinity.c
+ 
+ nodist_noinst_HEADERS = libgomp_f.h
+ nodist_libsubinclude_HEADERS = omp.h
+@@ -434,6 +434,7 @@ distclean-compile:
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ordered.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/parallel.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/proc.Plo@am__quote@
++@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/ptrlock.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sections.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/sem.Plo@am__quote@
+ @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/single.Plo@am__quote@
+--- libgomp/testsuite/libgomp.c/loop-4.c.jj	2008-03-26 18:47:04.000000000 +0100
++++ libgomp/testsuite/libgomp.c/loop-4.c	2008-03-26 18:47:04.000000000 +0100
+@@ -0,0 +1,28 @@
++/* { dg-do run } */
++
++extern void abort (void);
++
++int
++main (void)
++{
++  int e = 0;
++#pragma omp parallel num_threads (4) reduction(+:e)
++  {
++    long i;
++    #pragma omp for schedule(dynamic,1)
++    for (i = __LONG_MAX__ - 30001; i <= __LONG_MAX__ - 10001; i += 10000)
++      if (i != __LONG_MAX__ - 30001
++	  && i != __LONG_MAX__ - 20001
++	  && i != __LONG_MAX__ - 10001)
++	e = 1;
++    #pragma omp for schedule(dynamic,1)
++    for (i = -__LONG_MAX__ + 30000; i >= -__LONG_MAX__ + 10000; i -= 10000)
++      if (i != -__LONG_MAX__ + 30000
++	  && i != -__LONG_MAX__ + 20000
++	  && i != -__LONG_MAX__ + 10000)
++	e = 1;
++  }
++  if (e)
++    abort ();
++  return 0;
++}
+--- libgomp/Makefile.am.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/Makefile.am	2008-03-26 15:15:19.000000000 +0100
+@@ -31,7 +31,7 @@ libgomp_la_LDFLAGS = $(libgomp_version_i
+ 
+ libgomp_la_SOURCES = alloc.c barrier.c critical.c env.c error.c iter.c \
+ 	loop.c ordered.c parallel.c sections.c single.c team.c work.c \
+-	lock.c mutex.c proc.c sem.c bar.c time.c fortran.c affinity.c
++	lock.c mutex.c proc.c sem.c bar.c ptrlock.c time.c fortran.c affinity.c
+ 
+ nodist_noinst_HEADERS = libgomp_f.h
+ nodist_libsubinclude_HEADERS = omp.h
+--- libgomp/team.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/team.c	2008-03-27 12:22:26.000000000 +0100
+@@ -94,7 +94,7 @@ gomp_thread_start (void *xdata)
+     {
+       gomp_barrier_wait (&thr->ts.team->barrier);
+       local_fn (local_data);
+-      gomp_barrier_wait (&thr->ts.team->barrier);
++      gomp_barrier_wait_last (&thr->ts.team->barrier);
+     }
+   else
+     {
+@@ -114,11 +114,10 @@ gomp_thread_start (void *xdata)
+ 	  thr->data = NULL;
+ 	  thr->ts.team = NULL;
+ 	  thr->ts.work_share = NULL;
++	  thr->ts.last_work_share = NULL;
+ 	  thr->ts.team_id = 0;
+-	  thr->ts.work_share_generation = 0;
+-	  thr->ts.static_trip = 0;
+ 
+-	  gomp_barrier_wait (&team->barrier);
++	  gomp_barrier_wait_last (&team->barrier);
+ 	  gomp_barrier_wait (&gomp_threads_dock);
+ 
+ 	  local_fn = thr->fn;
+@@ -133,21 +132,29 @@ gomp_thread_start (void *xdata)
+ 
+ /* Create a new team data structure.  */
+ 
+-static struct gomp_team *
+-new_team (unsigned nthreads, struct gomp_work_share *work_share)
++struct gomp_team *
++gomp_new_team (unsigned nthreads)
+ {
+   struct gomp_team *team;
+   size_t size;
++  int i;
+ 
+   size = sizeof (*team) + nthreads * sizeof (team->ordered_release[0]);
+   team = gomp_malloc (size);
+-  gomp_mutex_init (&team->work_share_lock);
+ 
+-  team->work_shares = gomp_malloc (4 * sizeof (struct gomp_work_share *));
+-  team->generation_mask = 3;
+-  team->oldest_live_gen = work_share == NULL;
+-  team->num_live_gen = work_share != NULL;
+-  team->work_shares[0] = work_share;
++  team->work_share_chunk = 8;
++#ifdef HAVE_SYNC_BUILTINS
++  team->single_count = 0;
++#else
++  gomp_mutex_init (&team->work_share_list_free_lock);
++#endif
++  gomp_init_work_share (&team->work_shares[0], false, nthreads);
++  team->work_shares[0].next_alloc = NULL;
++  team->work_share_list_free = NULL;
++  team->work_share_list_alloc = &team->work_shares[1];
++  for (i = 1; i < 7; i++)
++    team->work_shares[i].next_free = &team->work_shares[i + 1];
++  team->work_shares[i].next_free = NULL;
+ 
+   team->nthreads = nthreads;
+   gomp_barrier_init (&team->barrier, nthreads);
+@@ -164,10 +171,22 @@ new_team (unsigned nthreads, struct gomp
+ static void
+ free_team (struct gomp_team *team)
+ {
+-  free (team->work_shares);
+-  gomp_mutex_destroy (&team->work_share_lock);
++  if (__builtin_expect (team->work_shares[0].next_alloc != NULL, 0))
++    {
++      struct gomp_work_share *ws = team->work_shares[0].next_alloc;
++      do
++	{
++	  struct gomp_work_share *next_ws = ws->next_alloc;
++	  free (ws);
++	  ws = next_ws;
++	}
++      while (ws != NULL);
++    }
+   gomp_barrier_destroy (&team->barrier);
+   gomp_sem_destroy (&team->master_release);
++#ifndef HAVE_SYNC_BUILTINS
++  gomp_mutex_destroy (&team->work_share_list_free_lock);
++#endif
+   free (team);
+ }
+ 
+@@ -176,11 +195,10 @@ free_team (struct gomp_team *team)
+ 
+ void
+ gomp_team_start (void (*fn) (void *), void *data, unsigned nthreads,
+-		 struct gomp_work_share *work_share)
++		 struct gomp_team *team)
+ {
+   struct gomp_thread_start_data *start_data;
+   struct gomp_thread *thr, *nthr;
+-  struct gomp_team *team;
+   bool nested;
+   unsigned i, n, old_threads_used = 0;
+   pthread_attr_t thread_attr, *attr;
+@@ -188,17 +206,18 @@ gomp_team_start (void (*fn) (void *), vo
+   thr = gomp_thread ();
+   nested = thr->ts.team != NULL;
+ 
+-  team = new_team (nthreads, work_share);
+-
+   /* Always save the previous state, even if this isn't a nested team.
+      In particular, we should save any work share state from an outer
+      orphaned work share construct.  */
+   team->prev_ts = thr->ts;
+ 
+   thr->ts.team = team;
+-  thr->ts.work_share = work_share;
+   thr->ts.team_id = 0;
+-  thr->ts.work_share_generation = 0;
++  thr->ts.work_share = &team->work_shares[0];
++  thr->ts.last_work_share = NULL;
++#ifdef HAVE_SYNC_BUILTINS
++  thr->ts.single_count = 0;
++#endif
+   thr->ts.static_trip = 0;
+ 
+   if (nthreads == 1)
+@@ -241,9 +260,12 @@ gomp_team_start (void (*fn) (void *), vo
+ 	{
+ 	  nthr = gomp_threads[i];
+ 	  nthr->ts.team = team;
+-	  nthr->ts.work_share = work_share;
++	  nthr->ts.work_share = &team->work_shares[0];
++	  nthr->ts.last_work_share = NULL;
+ 	  nthr->ts.team_id = i;
+-	  nthr->ts.work_share_generation = 0;
++#ifdef HAVE_SYNC_BUILTINS
++	  nthr->ts.single_count = 0;
++#endif
+ 	  nthr->ts.static_trip = 0;
+ 	  nthr->fn = fn;
+ 	  nthr->data = data;
+@@ -266,8 +288,24 @@ gomp_team_start (void (*fn) (void *), vo
+ 	}
+     }
+ 
++  if (__builtin_expect (nthreads > old_threads_used, 0))
++    {
++      long diff = (long) nthreads - (long) old_threads_used;
++
++      if (old_threads_used == 0)
++	--diff;
++
++#ifdef HAVE_SYNC_BUILTINS
++      __sync_fetch_and_add (&gomp_managed_threads, diff);
++#else
++      gomp_mutex_lock (&gomp_remaining_threads_lock);
++      gomp_managed_threads += diff;
++      gomp_mutex_unlock (&gomp_remaining_threads_lock);
++#endif
++    }
++
+   attr = &gomp_thread_attr;
+-  if (gomp_cpu_affinity != NULL)
++  if (__builtin_expect (gomp_cpu_affinity != NULL, 0))
+     {
+       size_t stacksize;
+       pthread_attr_init (&thread_attr);
+@@ -287,9 +325,12 @@ gomp_team_start (void (*fn) (void *), vo
+       int err;
+ 
+       start_data->ts.team = team;
+-      start_data->ts.work_share = work_share;
++      start_data->ts.work_share = &team->work_shares[0];
++      start_data->ts.last_work_share = NULL;
+       start_data->ts.team_id = i;
+-      start_data->ts.work_share_generation = 0;
++#ifdef HAVE_SYNC_BUILTINS
++      start_data->ts.single_count = 0;
++#endif
+       start_data->ts.static_trip = 0;
+       start_data->fn = fn;
+       start_data->fn_data = data;
+@@ -303,7 +344,7 @@ gomp_team_start (void (*fn) (void *), vo
+ 	gomp_fatal ("Thread creation failed: %s", strerror (err));
+     }
+ 
+-  if (gomp_cpu_affinity != NULL)
++  if (__builtin_expect (gomp_cpu_affinity != NULL, 0))
+     pthread_attr_destroy (&thread_attr);
+ 
+  do_release:
+@@ -313,8 +354,20 @@ gomp_team_start (void (*fn) (void *), vo
+      that should arrive back at the end of this team.  The extra
+      threads should be exiting.  Note that we arrange for this test
+      to never be true for nested teams.  */
+-  if (nthreads < old_threads_used)
+-    gomp_barrier_reinit (&gomp_threads_dock, nthreads);
++  if (__builtin_expect (nthreads < old_threads_used, 0))
++    {
++      long diff = (long) nthreads - (long) old_threads_used;
++
++      gomp_barrier_reinit (&gomp_threads_dock, nthreads);
++
++#ifdef HAVE_SYNC_BUILTINS
++      __sync_fetch_and_add (&gomp_managed_threads, diff);
++#else
++      gomp_mutex_lock (&gomp_remaining_threads_lock);
++      gomp_managed_threads += diff;
++      gomp_mutex_unlock (&gomp_remaining_threads_lock);
++#endif
++    }
+ }
+ 
+ 
+@@ -329,8 +382,21 @@ gomp_team_end (void)
+ 
+   gomp_barrier_wait (&team->barrier);
+ 
++  gomp_fini_work_share (thr->ts.work_share);
++
+   thr->ts = team->prev_ts;
+ 
++  if (__builtin_expect (thr->ts.team != NULL, 0))
++    {
++#ifdef HAVE_SYNC_BUILTINS
++      __sync_fetch_and_add (&gomp_managed_threads, 1L - team->nthreads);
++#else
++      gomp_mutex_lock (&gomp_remaining_threads_lock);
++      gomp_managed_threads -= team->nthreads - 1L;
++      gomp_mutex_unlock (&gomp_remaining_threads_lock);
++#endif
++    }
++
+   free_team (team);
+ }
+ 
+--- libgomp/config/posix/bar.h.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/config/posix/bar.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -46,18 +46,32 @@ typedef struct
+   unsigned total;
+   unsigned arrived;
+ } gomp_barrier_t;
++typedef bool gomp_barrier_state_t;
+ 
+ extern void gomp_barrier_init (gomp_barrier_t *, unsigned);
+ extern void gomp_barrier_reinit (gomp_barrier_t *, unsigned);
+ extern void gomp_barrier_destroy (gomp_barrier_t *);
+ 
+ extern void gomp_barrier_wait (gomp_barrier_t *);
+-extern void gomp_barrier_wait_end (gomp_barrier_t *, bool);
++extern void gomp_barrier_wait_end (gomp_barrier_t *, gomp_barrier_state_t);
+ 
+-static inline bool gomp_barrier_wait_start (gomp_barrier_t *bar)
++static inline gomp_barrier_state_t
++gomp_barrier_wait_start (gomp_barrier_t *bar)
+ {
+   gomp_mutex_lock (&bar->mutex1);
+   return ++bar->arrived == bar->total;
+ }
+ 
++static inline bool
++gomp_barrier_last_thread (gomp_barrier_state_t state)
++{
++  return state;
++}
++
++static inline void
++gomp_barrier_wait_last (gomp_barrier_t *bar)
++{
++  gomp_barrier_wait (bar);
++}
++
+ #endif /* GOMP_BARRIER_H */
+--- libgomp/config/posix/ptrlock.h.jj	2008-03-26 15:11:32.000000000 +0100
++++ libgomp/config/posix/ptrlock.h	2008-03-26 15:11:32.000000000 +0100
+@@ -0,0 +1,69 @@
++/* Copyright (C) 2008 Free Software Foundation, Inc.
++   Contributed by Jakub Jelinek <jakub@redhat.com>.
++
++   This file is part of the GNU OpenMP Library (libgomp).
++
++   Libgomp is free software; you can redistribute it and/or modify it
++   under the terms of the GNU Lesser General Public License as published by
++   the Free Software Foundation; either version 2.1 of the License, or
++   (at your option) any later version.
++
++   Libgomp is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
++   FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
++   more details.
++
++   You should have received a copy of the GNU Lesser General Public License 
++   along with libgomp; see the file COPYING.LIB.  If not, write to the
++   Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++   MA 02110-1301, USA.  */
++
++/* As a special exception, if you link this library with other files, some
++   of which are compiled with GCC, to produce an executable, this library
++   does not by itself cause the resulting executable to be covered by the
++   GNU General Public License.  This exception does not however invalidate
++   any other reasons why the executable file might be covered by the GNU
++   General Public License.  */
++
++/* This is a Linux specific implementation of a mutex synchronization
++   mechanism for libgomp.  This type is private to the library.  This
++   implementation uses atomic instructions and the futex syscall.  */
++
++#ifndef GOMP_PTRLOCK_H
++#define GOMP_PTRLOCK_H 1
++
++typedef struct { void *ptr; gomp_mutex_t lock; } gomp_ptrlock_t;
++
++static inline void gomp_ptrlock_init (gomp_ptrlock_t *ptrlock, void *ptr)
++{
++  ptrlock->ptr = ptr;
++  gomp_mutex_init (&ptrlock->lock);
++}
++
++static inline void *gomp_ptrlock_get (gomp_ptrlock_t *ptrlock)
++{
++  if (ptrlock->ptr != NULL)
++    return ptrlock->ptr;
++
++  gomp_mutex_lock (&ptrlock->lock);
++  if (ptrlock->ptr != NULL)
++    {
++      gomp_mutex_unlock (&ptrlock->lock);
++      return ptrlock->ptr;
++    }
++
++  return NULL;
++}
++
++static inline void gomp_ptrlock_set (gomp_ptrlock_t *ptrlock, void *ptr)
++{
++  ptrlock->ptr = ptr;
++  gomp_mutex_unlock (&ptrlock->lock);
++}
++
++static inline void gomp_ptrlock_destroy (gomp_ptrlock_t *ptrlock)
++{
++  gomp_mutex_destroy (&ptrlock->lock);
++}
++
++#endif /* GOMP_PTRLOCK_H */
+--- libgomp/config/posix/ptrlock.c.jj	2008-03-26 15:11:32.000000000 +0100
++++ libgomp/config/posix/ptrlock.c	2008-03-26 15:11:32.000000000 +0100
+@@ -0,0 +1 @@
++/* Everything is in the header.  */
+--- libgomp/config/posix/bar.c.jj	2007-12-07 14:41:01.000000000 +0100
++++ libgomp/config/posix/bar.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -70,7 +70,7 @@ gomp_barrier_reinit (gomp_barrier_t *bar
+ }
+ 
+ void
+-gomp_barrier_wait_end (gomp_barrier_t *bar, bool last)
++gomp_barrier_wait_end (gomp_barrier_t *bar, gomp_barrier_state_t last)
+ {
+   unsigned int n;
+ 
+--- libgomp/config/linux/alpha/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/alpha/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -30,8 +30,6 @@
+ #ifndef SYS_futex
+ #define SYS_futex               394
+ #endif
+-#define FUTEX_WAIT              0
+-#define FUTEX_WAKE              1
+ 
+ 
+ static inline void
+@@ -45,7 +43,7 @@ futex_wait (int *addr, int val)
+ 
+   sc_0 = SYS_futex;
+   sc_16 = (long) addr;
+-  sc_17 = FUTEX_WAIT;
++  sc_17 = gomp_futex_wait;
+   sc_18 = val;
+   sc_19 = 0;
+   __asm volatile ("callsys"
+@@ -53,6 +51,20 @@ futex_wait (int *addr, int val)
+ 		  : "0"(sc_0), "r" (sc_16), "r"(sc_17), "r"(sc_18), "1"(sc_19)
+ 		  : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ 		    "$22", "$23", "$24", "$25", "$27", "$28", "memory");
++  if (__builtin_expect (sc_19, 0) && sc_0 == ENOSYS)
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sc_0 = SYS_futex;
++      sc_17 &= ~FUTEX_PRIVATE_FLAG;
++      sc_19 = 0;
++      __asm volatile ("callsys"
++		      : "=r" (sc_0), "=r"(sc_19)
++		      : "0"(sc_0), "r" (sc_16), "r"(sc_17), "r"(sc_18),
++			"1"(sc_19)
++		      : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
++			"$22", "$23", "$24", "$25", "$27", "$28", "memory");
++    }
+ }
+ 
+ static inline void
+@@ -66,11 +78,35 @@ futex_wake (int *addr, int count)
+ 
+   sc_0 = SYS_futex;
+   sc_16 = (long) addr;
+-  sc_17 = FUTEX_WAKE;
++  sc_17 = gomp_futex_wake;
+   sc_18 = count;
+   __asm volatile ("callsys"
+ 		  : "=r" (sc_0), "=r"(sc_19)
+ 		  : "0"(sc_0), "r" (sc_16), "r"(sc_17), "r"(sc_18)
+ 		  : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
+ 		    "$22", "$23", "$24", "$25", "$27", "$28", "memory");
++  if (__builtin_expect (sc_19, 0) && sc_0 == ENOSYS)
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sc_0 = SYS_futex;
++      sc_17 &= ~FUTEX_PRIVATE_FLAG;
++      __asm volatile ("callsys"
++		      : "=r" (sc_0), "=r"(sc_19)
++		      : "0"(sc_0), "r" (sc_16), "r"(sc_17), "r"(sc_18)
++		      : "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8",
++			"$22", "$23", "$24", "$25", "$27", "$28", "memory");
++    }
++}
++
++static inline void
++cpu_relax (void)
++{
++  __asm volatile ("" : : : "memory");
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++  __asm volatile ("wmb" : : : "memory");
+ }
+--- libgomp/config/linux/affinity.c.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/affinity.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2006, 2007 Free Software Foundation, Inc.
++/* Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
+    Contributed by Jakub Jelinek <jakub@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -38,9 +38,6 @@
+ #ifdef HAVE_PTHREAD_AFFINITY_NP
+ 
+ static unsigned int affinity_counter;
+-#ifndef HAVE_SYNC_BUILTINS
+-static gomp_mutex_t affinity_lock;
+-#endif
+ 
+ void
+ gomp_init_affinity (void)
+@@ -76,9 +73,6 @@ gomp_init_affinity (void)
+   CPU_SET (gomp_cpu_affinity[0], &cpuset);
+   pthread_setaffinity_np (pthread_self (), sizeof (cpuset), &cpuset);
+   affinity_counter = 1;
+-#ifndef HAVE_SYNC_BUILTINS
+-  gomp_mutex_init (&affinity_lock);
+-#endif
+ }
+ 
+ void
+@@ -87,13 +81,7 @@ gomp_init_thread_affinity (pthread_attr_
+   unsigned int cpu;
+   cpu_set_t cpuset;
+ 
+-#ifdef HAVE_SYNC_BUILTINS
+   cpu = __sync_fetch_and_add (&affinity_counter, 1);
+-#else
+-  gomp_mutex_lock (&affinity_lock);
+-  cpu = affinity_counter++;
+-  gomp_mutex_unlock (&affinity_lock);
+-#endif
+   cpu %= gomp_cpu_affinity_len;
+   CPU_ZERO (&cpuset);
+   CPU_SET (gomp_cpu_affinity[cpu], &cpuset);
+--- libgomp/config/linux/bar.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/bar.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -36,40 +36,49 @@
+ 
+ typedef struct
+ {
+-  gomp_mutex_t mutex;
+-  unsigned total;
+-  unsigned arrived;
+-  int generation;
++  /* Make sure total/generation is in a mostly read cacheline, while
++     awaited in a separate cacheline.  */
++  unsigned total __attribute__((aligned (64)));
++  unsigned generation;
++  unsigned awaited __attribute__((aligned (64)));
+ } gomp_barrier_t;
++typedef unsigned int gomp_barrier_state_t;
+ 
+ static inline void gomp_barrier_init (gomp_barrier_t *bar, unsigned count)
+ {
+-  gomp_mutex_init (&bar->mutex);
+   bar->total = count;
+-  bar->arrived = 0;
++  bar->awaited = count;
+   bar->generation = 0;
+ }
+ 
+ static inline void gomp_barrier_reinit (gomp_barrier_t *bar, unsigned count)
+ {
+-  gomp_mutex_lock (&bar->mutex);
++  __sync_fetch_and_add (&bar->awaited, count - bar->total);
+   bar->total = count;
+-  gomp_mutex_unlock (&bar->mutex);
+ }
+ 
+ static inline void gomp_barrier_destroy (gomp_barrier_t *bar)
+ {
+-  /* Before destroying, make sure all threads have left the barrier.  */
+-  gomp_mutex_lock (&bar->mutex);
+ }
+ 
+ extern void gomp_barrier_wait (gomp_barrier_t *);
+-extern void gomp_barrier_wait_end (gomp_barrier_t *, bool);
++extern void gomp_barrier_wait_last (gomp_barrier_t *);
++extern void gomp_barrier_wait_end (gomp_barrier_t *, gomp_barrier_state_t);
+ 
+-static inline bool gomp_barrier_wait_start (gomp_barrier_t *bar)
++static inline gomp_barrier_state_t
++gomp_barrier_wait_start (gomp_barrier_t *bar)
+ {
+-  gomp_mutex_lock (&bar->mutex);
+-  return ++bar->arrived == bar->total;
++  unsigned int ret = bar->generation;
++  /* Do we need any barrier here or is __sync_add_and_fetch acting
++     as the needed LoadLoad barrier already?  */
++  ret += __sync_add_and_fetch (&bar->awaited, -1) == 0;
++  return ret;
++}
++
++static inline bool
++gomp_barrier_last_thread (gomp_barrier_state_t state)
++{
++  return state & 1;
+ }
+ 
+ #endif /* GOMP_BARRIER_H */
+--- libgomp/config/linux/ptrlock.h.jj	2008-03-26 15:11:32.000000000 +0100
++++ libgomp/config/linux/ptrlock.h	2008-03-26 15:11:32.000000000 +0100
+@@ -0,0 +1,65 @@
++/* Copyright (C) 2008 Free Software Foundation, Inc.
++   Contributed by Jakub Jelinek <jakub@redhat.com>.
++
++   This file is part of the GNU OpenMP Library (libgomp).
++
++   Libgomp is free software; you can redistribute it and/or modify it
++   under the terms of the GNU Lesser General Public License as published by
++   the Free Software Foundation; either version 2.1 of the License, or
++   (at your option) any later version.
++
++   Libgomp is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
++   FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
++   more details.
++
++   You should have received a copy of the GNU Lesser General Public License 
++   along with libgomp; see the file COPYING.LIB.  If not, write to the
++   Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++   MA 02110-1301, USA.  */
++
++/* As a special exception, if you link this library with other files, some
++   of which are compiled with GCC, to produce an executable, this library
++   does not by itself cause the resulting executable to be covered by the
++   GNU General Public License.  This exception does not however invalidate
++   any other reasons why the executable file might be covered by the GNU
++   General Public License.  */
++
++/* This is a Linux specific implementation of a mutex synchronization
++   mechanism for libgomp.  This type is private to the library.  This
++   implementation uses atomic instructions and the futex syscall.  */
++
++#ifndef GOMP_PTRLOCK_H
++#define GOMP_PTRLOCK_H 1
++
++typedef void *gomp_ptrlock_t;
++
++static inline void gomp_ptrlock_init (gomp_ptrlock_t *ptrlock, void *ptr)
++{
++  *ptrlock = ptr;
++}
++
++extern void *gomp_ptrlock_get_slow (gomp_ptrlock_t *ptrlock);
++static inline void *gomp_ptrlock_get (gomp_ptrlock_t *ptrlock)
++{
++  if ((uintptr_t) *ptrlock > 2)
++    return *ptrlock;
++
++  if (__sync_bool_compare_and_swap (ptrlock, NULL, (uintptr_t) 1))
++    return NULL;
++
++  return gomp_ptrlock_get_slow (ptrlock);
++}
++
++extern void gomp_ptrlock_set_slow (gomp_ptrlock_t *ptrlock, void *ptr);
++static inline void gomp_ptrlock_set (gomp_ptrlock_t *ptrlock, void *ptr)
++{
++  if (!__sync_bool_compare_and_swap (ptrlock, (uintptr_t) 1, ptr))
++    gomp_ptrlock_set_slow (ptrlock, ptr);
++}
++
++static inline void gomp_ptrlock_destroy (gomp_ptrlock_t *ptrlock)
++{
++}
++
++#endif /* GOMP_PTRLOCK_H */
+--- libgomp/config/linux/lock.c.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/lock.c	2008-03-26 15:11:32.000000000 +0100
+@@ -29,11 +29,10 @@
+    primitives.  This implementation uses atomic instructions and the futex
+    syscall.  */
+ 
+-#include "libgomp.h"
+ #include <string.h>
+ #include <unistd.h>
+ #include <sys/syscall.h>
+-#include "futex.h"
++#include "wait.h"
+ 
+ 
+ /* The internal gomp_mutex_t and the external non-recursive omp_lock_t
+@@ -137,7 +136,7 @@ omp_set_nest_lock (omp_nest_lock_t *lock
+ 	  return;
+ 	}
+ 
+-      futex_wait (&lock->owner, otid);
++      do_wait (&lock->owner, otid);
+     }
+ }
+ 
+--- libgomp/config/linux/ptrlock.c.jj	2008-03-26 15:11:32.000000000 +0100
++++ libgomp/config/linux/ptrlock.c	2008-03-26 15:11:32.000000000 +0100
+@@ -0,0 +1,70 @@
++/* Copyright (C) 2008 Free Software Foundation, Inc.
++   Contributed by Jakub Jelinek <jakub@redhat.com>.
++
++   This file is part of the GNU OpenMP Library (libgomp).
++
++   Libgomp is free software; you can redistribute it and/or modify it
++   under the terms of the GNU Lesser General Public License as published by
++   the Free Software Foundation; either version 2.1 of the License, or
++   (at your option) any later version.
++
++   Libgomp is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
++   FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
++   more details.
++
++   You should have received a copy of the GNU Lesser General Public License 
++   along with libgomp; see the file COPYING.LIB.  If not, write to the
++   Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++   MA 02110-1301, USA.  */
++
++/* As a special exception, if you link this library with other files, some
++   of which are compiled with GCC, to produce an executable, this library
++   does not by itself cause the resulting executable to be covered by the
++   GNU General Public License.  This exception does not however invalidate
++   any other reasons why the executable file might be covered by the GNU
++   General Public License.  */
++
++/* This is a Linux specific implementation of a mutex synchronization
++   mechanism for libgomp.  This type is private to the library.  This
++   implementation uses atomic instructions and the futex syscall.  */
++
++#include <endian.h>
++#include <limits.h>
++#include "wait.h"
++
++void *
++gomp_ptrlock_get_slow (gomp_ptrlock_t *ptrlock)
++{
++  int *intptr;
++  __sync_bool_compare_and_swap (ptrlock, 1, 2);
++
++  /* futex works on ints, not pointers.
++     But a valid work share pointer will be at least
++     8 byte aligned, so it is safe to assume the low
++     32-bits of the pointer won't contain values 1 or 2.  */
++  __asm volatile ("" : "=r" (intptr) : "0" (ptrlock));
++#if __BYTE_ORDER == __BIG_ENDIAN
++  if (sizeof (*ptrlock) > sizeof (int))
++    intptr += (sizeof (*ptrlock) / sizeof (int)) - 1;
++#endif
++  do
++    do_wait (intptr, 2);
++  while (*intptr == 2);
++  __asm volatile ("" : : : "memory");
++  return *ptrlock;
++}
++
++void
++gomp_ptrlock_set_slow (gomp_ptrlock_t *ptrlock, void *ptr)
++{
++  int *intptr;
++
++  *ptrlock = ptr;
++  __asm volatile ("" : "=r" (intptr) : "0" (ptrlock));
++#if __BYTE_ORDER == __BIG_ENDIAN
++  if (sizeof (*ptrlock) > sizeof (int))
++    intptr += (sizeof (*ptrlock) / sizeof (int)) - 1;
++#endif
++  futex_wake (intptr, INT_MAX);
++}
+--- libgomp/config/linux/x86/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/x86/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -27,9 +27,6 @@
+ 
+ /* Provide target-specific access to the futex system call.  */
+ 
+-#define FUTEX_WAIT	0
+-#define FUTEX_WAKE	1
+-
+ #ifdef __LP64__
+ # ifndef SYS_futex
+ #  define SYS_futex	202
+@@ -38,14 +35,26 @@
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  register long r10 __asm__("%r10") = 0;
++  register long r10 __asm__("%r10");
+   long res;
+ 
++  r10 = 0;
+   __asm volatile ("syscall"
+ 		  : "=a" (res)
+-		  : "0"(SYS_futex), "D" (addr), "S"(FUTEX_WAIT),
+-		    "d"(val), "r"(r10)
++		  : "0" (SYS_futex), "D" (addr), "S" (gomp_futex_wait),
++		    "d" (val), "r" (r10)
+ 		  : "r11", "rcx", "memory");
++  if (__builtin_expect (res == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      r10 = 0;
++      __asm volatile ("syscall"
++		      : "=a" (res)
++		      : "0" (SYS_futex), "D" (addr), "S" (gomp_futex_wait),
++			"d" (val), "r" (r10)
++		      : "r11", "rcx", "memory");
++    }
+ }
+ 
+ static inline void
+@@ -55,8 +64,19 @@ futex_wake (int *addr, int count)
+ 
+   __asm volatile ("syscall"
+ 		  : "=a" (res)
+-		  : "0"(SYS_futex), "D" (addr), "S"(FUTEX_WAKE), "d"(count)
++		  : "0" (SYS_futex), "D" (addr), "S" (gomp_futex_wake),
++		    "d" (count)
+ 		  : "r11", "rcx", "memory");
++  if (__builtin_expect (res == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      __asm volatile ("syscall"
++		      : "=a" (res)
++		      : "0" (SYS_futex), "D" (addr), "S" (gomp_futex_wake),
++			"d" (count)
++		      : "r11", "rcx", "memory");
++    }
+ }
+ #else
+ # ifndef SYS_futex
+@@ -65,7 +85,7 @@ futex_wake (int *addr, int count)
+ 
+ # ifdef __PIC__
+ 
+-static inline void
++static inline long
+ sys_futex0 (int *addr, int op, int val)
+ {
+   long res;
+@@ -77,11 +97,12 @@ sys_futex0 (int *addr, int op, int val)
+ 		  : "0"(SYS_futex), "r" (addr), "c"(op),
+ 		    "d"(val), "S"(0)
+ 		  : "memory");
++  return res;
+ }
+ 
+ # else
+ 
+-static inline void
++static inline long
+ sys_futex0 (int *addr, int op, int val)
+ {
+   long res;
+@@ -91,6 +112,7 @@ sys_futex0 (int *addr, int op, int val)
+ 		  : "0"(SYS_futex), "b" (addr), "c"(op),
+ 		    "d"(val), "S"(0)
+ 		  : "memory");
++  return res;
+ }
+ 
+ # endif /* __PIC__ */
+@@ -98,13 +120,37 @@ sys_futex0 (int *addr, int op, int val)
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  sys_futex0 (addr, FUTEX_WAIT, val);
++  long res = sys_futex0 (addr, gomp_futex_wait, val);
++  if (__builtin_expect (res == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wait, val);
++    }
+ }
+ 
+ static inline void
+ futex_wake (int *addr, int count)
+ {
+-  sys_futex0 (addr, FUTEX_WAKE, count);
++  long res = sys_futex0 (addr, gomp_futex_wake, count);
++  if (__builtin_expect (res == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wake, count);
++    }
+ }
+ 
+ #endif /* __LP64__ */
++
++static inline void
++cpu_relax (void)
++{
++  __asm volatile ("rep; nop" : : : "memory");
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++  __sync_synchronize ();
++}
+--- libgomp/config/linux/wait.h.jj	2008-03-26 15:11:32.000000000 +0100
++++ libgomp/config/linux/wait.h	2008-03-26 15:11:32.000000000 +0100
+@@ -0,0 +1,68 @@
++/* Copyright (C) 2008 Free Software Foundation, Inc.
++   Contributed by Jakub Jelinek <jakub@redhat.com>.
++
++   This file is part of the GNU OpenMP Library (libgomp).
++
++   Libgomp is free software; you can redistribute it and/or modify it
++   under the terms of the GNU Lesser General Public License as published by
++   the Free Software Foundation; either version 2.1 of the License, or
++   (at your option) any later version.
++
++   Libgomp is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
++   FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
++   more details.
++
++   You should have received a copy of the GNU Lesser General Public License 
++   along with libgomp; see the file COPYING.LIB.  If not, write to the
++   Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
++   MA 02110-1301, USA.  */
++
++/* As a special exception, if you link this library with other files, some
++   of which are compiled with GCC, to produce an executable, this library
++   does not by itself cause the resulting executable to be covered by the
++   GNU General Public License.  This exception does not however invalidate
++   any other reasons why the executable file might be covered by the GNU
++   General Public License.  */
++
++/* This is a Linux specific implementation of a mutex synchronization
++   mechanism for libgomp.  This type is private to the library.  This
++   implementation uses atomic instructions and the futex syscall.  */
++
++#ifndef GOMP_WAIT_H
++#define GOMP_WAIT_H 1
++
++#include "libgomp.h"
++#include <errno.h>
++
++#define FUTEX_WAIT	0
++#define FUTEX_WAKE	1
++#define FUTEX_PRIVATE_FLAG	128L
++
++#ifdef HAVE_ATTRIBUTE_VISIBILITY
++# pragma GCC visibility push(hidden)
++#endif
++
++extern long int gomp_futex_wait, gomp_futex_wake;
++
++#include "futex.h"
++
++static inline void do_wait (int *addr, int val)
++{
++  unsigned long long i, count = gomp_spin_count_var;
++
++  if (__builtin_expect (gomp_managed_threads > gomp_available_cpus, 0))
++    count = gomp_throttled_spin_count_var;
++  for (i = 0; i < count; i++)
++    if (__builtin_expect (*addr != val, 0))
++      return;
++    else
++      cpu_relax ();
++  futex_wait (addr, val);
++}
++
++#ifdef HAVE_ATTRIBUTE_VISIBILITY
++# pragma GCC visibility pop
++#endif
++
++#endif /* GOMP_WAIT_H */
+--- libgomp/config/linux/sparc/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/sparc/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Jakub Jelinek <jakub@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -28,10 +28,8 @@
+ /* Provide target-specific access to the futex system call.  */
+ 
+ #include <sys/syscall.h>
+-#define FUTEX_WAIT	0
+-#define FUTEX_WAKE	1
+ 
+-static inline void
++static inline long
+ sys_futex0 (int *addr, int op, int val)
+ {
+   register long int g1  __asm__ ("g1");
+@@ -47,9 +45,9 @@ sys_futex0 (int *addr, int op, int val)
+   o3 = 0;
+ 
+ #ifdef __arch64__
+-# define SYSCALL_STRING "ta\t0x6d"
++# define SYSCALL_STRING "ta\t0x6d; bcs,a,pt %%xcc, 1f; sub %%g0, %%o0, %%o0; 1:"
+ #else
+-# define SYSCALL_STRING "ta\t0x10"
++# define SYSCALL_STRING "ta\t0x10; bcs,a 1f; sub %%g0, %%o0, %%o0; 1:"
+ #endif
+ 
+   __asm volatile (SYSCALL_STRING
+@@ -65,16 +63,49 @@ sys_futex0 (int *addr, int op, int val)
+ 		    "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",
+ #endif
+ 		    "cc", "memory");
++  return o0;
+ }
+ 
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  sys_futex0 (addr, FUTEX_WAIT, val);
++  long err = sys_futex0 (addr, gomp_futex_wait, val);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wait, val);
++    }
+ }
+ 
+ static inline void
+ futex_wake (int *addr, int count)
+ {
+-  sys_futex0 (addr, FUTEX_WAKE, count);
++  long err = sys_futex0 (addr, gomp_futex_wake, count);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wake, count);
++    }
++}
++
++static inline void
++cpu_relax (void)
++{
++#if defined __arch64__ || defined  __sparc_v9__
++  __asm volatile ("membar #LoadLoad" : : : "memory");
++#else
++  __asm volatile ("" : : : "memory");
++#endif
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++#if defined __arch64__ || defined __sparc_v9__
++  __asm volatile ("membar #StoreStore" : : : "memory");
++#else
++  __sync_synchronize ();
++#endif
+ }
+--- libgomp/config/linux/ia64/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/ia64/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -29,23 +29,24 @@
+ 
+ #include <sys/syscall.h>
+ 
+-#define FUTEX_WAIT	0
+-#define FUTEX_WAKE	1
+ 
+ 
+-static inline void
+-sys_futex0(int *addr, int op, int val)
++static inline long
++sys_futex0(int *addr, long op, int val)
+ {
+   register long out0 asm ("out0") = (long) addr;
+   register long out1 asm ("out1") = op;
+   register long out2 asm ("out2") = val;
+   register long out3 asm ("out3") = 0;
++  register long r8 asm ("r8");
++  register long r10 asm ("r10");
+   register long r15 asm ("r15") = SYS_futex;
+ 
+   __asm __volatile ("break 0x100000"
+-	: "=r"(r15), "=r"(out0), "=r"(out1), "=r"(out2), "=r"(out3)
++	: "=r"(r15), "=r"(out0), "=r"(out1), "=r"(out2), "=r"(out3),
++	  "=r"(r8), "=r"(r10)
+ 	: "r"(r15), "r"(out0), "r"(out1), "r"(out2), "r"(out3)
+-        : "memory", "r8", "r10", "out4", "out5", "out6", "out7",
++	: "memory", "out4", "out5", "out6", "out7",
+ 	  /* Non-stacked integer registers, minus r8, r10, r15.  */
+ 	  "r2", "r3", "r9", "r11", "r12", "r13", "r14", "r16", "r17", "r18",
+ 	  "r19", "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27",
+@@ -56,16 +57,41 @@ sys_futex0(int *addr, int op, int val)
+ 	  "f6", "f7", "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
+ 	  /* Branch registers.  */
+ 	  "b6");
++  return r8 & r10;
+ }
+ 
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  sys_futex0 (addr, FUTEX_WAIT, val);
++  long err = sys_futex0 (addr, gomp_futex_wait, val);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wait, val);
++    }
+ }
+ 
+ static inline void
+ futex_wake (int *addr, int count)
+ {
+-  sys_futex0 (addr, FUTEX_WAKE, count);
++  long err = sys_futex0 (addr, gomp_futex_wake, count);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wake, count);
++    }
++}
++
++static inline void
++cpu_relax (void)
++{
++  __asm volatile ("hint @pause" : : : "memory");
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++  __sync_synchronize ();
+ }
+--- libgomp/config/linux/s390/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/s390/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Jakub Jelinek <jakub@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -28,10 +28,8 @@
+ /* Provide target-specific access to the futex system call.  */
+ 
+ #include <sys/syscall.h>
+-#define FUTEX_WAIT	0
+-#define FUTEX_WAKE	1
+ 
+-static inline void
++static inline long
+ sys_futex0 (int *addr, int op, int val)
+ {
+   register long int gpr2  __asm__ ("2");
+@@ -49,16 +47,41 @@ sys_futex0 (int *addr, int op, int val)
+ 		  : "i" (SYS_futex),
+ 		    "0" (gpr2), "d" (gpr3), "d" (gpr4), "d" (gpr5)
+ 		  : "memory");
++  return gpr2;
+ }
+ 
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  sys_futex0 (addr, FUTEX_WAIT, val);
++  long err = sys_futex0 (addr, gomp_futex_wait, val);
++  if (__builtin_expect (err == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wait, val);
++    }
+ }
+ 
+ static inline void
+ futex_wake (int *addr, int count)
+ {
+-  sys_futex0 (addr, FUTEX_WAKE, count);
++  long err = sys_futex0 (addr, gomp_futex_wake, count);
++  if (__builtin_expect (err == -ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wake, count);
++    }
++}
++
++static inline void
++cpu_relax (void)
++{
++  __asm volatile ("" : : : "memory");
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++  __sync_synchronize ();
+ }
+--- libgomp/config/linux/mutex.c.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/mutex.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -29,9 +29,10 @@
+    mechanism for libgomp.  This type is private to the library.  This
+    implementation uses atomic instructions and the futex syscall.  */
+ 
+-#include "libgomp.h"
+-#include "futex.h"
++#include "wait.h"
+ 
++long int gomp_futex_wake = FUTEX_WAKE | FUTEX_PRIVATE_FLAG;
++long int gomp_futex_wait = FUTEX_WAIT | FUTEX_PRIVATE_FLAG;
+ 
+ void
+ gomp_mutex_lock_slow (gomp_mutex_t *mutex)
+@@ -40,7 +41,7 @@ gomp_mutex_lock_slow (gomp_mutex_t *mute
+     {
+       int oldval = __sync_val_compare_and_swap (mutex, 1, 2);
+       if (oldval != 0)
+-        futex_wait (mutex, 2);
++	do_wait (mutex, 2);
+     }
+   while (!__sync_bool_compare_and_swap (mutex, 0, 2));
+ }
+--- libgomp/config/linux/sem.c.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/sem.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -29,8 +29,7 @@
+    mechanism for libgomp.  This type is private to the library.  This 
+    implementation uses atomic instructions and the futex syscall.  */
+ 
+-#include "libgomp.h"
+-#include "futex.h"
++#include "wait.h"
+ 
+ 
+ void
+@@ -44,7 +43,7 @@ gomp_sem_wait_slow (gomp_sem_t *sem)
+ 	  if (__sync_bool_compare_and_swap (sem, val, val - 1))
+ 	    return;
+ 	}
+-      futex_wait (sem, -1);
++      do_wait (sem, -1);
+     }
+ }
+ 
+--- libgomp/config/linux/powerpc/futex.h.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/powerpc/futex.h	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -28,10 +28,8 @@
+ /* Provide target-specific access to the futex system call.  */
+ 
+ #include <sys/syscall.h>
+-#define FUTEX_WAIT	0
+-#define FUTEX_WAKE	1
+ 
+-static inline void
++static inline long
+ sys_futex0 (int *addr, int op, int val)
+ {
+   register long int r0  __asm__ ("r0");
+@@ -50,21 +48,48 @@ sys_futex0 (int *addr, int op, int val)
+      doesn't.  It doesn't much matter for us.  In the interest of unity,
+      go ahead and clobber it always.  */
+ 
+-  __asm volatile ("sc"
++  __asm volatile ("sc; mfcr %0"
+ 		  : "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6)
+ 		  : "r"(r0), "r"(r3), "r"(r4), "r"(r5), "r"(r6)
+ 		  : "r7", "r8", "r9", "r10", "r11", "r12",
+ 		    "cr0", "ctr", "memory");
++  if (__builtin_expect (r0 & (1 << 28), 0))
++    return r3;
++  return 0;
+ }
+ 
+ static inline void
+ futex_wait (int *addr, int val)
+ {
+-  sys_futex0 (addr, FUTEX_WAIT, val);
++  long err = sys_futex0 (addr, gomp_futex_wait, val);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wait, val);
++    }
+ }
+ 
+ static inline void
+ futex_wake (int *addr, int count)
+ {
+-  sys_futex0 (addr, FUTEX_WAKE, count);
++  long err = sys_futex0 (addr, gomp_futex_wake, count);
++  if (__builtin_expect (err == ENOSYS, 0))
++    {
++      gomp_futex_wait &= ~FUTEX_PRIVATE_FLAG;
++      gomp_futex_wake &= ~FUTEX_PRIVATE_FLAG;
++      sys_futex0 (addr, gomp_futex_wake, count);
++    }
++}
++
++static inline void
++cpu_relax (void)
++{
++  __asm volatile ("" : : : "memory");
++}
++
++static inline void
++atomic_write_barrier (void)
++{
++  __asm volatile ("eieio" : : : "memory");
+ }
+--- libgomp/config/linux/bar.c.jj	2007-12-07 14:41:00.000000000 +0100
++++ libgomp/config/linux/bar.c	2008-03-26 15:11:32.000000000 +0100
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 2005 Free Software Foundation, Inc.
++/* Copyright (C) 2005, 2008 Free Software Foundation, Inc.
+    Contributed by Richard Henderson <rth@redhat.com>.
+ 
+    This file is part of the GNU OpenMP Library (libgomp).
+@@ -29,32 +29,29 @@
+    mechanism for libgomp.  This type is private to the library.  This 
+    implementation uses atomic instructions and the futex syscall.  */
+ 
+-#include "libgomp.h"
+-#include "futex.h"
+ #include <limits.h>
++#include "wait.h"
+ 
+ 
+ void
+-gomp_barrier_wait_end (gomp_barrier_t *bar, bool last)
++gomp_barrier_wait_end (gomp_barrier_t *bar, gomp_barrier_state_t state)
+ {
+-  if (last)
++  if (__builtin_expect ((state & 1) != 0, 0))
+     {
+-      bar->generation++;
+-      futex_wake (&bar->generation, INT_MAX);
++      /* Next time we'll be awaiting TOTAL threads again.  */
++      bar->awaited = bar->total;
++      atomic_write_barrier ();
++      bar->generation += 2;
++      futex_wake ((int *) &bar->generation, INT_MAX);
+     }
+   else
+     {
+-      unsigned int generation = bar->generation;
+-
+-      gomp_mutex_unlock (&bar->mutex);
++      unsigned int generation = state;
+ 
+       do
+-	futex_wait (&bar->generation, generation);
++	do_wait ((int *) &bar->generation, generation);
+       while (bar->generation == generation);
+     }
+-
+-  if (__sync_add_and_fetch (&bar->arrived, -1) == 0)
+-    gomp_mutex_unlock (&bar->mutex);
+ }
+ 
+ void
+@@ -62,3 +59,18 @@ gomp_barrier_wait (gomp_barrier_t *barri
+ {
+   gomp_barrier_wait_end (barrier, gomp_barrier_wait_start (barrier));
+ }
++
++/* Like gomp_barrier_wait, except that if the encountering thread
++   is not the last one to hit the barrier, it returns immediately.
++   The intended usage is that a thread which intends to gomp_barrier_destroy
++   this barrier calls gomp_barrier_wait, while all other threads
++   call gomp_barrier_wait_last.  When gomp_barrier_wait returns,
++   the barrier can be safely destroyed.  */
++
++void
++gomp_barrier_wait_last (gomp_barrier_t *barrier)
++{
++  gomp_barrier_state_t state = gomp_barrier_wait_start (barrier);
++  if (state & 1)
++    gomp_barrier_wait_end (barrier, state);
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ppc32-retaddr.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ppc32-retaddr.patch
new file mode 100644
index 0000000000..3de4158eb0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-ppc32-retaddr.patch
@@ -0,0 +1,90 @@
+2005-11-28  Jakub Jelinek  <jakub@redhat.com>
+
+	* config/rs6000/rs6000.c (rs6000_return_addr): If COUNT == 0,
+	read word RETURN_ADDRESS_OFFSET bytes above arg_pointer_rtx
+	instead of doing an extran indirection from frame_pointer_rtx.
+
+	* gcc.dg/20051128-1.c: New test.
+
+Index: gcc/config/rs6000/rs6000.c
+===================================================================
+--- gcc/config/rs6000/rs6000.c.orig	2010-03-27 03:27:39.000000000 -0700
++++ gcc/config/rs6000/rs6000.c	2010-06-25 10:18:04.053381930 -0700
+@@ -17646,17 +17646,22 @@
+      don't try to be too clever here.  */
+   if (count != 0 || (DEFAULT_ABI != ABI_AIX && flag_pic))
+     {
++      rtx x;
+       cfun->machine->ra_needs_full_frame = 1;
+ 
+-      return
+-	gen_rtx_MEM
+-	  (Pmode,
+-	   memory_address
+-	   (Pmode,
+-	    plus_constant (copy_to_reg
+-			   (gen_rtx_MEM (Pmode,
+-					 memory_address (Pmode, frame))),
+-			   RETURN_ADDRESS_OFFSET)));
++      if (count == 0)
++	{
++	  gcc_assert (frame == frame_pointer_rtx);
++	  x = arg_pointer_rtx;
++	}
++      else
++	{
++	  x = memory_address (Pmode, frame);
++	  x = copy_to_reg (gen_rtx_MEM (Pmode, x));
++	}
++
++      x = plus_constant (x, RETURN_ADDRESS_OFFSET);
++      return gen_rtx_MEM (Pmode, memory_address (Pmode, x));
+     }
+ 
+   cfun->machine->ra_need_lr = 1;
+Index: gcc/testsuite/gcc.dg/20051128-1.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/testsuite/gcc.dg/20051128-1.c	2010-06-25 10:18:04.061382856 -0700
+@@ -0,0 +1,41 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -fpic" } */
++
++extern void exit (int);
++extern void abort (void);
++
++int b;
++
++struct A
++{
++  void *pad[147];
++  void *ra, *h;
++  long o;
++};
++
++void
++__attribute__((noinline))
++foo (struct A *a, void *x)
++{
++  __builtin_memset (a, 0, sizeof (a));
++  if (!b)
++    exit (0);
++}
++
++void
++__attribute__((noinline))
++bar (void)
++{
++  struct A a;
++
++  __builtin_unwind_init ();
++  foo (&a, __builtin_return_address (0));
++}
++
++int
++main (void)
++{
++  bar ();
++  abort ();
++  return 0;
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr27898.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr27898.patch
new file mode 100644
index 0000000000..172bb81171
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr27898.patch
@@ -0,0 +1,16 @@
+2006-08-18  Jakub Jelinek  <jakub@redhat.com>
+
+	PR c/27898
+	* gcc.dg/pr27898.c: New test.
+
+--- gcc/testsuite/gcc.dg/pr27898.c.jj	2006-08-18 09:19:33.000000000 +0200
++++ gcc/testsuite/gcc.dg/pr27898.c	2006-08-18 09:19:27.000000000 +0200
+@@ -0,0 +1,8 @@
++/* PR c/27898 */
++/* { dg-do compile } */
++/* { dg-options "--combine" } */
++/* { dg-additional-sources "pr27898.c" } */
++
++union u { struct { int i; }; };
++
++extern int foo (union u *);
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr32139.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr32139.patch
new file mode 100644
index 0000000000..f35696703d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr32139.patch
@@ -0,0 +1,19 @@
+2007-06-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/32139
+	* gcc.c-torture/compile/20070531-1.c: New test.
+
+--- gcc/testsuite/gcc.c-torture/compile/20070531-1.c.jj	2007-05-31 13:47:22.000000000 +0200
++++ gcc/testsuite/gcc.c-torture/compile/20070531-1.c	2007-06-01 10:57:15.000000000 +0200
+@@ -0,0 +1,11 @@
++/* PR tree-optimization/32139 */
++int foo (void);
++int bar (void) __attribute__ ((const));
++
++int
++test (int x)
++{
++  int a = (x == 10000 ? foo : bar) ();
++  int b = (x == 10000 ? foo : bar) ();
++  return a + b;
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr33763.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr33763.patch
new file mode 100644
index 0000000000..68c30650ff
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-pr33763.patch
@@ -0,0 +1,159 @@
+2007-11-06  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/33763
+	* gcc.dg/pr33763.c: New test.
+	* g++.dg/opt/inline13.C: New test.
+
+2007-11-06  Jan Hubicka  <jh@suse.cz>
+
+	PR tree-optimization/33763
+	* tree-inline.c (expand_call_inline): Silently ignore always_inline
+	attribute for redefined extern inline functions.
+
+Index: gcc/tree-inline.c
+===================================================================
+--- gcc/tree-inline.c.orig	2010-03-18 13:07:13.000000000 -0700
++++ gcc/tree-inline.c	2010-06-25 10:18:51.230139825 -0700
+@@ -3545,6 +3545,12 @@
+ 	goto egress;
+ 
+       if (lookup_attribute ("always_inline", DECL_ATTRIBUTES (fn))
++	/* For extern inline functions that get redefined we always
++	   silently ignored alway_inline flag. Better behaviour would
++	   be to be able to keep both bodies and use extern inline body
++	   for inlining, but we can't do that because frontends overwrite
++	   the body.  */
++	  && !cg_edge->callee->local.redefined_extern_inline
+ 	  /* Avoid warnings during early inline pass. */
+ 	  && cgraph_global_info_ready)
+ 	{
+Index: gcc/testsuite/gcc.dg/pr33763.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/testsuite/gcc.dg/pr33763.c	2010-06-25 10:18:51.234141302 -0700
+@@ -0,0 +1,60 @@
++/* PR tree-optimization/33763 */
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef struct
++{
++  void *a;
++  void *b;
++} T;
++extern void *foo (const char *, const char *);
++extern void *bar (void *, const char *, T);
++extern int baz (const char *, int);
++
++extern inline __attribute__ ((always_inline, gnu_inline)) int
++baz (const char *x, int y)
++{
++  return 2;
++}
++
++int
++baz (const char *x, int y)
++{
++  return 1;
++}
++
++int xa, xb;
++
++static void *
++inl (const char *x, const char *y)
++{
++  T t = { &xa, &xb };
++  int *f = (int *) __builtin_malloc (sizeof (int));
++  const char *z;
++  int o = 0;
++  void *r = 0;
++
++  for (z = y; *z; z++)
++    {
++      if (*z == 'r')
++	o |= 1;
++      if (*z == 'w')
++	o |= 2;
++    }
++  if (o == 1)
++    *f = baz (x, 0);
++  if (o == 2)
++    *f = baz (x, 1);
++  if (o == 3)
++    *f = baz (x, 2);
++
++  if (o && *f > 0)
++    r = bar (f, "w", t);
++  return r;
++}
++
++void *
++foo (const char *x, const char *y)
++{
++  return inl (x, y);
++}
+Index: gcc/testsuite/g++.dg/opt/inline13.C
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc/testsuite/g++.dg/opt/inline13.C	2010-06-25 10:18:51.261052137 -0700
+@@ -0,0 +1,60 @@
++// PR tree-optimization/33763
++// { dg-do compile }
++// { dg-options "-O2" }
++
++typedef struct
++{
++  void *a;
++  void *b;
++} T;
++extern void *foo (const char *, const char *);
++extern void *bar (void *, const char *, T);
++extern int baz (const char *, int);
++
++extern inline __attribute__ ((always_inline, gnu_inline)) int
++baz (const char *x, int y)
++{
++  return 2;
++}
++
++int
++baz (const char *x, int y)
++{
++  return 1;
++}
++
++int xa, xb;
++
++static void *
++inl (const char *x, const char *y)
++{
++  T t = { &xa, &xb };
++  int *f = (int *) __builtin_malloc (sizeof (int));
++  const char *z;
++  int o = 0;
++  void *r = 0;
++
++  for (z = y; *z; z++)
++    {
++      if (*z == 'r')
++	o |= 1;
++      if (*z == 'w')
++	o |= 2;
++    }
++  if (o == 1)
++    *f = baz (x, 0);
++  if (o == 2)
++    *f = baz (x, 1);
++  if (o == 3)
++    *f = baz (x, 2);
++
++  if (o && *f > 0)
++    r = bar (f, "w", t);
++  return r;
++}
++
++void *
++foo (const char *x, const char *y)
++{
++  return inl (x, y);
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh251682.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh251682.patch
new file mode 100644
index 0000000000..e96ae6f134
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh251682.patch
@@ -0,0 +1,89 @@
+2008-04-01  Jakub Jelinek  <jakub@redhat.com>
+
+	PR pch/13675
+	* files.c (struct _cpp_file): Remove pch field.
+	(pch_open_file): Don't set file->pch, just file->pchname.
+	(should_stack_file): After pfile->cb.read_pch call
+	free pchname and clear pchname, don't close file->fd.
+	Test file->pchname instead of file->pch.  Don't close fd after cb.
+	(_cpp_stack_include): Test file->pchname instead of file->pch.
+
+	* c-pch.c (c_common_read_pch): On error close (fd) resp. fclose (f).
+
+--- libcpp/files.c.jj	2008-02-18 23:50:17.000000000 +0100
++++ libcpp/files.c	2008-03-31 15:59:01.000000000 +0200
+@@ -106,9 +106,6 @@ struct _cpp_file
+ 
+   /* If BUFFER above contains the true contents of the file.  */
+   bool buffer_valid;
+-
+-  /* File is a PCH (on return from find_include_file).  */
+-  bool pch;
+ };
+ 
+ /* A singly-linked list for all searches for a given file name, with
+@@ -322,9 +319,7 @@ pch_open_file (cpp_reader *pfile, _cpp_f
+ 	    }
+ 	  closedir (pchdir);
+ 	}
+-      if (valid)
+-	file->pch = true;
+-      else
++      if (!valid)
+ 	*invalid_pch = true;
+     }
+ 
+@@ -703,11 +698,12 @@ should_stack_file (cpp_reader *pfile, _c
+     return false;
+ 
+   /* Handle PCH files immediately; don't stack them.  */
+-  if (file->pch)
++  if (file->pchname)
+     {
+       pfile->cb.read_pch (pfile, file->pchname, file->fd, file->path);
+-      close (file->fd);
+       file->fd = -1;
++      free ((void *) file->pchname);
++      file->pchname = NULL;
+       return false;
+     }
+ 
+@@ -916,7 +912,7 @@ _cpp_stack_include (cpp_reader *pfile, c
+      complicates LAST_SOURCE_LINE_LOCATION.  This does not apply if we
+      found a PCH file (in which case linemap_add is not called) or we
+      were included from the command-line.  */
+-  if (! file->pch && file->err_no == 0 && type != IT_CMDLINE)
++  if (file->pchname == NULL && file->err_no == 0 && type != IT_CMDLINE)
+     pfile->line_table->highest_location--;
+ 
+   return _cpp_stack_file (pfile, file, type == IT_IMPORT);
+--- gcc/c-pch.c.jj	2008-02-18 23:46:08.000000000 +0100
++++ gcc/c-pch.c	2008-03-31 15:56:00.000000000 +0200
+@@ -372,6 +372,7 @@ c_common_read_pch (cpp_reader *pfile, co
+   if (f == NULL)
+     {
+       cpp_errno (pfile, CPP_DL_ERROR, "calling fdopen");
++      close (fd);
+       return;
+     }
+ 
+@@ -380,6 +381,7 @@ c_common_read_pch (cpp_reader *pfile, co
+   if (fread (&h, sizeof (h), 1, f) != 1)
+     {
+       cpp_errno (pfile, CPP_DL_ERROR, "reading");
++      fclose (f);
+       return;
+     }
+ 
+@@ -425,7 +427,10 @@ c_common_read_pch (cpp_reader *pfile, co
+   gt_pch_restore (f);
+ 
+   if (cpp_read_state (pfile, name, f, smd) != 0)
+-    return;
++    {
++      fclose (f);
++      return;
++    }
+ 
+   fclose (f);
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh330771.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh330771.patch
new file mode 100644
index 0000000000..4888ac47dd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh330771.patch
@@ -0,0 +1,31 @@
+2007-10-16  Jakub Jelinek  <jakub@redhat.com>
+
+	* Makefile.am (libgcj_tools_la_LIBADD): Add.
+	* Makefile.in: Regenerated.
+
+Index: libjava/Makefile.am
+===================================================================
+--- libjava/Makefile.am.orig	2010-03-21 12:41:37.000000000 -0700
++++ libjava/Makefile.am	2010-06-25 10:22:11.394130458 -0700
+@@ -507,6 +507,8 @@
+ libgcj_tools_la_GCJFLAGS = $(AM_GCJFLAGS) -findirect-dispatch \
+  -fno-bootstrap-classes -fno-indirect-classes \
+  -fsource-filename=$(here)/classpath/tools/all-classes.lst
++## See jv_convert_LDADD.
++libgcj_tools_la_LIBADD = -L$(here)/.libs libgcj.la
+ libgcj_tools_la_LDFLAGS = -rpath $(toolexeclibdir) \
+  -version-info `grep -v '^\#' $(srcdir)/libtool-version` \
+  $(LIBGCJ_LD_SYMBOLIC_FUNCTIONS) $(LIBJAVA_LDFLAGS_NOUNDEF)
+Index: libjava/Makefile.in
+===================================================================
+--- libjava/Makefile.in.orig	2010-04-02 11:18:06.000000000 -0700
++++ libjava/Makefile.in	2010-06-25 10:27:41.841708512 -0700
+@@ -1190,7 +1190,7 @@
+  -version-info `grep -v '^\#' $(srcdir)/libtool-version` \
+  $(LIBGCJ_LD_SYMBOLIC_FUNCTIONS) $(LIBJAVA_LDFLAGS_NOUNDEF)
+ 
+-libgcj_tools_la_LIBADD = libgcj.la -lm
++libgcj_tools_la_LIBADD = -L$(here)/.libs libgcj.la -lm
+ libgcj_tools_la_DEPENDENCIES = libgcj.la libgcj.spec $(am__append_22)
+ libgcj_tools_la_LINK = $(LIBLINK) $(libgcj_tools_la_LDFLAGS)
+ libjvm_la_SOURCES = jni-libjvm.cc
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh341221.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh341221.patch
new file mode 100644
index 0000000000..7e2801b99b
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fedora/gcc43-rh341221.patch
@@ -0,0 +1,32 @@
+2007-10-21  Jakub Jelinek  <jakub@redhat.com>
+
+	* doc/Makefile.am (POD2MAN): Set date from cp-tools.texinfo
+	timestamp rather than from current date.
+	* doc/Makefile.in: Regenerated.
+
+Index: libjava/classpath/doc/Makefile.am
+===================================================================
+--- libjava/classpath/doc/Makefile.am.orig	2008-10-21 10:55:01.000000000 -0700
++++ libjava/classpath/doc/Makefile.am	2010-06-25 10:28:30.237631599 -0700
+@@ -31,7 +31,7 @@
+ 	gtnameserv.1 \
+ 	gjdoc.1
+ 
+-POD2MAN = pod2man --center="GNU" --release="$(VERSION)"
++POD2MAN = pod2man --center="GNU" --release="$(VERSION)" --date="$(shell ls --time-style=+%F -l $(srcdir)/cp-tools.texinfo | awk '{print $$6}')"
+ TEXI2POD = perl $(srcdir)/texi2pod.pl
+ STAMP = echo timestamp >
+ 
+Index: libjava/classpath/doc/Makefile.in
+===================================================================
+--- libjava/classpath/doc/Makefile.in.orig	2010-04-02 11:18:06.000000000 -0700
++++ libjava/classpath/doc/Makefile.in	2010-06-25 10:28:30.245635728 -0700
+@@ -376,7 +376,7 @@
+ 	gtnameserv.1 \
+ 	gjdoc.1
+ 
+-POD2MAN = pod2man --center="GNU" --release="$(VERSION)"
++POD2MAN = pod2man --center="GNU" --release="$(VERSION)" --date="$(shell ls --time-style=+%F -l $(srcdir)/cp-tools.texinfo | awk '{print $$6}')"
+ TEXI2POD = perl $(srcdir)/texi2pod.pl
+ STAMP = echo timestamp >
+ @GENINSRC_FALSE@STAMP_GENINSRC = 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/fortran-cross-compile-hack.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/fortran-cross-compile-hack.patch
new file mode 100644
index 0000000000..348c77006f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/fortran-cross-compile-hack.patch
@@ -0,0 +1,30 @@
+* Fortran would have searched for arm-angstrom-gnueabi-gfortran but would have used
+  used gfortan. For gcc_4.2.2.bb we want to use the gfortran compiler from our cross
+  directory.
+
+Index: gcc-4.5+svnr155514/libgfortran/configure
+===================================================================
+--- gcc-4.5+svnr155514.orig/libgfortran/configure	2009-12-29 22:02:01.000000000 -0800
++++ gcc-4.5+svnr155514/libgfortran/configure	2009-12-30 08:12:40.889091657 -0800
+@@ -11655,7 +11655,7 @@ CC="$lt_save_CC"
+ 
+ # We need gfortran to compile parts of the library
+ #AC_PROG_FC(gfortran)
+-FC="$GFORTRAN"
++#FC="$GFORTRAN"
+ ac_ext=${ac_fc_srcext-f}
+ ac_compile='$FC -c $FCFLAGS $ac_fcflags_srcext conftest.$ac_ext >&5'
+ ac_link='$FC -o conftest$ac_exeext $FCFLAGS $LDFLAGS $ac_fcflags_srcext conftest.$ac_ext $LIBS >&5'
+Index: gcc-4.5+svnr155514/libgfortran/configure.ac
+===================================================================
+--- gcc-4.5+svnr155514.orig/libgfortran/configure.ac	2009-12-29 22:02:01.000000000 -0800
++++ gcc-4.5+svnr155514/libgfortran/configure.ac	2009-12-30 08:12:13.453094218 -0800
+@@ -187,7 +187,7 @@ AC_SUBST(enable_static)
+ 
+ # We need gfortran to compile parts of the library
+ #AC_PROG_FC(gfortran)
+-FC="$GFORTRAN"
++#FC="$GFORTRAN"
+ AC_PROG_FC(gfortran)
+ 
+ # extra LD Flags which are required for targets
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.0.2-e300c2c3.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.0.2-e300c2c3.patch
new file mode 100644
index 0000000000..d1df8b2716
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.0.2-e300c2c3.patch
@@ -0,0 +1,319 @@
+Adds support for Freescale Power architecture e300c2 and e300c3 cores.
+http://www.bitshrine.org/gpp/tc-fsl-x86lnx-e300c3-nptl-4.0.2-2.src.rpm
+
+Leon Woestenberg <leonw@mailcan.com>
+
+---
+ gcc/config.gcc                |    2 
+ gcc/config/rs6000/e300c2c3.md |  189 ++++++++++++++++++++++++++++++++++++++++++
+ gcc/config/rs6000/rs6000.c    |   24 +++++
+ gcc/config/rs6000/rs6000.h    |    4 
+ gcc/config/rs6000/rs6000.md   |    3 
+ 5 files changed, 220 insertions(+), 2 deletions(-)
+
+Index: gcc-4.3.1/gcc/config/rs6000/e300c2c3.md
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc-4.3.1/gcc/config/rs6000/e300c2c3.md	2008-08-23 16:51:33.000000000 -0700
+@@ -0,0 +1,189 @@
++;; Pipeline description for Motorola PowerPC e300c3 core.
++;;   Copyright (C) 2003 Free Software Foundation, Inc.
++;;
++;; This file is part of GCC.
++
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published
++;; by the Free Software Foundation; either version 2, or (at your
++;; option) any later version.
++
++;; GCC is distributed in the hope that it will be useful, but WITHOUT
++;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++;; License for more details.
++
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING.  If not, write to the
++;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
++;; MA 02111-1307, USA.
++
++(define_automaton "ppce300c3_most,ppce300c3_long,ppce300c3_retire")
++(define_cpu_unit "ppce300c3_decode_0,ppce300c3_decode_1" "ppce300c3_most")
++
++;; We don't simulate general issue queue (GIC).  If we have SU insn
++;; and then SU1 insn, they can not be issued on the same cycle
++;; (although SU1 insn and then SU insn can be issued) because the SU
++;; insn will go to SU1 from GIC0 entry.  Fortunately, the first cycle
++;; multipass insn scheduling will find the situation and issue the SU1
++;; insn and then the SU insn.
++(define_cpu_unit "ppce300c3_issue_0,ppce300c3_issue_1"   "ppce300c3_most")
++
++;; We could describe completion buffers slots in combination with the
++;; retirement units and the order of completion but the result
++;; automaton would behave in the same way because we can not describe
++;; real latency time with taking in order completion into account.
++;; Actually we could define the real latency time by querying reserved
++;; automaton units but the current scheduler uses latency time before
++;; issuing insns and making any reservations.
++;;
++;; So our description is aimed to achieve a insn schedule in which the
++;; insns would not wait in the completion buffer.
++(define_cpu_unit "ppce300c3_retire_0,ppce300c3_retire_1" "ppce300c3_retire")
++
++;; Branch unit:
++(define_cpu_unit "ppce300c3_bu" "ppce300c3_most")
++
++;; IU:
++(define_cpu_unit "ppce300c3_iu0_stage0,ppce300c3_iu1_stage0" "ppce300c3_most")
++
++;; IU: This used to describe non-pipelined division.
++(define_cpu_unit "ppce300c3_mu_div" "ppce300c3_long")
++
++;; SRU:
++(define_cpu_unit "ppce300c3_sru_stage0" "ppce300c3_most")
++
++;; Here we simplified LSU unit description not describing the stages.
++(define_cpu_unit "ppce300c3_lsu" "ppce300c3_most")
++
++;; FPU:
++(define_cpu_unit "ppce300c3_fpu" "ppce300c3_most")
++
++;; The following units are used to make automata deterministic
++(define_cpu_unit "present_ppce300c3_decode_0" "ppce300c3_most")
++(define_cpu_unit "present_ppce300c3_issue_0" "ppce300c3_most")
++(define_cpu_unit "present_ppce300c3_retire_0" "ppce300c3_retire")
++(define_cpu_unit "present_ppce300c3_iu0_stage0" "ppce300c3_most")
++
++;; The following sets to make automata deterministic when option ndfa is used.
++(presence_set "present_ppce300c3_decode_0" "ppce300c3_decode_0")
++(presence_set "present_ppce300c3_issue_0" "ppce300c3_issue_0")
++(presence_set "present_ppce300c3_retire_0" "ppce300c3_retire_0")
++(presence_set "present_ppce300c3_iu0_stage0" "ppce300c3_iu0_stage0")
++
++;; Some useful abbreviations.
++(define_reservation "ppce300c3_decode"
++    "ppce300c3_decode_0|ppce300c3_decode_1+present_ppce300c3_decode_0")
++(define_reservation "ppce300c3_issue"
++    "ppce300c3_issue_0|ppce300c3_issue_1+present_ppce300c3_issue_0")
++(define_reservation "ppce300c3_retire"
++   "ppce300c3_retire_0|ppce300c3_retire_1+present_ppce300c3_retire_0")
++(define_reservation "ppce300c3_iu_stage0"
++   "ppce300c3_iu0_stage0|ppce300c3_iu1_stage0+present_ppce300c3_iu0_stage0")
++
++;; Compares can be executed either one of the IU or SRU
++(define_insn_reservation "ppce300c3_cmp" 1
++  (and (eq_attr "type" "cmp,compare,delayed_compare,fast_compare")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+(ppce300c3_iu_stage0|ppce300c3_sru_stage0) \
++        +ppce300c3_retire")
++
++;; Other one cycle IU insns
++(define_insn_reservation "ppce300c3_iu" 1
++  (and (eq_attr "type" "integer,insert_word")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_retire")
++
++;; Branch.  Actually this latency time is not used by the scheduler.
++(define_insn_reservation "ppce300c3_branch" 1
++  (and (eq_attr "type" "jmpreg,branch")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_bu,ppce300c3_retire")
++
++;; Multiply is non-pipelined but can be executed in any IU
++(define_insn_reservation "ppce300c3_multiply" 2
++  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0, \
++   ppce300c3_iu_stage0+ppce300c3_retire")
++
++;; Divide.  We use the average latency time here.  We omit reserving a
++;; retire unit because of the result automata will be huge.
++(define_insn_reservation "ppce300c3_divide" 20
++  (and (eq_attr "type" "idiv")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_iu_stage0+ppce300c3_mu_div,\
++   ppce300c3_mu_div*19")
++
++;; CR logical
++(define_insn_reservation "ppce300c3_cr_logical" 1
++  (and (eq_attr "type" "cr_logical,delayed_cr")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
++
++;; Mfcr
++(define_insn_reservation "ppce300c3_mfcr" 1
++  (and (eq_attr "type" "mfcr")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
++
++;; Mtcrf
++(define_insn_reservation "ppce300c3_mtcrf" 1
++  (and (eq_attr "type" "mtcr")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
++
++;; Mtjmpr
++(define_insn_reservation "ppce300c3_mtjmpr" 1
++  (and (eq_attr "type" "mtjmpr,mfjmpr")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_sru_stage0+ppce300c3_retire")
++
++;; Float point instructions
++(define_insn_reservation "ppce300c3_fpcompare" 3
++  (and (eq_attr "type" "fpcompare")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
++
++(define_insn_reservation "ppce300c3_fp" 3
++  (and (eq_attr "type" "fp")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,nothing,ppce300c3_retire")
++
++(define_insn_reservation "ppce300c3_dmul" 4
++  (and (eq_attr "type" "dmul")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu,nothing,ppce300c3_retire")
++
++; Divides are not pipelined
++(define_insn_reservation "ppce300c3_sdiv" 18
++  (and (eq_attr "type" "sdiv")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*17")
++
++(define_insn_reservation "ppce300c3_ddiv" 33
++  (and (eq_attr "type" "ddiv")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_fpu,ppce300c3_fpu*32")
++
++;; Loads
++(define_insn_reservation "ppce300c3_load" 2
++  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
++
++(define_insn_reservation "ppce300c3_fpload" 2
++  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
++
++;; Stores.
++(define_insn_reservation "ppce300c3_store" 2
++  (and (eq_attr "type" "store,store_ux,store_u")
++       (ior (eq_attr "cpu" "ppce300c2") (eq_attr "cpu" "ppce300c3")))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
++
++(define_insn_reservation "ppce300c3_fpstore" 2
++  (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
++       (eq_attr "cpu" "ppce300c3"))
++  "ppce300c3_decode,ppce300c3_issue+ppce300c3_lsu,ppce300c3_retire")
+Index: gcc-4.3.1/gcc/config/rs6000/rs6000.c
+===================================================================
+--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.c	2008-08-23 16:49:39.000000000 -0700
++++ gcc-4.3.1/gcc/config/rs6000/rs6000.c	2008-08-23 16:54:25.000000000 -0700
+@@ -669,6 +669,21 @@ struct processor_costs ppc8540_cost = {
+   1,			/* prefetch streams /*/
+ };
+ 
++/* Instruction costs on E300C2 and E300C3 cores.  */
++static const
++struct processor_costs ppce300c2c3_cost = {
++  COSTS_N_INSNS (4),    /* mulsi */
++  COSTS_N_INSNS (4),    /* mulsi_const */
++  COSTS_N_INSNS (4),    /* mulsi_const9 */
++  COSTS_N_INSNS (4),    /* muldi */
++  COSTS_N_INSNS (19),   /* divsi */
++  COSTS_N_INSNS (19),   /* divdi */
++  COSTS_N_INSNS (3),    /* fp */
++  COSTS_N_INSNS (4),    /* dmul */
++  COSTS_N_INSNS (18),   /* sdiv */
++  COSTS_N_INSNS (33),   /* ddiv */
++};
++
+ /* Instruction costs on POWER4 and POWER5 processors.  */
+ static const
+ struct processor_costs power4_cost = {
+@@ -1420,6 +1435,8 @@ rs6000_override_options (const char *def
+ 	 {"8540", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
+ 	 /* 8548 has a dummy entry for now.  */
+ 	 {"8548", PROCESSOR_PPC8540, POWERPC_BASE_MASK | MASK_STRICT_ALIGN},
++	 {"e300c2", PROCESSOR_PPCE300C2, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
++	 {"e300c3", PROCESSOR_PPCE300C3, POWERPC_BASE_MASK},
+ 	 {"860", PROCESSOR_MPCCORE, POWERPC_BASE_MASK | MASK_SOFT_FLOAT},
+ 	 {"970", PROCESSOR_POWER4,
+ 	  POWERPC_7400_MASK | MASK_PPC_GPOPT | MASK_MFCRF | MASK_POWERPC64},
+@@ -1845,6 +1862,11 @@ rs6000_override_options (const char *def
+ 	rs6000_cost = &ppc8540_cost;
+ 	break;
+ 
++      case PROCESSOR_PPCE300C2:
++      case PROCESSOR_PPCE300C3:
++	rs6000_cost = &ppce300c2c3_cost;
++	break;
++
+       case PROCESSOR_POWER4:
+       case PROCESSOR_POWER5:
+ 	rs6000_cost = &power4_cost;
+@@ -18606,6 +18628,8 @@ rs6000_issue_rate (void)
+   case CPU_PPC7400:
+   case CPU_PPC8540:
+   case CPU_CELL:
++  case CPU_PPCE300C2:
++  case CPU_PPCE300C3:
+     return 2;
+   case CPU_RIOS2:
+   case CPU_PPC604:
+Index: gcc-4.3.1/gcc/config/rs6000/rs6000.h
+===================================================================
+--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.h	2008-01-26 09:18:35.000000000 -0800
++++ gcc-4.3.1/gcc/config/rs6000/rs6000.h	2008-08-23 16:55:30.000000000 -0700
+@@ -117,6 +117,8 @@
+ %{mcpu=G5: -mpower4 -maltivec} \
+ %{mcpu=8540: -me500} \
+ %{mcpu=8548: -me500} \
++%{mcpu=e300c2: -mppc} \
++%{mcpu=e300c3: -mppc -mpmr} \
+ %{maltivec: -maltivec} \
+ -many"
+ 
+@@ -262,6 +264,8 @@ enum processor_type
+    PROCESSOR_PPC7400,
+    PROCESSOR_PPC7450,
+    PROCESSOR_PPC8540,
++   PROCESSOR_PPCE300C2,
++   PROCESSOR_PPCE300C3,
+    PROCESSOR_POWER4,
+    PROCESSOR_POWER5,
+    PROCESSOR_POWER6,
+Index: gcc-4.3.1/gcc/config/rs6000/rs6000.md
+===================================================================
+--- gcc-4.3.1.orig/gcc/config/rs6000/rs6000.md	2008-02-13 16:14:45.000000000 -0800
++++ gcc-4.3.1/gcc/config/rs6000/rs6000.md	2008-08-23 16:57:29.000000000 -0700
+@@ -133,7 +133,7 @@
+ ;; Processor type -- this attribute must exactly match the processor_type
+ ;; enumeration in rs6000.h.
+ 
+-(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell"
++(define_attr "cpu" "rios1,rios2,rs64a,mpccore,ppc403,ppc405,ppc440,ppc601,ppc603,ppc604,ppc604e,ppc620,ppc630,ppc750,ppc7400,ppc7450,ppc8540,power4,power5,power6,cell,ppce300c2,ppce300c3"
+   (const (symbol_ref "rs6000_cpu_attr")))
+ 
+ 
+@@ -166,6 +166,7 @@
+ (include "7xx.md")
+ (include "7450.md")
+ (include "8540.md")
++(include "e300c2c3.md")
+ (include "power4.md")
+ (include "power5.md")
+ (include "power6.md")
+Index: gcc-4.3.1/gcc/config.gcc
+===================================================================
+--- gcc-4.3.1.orig/gcc/config.gcc	2008-08-23 16:49:43.000000000 -0700
++++ gcc-4.3.1/gcc/config.gcc	2008-08-23 17:03:55.000000000 -0700
+@@ -3144,7 +3144,7 @@ case "${target}" in
+ 			| rios | rios1 | rios2 | rsc | rsc1 | rs64a \
+ 			| 401 | 403 | 405 | 405fp | 440 | 440fp | 505 \
+ 			| 601 | 602 | 603 | 603e | ec603e | 604 \
+-			| 604e | 620 | 630 | 740 | 750 | 7400 | 7450 \
++			| 604e | 620 | 630 | 740 | 750 | 7400 | 7450 | e300c[23] \
+ 			| 854[08] | 801 | 821 | 823 | 860 | 970 | G3 | G4 | G5 | cell)
+ 				# OK
+ 				;;
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch
new file mode 100644
index 0000000000..f33e6c1ea6
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch
@@ -0,0 +1,31 @@
+---
+ configure    |    2 +-
+ configure.ac |    2 +-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+
+Index: gcc-4.3.1/configure.ac
+===================================================================
+--- gcc-4.3.1.orig/configure.ac	2008-07-21 12:29:18.000000000 -0700
++++ gcc-4.3.1/configure.ac	2008-07-21 12:29:35.000000000 -0700
+@@ -2352,7 +2352,7 @@ fi
+ # for target_alias and gcc doesn't manage it consistently.
+ target_configargs="--cache-file=./config.cache ${target_configargs}"
+ 
+-FLAGS_FOR_TARGET=
++FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET"
+ case " $target_configdirs " in
+  *" newlib "*)
+   case " $target_configargs " in
+Index: gcc-4.3.1/configure
+===================================================================
+--- gcc-4.3.1.orig/configure	2008-07-21 12:29:48.000000000 -0700
++++ gcc-4.3.1/configure	2008-07-21 12:29:59.000000000 -0700
+@@ -5841,7 +5841,7 @@ fi
+ # for target_alias and gcc doesn't manage it consistently.
+ target_configargs="--cache-file=./config.cache ${target_configargs}"
+ 
+-FLAGS_FOR_TARGET=
++FLAGS_FOR_TARGET="$ARCH_FLAGS_FOR_TARGET"
+ case " $target_configdirs " in
+  *" newlib "*)
+   case " $target_configargs " in
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.5.0_to_svn_162697.patch.bz2 b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.5.0_to_svn_162697.patch.bz2
new file mode 100644
index 0000000000..d37a2c0329
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-4.5.0_to_svn_162697.patch.bz2
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-arm-volatile-bitfield-fix.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-arm-volatile-bitfield-fix.patch
new file mode 100644
index 0000000000..d5a31d19d8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-arm-volatile-bitfield-fix.patch
@@ -0,0 +1,103 @@
+Date: Mon, 22 Nov 2010 13:28:54 +0000
+From: Julian Brown <julian at codesourcery dot com>
+To: gcc-patches at gcc dot gnu dot org
+Cc: DJ Delorie <dj at redhat dot com>
+Subject: [PATCH] Volatile bitfields vs. inline asm memory constraints
+Message-ID: <20101122132854.0aca431a@rex.config>
+Mime-Version: 1.0
+Content-Type: multipart/mixed; boundary="MP_/ONpW806RnQ1ziaYj7_Y5E27"
+X-IsSubscribed: yes
+Mailing-List: contact gcc-patches-help at gcc dot gnu dot org; run by ezmlm
+Precedence: bulk
+List-Id: <gcc-patches.gcc.gnu.org>
+List-Archive: <http://gcc.gnu.org/ml/gcc-patches/>
+List-Post: <mailto:gcc-patches at gcc dot gnu dot org>
+List-Help: <mailto:gcc-patches-help at gcc dot gnu dot org>
+Sender: gcc-patches-owner at gcc dot gnu dot org
+Delivered-To: mailing list gcc-patches at gcc dot gnu dot org
+
+
+
+Hi,
+
+This patch fixes the issue in the (Launchpad, not GCC) bug tracker:
+
+https://bugs.launchpad.net/gcc-linaro/+bug/675347
+
+The problem was introduced by the patch from DJ to honour volatile
+bitfield types:
+
+http://gcc.gnu.org/ml/gcc-patches/2010-06/msg01167.html
+
+but not exposed (on ARM) until the option was made the default (on the
+Linaro branch) -- it's not yet the default on mainline.
+
+The issue is as follows: after DJ's patch and with
+-fstrict-volatile-bitfields, in expr.c:expand_expr_real_1, the if
+condition with the comment "In cases where an aligned union has an
+unaligned object as a field, we might be extracting a BLKmode value
+from an integer-mode (e.g., SImode) object [...]" triggers for a normal
+(non-bitfield) volatile field of a struct/class.
+
+But, this appears to be over-eager: in the particular case mentioned
+above, when expanding a "volatile int" struct field used as a memory
+constraint for an inline asm, we end up with something which is no
+longer addressable (I think because of the actions of
+extract_bit_field). So, compilation aborts.
+
+My proposed fix is to restrict the conditional by only making it execute
+for -fstrict-volatile-bitfields only for non-naturally-aligned accesses:
+this appears to work (fixes test in question, and no regressions for
+cross to ARM Linux, gcc/g++/libstdc++, with -fstrict-volatile-bitfields
+turned on), but I don't know if there will be unintended consequences.
+DJ, does it look sane to you?
+
+Incidentally the constraints in the inline asm in the Launchpad
+testcase might be slightly dubious (attempting to force (mem (reg)) by
+using both "+m" (var) and "r" (&var) constraints), but replacing
+them with e.g.:
+
+    asm volatile("0:\n"
+                 "ldrex %[newValue], %[_q_value]\n"
+                 "sub %[newValue], %[newValue], #1\n"
+                 "strex %[result], %[newValue], %[_q_value]\n"
+                 "teq %[result], #0\n"
+                 "bne 0b\n"
+                 : [newValue] "=&r" (newValue),
+                   [result] "=&r" (result)
+                 : [_q_value] "Q" (_q_value)
+                 : "cc", "memory");
+
+still leads to a warning (not an error) with trunk and
+-fstrict-volatile-bitfields:
+
+atomic-changed.cc:24:35: warning: use of memory input without lvalue in
+asm operand 2 is deprecated [enabled by default]
+
+The warning goes away with the attached patch. So, I don't think the
+problem is purely that the original inline asm is invalid.
+
+OK to apply, or any comments?
+
+Julian
+
+ChangeLog
+
+    gcc/
+    * expr.c (expand_expr_real_1): Only use BLKmode for volatile
+    accesses which are not naturally aligned.
+
+Index: gcc-4_5-branch/gcc/expr.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/expr.c	2010-12-23 00:42:11.690101002 -0800
++++ gcc-4_5-branch/gcc/expr.c	2010-12-24 15:07:39.400101000 -0800
+@@ -9029,7 +9029,8 @@
+ 		&& modifier != EXPAND_INITIALIZER)
+ 	    /* If the field is volatile, we always want an aligned
+ 	       access.  */
+-	    || (volatilep && flag_strict_volatile_bitfields > 0)
++	    || (volatilep && flag_strict_volatile_bitfields > 0
++		&& (bitpos % GET_MODE_ALIGNMENT (mode) != 0))
+ 	    /* If the field isn't aligned enough to fetch as a memref,
+ 	       fetch it as a bit field.  */
+ 	    || (mode1 != BLKmode
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-armv4-pass-fix-v4bx-to-ld.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-armv4-pass-fix-v4bx-to-ld.patch
new file mode 100644
index 0000000000..5d1a033a9b
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-armv4-pass-fix-v4bx-to-ld.patch
@@ -0,0 +1,29 @@
+The LINK_SPEC for linux gets overwritten by linux-eabi.h which
+means the value of TARGET_FIX_V4BX_SPEC gets lost and as a result
+the option is not passed to linker when chosing march=armv4
+This patch redefines this in linux-eabi.h and reinserts it
+for eabi defaulting toolchains.
+
+We might want to send it upstream
+
+-Khem
+Index: gcc-4.5/gcc/config/arm/linux-eabi.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/linux-eabi.h
++++ gcc-4.5/gcc/config/arm/linux-eabi.h
+@@ -63,10 +63,14 @@
+ #undef  GLIBC_DYNAMIC_LINKER
+ #define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.3"
+ 
++/* For armv4 we pass --fix-v4bx to linker to support EABI */
++#undef TARGET_FIX_V4BX_SPEC
++#define TARGET_FIX_V4BX_SPEC " %{mcpu=arm8|mcpu=arm810|mcpu=strongarm*|march=armv4:--fix-v4bx}"
++
+ /* At this point, bpabi.h will have clobbered LINK_SPEC.  We want to
+    use the GNU/Linux version, not the generic BPABI version.  */
+ #undef  LINK_SPEC
+-#define LINK_SPEC LINUX_TARGET_LINK_SPEC BE8_LINK_SPEC
++#define LINK_SPEC LINUX_TARGET_LINK_SPEC BE8_LINK_SPEC TARGET_FIX_V4BX_SPEC
+ 
+ /* Use the default LIBGCC_SPEC, not the version in linux-elf.h, as we
+    do not use -lfloat.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-flags-for-build.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-flags-for-build.patch
new file mode 100644
index 0000000000..51892855af
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-flags-for-build.patch
@@ -0,0 +1,178 @@
+Index: gcc-4.5/Makefile.def
+===================================================================
+--- gcc-4.5.orig/Makefile.def
++++ gcc-4.5/Makefile.def
+@@ -240,6 +240,7 @@ flags_to_pass = { flag= AWK ; };
+ flags_to_pass = { flag= BISON ; };
+ flags_to_pass = { flag= CC_FOR_BUILD ; };
+ flags_to_pass = { flag= CFLAGS_FOR_BUILD ; };
++flags_to_pass = { flag= CPPFLAGS_FOR_BUILD ; };
+ flags_to_pass = { flag= CXX_FOR_BUILD ; };
+ flags_to_pass = { flag= EXPECT ; };
+ flags_to_pass = { flag= FLEX ; };
+Index: gcc-4.5/gcc/Makefile.in
+===================================================================
+--- gcc-4.5.orig/gcc/Makefile.in
++++ gcc-4.5/gcc/Makefile.in
+@@ -766,7 +766,7 @@ BUILD_LINKERFLAGS = $(BUILD_CFLAGS)
+ 
+ # Native linker and preprocessor flags.  For x-fragment overrides.
+ BUILD_LDFLAGS=@BUILD_LDFLAGS@
+-BUILD_CPPFLAGS=$(ALL_CPPFLAGS)
++BUILD_CPPFLAGS=$(INCLUDES) @BUILD_CPPFLAGS@ $(X_CPPFLAGS)
+ 
+ # Actual name to use when installing a native compiler.
+ GCC_INSTALL_NAME := $(shell echo gcc|sed '$(program_transform_name)')
+Index: gcc-4.5/gcc/configure.ac
+===================================================================
+--- gcc-4.5.orig/gcc/configure.ac
++++ gcc-4.5/gcc/configure.ac
+@@ -1798,16 +1798,18 @@ AC_SUBST(inhibit_libc)
+ # Also, we cannot run fixincludes.
+ 
+ # These are the normal (build=host) settings:
+-CC_FOR_BUILD='$(CC)'		AC_SUBST(CC_FOR_BUILD)
+-BUILD_CFLAGS='$(ALL_CFLAGS)'	AC_SUBST(BUILD_CFLAGS)
+-BUILD_LDFLAGS='$(LDFLAGS)'	AC_SUBST(BUILD_LDFLAGS)
+-STMP_FIXINC=stmp-fixinc		AC_SUBST(STMP_FIXINC)
++CC_FOR_BUILD='$(CC)'			AC_SUBST(CC_FOR_BUILD)
++BUILD_CFLAGS='$(ALL_CFLAGS)'		AC_SUBST(BUILD_CFLAGS)
++BUILD_LDFLAGS='$(LDFLAGS)'		AC_SUBST(BUILD_LDFLAGS)
++BUILD_CPPFLAGS='$(ALL_CPPFLAGS)'	AC_SUBST(BUILD_CPPFLAGS)
++STMP_FIXINC=stmp-fixinc			AC_SUBST(STMP_FIXINC)
+ 
+ # And these apply if build != host, or we are generating coverage data
+ if test x$build != x$host || test "x$coverage_flags" != x
+ then
+     BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'
+     BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'
++    BUILD_CPPFLAGS='$(CPPFLAGS_FOR_BUILD)'
+ fi
+ 
+ # Expand extra_headers to include complete path.
+Index: gcc-4.5/Makefile.in
+===================================================================
+--- gcc-4.5.orig/Makefile.in
++++ gcc-4.5/Makefile.in
+@@ -333,6 +333,7 @@ AR_FOR_BUILD = @AR_FOR_BUILD@
+ AS_FOR_BUILD = @AS_FOR_BUILD@
+ CC_FOR_BUILD = @CC_FOR_BUILD@
+ CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
++CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
+ CXXFLAGS_FOR_BUILD = @CXXFLAGS_FOR_BUILD@
+ CXX_FOR_BUILD = @CXX_FOR_BUILD@
+ DLLTOOL_FOR_BUILD = @DLLTOOL_FOR_BUILD@
+@@ -662,6 +663,7 @@ BASE_FLAGS_TO_PASS = \
+ 	"BISON=$(BISON)" \
+ 	"CC_FOR_BUILD=$(CC_FOR_BUILD)" \
+ 	"CFLAGS_FOR_BUILD=$(CFLAGS_FOR_BUILD)" \
++	"CPPFLAGS_FOR_BUILD=$(CPPFLAGS_FOR_BUILD)" \
+ 	"CXX_FOR_BUILD=$(CXX_FOR_BUILD)" \
+ 	"EXPECT=$(EXPECT)" \
+ 	"FLEX=$(FLEX)" \
+Index: gcc-4.5/gcc/configure
+===================================================================
+--- gcc-4.5.orig/gcc/configure
++++ gcc-4.5/gcc/configure
+@@ -707,6 +707,7 @@ SED
+ LIBTOOL
+ collect2
+ STMP_FIXINC
++BUILD_CPPFLAGS
+ BUILD_LDFLAGS
+ BUILD_CFLAGS
+ CC_FOR_BUILD
+@@ -10982,6 +10983,7 @@ fi
+ CC_FOR_BUILD='$(CC)'
+ BUILD_CFLAGS='$(ALL_CFLAGS)'
+ BUILD_LDFLAGS='$(LDFLAGS)'
++BUILD_CPPFLAGS='$(ALL_CPPFLAGS)'
+ STMP_FIXINC=stmp-fixinc
+ 
+ # And these apply if build != host, or we are generating coverage data
+@@ -10989,6 +10991,7 @@ if test x$build != x$host || test "x$cov
+ then
+     BUILD_CFLAGS='$(INTERNAL_CFLAGS) $(T_CFLAGS) $(CFLAGS_FOR_BUILD)'
+     BUILD_LDFLAGS='$(LDFLAGS_FOR_BUILD)'
++    BUILD_CPPFLAGS='$(CPPFLAGS_FOR_BUILD)'
+ fi
+ 
+ # Expand extra_headers to include complete path.
+@@ -17108,7 +17111,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 17111 "configure"
++#line 17114 "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+@@ -17214,7 +17217,7 @@ else
+   lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
+   lt_status=$lt_dlunknown
+   cat > conftest.$ac_ext <<_LT_EOF
+-#line 17217 "configure"
++#line 17220 "configure"
+ #include "confdefs.h"
+ 
+ #if HAVE_DLFCN_H
+Index: gcc-4.5/Makefile.tpl
+===================================================================
+--- gcc-4.5.orig/Makefile.tpl
++++ gcc-4.5/Makefile.tpl
+@@ -336,6 +336,7 @@ AR_FOR_BUILD = @AR_FOR_BUILD@
+ AS_FOR_BUILD = @AS_FOR_BUILD@
+ CC_FOR_BUILD = @CC_FOR_BUILD@
+ CFLAGS_FOR_BUILD = @CFLAGS_FOR_BUILD@
++CPPFLAGS_FOR_BUILD = @CPPFLAGS_FOR_BUILD@
+ CXXFLAGS_FOR_BUILD = @CXXFLAGS_FOR_BUILD@
+ CXX_FOR_BUILD = @CXX_FOR_BUILD@
+ DLLTOOL_FOR_BUILD = @DLLTOOL_FOR_BUILD@
+Index: gcc-4.5/configure
+===================================================================
+--- gcc-4.5.orig/configure
++++ gcc-4.5/configure
+@@ -651,6 +651,7 @@ GCJ_FOR_BUILD
+ DLLTOOL_FOR_BUILD
+ CXX_FOR_BUILD
+ CXXFLAGS_FOR_BUILD
++CPPFLAGS_FOR_BUILD
+ CFLAGS_FOR_BUILD
+ CC_FOR_BUILD
+ AS_FOR_BUILD
+@@ -8036,6 +8037,7 @@ esac
+ # our build compiler if desired.
+ if test x"${build}" = x"${host}" ; then
+   CFLAGS_FOR_BUILD=${CFLAGS_FOR_BUILD-${CFLAGS}}
++  CPPFLAGS_FOR_BUILD=${CPPFLAGS_FOR_BUILD-${CPPFLAGS}}
+   CXXFLAGS_FOR_BUILD=${CXXFLAGS_FOR_BUILD-${CXXFLAGS}}
+   LDFLAGS_FOR_BUILD=${LDFLAGS_FOR_BUILD-${LDFLAGS}}
+ fi
+@@ -8101,6 +8103,7 @@ done
+ 
+ 
+ 
++
+ 
+ 
+ 
+Index: gcc-4.5/configure.ac
+===================================================================
+--- gcc-4.5.orig/configure.ac
++++ gcc-4.5/configure.ac
+@@ -3089,6 +3089,7 @@ esac
+ # our build compiler if desired.
+ if test x"${build}" = x"${host}" ; then
+   CFLAGS_FOR_BUILD=${CFLAGS_FOR_BUILD-${CFLAGS}}
++  CPPFLAGS_FOR_BUILD=${CPPFLAGS_FOR_BUILD-${CPPFLAGS}}
+   CXXFLAGS_FOR_BUILD=${CXXFLAGS_FOR_BUILD-${CXXFLAGS}}
+   LDFLAGS_FOR_BUILD=${LDFLAGS_FOR_BUILD-${LDFLAGS}}
+ fi
+@@ -3155,6 +3156,7 @@ AC_SUBST(AR_FOR_BUILD)
+ AC_SUBST(AS_FOR_BUILD)
+ AC_SUBST(CC_FOR_BUILD)
+ AC_SUBST(CFLAGS_FOR_BUILD)
++AC_SUBST(CPPFLAGS_FOR_BUILD)
+ AC_SUBST(CXXFLAGS_FOR_BUILD)
+ AC_SUBST(CXX_FOR_BUILD)
+ AC_SUBST(DLLTOOL_FOR_BUILD)
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ice-hack.dpatch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ice-hack.dpatch
new file mode 100644
index 0000000000..84c5ef2ebd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-ice-hack.dpatch
@@ -0,0 +1,331 @@
+#! /bin/sh -e
+
+# DP: Retry the build on an ice, save the calling options and preprocessed
+# DP: source when the ice is reproducible.
+
+dir=
+if [ $# -eq 3 -a "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+    -patch)
+        patch $pdir -f --no-backup-if-mismatch -p0 < $0
+        ;;
+    -unpatch)
+        patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
+        ;;
+    *)
+        echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+        exit 1
+esac
+exit 0
+
+2004-01-23  Jakub Jelinek  <jakub@redhat.com>
+
+	* system.h (ICE_EXIT_CODE): Define.
+	* gcc.c (execute): Don't free first string early, but at the end
+	of the function.  Call retry_ice if compiler exited with
+	ICE_EXIT_CODE.
+	(retry_ice): New function.
+	* diagnostic.c (diagnostic_count_diagnostic,
+	diagnostic_action_after_output, error_recursion): Exit with
+	ICE_EXIT_CODE instead of FATAL_EXIT_CODE.
+
+--- gcc/diagnostic.c.orig	2007-09-30 10:48:13.000000000 +0000
++++ gcc/diagnostic.c	2007-09-30 10:49:57.000000000 +0000
+@@ -244,7 +244,7 @@
+       fnotice (stderr, "Please submit a full bug report,\n"
+ 	       "with preprocessed source if appropriate.\n"
+ 	       "See %s for instructions.\n", bug_report_url);
+-      exit (ICE_EXIT_CODE);
++      exit (FATAL_EXIT_CODE);
+ 
+     case DK_FATAL:
+       if (context->abort_on_error)
+--- gcc/gcc.c.orig	2007-09-30 10:48:13.000000000 +0000
++++ gcc/gcc.c	2007-09-30 10:48:39.000000000 +0000
+@@ -357,6 +357,9 @@
+ #if defined(HAVE_TARGET_OBJECT_SUFFIX) || defined(HAVE_TARGET_EXECUTABLE_SUFFIX)
+ static const char *convert_filename (const char *, int, int);
+ #endif
++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
++static void retry_ice (const char *prog, const char **argv);
++#endif
+ 
+ static const char *getenv_spec_function (int, const char **);
+ static const char *if_exists_spec_function (int, const char **);
+@@ -2999,7 +3002,7 @@
+ 	    }
+ 	}
+ 
+-      if (string != commands[i].prog)
++      if (i && string != commands[i].prog)
+ 	free (CONST_CAST (char *, string));
+     }
+ 
+@@ -3056,6 +3059,16 @@
+ 	else if (WIFEXITED (status)
+ 		 && WEXITSTATUS (status) >= MIN_FATAL_STATUS)
+ 	  {
++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
++	    /* For ICEs in cc1, cc1obj, cc1plus see if it is
++	       reproducible or not.  */
++	    char *p;
++	    if (WEXITSTATUS (status) == ICE_EXIT_CODE
++		&& i == 0
++		&& (p = strrchr (commands[0].argv[0], DIR_SEPARATOR))
++		&& ! strncmp (p + 1, "cc1", 3))
++	      retry_ice (commands[0].prog, commands[0].argv);
++#endif
+ 	    if (WEXITSTATUS (status) > greatest_status)
+ 	      greatest_status = WEXITSTATUS (status);
+ 	    ret_code = -1;
+@@ -3076,6 +3089,9 @@
+ 	  }
+       }
+ 
++    if (commands[0].argv[0] != commands[0].prog)
++      free ((PTR) commands[0].argv[0]);
++
+     return ret_code;
+   }
+ }
+@@ -6016,6 +6032,224 @@
+   switches[switchnum].validated = 1;
+ }
+ 
++#if !(defined (__MSDOS__) || defined (OS2) || defined (VMS))
++#define RETRY_ICE_ATTEMPTS 2
++
++static void
++retry_ice (const char *prog, const char **argv)
++{
++  int nargs, out_arg = -1, quiet = 0, attempt;
++  int pid, retries, sleep_interval;
++  const char **new_argv;
++  char *temp_filenames[RETRY_ICE_ATTEMPTS * 2 + 2];
++
++  if (input_filename == NULL || ! strcmp (input_filename, "-"))
++    return;
++
++  for (nargs = 0; argv[nargs] != NULL; ++nargs)
++    /* Only retry compiler ICEs, not preprocessor ones.  */
++    if (! strcmp (argv[nargs], "-E"))
++      return;
++    else if (argv[nargs][0] == '-' && argv[nargs][1] == 'o')
++      {
++	if (out_arg == -1)
++	  out_arg = nargs;
++	else
++	  return;
++      }
++    /* If the compiler is going to output any time information,
++       it might vary between invocations.  */
++    else if (! strcmp (argv[nargs], "-quiet"))
++      quiet = 1;
++    else if (! strcmp (argv[nargs], "-ftime-report"))
++      return;
++
++  if (out_arg == -1 || !quiet)
++    return;
++
++  memset (temp_filenames, '\0', sizeof (temp_filenames));
++  new_argv = alloca ((nargs + 3) * sizeof (const char *));
++  memcpy (new_argv, argv, (nargs + 1) * sizeof (const char *));
++  new_argv[nargs++] = "-frandom-seed=0";
++  new_argv[nargs] = NULL;
++  if (new_argv[out_arg][2] == '\0')
++    new_argv[out_arg + 1] = "-";
++  else
++    new_argv[out_arg] = "-o-";
++
++  for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS + 1; ++attempt)
++    {
++      int fd = -1;
++      int status;
++
++      temp_filenames[attempt * 2] = make_temp_file (".out");
++      temp_filenames[attempt * 2 + 1] = make_temp_file (".err");
++
++      if (attempt == RETRY_ICE_ATTEMPTS)
++        {
++	  int i;
++	  int fd1, fd2;
++	  struct stat st1, st2;
++	  size_t n, len;
++	  char *buf;
++
++	  buf = xmalloc (8192);
++
++	  for (i = 0; i < 2; ++i)
++	    {
++	      fd1 = open (temp_filenames[i], O_RDONLY);
++	      fd2 = open (temp_filenames[2 + i], O_RDONLY);
++
++	      if (fd1 < 0 || fd2 < 0)
++		{
++		  i = -1;
++		  close (fd1);
++		  close (fd2);
++		  break;
++		}
++
++	      if (fstat (fd1, &st1) < 0 || fstat (fd2, &st2) < 0)
++		{
++		  i = -1;
++		  close (fd1);
++		  close (fd2);
++		  break;
++		}
++
++	      if (st1.st_size != st2.st_size)
++		{
++		  close (fd1);
++		  close (fd2);
++		  break;
++		}
++
++	      len = 0;
++	      for (n = st1.st_size; n; n -= len)
++		{
++		  len = n;
++		  if (len > 4096)
++		    len = 4096;
++
++		  if (read (fd1, buf, len) != (int) len
++		      || read (fd2, buf + 4096, len) != (int) len)
++		    {
++		      i = -1;
++		      break;
++		    }
++
++		  if (memcmp (buf, buf + 4096, len) != 0)
++		    break;
++		}
++
++	      close (fd1);
++	      close (fd2);
++
++	      if (n)
++		break;
++	    }
++
++	  free (buf);
++	  if (i == -1)
++	    break;
++
++	  if (i != 2)
++	    {
++	      notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
++	      break;
++	    }
++
++          fd = open (temp_filenames[attempt * 2], O_RDWR);
++	  if (fd < 0)
++	    break;
++	  write (fd, "//", 2);
++	  for (i = 0; i < nargs; i++)
++	    {
++	      write (fd, " ", 1);
++	      write (fd, new_argv[i], strlen (new_argv[i]));
++	    }
++	  write (fd, "\n", 1);
++	  new_argv[nargs] = "-E";
++	  new_argv[nargs + 1] = NULL;
++        }
++
++      /* Fork a subprocess; wait and retry if it fails.  */
++      sleep_interval = 1;
++      pid = -1;
++      for (retries = 0; retries < 4; retries++)
++	{
++	  pid = fork ();
++	  if (pid >= 0)
++	    break;
++	  sleep (sleep_interval);
++	  sleep_interval *= 2;
++	}
++
++      if (pid < 0)
++	break;
++      else if (pid == 0)
++	{
++	  if (attempt != RETRY_ICE_ATTEMPTS)
++	    fd = open (temp_filenames[attempt * 2], O_RDWR);
++	  if (fd < 0)
++	    exit (-1);
++	  if (fd != 1)
++	    {
++	      close (1);
++	      dup (fd);
++	      close (fd);
++	    }
++
++	  fd = open (temp_filenames[attempt * 2 + 1], O_RDWR);
++	  if (fd < 0)
++	    exit (-1);
++	  if (fd != 2)
++	    {
++	      close (2);
++	      dup (fd);
++	      close (fd);
++	    }
++
++	  if (prog == new_argv[0])
++	    execvp (prog, (char *const *) new_argv);
++	  else
++	    execv (new_argv[0], (char *const *) new_argv);
++	  exit (-1);
++	}
++
++      if (waitpid (pid, &status, 0) < 0)
++	break;
++
++      if (attempt < RETRY_ICE_ATTEMPTS
++	  && (! WIFEXITED (status) || WEXITSTATUS (status) != ICE_EXIT_CODE))
++	{
++	  notice ("The bug is not reproducible, so it is likely a hardware or OS problem.\n");
++	  break;
++	}
++      else if (attempt == RETRY_ICE_ATTEMPTS)
++	{
++	  close (fd);
++	  if (WIFEXITED (status)
++	      && WEXITSTATUS (status) == SUCCESS_EXIT_CODE)
++	    {
++	      notice ("Preprocessed source stored into %s file, please attach this to your bugreport.\n",
++		      temp_filenames[attempt * 2]);
++	      /* Make sure it is not deleted.  */
++	      free (temp_filenames[attempt * 2]);
++	      temp_filenames[attempt * 2] = NULL;
++	      break;
++	    }
++	}
++    }
++
++  for (attempt = 0; attempt < RETRY_ICE_ATTEMPTS * 2 + 2; attempt++)
++    if (temp_filenames[attempt])
++      {
++	unlink (temp_filenames[attempt]);
++	free (temp_filenames[attempt]);
++      }
++}
++#endif
++
+ /* Search for a file named NAME trying various prefixes including the
+    user's -B prefix and some standard ones.
+    Return the absolute file name found.  If nothing is found, return NAME.  */
+--- gcc/Makefile.in.orig	2007-09-30 10:48:13.000000000 +0000
++++ gcc/Makefile.in	2007-09-30 10:48:39.000000000 +0000
+@@ -192,6 +192,7 @@
+ build/gengtype-lex.o-warn = -Wno-error
+ # SYSCALLS.c misses prototypes
+ SYSCALLS.c.X-warn = -Wno-strict-prototypes -Wno-error
++build/gcc.o-warn = -Wno-error
+ 
+ # All warnings have to be shut off in stage1 if the compiler used then
+ # isn't gcc; configure determines that.  WARN_CFLAGS will be either
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-dir-extend.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-dir-extend.patch
new file mode 100644
index 0000000000..d1712071a9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-dir-extend.patch
@@ -0,0 +1,24 @@
+Add /sw/include and /opt/include based on the original
+zecke-no-host-includes.patch patch.  The original patch checked for
+/usr/include, /sw/include and /opt/include and then triggered a failure and
+aborted.
+
+Instead, we add the two missing items to the current scan.  If the user
+wants this to be a failure, they can add "-Werror=poison-system-directories".
+
+Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
+
+diff -ur gcc-4.5.0.orig/gcc/incpath.c gcc-4.5.0/gcc/incpath.c
+--- gcc-4.5.0.orig/gcc/incpath.c	2010-09-29 14:58:31.358975524 -0500
++++ gcc-4.5.0/gcc/incpath.c	2010-09-29 15:08:02.065975516 -0500
+@@ -363,7 +363,9 @@
+          {
+           if ((!strncmp (p->name, "/usr/include", 12))
+               || (!strncmp (p->name, "/usr/local/include", 18))
+-              || (!strncmp (p->name, "/usr/X11R6/include", 18)))
++              || (!strncmp (p->name, "/usr/X11R6/include", 18))
++              || (!strncmp (p->name, "/sw/include", 11))
++              || (!strncmp (p->name, "/opt/include", 12)))
+             warning (OPT_Wpoison_system_directories,
+                      "include location \"%s\" is unsafe for "
+                      "cross-compilation",
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-parameters.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-parameters.patch
new file mode 100644
index 0000000000..3cc7cbad4b
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-parameters.patch
@@ -0,0 +1,83 @@
+gcc: add poison parameters detection
+
+Add the logic that, if not configured with "--enable-target-optspace",
+gcc will meet error when build target app with "-Os" option.
+This could avoid potential binary crash.
+
+Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
+
+diff --git a/gcc/config.in b/gcc/config.in
+index a9e208f..3004321 100644
+--- a/gcc/config.in
++++ b/gcc/config.in
+@@ -132,6 +132,12 @@
+ #endif
+ 
+ 
++/* Define to enable target optspace support. */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_TARGET_OPTSPACE
++#endif
++
++
+ /* Define if you want all operations on RTL (the basic data structure of the
+    optimizer and back end) to be checked for dynamic type safety at runtime.
+    This is quite expensive. */
+diff --git a/gcc/configure b/gcc/configure
+index 2e022ed..004ec0b 100755
+--- a/gcc/configure
++++ b/gcc/configure
+@@ -909,6 +909,7 @@ enable_maintainer_mode
+ enable_version_specific_runtime_libs
+ with_slibdir
+ enable_plugin
++enable_target_optspace
+ '
+       ac_precious_vars='build_alias
+ host_alias
+@@ -25289,6 +25290,13 @@ $as_echo "#define ENABLE_PLUGIN 1" >>confdefs.h
+ 
+ fi
+ 
++if test x"$enable_target_optspace" != x; then :
++
++$as_echo "#define ENABLE_TARGET_OPTSPACE 1" >>confdefs.h
++
++fi
++
++
+ # Configure the subdirectories
+ # AC_CONFIG_SUBDIRS($subdirs)
+ 
+diff --git a/gcc/configure.ac b/gcc/configure.ac
+index ac4ca70..18ec0aa 100644
+--- a/gcc/configure.ac
++++ b/gcc/configure.ac
+@@ -4434,6 +4434,11 @@ if test x"$enable_plugin" = x"yes"; then
+   AC_DEFINE(ENABLE_PLUGIN, 1, [Define to enable plugin support.])
+ fi
+ 
++AC_SUBST(enable_target_optspace)
++if test x"$enable_target_optspace" != x; then
++  AC_DEFINE(ENABLE_TARGET_OPTSPACE, 1, [Define to enable target optspace support.])
++fi
++
+ # Configure the subdirectories
+ # AC_CONFIG_SUBDIRS($subdirs)
+ 
+diff --git a/gcc/opts.c b/gcc/opts.c
+index 139cd26..2fdd96a 100644
+--- a/gcc/opts.c
++++ b/gcc/opts.c
+@@ -945,6 +945,11 @@ decode_options (unsigned int argc, const char **argv)
+   else
+     set_param_value ("min-crossjump-insns", initial_min_crossjump_insns);
+ 
++#ifndef ENABLE_TARGET_OPTSPACE
++  if (optimize_size == 1)
++    error ("Do not use -Os option if --enable-target-optspace is not set.");
++#endif
++
+   if (first_time_p)
+     {
+       /* Initialize whether `char' is signed.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-system-directories.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-system-directories.patch
new file mode 100644
index 0000000000..04043ff0b7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-poison-system-directories.patch
@@ -0,0 +1,201 @@
+       gcc/
+       2008-07-02  Joseph Myers  <joseph@codesourcery.com>
+       * c-incpath.c: Include toplev.h.
+       (merge_include_chains): Use warning instead of cpp_error for
+       system directory poisoning diagnostic.
+       * Makefile.in (c-incpath.o): Depend on toplev.h.
+       * gcc.c (LINK_COMMAND_SPEC): Pass
+       --error-poison-system-directories if
+       -Werror=poison-system-directories.
+
+       2007-06-13  Joseph Myers  <joseph@codesourcery.com>
+       * common.opt (--Wno-poison-system-directories): New.
+       * doc/invoke.texi (-Wno-poison-system-directories): Document.
+       * c-incpath.c: Include flags.h.
+       (merge_include_chains): Check flag_poison_system_directories.
+       * gcc.c (LINK_COMMAND_SPEC): Pass --no-poison-system-directories
+       to linker if -Wno-poison-system-directories.
+       * Makefile.in (c-incpath.o): Depend on $(FLAGS_H).
+
+       2007-03-20  Daniel Jacobowitz  <dan@codesourcery.com>
+                   Joseph Myers  <joseph@codesourcery.com>
+       * configure.ac (--enable-poison-system-directories): New option.
+       * configure, config.in: Regenerate.
+       * c-incpath.c (merge_include_chains): If
+       ENABLE_POISON_SYSTEM_DIRECTORIES defined, warn for use of
+       /usr/include, /usr/local/include or /usr/X11R6/include.
+
+Index: gcc-4.5.0/gcc/common.opt
+===================================================================
+--- gcc-4.5.0.orig/gcc/common.opt	2010-03-17 20:01:09.000000000 -0700
++++ gcc-4.5.0/gcc/common.opt	2010-06-25 11:35:39.965383734 -0700
+@@ -152,6 +152,10 @@
+ Common Var(warn_padded) Warning
+ Warn when padding is required to align structure members
+ 
++Wpoison-system-directories
++Common Var(flag_poison_system_directories) Init(1) Warning
++Warn for -I and -L options using system directories if cross compiling
++
+ Wshadow
+ Common Var(warn_shadow) Warning
+ Warn when one local variable shadows another
+Index: gcc-4.5.0/gcc/config.in
+===================================================================
+--- gcc-4.5.0.orig/gcc/config.in	2010-04-14 02:30:07.000000000 -0700
++++ gcc-4.5.0/gcc/config.in	2010-06-25 11:35:39.969383588 -0700
+@@ -132,6 +132,12 @@
+ #endif
+ 
+ 
++/* Define to warn for use of native system header directories */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_POISON_SYSTEM_DIRECTORIES
++#endif
++
++
+ /* Define if you want all operations on RTL (the basic data structure of the
+    optimizer and back end) to be checked for dynamic type safety at runtime.
+    This is quite expensive. */
+Index: gcc-4.5.0/gcc/configure.ac
+===================================================================
+--- gcc-4.5.0.orig/gcc/configure.ac	2010-06-25 11:34:01.433382161 -0700
++++ gcc-4.5.0/gcc/configure.ac	2010-06-25 11:35:39.969383588 -0700
+@@ -4276,6 +4276,16 @@
+ fi)
+ AC_SUBST(slibdir)
+ 
++AC_ARG_ENABLE([poison-system-directories],
++             AS_HELP_STRING([--enable-poison-system-directories],
++                            [warn for use of native system header directories]),,
++             [enable_poison_system_directories=no])
++if test "x${enable_poison_system_directories}" = "xyes"; then
++  AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES],
++           [1],
++           [Define to warn for use of native system header directories])
++fi
++
+ # Substitute configuration variables
+ AC_SUBST(subdirs)
+ AC_SUBST(srcdir)
+Index: gcc-4.5.0/gcc/doc/invoke.texi
+===================================================================
+--- gcc-4.5.0.orig/gcc/doc/invoke.texi	2010-04-06 07:02:22.000000000 -0700
++++ gcc-4.5.0/gcc/doc/invoke.texi	2010-06-25 11:35:39.992666345 -0700
+@@ -252,6 +252,7 @@
+ -Woverlength-strings  -Wpacked  -Wpacked-bitfield-compat  -Wpadded @gol
+ -Wparentheses  -Wpedantic-ms-format -Wno-pedantic-ms-format @gol
+ -Wpointer-arith  -Wno-pointer-to-int-cast @gol
++-Wno-poison-system-directories @gol
+ -Wredundant-decls @gol
+ -Wreturn-type  -Wsequence-point  -Wshadow @gol
+ -Wsign-compare  -Wsign-conversion  -Wstack-protector @gol
+@@ -3603,6 +3604,14 @@
+ option will @emph{not} warn about unknown pragmas in system
+ headers---for that, @option{-Wunknown-pragmas} must also be used.
+ 
++@item -Wno-poison-system-directories
++@opindex Wno-poison-system-directories
++Do not warn for @option{-I} or @option{-L} options using system
++directories such as @file{/usr/include} when cross compiling.  This
++option is intended for use in chroot environments when such
++directories contain the correct headers and libraries for the target
++system rather than the host.
++
+ @item -Wfloat-equal
+ @opindex Wfloat-equal
+ @opindex Wno-float-equal
+Index: gcc-4.5.0/gcc/gcc.c
+===================================================================
+--- gcc-4.5.0.orig/gcc/gcc.c	2010-02-11 04:23:08.000000000 -0800
++++ gcc-4.5.0/gcc/gcc.c	2010-06-25 11:35:40.009381858 -0700
+@@ -792,6 +792,8 @@
+     %{flto} %{fwhopr} %l " LINK_PIE_SPEC \
+    "%X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r}\
+     %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}}\
++    %{Wno-poison-system-directories:--no-poison-system-directories}\
++    %{Werror=poison-system-directories:--error-poison-system-directories}\
+     %{static:} %{L*} %(mfwrap) %(link_libgcc) %o\
+     %{fopenmp|ftree-parallelize-loops=*:%:include(libgomp.spec)%(link_gomp)} %(mflib)\
+     %{fprofile-arcs|fprofile-generate*|coverage:-lgcov}\
+Index: gcc-4.5.0/gcc/incpath.c
+===================================================================
+--- gcc-4.5.0.orig/gcc/incpath.c	2009-11-25 02:55:54.000000000 -0800
++++ gcc-4.5.0/gcc/incpath.c	2010-06-25 11:35:40.017209818 -0700
+@@ -353,6 +353,24 @@
+ 	}
+       fprintf (stderr, _("End of search list.\n"));
+     }
++
++#ifdef ENABLE_POISON_SYSTEM_DIRECTORIES
++  if (flag_poison_system_directories)
++    {
++       struct cpp_dir *p;
++
++       for (p = heads[QUOTE]; p; p = p->next)
++         {
++          if ((!strncmp (p->name, "/usr/include", 12))
++              || (!strncmp (p->name, "/usr/local/include", 18))
++              || (!strncmp (p->name, "/usr/X11R6/include", 18)))
++            warning (OPT_Wpoison_system_directories,
++                     "include location \"%s\" is unsafe for "
++                     "cross-compilation",
++                     p->name);
++         }
++    }
++#endif
+ }
+ 
+ /* Use given -I paths for #include "..." but not #include <...>, and
+diff -ur gcc-4.5.0.orig/gcc/Makefile.in gcc-4.5.0/gcc/Makefile.in
+--- gcc-4.5.0.orig/gcc/Makefile.in	2010-09-29 17:13:49.164088845 -0500
++++ gcc-4.5.0/gcc/Makefile.in	2010-09-29 18:48:19.300178501 -0500
+@@ -1965,7 +1965,7 @@
+ 
+ incpath.o: incpath.c incpath.h $(CONFIG_H) $(SYSTEM_H) $(CPPLIB_H) \
+ 		intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \
+-		$(MACHMODE_H)
++		$(MACHMODE_H) $(FLAGS_H) toplev.h
+ 
+ c-decl.o : c-decl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) \
+     $(RTL_H) $(C_TREE_H) $(GGC_H) $(TARGET_H) $(FLAGS_H) $(FUNCTION_H) output.h \
+diff -ur gcc-4.5.0.orig/gcc/configure gcc-4.5.0/gcc/configure
+--- gcc-4.5.0.orig/gcc/configure	2010-09-29 14:58:31.702054881 -0500
++++ gcc-4.5.0/gcc/configure	2010-09-29 18:46:31.486068500 -0500
+@@ -913,6 +913,7 @@
+ enable_maintainer_mode
+ enable_version_specific_runtime_libs
+ with_slibdir
++enable_poison_system_directories
+ enable_plugin
+ enable_target_optspace
+ '
+@@ -1621,6 +1622,8 @@
+   --enable-version-specific-runtime-libs
+                           specify that runtime libraries should be
+                           installed in a compiler-specific directory
++  --enable-poison-system-directories
++                          warn for use of native system header directories
+   --enable-plugin         enable plugin support
+ 
+ Optional Packages:
+@@ -25339,6 +25377,19 @@
+ 
+ 
+ 
++# Check whether --enable-poison-system-directories was given.
++if test "${enable_poison_system_directories+set}" = set; then :
++  enableval=$enable_poison_system_directories;
++else
++  enable_poison_system_directories=no
++fi
++
++if test "x${enable_poison_system_directories}" = "xyes"; then
++
++$as_echo "#define ENABLE_POISON_SYSTEM_DIRECTORIES 1" >>confdefs.h
++
++fi
++
+ # Substitute configuration variables
+ 
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-pr43698-arm-rev-instr.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-pr43698-arm-rev-instr.patch
new file mode 100644
index 0000000000..61c883e1ff
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-pr43698-arm-rev-instr.patch
@@ -0,0 +1,117 @@
+backport http://gcc.gnu.org/viewcvs?view=revision&revision=162404
+from trunk
+
+Which fixes http://gcc.gnu.org/bugzilla/show_bug.cgi?id=43698
+
+2010-07-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        PR target/43698
+        * config/arm/arm.md: Split arm_rev into *arm_rev
+        and *thumb1_rev. Set *arm_rev to be predicable.
+
+2010-07-22  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        PR target/43698
+        * gcc.target/arm/pr43698.c: New test.
+
+
+/scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+Usage: date [OPTION]... [+FORMAT]
+Display the current time in the given FORMAT.
+
+  -d, --date=STRING         display time described by STRING, not `now'
+  -f, --file=DATEFILE       like --date once for each line of DATEFILE
+  -R, --rfc-822             output RFC-822 compliant date string
+  -u, --utc, --universal    print or set Coordinated Universal Time
+      --help                display this help and exit
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /bin/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /bin/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /bin/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /scratch/oe/sysroots/i686-linux/usr/share/quilt/compat/date
+date is /bin/date
+date
+Khem
+Index: gcc-4.5/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.md	2010-07-20 20:31:25.000000000 -0700
++++ gcc-4.5/gcc/config/arm/arm.md	2010-07-22 14:55:54.303169081 -0700
+@@ -11197,15 +11197,21 @@
+    (set_attr "length" "4")]
+ )
+ 
+-(define_insn "arm_rev"
++(define_insn "*arm_rev"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(bswap:SI (match_operand:SI 1 "s_register_operand" "r")))]
+-  "TARGET_EITHER && arm_arch6"
+-  "rev\t%0, %1"
+-  [(set (attr "length")
+-        (if_then_else (eq_attr "is_thumb" "yes")
+-		      (const_int 2)
+-		      (const_int 4)))]
++  "TARGET_32BIT && arm_arch6"
++  "rev%?\t%0, %1"
++  [(set_attr "predicable" "yes")
++   (set_attr "length" "4")]
++)
++
++(define_insn "*thumb1_rev"
++  [(set (match_operand:SI 0 "s_register_operand" "=l")
++	(bswap:SI (match_operand:SI 1 "s_register_operand" "l")))]
++  "TARGET_THUMB1 && arm_arch6"
++   "rev\t%0, %1"
++  [(set_attr "length" "2")]
+ )
+ 
+ (define_expand "arm_legacy_rev"
+Index: gcc-4.5/gcc/testsuite/gcc.target/arm/pr43698.c
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ gcc-4.5/gcc/testsuite/gcc.target/arm/pr43698.c	2010-07-22 14:56:35.406670213 -0700
+@@ -0,0 +1,39 @@
++/* { dg-do run } */
++/* { dg-options "-Os -march=armv7-a" } */
++#include <stdint.h>
++#include <stdlib.h>
++
++
++char do_reverse_endian = 0;
++
++#  define bswap_32(x) \
++  ((((x) & 0xff000000) >> 24) | \
++   (((x) & 0x00ff0000) >>  8) | \
++   (((x) & 0x0000ff00) <<  8) | \
++   (((x) & 0x000000ff) << 24))
++
++#define EGET(X) \
++  (__extension__ ({ \
++      uint64_t __res; \
++      if (!do_reverse_endian) {    __res = (X); \
++      } else if (sizeof(X) == 4) { __res = bswap_32((X)); \
++      } \
++      __res; \
++    }))
++
++void __attribute__((noinline)) X(char **phdr, char **data, int *phoff)
++{
++  *phdr = *data + EGET(*phoff);
++}
++
++int main()
++{
++  char *phdr;
++  char *data = (char *)0x40164000;
++  int phoff = 0x34;
++  X(&phdr, &data, &phoff);
++  if (phdr != (char *)0x40164034)
++    abort ();
++  exit (0);
++}
++
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-scalar-widening-pr45847.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-scalar-widening-pr45847.patch
new file mode 100644
index 0000000000..cbe12303e8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-scalar-widening-pr45847.patch
@@ -0,0 +1,63 @@
+Hi,
+
+The attached patch fixes Bugzilla 45847
+(http://gcc.gnu.org/bugzilla/show_bug.cgi?id=45847). When compiling
+without -mvectorize-with-neon-quad and vectorizing scalar widening
+operations that widen words to double words, there are no corresponding
+vector types for DI scalar types. For this scenario, a call to
+get_vect_type_for_scalar_type() returns NULL and an absent NULL-check
+caused this segfault. The attached patch adds this NULL-check. Also,
+this is consistent with all the other places where a NULL-check follows
+a call to get_vect_type_for_scalar_type() in tree-vect-patterns.c. 
+
+Regression tested with arm-linux-gnueabi. OK?
+
+--
+Tejas Belagod
+ARM.
+
+gcc/
+
+2010-10-05  Tejas Belagod  <tejas.belagod@arm.com>
+
+	* tree-vect-patterns.c (vect_recog_widen_mult_pattern): Add NULL
+	check for vectype_out returned by get_vectype_for_scalar_type().
+
+testsuite/
+
+2010-10-05  Tejas Belagod  <tejas.belagod@arm.com>
+
+	* gcc.dg/vect/pr45847.c: New test.
+
+Index: gcc-4.5/gcc/testsuite/gcc.dg/vect/pr45847.c
+===================================================================
+--- /dev/null
++++ gcc-4.5/gcc/testsuite/gcc.dg/vect/pr45847.c
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++
++
++long long foo (long long *__restrict a,  int *__restrict b, int *__restrict c )
++{
++  int i;
++  long long sum=0;
++  for (i=0;i<256;i++)
++   sum += (long long)b[i] * c[i];
++
++  return sum;
++}
++
++/* { dg-final { cleanup-tree-dump "vect" } } */
++
+Index: gcc-4.5/gcc/tree-vect-patterns.c
+===================================================================
+--- gcc-4.5.orig/gcc/tree-vect-patterns.c
++++ gcc-4.5/gcc/tree-vect-patterns.c
+@@ -411,6 +411,7 @@ vect_recog_widen_mult_pattern (gimple la
+   /* Check target support  */
+   vectype = get_vectype_for_scalar_type (half_type0);
+   if (!vectype
++      || !get_vectype_for_scalar_type (type)
+       || !supportable_widening_operation (WIDEN_MULT_EXPR, last_stmt, vectype,
+ 					  &dummy, &dummy, &dummy_code,
+ 					  &dummy_code, &dummy_int, &dummy_vec))
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-uclibc-locale-ctype_touplow_t.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-uclibc-locale-ctype_touplow_t.patch
new file mode 100644
index 0000000000..4f94fc9d66
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc-uclibc-locale-ctype_touplow_t.patch
@@ -0,0 +1,67 @@
+Index: gcc-4.5/libstdc++-v3/config/locale/generic/c_locale.h
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/config/locale/generic/c_locale.h	2010-06-30 22:30:53.993316002 -0700
++++ gcc-4.5/libstdc++-v3/config/locale/generic/c_locale.h	2010-06-30 22:31:26.043316001 -0700
+@@ -41,12 +41,17 @@
+ 
+ #include <clocale>
+ #include <cstddef>
++#include <features.h>
++#include <ctype.h>
+ 
+ #define _GLIBCXX_NUM_CATEGORIES 0
+ 
+ _GLIBCXX_BEGIN_NAMESPACE(std)
+-
+-  typedef int*			__c_locale;
++#ifdef __UCLIBC__
++   typedef __ctype_touplow_t*   __c_locale;
++#else
++   typedef int*         __c_locale;
++#endif
+ 
+   // Convert numeric value of type double and long double to string and
+   // return length of string.  If vsnprintf is available use it, otherwise
+Index: gcc-4.5/libstdc++-v3/config/os/gnu-linux/ctype_base.h
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/config/os/gnu-linux/ctype_base.h	2010-06-30 22:30:54.013316002 -0700
++++ gcc-4.5/libstdc++-v3/config/os/gnu-linux/ctype_base.h	2010-06-30 22:31:26.053316001 -0700
+@@ -33,14 +33,21 @@
+  */
+ 
+ // Information as gleaned from /usr/include/ctype.h
+-  
++
++#include <features.h>
++#include <ctype.h>
++
+ _GLIBCXX_BEGIN_NAMESPACE(std)
+ 
+   /// @brief  Base class for ctype.
+   struct ctype_base
+   {
+     // Non-standard typedefs.
+-    typedef const int* 		__to_type;
++#ifdef __UCLIBC__
++    typedef const __ctype_touplow_t*   __to_type;
++#else
++    typedef const int*         __to_type;
++#endif
+ 
+     // NB: Offsets into ctype<char>::_M_table force a particular size
+     // on the mask type. Because of this, we don't use an enum.
+Index: gcc-4.5/libstdc++-v3/config/locale/generic/c_locale.cc
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/config/locale/generic/c_locale.cc	2010-06-28 12:12:42.000000000 -0700
++++ gcc-4.5/libstdc++-v3/config/locale/generic/c_locale.cc	2010-06-30 22:31:26.063316001 -0700
+@@ -256,5 +256,10 @@ _GLIBCXX_END_NAMESPACE
+ #ifdef _GLIBCXX_LONG_DOUBLE_COMPAT
+ #define _GLIBCXX_LDBL_COMPAT(dbl, ldbl) \
+   extern "C" void ldbl (void) __attribute__ ((alias (#dbl)))
++#ifdef __UCLIBC__
++// This is because __c_locale is of type __ctype_touplow_t* which is short on uclibc. for glibc its int*
++_GLIBCXX_LDBL_COMPAT(_ZSt14__convert_to_vIdEvPKcRT_RSt12_Ios_IostateRKPs, _ZSt14__convert_to_vIeEvPKcRT_RSt12_Ios_IostateRKPs);
++#else
+ _GLIBCXX_LDBL_COMPAT(_ZSt14__convert_to_vIdEvPKcRT_RSt12_Ios_IostateRKPi, _ZSt14__convert_to_vIeEvPKcRT_RSt12_Ios_IostateRKPi);
++#endif
+ #endif // _GLIBCXX_LONG_DOUBLE_COMPAT
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc_revert_base_version_to_4.5.0.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc_revert_base_version_to_4.5.0.patch
new file mode 100644
index 0000000000..5f134ef338
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/gcc_revert_base_version_to_4.5.0.patch
@@ -0,0 +1,9 @@
+the svn patch changed the BASE-VER to 4.5.1, bring it back to 4.5.0
+- Nitin A Kamble nitin.a.kamble@intel.com
+- 2010/07/20
+
+--- gcc-4.5.0/gcc/BASE-VER	2010-07-20 00:57:37.000000000 -0700
++++ gcc-4.5.0.new/gcc/BASE-VER	2010-07-20 01:06:17.000000000 -0700
+@@ -1 +1 @@
+-4.5.1
++4.5.0
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-emit-__cxa_end_cleanup-in-text.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-emit-__cxa_end_cleanup-in-text.patch
new file mode 100644
index 0000000000..ada36a5914
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-emit-__cxa_end_cleanup-in-text.patch
@@ -0,0 +1,40 @@
+2010-06-07  Khem Raj  <raj.khem@gmail.com>
+
+	* libsupc++/eh_arm.cc (__cxa_end_cleanup): Use .pushsection/.popsection
+	to emit inline assembly into .text section.
+
+Index: gcc-4.5/libstdc++-v3/libsupc++/eh_arm.cc
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/libsupc++/eh_arm.cc	2010-06-04 23:20:18.000000000 -0700
++++ gcc-4.5/libstdc++-v3/libsupc++/eh_arm.cc	2010-06-08 11:27:34.247541722 -0700
+@@ -157,22 +157,26 @@ __gnu_end_cleanup(void)
+ // Assembly wrapper to call __gnu_end_cleanup without clobbering r1-r3.
+ // Also push r4 to preserve stack alignment.
+ #ifdef __thumb__
+-asm (".global __cxa_end_cleanup\n"
++asm ("  .pushsection .text.__cxa_end_cleanup\n"
++"	.global __cxa_end_cleanup\n"
+ "	.type __cxa_end_cleanup, \"function\"\n"
+ "	.thumb_func\n"
+ "__cxa_end_cleanup:\n"
+ "	push\t{r1, r2, r3, r4}\n"
+ "	bl\t__gnu_end_cleanup\n"
+ "	pop\t{r1, r2, r3, r4}\n"
+-"	bl\t_Unwind_Resume @ Never returns\n");
++"	bl\t_Unwind_Resume @ Never returns\n"
++"	.popsection\n");
+ #else
+-asm (".global __cxa_end_cleanup\n"
++asm ("  .pushsection .text.__cxa_end_cleanup\n"
++"	.global __cxa_end_cleanup\n"
+ "	.type __cxa_end_cleanup, \"function\"\n"
+ "__cxa_end_cleanup:\n"
+ "	stmfd\tsp!, {r1, r2, r3, r4}\n"
+ "	bl\t__gnu_end_cleanup\n"
+ "	ldmfd\tsp!, {r1, r2, r3, r4}\n"
+-"	bl\t_Unwind_Resume @ Never returns\n");
++"	bl\t_Unwind_Resume @ Never returns\n"
++"	.popsection\n");
+ #endif
+ 
+ #endif
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-pic.dpatch b/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-pic.dpatch
new file mode 100644
index 0000000000..70c9e81542
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/libstdc++-pic.dpatch
@@ -0,0 +1,71 @@
+#! /bin/sh -e
+
+# DP: Build and install libstdc++_pic.a library.
+
+dir=
+if [ $# -eq 3 -a "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+    -patch)
+        patch $pdir -f --no-backup-if-mismatch -p0 < $0
+        ;;
+    -unpatch)
+        patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
+        ;;
+    *)
+        echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+        exit 1
+esac
+exit 0
+
+diff -ur libstdc++-v3/src/Makefile.am libstdc++-v3/src/Makefile.am
+--- libstdc++-v3/src/Makefile.am~	2004-04-16 21:04:05.000000000 +0200
++++ libstdc++-v3/src/Makefile.am	2004-07-03 20:22:43.000000000 +0200
+@@ -210,6 +210,10 @@
+ 	  $(OPT_LDFLAGS) $(SECTION_LDFLAGS) $(AM_CXXFLAGS) $(LDFLAGS) -o $@
+ 
+ 
++install-exec-local:
++	$(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
++	$(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
++
+ # Added bits to build debug library.
+ if GLIBCXX_BUILD_DEBUG
+ all-local: build_debug
+diff -ur libstdc++-v3/src/Makefile.in libstdc++-v3/src/Makefile.in
+--- libstdc++-v3/src/Makefile.in	2004-07-03 06:41:13.000000000 +0200
++++ libstdc++-v3/src/Makefile.in	2004-07-03 20:25:05.000000000 +0200
+@@ -611,7 +611,7 @@
+ 
+ install-data-am: install-data-local
+ 
+-install-exec-am: install-toolexeclibLTLIBRARIES
++install-exec-am: install-toolexeclibLTLIBRARIES install-exec-local
+ 
+ install-info: install-info-am
+ 
+@@ -644,6 +644,7 @@
+ 	distclean-libtool distclean-tags distdir dvi dvi-am html \
+ 	html-am info info-am install install-am install-data \
+ 	install-data-am install-data-local install-exec \
++	install-exec-local \
+ 	install-exec-am install-info install-info-am install-man \
+ 	install-strip install-toolexeclibLTLIBRARIES installcheck \
+ 	installcheck-am installdirs maintainer-clean \
+@@ -729,6 +730,11 @@
+ install_debug:
+ 	(cd ${debugdir} && $(MAKE) \
+ 	toolexeclibdir=$(glibcxx_toolexeclibdir)/debug install)
++
++install-exec-local:
++	$(AR) cru libstdc++_pic.a .libs/*.o $(top_builddir)/libsupc++/*.o || touch libstdc++_pic.a
++	$(INSTALL_DATA) libstdc++_pic.a $(DESTDIR)$(toolexeclibdir)
++
+ # Tell versions [3.59,3.63) of GNU make to not export all variables.
+ # Otherwise a system limit (for SysV at least) may be exceeded.
+ .NOEXPORT:
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99297.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99297.patch
new file mode 100644
index 0000000000..bff745dae0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99297.patch
@@ -0,0 +1,207 @@
+2010-06-28  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	Daniel Jacobowitz  <dan@codesourcery.com>
+	Joseph Myers  <joseph@codesourcery.com>
+
+	gcc/
+	* doc/invoke.texi (-Wno-poison-system-directories): Document.
+	* gcc.c (LINK_COMMAND_SPEC): Pass --no-poison-system-directories
+	if -Wno-poison-system-directories and --error-poison-system-directories
+	if -Werror=poison-system-directories to linker.
+	* incpath.c: Include flags.h. Include toplev.h.
+	(merge_include_chains): If ENABLE_POISON_SYSTEM_DIRECTORIES defined
+	and flag_poison_system_directories is true, warn for use of
+	/usr/include, /usr/local/include or /usr/X11R6/include.
+	* Makefile.in (incpath.o): Depend on $(FLAGS_H) and toplev.h.
+	* common.opt (--Wno-poison-system-directories): New.
+	* configure.ac (--enable-poison-system-directories): New option.
+	* configure: Regenerate.
+	* config.in: Regenerate.
+
+Index: gcc-4.5/gcc/Makefile.in
+===================================================================
+--- gcc-4.5.orig/gcc/Makefile.in	2010-09-23 16:44:12.000000000 -0700
++++ gcc-4.5/gcc/Makefile.in	2010-09-23 16:46:33.552416860 -0700
+@@ -1969,7 +1969,7 @@ gcc.srcextra: gengtype-lex.c
+ 
+ incpath.o: incpath.c incpath.h $(CONFIG_H) $(SYSTEM_H) $(CPPLIB_H) \
+ 		intl.h prefix.h coretypes.h $(TM_H) cppdefault.h $(TARGET_H) \
+-		$(MACHMODE_H)
++		$(MACHMODE_H) $(FLAGS_H) toplev.h
+ 
+ c-decl.o : c-decl.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(TREE_H) \
+     $(RTL_H) $(C_TREE_H) $(GGC_H) $(TARGET_H) $(FLAGS_H) $(FUNCTION_H) output.h \
+Index: gcc-4.5/gcc/common.opt
+===================================================================
+--- gcc-4.5.orig/gcc/common.opt	2010-07-11 16:14:47.000000000 -0700
++++ gcc-4.5/gcc/common.opt	2010-09-23 16:46:33.556418045 -0700
+@@ -152,6 +152,10 @@ Wpadded
+ Common Var(warn_padded) Warning
+ Warn when padding is required to align structure members
+ 
++Wpoison-system-directories
++Common Var(flag_poison_system_directories) Init(1)
++Warn for -I and -L options using system directories if cross compiling
++
+ Wshadow
+ Common Var(warn_shadow) Warning
+ Warn when one local variable shadows another
+Index: gcc-4.5/gcc/config.in
+===================================================================
+--- gcc-4.5.orig/gcc/config.in	2010-07-11 16:14:46.000000000 -0700
++++ gcc-4.5/gcc/config.in	2010-09-23 16:46:33.556418045 -0700
+@@ -132,6 +132,12 @@
+ #endif
+ 
+ 
++/* Define to warn for use of native system header directories */
++#ifndef USED_FOR_TARGET
++#undef ENABLE_POISON_SYSTEM_DIRECTORIES
++#endif
++
++
+ /* Define if you want all operations on RTL (the basic data structure of the
+    optimizer and back end) to be checked for dynamic type safety at runtime.
+    This is quite expensive. */
+Index: gcc-4.5/gcc/configure
+===================================================================
+--- gcc-4.5.orig/gcc/configure	2010-09-23 16:44:11.000000000 -0700
++++ gcc-4.5/gcc/configure	2010-09-23 16:46:33.572415719 -0700
+@@ -913,6 +913,7 @@ with_system_zlib
+ enable_maintainer_mode
+ enable_version_specific_runtime_libs
+ with_slibdir
++enable_poison_system_directories
+ enable_plugin
+ '
+       ac_precious_vars='build_alias
+@@ -1620,6 +1621,8 @@ Optional Features:
+   --enable-version-specific-runtime-libs
+                           specify that runtime libraries should be
+                           installed in a compiler-specific directory
++  --enable-poison-system-directories
++                          warn for use of native system header directories
+   --enable-plugin         enable plugin support
+ 
+ Optional Packages:
+@@ -25345,6 +25348,19 @@ fi
+ 
+ 
+ 
++# Check whether --enable-poison-system-directories was given.
++if test "${enable_poison_system_directories+set}" = set; then :
++  enableval=$enable_poison_system_directories;
++else
++  enable_poison_system_directories=no
++fi
++
++if test "x${enable_poison_system_directories}" = "xyes"; then
++
++$as_echo "#define ENABLE_POISON_SYSTEM_DIRECTORIES 1" >>confdefs.h
++
++fi
++
+ # Substitute configuration variables
+ 
+ 
+Index: gcc-4.5/gcc/configure.ac
+===================================================================
+--- gcc-4.5.orig/gcc/configure.ac	2010-09-23 16:44:11.000000000 -0700
++++ gcc-4.5/gcc/configure.ac	2010-09-23 16:46:33.576417624 -0700
+@@ -4439,6 +4439,16 @@ else
+ fi)
+ AC_SUBST(slibdir)
+ 
++AC_ARG_ENABLE([poison-system-directories],
++	      AS_HELP_STRING([--enable-poison-system-directories],
++			     [warn for use of native system header directories]),,
++	      [enable_poison_system_directories=no])
++if test "x${enable_poison_system_directories}" = "xyes"; then
++  AC_DEFINE([ENABLE_POISON_SYSTEM_DIRECTORIES],
++	    [1],
++	    [Define to warn for use of native system header directories])
++fi
++
+ # Substitute configuration variables
+ AC_SUBST(subdirs)
+ AC_SUBST(srcdir)
+Index: gcc-4.5/gcc/doc/invoke.texi
+===================================================================
+--- gcc-4.5.orig/gcc/doc/invoke.texi	2010-09-23 15:33:28.000000000 -0700
++++ gcc-4.5/gcc/doc/invoke.texi	2010-09-23 16:46:33.584416934 -0700
+@@ -252,6 +252,7 @@ Objective-C and Objective-C++ Dialects}.
+ -Woverlength-strings  -Wpacked  -Wpacked-bitfield-compat  -Wpadded @gol
+ -Wparentheses  -Wpedantic-ms-format -Wno-pedantic-ms-format @gol
+ -Wpointer-arith  -Wno-pointer-to-int-cast @gol
++-Wno-poison-system-directories @gol
+ -Wredundant-decls @gol
+ -Wreturn-type  -Wsequence-point  -Wshadow @gol
+ -Wsign-compare  -Wsign-conversion  -Wstack-protector @gol
+@@ -3603,6 +3604,14 @@ code.  However, note that using @option{
+ option will @emph{not} warn about unknown pragmas in system
+ headers---for that, @option{-Wunknown-pragmas} must also be used.
+ 
++@item -Wno-poison-system-directories
++@opindex Wno-poison-system-directories
++Do not warn for @option{-I} or @option{-L} options using system
++directories such as @file{/usr/include} when cross compiling.  This
++option is intended for use in chroot environments when such
++directories contain the correct headers and libraries for the target
++system rather than the host.
++
+ @item -Wfloat-equal
+ @opindex Wfloat-equal
+ @opindex Wno-float-equal
+Index: gcc-4.5/gcc/gcc.c
+===================================================================
+--- gcc-4.5.orig/gcc/gcc.c	2010-07-11 16:14:46.000000000 -0700
++++ gcc-4.5/gcc/gcc.c	2010-09-23 16:46:33.588417920 -0700
+@@ -792,6 +792,8 @@ proper position among the other output f
+     %{flto} %{fwhopr} %l " LINK_PIE_SPEC \
+    "%X %{o*} %{A} %{d} %{e*} %{m} %{N} %{n} %{r}\
+     %{s} %{t} %{u*} %{x} %{z} %{Z} %{!A:%{!nostdlib:%{!nostartfiles:%S}}}\
++    %{Wno-poison-system-directories:--no-poison-system-directories}\
++    %{Werror=poison-system-directories:--error-poison-system-directories}\
+     %{static:} %{L*} %(mfwrap) %(link_libgcc) %o\
+     %{fopenmp|ftree-parallelize-loops=*:%:include(libgomp.spec)%(link_gomp)} %(mflib)\
+     %{fprofile-arcs|fprofile-generate*|coverage:-lgcov}\
+Index: gcc-4.5/gcc/incpath.c
+===================================================================
+--- gcc-4.5.orig/gcc/incpath.c	2010-07-11 16:14:44.000000000 -0700
++++ gcc-4.5/gcc/incpath.c	2010-09-23 16:46:33.588417920 -0700
+@@ -30,6 +30,8 @@
+ #include "intl.h"
+ #include "incpath.h"
+ #include "cppdefault.h"
++#include "flags.h"
++#include "toplev.h"
+ 
+ /* Microsoft Windows does not natively support inodes.
+    VMS has non-numeric inodes.  */
+@@ -353,6 +355,24 @@ merge_include_chains (const char *sysroo
+ 	}
+       fprintf (stderr, _("End of search list.\n"));
+     }
++
++#ifdef ENABLE_POISON_SYSTEM_DIRECTORIES
++  if (flag_poison_system_directories)
++    {
++	struct cpp_dir *p;
++
++	for (p = heads[QUOTE]; p; p = p->next)
++	  {
++	   if ((!strncmp (p->name, "/usr/include", 12))
++	       || (!strncmp (p->name, "/usr/local/include", 18))
++	       || (!strncmp (p->name, "/usr/X11R6/include", 18)))
++	     warning (OPT_Wpoison_system_directories,
++		      "include location \"%s\" is unsafe for "
++		      "cross-compilation",
++		      p->name);
++	  }
++    }
++#endif
+ }
+ 
+ /* Use given -I paths for #include "..." but not #include <...>, and
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99298.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99298.patch
new file mode 100644
index 0000000000..541134a6bd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99298.patch
@@ -0,0 +1,26654 @@
+2010-07-07 Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline (originally from Sourcery G++ 4.4):
+
+	2010-05-24  Daniel Jacobowitz  <dan@codesourcery.com>
+		    Sandra Loosemore  <sandra@codesourcery.com>
+
+	gcc/
+	* config/arm/neon-testgen.ml: Use dg-add-options arm_neon.
+	* doc/sourcebuild.texi (Effective-Target Keywords): Update arm_neon_ok
+	description.  Add arm_neon_fp16_ok.
+	(Add Options): Add arm_neon and arm_neon_fp16.
+
+	gcc/testsuite/
+	* gcc.target/arm/neon/: Regenerated test cases.
+
+	* gcc.target/arm/neon/polytypes.c,
+	gcc.target/arm/neon-vmla-1.c, gcc.target/arm/neon-vmls-1.c,
+	gcc.target/arm/neon-cond-1.c, gcc.target/arm/neon/vfp-shift-a2t2.c,
+	gcc.target/arm/neon-thumb2-move.c, gcc.dg/torture/arm-fp16-ops-8.c, 
+	gcc.dg/torture/arm-fp16-ops-7.c, g++.dg/ext/arm-fp16/arm-fp16-ops-7.C,
+	g++.dg/ext/arm-fp16/arm-fp16-ops-8.C, g++.dg/abi/mangle-neon.C: Use
+	dg-add-options arm_neon.
+
+	* gcc.target/arm/fp16-compile-vcvt.c, gcc.dg/torture/arm-fp16-ops-5.c,
+	gcc.dg/torture/arm-fp16-ops-6.c, g++.dg/ext/arm-fp16/arm-fp16-ops-5.C,
+	g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: Use dg-add-options arm_neon_fp16
+	and arm_neon_fp16_ok.
+
+	* gcc.dg/vect/vect.exp, g++.dg/vect/vect.exp,
+	gfortran.dg/vect/vect.exp: Use add_options_for_arm_neon.
+
+	* lib/target-supports.exp (add_options_for_arm_neon): New.
+	(check_effective_target_arm_neon_ok_nocache): New, from
+	check_effective_target_arm_neon_ok.  Check multiple possibilities.
+	(check_effective_target_arm_neon_ok): Use
+	check_effective_target_arm_neon_ok_nocache.
+	(add_options_for_arm_neon_fp16)
+	(check_effective_target_arm_neon_fp16_ok)
+	check_effective_target_arm_neon_fp16_ok_nocache): New.
+	(check_effective_target_arm_neon_hw): Use add_options_for_arm_neon.
+
+
+=== modified file 'gcc/config/arm/neon-testgen.ml'
+Index: gcc-4_5-branch/gcc/config/arm/neon-testgen.ml
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/neon-testgen.ml
++++ gcc-4_5-branch/gcc/config/arm/neon-testgen.ml
+@@ -51,8 +51,8 @@ let emit_prologue chan test_name =
+   Printf.fprintf chan "/* This file was autogenerated by neon-testgen.  */\n\n";
+   Printf.fprintf chan "/* { dg-do assemble } */\n";
+   Printf.fprintf chan "/* { dg-require-effective-target arm_neon_ok } */\n";
+-  Printf.fprintf chan
+-                 "/* { dg-options \"-save-temps -O0 -mfpu=neon -mfloat-abi=softfp\" } */\n";
++  Printf.fprintf chan "/* { dg-options \"-save-temps -O0\" } */\n";
++  Printf.fprintf chan "/* { dg-add-options arm_neon } */\n";
+   Printf.fprintf chan "\n#include \"arm_neon.h\"\n\n";
+   Printf.fprintf chan "void test_%s (void)\n{\n" test_name
+ 
+Index: gcc-4_5-branch/gcc/doc/sourcebuild.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/sourcebuild.texi
++++ gcc-4_5-branch/gcc/doc/sourcebuild.texi
+@@ -362,7 +362,7 @@ A copy of @file{texinfo.tex} known to wo
+ @end table
+ 
+ DVI-formatted manuals are generated by @samp{make dvi}, which uses
+-@command{texi2dvi} (via the Makefile macro @code{$(TEXI2DVI)}).  
++@command{texi2dvi} (via the Makefile macro @code{$(TEXI2DVI)}).
+ PDF-formatted manuals are generated by @samp{make pdf}, which uses
+ @command{texi2pdf} (via the Makefile macro @code{$(TEXI2PDF)}).  HTML
+ formatted manuals are generated by @samp{make html}.  Info
+@@ -1500,8 +1500,14 @@ ARM target supports generating NEON inst
+ Test system supports executing NEON instructions.
+ 
+ @item arm_neon_ok
+-ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp}.
+-Some multilibs may be incompatible with these options.
++@anchor{arm_neon_ok}
++ARM Target supports @code{-mfpu=neon -mfloat-abi=softfp} or compatible
++options.  Some multilibs may be incompatible with these options.
++
++@item arm_neon_fp16_ok
++@anchor{arm_neon_fp16_ok}
++ARM Target supports @code{-mfpu=neon-fp16 -mfloat-abi=softfp} or compatible
++options.  Some multilibs may be incompatible with these options.
+ 
+ @item arm_thumb1_ok
+ ARM target generates Thumb-1 code for @code{-mthumb}.
+@@ -1895,6 +1901,16 @@ Only MIPS targets support this feature,
+ 
+ @item tls
+ Add the target-specific flags needed to use thread-local storage.
++
++@item arm_neon
++NEON support.  Only ARM targets support this feature, and only then
++in certain modes; see the @ref{arm_neon_ok,,arm_neon_ok effective target
++keyword}.
++
++@item arm_neon_fp16
++NEON and half-precision floating point support.  Only ARM targets
++support this feature, and only then in certain modes; see
++the @ref{arm_neon_ok,,arm_neon_fp16_ok effective target keyword}.
+ @end table
+ 
+ @node Require Support
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/abi/mangle-neon.C
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/abi/mangle-neon.C
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/abi/mangle-neon.C
+@@ -2,7 +2,7 @@
+ 
+ // { dg-do compile }
+ // { dg-require-effective-target arm_neon_ok }
+-// { dg-options "-mfpu=neon -mfloat-abi=softfp" }
++// { dg-add-options arm_neon }
+ 
+ #include <arm_neon.h>
+ 
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+-/* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
++/* { dg-require-effective-target arm_neon_fp16_ok } */
++/* { dg-options "-mfp16-format=ieee" } */
++/* { dg-add-options arm_neon_fp16 } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+-/* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon-fp16 -mfloat-abi=softfp" } */
++/* { dg-require-effective-target arm_neon_fp16_ok } */
++/* { dg-options "-mfp16-format=ieee -ffast-math" } */
++/* { dg-add-options arm_neon_fp16 } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-7.C
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-mfp16-format=ieee" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-8.C
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-mfp16-format=ieee -ffast-math" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/g++.dg/vect/vect.exp
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/g++.dg/vect/vect.exp
++++ gcc-4_5-branch/gcc/testsuite/g++.dg/vect/vect.exp
+@@ -112,7 +112,7 @@ if  [istarget "powerpc-*paired*"]  {
+ } elseif [istarget "ia64-*-*"] {
+     set dg-do-what-default run
+ } elseif [is-effective-target arm_neon_ok] {
+-    lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp"
++    eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
+     if [is-effective-target arm_neon_hw] {
+       set dg-do-what-default run
+     } else {
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+-/* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
++/* { dg-require-effective-target arm_neon_fp16_ok } */
++/* { dg-options "-mfp16-format=ieee" } */
++/* { dg-add-options arm_neon_fp16 } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+-/* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon-fp16 -mfloat-abi=softfp" } */
++/* { dg-require-effective-target arm_neon_fp16_ok } */
++/* { dg-options "-mfp16-format=ieee -ffast-math" } */
++/* { dg-add-options arm_neon_fp16 } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-7.c
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-mfp16-format=ieee" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-8.c
+@@ -1,7 +1,8 @@
+ /* Test various operators on __fp16 and mixed __fp16/float operands.  */
+ /* { dg-do compile { target arm*-*-* } } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -ffast-math -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-mfp16-format=ieee -ffast-math" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm-fp16-ops.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/vect/vect.exp
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.dg/vect/vect.exp
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/vect/vect.exp
+@@ -104,7 +104,7 @@ if  [istarget "powerpc-*paired*"]  {
+ } elseif [istarget "ia64-*-*"] {
+     set dg-do-what-default run
+ } elseif [is-effective-target arm_neon_ok] {
+-    lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp"
++    eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
+     if [is-effective-target arm_neon_hw] {
+       set dg-do-what-default run
+     } else {
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/fp16-compile-vcvt.c
+@@ -1,6 +1,7 @@
+ /* { dg-do compile } */
+-/* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfp16-format=ieee -mfpu=neon-fp16 -mfloat-abi=softfp" } */
++/* { dg-require-effective-target arm_neon_fp16_ok } */
++/* { dg-options "-mfp16-format=ieee" } */
++/* { dg-add-options arm_neon_fp16 } */
+ 
+ /* Test generation of VFP __fp16 instructions.  */
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-cond-1.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon-cond-1.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-cond-1.c
+@@ -1,6 +1,7 @@
+ /* { dg-do run } */
+ /* { dg-require-effective-target arm_neon_hw } */
+-/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
+ /* Check that the arm_final_prescan_insn ccfsm code does not try to
+  * conditionally execute NEON instructions.  */
+ #include <arm_neon.h>
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
+@@ -1,6 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-O2 -mthumb -march=armv7-a -mfloat-abi=softfp -mfpu=neon" } */
++/* { dg-options "-O2 -mthumb -march=armv7-a" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include <arm_neon.h>
+ #include <stddef.h>
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-vmla-1.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon-vmla-1.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-vmla-1.c
+@@ -1,5 +1,6 @@
+ /* { dg-require-effective-target arm_neon_hw } */
+-/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize" } */
++/* { dg-options "-O2 -ftree-vectorize" } */
++/* { dg-add-options arm_neon } */
+ /* { dg-final { scan-assembler "vmla\\.f32" } } */
+ 
+ /* Verify that VMLA is used.  */
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-vmls-1.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon-vmls-1.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon-vmls-1.c
+@@ -1,5 +1,6 @@
+ /* { dg-require-effective-target arm_neon_hw } */
+-/* { dg-options "-O2 -mfpu=neon -mfloat-abi=softfp -ftree-vectorize" } */
++/* { dg-options "-O2 -ftree-vectorize" } */
++/* { dg-add-options arm_neon } */
+ /* { dg-final { scan-assembler "vmls\\.f32" } } */
+ 
+ /* Verify that VMLS is used.  */
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/polytypes.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/polytypes.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/polytypes.c
+@@ -3,7 +3,7 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include <arm_neon.h>
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabals16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabals32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabals8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabals8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabalu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabas16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabas32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabas8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabas8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabau16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabau32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabau8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabau8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabdu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabsf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabss16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabss32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vabss8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vabss8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vadds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vadds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vadds64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vadds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vadds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddws8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vands16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vands32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vands64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vands8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vands8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vandu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vandu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbics16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbics32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbics64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbics8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbics8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbicu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbsls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vbslu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcalef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vceqs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcequ8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcges16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcges32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcges8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcges8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgts8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcles16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcles32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcles8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcles8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcleu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclss16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclss32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclss8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclss8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclts16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclts32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclts8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclts8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcltu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vclzu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcnts8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcntu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombinep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombines8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcombineu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreatep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreates8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcreateu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veorQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veors16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veors32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veors64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veors8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veors8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veoru16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veoru32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veoru64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/veoru8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/veoru8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vexts16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vexts32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vexts64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vexts8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vexts8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vextu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vextu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c
+@@ -2,7 +2,8 @@
+ 
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include <arm_neon.h>
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_highu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhadds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld1u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld2u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld3u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vld4u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmins16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmins32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmins8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmins8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vminu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vminu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlals8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlas8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlau8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlss8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmullu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmuls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmulu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vnegs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vornu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vornu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorrs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorru16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorru32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorru64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vorru8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vorru8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadals8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpadds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpmins8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vpminu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqabss8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqadds8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQf32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQp8_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs64_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQs8_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu64_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretQu8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretf32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretp8_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets64_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterprets8_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu16_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu32_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu64_u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vreinterpretu8_u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshls64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshlu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst1u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst2u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst3u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4f32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4p16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vst4u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubls8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsublu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu64.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubws8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrns8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtsts8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vtstu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzps8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipf32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipp16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipp8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzips16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzips32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzips8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzips8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu16.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu32.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
++++ gcc-4_5-branch/gcc/testsuite/gcc.target/arm/neon/vzipu8.c
+@@ -3,7 +3,8 @@
+ 
+ /* { dg-do assemble } */
+ /* { dg-require-effective-target arm_neon_ok } */
+-/* { dg-options "-save-temps -O0 -mfpu=neon -mfloat-abi=softfp" } */
++/* { dg-options "-save-temps -O0" } */
++/* { dg-add-options arm_neon } */
+ 
+ #include "arm_neon.h"
+ 
+Index: gcc-4_5-branch/gcc/testsuite/gfortran.dg/vect/vect.exp
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/gfortran.dg/vect/vect.exp
++++ gcc-4_5-branch/gcc/testsuite/gfortran.dg/vect/vect.exp
+@@ -105,7 +105,7 @@ if  [istarget "powerpc-*paired*"]  {
+ } elseif [istarget "ia64-*-*"] {
+     set dg-do-what-default run
+ } elseif [is-effective-target arm_neon_ok] {
+-    lappend DEFAULT_VECTCFLAGS "-mfpu=neon" "-mfloat-abi=softfp"
++    eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
+     if [is-effective-target arm_neon_hw] {
+       set dg-do-what-default run
+     } else {
+Index: gcc-4_5-branch/gcc/testsuite/lib/target-supports.exp
+===================================================================
+--- gcc-4_5-branch.orig/gcc/testsuite/lib/target-supports.exp
++++ gcc-4_5-branch/gcc/testsuite/lib/target-supports.exp
+@@ -1695,19 +1695,87 @@ proc check_effective_target_arm_hard_vfp
+     }
+ }
+ 
++# Add the options needed for NEON.  We need either -mfloat-abi=softfp
++# or -mfloat-abi=hard, but if one is already specified by the
++# multilib, use it.  Similarly, if a -mfpu option already enables
++# NEON, do not add -mfpu=neon.
++
++proc add_options_for_arm_neon { flags } {
++    if { ! [check_effective_target_arm_neon_ok] } {
++	return "$flags"
++    }
++    global et_arm_neon_flags
++    return "$flags $et_arm_neon_flags"
++}
++
+ # Return 1 if this is an ARM target supporting -mfpu=neon
+-# -mfloat-abi=softfp.  Some multilibs may be incompatible with these
+-# options.
++# -mfloat-abi=softfp or equivalent options.  Some multilibs may be
++# incompatible with these options.  Also set et_arm_neon_flags to the
++# best options to add.
++
++proc check_effective_target_arm_neon_ok_nocache { } {
++    global et_arm_neon_flags
++    set et_arm_neon_flags ""
++    if { [check_effective_target_arm32] } {
++	foreach flags {"" "-mfloat-abi=softfp" "-mfpu=neon" "-mfpu=neon -mfloat-abi=softfp"} {
++	    if { [check_no_compiler_messages_nocache arm_neon_ok object {
++		#include "arm_neon.h"
++		int dummy;
++	    } "$flags"] } {
++		set et_arm_neon_flags $flags
++		return 1
++	    }
++	}
++    }
++
++    return 0
++}
+ 
+ proc check_effective_target_arm_neon_ok { } {
++    return [check_cached_effective_target arm_neon_ok \
++		check_effective_target_arm_neon_ok_nocache]
++}
++
++# Add the options needed for NEON.  We need either -mfloat-abi=softfp
++# or -mfloat-abi=hard, but if one is already specified by the
++# multilib, use it.
++
++proc add_options_for_arm_neon_fp16 { flags } {
++    if { ! [check_effective_target_arm_neon_fp16_ok] } {
++	return "$flags"
++    }
++    global et_arm_neon_fp16_flags
++    return "$flags $et_arm_neon_fp16_flags"
++}
++
++# Return 1 if this is an ARM target supporting -mfpu=neon-fp16
++# -mfloat-abi=softfp or equivalent options.  Some multilibs may be
++# incompatible with these options.  Also set et_arm_neon_flags to the
++# best options to add.
++
++proc check_effective_target_arm_neon_fp16_ok_nocache { } {
++    global et_arm_neon_fp16_flags
++    set et_arm_neon_fp16_flags ""
+     if { [check_effective_target_arm32] } {
+-        return [check_no_compiler_messages arm_neon_ok object {
+-	    #include "arm_neon.h"
+-            int dummy;
+-        } "-mfpu=neon -mfloat-abi=softfp"]
+-    } else {
+-        return 0
++	# Always add -mfpu=neon-fp16, since there is no preprocessor
++	# macro for FP16 support.
++	foreach flags {"-mfpu=neon-fp16" "-mfpu=neon-fp16 -mfloat-abi=softfp"} {
++	    if { [check_no_compiler_messages_nocache arm_neon_fp16_ok object {
++		#include "arm_neon.h"
++		int dummy;
++	    } "$flags"] } {
++		set et_arm_neon_fp16_flags $flags
++		return 1
++	    }
++	}
+     }
++
++    return 0
++}
++
++proc check_effective_target_arm_neon_fp16_ok { } {
++    return [check_cached_effective_target arm_neon_fp16_ok \
++		check_effective_target_arm_neon_fp16_ok_nocache]
+ }
+ 
+ # Return 1 is this is an ARM target where -mthumb causes Thumb-1 to be
+@@ -1746,7 +1814,7 @@ proc check_effective_target_arm_neon_hw
+ 	       : "0" (a), "w" (b));
+ 	  return (a != 1);
+ 	}
+-    } "-mfpu=neon -mfloat-abi=softfp"]
++    } [add_options_for_arm_neon ""]]
+ }
+ 
+ # Return 1 if this is a ARM target with NEON enabled.
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99299.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99299.patch
new file mode 100644
index 0000000000..7dea4303a9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99299.patch
@@ -0,0 +1,62 @@
+2010-07-07  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2010-03-08  Paul Brook  <paul@codesourcery.com>
+
+	gcc/
+	* doc/invoke.texi: Document ARM -mcpu=cortex-m4.
+	* config/arm/arm.c (all_architectures): Change v7e-m default to
+	cortexm4.
+	* config/arm/arm-cores.def: Add cortex-m4.
+	* config/arm/arm-tune.md: Regenerate.
+
+=== modified file 'gcc/config/arm/arm-cores.def'
+--- old/gcc/config/arm/arm-cores.def	2009-11-20 17:37:30 +0000
++++ new/gcc/config/arm/arm-cores.def	2010-07-29 15:53:39 +0000
+@@ -123,6 +123,7 @@
+ ARM_CORE("cortex-a9",	  cortexa9,	7A,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-r4",	  cortexr4,	7R,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-r4f",	  cortexr4f,	7R,				 FL_LDSCHED, 9e)
++ARM_CORE("cortex-m4",	  cortexm4,	7EM,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-m3",	  cortexm3,	7M,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-m1",	  cortexm1,	6M,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-m0",	  cortexm0,	6M,				 FL_LDSCHED, 9e)
+
+=== modified file 'gcc/config/arm/arm-tune.md'
+--- old/gcc/config/arm/arm-tune.md	2009-11-20 17:37:30 +0000
++++ new/gcc/config/arm/arm-tune.md	2010-07-29 15:53:39 +0000
+@@ -1,5 +1,5 @@
+ ;; -*- buffer-read-only: t -*-
+ ;; Generated automatically by gentune.sh from arm-cores.def
+ (define_attr "tune"
+-	"arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexr4,cortexr4f,cortexm3,cortexm1,cortexm0"
++	"arm2,arm250,arm3,arm6,arm60,arm600,arm610,arm620,arm7,arm7d,arm7di,arm70,arm700,arm700i,arm710,arm720,arm710c,arm7100,arm7500,arm7500fe,arm7m,arm7dm,arm7dmi,arm8,arm810,strongarm,strongarm110,strongarm1100,strongarm1110,arm7tdmi,arm7tdmis,arm710t,arm720t,arm740t,arm9,arm9tdmi,arm920,arm920t,arm922t,arm940t,ep9312,arm10tdmi,arm1020t,arm9e,arm946es,arm966es,arm968es,arm10e,arm1020e,arm1022e,xscale,iwmmxt,iwmmxt2,arm926ejs,arm1026ejs,arm1136js,arm1136jfs,arm1176jzs,arm1176jzfs,mpcorenovfp,mpcore,arm1156t2s,arm1156t2fs,cortexa5,cortexa8,cortexa9,cortexr4,cortexr4f,cortexm4,cortexm3,cortexm1,cortexm0"
+ 	(const (symbol_ref "((enum attr_tune) arm_tune)")))
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-04-02 07:32:00 +0000
++++ new/gcc/config/arm/arm.c	2010-07-29 15:53:39 +0000
+@@ -782,7 +782,7 @@
+   {"armv7-a", cortexa8,	  "7A",	 FL_CO_PROC |		  FL_FOR_ARCH7A, NULL},
+   {"armv7-r", cortexr4,	  "7R",	 FL_CO_PROC |		  FL_FOR_ARCH7R, NULL},
+   {"armv7-m", cortexm3,	  "7M",	 FL_CO_PROC |		  FL_FOR_ARCH7M, NULL},
+-  {"armv7e-m",   cortexm3, "7EM", FL_CO_PROC |		  FL_FOR_ARCH7EM, NULL},
++  {"armv7e-m", cortexm4,  "7EM", FL_CO_PROC |		  FL_FOR_ARCH7EM, NULL},
+   {"ep9312",  ep9312,     "4T",  FL_LDSCHED | FL_CIRRUS | FL_FOR_ARCH4, NULL},
+   {"iwmmxt",  iwmmxt,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
+   {"iwmmxt2", iwmmxt2,     "5TE", FL_LDSCHED | FL_STRONG | FL_FOR_ARCH5TE | FL_XSCALE | FL_IWMMXT , NULL},
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-07-29 14:59:35 +0000
++++ new/gcc/doc/invoke.texi	2010-07-29 15:53:39 +0000
+@@ -9826,7 +9826,7 @@
+ @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
+ @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
+ @samp{cortex-a5}, @samp{cortex-a8}, @samp{cortex-a9},
+-@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m3},
++@samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-m4}, @samp{cortex-m3},
+ @samp{cortex-m1},
+ @samp{cortex-m0},
+ @samp{xscale}, @samp{iwmmxt}, @samp{iwmmxt2}, @samp{ep9312}.
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99300.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99300.patch
new file mode 100644
index 0000000000..ae417a18f5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99300.patch
@@ -0,0 +1,3094 @@
+2010-07-08  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from upstream (originally from Sourcery G++ 4.4):
+
+	2010-07-02  Sandra Loosemore  <sandra@codesourcery.com>
+
+	gcc/
+	* config/arm/neon.md (vec_extractv2di): Correct error in register
+	numbering to reconcile with neon_vget_lanev2di.
+
+	2010-07-02  Sandra Loosemore  <sandra@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (neon_vdup_constant): Expand into canonical RTL
+	instead of an unspec.
+	(neon_expand_vector_init): Likewise.
+	* config/arm/neon.md (UNSPEC_VCOMBINE): Delete.
+	(UNSPEC_VDUP_LANE): Delete.
+	(UNSPEC VDUP_N): Delete.
+	(UNSPEC_VGET_HIGH): Delete.
+	(UNSPEC_VGET_LANE): Delete.
+	(UNSPEC_VGET_LOW): Delete.
+	(UNSPEC_VMVN): Delete.
+	(UNSPEC_VSET_LANE): Delete.
+	(V_double_vector_mode): New.
+	(vec_set<mode>_internal): Make code emitted match that for the
+	corresponding intrinsics.
+	(vec_setv2di_internal): Likewise.
+	(neon_vget_lanedi): Rewrite to expand into emit_move_insn.
+	(neon_vget_lanev2di): Rewrite to expand into vec_extractv2di.
+	(neon_vset_lane<mode>): Combine double and quad patterns and
+	expand into vec_set<mode>_internal instead of UNSPEC_VSET_LANE.
+	(neon_vset_lanedi): Rewrite to expand into emit_move_insn.
+	(neon_vdup_n<mode>): Rewrite RTL without unspec.
+	(neon_vdup_ndi): Rewrite as define_expand and use emit_move_insn.
+	(neon_vdup_nv2di): Rewrite RTL without unspec and merge with
+	with neon_vdup_lanev2di, adjusting the pattern from the latter
+	to be predicable for consistency.
+	(neon_vdup_lane<mode>_internal): New.
+	(neon_vdup_lane<mode>): Turn into a define_expand and rewrite
+	to avoid using an unspec.
+	(neon_vdup_lanedi): Rewrite RTL pattern to avoid unspec.
+	(neon_vdup_lanev2di): Turn into a define_expand.
+	(neon_vcombine): Rewrite pattern to eliminate UNPSEC_VCOMBINE.
+	(neon_vget_high<mode>): Replace with....
+	(neon_vget_highv16qi): New pattern using canonical RTL.
+	(neon_vget_highv8hi): Likewise.
+	(neon_vget_highv4si): Likewise.
+	(neon_vget_highv4sf): Likewise.
+	(neon_vget_highv2di): Likewise.
+	(neon_vget_low<mode>): Replace with....
+	(neon_vget_lowv16qi): New pattern using canonical RTL.
+	(neon_vget_lowv8hi): Likewise.
+	(neon_vget_lowv4si): Likewise.
+	(neon_vget_lowv4sf): Likewise.
+	(neon_vget_lowv2di): Likewise.
+
+	* config/arm/neon.ml (Vget_lane): Add No_op attribute to suppress
+	test for this emitting vmov.
+	(Vset_lane): Likewise.
+	(Vdup_n): Likewise.
+	(Vmov_n): Likewise.
+
+	* doc/arm-neon-intrinsics.texi: Regenerated.
+
+	gcc/testsuite/
+	* gcc.target/arm/neon/vdup_ns64.c: Regenerated.
+	* gcc.target/arm/neon/vdup_nu64.c: Regenerated.
+	* gcc.target/arm/neon/vdupQ_ns64.c: Regenerated.
+	* gcc.target/arm/neon/vdupQ_nu64.c: Regenerated.
+	* gcc.target/arm/neon/vmov_ns64.c: Regenerated.
+	* gcc.target/arm/neon/vmov_nu64.c: Regenerated.
+	* gcc.target/arm/neon/vmovQ_ns64.c: Regenerated.
+	* gcc.target/arm/neon/vmovQ_nu64.c: Regenerated.
+	* gcc.target/arm/neon/vget_lanes64.c: Regenerated.
+	* gcc.target/arm/neon/vget_laneu64.c: Regenerated.
+	* gcc.target/arm/neon/vset_lanes64.c: Regenerated.
+	* gcc.target/arm/neon/vset_laneu64.c: Regenerated.
+	* gcc.target/arm/neon-vdup_ns64.c: New.
+	* gcc.target/arm/neon-vdup_nu64.c: New.
+	* gcc.target/arm/neon-vdupQ_ns64.c: New.
+	* gcc.target/arm/neon-vdupQ_nu64.c: New.
+	* gcc.target/arm/neon-vdupQ_lanes64.c: New.
+	* gcc.target/arm/neon-vdupQ_laneu64.c: New.
+	* gcc.target/arm/neon-vmov_ns64.c: New.
+	* gcc.target/arm/neon-vmov_nu64.c: New.
+	* gcc.target/arm/neon-vmovQ_ns64.c: New.
+	* gcc.target/arm/neon-vmovQ_nu64.c: New.
+	* gcc.target/arm/neon-vget_lanes64.c: New.
+	* gcc.target/arm/neon-vget_laneu64.c: New.
+	* gcc.target/arm/neon-vset_lanes64.c: New.
+	* gcc.target/arm/neon-vset_laneu64.c: New.
+
+	2010-07-02  Sandra Loosemore  <sandra@codesourcery.com>
+		    Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* config/arm/neon.md (UNSPEC_VABA): Delete.
+	(UNSPEC_VABAL): Delete.
+	(UNSPEC_VABS): Delete.
+	(UNSPEC_VMUL_N): Delete.
+	(adddi3_neon): New.
+	(subdi3_neon): New.
+	(mul<mode>3add<mode>_neon): Make the pattern named.
+	(mul<mode>3neg<mode>add<mode>_neon): Likewise.
+	(neon_vadd<mode>): Replace with define_expand, and move the remaining
+	unspec parts...
+	(neon_vadd<mode>_unspec): ...to this.
+	(neon_vmla<mode>, neon_vmla<mode>_unspec): Likewise.
+	(neon_vlms<mode>, neon_vmls<mode>_unspec): Likewise.
+	(neon_vsub<mode>, neon_vsub<mode>_unspec): Likewise.
+	(neon_vaba<mode>): Rewrite in terms of vabd.
+	(neon_vabal<mode>): Rewrite in terms of vabdl.
+	(neon_vabs<mode>): Rewrite without unspec.
+	* config/arm/arm.md (*arm_adddi3): Disable for TARGET_NEON.
+	(*arm_subdi3): Likewise.
+	* config/arm/neon.ml (Vadd, Vsub): Split out 64-bit variants and add
+	No_op attribute to disable assembly output checks.
+	* config/arm/arm_neon.h: Regenerated.
+	* doc/arm-neon-intrinsics.texi: Regenerated.
+
+	gcc/testsuite/
+	* gcc.target/arm/neon/vadds64.c: Regenerated.
+	* gcc.target/arm/neon/vaddu64.c: Regenerated.
+	* gcc.target/arm/neon/vsubs64.c: Regenerated.
+	* gcc.target/arm/neon/vsubu64.c: Regenerated.
+	* gcc.target/arm/neon-vmla-1.c: Add -ffast-math to options.
+	* gcc.target/arm/neon-vmls-1.c: Likewise.
+	* gcc.target/arm/neon-vsubs64.c: New execution test.
+	* gcc.target/arm/neon-vsubu64.c: New execution test.
+	* gcc.target/arm/neon-vadds64.c: New execution test.
+	* gcc.target/arm/neon-vaddu64.c: New execution test.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-07-29 15:53:39 +0000
++++ new/gcc/config/arm/arm.c	2010-07-29 15:59:12 +0000
+@@ -8110,8 +8110,7 @@
+      load.  */
+ 
+   x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, 0));
+-  return gen_rtx_UNSPEC (mode, gen_rtvec (1, x),
+-			 UNSPEC_VDUP_N);
++  return gen_rtx_VEC_DUPLICATE (mode, x);
+ }
+ 
+ /* Generate code to load VALS, which is a PARALLEL containing only
+@@ -8207,8 +8206,7 @@
+     {
+       x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, 0));
+       emit_insn (gen_rtx_SET (VOIDmode, target,
+-			      gen_rtx_UNSPEC (mode, gen_rtvec (1, x),
+-					      UNSPEC_VDUP_N)));
++			      gen_rtx_VEC_DUPLICATE (mode, x)));
+       return;
+     }
+ 
+@@ -8217,7 +8215,7 @@
+   if (n_var == 1)
+     {
+       rtx copy = copy_rtx (vals);
+-      rtvec ops;
++      rtx index = GEN_INT (one_var);
+ 
+       /* Load constant part of vector, substitute neighboring value for
+ 	 varying element.  */
+@@ -8226,9 +8224,38 @@
+ 
+       /* Insert variable.  */
+       x = copy_to_mode_reg (inner_mode, XVECEXP (vals, 0, one_var));
+-      ops = gen_rtvec (3, x, target, GEN_INT (one_var));
+-      emit_insn (gen_rtx_SET (VOIDmode, target,
+-			      gen_rtx_UNSPEC (mode, ops, UNSPEC_VSET_LANE)));
++      switch (mode)
++	{
++	case V8QImode:
++	  emit_insn (gen_neon_vset_lanev8qi (target, x, target, index));
++	  break;
++	case V16QImode:
++	  emit_insn (gen_neon_vset_lanev16qi (target, x, target, index));
++	  break;
++	case V4HImode:
++	  emit_insn (gen_neon_vset_lanev4hi (target, x, target, index));
++	  break;
++	case V8HImode:
++	  emit_insn (gen_neon_vset_lanev8hi (target, x, target, index));
++	  break;
++	case V2SImode:
++	  emit_insn (gen_neon_vset_lanev2si (target, x, target, index));
++	  break;
++	case V4SImode:
++	  emit_insn (gen_neon_vset_lanev4si (target, x, target, index));
++	  break;
++	case V2SFmode:
++	  emit_insn (gen_neon_vset_lanev2sf (target, x, target, index));
++	  break;
++	case V4SFmode:
++	  emit_insn (gen_neon_vset_lanev4sf (target, x, target, index));
++	  break;
++	case V2DImode:
++	  emit_insn (gen_neon_vset_lanev2di (target, x, target, index));
++	  break;
++	default:
++	  gcc_unreachable ();
++	}
+       return;
+     }
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-04-02 18:54:46 +0000
++++ new/gcc/config/arm/arm.md	2010-07-29 15:59:12 +0000
+@@ -497,9 +497,10 @@
+ 	(plus:DI (match_operand:DI 1 "s_register_operand" "%0, 0")
+ 		 (match_operand:DI 2 "s_register_operand" "r,  0")))
+    (clobber (reg:CC CC_REGNUM))]
+-  "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++  "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK) && !TARGET_NEON"
+   "#"
+-  "TARGET_32BIT && reload_completed"
++  "TARGET_32BIT && reload_completed
++   && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))"
+   [(parallel [(set (reg:CC_C CC_REGNUM)
+ 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
+ 				 (match_dup 1)))
+@@ -997,7 +998,7 @@
+ 	(minus:DI (match_operand:DI 1 "s_register_operand" "0,r,0")
+ 		  (match_operand:DI 2 "s_register_operand" "r,0,0")))
+    (clobber (reg:CC CC_REGNUM))]
+-  "TARGET_32BIT"
++  "TARGET_32BIT && !TARGET_NEON"
+   "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2"
+   [(set_attr "conds" "clob")
+    (set_attr "length" "8")]
+@@ -1784,6 +1785,7 @@
+ 	  [(match_operand:DI 1 "s_register_operand" "")
+ 	   (match_operand:DI 2 "s_register_operand" "")]))]
+   "TARGET_32BIT && reload_completed
++   && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))
+    && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
+   [(set (match_dup 0) (match_op_dup:SI 6 [(match_dup 1) (match_dup 2)]))
+    (set (match_dup 3) (match_op_dup:SI 6 [(match_dup 4) (match_dup 5)]))]
+@@ -1857,11 +1859,19 @@
+   }"
+ )
+ 
+-(define_insn "anddi3"
++(define_expand "anddi3"
++  [(set (match_operand:DI         0 "s_register_operand" "")
++	(and:DI (match_operand:DI 1 "s_register_operand" "")
++		(match_operand:DI 2 "neon_inv_logic_op2" "")))]
++  "TARGET_32BIT"
++  ""
++)
++
++(define_insn "*anddi3_insn"
+   [(set (match_operand:DI         0 "s_register_operand" "=&r,&r")
+ 	(and:DI (match_operand:DI 1 "s_register_operand"  "%0,r")
+ 		(match_operand:DI 2 "s_register_operand"   "r,r")))]
+-  "TARGET_32BIT && ! TARGET_IWMMXT"
++  "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON"
+   "#"
+   [(set_attr "length" "8")]
+ )
+@@ -2461,7 +2471,9 @@
+ 		(match_operand:DI 2 "s_register_operand" "r,0")))]
+   "TARGET_32BIT"
+   "#"
+-  "TARGET_32BIT && reload_completed && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
++  "TARGET_32BIT && reload_completed
++   && ! (TARGET_NEON && IS_VFP_REGNUM (REGNO (operands[0])))
++   && ! IS_IWMMXT_REGNUM (REGNO (operands[0]))"
+   [(set (match_dup 0) (and:SI (not:SI (match_dup 1)) (match_dup 2)))
+    (set (match_dup 3) (and:SI (not:SI (match_dup 4)) (match_dup 5)))]
+   "
+@@ -2585,11 +2597,19 @@
+   [(set_attr "conds" "set")]
+ )
+ 
+-(define_insn "iordi3"
++(define_expand "iordi3"
++  [(set (match_operand:DI         0 "s_register_operand" "")
++	(ior:DI (match_operand:DI 1 "s_register_operand" "")
++		(match_operand:DI 2 "neon_logic_op2" "")))]
++  "TARGET_32BIT"
++  ""
++)
++
++(define_insn "*iordi3_insn"
+   [(set (match_operand:DI         0 "s_register_operand" "=&r,&r")
+ 	(ior:DI (match_operand:DI 1 "s_register_operand"  "%0,r")
+ 		(match_operand:DI 2 "s_register_operand"   "r,r")))]
+-  "TARGET_32BIT && ! TARGET_IWMMXT"
++  "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON"
+   "#"
+   [(set_attr "length" "8")
+    (set_attr "predicable" "yes")]
+@@ -2715,11 +2735,19 @@
+   [(set_attr "conds" "set")]
+ )
+ 
+-(define_insn "xordi3"
++(define_expand "xordi3"
++  [(set (match_operand:DI         0 "s_register_operand" "")
++	(xor:DI (match_operand:DI 1 "s_register_operand" "")
++		(match_operand:DI 2 "s_register_operand" "")))]
++  "TARGET_32BIT"
++  ""
++)
++
++(define_insn "*xordi3_insn"
+   [(set (match_operand:DI         0 "s_register_operand" "=&r,&r")
+ 	(xor:DI (match_operand:DI 1 "s_register_operand"  "%0,r")
+ 		(match_operand:DI 2 "s_register_operand"   "r,r")))]
+-  "TARGET_32BIT && !TARGET_IWMMXT"
++  "TARGET_32BIT && !TARGET_IWMMXT && !TARGET_NEON"
+   "#"
+   [(set_attr "length" "8")
+    (set_attr "predicable" "yes")]
+
+=== modified file 'gcc/config/arm/arm_neon.h'
+--- old/gcc/config/arm/arm_neon.h	2009-11-03 17:58:59 +0000
++++ new/gcc/config/arm/arm_neon.h	2010-07-29 15:59:12 +0000
+@@ -414,12 +414,6 @@
+   return (int32x2_t)__builtin_neon_vaddv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vadd_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vadddi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vadd_f32 (float32x2_t __a, float32x2_t __b)
+ {
+@@ -444,6 +438,12 @@
+   return (uint32x2_t)__builtin_neon_vaddv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vadd_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vadddi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vadd_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -1368,12 +1368,6 @@
+   return (int32x2_t)__builtin_neon_vsubv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vsub_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vsubdi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vsub_f32 (float32x2_t __a, float32x2_t __b)
+ {
+@@ -1398,6 +1392,12 @@
+   return (uint32x2_t)__builtin_neon_vsubv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vsub_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vsubdi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vsub_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -5808,12 +5808,6 @@
+   return (int32x2_t)__builtin_neon_vget_lowv4si (__a);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vget_low_s64 (int64x2_t __a)
+-{
+-  return (int64x1_t)__builtin_neon_vget_lowv2di (__a);
+-}
+-
+ __extension__ static __inline float32x2_t __attribute__ ((__always_inline__))
+ vget_low_f32 (float32x4_t __a)
+ {
+@@ -5838,12 +5832,6 @@
+   return (uint32x2_t)__builtin_neon_vget_lowv4si ((int32x4_t) __a);
+ }
+ 
+-__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+-vget_low_u64 (uint64x2_t __a)
+-{
+-  return (uint64x1_t)__builtin_neon_vget_lowv2di ((int64x2_t) __a);
+-}
+-
+ __extension__ static __inline poly8x8_t __attribute__ ((__always_inline__))
+ vget_low_p8 (poly8x16_t __a)
+ {
+@@ -5856,6 +5844,18 @@
+   return (poly16x4_t)__builtin_neon_vget_lowv8hi ((int16x8_t) __a);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vget_low_s64 (int64x2_t __a)
++{
++  return (int64x1_t)__builtin_neon_vget_lowv2di (__a);
++}
++
++__extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
++vget_low_u64 (uint64x2_t __a)
++{
++  return (uint64x1_t)__builtin_neon_vget_lowv2di ((int64x2_t) __a);
++}
++
+ __extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+ vcvt_s32_f32 (float32x2_t __a)
+ {
+@@ -10386,12 +10386,6 @@
+   return (int32x2_t)__builtin_neon_vandv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vand_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vanddi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vand_u8 (uint8x8_t __a, uint8x8_t __b)
+ {
+@@ -10410,6 +10404,12 @@
+   return (uint32x2_t)__builtin_neon_vandv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vand_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vanddi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vand_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -10482,12 +10482,6 @@
+   return (int32x2_t)__builtin_neon_vorrv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vorr_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vorrdi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vorr_u8 (uint8x8_t __a, uint8x8_t __b)
+ {
+@@ -10506,6 +10500,12 @@
+   return (uint32x2_t)__builtin_neon_vorrv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vorr_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vorrdi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vorr_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -10578,12 +10578,6 @@
+   return (int32x2_t)__builtin_neon_veorv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-veor_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_veordi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ veor_u8 (uint8x8_t __a, uint8x8_t __b)
+ {
+@@ -10602,6 +10596,12 @@
+   return (uint32x2_t)__builtin_neon_veorv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++veor_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_veordi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ veor_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -10674,12 +10674,6 @@
+   return (int32x2_t)__builtin_neon_vbicv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vbic_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vbicdi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vbic_u8 (uint8x8_t __a, uint8x8_t __b)
+ {
+@@ -10698,6 +10692,12 @@
+   return (uint32x2_t)__builtin_neon_vbicv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vbic_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vbicdi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vbic_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+@@ -10770,12 +10770,6 @@
+   return (int32x2_t)__builtin_neon_vornv2si (__a, __b, 1);
+ }
+ 
+-__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
+-vorn_s64 (int64x1_t __a, int64x1_t __b)
+-{
+-  return (int64x1_t)__builtin_neon_vorndi (__a, __b, 1);
+-}
+-
+ __extension__ static __inline uint8x8_t __attribute__ ((__always_inline__))
+ vorn_u8 (uint8x8_t __a, uint8x8_t __b)
+ {
+@@ -10794,6 +10788,12 @@
+   return (uint32x2_t)__builtin_neon_vornv2si ((int32x2_t) __a, (int32x2_t) __b, 0);
+ }
+ 
++__extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
++vorn_s64 (int64x1_t __a, int64x1_t __b)
++{
++  return (int64x1_t)__builtin_neon_vorndi (__a, __b, 1);
++}
++
+ __extension__ static __inline uint64x1_t __attribute__ ((__always_inline__))
+ vorn_u64 (uint64x1_t __a, uint64x1_t __b)
+ {
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md	2009-11-11 14:23:03 +0000
++++ new/gcc/config/arm/neon.md	2010-07-29 15:59:12 +0000
+@@ -22,17 +22,12 @@
+ (define_constants
+   [(UNSPEC_ASHIFT_SIGNED	65)
+    (UNSPEC_ASHIFT_UNSIGNED	66)
+-   (UNSPEC_VABA			67)
+-   (UNSPEC_VABAL		68)
+    (UNSPEC_VABD			69)
+    (UNSPEC_VABDL		70)
+-   (UNSPEC_VABS			71)
+    (UNSPEC_VADD			72)
+    (UNSPEC_VADDHN		73)
+    (UNSPEC_VADDL		74)
+    (UNSPEC_VADDW		75)
+-   (UNSPEC_VAND			76)
+-   (UNSPEC_VBIC			77)
+    (UNSPEC_VBSL			78)
+    (UNSPEC_VCAGE		79)
+    (UNSPEC_VCAGT		80)
+@@ -40,18 +35,9 @@
+    (UNSPEC_VCGE			82)
+    (UNSPEC_VCGT			83)
+    (UNSPEC_VCLS			84)
+-   (UNSPEC_VCLZ			85)
+-   (UNSPEC_VCNT			86)
+-   (UNSPEC_VCOMBINE		87)
+    (UNSPEC_VCVT			88)
+    (UNSPEC_VCVT_N		89)
+-   (UNSPEC_VDUP_LANE		90)
+-   (UNSPEC_VDUP_N		91)
+-   (UNSPEC_VEOR			92)
+    (UNSPEC_VEXT			93)
+-   (UNSPEC_VGET_HIGH		94)
+-   (UNSPEC_VGET_LANE		95)
+-   (UNSPEC_VGET_LOW		96)
+    (UNSPEC_VHADD		97)
+    (UNSPEC_VHSUB		98)
+    (UNSPEC_VLD1			99)
+@@ -86,10 +72,6 @@
+    (UNSPEC_VMULL		128)
+    (UNSPEC_VMUL_LANE		129)
+    (UNSPEC_VMULL_LANE		130)
+-   (UNSPEC_VMUL_N		131)
+-   (UNSPEC_VMVN			132)
+-   (UNSPEC_VORN			133)
+-   (UNSPEC_VORR			134)
+    (UNSPEC_VPADAL		135)
+    (UNSPEC_VPADD		136)
+    (UNSPEC_VPADDL		137)
+@@ -125,7 +107,6 @@
+    (UNSPEC_VREV64		167)
+    (UNSPEC_VRSQRTE		168)
+    (UNSPEC_VRSQRTS		169)
+-   (UNSPEC_VSET_LANE		170)
+    (UNSPEC_VSHL			171)
+    (UNSPEC_VSHLL_N		172)
+    (UNSPEC_VSHL_N		173)
+@@ -335,6 +316,14 @@
+ 				  (V4HI "V2SI") (V8HI "V4SI")
+ 				  (V2SI "DI")   (V4SI "V2DI")])
+ 
++;; Double-sized modes with the same element size.
++;; Used for neon_vdup_lane, where the second operand is double-sized
++;; even when the first one is quad.
++(define_mode_attr V_double_vector_mode [(V16QI "V8QI") (V8HI "V4HI")
++                                        (V4SI "V2SI") (V4SF "V2SF")
++                                        (V8QI "V8QI") (V4HI "V4HI")
++                                        (V2SI "V2SI") (V2SF "V2SF")])
++
+ ;; Mode of result of comparison operations (and bit-select operand 1).
+ (define_mode_attr V_cmp_result [(V8QI "V8QI") (V16QI "V16QI")
+ 			        (V4HI "V4HI") (V8HI  "V8HI")
+@@ -688,7 +677,7 @@
+     elt = GET_MODE_NUNITS (<MODE>mode) - 1 - elt;
+   operands[2] = GEN_INT (elt);
+   
+-  return "vmov%?.<V_uf_sclr>\t%P0[%c2], %1";
++  return "vmov%?.<V_sz_elem>\t%P0[%c2], %1";
+ }
+   [(set_attr "predicable" "yes")
+    (set_attr "neon_type" "neon_mcr")])
+@@ -714,7 +703,7 @@
+   operands[0] = gen_rtx_REG (<V_HALF>mode, regno + hi);
+   operands[2] = GEN_INT (elt);
+ 
+-  return "vmov%?.<V_uf_sclr>\t%P0[%c2], %1";
++  return "vmov%?.<V_sz_elem>\t%P0[%c2], %1";
+ }
+   [(set_attr "predicable" "yes")
+    (set_attr "neon_type" "neon_mcr")]
+@@ -734,7 +723,7 @@
+ 
+   operands[0] = gen_rtx_REG (DImode, regno);
+ 
+-  return "vmov%?.64\t%P0, %Q1, %R1";
++  return "vmov%?\t%P0, %Q1, %R1";
+ }
+   [(set_attr "predicable" "yes")
+    (set_attr "neon_type" "neon_mcr_2_mcrr")]
+@@ -802,11 +791,11 @@
+           (parallel [(match_operand:SI 2 "immediate_operand" "i")])))]
+   "TARGET_NEON"
+ {
+-  int regno = REGNO (operands[1]) + INTVAL (operands[2]);
++  int regno = REGNO (operands[1]) + 2 * INTVAL (operands[2]);
+ 
+   operands[1] = gen_rtx_REG (DImode, regno);
+ 
+-  return "vmov%?.64\t%Q0, %R0, %P1";
++  return "vmov%?\t%Q0, %R0, %P1  @ v2di";
+ }
+   [(set_attr "predicable" "yes")
+    (set_attr "neon_type" "neon_int_1")]
+@@ -823,11 +812,8 @@
+ 
+ ;; Doubleword and quadword arithmetic.
+ 
+-;; NOTE: vadd/vsub and some other instructions also support 64-bit integer
+-;; element size, which we could potentially use for "long long" operations. We
+-;; don't want to do this at present though, because moving values from the
+-;; vector unit to the ARM core is currently slow and 64-bit addition (etc.) is
+-;; easy to do with ARM instructions anyway.
++;; NOTE: some other instructions also support 64-bit integer
++;; element size, which we could potentially use for "long long" operations.
+ 
+ (define_insn "*add<mode>3_neon"
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+@@ -843,6 +829,26 @@
+                     (const_string "neon_int_1")))]
+ )
+ 
++(define_insn "adddi3_neon"
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r")
++        (plus:DI (match_operand:DI 1 "s_register_operand" "%w,0,0")
++                 (match_operand:DI 2 "s_register_operand" "w,r,0")))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_NEON"
++{
++  switch (which_alternative)
++    {
++    case 0: return "vadd.i64\t%P0, %P1, %P2";
++    case 1: return "#";
++    case 2: return "#";
++    default: gcc_unreachable ();
++    }
++}
++  [(set_attr "neon_type" "neon_int_1,*,*")
++   (set_attr "conds" "*,clob,clob")
++   (set_attr "length" "*,8,8")]
++)
++
+ (define_insn "*sub<mode>3_neon"
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+@@ -857,6 +863,27 @@
+                     (const_string "neon_int_2")))]
+ )
+ 
++(define_insn "subdi3_neon"
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r")
++        (minus:DI (match_operand:DI 1 "s_register_operand" "w,0,r,0")
++                  (match_operand:DI 2 "s_register_operand" "w,r,0,0")))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_NEON"
++{
++  switch (which_alternative)
++    {
++    case 0: return "vsub.i64\t%P0, %P1, %P2";
++    case 1: /* fall through */ 
++    case 2: /* fall through */
++    case 3: return  "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2";
++    default: gcc_unreachable ();
++    }
++}
++  [(set_attr "neon_type" "neon_int_2,*,*,*")
++   (set_attr "conds" "*,clob,clob,clob")
++   (set_attr "length" "*,8,8,8")]
++)
++
+ (define_insn "*mul<mode>3_neon"
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (mult:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+@@ -878,7 +905,7 @@
+                                     (const_string "neon_mul_qqq_8_16_32_ddd_32")))))]
+ )
+ 
+-(define_insn "*mul<mode>3add<mode>_neon"
++(define_insn "mul<mode>3add<mode>_neon"
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (plus:VDQ (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+                             (match_operand:VDQ 3 "s_register_operand" "w"))
+@@ -900,7 +927,7 @@
+                                     (const_string "neon_mla_qqq_32_qqd_32_scalar")))))]
+ )
+ 
+-(define_insn "*mul<mode>3neg<mode>add<mode>_neon"
++(define_insn "mul<mode>3neg<mode>add<mode>_neon"
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "0")
+                    (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+@@ -940,10 +967,9 @@
+ )
+ 
+ (define_insn "iordi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w,0")
+-		    (match_operand:DI 2 "neon_logic_op2" "w,Dl")]
+-                    UNSPEC_VORR))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r")
++        (ior:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r")
++		(match_operand:DI 2 "neon_logic_op2" "w,Dl,r,r")))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+@@ -951,10 +977,13 @@
+     case 0: return "vorr\t%P0, %P1, %P2";
+     case 1: return neon_output_logic_immediate ("vorr", &operands[2],
+ 		     DImode, 0, VALID_NEON_QREG_MODE (DImode));
++    case 2: return "#";
++    case 3: return "#";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_1")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
++   (set_attr "length" "*,*,8,8")]
+ )
+ 
+ ;; The concrete forms of the Neon immediate-logic instructions are vbic and
+@@ -980,10 +1009,9 @@
+ )
+ 
+ (define_insn "anddi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w,0")
+-		    (match_operand:DI 2 "neon_inv_logic_op2" "w,DL")]
+-                    UNSPEC_VAND))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r")
++        (and:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r")
++		(match_operand:DI 2 "neon_inv_logic_op2" "w,DL,r,r")))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+@@ -991,10 +1019,13 @@
+     case 0: return "vand\t%P0, %P1, %P2";
+     case 1: return neon_output_logic_immediate ("vand", &operands[2],
+     		     DImode, 1, VALID_NEON_QREG_MODE (DImode));
++    case 2: return "#";
++    case 3: return "#";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_1")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
++   (set_attr "length" "*,*,8,8")]
+ )
+ 
+ (define_insn "orn<mode>3_neon"
+@@ -1007,13 +1038,16 @@
+ )
+ 
+ (define_insn "orndi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w")
+-		    (match_operand:DI 2 "s_register_operand" "w")]
+-                    UNSPEC_VORN))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
++	(ior:DI (match_operand:DI 1 "s_register_operand" "w,r,0")
++	         (not:DI (match_operand:DI 2 "s_register_operand" "w,0,r"))))]
+   "TARGET_NEON"
+-  "vorn\t%P0, %P1, %P2"
+-  [(set_attr "neon_type" "neon_int_1")]
++  "@
++   vorn\t%P0, %P1, %P2
++   #
++   #"
++  [(set_attr "neon_type" "neon_int_1,*,*")
++   (set_attr "length" "*,8,8")]
+ )
+ 
+ (define_insn "bic<mode>3_neon"
+@@ -1025,14 +1059,18 @@
+   [(set_attr "neon_type" "neon_int_1")]
+ )
+ 
++;; Compare to *anddi_notdi_di.
+ (define_insn "bicdi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w")
+-		     (match_operand:DI 2 "s_register_operand" "w")]
+-                    UNSPEC_VBIC))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?=&r,?&r")
++        (and:DI (not:DI (match_operand:DI 2 "s_register_operand" "w,r,0"))
++		(match_operand:DI 1 "s_register_operand" "w,0,r")))]
+   "TARGET_NEON"
+-  "vbic\t%P0, %P1, %P2"
+-  [(set_attr "neon_type" "neon_int_1")]
++  "@
++   vbic\t%P0, %P1, %P2
++   #
++   #"
++  [(set_attr "neon_type" "neon_int_1,*,*")
++   (set_attr "length" "*,8,8")]
+ )
+ 
+ (define_insn "xor<mode>3"
+@@ -1045,13 +1083,16 @@
+ )
+ 
+ (define_insn "xordi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w")
+-		     (match_operand:DI 2 "s_register_operand" "w")]
+-                    UNSPEC_VEOR))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r")
++        (xor:DI (match_operand:DI 1 "s_register_operand" "%w,0,r")
++	        (match_operand:DI 2 "s_register_operand" "w,r,r")))]
+   "TARGET_NEON"
+-  "veor\t%P0, %P1, %P2"
+-  [(set_attr "neon_type" "neon_int_1")]
++  "@
++   veor\t%P0, %P1, %P2
++   #
++   #"
++  [(set_attr "neon_type" "neon_int_1,*,*")
++   (set_attr "length" "*,8,8")]
+ )
+ 
+ (define_insn "one_cmpl<mode>2"
+@@ -1711,11 +1752,37 @@
+ 
+ ; good for plain vadd, vaddq.
+ 
+-(define_insn "neon_vadd<mode>"
++(define_expand "neon_vadd<mode>"
++  [(match_operand:VDQX 0 "s_register_operand" "=w")
++   (match_operand:VDQX 1 "s_register_operand" "w")
++   (match_operand:VDQX 2 "s_register_operand" "w")
++   (match_operand:SI 3 "immediate_operand" "i")]
++  "TARGET_NEON"
++{
++  if (!<Is_float_mode> || flag_unsafe_math_optimizations)
++    emit_insn (gen_add<mode>3 (operands[0], operands[1], operands[2]));
++  else
++    emit_insn (gen_neon_vadd<mode>_unspec (operands[0], operands[1],
++					   operands[2]));
++  DONE;
++})
++
++; Note that NEON operations don't support the full IEEE 754 standard: in
++; particular, denormal values are flushed to zero.  This means that GCC cannot
++; use those instructions for autovectorization, etc. unless
++; -funsafe-math-optimizations is in effect (in which case flush-to-zero
++; behaviour is permissible).  Intrinsic operations (provided by the arm_neon.h
++; header) must work in either case: if -funsafe-math-optimizations is given,
++; intrinsics expand to "canonical" RTL where possible, otherwise intrinsics
++; expand to unspecs (which may potentially limit the extent to which they might
++; be optimized by generic code).
++
++; Used for intrinsics when flag_unsafe_math_optimizations is false.
++
++(define_insn "neon_vadd<mode>_unspec"
+   [(set (match_operand:VDQX 0 "s_register_operand" "=w")
+         (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")
+-		      (match_operand:VDQX 2 "s_register_operand" "w")
+-                      (match_operand:SI 3 "immediate_operand" "i")]
++		      (match_operand:VDQX 2 "s_register_operand" "w")]
+                      UNSPEC_VADD))]
+   "TARGET_NEON"
+   "vadd.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+@@ -1788,6 +1855,8 @@
+   [(set_attr "neon_type" "neon_int_4")]
+ )
+ 
++;; We cannot replace this unspec with mul<mode>3 because of the odd 
++;; polynomial multiplication case that can specified by operand 3.
+ (define_insn "neon_vmul<mode>"
+   [(set (match_operand:VDQW 0 "s_register_operand" "=w")
+         (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "w")
+@@ -1811,13 +1880,31 @@
+                                     (const_string "neon_mul_qqq_8_16_32_ddd_32")))))]
+ )
+ 
+-(define_insn "neon_vmla<mode>"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
+-        (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
+-		      (match_operand:VDQW 2 "s_register_operand" "w")
+-		      (match_operand:VDQW 3 "s_register_operand" "w")
+-                     (match_operand:SI 4 "immediate_operand" "i")]
+-                    UNSPEC_VMLA))]
++(define_expand "neon_vmla<mode>"
++  [(match_operand:VDQW 0 "s_register_operand" "=w")
++   (match_operand:VDQW 1 "s_register_operand" "0")
++   (match_operand:VDQW 2 "s_register_operand" "w")
++   (match_operand:VDQW 3 "s_register_operand" "w")
++   (match_operand:SI 4 "immediate_operand" "i")]
++  "TARGET_NEON"
++{
++  if (!<Is_float_mode> || flag_unsafe_math_optimizations)
++    emit_insn (gen_mul<mode>3add<mode>_neon (operands[0], operands[1],
++				             operands[2], operands[3]));
++  else
++    emit_insn (gen_neon_vmla<mode>_unspec (operands[0], operands[1],
++					   operands[2], operands[3]));
++  DONE;
++})
++
++; Used for intrinsics when flag_unsafe_math_optimizations is false.
++
++(define_insn "neon_vmla<mode>_unspec"
++  [(set (match_operand:VDQ 0 "s_register_operand" "=w")
++	(unspec:VDQ [(match_operand:VDQ 1 "s_register_operand" "0")
++		     (match_operand:VDQ 2 "s_register_operand" "w")
++		     (match_operand:VDQ 3 "s_register_operand" "w")]
++		    UNSPEC_VMLA))]
+   "TARGET_NEON"
+   "vmla.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set (attr "neon_type")
+@@ -1850,13 +1937,31 @@
+                    (const_string "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long")))]
+ )
+ 
+-(define_insn "neon_vmls<mode>"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
+-        (unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "0")
+-		      (match_operand:VDQW 2 "s_register_operand" "w")
+-		      (match_operand:VDQW 3 "s_register_operand" "w")
+-                     (match_operand:SI 4 "immediate_operand" "i")]
+-                    UNSPEC_VMLS))]
++(define_expand "neon_vmls<mode>"
++  [(match_operand:VDQW 0 "s_register_operand" "=w")
++   (match_operand:VDQW 1 "s_register_operand" "0")
++   (match_operand:VDQW 2 "s_register_operand" "w")
++   (match_operand:VDQW 3 "s_register_operand" "w")
++   (match_operand:SI 4 "immediate_operand" "i")]
++  "TARGET_NEON"
++{
++  if (!<Is_float_mode> || flag_unsafe_math_optimizations)
++    emit_insn (gen_mul<mode>3neg<mode>add<mode>_neon (operands[0],
++		 operands[1], operands[2], operands[3]));
++  else
++    emit_insn (gen_neon_vmls<mode>_unspec (operands[0], operands[1],
++					   operands[2], operands[3]));
++  DONE;
++})
++
++; Used for intrinsics when flag_unsafe_math_optimizations is false.
++
++(define_insn "neon_vmls<mode>_unspec"
++  [(set (match_operand:VDQ 0 "s_register_operand" "=w")
++	(unspec:VDQ [(match_operand:VDQ 1 "s_register_operand" "0")
++		     (match_operand:VDQ 2 "s_register_operand" "w")
++		     (match_operand:VDQ 3 "s_register_operand" "w")]
++		    UNSPEC_VMLS))]
+   "TARGET_NEON"
+   "vmls.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set (attr "neon_type")
+@@ -1966,11 +2071,27 @@
+                    (const_string "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar")))]
+ )
+ 
+-(define_insn "neon_vsub<mode>"
++(define_expand "neon_vsub<mode>"
++  [(match_operand:VDQX 0 "s_register_operand" "=w")
++   (match_operand:VDQX 1 "s_register_operand" "w")
++   (match_operand:VDQX 2 "s_register_operand" "w")
++   (match_operand:SI 3 "immediate_operand" "i")]
++  "TARGET_NEON"
++{
++  if (!<Is_float_mode> || flag_unsafe_math_optimizations)
++    emit_insn (gen_sub<mode>3 (operands[0], operands[1], operands[2]));
++  else
++    emit_insn (gen_neon_vsub<mode>_unspec (operands[0], operands[1],
++					   operands[2]));
++  DONE;
++})
++
++; Used for intrinsics when flag_unsafe_math_optimizations is false.
++
++(define_insn "neon_vsub<mode>_unspec"
+   [(set (match_operand:VDQX 0 "s_register_operand" "=w")
+         (unspec:VDQX [(match_operand:VDQX 1 "s_register_operand" "w")
+-		      (match_operand:VDQX 2 "s_register_operand" "w")
+-                      (match_operand:SI 3 "immediate_operand" "i")]
++		      (match_operand:VDQX 2 "s_register_operand" "w")]
+                      UNSPEC_VSUB))]
+   "TARGET_NEON"
+   "vsub.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+@@ -2153,11 +2274,11 @@
+ 
+ (define_insn "neon_vaba<mode>"
+   [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
+-        (unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "0")
+-		       (match_operand:VDQIW 2 "s_register_operand" "w")
+-		       (match_operand:VDQIW 3 "s_register_operand" "w")
+-                       (match_operand:SI 4 "immediate_operand" "i")]
+-		      UNSPEC_VABA))]
++        (plus:VDQIW (match_operand:VDQIW 1 "s_register_operand" "0")
++                    (unspec:VDQIW [(match_operand:VDQIW 2 "s_register_operand" "w")
++		                   (match_operand:VDQIW 3 "s_register_operand" "w")
++                                   (match_operand:SI 4 "immediate_operand" "i")]
++		                  UNSPEC_VABD)))]
+   "TARGET_NEON"
+   "vaba.%T4%#<V_sz_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set (attr "neon_type")
+@@ -2167,11 +2288,11 @@
+ 
+ (define_insn "neon_vabal<mode>"
+   [(set (match_operand:<V_widen> 0 "s_register_operand" "=w")
+-        (unspec:<V_widen> [(match_operand:<V_widen> 1 "s_register_operand" "0")
+-		           (match_operand:VW 2 "s_register_operand" "w")
+-		           (match_operand:VW 3 "s_register_operand" "w")
+-                           (match_operand:SI 4 "immediate_operand" "i")]
+-                          UNSPEC_VABAL))]
++        (plus:<V_widen> (match_operand:<V_widen> 1 "s_register_operand" "0")
++                        (unspec:<V_widen> [(match_operand:VW 2 "s_register_operand" "w")
++                                           (match_operand:VW 3 "s_register_operand" "w")
++                                           (match_operand:SI 4 "immediate_operand" "i")]
++                          UNSPEC_VABDL)))]
+   "TARGET_NEON"
+   "vabal.%T4%#<V_sz_elem>\t%q0, %P2, %P3"
+   [(set_attr "neon_type" "neon_vaba")]
+@@ -2302,22 +2423,15 @@
+                     (const_string "neon_fp_vrecps_vrsqrts_qqq")))]
+ )
+ 
+-(define_insn "neon_vabs<mode>"
+-  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
+-	(unspec:VDQW [(match_operand:VDQW 1 "s_register_operand" "w")
+-		      (match_operand:SI 2 "immediate_operand" "i")]
+-                     UNSPEC_VABS))]
++(define_expand "neon_vabs<mode>"
++  [(match_operand:VDQW 0 "s_register_operand" "")
++   (match_operand:VDQW 1 "s_register_operand" "")
++   (match_operand:SI 2 "immediate_operand" "")]
+   "TARGET_NEON"
+-  "vabs.<V_s_elem>\t%<V_reg>0, %<V_reg>1"
+-  [(set (attr "neon_type")
+-     (if_then_else (ior (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+-                        (ne (symbol_ref "<Is_float_mode>") (const_int 0)))
+-                   (if_then_else
+-                      (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+-                      (const_string "neon_fp_vadd_ddd_vabs_dd")
+-                      (const_string "neon_fp_vadd_qqq_vabs_qq"))
+-                   (const_string "neon_vqneg_vqabs")))]
+-)
++{
++  emit_insn (gen_abs<mode>2 (operands[0], operands[1]));
++  DONE;
++})
+ 
+ (define_insn "neon_vqabs<mode>"
+   [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
+@@ -2359,26 +2473,42 @@
+   [(set_attr "neon_type" "neon_int_1")]
+ )
+ 
+-(define_insn "neon_vclz<mode>"
++(define_insn "clz<mode>2"
+   [(set (match_operand:VDQIW 0 "s_register_operand" "=w")
+-	(unspec:VDQIW [(match_operand:VDQIW 1 "s_register_operand" "w")
+-		       (match_operand:SI 2 "immediate_operand" "i")]
+-		      UNSPEC_VCLZ))]
++        (clz:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w")))]
+   "TARGET_NEON"
+   "vclz.<V_if_elem>\t%<V_reg>0, %<V_reg>1"
+   [(set_attr "neon_type" "neon_int_1")]
+ )
+ 
+-(define_insn "neon_vcnt<mode>"
++(define_expand "neon_vclz<mode>"
++  [(match_operand:VDQIW 0 "s_register_operand" "")
++   (match_operand:VDQIW 1 "s_register_operand" "")
++   (match_operand:SI 2 "immediate_operand" "")]
++  "TARGET_NEON"
++{
++  emit_insn (gen_clz<mode>2 (operands[0], operands[1]));
++  DONE;
++})
++
++(define_insn "popcount<mode>2"
+   [(set (match_operand:VE 0 "s_register_operand" "=w")
+-	(unspec:VE [(match_operand:VE 1 "s_register_operand" "w")
+-                    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_VCNT))]
++        (popcount:VE (match_operand:VE 1 "s_register_operand" "w")))]
+   "TARGET_NEON"
+   "vcnt.<V_sz_elem>\t%<V_reg>0, %<V_reg>1"
+   [(set_attr "neon_type" "neon_int_1")]
+ )
+ 
++(define_expand "neon_vcnt<mode>"
++  [(match_operand:VE 0 "s_register_operand" "=w")
++   (match_operand:VE 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")]
++  "TARGET_NEON"
++{
++  emit_insn (gen_popcount<mode>2 (operands[0], operands[1]));
++  DONE;
++})
++
+ (define_insn "neon_vrecpe<mode>"
+   [(set (match_operand:V32 0 "s_register_operand" "=w")
+ 	(unspec:V32 [(match_operand:V32 1 "s_register_operand" "w")
+@@ -2555,126 +2685,65 @@
+ ; Operand 3 (info word) is ignored because it does nothing useful with 64-bit
+ ; elements.
+ 
+-(define_insn "neon_vget_lanedi"
+-  [(set (match_operand:DI 0 "s_register_operand" "=r")
+-       (unspec:DI [(match_operand:DI 1 "s_register_operand" "w")
+-                   (match_operand:SI 2 "immediate_operand" "i")
+-                   (match_operand:SI 3 "immediate_operand" "i")]
+-                  UNSPEC_VGET_LANE))]
++(define_expand "neon_vget_lanedi"
++  [(match_operand:DI 0 "s_register_operand" "=r")
++   (match_operand:DI 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")
++   (match_operand:SI 3 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+   neon_lane_bounds (operands[2], 0, 1);
+-  return "vmov%?\t%Q0, %R0, %P1  @ di";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
++  emit_move_insn (operands[0], operands[1]);
++  DONE;
++})
+ 
+-(define_insn "neon_vget_lanev2di"
+-  [(set (match_operand:DI 0 "s_register_operand" "=r")
+-       (unspec:DI [(match_operand:V2DI 1 "s_register_operand" "w")
+-                   (match_operand:SI 2 "immediate_operand" "i")
+-                   (match_operand:SI 3 "immediate_operand" "i")]
+-                  UNSPEC_VGET_LANE))]
++(define_expand "neon_vget_lanev2di"
++  [(match_operand:DI 0 "s_register_operand" "=r")
++   (match_operand:V2DI 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")
++   (match_operand:SI 3 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  rtx ops[2];
+-  unsigned int regno = REGNO (operands[1]);
+-  unsigned int elt = INTVAL (operands[2]);
+-
+   neon_lane_bounds (operands[2], 0, 2);
+-
+-  ops[0] = operands[0];
+-  ops[1] = gen_rtx_REG (DImode, regno + 2 * elt);
+-  output_asm_insn ("vmov%?\t%Q0, %R0, %P1  @ v2di", ops);
+-
+-  return "";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
+-
+-(define_insn "neon_vset_lane<mode>"
+-  [(set (match_operand:VD 0 "s_register_operand" "=w")
+-	(unspec:VD [(match_operand:<V_elem> 1 "s_register_operand" "r")
+-		    (match_operand:VD 2 "s_register_operand" "0")
+-                    (match_operand:SI 3 "immediate_operand" "i")]
+-                   UNSPEC_VSET_LANE))]
++  emit_insn (gen_vec_extractv2di (operands[0], operands[1], operands[2]));
++  DONE;
++})
++
++(define_expand "neon_vset_lane<mode>"
++  [(match_operand:VDQ 0 "s_register_operand" "=w")
++   (match_operand:<V_elem> 1 "s_register_operand" "r")
++   (match_operand:VDQ 2 "s_register_operand" "0")
++   (match_operand:SI 3 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
++  unsigned int elt = INTVAL (operands[3]);
+   neon_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<MODE>mode));
+-  return "vmov%?.<V_sz_elem>\t%P0[%c3], %1";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
++
++  if (BYTES_BIG_ENDIAN)
++    {
++      unsigned int reg_nelts
++	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<MODE>mode));
++      elt ^= reg_nelts - 1;
++    }
++
++  emit_insn (gen_vec_set<mode>_internal (operands[0], operands[1],
++                                         GEN_INT (1 << elt), operands[2]));
++  DONE;
++})
+ 
+ ; See neon_vget_lanedi comment for reasons operands 2 & 3 are ignored.
+ 
+-(define_insn "neon_vset_lanedi"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "r")
+-		    (match_operand:DI 2 "s_register_operand" "0")
+-                    (match_operand:SI 3 "immediate_operand" "i")]
+-                   UNSPEC_VSET_LANE))]
++(define_expand "neon_vset_lanedi"
++  [(match_operand:DI 0 "s_register_operand" "=w")
++   (match_operand:DI 1 "s_register_operand" "r")
++   (match_operand:DI 2 "s_register_operand" "0")
++   (match_operand:SI 3 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+   neon_lane_bounds (operands[3], 0, 1);
+-  return "vmov%?\t%P0, %Q1, %R1  @ di";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
+-
+-(define_insn "neon_vset_lane<mode>"
+-  [(set (match_operand:VQ 0 "s_register_operand" "=w")
+-	(unspec:VQ [(match_operand:<V_elem> 1 "s_register_operand" "r")
+-		    (match_operand:VQ 2 "s_register_operand" "0")
+-                    (match_operand:SI 3 "immediate_operand" "i")]
+-                   UNSPEC_VSET_LANE))]
+-  "TARGET_NEON"
+-{
+-  rtx ops[4];
+-  unsigned int regno = REGNO (operands[0]);
+-  unsigned int halfelts = GET_MODE_NUNITS (<MODE>mode) / 2;
+-  unsigned int elt = INTVAL (operands[3]);
+-
+-  neon_lane_bounds (operands[3], 0, halfelts * 2);
+-
+-  ops[0] = gen_rtx_REG (<V_HALF>mode, regno + 2 * (elt / halfelts));
+-  ops[1] = operands[1];
+-  ops[2] = GEN_INT (elt % halfelts);
+-  output_asm_insn ("vmov%?.<V_sz_elem>\t%P0[%c2], %1", ops);
+-
+-  return "";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
+-
+-(define_insn "neon_vset_lanev2di"
+-  [(set (match_operand:V2DI 0 "s_register_operand" "=w")
+-	(unspec:V2DI [(match_operand:DI 1 "s_register_operand" "r")
+-		      (match_operand:V2DI 2 "s_register_operand" "0")
+-                      (match_operand:SI 3 "immediate_operand" "i")]
+-                   UNSPEC_VSET_LANE))]
+-  "TARGET_NEON"
+-{
+-  rtx ops[2];
+-  unsigned int regno = REGNO (operands[0]);
+-  unsigned int elt = INTVAL (operands[3]);
+-
+-  neon_lane_bounds (operands[3], 0, 2);
+-
+-  ops[0] = gen_rtx_REG (DImode, regno + 2 * elt);
+-  ops[1] = operands[1];
+-  output_asm_insn ("vmov%?\t%P0, %Q1, %R1  @ v2di", ops);
+-
+-  return "";
+-}
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
++  emit_move_insn (operands[0], operands[1]);
++  DONE;
++})
+ 
+ (define_expand "neon_vcreate<mode>"
+   [(match_operand:VDX 0 "s_register_operand" "")
+@@ -2688,8 +2757,7 @@
+ 
+ (define_insn "neon_vdup_n<mode>"
+   [(set (match_operand:VX 0 "s_register_operand" "=w")
+-	(unspec:VX [(match_operand:<V_elem> 1 "s_register_operand" "r")]
+-		   UNSPEC_VDUP_N))]
++        (vec_duplicate:VX (match_operand:<V_elem> 1 "s_register_operand" "r")))]
+   "TARGET_NEON"
+   "vdup%?.<V_sz_elem>\t%<V_reg>0, %1"
+   ;; Assume this schedules like vmov.
+@@ -2699,8 +2767,7 @@
+ 
+ (define_insn "neon_vdup_n<mode>"
+   [(set (match_operand:V32 0 "s_register_operand" "=w,w")
+-	(unspec:V32 [(match_operand:<V_elem> 1 "s_register_operand" "r,t")]
+-		    UNSPEC_VDUP_N))]
++        (vec_duplicate:V32 (match_operand:<V_elem> 1 "s_register_operand" "r,t")))]
+   "TARGET_NEON"
+   "@
+   vdup%?.<V_sz_elem>\t%<V_reg>0, %1
+@@ -2710,61 +2777,76 @@
+    (set_attr "neon_type" "neon_bp_simple")]
+ )
+ 
+-(define_insn "neon_vdup_ndi"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "r")]
+-                   UNSPEC_VDUP_N))]
++(define_expand "neon_vdup_ndi"
++  [(match_operand:DI 0 "s_register_operand" "=w")
++   (match_operand:DI 1 "s_register_operand" "r")]
+   "TARGET_NEON"
+-  "vmov%?\t%P0, %Q1, %R1"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "neon_type" "neon_bp_simple")]
++{
++  emit_move_insn (operands[0], operands[1]);
++  DONE;
++}
+ )
+ 
+ (define_insn "neon_vdup_nv2di"
+-  [(set (match_operand:V2DI 0 "s_register_operand" "=w")
+-	(unspec:V2DI [(match_operand:DI 1 "s_register_operand" "r")]
+-                     UNSPEC_VDUP_N))]
++  [(set (match_operand:V2DI 0 "s_register_operand" "=w,w")
++        (vec_duplicate:V2DI (match_operand:DI 1 "s_register_operand" "r,w")))]
+   "TARGET_NEON"
+-  "vmov%?\t%e0, %Q1, %R1\;vmov%?\t%f0, %Q1, %R1"
++  "@
++  vmov%?\t%e0, %Q1, %R1\;vmov%?\t%f0, %Q1, %R1
++  vmov%?\t%e0, %P1\;vmov%?\t%f0, %P1"
+   [(set_attr "predicable" "yes")
+    (set_attr "length" "8")
+    (set_attr "neon_type" "neon_bp_simple")]
+ )
+ 
+-(define_insn "neon_vdup_lane<mode>"
+-  [(set (match_operand:VD 0 "s_register_operand" "=w")
+-	(unspec:VD [(match_operand:VD 1 "s_register_operand" "w")
+-		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_VDUP_LANE))]
++(define_insn "neon_vdup_lane<mode>_internal"
++  [(set (match_operand:VDQW 0 "s_register_operand" "=w")
++  	(vec_duplicate:VDQW 
++          (vec_select:<V_elem>
++            (match_operand:<V_double_vector_mode> 1 "s_register_operand" "w")
++            (parallel [(match_operand:SI 2 "immediate_operand" "i")]))))]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<MODE>mode));
+-  return "vdup.<V_sz_elem>\t%P0, %P1[%c2]";
++  if (BYTES_BIG_ENDIAN)
++    {
++      int elt = INTVAL (operands[2]);
++      elt = GET_MODE_NUNITS (<V_double_vector_mode>mode) - 1 - elt;
++      operands[2] = GEN_INT (elt);
++    }
++  if (<Is_d_reg>)
++    return "vdup.<V_sz_elem>\t%P0, %P1[%c2]";
++  else
++    return "vdup.<V_sz_elem>\t%q0, %P1[%c2]";
+ }
+   ;; Assume this schedules like vmov.
+   [(set_attr "neon_type" "neon_bp_simple")]
+ )
+ 
+-(define_insn "neon_vdup_lane<mode>"
+-  [(set (match_operand:VQ 0 "s_register_operand" "=w")
+-	(unspec:VQ [(match_operand:<V_HALF> 1 "s_register_operand" "w")
+-		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_VDUP_LANE))]
++(define_expand "neon_vdup_lane<mode>"
++  [(match_operand:VDQW 0 "s_register_operand" "=w")
++   (match_operand:<V_double_vector_mode> 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+-  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<V_HALF>mode));
+-  return "vdup.<V_sz_elem>\t%q0, %P1[%c2]";
+-}
+-  ;; Assume this schedules like vmov.
+-  [(set_attr "neon_type" "neon_bp_simple")]
+-)
++  neon_lane_bounds (operands[2], 0, GET_MODE_NUNITS (<V_double_vector_mode>mode));
++  if (BYTES_BIG_ENDIAN)
++    {
++      unsigned int elt = INTVAL (operands[2]);
++      unsigned int reg_nelts
++	= 64 / GET_MODE_BITSIZE (GET_MODE_INNER (<V_double_vector_mode>mode));
++      elt ^= reg_nelts - 1;
++      operands[2] = GEN_INT (elt);
++    }
++    emit_insn (gen_neon_vdup_lane<mode>_internal (operands[0], operands[1],
++                                                  operands[2]));
++    DONE;
++})
+ 
+ ; Scalar index is ignored, since only zero is valid here.
+ (define_expand "neon_vdup_lanedi"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w")
+-	(unspec:DI [(match_operand:DI 1 "s_register_operand" "w")
+-		    (match_operand:SI 2 "immediate_operand" "i")]
+-                   UNSPEC_VDUP_LANE))]
++  [(match_operand:DI 0 "s_register_operand" "=w")
++   (match_operand:DI 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+   neon_lane_bounds (operands[2], 0, 1);
+@@ -2772,20 +2854,17 @@
+   DONE;
+ })
+ 
+-; Likewise.
+-(define_insn "neon_vdup_lanev2di"
+-  [(set (match_operand:V2DI 0 "s_register_operand" "=w")
+-	(unspec:V2DI [(match_operand:DI 1 "s_register_operand" "w")
+-		      (match_operand:SI 2 "immediate_operand" "i")]
+-                     UNSPEC_VDUP_LANE))]
++; Likewise for v2di, as the DImode second operand has only a single element.
++(define_expand "neon_vdup_lanev2di"
++  [(match_operand:V2DI 0 "s_register_operand" "=w")
++   (match_operand:DI 1 "s_register_operand" "w")
++   (match_operand:SI 2 "immediate_operand" "i")]
+   "TARGET_NEON"
+ {
+   neon_lane_bounds (operands[2], 0, 1);
+-  return "vmov\t%e0, %P1\;vmov\t%f0, %P1";
+-}
+-  [(set_attr "length" "8")
+-   (set_attr "neon_type" "neon_bp_simple")]
+-)
++  emit_insn (gen_neon_vdup_nv2di (operands[0], operands[1]));
++  DONE;
++})
+ 
+ ;; In this insn, operand 1 should be low, and operand 2 the high part of the
+ ;; dest vector.
+@@ -2796,9 +2875,8 @@
+ 
+ (define_insn "neon_vcombine<mode>"
+   [(set (match_operand:<V_DOUBLE> 0 "s_register_operand" "=w")
+-	(unspec:<V_DOUBLE> [(match_operand:VDX 1 "s_register_operand" "w")
+-			    (match_operand:VDX 2 "s_register_operand" "w")]
+-                           UNSPEC_VCOMBINE))]
++        (vec_concat:<V_DOUBLE> (match_operand:VDX 1 "s_register_operand" "w")
++			       (match_operand:VDX 2 "s_register_operand" "w")))]
+   "TARGET_NEON"
+ {
+   int dest = REGNO (operands[0]);
+@@ -2838,27 +2916,171 @@
+    (set_attr "neon_type" "neon_bp_simple")]
+ )
+ 
+-(define_insn "neon_vget_high<mode>"
+-  [(set (match_operand:<V_HALF> 0 "s_register_operand" "=w")
+-	(unspec:<V_HALF> [(match_operand:VQX 1 "s_register_operand" "w")]
+-			 UNSPEC_VGET_HIGH))]
+-  "TARGET_NEON"
+-{
+-  int dest = REGNO (operands[0]);
+-  int src = REGNO (operands[1]);
+-
+-  if (dest != src + 2)
+-    return "vmov\t%P0, %f1";
+-  else
+-    return "";
+-}
+-  [(set_attr "neon_type" "neon_bp_simple")]
+-)
+-
+-(define_insn "neon_vget_low<mode>"
+-  [(set (match_operand:<V_HALF> 0 "s_register_operand" "=w")
+-	(unspec:<V_HALF> [(match_operand:VQX 1 "s_register_operand" "w")]
+-			 UNSPEC_VGET_LOW))]
++(define_insn "neon_vget_highv16qi"
++  [(set (match_operand:V8QI 0 "s_register_operand" "=w")
++	(vec_select:V8QI (match_operand:V16QI 1 "s_register_operand" "w")
++                         (parallel [(const_int 8) (const_int 9)
++			            (const_int 10) (const_int 11)
++				    (const_int 12) (const_int 13)
++				    (const_int 14) (const_int 15)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src + 2)
++    return "vmov\t%P0, %f1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_highv8hi"
++  [(set (match_operand:V4HI 0 "s_register_operand" "=w")
++	(vec_select:V4HI (match_operand:V8HI 1 "s_register_operand" "w")
++	                 (parallel [(const_int 4) (const_int 5)
++			            (const_int 6) (const_int 7)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src + 2)
++    return "vmov\t%P0, %f1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_highv4si"
++  [(set (match_operand:V2SI 0 "s_register_operand" "=w")
++	(vec_select:V2SI (match_operand:V4SI 1 "s_register_operand" "w")
++	                 (parallel [(const_int 2) (const_int 3)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src + 2)
++    return "vmov\t%P0, %f1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_highv4sf"
++  [(set (match_operand:V2SF 0 "s_register_operand" "=w")
++	(vec_select:V2SF (match_operand:V4SF 1 "s_register_operand" "w")
++	                 (parallel [(const_int 2) (const_int 3)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src + 2)
++    return "vmov\t%P0, %f1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_highv2di"
++  [(set (match_operand:DI 0 "s_register_operand" "=w")
++	(vec_select:DI (match_operand:V2DI 1 "s_register_operand" "w")
++	               (parallel [(const_int 1)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src + 2)
++    return "vmov\t%P0, %f1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_lowv16qi"
++  [(set (match_operand:V8QI 0 "s_register_operand" "=w")
++	(vec_select:V8QI (match_operand:V16QI 1 "s_register_operand" "w")
++                         (parallel [(const_int 0) (const_int 1)
++			            (const_int 2) (const_int 3)
++				    (const_int 4) (const_int 5)
++				    (const_int 6) (const_int 7)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src)
++    return "vmov\t%P0, %e1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_lowv8hi"
++  [(set (match_operand:V4HI 0 "s_register_operand" "=w")
++	(vec_select:V4HI (match_operand:V8HI 1 "s_register_operand" "w")
++	                 (parallel [(const_int 0) (const_int 1)
++			            (const_int 2) (const_int 3)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src)
++    return "vmov\t%P0, %e1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_lowv4si"
++  [(set (match_operand:V2SI 0 "s_register_operand" "=w")
++	(vec_select:V2SI (match_operand:V4SI 1 "s_register_operand" "w")
++	                 (parallel [(const_int 0) (const_int 1)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src)
++    return "vmov\t%P0, %e1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_lowv4sf"
++  [(set (match_operand:V2SF 0 "s_register_operand" "=w")
++	(vec_select:V2SF (match_operand:V4SF 1 "s_register_operand" "w")
++	                 (parallel [(const_int 0) (const_int 1)])))]
++  "TARGET_NEON"
++{
++  int dest = REGNO (operands[0]);
++  int src = REGNO (operands[1]);
++
++  if (dest != src)
++    return "vmov\t%P0, %e1";
++  else
++    return "";
++}
++  [(set_attr "neon_type" "neon_bp_simple")]
++)
++
++(define_insn "neon_vget_lowv2di"
++  [(set (match_operand:DI 0 "s_register_operand" "=w")
++	(vec_select:DI (match_operand:V2DI 1 "s_register_operand" "w")
++	               (parallel [(const_int 0)])))]
+   "TARGET_NEON"
+ {
+   int dest = REGNO (operands[0]);
+
+=== modified file 'gcc/config/arm/neon.ml'
+--- old/gcc/config/arm/neon.ml	2010-01-19 14:21:14 +0000
++++ new/gcc/config/arm/neon.ml	2010-07-29 15:59:12 +0000
+@@ -709,7 +709,8 @@
+ let ops =
+   [
+     (* Addition.  *)
+-    Vadd, [], All (3, Dreg), "vadd", sign_invar_2, F32 :: su_8_64;
++    Vadd, [], All (3, Dreg), "vadd", sign_invar_2, F32 :: su_8_32;
++    Vadd, [No_op], All (3, Dreg), "vadd", sign_invar_2, [S64; U64];
+     Vadd, [], All (3, Qreg), "vaddQ", sign_invar_2, F32 :: su_8_64;
+     Vadd, [], Long, "vaddl", elts_same_2, su_8_32;
+     Vadd, [], Wide, "vaddw", elts_same_2, su_8_32;
+@@ -758,7 +759,8 @@
+     Vmls, [Saturating; Doubling], Long, "vqdmlsl", elts_same_io, [S16; S32];
+ 
+     (* Subtraction.  *)
+-    Vsub, [], All (3, Dreg), "vsub", sign_invar_2, F32 :: su_8_64;
++    Vsub, [], All (3, Dreg), "vsub", sign_invar_2, F32 :: su_8_32;
++    Vsub, [No_op], All (3, Dreg), "vsub", sign_invar_2,  [S64; U64];
+     Vsub, [], All (3, Qreg), "vsubQ", sign_invar_2, F32 :: su_8_64;
+     Vsub, [], Long, "vsubl", elts_same_2, su_8_32;
+     Vsub, [], Wide, "vsubw", elts_same_2, su_8_32;
+@@ -967,7 +969,8 @@
+       Use_operands [| Corereg; Dreg; Immed |],
+       "vget_lane", get_lane, pf_su_8_32;
+     Vget_lane,
+-      [InfoWord;
++      [No_op;
++       InfoWord;
+        Disassembles_as [Use_operands [| Corereg; Corereg; Dreg |]];
+        Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
+       Use_operands [| Corereg; Dreg; Immed |],
+@@ -989,7 +992,8 @@
+                 Instruction_name ["vmov"]],
+       Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
+       set_lane, pf_su_8_32;
+-    Vset_lane, [Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
++    Vset_lane, [No_op;
++                Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]];
+                 Instruction_name ["vmov"]; Const_valuator (fun _ -> 0)],
+       Use_operands [| Dreg; Corereg; Dreg; Immed |], "vset_lane",
+       set_lane_notype, [S64; U64];
+@@ -1017,7 +1021,8 @@
+       Use_operands [| Dreg; Corereg |], "vdup_n", bits_1,
+       pf_su_8_32;
+     Vdup_n,
+-      [Instruction_name ["vmov"];
++      [No_op;
++       Instruction_name ["vmov"];
+        Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
+       Use_operands [| Dreg; Corereg |], "vdup_n", notype_1,
+       [S64; U64];
+@@ -1028,7 +1033,8 @@
+       Use_operands [| Qreg; Corereg |], "vdupQ_n", bits_1,
+       pf_su_8_32;
+     Vdup_n,
+-      [Instruction_name ["vmov"];
++      [No_op;
++       Instruction_name ["vmov"];
+        Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
+                         Use_operands [| Dreg; Corereg; Corereg |]]],
+       Use_operands [| Qreg; Corereg |], "vdupQ_n", notype_1,
+@@ -1043,7 +1049,8 @@
+       Use_operands [| Dreg; Corereg |],
+       "vmov_n", bits_1, pf_su_8_32;
+     Vmov_n,
+-      [Builtin_name "vdup_n";
++      [No_op;
++       Builtin_name "vdup_n";
+        Instruction_name ["vmov"];
+        Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |]]],
+       Use_operands [| Dreg; Corereg |],
+@@ -1056,7 +1063,8 @@
+       Use_operands [| Qreg; Corereg |],
+       "vmovQ_n", bits_1, pf_su_8_32;
+     Vmov_n,
+-      [Builtin_name "vdupQ_n";
++      [No_op;
++       Builtin_name "vdupQ_n";
+        Instruction_name ["vmov"];
+        Disassembles_as [Use_operands [| Dreg; Corereg; Corereg |];
+                         Use_operands [| Dreg; Corereg; Corereg |]]],
+@@ -1613,23 +1621,28 @@
+       store_3, [P16; F32; U16; U32; S16; S32];
+ 
+     (* Logical operations. And.  *)
+-    Vand, [], All (3, Dreg), "vand", notype_2, su_8_64;
++    Vand, [], All (3, Dreg), "vand", notype_2, su_8_32;
++    Vand, [No_op], All (3, Dreg), "vand", notype_2, [S64; U64];
+     Vand, [], All (3, Qreg), "vandQ", notype_2, su_8_64;
+ 
+     (* Or.  *)
+-    Vorr, [], All (3, Dreg), "vorr", notype_2, su_8_64;
++    Vorr, [], All (3, Dreg), "vorr", notype_2, su_8_32;
++    Vorr, [No_op], All (3, Dreg), "vorr", notype_2, [S64; U64];
+     Vorr, [], All (3, Qreg), "vorrQ", notype_2, su_8_64;
+ 
+     (* Eor.  *)
+-    Veor, [], All (3, Dreg), "veor", notype_2, su_8_64;
++    Veor, [], All (3, Dreg), "veor", notype_2, su_8_32;
++    Veor, [No_op], All (3, Dreg), "veor", notype_2, [S64; U64];
+     Veor, [], All (3, Qreg), "veorQ", notype_2, su_8_64;
+ 
+     (* Bic (And-not).  *)
+-    Vbic, [], All (3, Dreg), "vbic", notype_2, su_8_64;
++    Vbic, [], All (3, Dreg), "vbic", notype_2, su_8_32;
++    Vbic, [No_op], All (3, Dreg), "vbic", notype_2, [S64; U64];
+     Vbic, [], All (3, Qreg), "vbicQ", notype_2, su_8_64;
+ 
+     (* Or-not.  *)
+-    Vorn, [], All (3, Dreg), "vorn", notype_2, su_8_64;
++    Vorn, [], All (3, Dreg), "vorn", notype_2, su_8_32;
++    Vorn, [No_op], All (3, Dreg), "vorn", notype_2, [S64; U64];
+     Vorn, [], All (3, Qreg), "vornQ", notype_2, su_8_64;
+   ]
+ 
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2009-07-15 09:12:22 +0000
++++ new/gcc/config/arm/predicates.md	2010-07-29 15:59:12 +0000
+@@ -499,13 +499,15 @@
+ (define_predicate "imm_for_neon_logic_operand"
+   (match_code "const_vector")
+ {
+-  return neon_immediate_valid_for_logic (op, mode, 0, NULL, NULL);
++  return (TARGET_NEON
++          && neon_immediate_valid_for_logic (op, mode, 0, NULL, NULL));
+ })
+ 
+ (define_predicate "imm_for_neon_inv_logic_operand"
+   (match_code "const_vector")
+ {
+-  return neon_immediate_valid_for_logic (op, mode, 1, NULL, NULL);
++  return (TARGET_NEON
++          && neon_immediate_valid_for_logic (op, mode, 1, NULL, NULL));
+ })
+ 
+ (define_predicate "neon_logic_op2"
+
+=== modified file 'gcc/doc/arm-neon-intrinsics.texi'
+--- old/gcc/doc/arm-neon-intrinsics.texi	2009-11-18 17:06:46 +0000
++++ new/gcc/doc/arm-neon-intrinsics.texi	2010-07-29 15:59:12 +0000
+@@ -43,20 +43,18 @@
+ 
+ 
+ @itemize @bullet
++@item float32x2_t vadd_f32 (float32x2_t, float32x2_t)
++@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{d0}, @var{d0}, @var{d0}}
++@end itemize
++
++
++@itemize @bullet
+ @item uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vadd_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vadd.i64 @var{d0}, @var{d0}, @var{d0}}
+-@end itemize
+-
+-
+-@itemize @bullet
+-@item float32x2_t vadd_f32 (float32x2_t, float32x2_t)
+-@*@emph{Form of expected instruction(s):} @code{vadd.f32 @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -1013,20 +1011,18 @@
+ 
+ 
+ @itemize @bullet
++@item float32x2_t vsub_f32 (float32x2_t, float32x2_t)
++@*@emph{Form of expected instruction(s):} @code{vsub.f32 @var{d0}, @var{d0}, @var{d0}}
++@end itemize
++
++
++@itemize @bullet
+ @item uint64x1_t vsub_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vsub.i64 @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vsub_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vsub.i64 @var{d0}, @var{d0}, @var{d0}}
+-@end itemize
+-
+-
+-@itemize @bullet
+-@item float32x2_t vsub_f32 (float32x2_t, float32x2_t)
+-@*@emph{Form of expected instruction(s):} @code{vsub.f32 @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -4750,13 +4746,11 @@
+ 
+ @itemize @bullet
+ @item uint64_t vget_lane_u64 (uint64x1_t, const int)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{r0}, @var{r0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64_t vget_lane_s64 (int64x1_t, const int)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{r0}, @var{r0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -4886,13 +4880,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vset_lane_u64 (uint64_t, uint64x1_t, const int)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vset_lane_s64 (int64_t, int64x1_t, const int)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+@@ -5081,13 +5073,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vdup_n_u64 (uint64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vdup_n_s64 (int64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+@@ -5147,13 +5137,11 @@
+ 
+ @itemize @bullet
+ @item uint64x2_t vdupq_n_u64 (uint64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x2_t vdupq_n_s64 (int64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+@@ -5213,13 +5201,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vmov_n_u64 (uint64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vmov_n_s64 (int64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+@@ -5279,13 +5265,11 @@
+ 
+ @itemize @bullet
+ @item uint64x2_t vmovq_n_u64 (uint64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x2_t vmovq_n_s64 (int64_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{r0}, @var{r0}}
+ @end itemize
+ 
+ 
+@@ -5572,18 +5556,6 @@
+ 
+ 
+ @itemize @bullet
+-@item uint64x1_t vget_low_u64 (uint64x2_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+-@end itemize
+-
+-
+-@itemize @bullet
+-@item int64x1_t vget_low_s64 (int64x2_t)
+-@*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+-@end itemize
+-
+-
+-@itemize @bullet
+ @item float32x2_t vget_low_f32 (float32x4_t)
+ @*@emph{Form of expected instruction(s):} @code{vmov @var{d0}, @var{d0}}
+ @end itemize
+@@ -5601,6 +5573,16 @@
+ @end itemize
+ 
+ 
++@itemize @bullet
++@item uint64x1_t vget_low_u64 (uint64x2_t)
++@end itemize
++
++
++@itemize @bullet
++@item int64x1_t vget_low_s64 (int64x2_t)
++@end itemize
++
++
+ 
+ 
+ @subsubsection Conversions
+@@ -9727,13 +9709,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vand_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vand_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vand @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -9827,13 +9807,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vorr_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vorr_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vorr @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -9927,13 +9905,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t veor_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t veor_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{veor @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -10027,13 +10003,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vbic_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vbic_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vbic @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+@@ -10127,13 +10101,11 @@
+ 
+ @itemize @bullet
+ @item uint64x1_t vorn_u64 (uint64x1_t, uint64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+ @itemize @bullet
+ @item int64x1_t vorn_s64 (int64x1_t, int64x1_t)
+-@*@emph{Form of expected instruction(s):} @code{vorn @var{d0}, @var{d0}, @var{d0}}
+ @end itemize
+ 
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vadds64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vadds64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vadds64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vadd_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)0x00000000deadbeefLL;
++
++  out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdeadbeefdeadbeefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vaddu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vaddu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vaddu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vadd_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)0x00000000deadbeefLL;
++
++  out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdeadbeefdeadbeefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vands64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vands64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vands64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vand_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL;
++
++  out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdead000000000000LL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vandu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vandu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vandu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vand_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL;
++
++  out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdead000000000000LL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vbics64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vbics64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vbics64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vbic_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)(~0xdead00000000beefLL);
++
++  out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdead000000000000LL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vbicu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vbicu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vbicu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vbic_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)(~0xdead00000000beefLL);
++
++  out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdead000000000000LL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdupQ_lanes64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,22 @@
++/* Test the `vdupq_lanes64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x2_t out_int64x2_t = {0, 0};
++  int64_t arg0_int64_t = (int64_t) 0xdeadbeef;
++
++  out_int64x2_t = vdupq_lane_s64 ((int64x1_t)arg0_int64_t, 0);
++  if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t)
++    abort();
++  if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdupQ_laneu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,22 @@
++/* Test the `vdupq_laneu64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x2_t out_uint64x2_t = {0, 0};
++  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
++
++  out_uint64x2_t = vdupq_lane_u64 ((uint64x1_t)arg0_uint64_t, 0);
++  if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t)
++    abort();
++  if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdupQ_ns64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,22 @@
++/* Test the `vdupq_ns64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x2_t out_int64x2_t = {0, 0};
++  int64_t arg0_int64_t = (int64_t) 0xdeadbeef;
++
++  out_int64x2_t = vdupq_n_s64 (arg0_int64_t);
++  if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t)
++    abort();
++  if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdupQ_nu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,22 @@
++/* Test the `vdupq_nu64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x2_t out_uint64x2_t = {0, 0};
++  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
++
++  out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t);
++  if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t)
++    abort();
++  if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup_ns64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vdup_ns64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64_t arg0_int64_t = (int64_t) 0xdeadbeef;
++
++  out_int64x1_t = vdup_n_s64 (arg0_int64_t);
++  if ((int64_t)out_int64x1_t != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup_nu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vdup_nu64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
++
++  out_uint64x1_t = vdup_n_u64 (arg0_uint64_t);
++  if ((uint64_t)out_uint64x1_t != arg0_uint64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-veors64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-veors64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-veors64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `veor_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL;
++
++  out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0x0000beef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-veoru64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-veoru64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-veoru64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `veor_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL;
++
++  out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0x0000beef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vget_lanes64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vget_lane_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64_t out_int64_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t) 0xdeadbeefbadf00dLL;
++
++  out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0);
++  if (out_int64_t != (int64_t)arg0_int64x1_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vget_laneu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vget_lane_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64_t out_uint64_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t) 0xdeadbeefbadf00dLL;
++
++  out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0);
++  if (out_uint64_t != (uint64_t)arg0_uint64x1_t)
++    abort();
++  return 0;
++}
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon-vmla-1.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmla-1.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmla-1.c	2010-07-29 15:59:12 +0000
+@@ -1,5 +1,5 @@
+ /* { dg-require-effective-target arm_neon_hw } */
+-/* { dg-options "-O2 -ftree-vectorize" } */
++/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */
+ /* { dg-add-options arm_neon } */
+ /* { dg-final { scan-assembler "vmla\\.f32" } } */
+ 
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon-vmls-1.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmls-1.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmls-1.c	2010-07-29 15:59:12 +0000
+@@ -1,5 +1,5 @@
+ /* { dg-require-effective-target arm_neon_hw } */
+-/* { dg-options "-O2 -ftree-vectorize" } */
++/* { dg-options "-O2 -ftree-vectorize -ffast-math" } */
+ /* { dg-add-options arm_neon } */
+ /* { dg-final { scan-assembler "vmls\\.f32" } } */
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmovQ_ns64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,22 @@
++/* Test the `vmovq_ns64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x2_t out_int64x2_t = {0, 0};
++  int64_t arg0_int64_t = (int64_t) 0xdeadbeef;
++
++  out_int64x2_t = vmovq_n_s64 (arg0_int64_t);
++  if (vgetq_lane_s64 (out_int64x2_t, 0) != arg0_int64_t)
++    abort();
++  if (vgetq_lane_s64 (out_int64x2_t, 1) != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmovQ_nu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,23 @@
++/* Test the `vmovq_nu64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x2_t out_uint64x2_t = {0, 0};
++  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
++
++  out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t);
++  if (vgetq_lane_u64 (out_uint64x2_t, 0) != arg0_uint64_t)
++    abort();
++  if (vgetq_lane_u64 (out_uint64x2_t, 1) != arg0_uint64_t)
++    abort();
++  return 0;
++}
++
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmov_ns64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vmov_ns64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64_t arg0_int64_t = (int64_t) 0xdeadbeef;
++
++  out_int64x1_t = vmov_n_s64 (arg0_int64_t);
++  if ((int64_t)out_int64x1_t != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vmov_nu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,20 @@
++/* Test the `vmov_nu64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64_t arg0_uint64_t = (uint64_t) 0xdeadbeef;
++
++  out_uint64x1_t = vmov_n_u64 (arg0_uint64_t);
++  if ((uint64_t)out_uint64x1_t != arg0_uint64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vorns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vorns64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vorns64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vorn_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)(~0xdead00000000beefLL);
++
++  out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdeadbeef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vornu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vornu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vornu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vorn_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)(~0xdead00000000beefLL);
++
++  out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdeadbeef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vorrs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vorrs64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vorrs64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vorr_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeef00000000LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)0xdead00000000beefLL;
++
++  out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdeadbeef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vorru64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vorru64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vorru64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vorr_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeef00000000LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)0xdead00000000beefLL;
++
++  out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdeadbeef0000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vset_lanes64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vset_lane_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64_t arg0_int64_t = 0xf00f00f00LL;
++  int64x1_t arg1_int64x1_t = (int64x1_t) 0xdeadbeefbadf00dLL;
++
++  out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
++  if ((int64_t)out_int64x1_t != arg0_int64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vset_laneu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vset_lane_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64_t arg0_uint64_t = 0xf00f00f00LL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t) 0xdeadbeefbadf00dLL;
++
++  out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
++  if ((uint64_t)out_uint64x1_t != arg0_uint64_t)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vsubs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vsubs64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vsubs64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vsub_s64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  int64x1_t out_int64x1_t = 0;
++  int64x1_t arg0_int64x1_t = (int64x1_t)0xdeadbeefdeadbeefLL;
++  int64x1_t arg1_int64x1_t = (int64x1_t)0x0000beefdead0000LL;
++
++  out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
++  if (out_int64x1_t != (int64x1_t)0xdead00000000beefLL)
++    abort();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vsubu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vsubu64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vsubu64.c	2010-07-29 15:59:12 +0000
+@@ -0,0 +1,21 @@
++/* Test the `vsub_u64' ARM Neon intrinsic.  */
++
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O0" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++#include <stdlib.h>
++
++int main (void)
++{
++  uint64x1_t out_uint64x1_t = 0;
++  uint64x1_t arg0_uint64x1_t = (uint64x1_t)0xdeadbeefdeadbeefLL;
++  uint64x1_t arg1_uint64x1_t = (uint64x1_t)0x0000beefdead0000LL;
++
++  out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
++  if (out_uint64x1_t != (uint64x1_t)0xdead00000000beefLL)
++    abort();
++  return 0;
++}
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vadds64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vadds64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vadds64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vands64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vands64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vands64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vand_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vand_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbics64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbics64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbics64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vbic_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vbic_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns64.c	2010-07-29 15:59:12 +0000
+@@ -16,6 +16,4 @@
+   out_int64x2_t = vdupq_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu64.c	2010-07-29 15:59:12 +0000
+@@ -16,6 +16,4 @@
+   out_uint64x2_t = vdupq_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_ns64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_int64x1_t = vdup_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_nu64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_uint64x1_t = vdup_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veors64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veors64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veors64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = veor_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veoru64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veoru64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veoru64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = veor_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanes64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_int64_t = vget_lane_s64 (arg0_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_laneu64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_uint64_t = vget_lane_u64 (arg0_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns64.c	2010-07-29 15:59:12 +0000
+@@ -16,6 +16,4 @@
+   out_int64x2_t = vmovq_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu64.c	2010-07-29 15:59:12 +0000
+@@ -16,6 +16,4 @@
+   out_uint64x2_t = vmovq_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_ns64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_int64x1_t = vmov_n_s64 (arg0_int64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_nu64.c	2010-07-29 15:59:12 +0000
+@@ -16,5 +16,4 @@
+   out_uint64x1_t = vmov_n_u64 (arg0_uint64_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorns64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vorn_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vorn_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrs64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vorr_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorru64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorru64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorru64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vorr_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanes64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vset_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_laneu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vset_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubs64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_int64x1_t = vsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubu64.c	2010-07-29 15:59:12 +0000
+@@ -17,5 +17,4 @@
+   out_uint64x1_t = vsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99301.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99301.patch
new file mode 100644
index 0000000000..95907eeb87
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99301.patch
@@ -0,0 +1,675 @@
+	2010-07-02  Daniel Jacobowitz  <dan@codesourcery.com>
+		    Julian Brown  <julian@codesourcery.com>
+		    Sandra Loosemore <sandra@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (arm_canonicalize_comparison): Canonicalize DImode
+	comparisons.  Adjust to take both operands.
+	(arm_select_cc_mode): Handle DImode comparisons.
+	(arm_gen_compare_reg): Generate a scratch register for DImode
+	comparisons which require one.  Use xor for Thumb equality checks.
+	(arm_const_double_by_immediates): New.
+	(arm_print_operand): Allow 'Q' and 'R' for constants.
+	(get_arm_condition_code): Handle new CC_CZmode and CC_NCVmode.
+	* config/arm/arm.h (CANONICALIZE_COMPARISON): Always use
+	arm_canonicalize_comparison.
+	* config/arm/arm-modes.def: Add CC_CZmode and CC_NCVmode.
+	* config/arm/arm-protos.h (arm_canonicalize_comparison): Update
+	prototype.
+	(arm_const_double_by_immediates): Declare.
+	* config/arm/constraints.md (Di): New constraint.
+	* config/arm/predicates.md (arm_immediate_di_operand)
+	(arm_di_operand, cmpdi_operand): New.
+	* config/arm/arm.md (cbranchdi4): Handle non-Cirrus also.
+	(*arm_cmpdi_insn, *arm_cmpdi_unsigned)
+	(*arm_cmpdi_zero, *thumb_cmpdi_zero): New insns.
+	(cstoredi4): Handle non-Cirrus also.
+
+	gcc/testsuite/
+	* gcc.c-torture/execute/20100416-1.c: New test case.
+
+2010-07-08  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from upstream (originally from Sourcery G++ 4.4):
+
+ 	2010-07-02  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm-modes.def'
+--- old/gcc/config/arm/arm-modes.def	2009-06-18 11:24:10 +0000
++++ new/gcc/config/arm/arm-modes.def	2010-07-29 16:58:56 +0000
+@@ -35,10 +35,16 @@
+    CC_NOOVmode should be used with SImode integer equalities.
+    CC_Zmode should be used if only the Z flag is set correctly
+    CC_Nmode should be used if only the N (sign) flag is set correctly
++   CC_CZmode should be used if only the C and Z flags are correct
++   (used for DImode unsigned comparisons).
++   CC_NCVmode should be used if only the N, C, and V flags are correct
++   (used for DImode signed comparisons).
+    CCmode should be used otherwise.  */
+ 
+ CC_MODE (CC_NOOV);
+ CC_MODE (CC_Z);
++CC_MODE (CC_CZ);
++CC_MODE (CC_NCV);
+ CC_MODE (CC_SWP);
+ CC_MODE (CCFP);
+ CC_MODE (CCFPE);
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+--- old/gcc/config/arm/arm-protos.h	2009-11-11 14:23:03 +0000
++++ new/gcc/config/arm/arm-protos.h	2010-07-29 16:58:56 +0000
+@@ -49,8 +49,7 @@
+ extern int const_ok_for_arm (HOST_WIDE_INT);
+ extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx,
+ 			       HOST_WIDE_INT, rtx, rtx, int);
+-extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, enum machine_mode,
+-					     rtx *);
++extern RTX_CODE arm_canonicalize_comparison (RTX_CODE, rtx *, rtx *);
+ extern int legitimate_pic_operand_p (rtx);
+ extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx);
+ extern rtx legitimize_tls_address (rtx, rtx);
+@@ -116,6 +115,7 @@
+ extern void arm_reload_out_hi (rtx *);
+ extern int arm_const_double_inline_cost (rtx);
+ extern bool arm_const_double_by_parts (rtx);
++extern bool arm_const_double_by_immediates (rtx);
+ extern const char *fp_immediate_constant (rtx);
+ extern void arm_emit_call_insn (rtx, rtx);
+ extern const char *output_call (rtx *);
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-07-29 15:59:12 +0000
++++ new/gcc/config/arm/arm.c	2010-07-29 16:58:56 +0000
+@@ -3190,13 +3190,82 @@
+    immediate value easier to load.  */
+ 
+ enum rtx_code
+-arm_canonicalize_comparison (enum rtx_code code, enum machine_mode mode,
+-			     rtx * op1)
++arm_canonicalize_comparison (enum rtx_code code, rtx *op0, rtx *op1)
+ {
+-  unsigned HOST_WIDE_INT i = INTVAL (*op1);
+-  unsigned HOST_WIDE_INT maxval;
++  enum machine_mode mode;
++  unsigned HOST_WIDE_INT i, maxval;
++
++  mode = GET_MODE (*op0);
++  if (mode == VOIDmode)
++    mode = GET_MODE (*op1);
++
+   maxval = (((unsigned HOST_WIDE_INT) 1) << (GET_MODE_BITSIZE(mode) - 1)) - 1;
+ 
++  /* For DImode, we have GE/LT/GEU/LTU comparisons.  In ARM mode
++     we can also use cmp/cmpeq for GTU/LEU.  GT/LE must be either
++     reversed or (for constant OP1) adjusted to GE/LT.  Similarly
++     for GTU/LEU in Thumb mode.  */
++  if (mode == DImode)
++    {
++      rtx tem;
++
++      /* To keep things simple, always use the Cirrus cfcmp64 if it is
++	 available.  */
++      if (TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK)
++	return code;
++
++      if (code == GT || code == LE
++	  || (!TARGET_ARM && (code == GTU || code == LEU)))
++	{
++	  /* Missing comparison.  First try to use an available
++	     comparison.  */
++	  if (GET_CODE (*op1) == CONST_INT)
++	    {
++	      i = INTVAL (*op1);
++	      switch (code)
++		{
++		case GT:
++		case LE:
++		  if (i != maxval
++		      && arm_const_double_by_immediates (GEN_INT (i + 1)))
++		    {
++		      *op1 = GEN_INT (i + 1);
++		      return code == GT ? GE : LT;
++		    }
++		  break;
++		case GTU:
++		case LEU:
++		  if (i != ~((unsigned HOST_WIDE_INT) 0)
++		      && arm_const_double_by_immediates (GEN_INT (i + 1)))
++		    {
++		      *op1 = GEN_INT (i + 1);
++		      return code == GTU ? GEU : LTU;
++		    }
++		  break;
++		default:
++		  gcc_unreachable ();
++		}
++	    }
++
++	  /* If that did not work, reverse the condition.  */
++	  tem = *op0;
++	  *op0 = *op1;
++	  *op1 = tem;
++	  return swap_condition (code);
++	}
++
++      return code;
++    }
++
++  /* Comparisons smaller than DImode.  Only adjust comparisons against
++     an out-of-range constant.  */
++  if (GET_CODE (*op1) != CONST_INT
++      || const_ok_for_arm (INTVAL (*op1))
++      || const_ok_for_arm (- INTVAL (*op1)))
++    return code;
++
++  i = INTVAL (*op1);
++
+   switch (code)
+     {
+     case EQ:
+@@ -9912,6 +9981,55 @@
+       && (rtx_equal_p (XEXP (x, 0), y) || rtx_equal_p (XEXP (x, 1), y)))
+     return CC_Cmode;
+ 
++  if (GET_MODE (x) == DImode || GET_MODE (y) == DImode)
++    {
++      /* To keep things simple, always use the Cirrus cfcmp64 if it is
++	 available.  */
++      if (TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK)
++	return CCmode;
++
++      switch (op)
++	{
++	case EQ:
++	case NE:
++	  /* A DImode comparison against zero can be implemented by
++	     or'ing the two halves together.  */
++	  if (y == const0_rtx)
++	    return CC_Zmode;
++
++	  /* We can do an equality test in three Thumb instructions.  */
++	  if (!TARGET_ARM)
++	    return CC_Zmode;
++
++	  /* FALLTHROUGH */
++
++	case LTU:
++	case LEU:
++	case GTU:
++	case GEU:
++	  /* DImode unsigned comparisons can be implemented by cmp +
++	     cmpeq without a scratch register.  Not worth doing in
++	     Thumb-2.  */
++	  if (TARGET_ARM)
++	    return CC_CZmode;
++
++	  /* FALLTHROUGH */
++
++	case LT:
++	case LE:
++	case GT:
++	case GE:
++	  /* DImode signed and unsigned comparisons can be implemented
++	     by cmp + sbcs with a scratch register, but that does not
++	     set the Z flag - we must reverse GT/LE/GTU/LEU.  */
++	  gcc_assert (op != EQ && op != NE);
++	  return CC_NCVmode;
++
++	default:
++	  gcc_unreachable ();
++	}
++    }
++
+   return CCmode;
+ }
+ 
+@@ -9921,10 +10039,39 @@
+ rtx
+ arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y)
+ {
+-  enum machine_mode mode = SELECT_CC_MODE (code, x, y);
+-  rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM);
+-
+-  emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y));
++  enum machine_mode mode;
++  rtx cc_reg;
++  int dimode_comparison = GET_MODE (x) == DImode || GET_MODE (y) == DImode;
++
++  /* We might have X as a constant, Y as a register because of the predicates
++     used for cmpdi.  If so, force X to a register here.  */
++  if (dimode_comparison && !REG_P (x))
++    x = force_reg (DImode, x);
++
++  mode = SELECT_CC_MODE (code, x, y);
++  cc_reg = gen_rtx_REG (mode, CC_REGNUM);
++
++  if (dimode_comparison
++      && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)
++      && mode != CC_CZmode)
++    {
++      rtx clobber, set;
++
++      /* To compare two non-zero values for equality, XOR them and
++	 then compare against zero.  Not used for ARM mode; there
++	 CC_CZmode is cheaper.  */
++      if (mode == CC_Zmode && y != const0_rtx)
++	{
++	  x = expand_binop (DImode, xor_optab, x, y, NULL_RTX, 0, OPTAB_WIDEN);
++	  y = const0_rtx;
++	}
++      /* A scratch register is required.  */
++      clobber = gen_rtx_CLOBBER (VOIDmode, gen_rtx_SCRATCH (SImode));
++      set = gen_rtx_SET (VOIDmode, cc_reg, gen_rtx_COMPARE (mode, x, y));
++      emit_insn (gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, set, clobber)));
++    }
++  else
++    emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y));
+ 
+   return cc_reg;
+ }
+@@ -11253,6 +11400,34 @@
+   return false;
+ }
+ 
++/* Return true if it is possible to inline both the high and low parts
++   of a 64-bit constant into 32-bit data processing instructions.  */
++bool
++arm_const_double_by_immediates (rtx val)
++{
++  enum machine_mode mode = GET_MODE (val);
++  rtx part;
++
++  if (mode == VOIDmode)
++    mode = DImode;
++
++  part = gen_highpart_mode (SImode, mode, val);
++
++  gcc_assert (GET_CODE (part) == CONST_INT);
++
++  if (!const_ok_for_arm (INTVAL (part)))
++    return false;
++
++  part = gen_lowpart (SImode, val);
++
++  gcc_assert (GET_CODE (part) == CONST_INT);
++
++  if (!const_ok_for_arm (INTVAL (part)))
++    return false;
++
++  return true;
++}
++
+ /* Scan INSN and note any of its operands that need fixing.
+    If DO_PUSHES is false we do not actually push any of the fixups
+    needed.  The function returns TRUE if any fixups were needed/pushed.
+@@ -15097,8 +15272,18 @@
+ 	 the value being loaded is big-wordian or little-wordian.  The
+ 	 order of the two register loads can matter however, if the address
+ 	 of the memory location is actually held in one of the registers
+-	 being overwritten by the load.  */
++	 being overwritten by the load.
++
++	 The 'Q' and 'R' constraints are also available for 64-bit
++	 constants.  */
+     case 'Q':
++      if (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
++	{
++	  rtx part = gen_lowpart (SImode, x);
++	  fprintf (stream, "#" HOST_WIDE_INT_PRINT_DEC, INTVAL (part));
++	  return;
++	}
++
+       if (GET_CODE (x) != REG || REGNO (x) > LAST_ARM_REGNUM)
+ 	{
+ 	  output_operand_lossage ("invalid operand for code '%c'", code);
+@@ -15109,6 +15294,18 @@
+       return;
+ 
+     case 'R':
++      if (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
++	{
++	  enum machine_mode mode = GET_MODE (x);
++	  rtx part;
++
++	  if (mode == VOIDmode)
++	    mode = DImode;
++	  part = gen_highpart_mode (SImode, mode, x);
++	  fprintf (stream, "#" HOST_WIDE_INT_PRINT_DEC, INTVAL (part));
++	  return;
++	}
++
+       if (GET_CODE (x) != REG || REGNO (x) > LAST_ARM_REGNUM)
+ 	{
+ 	  output_operand_lossage ("invalid operand for code '%c'", code);
+@@ -15801,6 +15998,28 @@
+       default: gcc_unreachable ();
+       }
+ 
++    case CC_CZmode:
++      switch (comp_code)
++	{
++	case NE: return ARM_NE;
++	case EQ: return ARM_EQ;
++	case GEU: return ARM_CS;
++	case GTU: return ARM_HI;
++	case LEU: return ARM_LS;
++	case LTU: return ARM_CC;
++	default: gcc_unreachable ();
++	}
++
++    case CC_NCVmode:
++      switch (comp_code)
++	{
++	case GE: return ARM_GE;
++	case LT: return ARM_LT;
++	case GEU: return ARM_CS;
++	case LTU: return ARM_CC;
++	default: gcc_unreachable ();
++	}
++
+     case CCmode:
+       switch (comp_code)
+ 	{
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2009-12-23 16:36:40 +0000
++++ new/gcc/config/arm/arm.h	2010-07-29 16:58:56 +0000
+@@ -2253,19 +2253,7 @@
+    : reverse_condition (code))
+ 
+ #define CANONICALIZE_COMPARISON(CODE, OP0, OP1)				\
+-  do									\
+-    {									\
+-      if (GET_CODE (OP1) == CONST_INT					\
+-          && ! (const_ok_for_arm (INTVAL (OP1))				\
+-	        || (const_ok_for_arm (- INTVAL (OP1)))))		\
+-        {								\
+-          rtx const_op = OP1;						\
+-          CODE = arm_canonicalize_comparison ((CODE), GET_MODE (OP0),	\
+-					      &const_op);		\
+-          OP1 = const_op;						\
+-        }								\
+-    }									\
+-  while (0)
++  (CODE) = arm_canonicalize_comparison (CODE, &(OP0), &(OP1))
+ 
+ /* The arm5 clz instruction returns 32.  */
+ #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE)  ((VALUE) = 32, 1)
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-07-29 15:59:12 +0000
++++ new/gcc/config/arm/arm.md	2010-07-29 16:58:56 +0000
+@@ -6718,17 +6718,45 @@
+ 				   operands[3])); DONE;"
+ )
+ 
+-;; this uses the Cirrus DI compare instruction
+ (define_expand "cbranchdi4"
+   [(set (pc) (if_then_else
+ 	      (match_operator 0 "arm_comparison_operator"
+-	       [(match_operand:DI 1 "cirrus_fp_register" "")
+-	        (match_operand:DI 2 "cirrus_fp_register" "")])
++	       [(match_operand:DI 1 "cmpdi_operand" "")
++	        (match_operand:DI 2 "cmpdi_operand" "")])
+ 	      (label_ref (match_operand 3 "" ""))
+ 	      (pc)))]
+-  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
+-  "emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
+-				   operands[3])); DONE;"
++  "TARGET_32BIT"
++  "{
++     rtx swap = NULL_RTX;
++     enum rtx_code code = GET_CODE (operands[0]);
++
++     /* We should not have two constants.  */
++     gcc_assert (GET_MODE (operands[1]) == DImode
++		 || GET_MODE (operands[2]) == DImode);
++
++    /* Flip unimplemented DImode comparisons to a form that
++       arm_gen_compare_reg can handle.  */
++     switch (code)
++     {
++     case GT:
++       swap = gen_rtx_LT (VOIDmode, operands[2], operands[1]); break;
++     case LE:
++       swap = gen_rtx_GE (VOIDmode, operands[2], operands[1]); break;
++     case GTU:
++       swap = gen_rtx_LTU (VOIDmode, operands[2], operands[1]); break;
++     case LEU:
++       swap = gen_rtx_GEU (VOIDmode, operands[2], operands[1]); break;
++     default:
++       break;
++     }
++     if (swap)
++       emit_jump_insn (gen_cbranch_cc (swap, operands[2], operands[1],
++                                       operands[3]));
++     else
++       emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
++				       operands[3]));
++     DONE;
++   }"
+ )
+ 
+ (define_insn "*cbranchsi4_insn"
+@@ -7880,6 +7908,52 @@
+ 				    (const_string "alu_shift_reg")))]
+ )
+ 
++;; DImode comparisons.  The generic code generates branches that
++;; if-conversion can not reduce to a conditional compare, so we do
++;; that directly.
++
++(define_insn "*arm_cmpdi_insn"
++  [(set (reg:CC_NCV CC_REGNUM)
++	(compare:CC_NCV (match_operand:DI 0 "s_register_operand" "r")
++			(match_operand:DI 1 "arm_di_operand"	   "rDi")))
++   (clobber (match_scratch:SI 2 "=r"))]
++  "TARGET_32BIT && !(TARGET_HARD_FLOAT && TARGET_MAVERICK)"
++  "cmp\\t%Q0, %Q1\;sbcs\\t%2, %R0, %R1"
++  [(set_attr "conds" "set")
++   (set_attr "length" "8")]
++)
++
++(define_insn "*arm_cmpdi_unsigned"
++  [(set (reg:CC_CZ CC_REGNUM)
++	(compare:CC_CZ (match_operand:DI 0 "s_register_operand" "r")
++		       (match_operand:DI 1 "arm_di_operand"	"rDi")))]
++  "TARGET_ARM"
++  "cmp%?\\t%R0, %R1\;cmpeq\\t%Q0, %Q1"
++  [(set_attr "conds" "set")
++   (set_attr "length" "8")]
++)
++
++(define_insn "*arm_cmpdi_zero"
++  [(set (reg:CC_Z CC_REGNUM)
++	(compare:CC_Z (match_operand:DI 0 "s_register_operand" "r")
++		      (const_int 0)))
++   (clobber (match_scratch:SI 1 "=r"))]
++  "TARGET_32BIT"
++  "orr%.\\t%1, %Q0, %R0"
++  [(set_attr "conds" "set")]
++)
++
++(define_insn "*thumb_cmpdi_zero"
++  [(set (reg:CC_Z CC_REGNUM)
++	(compare:CC_Z (match_operand:DI 0 "s_register_operand" "l")
++		      (const_int 0)))
++   (clobber (match_scratch:SI 1 "=l"))]
++  "TARGET_THUMB1"
++  "orr\\t%1, %Q0, %R0"
++  [(set_attr "conds" "set")
++   (set_attr "length" "2")]
++)
++
+ ;; Cirrus SF compare instruction
+ (define_insn "*cirrus_cmpsf"
+   [(set (reg:CCFP CC_REGNUM)
+@@ -8183,18 +8257,45 @@
+ 			     operands[2], operands[3])); DONE;"
+ )
+ 
+-;; this uses the Cirrus DI compare instruction
+ (define_expand "cstoredi4"
+   [(set (match_operand:SI 0 "s_register_operand" "")
+ 	(match_operator:SI 1 "arm_comparison_operator"
+-	 [(match_operand:DI 2 "cirrus_fp_register" "")
+-	  (match_operand:DI 3 "cirrus_fp_register" "")]))]
+-  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_MAVERICK"
+-  "emit_insn (gen_cstore_cc (operands[0], operands[1],
+-			     operands[2], operands[3])); DONE;"
++	 [(match_operand:DI 2 "cmpdi_operand" "")
++	  (match_operand:DI 3 "cmpdi_operand" "")]))]
++  "TARGET_32BIT"
++  "{
++     rtx swap = NULL_RTX;
++     enum rtx_code code = GET_CODE (operands[1]);
++
++     /* We should not have two constants.  */
++     gcc_assert (GET_MODE (operands[2]) == DImode
++		 || GET_MODE (operands[3]) == DImode);
++
++    /* Flip unimplemented DImode comparisons to a form that
++       arm_gen_compare_reg can handle.  */
++     switch (code)
++     {
++     case GT:
++       swap = gen_rtx_LT (VOIDmode, operands[3], operands[2]); break;
++     case LE:
++       swap = gen_rtx_GE (VOIDmode, operands[3], operands[2]); break;
++     case GTU:
++       swap = gen_rtx_LTU (VOIDmode, operands[3], operands[2]); break;
++     case LEU:
++       swap = gen_rtx_GEU (VOIDmode, operands[3], operands[2]); break;
++     default:
++       break;
++     }
++     if (swap)
++       emit_insn (gen_cstore_cc (operands[0], swap, operands[3],
++		      	         operands[2]));
++     else
++       emit_insn (gen_cstore_cc (operands[0], operands[1], operands[2],
++		      	         operands[3]));
++     DONE;
++   }"
+ )
+ 
+-
+ (define_expand "cstoresi_eq0_thumb1"
+   [(parallel
+     [(set (match_operand:SI 0 "s_register_operand" "")
+
+=== modified file 'gcc/config/arm/constraints.md'
+--- old/gcc/config/arm/constraints.md	2009-12-07 20:34:53 +0000
++++ new/gcc/config/arm/constraints.md	2010-07-29 16:58:56 +0000
+@@ -29,7 +29,7 @@
+ ;; in Thumb-1 state: I, J, K, L, M, N, O
+ 
+ ;; The following multi-letter normal constraints have been used:
+-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy
++;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
+ ;; in Thumb-1 state: Pa, Pb
+ ;; in Thumb-2 state: Ps, Pt
+ 
+@@ -191,6 +191,13 @@
+       (match_test "TARGET_32BIT && arm_const_double_inline_cost (op) == 4
+ 		   && !(optimize_size || arm_ld_sched)")))
+ 
++(define_constraint "Di"
++ "@internal
++  In ARM/Thumb-2 state a const_int or const_double where both the high
++  and low SImode words can be generated as immediates in 32-bit instructions."
++ (and (match_code "const_double,const_int")
++      (match_test "TARGET_32BIT && arm_const_double_by_immediates (op)")))
++
+ (define_constraint "Dn"
+  "@internal
+   In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-07-29 15:59:12 +0000
++++ new/gcc/config/arm/predicates.md	2010-07-29 16:58:56 +0000
+@@ -86,6 +86,12 @@
+   (and (match_code "const_int")
+        (match_test "const_ok_for_arm (INTVAL (op))")))
+ 
++;; A constant value which fits into two instructions, each taking
++;; an arithmetic constant operand for one of the words.
++(define_predicate "arm_immediate_di_operand"
++  (and (match_code "const_int,const_double")
++       (match_test "arm_const_double_by_immediates (op)")))
++
+ (define_predicate "arm_neg_immediate_operand"
+   (and (match_code "const_int")
+        (match_test "const_ok_for_arm (-INTVAL (op))")))
+@@ -115,6 +121,10 @@
+   (ior (match_operand 0 "arm_rhs_operand")
+        (match_operand 0 "arm_not_immediate_operand")))
+ 
++(define_predicate "arm_di_operand"
++  (ior (match_operand 0 "s_register_operand")
++       (match_operand 0 "arm_immediate_di_operand")))
++
+ ;; True if the operand is a memory reference which contains an
+ ;; offsettable address.
+ (define_predicate "offsettable_memory_operand"
+@@ -522,4 +532,12 @@
+ (define_predicate "neon_lane_number"
+   (and (match_code "const_int")
+        (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
++;; Predicates for named expanders that overlap multiple ISAs.
++
++(define_predicate "cmpdi_operand"
++  (if_then_else (match_test "TARGET_HARD_FLOAT && TARGET_MAVERICK")
++		(and (match_test "TARGET_ARM")
++		     (match_operand 0 "cirrus_fp_register"))
++		(and (match_test "TARGET_32BIT")
++		     (match_operand 0 "arm_di_operand"))))
+ 
+
+=== added file 'gcc/testsuite/gcc.c-torture/execute/20100416-1.c'
+--- old/gcc/testsuite/gcc.c-torture/execute/20100416-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/execute/20100416-1.c	2010-07-29 16:58:56 +0000
+@@ -0,0 +1,40 @@
++void abort(void);
++
++int
++movegt(int x, int y, long long a)
++{
++  int i;
++  int ret = 0;
++  for (i = 0; i < y; i++)
++    {
++      if (a >= (long long) 0xf000000000000000LL)
++	ret = x;
++      else
++	ret = y;
++    }
++  return ret;
++}
++
++struct test
++{
++  long long val;
++  int ret;
++} tests[] = {
++  { 0xf000000000000000LL, -1 },
++  { 0xefffffffffffffffLL, 1 },
++  { 0xf000000000000001LL, -1 },
++  { 0x0000000000000000LL, -1 },
++  { 0x8000000000000000LL, 1 },
++};
++
++int
++main()
++{
++  int i;
++  for (i = 0; i < sizeof (tests) / sizeof (tests[0]); i++)
++    {
++      if (movegt (-1, 1, tests[i].val) != tests[i].ret)
++	abort ();
++    }
++  return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99302.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99302.patch
new file mode 100644
index 0000000000..635d3f8bd5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99302.patch
@@ -0,0 +1,244 @@
+2010-07-09  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline (originally on Sourcery G++ 4.4):
+
+	2010-07-02  Julian Brown  <julian@codesourcery.com>
+		    Sandra Loosemore <sandra@codesourcery.com>
+
+	PR target/43703
+
+	gcc/
+	* config/arm/vec-common.md (add<mode>3, sub<mode>3, smin<mode>3)
+	(smax<mode>3): Disable for NEON float modes when
+	flag_unsafe_math_optimizations is false.
+	* config/arm/neon.md (*add<mode>3_neon, *sub<mode>3_neon)
+	(*mul<mode>3_neon)
+	(mul<mode>3add<mode>_neon, mul<mode>3neg<mode>add<mode>_neon)
+	(reduc_splus_<mode>, reduc_smin_<mode>, reduc_smax_<mode>): Disable
+	for NEON float modes when flag_unsafe_math_optimizations is false.
+	(quad_halves_<code>v4sf): Only enable if flag_unsafe_math_optimizations
+	is true.
+	* doc/invoke.texi (ARM Options): Add note about floating point
+	vectorization requiring -funsafe-math-optimizations.
+
+	gcc/testsuite/
+	* gcc.dg/vect/vect.exp: Add -ffast-math for NEON.
+	* gcc.dg/vect/vect-reduc-6.c: Add XFAIL for NEON.
+
+ 2010-07-08  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Backport from upstream (originally from Sourcery G++ 4.4):
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md	2010-07-29 15:59:12 +0000
++++ new/gcc/config/arm/neon.md	2010-07-29 17:03:20 +0000
+@@ -819,7 +819,7 @@
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (plus:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+ 		  (match_operand:VDQ 2 "s_register_operand" "w")))]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+   "vadd.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+@@ -853,7 +853,7 @@
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+                    (match_operand:VDQ 2 "s_register_operand" "w")))]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+   "vsub.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+@@ -888,7 +888,7 @@
+   [(set (match_operand:VDQ 0 "s_register_operand" "=w")
+         (mult:VDQ (match_operand:VDQ 1 "s_register_operand" "w")
+                   (match_operand:VDQ 2 "s_register_operand" "w")))]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+   "vmul.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+@@ -910,7 +910,7 @@
+         (plus:VDQ (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+                             (match_operand:VDQ 3 "s_register_operand" "w"))
+ 		  (match_operand:VDQ 1 "s_register_operand" "0")))]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+   "vmla.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+@@ -932,7 +932,7 @@
+         (minus:VDQ (match_operand:VDQ 1 "s_register_operand" "0")
+                    (mult:VDQ (match_operand:VDQ 2 "s_register_operand" "w")
+                              (match_operand:VDQ 3 "s_register_operand" "w"))))]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+   "vmls.<V_if_elem>\t%<V_reg>0, %<V_reg>2, %<V_reg>3"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+@@ -1361,7 +1361,7 @@
+                            (parallel [(const_int 0) (const_int 1)]))
+           (vec_select:V2SF (match_dup 1)
+                            (parallel [(const_int 2) (const_int 3)]))))]
+-  "TARGET_NEON"
++  "TARGET_NEON && flag_unsafe_math_optimizations"
+   "<VQH_mnem>.f32\t%P0, %e1, %f1"
+   [(set_attr "vqh_mnem" "<VQH_mnem>")
+    (set (attr "neon_type")
+@@ -1496,7 +1496,7 @@
+ (define_expand "reduc_splus_<mode>"
+   [(match_operand:VD 0 "s_register_operand" "")
+    (match_operand:VD 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   neon_pairwise_reduce (operands[0], operands[1], <MODE>mode,
+ 			&gen_neon_vpadd_internal<mode>);
+@@ -1506,7 +1506,7 @@
+ (define_expand "reduc_splus_<mode>"
+   [(match_operand:VQ 0 "s_register_operand" "")
+    (match_operand:VQ 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   rtx step1 = gen_reg_rtx (<V_HALF>mode);
+   rtx res_d = gen_reg_rtx (<V_HALF>mode);
+@@ -1541,7 +1541,7 @@
+ (define_expand "reduc_smin_<mode>"
+   [(match_operand:VD 0 "s_register_operand" "")
+    (match_operand:VD 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   neon_pairwise_reduce (operands[0], operands[1], <MODE>mode,
+ 			&gen_neon_vpsmin<mode>);
+@@ -1551,7 +1551,7 @@
+ (define_expand "reduc_smin_<mode>"
+   [(match_operand:VQ 0 "s_register_operand" "")
+    (match_operand:VQ 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   rtx step1 = gen_reg_rtx (<V_HALF>mode);
+   rtx res_d = gen_reg_rtx (<V_HALF>mode);
+@@ -1566,7 +1566,7 @@
+ (define_expand "reduc_smax_<mode>"
+   [(match_operand:VD 0 "s_register_operand" "")
+    (match_operand:VD 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   neon_pairwise_reduce (operands[0], operands[1], <MODE>mode,
+ 			&gen_neon_vpsmax<mode>);
+@@ -1576,7 +1576,7 @@
+ (define_expand "reduc_smax_<mode>"
+   [(match_operand:VQ 0 "s_register_operand" "")
+    (match_operand:VQ 1 "s_register_operand" "")]
+-  "TARGET_NEON"
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
+ {
+   rtx step1 = gen_reg_rtx (<V_HALF>mode);
+   rtx res_d = gen_reg_rtx (<V_HALF>mode);
+
+=== modified file 'gcc/config/arm/vec-common.md'
+--- old/gcc/config/arm/vec-common.md	2009-11-11 14:23:03 +0000
++++ new/gcc/config/arm/vec-common.md	2010-07-29 17:03:20 +0000
+@@ -57,7 +57,8 @@
+   [(set (match_operand:VALL 0 "s_register_operand" "")
+         (plus:VALL (match_operand:VALL 1 "s_register_operand" "")
+                    (match_operand:VALL 2 "s_register_operand" "")))]
+-  "TARGET_NEON
++  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
++		    || flag_unsafe_math_optimizations))
+    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
+ {
+ })
+@@ -66,7 +67,8 @@
+   [(set (match_operand:VALL 0 "s_register_operand" "")
+         (minus:VALL (match_operand:VALL 1 "s_register_operand" "")
+                     (match_operand:VALL 2 "s_register_operand" "")))]
+-  "TARGET_NEON
++  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
++		    || flag_unsafe_math_optimizations))
+    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
+ {
+ })
+@@ -75,7 +77,9 @@
+   [(set (match_operand:VALLW 0 "s_register_operand" "")
+         (mult:VALLW (match_operand:VALLW 1 "s_register_operand" "")
+ 		    (match_operand:VALLW 2 "s_register_operand" "")))]
+-  "TARGET_NEON || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
++  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
++		    || flag_unsafe_math_optimizations))
++   || (<MODE>mode == V4HImode && TARGET_REALLY_IWMMXT)"
+ {
+ })
+ 
+@@ -83,7 +87,8 @@
+   [(set (match_operand:VALLW 0 "s_register_operand" "")
+ 	(smin:VALLW (match_operand:VALLW 1 "s_register_operand" "")
+ 		    (match_operand:VALLW 2 "s_register_operand" "")))]
+-  "TARGET_NEON
++  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
++		    || flag_unsafe_math_optimizations))
+    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
+ {
+ })
+@@ -101,7 +106,8 @@
+   [(set (match_operand:VALLW 0 "s_register_operand" "")
+ 	(smax:VALLW (match_operand:VALLW 1 "s_register_operand" "")
+ 		    (match_operand:VALLW 2 "s_register_operand" "")))]
+-  "TARGET_NEON
++  "(TARGET_NEON && ((<MODE>mode != V2SFmode && <MODE>mode != V4SFmode)
++		    || flag_unsafe_math_optimizations))
+    || (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (<MODE>mode))"
+ {
+ })
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-07-29 15:53:39 +0000
++++ new/gcc/doc/invoke.texi	2010-07-29 17:03:20 +0000
+@@ -9874,6 +9874,14 @@
+ If @option{-msoft-float} is specified this specifies the format of
+ floating point values.
+ 
++If the selected floating-point hardware includes the NEON extension
++(e.g. @option{-mfpu}=@samp{neon}), note that floating-point
++operations will not be used by GCC's auto-vectorization pass unless
++@option{-funsafe-math-optimizations} is also specified.  This is
++because NEON hardware does not fully implement the IEEE 754 standard for
++floating-point arithmetic (in particular denormal values are treated as
++zero), so the use of NEON instructions may lead to a loss of precision.
++
+ @item -mfp16-format=@var{name}
+ @opindex mfp16-format
+ Specify the format of the @code{__fp16} half-precision floating-point type.
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-reduc-6.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-reduc-6.c	2007-09-04 12:05:19 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-reduc-6.c	2010-07-29 17:03:20 +0000
+@@ -49,5 +49,6 @@
+ }
+ 
+ /* need -ffast-math to vectorizer these loops.  */
+-/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" } } */
++/* ARM NEON passes -ffast-math to these tests, so expect this to fail.  */
++/* { dg-final { scan-tree-dump-times "vectorized 0 loops" 1 "vect" { xfail arm_neon_ok } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect.exp'
+--- old/gcc/testsuite/gcc.dg/vect/vect.exp	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect.exp	2010-07-29 17:03:20 +0000
+@@ -102,6 +102,10 @@
+     set dg-do-what-default run
+ } elseif [is-effective-target arm_neon_ok] {
+     eval lappend DEFAULT_VECTCFLAGS [add_options_for_arm_neon ""]
++    # NEON does not support denormals, so is not used for vectorization by
++    # default to avoid loss of precision.  We must pass -ffast-math to test
++    # vectorization of float operations.
++    lappend DEFAULT_VECTCFLAGS "-ffast-math"
+     if [is-effective-target arm_neon_hw] {
+       set dg-do-what-default run
+     } else {
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99303.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99303.patch
new file mode 100644
index 0000000000..53d1d08d52
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99303.patch
@@ -0,0 +1,131 @@
+	Merge from Sourcery G++ 4.4:
+
+	2009-05-21  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Merge from Sourcery G++ 4.3:
+
+	2009-04-04  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Issue #5104
+	PR tree-optimization/39604
+
+	gcc/testsuite
+	* g++.dg/tree-ssa/sink-1.C: New.
+
+	gcc/
+	* tree_ssa-sink.c (sink_code_in_bb): Do not sink statements out
+	of a lexical block containing variable definitions.
+
+2010-07-09  Sandra Loosemore  <sandra@codesourcery.com>
+
+ 	Backport from mainline (originally on Sourcery G++ 4.4):
+ 
+ 	2010-07-02  Julian Brown  <julian@codesourcery.com>
+
+=== added file 'gcc/testsuite/g++.dg/tree-ssa/sink-1.C'
+--- old/gcc/testsuite/g++.dg/tree-ssa/sink-1.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/tree-ssa/sink-1.C	2010-07-30 12:14:18 +0000
+@@ -0,0 +1,50 @@
++/* { dg-do run } */
++/* { dg-options "-O1" } */
++
++class A {
++ public:
++  A() {}
++  virtual ~A() {}  
++  void * dostuff();
++  
++  virtual int dovirtual() = 0;
++};
++
++
++class B : public A {
++ public:
++  B() {}
++  int dovirtual() { return 0;}
++  virtual ~B() {};
++}; 
++
++class C : public B {
++ public:
++  C() {}
++  virtual ~C() {};
++};
++
++void* A::dostuff()
++{
++  return (void*)dovirtual();
++}
++
++/* tree-ssa-sink was sinking the inlined destructor for STUFF out of
++   the first inner block and into the second one, where it was ending up
++   after the inlined constructor for STUFF2.  This is bad because
++   cfgexpand aliases STUFF and STUFF2 to the same storage at -O1
++   (i.e., without -fstrict-aliasing), with the result that STUFF2's
++   vtable was getting trashed. */
++
++int main() {
++  {
++    B stuff;
++    stuff.dostuff();
++  }
++  {
++    C stuff2;
++    stuff2.dostuff();
++  }
++  return 0;
++}
++
+
+=== modified file 'gcc/tree-ssa-sink.c'
+--- old/gcc/tree-ssa-sink.c	2009-11-28 16:21:00 +0000
++++ new/gcc/tree-ssa-sink.c	2010-07-30 12:14:18 +0000
+@@ -470,6 +470,47 @@
+ 	  last = false;
+ 	  continue;
+ 	}
++
++      /* We cannot move statements that contain references to block-scope
++	 variables out of that block, as this may lead to incorrect aliasing
++	 when we lay out the stack frame in cfgexpand.c.
++	 In lieu of more sophisticated analysis, be very conservative here
++	 and prohibit moving any statement that references memory out of a
++	 block with variables.  */
++      if (gimple_references_memory_p (stmt))
++	{
++	  tree fromblock = gimple_block (stmt);
++	  while (fromblock
++		 && fromblock != current_function_decl
++		 && !BLOCK_VARS (fromblock))
++	    fromblock = BLOCK_SUPERCONTEXT (fromblock);
++	  if (fromblock && fromblock != current_function_decl)
++	    {
++	      gimple tostmt;
++	      tree toblock;
++
++	      if (gsi_end_p (togsi))
++		tostmt = gimple_seq_last_stmt (gsi_seq (togsi));
++	      else
++		tostmt = gsi_stmt (togsi);
++	      if (tostmt)
++		toblock = gimple_block (tostmt);
++	      else
++		toblock = NULL;
++	      while (toblock
++		     && toblock != current_function_decl
++		     && toblock != fromblock)
++		toblock = BLOCK_SUPERCONTEXT (toblock);
++	      if (!toblock || toblock != fromblock)
++		{
++		  if (!gsi_end_p (gsi))
++		    gsi_prev (&gsi);
++		  last = false;
++		  continue;
++		}
++	    }
++	}
++
+       if (dump_file)
+ 	{
+ 	  fprintf (dump_file, "Sinking ");
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99304.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99304.patch
new file mode 100644
index 0000000000..ab1296347b
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99304.patch
@@ -0,0 +1,81 @@
+2010-07-10  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2009-05-28  Julian Brown  <julian@codesourcery.com>
+
+	Merged from Sourcery G++ 4.3:
+
+	libgcc/
+	* config.host (arm*-*-linux*, arm*-*-uclinux*, arm*-*-eabi*)
+	(arm*-*-symbianelf): Add arm/t-divmod-ef to tmake_file.
+	* Makefile.in (LIB2_DIVMOD_EXCEPTION_FLAGS): Set to previous
+	default if not set by a target-specific Makefile fragment.
+	(lib2-divmod-o, lib2-divmod-s-o): Use above.
+	* config/arm/t-divmod-ef: New.
+
+ 2010-07-09  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'libgcc/Makefile.in'
+--- old/libgcc/Makefile.in	2010-03-30 12:08:52 +0000
++++ new/libgcc/Makefile.in	2010-07-30 12:21:02 +0000
+@@ -400,18 +400,24 @@
+ endif
+ endif
+ 
++ifeq ($(LIB2_DIVMOD_EXCEPTION_FLAGS),)
++# Provide default flags for compiling divmod functions, if they haven't been
++# set already by a target-specific Makefile fragment.
++LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions -fnon-call-exceptions
++endif
++
+ # Build LIB2_DIVMOD_FUNCS.
+ lib2-divmod-o = $(patsubst %,%$(objext),$(LIB2_DIVMOD_FUNCS))
+ $(lib2-divmod-o): %$(objext): $(gcc_srcdir)/libgcc2.c
+ 	$(gcc_compile) -DL$* -c $(gcc_srcdir)/libgcc2.c \
+-	  -fexceptions -fnon-call-exceptions $(vis_hide)
++	  $(LIB2_DIVMOD_EXCEPTION_FLAGS) $(vis_hide)
+ libgcc-objects += $(lib2-divmod-o)
+ 
+ ifeq ($(enable_shared),yes)
+ lib2-divmod-s-o = $(patsubst %,%_s$(objext),$(LIB2_DIVMOD_FUNCS))
+ $(lib2-divmod-s-o): %_s$(objext): $(gcc_srcdir)/libgcc2.c
+ 	$(gcc_s_compile) -DL$* -c $(gcc_srcdir)/libgcc2.c \
+-	  -fexceptions -fnon-call-exceptions
++	  $(LIB2_DIVMOD_EXCEPTION_FLAGS)
+ libgcc-s-objects += $(lib2-divmod-s-o)
+ endif
+ 
+
+=== modified file 'libgcc/config.host'
+--- old/libgcc/config.host	2010-04-02 02:02:18 +0000
++++ new/libgcc/config.host	2010-07-30 12:21:02 +0000
+@@ -208,12 +208,15 @@
+ arm*-*-netbsd*)
+ 	;;
+ arm*-*-linux*)			# ARM GNU/Linux with ELF
++	tmake_file="${tmake_file} arm/t-divmod-ef"
+ 	;;
+ arm*-*-uclinux*)		# ARM ucLinux
++	tmake_file="${tmake_file} arm/t-divmod-ef"
+ 	;;
+ arm*-*-ecos-elf)
+ 	;;
+ arm*-*-eabi* | arm*-*-symbianelf* )
++	tmake_file="${tmake_file} arm/t-divmod-ef"
+ 	;;
+ arm*-*-rtems*)
+ 	;;
+
+=== added directory 'libgcc/config/arm'
+=== added file 'libgcc/config/arm/t-divmod-ef'
+--- old/libgcc/config/arm/t-divmod-ef	1970-01-01 00:00:00 +0000
++++ new/libgcc/config/arm/t-divmod-ef	2010-07-30 12:21:02 +0000
+@@ -0,0 +1,4 @@
++# On ARM, specifying -fnon-call-exceptions will needlessly pull in
++# the unwinder in simple programs which use 64-bit division.  Omitting
++# the option is safe.
++LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99305.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99305.patch
new file mode 100644
index 0000000000..ed25334dfb
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99305.patch
@@ -0,0 +1,52 @@
+	2009-09-02  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	libgcc/
+	* shared-object.mk (c_flags-$(base)$(objext)): New.
+	($(base)$(objext)): Use above.
+	($(base)_s$(objext)): Likewise.
+	* static-object.mk (c_flags-$(base)$(objext)): New.
+	($(base)$(objext)): Use above.
+	
+2010-07-10  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2009-05-28  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Merged from Sourcery G++ 4.3:
+
+=== modified file 'libgcc/shared-object.mk'
+--- old/libgcc/shared-object.mk	2008-07-03 18:22:00 +0000
++++ new/libgcc/shared-object.mk	2010-07-30 13:11:02 +0000
+@@ -8,11 +8,13 @@
+ 
+ ifeq ($(suffix $o),.c)
+ 
++c_flags-$(base)$(objext) := $(c_flags)
+ $(base)$(objext): $o
+-	$(gcc_compile) $(c_flags) -c $< $(vis_hide)
++	$(gcc_compile) $(c_flags-$@) -c $< $(vis_hide)
+ 
++c_flags-$(base)_s$(objext) := $(c_flags)
+ $(base)_s$(objext): $o
+-	$(gcc_s_compile) $(c_flags) -c $<
++	$(gcc_s_compile) $(c_flags-$@) -c $<
+ 
+ else
+ 
+
+=== modified file 'libgcc/static-object.mk'
+--- old/libgcc/static-object.mk	2007-01-04 04:22:37 +0000
++++ new/libgcc/static-object.mk	2010-07-30 13:11:02 +0000
+@@ -8,8 +8,9 @@
+ 
+ ifeq ($(suffix $o),.c)
+ 
++c_flags-$(base)$(objext) := $(c_flags)
+ $(base)$(objext): $o
+-	$(gcc_compile) $(c_flags) -c $< $(vis_hide)
++	$(gcc_compile) $(c_flags-$@) -c $< $(vis_hide)
+ 
+ else
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99306.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99306.patch
new file mode 100644
index 0000000000..423cd56528
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99306.patch
@@ -0,0 +1,1401 @@
+2010-07-10  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-05-08  Sandra Loosemore  <sandra@codesourcery.com>
+
+	PR middle-end/28685
+
+	gcc/
+	* tree-ssa-reassoc.c (eliminate_redundant_comparison): New function.
+	(optimize_ops_list): Call it.
+
+	gcc/testsuite/
+	* gcc.dg/pr28685-1.c: New file.
+
+	2010-06-08  Sandra Loosemore  <sandra@codesourcery.com>
+
+	PR tree-optimization/39874
+	PR middle-end/28685
+
+	gcc/
+	* gimple.h (maybe_fold_and_comparisons, maybe_fold_or_comparisons):
+	Declare.
+	* gimple-fold.c (canonicalize_bool, same_bool_comparison_p,
+	same_bool_result_p): New.
+	(and_var_with_comparison, and_var_with_comparison_1,
+	and_comparisons_1, and_comparisons, maybe_fold_and_comparisons): New.
+	(or_var_with_comparison, or_var_with_comparison_1,
+	or_comparisons_1, or_comparisons, maybe_fold_or_comparisons): New.
+	* tree-ssa-reassoc.c (eliminate_redundant_comparison): Use
+	maybe_fold_and_comparisons or maybe_fold_or_comparisons instead
+	of combine_comparisons.
+	* tree-ssa-ifcombine.c (ifcombine_ifandif, ifcombine_iforif): Likewise.
+
+	gcc/testsuite/
+	* gcc.dg/pr39874.c: New file.
+
+ 2010-07-10  Yao Qi  <yao@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'gcc/gimple.h'
+--- old/gcc/gimple.h	2010-04-02 18:54:46 +0000
++++ new/gcc/gimple.h	2010-07-30 13:21:51 +0000
+@@ -4743,4 +4743,9 @@
+ 
+ extern void dump_gimple_statistics (void);
+ 
++extern tree maybe_fold_and_comparisons (enum tree_code, tree, tree, 
++					enum tree_code, tree, tree);
++extern tree maybe_fold_or_comparisons (enum tree_code, tree, tree,
++				       enum tree_code, tree, tree);
++
+ #endif  /* GCC_GIMPLE_H */
+
+=== added file 'gcc/testsuite/gcc.dg/pr28685-1.c'
+--- old/gcc/testsuite/gcc.dg/pr28685-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr28685-1.c	2010-07-30 13:21:51 +0000
+@@ -0,0 +1,50 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-optimized" }  */
++
++/* Should produce <=.  */
++int test1 (int a, int b)
++{
++  return (a < b || a == b);
++}
++
++/* Should produce <=.  */
++int test2 (int a, int b)
++{
++  int lt = a < b;
++  int eq = a == b;
++
++  return (lt || eq);
++}
++
++/* Should produce <= (just deleting redundant test).  */
++int test3 (int a, int b)
++{
++  int lt = a <= b;
++  int eq = a == b;
++
++  return (lt || eq);
++}
++
++/* Should produce <= (operands reversed to test the swap logic).  */
++int test4 (int a, int b)
++{
++  int lt = a < b;
++  int eq = b == a;
++
++  return (lt || eq);
++}
++
++/* Should produce constant 0.  */
++int test5 (int a, int b)
++{
++  int lt = a < b;
++  int eq = a == b;
++
++  return (lt && eq);
++}
++
++/* { dg-final { scan-tree-dump-times " <= " 4 "optimized" } } */
++/* { dg-final { scan-tree-dump-times "return 0" 1 "optimized" } } */
++/* { dg-final { scan-tree-dump-not " < " "optimized" } } */
++/* { dg-final { scan-tree-dump-not " == " "optimized" } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+
+=== added file 'gcc/testsuite/gcc.dg/pr39874.c'
+--- old/gcc/testsuite/gcc.dg/pr39874.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr39874.c	2010-07-30 13:21:51 +0000
+@@ -0,0 +1,29 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-optimized" }  */
++
++extern void func();
++
++void test1(char *signature)
++{
++  char ch = signature[0];
++  if (ch == 15 || ch == 3)
++  {
++    if (ch == 15) func();
++  }
++}
++
++
++void test2(char *signature)
++{
++  char ch = signature[0];
++  if (ch == 15 || ch == 3)
++  {
++    if (ch > 14) func();
++  }
++}
++
++/* { dg-final { scan-tree-dump-times " == 15" 2 "optimized" } } */
++/* { dg-final { scan-tree-dump-not " == 3" "optimized" } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
++
++
+
+=== modified file 'gcc/tree-ssa-ccp.c'
+--- old/gcc/tree-ssa-ccp.c	2010-04-02 15:50:04 +0000
++++ new/gcc/tree-ssa-ccp.c	2010-07-30 13:21:51 +0000
+@@ -3176,6 +3176,1056 @@
+   return changed;
+ }
+ 
++/* Canonicalize and possibly invert the boolean EXPR; return NULL_TREE 
++   if EXPR is null or we don't know how.
++   If non-null, the result always has boolean type.  */
++
++static tree
++canonicalize_bool (tree expr, bool invert)
++{
++  if (!expr)
++    return NULL_TREE;
++  else if (invert)
++    {
++      if (integer_nonzerop (expr))
++	return boolean_false_node;
++      else if (integer_zerop (expr))
++	return boolean_true_node;
++      else if (TREE_CODE (expr) == SSA_NAME)
++	return fold_build2 (EQ_EXPR, boolean_type_node, expr,
++			    build_int_cst (TREE_TYPE (expr), 0));
++      else if (TREE_CODE_CLASS (TREE_CODE (expr)) == tcc_comparison)
++	return fold_build2 (invert_tree_comparison (TREE_CODE (expr), false),
++			    boolean_type_node,
++			    TREE_OPERAND (expr, 0),
++			    TREE_OPERAND (expr, 1));
++      else
++	return NULL_TREE;
++    }
++  else
++    {
++      if (TREE_CODE (TREE_TYPE (expr)) == BOOLEAN_TYPE)
++	return expr;
++      if (integer_nonzerop (expr))
++	return boolean_true_node;
++      else if (integer_zerop (expr))
++	return boolean_false_node;
++      else if (TREE_CODE (expr) == SSA_NAME)
++	return fold_build2 (NE_EXPR, boolean_type_node, expr,
++			    build_int_cst (TREE_TYPE (expr), 0));
++      else if (TREE_CODE_CLASS (TREE_CODE (expr)) == tcc_comparison)
++	return fold_build2 (TREE_CODE (expr),
++			    boolean_type_node,
++			    TREE_OPERAND (expr, 0),
++			    TREE_OPERAND (expr, 1));
++      else
++	return NULL_TREE;
++    }
++}
++
++/* Check to see if a boolean expression EXPR is logically equivalent to the
++   comparison (OP1 CODE OP2).  Check for various identities involving
++   SSA_NAMEs.  */
++
++static bool
++same_bool_comparison_p (const_tree expr, enum tree_code code,
++			const_tree op1, const_tree op2)
++{
++  gimple s;
++
++  /* The obvious case.  */
++  if (TREE_CODE (expr) == code
++      && operand_equal_p (TREE_OPERAND (expr, 0), op1, 0)
++      && operand_equal_p (TREE_OPERAND (expr, 1), op2, 0))
++    return true;
++
++  /* Check for comparing (name, name != 0) and the case where expr
++     is an SSA_NAME with a definition matching the comparison.  */
++  if (TREE_CODE (expr) == SSA_NAME
++      && TREE_CODE (TREE_TYPE (expr)) == BOOLEAN_TYPE)
++    {
++      if (operand_equal_p (expr, op1, 0))
++	return ((code == NE_EXPR && integer_zerop (op2))
++		|| (code == EQ_EXPR && integer_nonzerop (op2)));
++      s = SSA_NAME_DEF_STMT (expr);
++      if (is_gimple_assign (s)
++	  && gimple_assign_rhs_code (s) == code
++	  && operand_equal_p (gimple_assign_rhs1 (s), op1, 0)
++	  && operand_equal_p (gimple_assign_rhs2 (s), op2, 0))
++	return true;
++    }
++
++  /* If op1 is of the form (name != 0) or (name == 0), and the definition
++     of name is a comparison, recurse.  */
++  if (TREE_CODE (op1) == SSA_NAME
++      && TREE_CODE (TREE_TYPE (op1)) == BOOLEAN_TYPE)
++    {
++      s = SSA_NAME_DEF_STMT (op1);
++      if (is_gimple_assign (s)
++	  && TREE_CODE_CLASS (gimple_assign_rhs_code (s)) == tcc_comparison)
++	{
++	  enum tree_code c = gimple_assign_rhs_code (s);
++	  if ((c == NE_EXPR && integer_zerop (op2))
++	      || (c == EQ_EXPR && integer_nonzerop (op2)))
++	    return same_bool_comparison_p (expr, c,
++					   gimple_assign_rhs1 (s),
++					   gimple_assign_rhs2 (s));
++	  if ((c == EQ_EXPR && integer_zerop (op2))
++	      || (c == NE_EXPR && integer_nonzerop (op2)))
++	    return same_bool_comparison_p (expr,
++					   invert_tree_comparison (c, false),
++					   gimple_assign_rhs1 (s),
++					   gimple_assign_rhs2 (s));
++	}
++    }
++  return false;
++}
++
++/* Check to see if two boolean expressions OP1 and OP2 are logically
++   equivalent.  */
++
++static bool
++same_bool_result_p (const_tree op1, const_tree op2)
++{
++  /* Simple cases first.  */
++  if (operand_equal_p (op1, op2, 0))
++    return true;
++
++  /* Check the cases where at least one of the operands is a comparison.
++     These are a bit smarter than operand_equal_p in that they apply some
++     identifies on SSA_NAMEs.  */
++  if (TREE_CODE_CLASS (TREE_CODE (op2)) == tcc_comparison
++      && same_bool_comparison_p (op1, TREE_CODE (op2),
++				 TREE_OPERAND (op2, 0),
++				 TREE_OPERAND (op2, 1)))
++    return true;
++  if (TREE_CODE_CLASS (TREE_CODE (op1)) == tcc_comparison
++      && same_bool_comparison_p (op2, TREE_CODE (op1),
++				 TREE_OPERAND (op1, 0),
++				 TREE_OPERAND (op1, 1)))
++    return true;
++
++  /* Default case.  */
++  return false;
++}
++
++/* Forward declarations for some mutually recursive functions.  */
++
++static tree
++and_comparisons_1 (enum tree_code code1, tree op1a, tree op1b,
++		   enum tree_code code2, tree op2a, tree op2b);
++static tree
++and_var_with_comparison (tree var, bool invert,
++			 enum tree_code code2, tree op2a, tree op2b);
++static tree
++and_var_with_comparison_1 (gimple stmt, 
++			   enum tree_code code2, tree op2a, tree op2b);
++static tree
++or_comparisons_1 (enum tree_code code1, tree op1a, tree op1b,
++		  enum tree_code code2, tree op2a, tree op2b);
++static tree
++or_var_with_comparison (tree var, bool invert,
++			enum tree_code code2, tree op2a, tree op2b);
++static tree
++or_var_with_comparison_1 (gimple stmt, 
++			  enum tree_code code2, tree op2a, tree op2b);
++
++/* Helper function for and_comparisons_1:  try to simplify the AND of the
++   ssa variable VAR with the comparison specified by (OP2A CODE2 OP2B).
++   If INVERT is true, invert the value of the VAR before doing the AND.
++   Return NULL_EXPR if we can't simplify this to a single expression.  */
++
++static tree
++and_var_with_comparison (tree var, bool invert,
++			 enum tree_code code2, tree op2a, tree op2b)
++{
++  tree t;
++  gimple stmt = SSA_NAME_DEF_STMT (var);
++
++  /* We can only deal with variables whose definitions are assignments.  */
++  if (!is_gimple_assign (stmt))
++    return NULL_TREE;
++  
++  /* If we have an inverted comparison, apply DeMorgan's law and rewrite
++     !var AND (op2a code2 op2b) => !(var OR !(op2a code2 op2b))
++     Then we only have to consider the simpler non-inverted cases.  */
++  if (invert)
++    t = or_var_with_comparison_1 (stmt, 
++				  invert_tree_comparison (code2, false),
++				  op2a, op2b);
++  else
++    t = and_var_with_comparison_1 (stmt, code2, op2a, op2b);
++  return canonicalize_bool (t, invert);
++}
++
++/* Try to simplify the AND of the ssa variable defined by the assignment
++   STMT with the comparison specified by (OP2A CODE2 OP2B).
++   Return NULL_EXPR if we can't simplify this to a single expression.  */
++
++static tree
++and_var_with_comparison_1 (gimple stmt,
++			   enum tree_code code2, tree op2a, tree op2b)
++{
++  tree var = gimple_assign_lhs (stmt);
++  tree true_test_var = NULL_TREE;
++  tree false_test_var = NULL_TREE;
++  enum tree_code innercode = gimple_assign_rhs_code (stmt);
++
++  /* Check for identities like (var AND (var == 0)) => false.  */
++  if (TREE_CODE (op2a) == SSA_NAME
++      && TREE_CODE (TREE_TYPE (var)) == BOOLEAN_TYPE)
++    {
++      if ((code2 == NE_EXPR && integer_zerop (op2b))
++	  || (code2 == EQ_EXPR && integer_nonzerop (op2b)))
++	{
++	  true_test_var = op2a;
++	  if (var == true_test_var)
++	    return var;
++	}
++      else if ((code2 == EQ_EXPR && integer_zerop (op2b))
++	       || (code2 == NE_EXPR && integer_nonzerop (op2b)))
++	{
++	  false_test_var = op2a;
++	  if (var == false_test_var)
++	    return boolean_false_node;
++	}
++    }
++
++  /* If the definition is a comparison, recurse on it.  */
++  if (TREE_CODE_CLASS (innercode) == tcc_comparison)
++    {
++      tree t = and_comparisons_1 (innercode,
++				  gimple_assign_rhs1 (stmt),
++				  gimple_assign_rhs2 (stmt),
++				  code2,
++				  op2a,
++				  op2b);
++      if (t)
++	return t;
++    }
++
++  /* If the definition is an AND or OR expression, we may be able to
++     simplify by reassociating.  */
++  if (innercode == TRUTH_AND_EXPR
++      || innercode == TRUTH_OR_EXPR
++      || (TREE_CODE (TREE_TYPE (var)) == BOOLEAN_TYPE
++	  && (innercode == BIT_AND_EXPR || innercode == BIT_IOR_EXPR)))
++    {
++      tree inner1 = gimple_assign_rhs1 (stmt);
++      tree inner2 = gimple_assign_rhs2 (stmt);
++      gimple s;
++      tree t;
++      tree partial = NULL_TREE;
++      bool is_and = (innercode == TRUTH_AND_EXPR || innercode == BIT_AND_EXPR);
++      
++      /* Check for boolean identities that don't require recursive examination
++	 of inner1/inner2:
++	 inner1 AND (inner1 AND inner2) => inner1 AND inner2 => var
++	 inner1 AND (inner1 OR inner2) => inner1
++	 !inner1 AND (inner1 AND inner2) => false
++	 !inner1 AND (inner1 OR inner2) => !inner1 AND inner2
++         Likewise for similar cases involving inner2.  */
++      if (inner1 == true_test_var)
++	return (is_and ? var : inner1);
++      else if (inner2 == true_test_var)
++	return (is_and ? var : inner2);
++      else if (inner1 == false_test_var)
++	return (is_and
++		? boolean_false_node
++		: and_var_with_comparison (inner2, false, code2, op2a, op2b));
++      else if (inner2 == false_test_var)
++	return (is_and
++		? boolean_false_node
++		: and_var_with_comparison (inner1, false, code2, op2a, op2b));
++
++      /* Next, redistribute/reassociate the AND across the inner tests.
++	 Compute the first partial result, (inner1 AND (op2a code op2b))  */
++      if (TREE_CODE (inner1) == SSA_NAME
++	  && is_gimple_assign (s = SSA_NAME_DEF_STMT (inner1))
++	  && TREE_CODE_CLASS (gimple_assign_rhs_code (s)) == tcc_comparison
++	  && (t = maybe_fold_and_comparisons (gimple_assign_rhs_code (s),
++					      gimple_assign_rhs1 (s),
++					      gimple_assign_rhs2 (s),
++					      code2, op2a, op2b)))
++	{
++	  /* Handle the AND case, where we are reassociating:
++	     (inner1 AND inner2) AND (op2a code2 op2b)
++	     => (t AND inner2)
++	     If the partial result t is a constant, we win.  Otherwise
++	     continue on to try reassociating with the other inner test.  */
++	  if (is_and)
++	    {
++	      if (integer_onep (t))
++		return inner2;
++	      else if (integer_zerop (t))
++		return boolean_false_node;
++	    }
++
++	  /* Handle the OR case, where we are redistributing:
++	     (inner1 OR inner2) AND (op2a code2 op2b)
++	     => (t OR (inner2 AND (op2a code2 op2b)))  */
++	  else
++	    {
++	      if (integer_onep (t))
++		return boolean_true_node;
++	      else
++		/* Save partial result for later.  */
++		partial = t;
++	    }
++	}
++      
++      /* Compute the second partial result, (inner2 AND (op2a code op2b)) */
++      if (TREE_CODE (inner2) == SSA_NAME
++	  && is_gimple_assign (s = SSA_NAME_DEF_STMT (inner2))
++	  && TREE_CODE_CLASS (gimple_assign_rhs_code (s)) == tcc_comparison
++	  && (t = maybe_fold_and_comparisons (gimple_assign_rhs_code (s),
++					      gimple_assign_rhs1 (s),
++					      gimple_assign_rhs2 (s),
++					      code2, op2a, op2b)))
++	{
++	  /* Handle the AND case, where we are reassociating:
++	     (inner1 AND inner2) AND (op2a code2 op2b)
++	     => (inner1 AND t)  */
++	  if (is_and)
++	    {
++	      if (integer_onep (t))
++		return inner1;
++	      else if (integer_zerop (t))
++		return boolean_false_node;
++	    }
++
++	  /* Handle the OR case. where we are redistributing:
++	     (inner1 OR inner2) AND (op2a code2 op2b)
++	     => (t OR (inner1 AND (op2a code2 op2b)))
++	     => (t OR partial)  */
++	  else
++	    {
++	      if (integer_onep (t))
++		return boolean_true_node;
++	      else if (partial)
++		{
++		  /* We already got a simplification for the other
++		     operand to the redistributed OR expression.  The
++		     interesting case is when at least one is false.
++		     Or, if both are the same, we can apply the identity
++		     (x OR x) == x.  */
++		  if (integer_zerop (partial))
++		    return t;
++		  else if (integer_zerop (t))
++		    return partial;
++		  else if (same_bool_result_p (t, partial))
++		    return t;
++		}
++	    }
++	}
++    }
++  return NULL_TREE;
++}
++
++/* Try to simplify the AND of two comparisons defined by
++   (OP1A CODE1 OP1B) and (OP2A CODE2 OP2B), respectively.
++   If this can be done without constructing an intermediate value,
++   return the resulting tree; otherwise NULL_TREE is returned.
++   This function is deliberately asymmetric as it recurses on SSA_DEFs
++   in the first comparison but not the second.  */
++
++static tree
++and_comparisons_1 (enum tree_code code1, tree op1a, tree op1b,
++		   enum tree_code code2, tree op2a, tree op2b)
++{
++  /* First check for ((x CODE1 y) AND (x CODE2 y)).  */
++  if (operand_equal_p (op1a, op2a, 0)
++      && operand_equal_p (op1b, op2b, 0))
++    {
++      tree t = combine_comparisons (UNKNOWN_LOCATION,
++				    TRUTH_ANDIF_EXPR, code1, code2,
++				    boolean_type_node, op1a, op1b);
++      if (t)
++	return t;
++    }
++
++  /* Likewise the swapped case of the above.  */
++  if (operand_equal_p (op1a, op2b, 0)
++      && operand_equal_p (op1b, op2a, 0))
++    {
++      tree t = combine_comparisons (UNKNOWN_LOCATION,
++				    TRUTH_ANDIF_EXPR, code1,
++				    swap_tree_comparison (code2),
++				    boolean_type_node, op1a, op1b);
++      if (t)
++	return t;
++    }
++
++  /* If both comparisons are of the same value against constants, we might
++     be able to merge them.  */
++  if (operand_equal_p (op1a, op2a, 0)
++      && TREE_CODE (op1b) == INTEGER_CST
++      && TREE_CODE (op2b) == INTEGER_CST)
++    {
++      int cmp = tree_int_cst_compare (op1b, op2b);
++
++      /* If we have (op1a == op1b), we should either be able to
++	 return that or FALSE, depending on whether the constant op1b
++	 also satisfies the other comparison against op2b.  */
++      if (code1 == EQ_EXPR)
++	{
++	  bool done = true;
++	  bool val;
++	  switch (code2)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp < 0); break;
++	    case GT_EXPR: val = (cmp > 0); break;
++	    case LE_EXPR: val = (cmp <= 0); break;
++	    case GE_EXPR: val = (cmp >= 0); break;
++	    default: done = false;
++	    }
++	  if (done)
++	    {
++	      if (val)
++		return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	      else
++		return boolean_false_node;
++	    }
++	}
++      /* Likewise if the second comparison is an == comparison.  */
++      else if (code2 == EQ_EXPR)
++	{
++	  bool done = true;
++	  bool val;
++	  switch (code1)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp > 0); break;
++	    case GT_EXPR: val = (cmp < 0); break;
++	    case LE_EXPR: val = (cmp >= 0); break;
++	    case GE_EXPR: val = (cmp <= 0); break;
++	    default: done = false;
++	    }
++	  if (done)
++	    {
++	      if (val)
++		return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	      else
++		return boolean_false_node;
++	    }
++	}
++
++      /* Same business with inequality tests.  */
++      else if (code1 == NE_EXPR)
++	{
++	  bool val;
++	  switch (code2)
++	    {
++	    case EQ_EXPR: val = (cmp != 0); break;
++	    case NE_EXPR: val = (cmp == 0); break;
++	    case LT_EXPR: val = (cmp >= 0); break;
++	    case GT_EXPR: val = (cmp <= 0); break;
++	    case LE_EXPR: val = (cmp > 0); break;
++	    case GE_EXPR: val = (cmp < 0); break;
++	    default:
++	      val = false;
++	    }
++	  if (val)
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	}
++      else if (code2 == NE_EXPR)
++	{
++	  bool val;
++	  switch (code1)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp <= 0); break;
++	    case GT_EXPR: val = (cmp >= 0); break;
++	    case LE_EXPR: val = (cmp < 0); break;
++	    case GE_EXPR: val = (cmp > 0); break;
++	    default:
++	      val = false;
++	    }
++	  if (val)
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	}
++
++      /* Chose the more restrictive of two < or <= comparisons.  */
++      else if ((code1 == LT_EXPR || code1 == LE_EXPR)
++	       && (code2 == LT_EXPR || code2 == LE_EXPR))
++	{
++	  if ((cmp < 0) || (cmp == 0 && code1 == LT_EXPR))
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	  else
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	}
++
++      /* Likewise chose the more restrictive of two > or >= comparisons.  */
++      else if ((code1 == GT_EXPR || code1 == GE_EXPR)
++	       && (code2 == GT_EXPR || code2 == GE_EXPR))
++	{
++	  if ((cmp > 0) || (cmp == 0 && code1 == GT_EXPR))
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	  else
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	}
++
++      /* Check for singleton ranges.  */
++      else if (cmp == 0
++	       && ((code1 == LE_EXPR && code2 == GE_EXPR)
++		   || (code1 == GE_EXPR && code2 == LE_EXPR)))
++	return fold_build2 (EQ_EXPR, boolean_type_node, op1a, op2b);
++
++      /* Check for disjoint ranges. */
++      else if (cmp <= 0
++	       && (code1 == LT_EXPR || code1 == LE_EXPR)
++	       && (code2 == GT_EXPR || code2 == GE_EXPR))
++	return boolean_false_node;
++      else if (cmp >= 0
++	       && (code1 == GT_EXPR || code1 == GE_EXPR)
++	       && (code2 == LT_EXPR || code2 == LE_EXPR))
++	return boolean_false_node;
++    }
++
++  /* Perhaps the first comparison is (NAME != 0) or (NAME == 1) where
++     NAME's definition is a truth value.  See if there are any simplifications
++     that can be done against the NAME's definition.  */
++  if (TREE_CODE (op1a) == SSA_NAME
++      && (code1 == NE_EXPR || code1 == EQ_EXPR)
++      && (integer_zerop (op1b) || integer_onep (op1b)))
++    {
++      bool invert = ((code1 == EQ_EXPR && integer_zerop (op1b))
++		     || (code1 == NE_EXPR && integer_onep (op1b)));
++      gimple stmt = SSA_NAME_DEF_STMT (op1a);
++      switch (gimple_code (stmt))
++	{
++	case GIMPLE_ASSIGN:
++	  /* Try to simplify by copy-propagating the definition.  */
++	  return and_var_with_comparison (op1a, invert, code2, op2a, op2b);
++
++	case GIMPLE_PHI:
++	  /* If every argument to the PHI produces the same result when
++	     ANDed with the second comparison, we win.
++	     Do not do this unless the type is bool since we need a bool
++	     result here anyway.  */
++	  if (TREE_CODE (TREE_TYPE (op1a)) == BOOLEAN_TYPE)
++	    {
++	      tree result = NULL_TREE;
++	      unsigned i;
++	      for (i = 0; i < gimple_phi_num_args (stmt); i++)
++		{
++		  tree arg = gimple_phi_arg_def (stmt, i);
++		  
++		  /* If this PHI has itself as an argument, ignore it.
++		     If all the other args produce the same result,
++		     we're still OK.  */
++		  if (arg == gimple_phi_result (stmt))
++		    continue;
++		  else if (TREE_CODE (arg) == INTEGER_CST)
++		    {
++		      if (invert ? integer_nonzerop (arg) : integer_zerop (arg))
++			{
++			  if (!result)
++			    result = boolean_false_node;
++			  else if (!integer_zerop (result))
++			    return NULL_TREE;
++			}
++		      else if (!result)
++			result = fold_build2 (code2, boolean_type_node,
++					      op2a, op2b);
++		      else if (!same_bool_comparison_p (result,
++							code2, op2a, op2b))
++			return NULL_TREE;
++		    }
++		  else if (TREE_CODE (arg) == SSA_NAME)
++		    {
++		      tree temp = and_var_with_comparison (arg, invert,
++							   code2, op2a, op2b);
++		      if (!temp)
++			return NULL_TREE;
++		      else if (!result)
++			result = temp;
++		      else if (!same_bool_result_p (result, temp))
++			return NULL_TREE;
++		    }
++		  else
++		    return NULL_TREE;
++		}
++	      return result;
++	    }
++
++	default:
++	  break;
++	}
++    }
++  return NULL_TREE;
++}
++
++/* Try to simplify the AND of two comparisons, specified by
++   (OP1A CODE1 OP1B) and (OP2B CODE2 OP2B), respectively.
++   If this can be simplified to a single expression (without requiring
++   introducing more SSA variables to hold intermediate values),
++   return the resulting tree.  Otherwise return NULL_TREE.
++   If the result expression is non-null, it has boolean type.  */
++
++tree
++maybe_fold_and_comparisons (enum tree_code code1, tree op1a, tree op1b,
++			    enum tree_code code2, tree op2a, tree op2b)
++{
++  tree t = and_comparisons_1 (code1, op1a, op1b, code2, op2a, op2b);
++  if (t)
++    return t;
++  else
++    return and_comparisons_1 (code2, op2a, op2b, code1, op1a, op1b);
++}
++
++/* Helper function for or_comparisons_1:  try to simplify the OR of the
++   ssa variable VAR with the comparison specified by (OP2A CODE2 OP2B).
++   If INVERT is true, invert the value of VAR before doing the OR.
++   Return NULL_EXPR if we can't simplify this to a single expression.  */
++
++static tree
++or_var_with_comparison (tree var, bool invert,
++			enum tree_code code2, tree op2a, tree op2b)
++{
++  tree t;
++  gimple stmt = SSA_NAME_DEF_STMT (var);
++
++  /* We can only deal with variables whose definitions are assignments.  */
++  if (!is_gimple_assign (stmt))
++    return NULL_TREE;
++  
++  /* If we have an inverted comparison, apply DeMorgan's law and rewrite
++     !var OR (op2a code2 op2b) => !(var AND !(op2a code2 op2b))
++     Then we only have to consider the simpler non-inverted cases.  */
++  if (invert)
++    t = and_var_with_comparison_1 (stmt, 
++				   invert_tree_comparison (code2, false),
++				   op2a, op2b);
++  else
++    t = or_var_with_comparison_1 (stmt, code2, op2a, op2b);
++  return canonicalize_bool (t, invert);
++}
++
++/* Try to simplify the OR of the ssa variable defined by the assignment
++   STMT with the comparison specified by (OP2A CODE2 OP2B).
++   Return NULL_EXPR if we can't simplify this to a single expression.  */
++
++static tree
++or_var_with_comparison_1 (gimple stmt,
++			  enum tree_code code2, tree op2a, tree op2b)
++{
++  tree var = gimple_assign_lhs (stmt);
++  tree true_test_var = NULL_TREE;
++  tree false_test_var = NULL_TREE;
++  enum tree_code innercode = gimple_assign_rhs_code (stmt);
++
++  /* Check for identities like (var OR (var != 0)) => true .  */
++  if (TREE_CODE (op2a) == SSA_NAME
++      && TREE_CODE (TREE_TYPE (var)) == BOOLEAN_TYPE)
++    {
++      if ((code2 == NE_EXPR && integer_zerop (op2b))
++	  || (code2 == EQ_EXPR && integer_nonzerop (op2b)))
++	{
++	  true_test_var = op2a;
++	  if (var == true_test_var)
++	    return var;
++	}
++      else if ((code2 == EQ_EXPR && integer_zerop (op2b))
++	       || (code2 == NE_EXPR && integer_nonzerop (op2b)))
++	{
++	  false_test_var = op2a;
++	  if (var == false_test_var)
++	    return boolean_true_node;
++	}
++    }
++
++  /* If the definition is a comparison, recurse on it.  */
++  if (TREE_CODE_CLASS (innercode) == tcc_comparison)
++    {
++      tree t = or_comparisons_1 (innercode,
++				 gimple_assign_rhs1 (stmt),
++				 gimple_assign_rhs2 (stmt),
++				 code2,
++				 op2a,
++				 op2b);
++      if (t)
++	return t;
++    }
++  
++  /* If the definition is an AND or OR expression, we may be able to
++     simplify by reassociating.  */
++  if (innercode == TRUTH_AND_EXPR
++      || innercode == TRUTH_OR_EXPR
++      || (TREE_CODE (TREE_TYPE (var)) == BOOLEAN_TYPE
++	  && (innercode == BIT_AND_EXPR || innercode == BIT_IOR_EXPR)))
++    {
++      tree inner1 = gimple_assign_rhs1 (stmt);
++      tree inner2 = gimple_assign_rhs2 (stmt);
++      gimple s;
++      tree t;
++      tree partial = NULL_TREE;
++      bool is_or = (innercode == TRUTH_OR_EXPR || innercode == BIT_IOR_EXPR);
++      
++      /* Check for boolean identities that don't require recursive examination
++	 of inner1/inner2:
++	 inner1 OR (inner1 OR inner2) => inner1 OR inner2 => var
++	 inner1 OR (inner1 AND inner2) => inner1
++	 !inner1 OR (inner1 OR inner2) => true
++	 !inner1 OR (inner1 AND inner2) => !inner1 OR inner2
++      */
++      if (inner1 == true_test_var)
++	return (is_or ? var : inner1);
++      else if (inner2 == true_test_var)
++	return (is_or ? var : inner2);
++      else if (inner1 == false_test_var)
++	return (is_or
++		? boolean_true_node
++		: or_var_with_comparison (inner2, false, code2, op2a, op2b));
++      else if (inner2 == false_test_var)
++	return (is_or
++		? boolean_true_node
++		: or_var_with_comparison (inner1, false, code2, op2a, op2b));
++      
++      /* Next, redistribute/reassociate the OR across the inner tests.
++	 Compute the first partial result, (inner1 OR (op2a code op2b))  */
++      if (TREE_CODE (inner1) == SSA_NAME
++	  && is_gimple_assign (s = SSA_NAME_DEF_STMT (inner1))
++	  && TREE_CODE_CLASS (gimple_assign_rhs_code (s)) == tcc_comparison
++	  && (t = maybe_fold_or_comparisons (gimple_assign_rhs_code (s),
++					     gimple_assign_rhs1 (s),
++					     gimple_assign_rhs2 (s),
++					     code2, op2a, op2b)))
++	{
++	  /* Handle the OR case, where we are reassociating:
++	     (inner1 OR inner2) OR (op2a code2 op2b)
++	     => (t OR inner2)
++	     If the partial result t is a constant, we win.  Otherwise
++	     continue on to try reassociating with the other inner test.  */
++	  if (innercode == TRUTH_OR_EXPR)
++	    {
++	      if (integer_onep (t))
++		return boolean_true_node;
++	      else if (integer_zerop (t))
++		return inner2;
++	    }
++	  
++	  /* Handle the AND case, where we are redistributing:
++	     (inner1 AND inner2) OR (op2a code2 op2b)
++	     => (t AND (inner2 OR (op2a code op2b)))  */
++	  else
++	    {
++	      if (integer_zerop (t))
++		return boolean_false_node;
++	      else
++		/* Save partial result for later.  */
++		partial = t;
++	    }
++	}
++      
++      /* Compute the second partial result, (inner2 OR (op2a code op2b)) */
++      if (TREE_CODE (inner2) == SSA_NAME
++	  && is_gimple_assign (s = SSA_NAME_DEF_STMT (inner2))
++	  && TREE_CODE_CLASS (gimple_assign_rhs_code (s)) == tcc_comparison
++	  && (t = maybe_fold_or_comparisons (gimple_assign_rhs_code (s),
++					     gimple_assign_rhs1 (s),
++					     gimple_assign_rhs2 (s),
++					     code2, op2a, op2b)))
++	{
++	  /* Handle the OR case, where we are reassociating:
++	     (inner1 OR inner2) OR (op2a code2 op2b)
++	     => (inner1 OR t)  */
++	  if (innercode == TRUTH_OR_EXPR)
++	    {
++	      if (integer_zerop (t))
++		return inner1;
++	      else if (integer_onep (t))
++		return boolean_true_node;
++	    }
++	  
++	  /* Handle the AND case, where we are redistributing:
++	     (inner1 AND inner2) OR (op2a code2 op2b)
++	     => (t AND (inner1 OR (op2a code2 op2b)))
++	     => (t AND partial)  */
++	  else 
++	    {
++	      if (integer_zerop (t))
++		return boolean_false_node;
++	      else if (partial)
++		{
++		  /* We already got a simplification for the other
++		     operand to the redistributed AND expression.  The
++		     interesting case is when at least one is true.
++		     Or, if both are the same, we can apply the identity
++		     (x AND x) == true.  */
++		  if (integer_onep (partial))
++		    return t;
++		  else if (integer_onep (t))
++		    return partial;
++		  else if (same_bool_result_p (t, partial))
++		    return boolean_true_node;
++		}
++	    }
++	}
++    }
++  return NULL_TREE;
++}
++
++/* Try to simplify the OR of two comparisons defined by
++   (OP1A CODE1 OP1B) and (OP2A CODE2 OP2B), respectively.
++   If this can be done without constructing an intermediate value,
++   return the resulting tree; otherwise NULL_TREE is returned.
++   This function is deliberately asymmetric as it recurses on SSA_DEFs
++   in the first comparison but not the second.  */
++
++static tree
++or_comparisons_1 (enum tree_code code1, tree op1a, tree op1b,
++		  enum tree_code code2, tree op2a, tree op2b)
++{
++  /* First check for ((x CODE1 y) OR (x CODE2 y)).  */
++  if (operand_equal_p (op1a, op2a, 0)
++      && operand_equal_p (op1b, op2b, 0))
++    {
++      tree t = combine_comparisons (UNKNOWN_LOCATION,
++				    TRUTH_ORIF_EXPR, code1, code2,
++				    boolean_type_node, op1a, op1b);
++      if (t)
++	return t;
++    }
++
++  /* Likewise the swapped case of the above.  */
++  if (operand_equal_p (op1a, op2b, 0)
++      && operand_equal_p (op1b, op2a, 0))
++    {
++      tree t = combine_comparisons (UNKNOWN_LOCATION,
++				    TRUTH_ORIF_EXPR, code1,
++				    swap_tree_comparison (code2),
++				    boolean_type_node, op1a, op1b);
++      if (t)
++	return t;
++    }
++
++  /* If both comparisons are of the same value against constants, we might
++     be able to merge them.  */
++  if (operand_equal_p (op1a, op2a, 0)
++      && TREE_CODE (op1b) == INTEGER_CST
++      && TREE_CODE (op2b) == INTEGER_CST)
++    {
++      int cmp = tree_int_cst_compare (op1b, op2b);
++
++      /* If we have (op1a != op1b), we should either be able to
++	 return that or TRUE, depending on whether the constant op1b
++	 also satisfies the other comparison against op2b.  */
++      if (code1 == NE_EXPR)
++	{
++	  bool done = true;
++	  bool val;
++	  switch (code2)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp < 0); break;
++	    case GT_EXPR: val = (cmp > 0); break;
++	    case LE_EXPR: val = (cmp <= 0); break;
++	    case GE_EXPR: val = (cmp >= 0); break;
++	    default: done = false;
++	    }
++	  if (done)
++	    {
++	      if (val)
++		return boolean_true_node;
++	      else
++		return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	    }
++	}
++      /* Likewise if the second comparison is a != comparison.  */
++      else if (code2 == NE_EXPR)
++	{
++	  bool done = true;
++	  bool val;
++	  switch (code1)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp > 0); break;
++	    case GT_EXPR: val = (cmp < 0); break;
++	    case LE_EXPR: val = (cmp >= 0); break;
++	    case GE_EXPR: val = (cmp <= 0); break;
++	    default: done = false;
++	    }
++	  if (done)
++	    {
++	      if (val)
++		return boolean_true_node;
++	      else
++		return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	    }
++	}
++
++      /* See if an equality test is redundant with the other comparison.  */
++      else if (code1 == EQ_EXPR)
++	{
++	  bool val;
++	  switch (code2)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp < 0); break;
++	    case GT_EXPR: val = (cmp > 0); break;
++	    case LE_EXPR: val = (cmp <= 0); break;
++	    case GE_EXPR: val = (cmp >= 0); break;
++	    default:
++	      val = false;
++	    }
++	  if (val)
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	}
++      else if (code2 == EQ_EXPR)
++	{
++	  bool val;
++	  switch (code1)
++	    {
++	    case EQ_EXPR: val = (cmp == 0); break;
++	    case NE_EXPR: val = (cmp != 0); break;
++	    case LT_EXPR: val = (cmp > 0); break;
++	    case GT_EXPR: val = (cmp < 0); break;
++	    case LE_EXPR: val = (cmp >= 0); break;
++	    case GE_EXPR: val = (cmp <= 0); break;
++	    default:
++	      val = false;
++	    }
++	  if (val)
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	}
++
++      /* Chose the less restrictive of two < or <= comparisons.  */
++      else if ((code1 == LT_EXPR || code1 == LE_EXPR)
++	       && (code2 == LT_EXPR || code2 == LE_EXPR))
++	{
++	  if ((cmp < 0) || (cmp == 0 && code1 == LT_EXPR))
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	  else
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	}
++
++      /* Likewise chose the less restrictive of two > or >= comparisons.  */
++      else if ((code1 == GT_EXPR || code1 == GE_EXPR)
++	       && (code2 == GT_EXPR || code2 == GE_EXPR))
++	{
++	  if ((cmp > 0) || (cmp == 0 && code1 == GT_EXPR))
++	    return fold_build2 (code2, boolean_type_node, op2a, op2b);
++	  else
++	    return fold_build2 (code1, boolean_type_node, op1a, op1b);
++	}
++
++      /* Check for singleton ranges.  */
++      else if (cmp == 0
++	       && ((code1 == LT_EXPR && code2 == GT_EXPR)
++		   || (code1 == GT_EXPR && code2 == LT_EXPR)))
++	return fold_build2 (NE_EXPR, boolean_type_node, op1a, op2b);
++
++      /* Check for less/greater pairs that don't restrict the range at all.  */
++      else if (cmp >= 0
++	       && (code1 == LT_EXPR || code1 == LE_EXPR)
++	       && (code2 == GT_EXPR || code2 == GE_EXPR))
++	return boolean_true_node;
++      else if (cmp <= 0
++	       && (code1 == GT_EXPR || code1 == GE_EXPR)
++	       && (code2 == LT_EXPR || code2 == LE_EXPR))
++	return boolean_true_node;
++    }
++
++  /* Perhaps the first comparison is (NAME != 0) or (NAME == 1) where
++     NAME's definition is a truth value.  See if there are any simplifications
++     that can be done against the NAME's definition.  */
++  if (TREE_CODE (op1a) == SSA_NAME
++      && (code1 == NE_EXPR || code1 == EQ_EXPR)
++      && (integer_zerop (op1b) || integer_onep (op1b)))
++    {
++      bool invert = ((code1 == EQ_EXPR && integer_zerop (op1b))
++		     || (code1 == NE_EXPR && integer_onep (op1b)));
++      gimple stmt = SSA_NAME_DEF_STMT (op1a);
++      switch (gimple_code (stmt))
++	{
++	case GIMPLE_ASSIGN:
++	  /* Try to simplify by copy-propagating the definition.  */
++	  return or_var_with_comparison (op1a, invert, code2, op2a, op2b);
++
++	case GIMPLE_PHI:
++	  /* If every argument to the PHI produces the same result when
++	     ORed with the second comparison, we win.
++	     Do not do this unless the type is bool since we need a bool
++	     result here anyway.  */
++	  if (TREE_CODE (TREE_TYPE (op1a)) == BOOLEAN_TYPE)
++	    {
++	      tree result = NULL_TREE;
++	      unsigned i;
++	      for (i = 0; i < gimple_phi_num_args (stmt); i++)
++		{
++		  tree arg = gimple_phi_arg_def (stmt, i);
++		  
++		  /* If this PHI has itself as an argument, ignore it.
++		     If all the other args produce the same result,
++		     we're still OK.  */
++		  if (arg == gimple_phi_result (stmt))
++		    continue;
++		  else if (TREE_CODE (arg) == INTEGER_CST)
++		    {
++		      if (invert ? integer_zerop (arg) : integer_nonzerop (arg))
++			{
++			  if (!result)
++			    result = boolean_true_node;
++			  else if (!integer_onep (result))
++			    return NULL_TREE;
++			}
++		      else if (!result)
++			result = fold_build2 (code2, boolean_type_node,
++					      op2a, op2b);
++		      else if (!same_bool_comparison_p (result,
++							code2, op2a, op2b))
++			return NULL_TREE;
++		    }
++		  else if (TREE_CODE (arg) == SSA_NAME)
++		    {
++		      tree temp = or_var_with_comparison (arg, invert,
++							  code2, op2a, op2b);
++		      if (!temp)
++			return NULL_TREE;
++		      else if (!result)
++			result = temp;
++		      else if (!same_bool_result_p (result, temp))
++			return NULL_TREE;
++		    }
++		  else
++		    return NULL_TREE;
++		}
++	      return result;
++	    }
++
++	default:
++	  break;
++	}
++    }
++  return NULL_TREE;
++}
++
++/* Try to simplify the OR of two comparisons, specified by
++   (OP1A CODE1 OP1B) and (OP2B CODE2 OP2B), respectively.
++   If this can be simplified to a single expression (without requiring
++   introducing more SSA variables to hold intermediate values),
++   return the resulting tree.  Otherwise return NULL_TREE.
++   If the result expression is non-null, it has boolean type.  */
++
++tree
++maybe_fold_or_comparisons (enum tree_code code1, tree op1a, tree op1b,
++			   enum tree_code code2, tree op2a, tree op2b)
++{
++  tree t = or_comparisons_1 (code1, op1a, op1b, code2, op2a, op2b);
++  if (t)
++    return t;
++  else
++    return or_comparisons_1 (code2, op2a, op2b, code1, op1a, op1b);
++}
++
+ /* Try to optimize out __builtin_stack_restore.  Optimize it out
+    if there is another __builtin_stack_restore in the same basic
+    block and no calls or ASM_EXPRs are in between, or if this block's
+
+=== modified file 'gcc/tree-ssa-ifcombine.c'
+--- old/gcc/tree-ssa-ifcombine.c	2009-11-25 10:55:54 +0000
++++ new/gcc/tree-ssa-ifcombine.c	2010-07-30 13:21:51 +0000
+@@ -366,21 +366,16 @@
+ 
+   /* See if we have two comparisons that we can merge into one.  */
+   else if (TREE_CODE_CLASS (gimple_cond_code (inner_cond)) == tcc_comparison
+-	   && TREE_CODE_CLASS (gimple_cond_code (outer_cond)) == tcc_comparison
+-	   && operand_equal_p (gimple_cond_lhs (inner_cond),
+-			       gimple_cond_lhs (outer_cond), 0)
+-	   && operand_equal_p (gimple_cond_rhs (inner_cond),
+-			       gimple_cond_rhs (outer_cond), 0))
++	   && TREE_CODE_CLASS (gimple_cond_code (outer_cond)) == tcc_comparison)
+     {
+-      enum tree_code code1 = gimple_cond_code (inner_cond);
+-      enum tree_code code2 = gimple_cond_code (outer_cond);
+       tree t;
+ 
+-      if (!(t = combine_comparisons (UNKNOWN_LOCATION,
+-	      			     TRUTH_ANDIF_EXPR, code1, code2,
+-				     boolean_type_node,
+-				     gimple_cond_lhs (outer_cond),
+-				     gimple_cond_rhs (outer_cond))))
++      if (!(t = maybe_fold_and_comparisons (gimple_cond_code (inner_cond),
++					    gimple_cond_lhs (inner_cond),
++					    gimple_cond_rhs (inner_cond),
++					    gimple_cond_code (outer_cond),
++					    gimple_cond_lhs (outer_cond),
++					    gimple_cond_rhs (outer_cond))))
+ 	return false;
+       t = canonicalize_cond_expr_cond (t);
+       if (!t)
+@@ -518,22 +513,17 @@
+   /* See if we have two comparisons that we can merge into one.
+      This happens for C++ operator overloading where for example
+      GE_EXPR is implemented as GT_EXPR || EQ_EXPR.  */
+-  else if (TREE_CODE_CLASS (gimple_cond_code (inner_cond)) == tcc_comparison
+-	   && TREE_CODE_CLASS (gimple_cond_code (outer_cond)) == tcc_comparison
+-	   && operand_equal_p (gimple_cond_lhs (inner_cond),
+-			       gimple_cond_lhs (outer_cond), 0)
+-	   && operand_equal_p (gimple_cond_rhs (inner_cond),
+-			       gimple_cond_rhs (outer_cond), 0))
++    else if (TREE_CODE_CLASS (gimple_cond_code (inner_cond)) == tcc_comparison
++	   && TREE_CODE_CLASS (gimple_cond_code (outer_cond)) == tcc_comparison)
+     {
+-      enum tree_code code1 = gimple_cond_code (inner_cond);
+-      enum tree_code code2 = gimple_cond_code (outer_cond);
+       tree t;
+ 
+-      if (!(t = combine_comparisons (UNKNOWN_LOCATION,
+-	      			     TRUTH_ORIF_EXPR, code1, code2,
+-				     boolean_type_node,
+-				     gimple_cond_lhs (outer_cond),
+-				     gimple_cond_rhs (outer_cond))))
++      if (!(t = maybe_fold_or_comparisons (gimple_cond_code (inner_cond),
++					   gimple_cond_lhs (inner_cond),
++					   gimple_cond_rhs (inner_cond),
++					   gimple_cond_code (outer_cond),
++					   gimple_cond_lhs (outer_cond),
++					   gimple_cond_rhs (outer_cond))))
+ 	return false;
+       t = canonicalize_cond_expr_cond (t);
+       if (!t)
+
+=== modified file 'gcc/tree-ssa-reassoc.c'
+--- old/gcc/tree-ssa-reassoc.c	2010-01-13 15:04:38 +0000
++++ new/gcc/tree-ssa-reassoc.c	2010-07-30 13:21:51 +0000
+@@ -1159,6 +1159,117 @@
+   return changed;
+ }
+ 
++/* If OPCODE is BIT_IOR_EXPR or BIT_AND_EXPR and CURR is a comparison
++   expression, examine the other OPS to see if any of them are comparisons
++   of the same values, which we may be able to combine or eliminate.
++   For example, we can rewrite (a < b) | (a == b) as (a <= b).  */
++
++static bool
++eliminate_redundant_comparison (enum tree_code opcode,
++				VEC (operand_entry_t, heap) **ops,
++				unsigned int currindex,
++				operand_entry_t curr)
++{
++  tree op1, op2;
++  enum tree_code lcode, rcode;
++  gimple def1, def2;
++  int i;
++  operand_entry_t oe;
++
++  if (opcode != BIT_IOR_EXPR && opcode != BIT_AND_EXPR)
++    return false;
++
++  /* Check that CURR is a comparison.  */
++  if (TREE_CODE (curr->op) != SSA_NAME)
++    return false;
++  def1 = SSA_NAME_DEF_STMT (curr->op);
++  if (!is_gimple_assign (def1))
++    return false;
++  lcode = gimple_assign_rhs_code (def1);
++  if (TREE_CODE_CLASS (lcode) != tcc_comparison)
++    return false;
++  op1 = gimple_assign_rhs1 (def1);
++  op2 = gimple_assign_rhs2 (def1);
++
++  /* Now look for a similar comparison in the remaining OPS.  */
++  for (i = currindex + 1;
++       VEC_iterate (operand_entry_t, *ops, i, oe);
++       i++)
++    {
++      tree t;
++
++      if (TREE_CODE (oe->op) != SSA_NAME)
++	continue;
++      def2 = SSA_NAME_DEF_STMT (oe->op);
++      if (!is_gimple_assign (def2))
++	continue;
++      rcode = gimple_assign_rhs_code (def2);
++      if (TREE_CODE_CLASS (rcode) != tcc_comparison)
++	continue;
++
++      /* If we got here, we have a match.  See if we can combine the
++	 two comparisons.  */
++      if (opcode == BIT_IOR_EXPR)
++	t = maybe_fold_or_comparisons (lcode, op1, op2,
++				       rcode, gimple_assign_rhs1 (def2),
++				       gimple_assign_rhs2 (def2));
++      else
++	t = maybe_fold_and_comparisons (lcode, op1, op2,
++					rcode, gimple_assign_rhs1 (def2),
++					gimple_assign_rhs2 (def2));
++      if (!t)
++	continue;
++
++      /* maybe_fold_and_comparisons and maybe_fold_or_comparisons
++	 always give us a boolean_type_node value back.  If the original
++	 BIT_AND_EXPR or BIT_IOR_EXPR was of a wider integer type,
++	 we need to convert.  */
++      if (!useless_type_conversion_p (TREE_TYPE (curr->op), TREE_TYPE (t)))
++	t = fold_convert (TREE_TYPE (curr->op), t);
++
++      if (dump_file && (dump_flags & TDF_DETAILS))
++	{
++	  fprintf (dump_file, "Equivalence: ");
++	  print_generic_expr (dump_file, curr->op, 0);
++	  fprintf (dump_file, " %s ", op_symbol_code (opcode));
++	  print_generic_expr (dump_file, oe->op, 0);
++	  fprintf (dump_file, " -> ");
++	  print_generic_expr (dump_file, t, 0);
++	  fprintf (dump_file, "\n");
++	}
++
++      /* Now we can delete oe, as it has been subsumed by the new combined
++         expression t.  */
++      VEC_ordered_remove (operand_entry_t, *ops, i);
++      reassociate_stats.ops_eliminated ++;
++
++      /* If t is the same as curr->op, we're done.  Otherwise we must
++	 replace curr->op with t.  Special case is if we got a constant
++	 back, in which case we add it to the end instead of in place of
++	 the current entry.  */
++      if (TREE_CODE (t) == INTEGER_CST)
++	{
++	  VEC_ordered_remove (operand_entry_t, *ops, currindex);
++	  add_to_ops_vec (ops, t);
++	}
++      else if (!operand_equal_p (t, curr->op, 0))
++	{
++	  tree tmpvar;
++	  gimple sum;
++	  enum tree_code subcode;
++	  tree newop1;
++	  tree newop2;
++	  tmpvar = create_tmp_var (TREE_TYPE (t), NULL);
++	  add_referenced_var (tmpvar);
++	  extract_ops_from_tree (t, &subcode, &newop1, &newop2);
++	  sum = build_and_add_sum (tmpvar, newop1, newop2, subcode);
++	  curr->op = gimple_get_lhs (sum);
++	}
++      return true;
++    }
++
++  return false;
++}
+ 
+ /* Perform various identities and other optimizations on the list of
+    operand entries, stored in OPS.  The tree code for the binary
+@@ -1220,7 +1331,8 @@
+       if (eliminate_not_pairs (opcode, ops, i, oe))
+ 	return;
+       if (eliminate_duplicate_pair (opcode, ops, &done, i, oe, oelast)
+-	  || (!done && eliminate_plus_minus_pair (opcode, ops, i, oe)))
++	  || (!done && eliminate_plus_minus_pair (opcode, ops, i, oe))
++	  || (!done && eliminate_redundant_comparison (opcode, ops, i, oe)))
+ 	{
+ 	  if (done)
+ 	    return;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99307.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99307.patch
new file mode 100644
index 0000000000..9c936d4fad
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99307.patch
@@ -0,0 +1,138 @@
+2010-07-12  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 
+	2009-10-06  Paul Brook  <paul@codesourcery.com>
+	Issue #3869
+	gcc/
+	* target.h (gcc_target): Add warn_func_result.
+	* target-def.h (TARGET_WARN_FUNC_RESULT): Define and use.
+	* tree-cfg.h (execute_warn_function_return): Use
+	targetm.warn_func_result.
+	* config/arm/arm.c (TARGET_WARN_FUNC_RESULT): Define.
+	(arm_warn_func_result): New function.
+
+	gcc/testuite/
+	 * gcc.target/arm/naked-3.c: New test.
+
+ 2010-07-10  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-07-29 16:58:56 +0000
++++ new/gcc/config/arm/arm.c	2010-07-30 13:58:02 +0000
+@@ -214,6 +214,7 @@
+ static int arm_issue_rate (void);
+ static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED;
+ static bool arm_allocate_stack_slots_for_args (void);
++static bool arm_warn_func_result (void);
+ static const char *arm_invalid_parameter_type (const_tree t);
+ static const char *arm_invalid_return_type (const_tree t);
+ static tree arm_promoted_type (const_tree t);
+@@ -378,6 +379,9 @@
+ #undef TARGET_TRAMPOLINE_ADJUST_ADDRESS
+ #define TARGET_TRAMPOLINE_ADJUST_ADDRESS arm_trampoline_adjust_address
+ 
++#undef TARGET_WARN_FUNC_RESULT
++#define TARGET_WARN_FUNC_RESULT arm_warn_func_result
++
+ #undef TARGET_DEFAULT_SHORT_ENUMS
+ #define TARGET_DEFAULT_SHORT_ENUMS arm_default_short_enums
+ 
+@@ -2008,6 +2012,14 @@
+   return !IS_NAKED (arm_current_func_type ());
+ }
+ 
++static bool
++arm_warn_func_result (void)
++{
++  /* Naked functions are implemented entirely in assembly, including the
++     return sequence, so suppress warnings about this.  */
++  return !IS_NAKED (arm_current_func_type ());
++}
++
+ 
+ /* Output assembler code for a block containing the constant parts
+    of a trampoline, leaving space for the variable parts.
+
+=== modified file 'gcc/target-def.h'
+--- old/gcc/target-def.h	2010-03-24 20:44:48 +0000
++++ new/gcc/target-def.h	2010-07-30 13:58:02 +0000
+@@ -212,6 +212,10 @@
+ #define TARGET_EXTRA_LIVE_ON_ENTRY hook_void_bitmap
+ #endif
+ 
++#ifndef TARGET_WARN_FUNC_RESULT
++#define TARGET_WARN_FUNC_RESULT hook_bool_void_true
++#endif
++
+ #ifndef TARGET_ASM_FILE_START_APP_OFF
+ #define TARGET_ASM_FILE_START_APP_OFF false
+ #endif
+@@ -1020,6 +1024,7 @@
+   TARGET_EMUTLS,				\
+   TARGET_OPTION_HOOKS,				\
+   TARGET_EXTRA_LIVE_ON_ENTRY,			\
++  TARGET_WARN_FUNC_RESULT,			\
+   TARGET_UNWIND_TABLES_DEFAULT,			\
+   TARGET_HAVE_NAMED_SECTIONS,			\
+   TARGET_HAVE_SWITCHABLE_BSS_SECTIONS,		\
+
+=== modified file 'gcc/target.h'
+--- old/gcc/target.h	2010-03-27 10:27:39 +0000
++++ new/gcc/target.h	2010-07-30 13:58:02 +0000
+@@ -1171,6 +1171,10 @@
+      bits in the bitmap passed in. */
+   void (*live_on_entry) (bitmap);
+ 
++  /* Return false if warnings about missing return statements or suspect
++     noreturn attributes should be suppressed for the current function.  */
++  bool (*warn_func_result) (void);
++
+   /* True if unwinding tables should be generated by default.  */
+   bool unwind_tables_default;
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/naked-3.c'
+--- old/gcc/testsuite/gcc.target/arm/naked-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/naked-3.c	2010-07-30 13:58:02 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -Wall" } */
++/* Check that we do not get warnings about missing return statements
++   or bogus looking noreturn functions.  */
++int __attribute__((naked))
++foo(void)
++{
++  __asm__ volatile ("mov r0, #1\r\nbx lr\n");
++}
++
++int __attribute__((naked,noreturn))
++bar(void)
++{
++  __asm__ volatile ("frob r0\n");
++}
+
+=== modified file 'gcc/tree-cfg.c'
+--- old/gcc/tree-cfg.c	2010-03-16 12:31:38 +0000
++++ new/gcc/tree-cfg.c	2010-07-30 13:58:02 +0000
+@@ -47,6 +47,7 @@
+ #include "value-prof.h"
+ #include "pointer-set.h"
+ #include "tree-inline.h"
++#include "target.h"
+ 
+ /* This file contains functions for building the Control Flow Graph (CFG)
+    for a function tree.  */
+@@ -7092,6 +7093,9 @@
+   edge e;
+   edge_iterator ei;
+ 
++  if (!targetm.warn_func_result())
++    return 0;
++
+   /* If we have a path to EXIT, then we do return.  */
+   if (TREE_THIS_VOLATILE (cfun->decl)
+       && EDGE_COUNT (EXIT_BLOCK_PTR->preds) > 0)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99308.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99308.patch
new file mode 100644
index 0000000000..bf35a2ed4e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99308.patch
@@ -0,0 +1,112 @@
+2010-07-15  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline (originally from Sourcery G++ 4.4):
+
+	gcc/cp/
+	2010-04-07  Jie Zhang  <jie@codesourcery.com>
+
+	PR c++/42556
+	* typeck2.c (split_nonconstant_init_1): Drop empty CONSTRUCTOR
+	when all of its elements are non-constant and have been split out.
+
+	gcc/testsuite/
+	2010-04-07  Jie Zhang  <jie@codesourcery.com>
+
+	PR c++/42556
+	* g++.dg/init/pr42556.C: New test.
+
+ 2010-07-12  Yao Qi  <yao@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'gcc/cp/typeck2.c'
+--- old/gcc/cp/typeck2.c	2010-02-23 18:32:20 +0000
++++ new/gcc/cp/typeck2.c	2010-07-30 14:05:57 +0000
+@@ -549,13 +549,15 @@
+    expression to which INIT should be assigned.  INIT is a CONSTRUCTOR.  */
+ 
+ static void
+-split_nonconstant_init_1 (tree dest, tree init)
++split_nonconstant_init_1 (tree dest, tree *initp)
+ {
+   unsigned HOST_WIDE_INT idx;
++  tree init = *initp;
+   tree field_index, value;
+   tree type = TREE_TYPE (dest);
+   tree inner_type = NULL;
+   bool array_type_p = false;
++  HOST_WIDE_INT num_type_elements, num_initialized_elements;
+ 
+   switch (TREE_CODE (type))
+     {
+@@ -567,6 +569,7 @@
+     case RECORD_TYPE:
+     case UNION_TYPE:
+     case QUAL_UNION_TYPE:
++      num_initialized_elements = 0;
+       FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init), idx,
+ 				field_index, value)
+ 	{
+@@ -589,12 +592,13 @@
+ 		sub = build3 (COMPONENT_REF, inner_type, dest, field_index,
+ 			      NULL_TREE);
+ 
+-	      split_nonconstant_init_1 (sub, value);
++	      split_nonconstant_init_1 (sub, &value);
+ 	    }
+ 	  else if (!initializer_constant_valid_p (value, inner_type))
+ 	    {
+ 	      tree code;
+ 	      tree sub;
++	      HOST_WIDE_INT inner_elements;
+ 
+ 	      /* FIXME: Ordered removal is O(1) so the whole function is
+ 		 worst-case quadratic. This could be fixed using an aside
+@@ -617,9 +621,22 @@
+ 	      code = build2 (INIT_EXPR, inner_type, sub, value);
+ 	      code = build_stmt (input_location, EXPR_STMT, code);
+ 	      add_stmt (code);
++
++	      inner_elements = count_type_elements (inner_type, true);
++	      if (inner_elements < 0)
++		num_initialized_elements = -1;
++	      else if (num_initialized_elements >= 0)
++		num_initialized_elements += inner_elements;
+ 	      continue;
+ 	    }
+ 	}
++
++      num_type_elements = count_type_elements (type, true);
++      /* If all elements of the initializer are non-constant and
++	 have been split out, we don't need the empty CONSTRUCTOR.  */
++      if (num_type_elements > 0
++	  && num_type_elements == num_initialized_elements)
++	*initp = NULL;
+       break;
+ 
+     case VECTOR_TYPE:
+@@ -655,7 +672,7 @@
+   if (TREE_CODE (init) == CONSTRUCTOR)
+     {
+       code = push_stmt_list ();
+-      split_nonconstant_init_1 (dest, init);
++      split_nonconstant_init_1 (dest, &init);
+       code = pop_stmt_list (code);
+       DECL_INITIAL (dest) = init;
+       TREE_READONLY (dest) = 0;
+
+=== added file 'gcc/testsuite/g++.dg/init/pr42556.C'
+--- old/gcc/testsuite/g++.dg/init/pr42556.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/init/pr42556.C	2010-07-30 14:05:57 +0000
+@@ -0,0 +1,10 @@
++// { dg-do compile }
++// { dg-options "-fdump-tree-gimple" }
++
++void foo (int a, int b, int c, int d)
++{
++  int v[4] = {a, b, c, d};
++}
++
++// { dg-final { scan-tree-dump-not "v = {}"  "gimple" } }
++// { dg-final { cleanup-tree-dump "gimple" } }
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99310.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99310.patch
new file mode 100644
index 0000000000..da95fba790
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99310.patch
@@ -0,0 +1,36 @@
+	Backport from mainline (originally from Sourcery G++ 4.4):
+
+	gcc/
+	2010-07-07  Jie Zhang  <jie@codesourcery.com>
+	* genautomata.c (output_automata_list_min_issue_delay_code):
+	Correctly decompress min_issue_delay.
+
+2010-07-15  Jie Zhang  <jie@codesourcery.com>
+
+ 	Issue #8980
+ 
+ 	Backport from mainline (originally from Sourcery G++ 4.4):
+
+=== modified file 'gcc/genautomata.c'
+--- old/gcc/genautomata.c	2009-11-25 10:55:54 +0000
++++ new/gcc/genautomata.c	2010-07-30 14:21:58 +0000
+@@ -7865,12 +7865,15 @@
+ 	{
+ 	  fprintf (output_file, ") / %d];\n",
+ 		   automaton->min_issue_delay_table_compression_factor);
+-	  fprintf (output_file, "      %s = (%s >> (8 - (",
++	  fprintf (output_file, "      %s = (%s >> (8 - ((",
+ 		   TEMPORARY_VARIABLE_NAME, TEMPORARY_VARIABLE_NAME);
+ 	  output_translate_vect_name (output_file, automaton);
++	  fprintf (output_file, " [%s] + ", INTERNAL_INSN_CODE_NAME);
++	  fprintf (output_file, "%s->", CHIP_PARAMETER_NAME);
++	  output_chip_member_name (output_file, automaton);
++	  fprintf (output_file, " * %d)", automaton->insn_equiv_classes_num);
+ 	  fprintf
+-	    (output_file, " [%s] %% %d + 1) * %d)) & %d;\n",
+-	     INTERNAL_INSN_CODE_NAME,
++	    (output_file, " %% %d + 1) * %d)) & %d;\n",
+ 	     automaton->min_issue_delay_table_compression_factor,
+ 	     8 / automaton->min_issue_delay_table_compression_factor,
+ 	     (1 << (8 / automaton->min_issue_delay_table_compression_factor))
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99312.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99312.patch
new file mode 100644
index 0000000000..9f0c98e9c9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99312.patch
@@ -0,0 +1,714 @@
+2010-07-15  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-06-09  Sandra Loosemore  <sandra@codesourcery.com>
+
+	gcc/	
+	* tree-ssa-loop-ivopts.c (adjust_setup_cost): New function.
+	(get_computation_cost_at): Use it.
+	(determine_use_iv_cost_condition): Likewise.
+	(determine_iv_cost): Likewise.
+
+	2010-07-05  Sandra Loosemore  <sandra@codesourcery.com>
+
+	PR middle-end/42505
+
+	gcc/
+	* tree-ssa-loop-ivopts.c (determine_set_costs): Delete obsolete
+	comments about cost model.
+	(try_add_cand_for):  Add second strategy for choosing initial set
+	based on original IVs, controlled by ORIGINALP argument.
+	(get_initial_solution): Add ORIGINALP argument.
+	(find_optimal_iv_set_1): New function, split from find_optimal_iv_set.
+	(find_optimal_iv_set): Try two different strategies for choosing
+	the IV set, and return the one with lower cost.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42505.c: New test case.
+
+	2010-07-10  Sandra Loosemore  <sandra@codesourcery.com>
+
+	PR middle-end/42505
+
+	gcc/
+	* tree-inline.c (estimate_num_insns): Refactor builtin complexity
+	lookup code into....
+	* builtins.c (is_simple_builtin, is_inexpensive_builtin): ...these
+	new functions.
+	* tree.h (is_simple_builtin, is_inexpensive_builtin): Declare.
+	* cfgloopanal.c (target_clobbered_regs): Define.
+	(init_set_costs): Initialize target_clobbered_regs.
+	(estimate_reg_pressure_cost): Add call_p argument.  When true,
+	adjust the number of available registers to exclude the
+	call-clobbered registers.
+	* cfgloop.h (target_clobbered_regs): Declare.
+	(estimate_reg_pressure_cost): Adjust declaration.
+	* tree-ssa-loop-ivopts.c (struct ivopts_data): Add body_includes_call.
+	(ivopts_global_cost_for_size): Pass it to estimate_reg_pressure_cost.
+	(determine_set_costs): Dump target_clobbered_regs.
+	(loop_body_includes_call): New function.
+	(tree_ssa_iv_optimize_loop): Use it to initialize new field.
+	* loop-invariant.c (gain_for_invariant): Adjust arguments to pass
+	call_p flag through.
+	(best_gain_for_invariant): Likewise.
+	(find_invariants_to_move): Likewise.
+	(move_single_loop_invariants): Likewise, using already-computed
+	has_call field.
+
+ 2010-07-15  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Issue #8497, #8893
+
+=== modified file 'gcc/builtins.c'
+--- old/gcc/builtins.c	2010-04-13 12:47:11 +0000
++++ new/gcc/builtins.c	2010-08-02 13:51:23 +0000
+@@ -13624,3 +13624,123 @@
+       break;
+     }
+ }
++
++/* Return true if DECL is a builtin that expands to a constant or similarly
++   simple code.  */
++bool
++is_simple_builtin (tree decl)
++{
++  if (decl && DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL)
++    switch (DECL_FUNCTION_CODE (decl))
++      {
++	/* Builtins that expand to constants.  */
++      case BUILT_IN_CONSTANT_P:
++      case BUILT_IN_EXPECT:
++      case BUILT_IN_OBJECT_SIZE:
++      case BUILT_IN_UNREACHABLE:
++	/* Simple register moves or loads from stack.  */
++      case BUILT_IN_RETURN_ADDRESS:
++      case BUILT_IN_EXTRACT_RETURN_ADDR:
++      case BUILT_IN_FROB_RETURN_ADDR:
++      case BUILT_IN_RETURN:
++      case BUILT_IN_AGGREGATE_INCOMING_ADDRESS:
++      case BUILT_IN_FRAME_ADDRESS:
++      case BUILT_IN_VA_END:
++      case BUILT_IN_STACK_SAVE:
++      case BUILT_IN_STACK_RESTORE:
++	/* Exception state returns or moves registers around.  */
++      case BUILT_IN_EH_FILTER:
++      case BUILT_IN_EH_POINTER:
++      case BUILT_IN_EH_COPY_VALUES:
++	return true;
++
++      default:
++	return false;
++      }
++
++  return false;
++}
++
++/* Return true if DECL is a builtin that is not expensive, i.e., they are
++   most probably expanded inline into reasonably simple code.  This is a
++   superset of is_simple_builtin.  */
++bool
++is_inexpensive_builtin (tree decl)
++{
++  if (!decl)
++    return false;
++  else if (DECL_BUILT_IN_CLASS (decl) == BUILT_IN_MD)
++    return true;
++  else if (DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL)
++    switch (DECL_FUNCTION_CODE (decl))
++      {
++      case BUILT_IN_ABS:
++      case BUILT_IN_ALLOCA:
++      case BUILT_IN_BSWAP32:
++      case BUILT_IN_BSWAP64:
++      case BUILT_IN_CLZ:
++      case BUILT_IN_CLZIMAX:
++      case BUILT_IN_CLZL:
++      case BUILT_IN_CLZLL:
++      case BUILT_IN_CTZ:
++      case BUILT_IN_CTZIMAX:
++      case BUILT_IN_CTZL:
++      case BUILT_IN_CTZLL:
++      case BUILT_IN_FFS:
++      case BUILT_IN_FFSIMAX:
++      case BUILT_IN_FFSL:
++      case BUILT_IN_FFSLL:
++      case BUILT_IN_IMAXABS:
++      case BUILT_IN_FINITE:
++      case BUILT_IN_FINITEF:
++      case BUILT_IN_FINITEL:
++      case BUILT_IN_FINITED32:
++      case BUILT_IN_FINITED64:
++      case BUILT_IN_FINITED128:
++      case BUILT_IN_FPCLASSIFY:
++      case BUILT_IN_ISFINITE:
++      case BUILT_IN_ISINF_SIGN:
++      case BUILT_IN_ISINF:
++      case BUILT_IN_ISINFF:
++      case BUILT_IN_ISINFL:
++      case BUILT_IN_ISINFD32:
++      case BUILT_IN_ISINFD64:
++      case BUILT_IN_ISINFD128:
++      case BUILT_IN_ISNAN:
++      case BUILT_IN_ISNANF:
++      case BUILT_IN_ISNANL:
++      case BUILT_IN_ISNAND32:
++      case BUILT_IN_ISNAND64:
++      case BUILT_IN_ISNAND128:
++      case BUILT_IN_ISNORMAL:
++      case BUILT_IN_ISGREATER:
++      case BUILT_IN_ISGREATEREQUAL:
++      case BUILT_IN_ISLESS:
++      case BUILT_IN_ISLESSEQUAL:
++      case BUILT_IN_ISLESSGREATER:
++      case BUILT_IN_ISUNORDERED:
++      case BUILT_IN_VA_ARG_PACK:
++      case BUILT_IN_VA_ARG_PACK_LEN:
++      case BUILT_IN_VA_COPY:
++      case BUILT_IN_TRAP:
++      case BUILT_IN_SAVEREGS:
++      case BUILT_IN_POPCOUNTL:
++      case BUILT_IN_POPCOUNTLL:
++      case BUILT_IN_POPCOUNTIMAX:
++      case BUILT_IN_POPCOUNT:
++      case BUILT_IN_PARITYL:
++      case BUILT_IN_PARITYLL:
++      case BUILT_IN_PARITYIMAX:
++      case BUILT_IN_PARITY:
++      case BUILT_IN_LABS:
++      case BUILT_IN_LLABS:
++      case BUILT_IN_PREFETCH:
++	return true;
++
++      default:
++	return is_simple_builtin (decl);
++      }
++
++  return false;
++}
++
+
+=== modified file 'gcc/cfgloop.h'
+--- old/gcc/cfgloop.h	2009-11-25 10:55:54 +0000
++++ new/gcc/cfgloop.h	2010-08-02 13:51:23 +0000
+@@ -622,13 +622,14 @@
+ /* The properties of the target.  */
+ 
+ extern unsigned target_avail_regs;
++extern unsigned target_clobbered_regs;
+ extern unsigned target_res_regs;
+ extern unsigned target_reg_cost [2];
+ extern unsigned target_spill_cost [2];
+ 
+ /* Register pressure estimation for induction variable optimizations & loop
+    invariant motion.  */
+-extern unsigned estimate_reg_pressure_cost (unsigned, unsigned, bool);
++extern unsigned estimate_reg_pressure_cost (unsigned, unsigned, bool, bool);
+ extern void init_set_costs (void);
+ 
+ /* Loop optimizer initialization.  */
+
+=== modified file 'gcc/cfgloopanal.c'
+--- old/gcc/cfgloopanal.c	2009-09-30 08:57:56 +0000
++++ new/gcc/cfgloopanal.c	2010-08-02 13:51:23 +0000
+@@ -320,6 +320,8 @@
+ /* The properties of the target.  */
+ 
+ unsigned target_avail_regs;	/* Number of available registers.  */
++unsigned target_clobbered_regs; /* Number of available registers that are
++				   call-clobbered.  */
+ unsigned target_res_regs;	/* Number of registers reserved for temporary
+ 				   expressions.  */
+ unsigned target_reg_cost[2];	/* The cost for register when there still
+@@ -342,10 +344,15 @@
+   unsigned i;
+ 
+   target_avail_regs = 0;
++  target_clobbered_regs = 0;
+   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+     if (TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], i)
+ 	&& !fixed_regs[i])
+-      target_avail_regs++;
++      {
++	target_avail_regs++;
++	if (call_used_regs[i])
++	  target_clobbered_regs++;
++      }
+ 
+   target_res_regs = 3;
+ 
+@@ -379,20 +386,29 @@
+ 
+ /* Estimates cost of increased register pressure caused by making N_NEW new
+    registers live around the loop.  N_OLD is the number of registers live
+-   around the loop.  */
++   around the loop.  If CALL_P is true, also take into account that
++   call-used registers may be clobbered in the loop body, reducing the
++   number of available registers before we spill.  */
+ 
+ unsigned
+-estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed)
++estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed,
++			    bool call_p)
+ {
+   unsigned cost;
+   unsigned regs_needed = n_new + n_old;
++  unsigned available_regs = target_avail_regs;
++
++  /* If there is a call in the loop body, the call-clobbered registers
++     are not available for loop invariants.  */
++  if (call_p)
++    available_regs = available_regs - target_clobbered_regs;
+ 
+   /* If we have enough registers, we should use them and not restrict
+      the transformations unnecessarily.  */
+-  if (regs_needed + target_res_regs <= target_avail_regs)
++  if (regs_needed + target_res_regs <= available_regs)
+     return 0;
+ 
+-  if (regs_needed <= target_avail_regs)
++  if (regs_needed <= available_regs)
+     /* If we are close to running out of registers, try to preserve
+        them.  */
+     cost = target_reg_cost [speed] * n_new;
+
+=== modified file 'gcc/loop-invariant.c'
+--- old/gcc/loop-invariant.c	2010-04-02 18:54:46 +0000
++++ new/gcc/loop-invariant.c	2010-08-02 13:51:23 +0000
+@@ -1173,11 +1173,13 @@
+ /* Calculates gain for eliminating invariant INV.  REGS_USED is the number
+    of registers used in the loop, NEW_REGS is the number of new variables
+    already added due to the invariant motion.  The number of registers needed
+-   for it is stored in *REGS_NEEDED.  */
++   for it is stored in *REGS_NEEDED.  SPEED and CALL_P are flags passed
++   through to estimate_reg_pressure_cost. */
+ 
+ static int
+ gain_for_invariant (struct invariant *inv, unsigned *regs_needed,
+-		    unsigned *new_regs, unsigned regs_used, bool speed)
++		    unsigned *new_regs, unsigned regs_used,
++		    bool speed, bool call_p)
+ {
+   int comp_cost, size_cost;
+ 
+@@ -1188,9 +1190,9 @@
+   if (! flag_ira_loop_pressure)
+     {
+       size_cost = (estimate_reg_pressure_cost (new_regs[0] + regs_needed[0],
+-					       regs_used, speed)
++					       regs_used, speed, call_p)
+ 		   - estimate_reg_pressure_cost (new_regs[0],
+-						 regs_used, speed));
++						 regs_used, speed, call_p));
+     }
+   else
+     {
+@@ -1245,7 +1247,8 @@
+ 
+ static int
+ best_gain_for_invariant (struct invariant **best, unsigned *regs_needed,
+-			 unsigned *new_regs, unsigned regs_used, bool speed)
++			 unsigned *new_regs, unsigned regs_used,
++			 bool speed, bool call_p)
+ {
+   struct invariant *inv;
+   int i, gain = 0, again;
+@@ -1261,7 +1264,7 @@
+ 	continue;
+ 
+       again = gain_for_invariant (inv, aregs_needed, new_regs, regs_used,
+-      				  speed);
++      				  speed, call_p);
+       if (again > gain)
+ 	{
+ 	  gain = again;
+@@ -1314,7 +1317,7 @@
+ /* Determines which invariants to move.  */
+ 
+ static void
+-find_invariants_to_move (bool speed)
++find_invariants_to_move (bool speed, bool call_p)
+ {
+   int gain;
+   unsigned i, regs_used, regs_needed[N_REG_CLASSES], new_regs[N_REG_CLASSES];
+@@ -1353,7 +1356,8 @@
+ 	new_regs[ira_reg_class_cover[i]] = 0;
+     }
+   while ((gain = best_gain_for_invariant (&inv, regs_needed,
+-					  new_regs, regs_used, speed)) > 0)
++					  new_regs, regs_used,
++					  speed, call_p)) > 0)
+     {
+       set_move_mark (inv->invno, gain);
+       if (! flag_ira_loop_pressure)
+@@ -1554,7 +1558,8 @@
+   init_inv_motion_data ();
+ 
+   find_invariants (loop);
+-  find_invariants_to_move (optimize_loop_for_speed_p (loop));
++  find_invariants_to_move (optimize_loop_for_speed_p (loop),
++			   LOOP_DATA (loop)->has_call);
+   move_invariants (loop);
+ 
+   free_inv_motion_data ();
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42505.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42505.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42505.c	2010-08-02 13:51:23 +0000
+@@ -0,0 +1,23 @@
++/* { dg-options "-mthumb -Os -march=armv5te" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-final { scan-assembler-not "str\[\\t \]*r.,\[\\t \]*.sp," } } */
++
++struct A {
++ int f1;
++ int f2;
++};
++
++int func(int c);
++
++/* This function should not need to spill anything to the stack.  */
++int test(struct A* src, struct A* dst, int count)
++{
++  while (count--) {
++    if (!func(src->f2)) {
++        return 0;
++      }
++      *dst++ = *src++;
++  }
++
++  return 1;
++}
+
+=== modified file 'gcc/tree-inline.c'
+--- old/gcc/tree-inline.c	2010-03-18 20:07:13 +0000
++++ new/gcc/tree-inline.c	2010-08-02 13:51:23 +0000
+@@ -3246,34 +3246,13 @@
+ 	if (POINTER_TYPE_P (funtype))
+ 	  funtype = TREE_TYPE (funtype);
+ 
+-	if (decl && DECL_BUILT_IN_CLASS (decl) == BUILT_IN_MD)
++	if (is_simple_builtin (decl))
++	  return 0;
++	else if (is_inexpensive_builtin (decl))
+ 	  cost = weights->target_builtin_call_cost;
+ 	else
+ 	  cost = weights->call_cost;
+ 
+-	if (decl && DECL_BUILT_IN_CLASS (decl) == BUILT_IN_NORMAL)
+-	  switch (DECL_FUNCTION_CODE (decl))
+-	    {
+-	    case BUILT_IN_CONSTANT_P:
+-	      return 0;
+-	    case BUILT_IN_EXPECT:
+-	      return 0;
+-
+-	    /* Prefetch instruction is not expensive.  */
+-	    case BUILT_IN_PREFETCH:
+-	      cost = weights->target_builtin_call_cost;
+-	      break;
+-
+-	    /* Exception state returns or moves registers around.  */
+-	    case BUILT_IN_EH_FILTER:
+-	    case BUILT_IN_EH_POINTER:
+-	    case BUILT_IN_EH_COPY_VALUES:
+-	      return 0;
+-
+-	    default:
+-	      break;
+-	    }
+-
+ 	if (decl)
+ 	  funtype = TREE_TYPE (decl);
+ 
+
+=== modified file 'gcc/tree-ssa-loop-ivopts.c'
+--- old/gcc/tree-ssa-loop-ivopts.c	2010-04-01 15:18:07 +0000
++++ new/gcc/tree-ssa-loop-ivopts.c	2010-08-02 13:51:23 +0000
+@@ -257,6 +257,9 @@
+ 
+   /* Are we optimizing for speed?  */
+   bool speed;
++
++  /* Whether the loop body includes any function calls.  */
++  bool body_includes_call;
+ };
+ 
+ /* An assignment of iv candidates to uses.  */
+@@ -2926,6 +2929,20 @@
+   return get_computation_at (loop, use, cand, use->stmt);
+ }
+ 
++/* Adjust the cost COST for being in loop setup rather than loop body.
++   If we're optimizing for space, the loop setup overhead is constant;
++   if we're optimizing for speed, amortize it over the per-iteration cost.  */
++static unsigned
++adjust_setup_cost (struct ivopts_data *data, unsigned cost)
++{
++  if (cost == INFTY)
++    return cost;
++  else if (optimize_loop_for_speed_p (data->current_loop))
++    return cost / AVG_LOOP_NITER (data->current_loop);
++  else
++    return cost;
++}
++
+ /* Returns cost of addition in MODE.  */
+ 
+ static unsigned
+@@ -3838,8 +3855,8 @@
+   /* Symbol + offset should be compile-time computable so consider that they
+       are added once to the variable, if present.  */
+   if (var_present && (symbol_present || offset))
+-    cost.cost += add_cost (TYPE_MODE (ctype), speed)
+-		 / AVG_LOOP_NITER (data->current_loop);
++    cost.cost += adjust_setup_cost (data,
++				    add_cost (TYPE_MODE (ctype), speed));
+ 
+   /* Having offset does not affect runtime cost in case it is added to
+      symbol, but it increases complexity.  */
+@@ -4104,7 +4121,7 @@
+       elim_cost = force_var_cost (data, bound, &depends_on_elim);
+       /* The bound is a loop invariant, so it will be only computed
+ 	 once.  */
+-      elim_cost.cost /= AVG_LOOP_NITER (data->current_loop);
++      elim_cost.cost = adjust_setup_cost (data, elim_cost.cost);
+     }
+   else
+     elim_cost = infinite_cost;
+@@ -4351,7 +4368,7 @@
+   cost_base = force_var_cost (data, base, NULL);
+   cost_step = add_cost (TYPE_MODE (TREE_TYPE (base)), data->speed);
+ 
+-  cost = cost_step + cost_base.cost / AVG_LOOP_NITER (current_loop);
++  cost = cost_step + adjust_setup_cost (data, cost_base.cost);
+ 
+   /* Prefer the original ivs unless we may gain something by replacing it.
+      The reason is to make debugging simpler; so this is not relevant for
+@@ -4404,7 +4421,8 @@
+ {
+   /* We add size to the cost, so that we prefer eliminating ivs
+      if possible.  */
+-  return size + estimate_reg_pressure_cost (size, data->regs_used, data->speed);
++  return size + estimate_reg_pressure_cost (size, data->regs_used, data->speed,
++					    data->body_includes_call);
+ }
+ 
+ /* For each size of the induction variable set determine the penalty.  */
+@@ -4419,30 +4437,11 @@
+   struct loop *loop = data->current_loop;
+   bitmap_iterator bi;
+ 
+-  /* We use the following model (definitely improvable, especially the
+-     cost function -- TODO):
+-
+-     We estimate the number of registers available (using MD data), name it A.
+-
+-     We estimate the number of registers used by the loop, name it U.  This
+-     number is obtained as the number of loop phi nodes (not counting virtual
+-     registers and bivs) + the number of variables from outside of the loop.
+-
+-     We set a reserve R (free regs that are used for temporary computations,
+-     etc.).  For now the reserve is a constant 3.
+-
+-     Let I be the number of induction variables.
+-
+-     -- if U + I + R <= A, the cost is I * SMALL_COST (just not to encourage
+-	make a lot of ivs without a reason).
+-     -- if A - R < U + I <= A, the cost is I * PRES_COST
+-     -- if U + I > A, the cost is I * PRES_COST and
+-        number of uses * SPILL_COST * (U + I - A) / (U + I) is added.  */
+-
+   if (dump_file && (dump_flags & TDF_DETAILS))
+     {
+       fprintf (dump_file, "Global costs:\n");
+       fprintf (dump_file, "  target_avail_regs %d\n", target_avail_regs);
++      fprintf (dump_file, "  target_clobbered_regs %d\n", target_clobbered_regs);
+       fprintf (dump_file, "  target_reg_cost %d\n", target_reg_cost[data->speed]);
+       fprintf (dump_file, "  target_spill_cost %d\n", target_spill_cost[data->speed]);
+     }
+@@ -5062,11 +5061,13 @@
+ }
+ 
+ /* Tries to extend the sets IVS in the best possible way in order
+-   to express the USE.  */
++   to express the USE.  If ORIGINALP is true, prefer candidates from
++   the original set of IVs, otherwise favor important candidates not
++   based on any memory object.  */
+ 
+ static bool
+ try_add_cand_for (struct ivopts_data *data, struct iv_ca *ivs,
+-		  struct iv_use *use)
++		  struct iv_use *use, bool originalp)
+ {
+   comp_cost best_cost, act_cost;
+   unsigned i;
+@@ -5085,7 +5086,8 @@
+       iv_ca_set_no_cp (data, ivs, use);
+     }
+ 
+-  /* First try important candidates not based on any memory object.  Only if
++  /* If ORIGINALP is true, try to find the original IV for the use.  Otherwise
++     first try important candidates not based on any memory object.  Only if
+      this fails, try the specific ones.  Rationale -- in loops with many
+      variables the best choice often is to use just one generic biv.  If we
+      added here many ivs specific to the uses, the optimization algorithm later
+@@ -5097,7 +5099,10 @@
+     {
+       cand = iv_cand (data, i);
+ 
+-      if (cand->iv->base_object != NULL_TREE)
++      if (originalp && cand->pos !=IP_ORIGINAL)
++	continue;
++
++      if (!originalp && cand->iv->base_object != NULL_TREE)
+ 	continue;
+ 
+       if (iv_ca_cand_used_p (ivs, cand))
+@@ -5133,8 +5138,13 @@
+ 	    continue;
+ 
+ 	  /* Already tried this.  */
+-	  if (cand->important && cand->iv->base_object == NULL_TREE)
+-	    continue;
++	  if (cand->important)
++	    {
++	      if (originalp && cand->pos == IP_ORIGINAL)
++		continue;
++	      if (!originalp && cand->iv->base_object == NULL_TREE)
++		continue;
++	    }
+ 
+ 	  if (iv_ca_cand_used_p (ivs, cand))
+ 	    continue;
+@@ -5168,13 +5178,13 @@
+ /* Finds an initial assignment of candidates to uses.  */
+ 
+ static struct iv_ca *
+-get_initial_solution (struct ivopts_data *data)
++get_initial_solution (struct ivopts_data *data, bool originalp)
+ {
+   struct iv_ca *ivs = iv_ca_new (data);
+   unsigned i;
+ 
+   for (i = 0; i < n_iv_uses (data); i++)
+-    if (!try_add_cand_for (data, ivs, iv_use (data, i)))
++    if (!try_add_cand_for (data, ivs, iv_use (data, i), originalp))
+       {
+ 	iv_ca_free (&ivs);
+ 	return NULL;
+@@ -5246,14 +5256,12 @@
+    solution and remove the unused ivs while this improves the cost.  */
+ 
+ static struct iv_ca *
+-find_optimal_iv_set (struct ivopts_data *data)
++find_optimal_iv_set_1 (struct ivopts_data *data, bool originalp)
+ {
+-  unsigned i;
+   struct iv_ca *set;
+-  struct iv_use *use;
+ 
+   /* Get the initial solution.  */
+-  set = get_initial_solution (data);
++  set = get_initial_solution (data, originalp);
+   if (!set)
+     {
+       if (dump_file && (dump_flags & TDF_DETAILS))
+@@ -5276,11 +5284,46 @@
+ 	}
+     }
+ 
++  return set;
++}
++
++static struct iv_ca *
++find_optimal_iv_set (struct ivopts_data *data)
++{
++  unsigned i;
++  struct iv_ca *set, *origset;
++  struct iv_use *use;
++  comp_cost cost, origcost;
++
++  /* Determine the cost based on a strategy that starts with original IVs,
++     and try again using a strategy that prefers candidates not based
++     on any IVs.  */
++  origset = find_optimal_iv_set_1 (data, true);
++  set = find_optimal_iv_set_1 (data, false);
++
++  if (!origset && !set)
++    return NULL;
++
++  origcost = origset ? iv_ca_cost (origset) : infinite_cost;
++  cost = set ? iv_ca_cost (set) : infinite_cost;
++
+   if (dump_file && (dump_flags & TDF_DETAILS))
+     {
+-      comp_cost cost = iv_ca_cost (set);
+-      fprintf (dump_file, "Final cost %d (complexity %d)\n\n", cost.cost, cost.complexity);
+-    }
++      fprintf (dump_file, "Original cost %d (complexity %d)\n\n",
++	       origcost.cost, origcost.complexity);
++      fprintf (dump_file, "Final cost %d (complexity %d)\n\n",
++	       cost.cost, cost.complexity);
++    }
++
++  /* Choose the one with the best cost.  */
++  if (compare_costs (origcost, cost) <= 0)
++    {
++      if (set)
++	iv_ca_free (&set);
++      set = origset;
++    }
++  else if (origset)
++    iv_ca_free (&origset);
+ 
+   for (i = 0; i < n_iv_uses (data); i++)
+     {
+@@ -5768,6 +5811,25 @@
+   VEC_free (iv_cand_p, heap, data->iv_candidates);
+ }
+ 
++/* Returns true if the loop body BODY includes any function calls.  */
++
++static bool
++loop_body_includes_call (basic_block *body, unsigned num_nodes)
++{
++  gimple_stmt_iterator gsi;
++  unsigned i;
++
++  for (i = 0; i < num_nodes; i++)
++    for (gsi = gsi_start_bb (body[i]); !gsi_end_p (gsi); gsi_next (&gsi))
++      {
++	gimple stmt = gsi_stmt (gsi);
++	if (is_gimple_call (stmt)
++	    && !is_inexpensive_builtin (gimple_call_fndecl (stmt)))
++	  return true;
++      }
++  return false;
++}
++
+ /* Optimizes the LOOP.  Returns true if anything changed.  */
+ 
+ static bool
+@@ -5799,6 +5861,7 @@
+     }
+ 
+   body = get_loop_body (loop);
++  data->body_includes_call = loop_body_includes_call (body, loop->num_nodes);
+   renumber_gimple_stmt_uids_in_blocks (body, loop->num_nodes);
+   free (body);
+ 
+
+=== modified file 'gcc/tree.h'
+--- old/gcc/tree.h	2010-04-02 18:54:46 +0000
++++ new/gcc/tree.h	2010-08-02 13:51:23 +0000
+@@ -4962,6 +4962,8 @@
+ extern bool merge_ranges (int *, tree *, tree *, int, tree, tree, int,
+ 			  tree, tree);
+ extern void set_builtin_user_assembler_name (tree decl, const char *asmspec);
++extern bool is_simple_builtin (tree);
++extern bool is_inexpensive_builtin (tree);
+ 
+ /* In convert.c */
+ extern tree strip_float_extensions (tree);
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99313.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99313.patch
new file mode 100644
index 0000000000..eadce6ec6c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99313.patch
@@ -0,0 +1,37 @@
+2010-07-15  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2010-02-25  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+	gcc/
+	* tree.c (initializer_zerop): Handle STRING_CST.
+
+ 2010-07-15  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/tree.c'
+--- old/gcc/tree.c	2010-04-01 15:18:07 +0000
++++ new/gcc/tree.c	2010-08-02 16:32:37 +0000
+@@ -9335,6 +9335,19 @@
+ 	return true;
+       }
+ 
++    case STRING_CST:
++      {
++	int i;
++
++	/* We need to loop through all elements to handle cases like
++	   "\0" and "\0foobar".  */
++	for (i = 0; i < TREE_STRING_LENGTH (init); ++i)
++	  if (TREE_STRING_POINTER (init)[i] != '\0')
++	    return false;
++
++	return true;
++      }
++
+     default:
+       return false;
+     }
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99314.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99314.patch
new file mode 100644
index 0000000000..216fcac723
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99314.patch
@@ -0,0 +1,433 @@
+2010-07-16  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #7688
+
+	Backport from mainline:
+
+	gcc/
+	2010-07-12  Jie Zhang  <jie@codesourcery.com>
+	* postreload.c (reg_symbol_ref[]): New.
+	(move2add_use_add2_insn): New.
+	(move2add_use_add3_insn): New.
+	(reload_cse_move2add): Handle SYMBOL + OFFSET case.
+	(move2add_note_store): Likewise.
+
+ 2010-07-15  Yao Qi  <yao@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'gcc/postreload.c'
+--- old/gcc/postreload.c	2010-03-16 10:50:42 +0000
++++ new/gcc/postreload.c	2010-08-02 16:55:34 +0000
+@@ -1160,17 +1160,19 @@
+    information about register contents we have would be costly, so we
+    use move2add_last_label_luid to note where the label is and then
+    later disable any optimization that would cross it.
+-   reg_offset[n] / reg_base_reg[n] / reg_mode[n] are only valid if
+-   reg_set_luid[n] is greater than move2add_last_label_luid.  */
++   reg_offset[n] / reg_base_reg[n] / reg_symbol_ref[n] / reg_mode[n]
++   are only valid if reg_set_luid[n] is greater than
++   move2add_last_label_luid.  */
+ static int reg_set_luid[FIRST_PSEUDO_REGISTER];
+ 
+ /* If reg_base_reg[n] is negative, register n has been set to
+-   reg_offset[n] in mode reg_mode[n] .
++   reg_offset[n] or reg_symbol_ref[n] + reg_offset[n] in mode reg_mode[n].
+    If reg_base_reg[n] is non-negative, register n has been set to the
+    sum of reg_offset[n] and the value of register reg_base_reg[n]
+    before reg_set_luid[n], calculated in mode reg_mode[n] .  */
+ static HOST_WIDE_INT reg_offset[FIRST_PSEUDO_REGISTER];
+ static int reg_base_reg[FIRST_PSEUDO_REGISTER];
++static rtx reg_symbol_ref[FIRST_PSEUDO_REGISTER];
+ static enum machine_mode reg_mode[FIRST_PSEUDO_REGISTER];
+ 
+ /* move2add_luid is linearly increased while scanning the instructions
+@@ -1190,6 +1192,151 @@
+        && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (OUTMODE), \
+ 				 GET_MODE_BITSIZE (INMODE))))
+ 
++/* This function is called with INSN that sets REG to (SYM + OFF),
++   while REG is known to already have value (SYM + offset).
++   This function tries to change INSN into an add instruction
++   (set (REG) (plus (REG) (OFF - offset))) using the known value.
++   It also updates the information about REG's known value.  */
++
++static void
++move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
++{
++  rtx pat = PATTERN (insn);
++  rtx src = SET_SRC (pat);
++  int regno = REGNO (reg);
++  rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[regno],
++			      GET_MODE (reg));
++  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
++
++  /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
++     use (set (reg) (reg)) instead.
++     We don't delete this insn, nor do we convert it into a
++     note, to avoid losing register notes or the return
++     value flag.  jump2 already knows how to get rid of
++     no-op moves.  */
++  if (new_src == const0_rtx)
++    {
++      /* If the constants are different, this is a
++	 truncation, that, if turned into (set (reg)
++	 (reg)), would be discarded.  Maybe we should
++	 try a truncMN pattern?  */
++      if (INTVAL (off) == reg_offset [regno])
++	validate_change (insn, &SET_SRC (pat), reg, 0);
++    }
++  else if (rtx_cost (new_src, PLUS, speed) < rtx_cost (src, SET, speed)
++	   && have_add2_insn (reg, new_src))
++    {
++      rtx tem = gen_rtx_PLUS (GET_MODE (reg), reg, new_src);
++      validate_change (insn, &SET_SRC (pat), tem, 0);
++    }
++  else if (sym == NULL_RTX && GET_MODE (reg) != BImode)
++    {
++      enum machine_mode narrow_mode;
++      for (narrow_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
++	   narrow_mode != VOIDmode
++	     && narrow_mode != GET_MODE (reg);
++	   narrow_mode = GET_MODE_WIDER_MODE (narrow_mode))
++	{
++	  if (have_insn_for (STRICT_LOW_PART, narrow_mode)
++	      && ((reg_offset[regno]
++		   & ~GET_MODE_MASK (narrow_mode))
++		  == (INTVAL (off)
++		      & ~GET_MODE_MASK (narrow_mode))))
++	    {
++	      rtx narrow_reg = gen_rtx_REG (narrow_mode,
++					    REGNO (reg));
++	      rtx narrow_src = gen_int_mode (INTVAL (off),
++					     narrow_mode);
++	      rtx new_set =
++		gen_rtx_SET (VOIDmode,
++			     gen_rtx_STRICT_LOW_PART (VOIDmode,
++						      narrow_reg),
++			     narrow_src);
++	      if (validate_change (insn, &PATTERN (insn),
++				   new_set, 0))
++		break;
++	    }
++	}
++    }
++  reg_set_luid[regno] = move2add_luid;
++  reg_base_reg[regno] = -1;
++  reg_mode[regno] = GET_MODE (reg);
++  reg_symbol_ref[regno] = sym;
++  reg_offset[regno] = INTVAL (off);
++}
++
++
++/* This function is called with INSN that sets REG to (SYM + OFF),
++   but REG doesn't have known value (SYM + offset).  This function
++   tries to find another register which is known to already have
++   value (SYM + offset) and change INSN into an add instruction
++   (set (REG) (plus (the found register) (OFF - offset))) if such
++   a register is found.  It also updates the information about
++   REG's known value.  */
++
++static void
++move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
++{
++  rtx pat = PATTERN (insn);
++  rtx src = SET_SRC (pat);
++  int regno = REGNO (reg);
++  int min_cost = INT_MAX;
++  int min_regno;
++  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
++  int i;
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    if (reg_set_luid[i] > move2add_last_label_luid
++	&& reg_mode[i] == GET_MODE (reg)
++	&& reg_base_reg[i] < 0
++	&& reg_symbol_ref[i] != NULL_RTX
++	&& rtx_equal_p (sym, reg_symbol_ref[i]))
++      {
++	rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[i],
++				    GET_MODE (reg));
++	/* (set (reg) (plus (reg) (const_int 0))) is not canonical;
++	   use (set (reg) (reg)) instead.
++	   We don't delete this insn, nor do we convert it into a
++	   note, to avoid losing register notes or the return
++	   value flag.  jump2 already knows how to get rid of
++	   no-op moves.  */
++	if (new_src == const0_rtx)
++	  {
++	    min_cost = 0;
++	    min_regno = i;
++	    break;
++	  }
++	else
++	  {
++	    int cost = rtx_cost (new_src, PLUS, speed);
++	    if (cost < min_cost)
++	      {
++		min_cost = cost;
++		min_regno = i;
++	      }
++	  }
++      }
++
++  if (min_cost < rtx_cost (src, SET, speed))
++    {
++      rtx tem;
++
++      tem = gen_rtx_REG (GET_MODE (reg), min_regno);
++      if (i != min_regno)
++	{
++	  rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[min_regno],
++				      GET_MODE (reg));
++	  tem = gen_rtx_PLUS (GET_MODE (reg), tem, new_src);
++	}
++      validate_change (insn, &SET_SRC (pat), tem, 0);
++    }
++  reg_set_luid[regno] = move2add_luid;
++  reg_base_reg[regno] = -1;
++  reg_mode[regno] = GET_MODE (reg);
++  reg_symbol_ref[regno] = sym;
++  reg_offset[regno] = INTVAL (off);
++}
++
+ static void
+ reload_cse_move2add (rtx first)
+ {
+@@ -1197,7 +1344,13 @@
+   rtx insn;
+ 
+   for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
+-    reg_set_luid[i] = 0;
++    {
++      reg_set_luid[i] = 0;
++      reg_offset[i] = 0;
++      reg_base_reg[i] = 0;
++      reg_symbol_ref[i] = NULL_RTX;
++      reg_mode[i] = VOIDmode;
++    }
+ 
+   move2add_last_label_luid = 0;
+   move2add_luid = 2;
+@@ -1245,65 +1398,11 @@
+ 				  (set (STRICT_LOW_PART (REGX)) (CONST_INT B))
+ 	      */
+ 
+-	      if (CONST_INT_P (src) && reg_base_reg[regno] < 0)
++	      if (CONST_INT_P (src)
++		  && reg_base_reg[regno] < 0
++		  && reg_symbol_ref[regno] == NULL_RTX)
+ 		{
+-		  rtx new_src = gen_int_mode (INTVAL (src) - reg_offset[regno],
+-					      GET_MODE (reg));
+-		  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
+-
+-		  /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
+-		     use (set (reg) (reg)) instead.
+-		     We don't delete this insn, nor do we convert it into a
+-		     note, to avoid losing register notes or the return
+-		     value flag.  jump2 already knows how to get rid of
+-		     no-op moves.  */
+-		  if (new_src == const0_rtx)
+-		    {
+-		      /* If the constants are different, this is a
+-			 truncation, that, if turned into (set (reg)
+-			 (reg)), would be discarded.  Maybe we should
+-			 try a truncMN pattern?  */
+-		      if (INTVAL (src) == reg_offset [regno])
+-			validate_change (insn, &SET_SRC (pat), reg, 0);
+-		    }
+-		  else if (rtx_cost (new_src, PLUS, speed) < rtx_cost (src, SET, speed)
+-			   && have_add2_insn (reg, new_src))
+-		    {
+-		      rtx tem = gen_rtx_PLUS (GET_MODE (reg), reg, new_src);
+-		      validate_change (insn, &SET_SRC (pat), tem, 0);
+-		    }
+-		  else if (GET_MODE (reg) != BImode)
+-		    {
+-		      enum machine_mode narrow_mode;
+-		      for (narrow_mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
+-			   narrow_mode != VOIDmode
+-			   && narrow_mode != GET_MODE (reg);
+-			   narrow_mode = GET_MODE_WIDER_MODE (narrow_mode))
+-			{
+-			  if (have_insn_for (STRICT_LOW_PART, narrow_mode)
+-			      && ((reg_offset[regno]
+-				   & ~GET_MODE_MASK (narrow_mode))
+-				  == (INTVAL (src)
+-				      & ~GET_MODE_MASK (narrow_mode))))
+-			    {
+-			      rtx narrow_reg = gen_rtx_REG (narrow_mode,
+-							    REGNO (reg));
+-			      rtx narrow_src = gen_int_mode (INTVAL (src),
+-							     narrow_mode);
+-			      rtx new_set =
+-				gen_rtx_SET (VOIDmode,
+-					     gen_rtx_STRICT_LOW_PART (VOIDmode,
+-								      narrow_reg),
+-					     narrow_src);
+-			      if (validate_change (insn, &PATTERN (insn),
+-						   new_set, 0))
+-				break;
+-			    }
+-			}
+-		    }
+-		  reg_set_luid[regno] = move2add_luid;
+-		  reg_mode[regno] = GET_MODE (reg);
+-		  reg_offset[regno] = INTVAL (src);
++		  move2add_use_add2_insn (reg, NULL_RTX, src, insn);
+ 		  continue;
+ 		}
+ 
+@@ -1373,6 +1472,51 @@
+ 		    }
+ 		}
+ 	    }
++
++	  /* Try to transform
++	     (set (REGX) (CONST (PLUS (SYMBOL_REF) (CONST_INT A))))
++	     ...
++	     (set (REGY) (CONST (PLUS (SYMBOL_REF) (CONST_INT B))))
++	     to
++	     (set (REGX) (CONST (PLUS (SYMBOL_REF) (CONST_INT A))))
++	     ...
++	     (set (REGY) (CONST (PLUS (REGX) (CONST_INT B-A))))  */
++	  if ((GET_CODE (src) == SYMBOL_REF
++	       || (GET_CODE (src) == CONST
++		   && GET_CODE (XEXP (src, 0)) == PLUS
++		   && GET_CODE (XEXP (XEXP (src, 0), 0)) == SYMBOL_REF
++		   && CONST_INT_P (XEXP (XEXP (src, 0), 1))))
++	      && dbg_cnt (cse2_move2add))
++	    {
++	      rtx sym, off;
++
++	      if (GET_CODE (src) == SYMBOL_REF)
++		{
++		  sym = src;
++		  off = const0_rtx;
++		}
++	      else
++		{
++		  sym = XEXP (XEXP (src, 0), 0);
++		  off = XEXP (XEXP (src, 0), 1);
++		}
++
++	      /* If the reg already contains the value which is sum of
++		 sym and some constant value, we can use an add2 insn.  */
++	      if (reg_set_luid[regno] > move2add_last_label_luid
++		  && MODES_OK_FOR_MOVE2ADD (GET_MODE (reg), reg_mode[regno])
++		  && reg_base_reg[regno] < 0
++		  && reg_symbol_ref[regno] != NULL_RTX
++		  && rtx_equal_p (sym, reg_symbol_ref[regno]))
++		move2add_use_add2_insn (reg, sym, off, insn);
++
++	      /* Otherwise, we have to find a register whose value is sum
++		 of sym and some constant value.  */
++	      else
++		move2add_use_add3_insn (reg, sym, off, insn);
++
++	      continue;
++	    }
+ 	}
+ 
+       for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+@@ -1386,7 +1530,7 @@
+ 		reg_set_luid[regno] = 0;
+ 	    }
+ 	}
+-      note_stores (PATTERN (insn), move2add_note_store, NULL);
++      note_stores (PATTERN (insn), move2add_note_store, insn);
+ 
+       /* If INSN is a conditional branch, we try to extract an
+ 	 implicit set out of it.  */
+@@ -1408,7 +1552,7 @@
+ 	    {
+ 	      rtx implicit_set =
+ 		gen_rtx_SET (VOIDmode, XEXP (cnd, 0), XEXP (cnd, 1));
+-	      move2add_note_store (SET_DEST (implicit_set), implicit_set, 0);
++	      move2add_note_store (SET_DEST (implicit_set), implicit_set, insn);
+ 	    }
+ 	}
+ 
+@@ -1426,13 +1570,15 @@
+     }
+ }
+ 
+-/* SET is a SET or CLOBBER that sets DST.
++/* SET is a SET or CLOBBER that sets DST.  DATA is the insn which
++   contains SET.
+    Update reg_set_luid, reg_offset and reg_base_reg accordingly.
+    Called from reload_cse_move2add via note_stores.  */
+ 
+ static void
+-move2add_note_store (rtx dst, const_rtx set, void *data ATTRIBUTE_UNUSED)
++move2add_note_store (rtx dst, const_rtx set, void *data)
+ {
++  rtx insn = (rtx) data;
+   unsigned int regno = 0;
+   unsigned int nregs = 0;
+   unsigned int i;
+@@ -1466,6 +1612,38 @@
+     nregs = hard_regno_nregs[regno][mode];
+ 
+   if (SCALAR_INT_MODE_P (GET_MODE (dst))
++      && nregs == 1 && GET_CODE (set) == SET)
++    {
++      rtx note, sym = NULL_RTX;
++      HOST_WIDE_INT off;
++
++      note = find_reg_equal_equiv_note (insn);
++      if (note && GET_CODE (XEXP (note, 0)) == SYMBOL_REF)
++	{
++	  sym = XEXP (note, 0);
++	  off = 0;
++	}
++      else if (note && GET_CODE (XEXP (note, 0)) == CONST
++	       && GET_CODE (XEXP (XEXP (note, 0), 0)) == PLUS
++	       && GET_CODE (XEXP (XEXP (XEXP (note, 0), 0), 0)) == SYMBOL_REF
++	       && CONST_INT_P (XEXP (XEXP (XEXP (note, 0), 0), 1)))
++	{
++	  sym = XEXP (XEXP (XEXP (note, 0), 0), 0);
++	  off = INTVAL (XEXP (XEXP (XEXP (note, 0), 0), 1));
++	}
++
++      if (sym != NULL_RTX)
++	{
++	  reg_base_reg[regno] = -1;
++	  reg_symbol_ref[regno] = sym;
++	  reg_offset[regno] = off;
++	  reg_mode[regno] = mode;
++	  reg_set_luid[regno] = move2add_luid;
++	  return;
++	}
++    }
++
++  if (SCALAR_INT_MODE_P (GET_MODE (dst))
+       && nregs == 1 && GET_CODE (set) == SET
+       && GET_CODE (SET_DEST (set)) != ZERO_EXTRACT
+       && GET_CODE (SET_DEST (set)) != STRICT_LOW_PART)
+@@ -1525,6 +1703,7 @@
+ 	case CONST_INT:
+ 	  /* Start tracking the register as a constant.  */
+ 	  reg_base_reg[regno] = -1;
++	  reg_symbol_ref[regno] = NULL_RTX;
+ 	  reg_offset[regno] = INTVAL (SET_SRC (set));
+ 	  /* We assign the same luid to all registers set to constants.  */
+ 	  reg_set_luid[regno] = move2add_last_label_luid + 1;
+@@ -1545,6 +1724,7 @@
+       if (reg_set_luid[base_regno] <= move2add_last_label_luid)
+ 	{
+ 	  reg_base_reg[base_regno] = base_regno;
++	  reg_symbol_ref[base_regno] = NULL_RTX;
+ 	  reg_offset[base_regno] = 0;
+ 	  reg_set_luid[base_regno] = move2add_luid;
+ 	  reg_mode[base_regno] = mode;
+@@ -1558,6 +1738,7 @@
+       /* Copy base information from our base register.  */
+       reg_set_luid[regno] = reg_set_luid[base_regno];
+       reg_base_reg[regno] = reg_base_reg[base_regno];
++      reg_symbol_ref[regno] = reg_symbol_ref[base_regno];
+ 
+       /* Compute the sum of the offsets or constants.  */
+       reg_offset[regno] = trunc_int_for_mode (offset
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99315.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99315.patch
new file mode 100644
index 0000000000..3d5dd5f9ab
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99315.patch
@@ -0,0 +1,57 @@
+2010-08-03  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-07-28  Chung-Lin Tang  <cltang@codesourcery.com>
+	* config/arm/arm.c (arm_pcs_default): Remove static.	
+	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_PCS or
+	__ARM_PCS_VFP to indicate soft/hard-float calling convention.
+	(arm_pcs_default): Declare.
+
+ 2010-07-16  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Issue #7688
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-02 13:42:24 +0000
++++ new/gcc/config/arm/arm.c	2010-08-03 13:55:46 +0000
+@@ -704,7 +704,7 @@
+ /* The maximum number of insns to be used when loading a constant.  */
+ static int arm_constant_limit = 3;
+ 
+-static enum arm_pcs arm_pcs_default;
++enum arm_pcs arm_pcs_default;
+ 
+ /* For an explanation of these variables, see final_prescan_insn below.  */
+ int arm_ccfsm_state;
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-07-29 16:58:56 +0000
++++ new/gcc/config/arm/arm.h	2010-08-03 10:40:56 +0000
+@@ -94,7 +94,13 @@
+ 	if (arm_arch_iwmmxt)				\
+ 	  builtin_define ("__IWMMXT__");		\
+ 	if (TARGET_AAPCS_BASED)				\
+-	  builtin_define ("__ARM_EABI__");		\
++	  {						\
++	    if (arm_pcs_default == ARM_PCS_AAPCS_VFP)	\
++	      builtin_define ("__ARM_PCS_VFP");		\
++	    else if (arm_pcs_default == ARM_PCS_AAPCS)	\
++	      builtin_define ("__ARM_PCS");		\
++	    builtin_define ("__ARM_EABI__");		\
++	  }						\
+     } while (0)
+ 
+ /* The various ARM cores.  */
+@@ -1648,6 +1654,9 @@
+   ARM_PCS_UNKNOWN
+ };
+ 
++/* Default procedure calling standard of current compilation unit. */
++extern enum arm_pcs arm_pcs_default;
++
+ /* A C type for declaring a variable that is used as the first argument of
+    `FUNCTION_ARG' and other related values.  */
+ typedef struct
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99316.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99316.patch
new file mode 100644
index 0000000000..c7f92b6fcb
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99316.patch
@@ -0,0 +1,76 @@
+2010-07-20  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+	2010-06-07  Kazu Hirata  <kazu@codesourcery.com>
+
+	Issue #8535
+
+	Backport from mainline:
+	gcc/
+	2010-06-07  Kazu Hirata  <kazu@codesourcery.com>
+	PR rtl-optimization/44404
+	* auto-inc-dec.c (find_inc): Use reg_overlap_mentioned_p instead
+	of count_occurrences to see if it's safe to modify mem_insn.insn.
+
+	gcc/testsuite/
+	2010-06-07  Kazu Hirata  <kazu@codesourcery.com>
+	PR rtl-optimization/44404
+	* gcc.dg/pr44404.c: New.
+
+ 2010-08-03  Chung-Lin Tang  <cltang@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/auto-inc-dec.c'
+--- old/gcc/auto-inc-dec.c	2010-04-02 18:54:46 +0000
++++ new/gcc/auto-inc-dec.c	2010-08-05 11:30:21 +0000
+@@ -1068,7 +1068,7 @@
+       /* For the post_add to work, the result_reg of the inc must not be
+ 	 used in the mem insn since this will become the new index
+ 	 register.  */
+-      if (count_occurrences (PATTERN (mem_insn.insn), inc_insn.reg_res, 1) != 0)
++      if (reg_overlap_mentioned_p (inc_insn.reg_res, PATTERN (mem_insn.insn)))
+ 	{
+ 	  if (dump_file)
+ 	    fprintf (dump_file, "base reg replacement failure.\n");
+
+=== added file 'gcc/testsuite/gcc.dg/pr44404.c'
+--- old/gcc/testsuite/gcc.dg/pr44404.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr44404.c	2010-08-05 11:30:21 +0000
+@@ -0,0 +1,35 @@
++/* PR rtl-optimization/44404
++   foo() used to be miscompiled on ARM due to a bug in auto-inc-dec.c,
++   which resulted in "strb r1, [r1], #-36".  */
++
++/* { dg-do run } */
++/* { dg-options "-O2 -fno-unroll-loops" } */
++
++extern char *strcpy (char *, const char *);
++extern int strcmp (const char*, const char*);
++extern void abort (void);
++
++char buf[128];
++
++void __attribute__((noinline))
++bar (int a, const char *p)
++{
++  if (strcmp (p, "0123456789abcdefghijklmnopqrstuvwxyz") != 0)
++    abort ();
++}
++
++void __attribute__((noinline))
++foo (int a)
++{
++  if (a)
++    bar (0, buf);
++  strcpy (buf, "0123456789abcdefghijklmnopqrstuvwxyz");
++  bar (0, buf);
++}
++
++int
++main (void)
++{
++  foo (0);
++  return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99318.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99318.patch
new file mode 100644
index 0000000000..ad4943a0a9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99318.patch
@@ -0,0 +1,118 @@
+2010-07-24  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #9079
+
+	Backport from mainline:
+
+	gcc/
+	2010-07-23  Jie Zhang  <jie@codesourcery.com>
+	PR target/44290
+	* attribs.c (decl_attributes): Insert "noinline" and "noclone"
+	if "naked".
+	* tree-sra.c (ipa_sra_preliminary_function_checks): Return
+	false if ! tree_versionable_function_p.
+
+	gcc/testsuite/
+	2010-07-23  Jie Zhang  <jie@codesourcery.com>
+	PR target/44290
+	* gcc.dg/pr44290-1.c: New test.
+	* gcc.dg/pr44290-2.c: New test.
+
+ 2010-07-22  Maxim Kuvyrkov  <maxim@codesourcery.com>
+ 
+ 	Backport from FSF GCC 4.5 branch to fix PR45015:
+
+=== modified file 'gcc/attribs.c'
+--- old/gcc/attribs.c	2010-04-02 18:54:46 +0000
++++ new/gcc/attribs.c	2010-08-05 11:39:36 +0000
+@@ -278,6 +278,19 @@
+ 	TREE_VALUE (cur_attr) = chainon (opts, TREE_VALUE (cur_attr));
+     }
+ 
++  /* A "naked" function attribute implies "noinline" and "noclone" for
++     those targets that support it.  */
++  if (TREE_CODE (*node) == FUNCTION_DECL
++      && lookup_attribute_spec (get_identifier ("naked"))
++      && lookup_attribute ("naked", attributes) != NULL)
++    {
++      if (lookup_attribute ("noinline", attributes) == NULL)
++	attributes = tree_cons (get_identifier ("noinline"), NULL, attributes);
++
++      if (lookup_attribute ("noclone", attributes) == NULL)
++	attributes = tree_cons (get_identifier ("noclone"),  NULL, attributes);
++    }
++
+   targetm.insert_attributes (*node, &attributes);
+ 
+   for (a = attributes; a; a = TREE_CHAIN (a))
+
+=== added file 'gcc/testsuite/gcc.dg/pr44290-1.c'
+--- old/gcc/testsuite/gcc.dg/pr44290-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr44290-1.c	2010-08-05 11:39:36 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile { target arm*-*-* avr-*-* mcore-*-* rx-*-* spu-*-* } } */
++/* { dg-options "-O2 -fdump-tree-optimized" } */
++
++static void __attribute__((naked))
++foo(void *from, void *to)
++{
++  asm volatile("dummy"::"r"(from), "r"(to));
++}
++
++unsigned int fie[2];
++
++void fum(void *to)
++{
++  foo(fie, to);
++}
++
++/* { dg-final { scan-tree-dump "foo \\\(void \\\* from, void \\\* to\\\)" "optimized" } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+
+=== added file 'gcc/testsuite/gcc.dg/pr44290-2.c'
+--- old/gcc/testsuite/gcc.dg/pr44290-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr44290-2.c	2010-08-05 11:39:36 +0000
+@@ -0,0 +1,24 @@
++/* { dg-do compile { target arm*-*-* avr-*-* mcore-*-* rx-*-* spu-*-* } } */
++/* { dg-options "-O2 -fdump-tree-optimized" } */
++
++static unsigned long __attribute__((naked))
++foo (unsigned long base)
++{
++  asm volatile ("dummy");
++}
++unsigned long
++bar (void)
++{
++  static int start, set;
++
++  if (!set)
++    {
++      set = 1;
++      start = foo (0);
++    }
++
++  return foo (start);
++}
++
++/* { dg-final { scan-tree-dump "foo \\\(long unsigned int base\\\)" "optimized" } } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+
+=== modified file 'gcc/tree-sra.c'
+--- old/gcc/tree-sra.c	2010-03-17 12:02:35 +0000
++++ new/gcc/tree-sra.c	2010-08-05 11:39:36 +0000
+@@ -4096,6 +4096,13 @@
+ static bool
+ ipa_sra_preliminary_function_checks (struct cgraph_node *node)
+ {
++  if (!tree_versionable_function_p (current_function_decl))
++    {
++      if (dump_file)
++	fprintf (dump_file, "Function isn't allowed to be versioned.\n");
++      return false;
++    }
++
+   if (!cgraph_node_can_be_local_p (node))
+     {
+       if (dump_file)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99319.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99319.patch
new file mode 100644
index 0000000000..a649c9542a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99319.patch
@@ -0,0 +1,197 @@
+2010-07-24  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-04-10  Wei Guozhi  <carrot@google.com>
+
+	PR target/42601
+	gcc/
+	* config/arm/arm.c (arm_pic_static_addr): New function.
+	(legitimize_pic_address): Call arm_pic_static_addr when it detects
+	a static symbol.
+	(arm_output_addr_const_extra): Output expression for new pattern.
+	* config/arm/arm.md (UNSPEC_SYMBOL_OFFSET): New unspec symbol.
+
+	2010-07-22  Sandra Loosemore  <sandra@codesourcery.com>
+
+	PR tree-optimization/39839
+	gcc/testsuite/
+	* gcc.target/arm/pr39839.c: New test case.
+
+ 2010-07-24  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Issue #9079
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-03 13:55:46 +0000
++++ new/gcc/config/arm/arm.c	2010-08-05 12:06:40 +0000
+@@ -225,6 +225,7 @@
+ static void arm_asm_trampoline_template (FILE *);
+ static void arm_trampoline_init (rtx, tree, rtx);
+ static rtx arm_trampoline_adjust_address (rtx);
++static rtx arm_pic_static_addr (rtx orig, rtx reg);
+ 
+ 
+ /* Table of machine attributes.  */
+@@ -4986,29 +4987,16 @@
+     {
+       rtx pic_ref, address;
+       rtx insn;
+-      int subregs = 0;
+-
+-      /* If this function doesn't have a pic register, create one now.  */
+-      require_pic_register ();
+ 
+       if (reg == 0)
+ 	{
+ 	  gcc_assert (can_create_pseudo_p ());
+ 	  reg = gen_reg_rtx (Pmode);
+-
+-	  subregs = 1;
++	  address = gen_reg_rtx (Pmode);
+ 	}
+-
+-      if (subregs)
+-	address = gen_reg_rtx (Pmode);
+       else
+ 	address = reg;
+ 
+-      if (TARGET_32BIT)
+-	emit_insn (gen_pic_load_addr_32bit (address, orig));
+-      else /* TARGET_THUMB1 */
+-	emit_insn (gen_pic_load_addr_thumb1 (address, orig));
+-
+       /* VxWorks does not impose a fixed gap between segments; the run-time
+ 	 gap can be different from the object-file gap.  We therefore can't
+ 	 use GOTOFF unless we are absolutely sure that the symbol is in the
+@@ -5020,16 +5008,23 @@
+ 	       SYMBOL_REF_LOCAL_P (orig)))
+ 	  && NEED_GOT_RELOC
+ 	  && !TARGET_VXWORKS_RTP)
+-	pic_ref = gen_rtx_PLUS (Pmode, cfun->machine->pic_reg, address);
++	insn = arm_pic_static_addr (orig, reg);
+       else
+ 	{
++	  /* If this function doesn't have a pic register, create one now.  */
++	  require_pic_register ();
++
++	  if (TARGET_32BIT)
++	    emit_insn (gen_pic_load_addr_32bit (address, orig));
++	  else /* TARGET_THUMB1 */
++	    emit_insn (gen_pic_load_addr_thumb1 (address, orig));
++
+ 	  pic_ref = gen_const_mem (Pmode,
+ 				   gen_rtx_PLUS (Pmode, cfun->machine->pic_reg,
+ 					         address));
++	  insn = emit_move_insn (reg, pic_ref);
+ 	}
+ 
+-      insn = emit_move_insn (reg, pic_ref);
+-
+       /* Put a REG_EQUAL note on this insn, so that it can be optimized
+ 	 by loop.  */
+       set_unique_reg_note (insn, REG_EQUAL, orig);
+@@ -5236,6 +5231,43 @@
+   emit_use (pic_reg);
+ }
+ 
++/* Generate code to load the address of a static var when flag_pic is set.  */
++static rtx
++arm_pic_static_addr (rtx orig, rtx reg)
++{
++  rtx l1, labelno, offset_rtx, insn;
++
++  gcc_assert (flag_pic);
++
++  /* We use an UNSPEC rather than a LABEL_REF because this label
++     never appears in the code stream.  */
++  labelno = GEN_INT (pic_labelno++);
++  l1 = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, labelno), UNSPEC_PIC_LABEL);
++  l1 = gen_rtx_CONST (VOIDmode, l1);
++
++  /* On the ARM the PC register contains 'dot + 8' at the time of the
++     addition, on the Thumb it is 'dot + 4'.  */
++  offset_rtx = plus_constant (l1, TARGET_ARM ? 8 : 4);
++  offset_rtx = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, orig, offset_rtx),
++                               UNSPEC_SYMBOL_OFFSET);
++  offset_rtx = gen_rtx_CONST (Pmode, offset_rtx);
++
++  if (TARGET_32BIT)
++    {
++      emit_insn (gen_pic_load_addr_32bit (reg, offset_rtx));
++      if (TARGET_ARM)
++        insn = emit_insn (gen_pic_add_dot_plus_eight (reg, reg, labelno));
++      else
++        insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
++    }
++  else /* TARGET_THUMB1 */
++    {
++      emit_insn (gen_pic_load_addr_thumb1 (reg, offset_rtx));
++      insn = emit_insn (gen_pic_add_dot_plus_four (reg, reg, labelno));
++    }
++
++  return insn;
++}
+ 
+ /* Return nonzero if X is valid as an ARM state addressing register.  */
+ static int
+@@ -21461,6 +21493,16 @@
+       fputc (')', fp);
+       return TRUE;
+     }
++  else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_SYMBOL_OFFSET)
++    {
++      output_addr_const (fp, XVECEXP (x, 0, 0));
++      if (GOT_PCREL)
++        fputs ("+.", fp);
++      fputs ("-(", fp);
++      output_addr_const (fp, XVECEXP (x, 0, 1));
++      fputc (')', fp);
++      return TRUE;
++    }
+   else if (GET_CODE (x) == CONST_VECTOR)
+     return arm_emit_vector_const (fp, x);
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-07-30 14:17:05 +0000
++++ new/gcc/config/arm/arm.md	2010-08-05 12:06:40 +0000
+@@ -101,6 +101,8 @@
+ 			  ; a given symbolic address.
+    (UNSPEC_THUMB1_CASESI 25) ; A Thumb1 compressed dispatch-table call.
+    (UNSPEC_RBIT 26)       ; rbit operation.
++   (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from
++                             ; another symbolic address.
+   ]
+ )
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr39839.c'
+--- old/gcc/testsuite/gcc.target/arm/pr39839.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr39839.c	2010-08-05 12:06:40 +0000
+@@ -0,0 +1,24 @@
++/* { dg-options "-mthumb -Os -march=armv5te -mthumb-interwork -fpic" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-final { scan-assembler-not "str\[\\t \]*r.,\[\\t \]*.sp," } } */
++
++struct S
++{
++  int count;
++  char *addr;
++};
++
++void func(const char*, const char*, int, const char*);
++
++/* This function should not need to spill to the stack. */
++void test(struct S *p)
++{
++  int off = p->count;
++  while (p->count >= 0)
++    {
++      const char *s = "xyz";
++      if (*p->addr) s = "pqr";
++      func("abcde", p->addr + off, off, s);
++      p->count--;
++    }
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99320.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99320.patch
new file mode 100644
index 0000000000..669523218c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99320.patch
@@ -0,0 +1,138 @@
+2010-08-05  Andrew Stubbs  <ams@codesourcery.com>
+
+	gcc/testsuite/
+	* gcc.dg/vect/vect-shift-2.c: Revert all previous changes.
+	* gcc.dg/vect/vect-shift-4.c: New file.
+
+	2010-07-20  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:	
+	2009-06-16  Daniel Jacobowitz  <dan@codesourcery.com>
+	
+	Merge from Sourcery G++ 4.3:
+	2008-12-03  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	gcc/testsuite/
+	* gcc.dg/vect/vect-shift-2.c, gcc.dg/vect/vect-shift-3.c: New.
+	* lib/target-supports.exp (check_effective_target_vect_shift_char): New
+	function.
+
+ 2010-07-24  Sandra Loosemore  <sandra@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== added file 'gcc/testsuite/gcc.dg/vect/vect-shift-3.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-shift-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-shift-3.c	2010-08-05 14:13:43 +0000
+@@ -0,0 +1,37 @@
++/* { dg-require-effective-target vect_shift } */
++/* { dg-require-effective-target vect_int } */
++
++#include "tree-vect.h"
++
++#define N 32
++
++unsigned short dst[N] __attribute__((aligned(N)));
++unsigned short src[N] __attribute__((aligned(N)));
++
++__attribute__ ((noinline))
++void array_shift(void)
++{
++  int i;
++  for (i = 0; i < N; i++)
++    dst[i] = src[i] >> 3;
++}
++
++int main()
++{
++  volatile int i;
++  check_vect ();
++
++  for (i = 0; i < N; i++)
++    src[i] = i << 3;
++
++  array_shift ();
++
++  for (i = 0; i < N; i++)
++    if (dst[i] != i)
++      abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
++/* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== added file 'gcc/testsuite/gcc.dg/vect/vect-shift-4.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-shift-4.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-shift-4.c	2010-08-05 14:13:43 +0000
+@@ -0,0 +1,37 @@
++/* { dg-require-effective-target vect_shift_char } */
++/* { dg-require-effective-target vect_int } */
++
++#include "tree-vect.h"
++
++#define N 32
++
++unsigned char dst[N] __attribute__((aligned(N)));
++unsigned char src[N] __attribute__((aligned(N)));
++
++__attribute__ ((noinline))
++void array_shift(void)
++{
++  int i;
++  for (i = 0; i < N; i++)
++    dst[i] = src[i] >> 3;
++}
++
++int main()
++{
++  volatile int i;
++  check_vect ();
++
++  for (i = 0; i < N; i++)
++    src[i] = i << 3;
++
++  array_shift ();
++
++  for (i = 0; i < N; i++)
++    if (dst[i] != i)
++      abort ();
++
++  return 0;
++}
++
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
++/* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/lib/target-supports.exp'
+--- old/gcc/testsuite/lib/target-supports.exp	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/lib/target-supports.exp	2010-08-05 14:13:43 +0000
+@@ -2001,6 +2001,26 @@
+     return $et_vect_shift_saved
+ }
+ 
++# Return 1 if the target supports hardware vector shift operation for char.
++
++proc check_effective_target_vect_shift_char { } {
++    global et_vect_shift_char_saved
++
++    if [info exists et_vect_shift_char_saved] {
++	verbose "check_effective_target_vect_shift_char: using cached result" 2
++    } else {
++	set et_vect_shift_char_saved 0
++	if { ([istarget powerpc*-*-*]
++             && ![istarget powerpc-*-linux*paired*])
++	     || [check_effective_target_arm32] } {
++	   set et_vect_shift_char_saved 1
++	}
++    }
++
++    verbose "check_effective_target_vect_shift_char: returning $et_vect_shift_char_saved" 2
++    return $et_vect_shift_char_saved
++}
++
+ # Return 1 if the target supports hardware vectors of long, 0 otherwise.
+ #
+ # This can change for different subtargets so do not cache the result.
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99321.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99321.patch
new file mode 100644
index 0000000000..b122ab10f8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99321.patch
@@ -0,0 +1,28 @@
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2007-07-05  Mark Shinwell  <shinwell@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.h (BRANCH_COST): Set to 1 when optimizing for size
+	on Thumb-2.
+
+ 2010-08-05  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	gcc/testsuite/
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-03 10:40:56 +0000
++++ new/gcc/config/arm/arm.h	2010-08-05 14:29:52 +0000
+@@ -2210,7 +2210,8 @@
+ /* Try to generate sequences that don't involve branches, we can then use
+    conditional instructions */
+ #define BRANCH_COST(speed_p, predictable_p) \
+-  (TARGET_32BIT ? 4 : (optimize > 0 ? 2 : 0))
++  (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \
++		: (optimize > 0 ? 2 : 0))
+ 
+ /* Position Independent Code.  */
+ /* We decide which register to use based on the compilation options and
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99322.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99322.patch
new file mode 100644
index 0000000000..6962c1cecf
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99322.patch
@@ -0,0 +1,53 @@
+	2007-06-06  Joseph Myers  <joseph@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.h (VALID_IWMMXT_REG_MODE): Allow SImode.
+	(ARM_LEGITIMIZE_RELOAD_ADDRESS): Reduce range allowed for SImode
+	offsets with iWMMXt.
+	* config/arm/arm.c (arm_hard_regno_mode_ok): Update for change to
+	VALID_IWMMXT_REG_MODE.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2007-07-05  Mark Shinwell  <shinwell@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-05 12:06:40 +0000
++++ new/gcc/config/arm/arm.c	2010-08-05 14:33:31 +0000
+@@ -16538,7 +16538,7 @@
+ 	return mode == SImode;
+ 
+       if (IS_IWMMXT_REGNUM (regno))
+-	return VALID_IWMMXT_REG_MODE (mode);
++	return VALID_IWMMXT_REG_MODE (mode) && mode != SImode;
+     }
+   
+   /* We allow almost any value to be stored in the general registers.
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-05 14:29:52 +0000
++++ new/gcc/config/arm/arm.h	2010-08-05 14:33:31 +0000
+@@ -1077,7 +1077,7 @@
+   (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
+ 
+ #define VALID_IWMMXT_REG_MODE(MODE) \
+- (arm_vector_mode_supported_p (MODE) || (MODE) == DImode)
++ (arm_vector_mode_supported_p (MODE) || (MODE) == DImode || (MODE) == SImode)
+ 
+ /* Modes valid for Neon D registers.  */
+ #define VALID_NEON_DREG_MODE(MODE) \
+@@ -1364,6 +1364,9 @@
+ 	  else if (TARGET_MAVERICK && TARGET_HARD_FLOAT)		   \
+ 	    /* Need to be careful, -256 is not a valid offset.  */	   \
+ 	    low = val >= 0 ? (val & 0xff) : -((-val) & 0xff);		   \
++	  else if (TARGET_REALLY_IWMMXT && MODE == SImode)		   \
++	    /* Need to be careful, -1024 is not a valid offset.  */	   \
++	    low = val >= 0 ? (val & 0x3ff) : -((-val) & 0x3ff);		   \
+ 	  else if (MODE == SImode					   \
+ 		   || (MODE == SFmode && TARGET_SOFT_FLOAT)		   \
+ 		   || ((MODE == HImode || MODE == QImode) && ! arm_arch4)) \
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99323.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99323.patch
new file mode 100644
index 0000000000..38b6fa3f0e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99323.patch
@@ -0,0 +1,688 @@
+	Vladimir Prus  <vladimir@codesourcery.com>
+	Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (arm_override_options): Warn if mlow-irq-latency is
+	specified in Thumb mode.
+	(load_multiple_sequence): Return 0 if low irq latency is requested.
+	(store_multiple_sequence): Likewise.
+	(arm_gen_load_multiple): Load registers one-by-one if low irq latency
+	is requested.
+	(arm_gen_store_multiple): Likewise.
+	(vfp_output_fldmd): When low_irq_latency is non zero, pop each
+	register separately.
+	(vfp_emit_fstmd): When low_irq_latency is non zero, save each register
+	separately.
+	(arm_get_vfp_saved_size): Adjust saved register size calculation for
+	the above changes.
+	(print_pop_reg_by_ldr): New.
+	(arm_output_epilogue): Use print_pop_reg_by_ldr when low irq latency
+	is requested.
+	(emit_multi_reg_push): Push registers separately if low irq latency
+	is requested.
+	* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Set __low_irq_latency__.
+	(low_irq_latency): Define.
+	(USE_RETURN_INSN): Don't use return insn when low irq latency is
+	requested.
+	* config/arm/lib1funcs.asm (do_pop, do_push): Define as variadic
+	macros. When __low_irq_latency__ is defined, push and pop registers
+	individually.
+	(div0): Use correct punctuation.
+	* config/arm/ieee754-df.S: Adjust syntax of using do_push.
+	* config/arm/ieee754-sf.S: Likewise.
+	* config/arm/bpabi.S: Likewise.
+	* config/arm/arm.opt (mlow-irq-latency): New option.
+	* config/arm/predicates.md (load_multiple_operation): Return false is
+	low irq latency is requested.
+	(store_multiple_operation): Likewise.
+	* config/arm/arm.md (movmemqi): Don't use it if low irq latency is
+	requested.
+	* doc/invoke.texi (-mlow-irq-latency): Add documentation.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2007-06-06  Joseph Myers  <joseph@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-05 14:33:31 +0000
++++ new/gcc/config/arm/arm.c	2010-08-05 15:20:54 +0000
+@@ -1884,6 +1884,13 @@
+ 
+   /* Register global variables with the garbage collector.  */
+   arm_add_gc_roots ();
++
++  if (low_irq_latency && TARGET_THUMB)
++    {
++      warning (0, 
++	       "-mlow-irq-latency has no effect when compiling for Thumb");
++      low_irq_latency = 0;
++    }
+ }
+ 
+ static void
+@@ -9053,6 +9060,9 @@
+   int base_reg = -1;
+   int i;
+ 
++  if (low_irq_latency)
++    return 0;
++
+   /* Can only handle 2, 3, or 4 insns at present,
+      though could be easily extended if required.  */
+   gcc_assert (nops >= 2 && nops <= 4);
+@@ -9282,6 +9292,9 @@
+   int base_reg = -1;
+   int i;
+ 
++  if (low_irq_latency)
++    return 0;
++
+   /* Can only handle 2, 3, or 4 insns at present, though could be easily
+      extended if required.  */
+   gcc_assert (nops >= 2 && nops <= 4);
+@@ -9489,7 +9502,7 @@
+ 
+      As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
+      for counts of 3 or 4 regs.  */
+-  if (arm_tune_xscale && count <= 2 && ! optimize_size)
++  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
+     {
+       rtx seq;
+ 
+@@ -9552,7 +9565,7 @@
+ 
+   /* See arm_gen_load_multiple for discussion of
+      the pros/cons of ldm/stm usage for XScale.  */
+-  if (arm_tune_xscale && count <= 2 && ! optimize_size)
++  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
+     {
+       rtx seq;
+ 
+@@ -11795,6 +11808,21 @@
+ vfp_output_fldmd (FILE * stream, unsigned int base, int reg, int count)
+ {
+   int i;
++  int offset;
++
++  if (low_irq_latency)
++    {
++      /* Output a sequence of FLDD instructions.  */
++      offset = 0;
++      for (i = reg; i < reg + count; ++i, offset += 8)
++	{
++	  fputc ('\t', stream);
++	  asm_fprintf (stream, "fldd\td%d, [%r,#%d]\n", i, base, offset);
++	}
++      asm_fprintf (stream, "\tadd\tsp, sp, #%d\n", count * 8);
++      return;
++    }
++
+ 
+   /* Workaround ARM10 VFPr1 bug.  */
+   if (count == 2 && !arm_arch6)
+@@ -11865,6 +11893,56 @@
+   rtx tmp, reg;
+   int i;
+ 
++  if (low_irq_latency)
++    {
++      int saved_size;
++      rtx sp_insn;
++
++      if (!count)
++	return 0;
++
++      saved_size = count * GET_MODE_SIZE (DFmode);
++
++      /* Since fstd does not have postdecrement addressing mode,
++	 we first decrement stack pointer and then use base+offset
++	 stores for VFP registers. The ARM EABI unwind information 
++	 can't easily describe base+offset loads, so we attach
++	 a note for the effects of the whole block in the first insn, 
++	 and  avoid marking the subsequent instructions 
++	 with RTX_FRAME_RELATED_P.  */
++      sp_insn = gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx,
++			    GEN_INT (-saved_size));
++      sp_insn = emit_insn (sp_insn);
++      RTX_FRAME_RELATED_P (sp_insn) = 1;
++
++      dwarf = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (count + 1));
++      XVECEXP (dwarf, 0, 0) = 
++	gen_rtx_SET (VOIDmode, stack_pointer_rtx,
++		     plus_constant (stack_pointer_rtx, -saved_size));
++      
++      /* push double VFP registers to stack */
++      for (i = 0; i < count; ++i )
++	{
++	  rtx reg;
++	  rtx mem;
++	  rtx addr;
++	  rtx insn;
++	  reg = gen_rtx_REG (DFmode, base_reg + 2*i);
++	  addr = (i == 0) ? stack_pointer_rtx
++	    : gen_rtx_PLUS (SImode, stack_pointer_rtx,
++			    GEN_INT (i * GET_MODE_SIZE (DFmode)));
++	  mem = gen_frame_mem (DFmode, addr);
++	  insn = emit_move_insn (mem, reg);
++	  XVECEXP (dwarf, 0, i+1) = 
++	    gen_rtx_SET (VOIDmode, mem, reg);
++	}
++
++      REG_NOTES (sp_insn) = gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR, dwarf,
++					       REG_NOTES (sp_insn));
++      
++      return saved_size;
++    }
++
+   /* Workaround ARM10 VFPr1 bug.  Data corruption can occur when exactly two
+      register pairs are stored by a store multiple insn.  We avoid this
+      by pushing an extra pair.  */
+@@ -13307,7 +13385,7 @@
+ 	      if (count > 0)
+ 		{
+ 		  /* Workaround ARM10 VFPr1 bug.  */
+-		  if (count == 2 && !arm_arch6)
++		  if (count == 2 && !arm_arch6 && !low_irq_latency)
+ 		    count++;
+ 		  saved += count * 8;
+ 		}
+@@ -13645,6 +13723,41 @@
+ 
+ }
+ 
++/* Generate to STREAM a code sequence that pops registers identified 
++   in REGS_MASK from SP. SP is incremented as the result.
++*/
++static void
++print_pop_reg_by_ldr (FILE *stream, int regs_mask, int rfe)
++{
++  int reg;
++
++  gcc_assert (! (regs_mask & (1 << SP_REGNUM)));
++  
++  for (reg = 0; reg < PC_REGNUM; ++reg)
++    if (regs_mask & (1 << reg))
++      asm_fprintf (stream, "\tldr\t%r, [%r], #4\n",
++		   reg, SP_REGNUM); 
++
++  if (regs_mask & (1 << PC_REGNUM))
++    {
++      if (rfe)
++	/* When returning from exception, we need to
++	   copy SPSR to CPSR.  There are two ways to do
++	   that: the ldm instruction with "^" suffix,
++	   and movs instruction.  The latter would
++	   require that we load from stack to some
++	   scratch register, and then move to PC.
++	   Therefore, we'd need extra instruction and
++	   have to make sure we actually have a spare
++	   register.  Using ldm with a single register
++	   is simler.  */
++	asm_fprintf (stream, "\tldm\tsp!, {pc}^\n");
++      else
++	asm_fprintf (stream, "\tldr\t%r, [%r], #4\n",
++		     PC_REGNUM, SP_REGNUM); 
++    }
++}
++
+ const char *
+ arm_output_epilogue (rtx sibling)
+ {
+@@ -14018,22 +14131,19 @@
+ 	 to load use the LDR instruction - it is faster.  For Thumb-2
+ 	 always use pop and the assembler will pick the best instruction.*/
+       if (TARGET_ARM && saved_regs_mask == (1 << LR_REGNUM)
+-	  && !IS_INTERRUPT(func_type))
++	  && !IS_INTERRUPT (func_type))
+ 	{
+ 	  asm_fprintf (f, "\tldr\t%r, [%r], #4\n", LR_REGNUM, SP_REGNUM);
+ 	}
+       else if (saved_regs_mask)
+ 	{
+-	  if (saved_regs_mask & (1 << SP_REGNUM))
+-	    /* Note - write back to the stack register is not enabled
+-	       (i.e. "ldmfd sp!...").  We know that the stack pointer is
+-	       in the list of registers and if we add writeback the
+-	       instruction becomes UNPREDICTABLE.  */
+-	    print_multi_reg (f, "ldmfd\t%r, ", SP_REGNUM, saved_regs_mask,
+-			     rfe);
+-	  else if (TARGET_ARM)
+-	    print_multi_reg (f, "ldmfd\t%r!, ", SP_REGNUM, saved_regs_mask,
+-			     rfe);
++	  gcc_assert ( ! (saved_regs_mask & (1 << SP_REGNUM)));
++	  if (TARGET_ARM)
++	    if (low_irq_latency)
++	      print_pop_reg_by_ldr (f, saved_regs_mask, rfe);
++	    else
++	      print_multi_reg (f, "ldmfd\t%r!, ", SP_REGNUM, saved_regs_mask,
++			       rfe);
+ 	  else
+ 	    print_multi_reg (f, "pop\t", SP_REGNUM, saved_regs_mask, 0);
+ 	}
+@@ -14154,6 +14264,32 @@
+ 
+   gcc_assert (num_regs && num_regs <= 16);
+ 
++  if (low_irq_latency)
++    {
++      rtx insn = 0;
++
++      /* Emit a series of ldr instructions rather rather than a single ldm.  */
++      /* TODO: Use ldrd where possible.  */
++      gcc_assert (! (mask & (1 << SP_REGNUM)));
++
++      for (i = LAST_ARM_REGNUM; i >= 0; --i)
++        {
++          if (mask & (1 << i))
++
++            {
++              rtx reg, where, mem;
++
++	      reg = gen_rtx_REG (SImode, i);
++	      where = gen_rtx_PRE_DEC (SImode, stack_pointer_rtx);
++	      mem = gen_rtx_MEM (SImode, where);
++	      insn = emit_move_insn (mem, reg);
++	      RTX_FRAME_RELATED_P (insn) = 1;
++            }
++        }
++
++      return insn;
++    }
++
+   /* We don't record the PC in the dwarf frame information.  */
+   num_dwarf_regs = num_regs;
+   if (mask & (1 << PC_REGNUM))
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-05 14:33:31 +0000
++++ new/gcc/config/arm/arm.h	2010-08-05 15:20:54 +0000
+@@ -101,6 +101,8 @@
+ 	      builtin_define ("__ARM_PCS");		\
+ 	    builtin_define ("__ARM_EABI__");		\
+ 	  }						\
++	if (low_irq_latency)				\
++	  builtin_define ("__low_irq_latency__");	\
+     } while (0)
+ 
+ /* The various ARM cores.  */
+@@ -449,6 +451,10 @@
+ /* Nonzero if chip supports integer division instruction.  */
+ extern int arm_arch_hwdiv;
+ 
++/* Nonzero if we should minimize interrupt latency of the
++   generated code.  */
++extern int low_irq_latency;
++
+ #ifndef TARGET_DEFAULT
+ #define TARGET_DEFAULT  (MASK_APCS_FRAME)
+ #endif
+@@ -1823,9 +1829,10 @@
+ /* Determine if the epilogue should be output as RTL.
+    You should override this if you define FUNCTION_EXTRA_EPILOGUE.  */
+ /* This is disabled for Thumb-2 because it will confuse the
+-   conditional insn counter.  */
++   conditional insn counter.
++   Do not use a return insn if we're avoiding ldm/stm instructions.  */
+ #define USE_RETURN_INSN(ISCOND)				\
+-  (TARGET_ARM ? use_return_insn (ISCOND, NULL) : 0)
++  ((TARGET_ARM && !low_irq_latency) ? use_return_insn (ISCOND, NULL) : 0)
+ 
+ /* Definitions for register eliminations.
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-05 12:06:40 +0000
++++ new/gcc/config/arm/arm.md	2010-08-05 15:20:54 +0000
+@@ -6587,7 +6587,7 @@
+    (match_operand:BLK 1 "general_operand" "")
+    (match_operand:SI 2 "const_int_operand" "")
+    (match_operand:SI 3 "const_int_operand" "")]
+-  "TARGET_EITHER"
++  "TARGET_EITHER && !low_irq_latency"
+   "
+   if (TARGET_32BIT)
+     {
+
+=== modified file 'gcc/config/arm/arm.opt'
+--- old/gcc/config/arm/arm.opt	2009-06-18 11:24:10 +0000
++++ new/gcc/config/arm/arm.opt	2010-08-05 15:20:54 +0000
+@@ -161,6 +161,10 @@
+ Target Report Mask(NEON_VECTORIZE_QUAD)
+ Use Neon quad-word (rather than double-word) registers for vectorization
+ 
++mlow-irq-latency
++Target Report Var(low_irq_latency)
++Try to reduce interrupt latency of the generated code
++
+ mword-relocations
+ Target Report Var(target_word_relocations) Init(TARGET_DEFAULT_WORD_RELOCATIONS)
+ Only generate absolute relocations on word sized values.
+
+=== modified file 'gcc/config/arm/bpabi.S'
+--- old/gcc/config/arm/bpabi.S	2009-12-17 15:37:23 +0000
++++ new/gcc/config/arm/bpabi.S	2010-08-05 15:20:54 +0000
+@@ -116,16 +116,17 @@
+ 	test_div_by_zero signed
+ 
+ 	sub sp, sp, #8
+-#if defined(__thumb2__)
++/* Low latency and Thumb-2 do_push implementations can't push sp directly.  */
++#if defined(__thumb2__) || defined(__irq_low_latency__)
+ 	mov ip, sp
+-	push {ip, lr}
++	do_push (ip, lr)
+ #else
+-	do_push {sp, lr}
++	stmfd sp!, {sp, lr}
+ #endif
+ 	bl SYM(__gnu_ldivmod_helper) __PLT__
+ 	ldr lr, [sp, #4]
+ 	add sp, sp, #8
+-	do_pop {r2, r3}
++	do_pop (r2, r3)
+ 	RET
+ 	
+ #endif /* L_aeabi_ldivmod */
+@@ -136,16 +137,17 @@
+ 	test_div_by_zero unsigned
+ 
+ 	sub sp, sp, #8
+-#if defined(__thumb2__)
++/* Low latency and Thumb-2 do_push implementations can't push sp directly.  */
++#if defined(__thumb2__) || defined(__irq_low_latency__)
+ 	mov ip, sp
+-	push {ip, lr}
++	do_push (ip, lr)
+ #else
+-	do_push {sp, lr}
++	stmfd sp!, {sp, lr}
+ #endif
+ 	bl SYM(__gnu_uldivmod_helper) __PLT__
+ 	ldr lr, [sp, #4]
+ 	add sp, sp, #8
+-	do_pop {r2, r3}
++	do_pop (r2, r3)
+ 	RET
+ 	
+ #endif /* L_aeabi_divmod */
+
+=== modified file 'gcc/config/arm/ieee754-df.S'
+--- old/gcc/config/arm/ieee754-df.S	2009-06-05 12:52:36 +0000
++++ new/gcc/config/arm/ieee754-df.S	2010-08-05 15:20:54 +0000
+@@ -83,7 +83,7 @@
+ ARM_FUNC_START adddf3
+ ARM_FUNC_ALIAS aeabi_dadd adddf3
+ 
+-1:	do_push	{r4, r5, lr}
++1:	do_push	(r4, r5, lr)
+ 
+ 	@ Look for zeroes, equal values, INF, or NAN.
+ 	shift1	lsl, r4, xh, #1
+@@ -427,7 +427,7 @@
+ 	do_it	eq, t
+ 	moveq	r1, #0
+ 	RETc(eq)
+-	do_push	{r4, r5, lr}
++	do_push	(r4, r5, lr)
+ 	mov	r4, #0x400		@ initial exponent
+ 	add	r4, r4, #(52-1 - 1)
+ 	mov	r5, #0			@ sign bit is 0
+@@ -447,7 +447,7 @@
+ 	do_it	eq, t
+ 	moveq	r1, #0
+ 	RETc(eq)
+-	do_push	{r4, r5, lr}
++	do_push	(r4, r5, lr)
+ 	mov	r4, #0x400		@ initial exponent
+ 	add	r4, r4, #(52-1 - 1)
+ 	ands	r5, r0, #0x80000000	@ sign bit in r5
+@@ -481,7 +481,7 @@
+ 	RETc(eq)			@ we are done already.
+ 
+ 	@ value was denormalized.  We can normalize it now.
+-	do_push	{r4, r5, lr}
++	do_push	(r4, r5, lr)
+ 	mov	r4, #0x380		@ setup corresponding exponent
+ 	and	r5, xh, #0x80000000	@ move sign bit in r5
+ 	bic	xh, xh, #0x80000000
+@@ -508,9 +508,9 @@
+ 	@ compatibility.
+ 	adr	ip, LSYM(f0_ret)
+ 	@ Push pc as well so that RETLDM works correctly.
+-	do_push	{r4, r5, ip, lr, pc}
++	do_push	(r4, r5, ip, lr, pc)
+ #else
+-	do_push	{r4, r5, lr}
++	do_push	(r4, r5, lr)
+ #endif
+ 
+ 	mov	r5, #0
+@@ -534,9 +534,9 @@
+ 	@ compatibility.
+ 	adr	ip, LSYM(f0_ret)
+ 	@ Push pc as well so that RETLDM works correctly.
+-	do_push	{r4, r5, ip, lr, pc}
++	do_push	(r4, r5, ip, lr, pc)
+ #else
+-	do_push	{r4, r5, lr}
++	do_push	(r4, r5, lr)
+ #endif
+ 
+ 	ands	r5, ah, #0x80000000	@ sign bit in r5
+@@ -585,7 +585,7 @@
+ 	@ Legacy code expects the result to be returned in f0.  Copy it
+ 	@ there as well.
+ LSYM(f0_ret):
+-	do_push	{r0, r1}
++	do_push	(r0, r1)
+ 	ldfd	f0, [sp], #8
+ 	RETLDM
+ 
+@@ -602,7 +602,7 @@
+ 
+ ARM_FUNC_START muldf3
+ ARM_FUNC_ALIAS aeabi_dmul muldf3
+-	do_push	{r4, r5, r6, lr}
++	do_push	(r4, r5, r6, lr)
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -910,7 +910,7 @@
+ ARM_FUNC_START divdf3
+ ARM_FUNC_ALIAS aeabi_ddiv divdf3
+ 	
+-	do_push	{r4, r5, r6, lr}
++	do_push	(r4, r5, r6, lr)
+ 
+ 	@ Mask out exponents, trap any zero/denormal/INF/NAN.
+ 	mov	ip, #0xff
+@@ -1195,7 +1195,7 @@
+ 
+ 	@ The status-returning routines are required to preserve all
+ 	@ registers except ip, lr, and cpsr.
+-6:	do_push	{r0, lr}
++6:	do_push	(r0, lr)
+ 	ARM_CALL cmpdf2
+ 	@ Set the Z flag correctly, and the C flag unconditionally.
+ 	cmp	r0, #0
+
+=== modified file 'gcc/config/arm/ieee754-sf.S'
+--- old/gcc/config/arm/ieee754-sf.S	2009-06-05 12:52:36 +0000
++++ new/gcc/config/arm/ieee754-sf.S	2010-08-05 15:20:54 +0000
+@@ -481,7 +481,7 @@
+ 	and	r3, ip, #0x80000000
+ 
+ 	@ Well, no way to make it shorter without the umull instruction.
+-	do_push	{r3, r4, r5}
++	do_push	(r3, r4, r5)
+ 	mov	r4, r0, lsr #16
+ 	mov	r5, r1, lsr #16
+ 	bic	r0, r0, r4, lsl #16
+@@ -492,7 +492,7 @@
+ 	mla	r0, r4, r1, r0
+ 	adds	r3, r3, r0, lsl #16
+ 	adc	r1, ip, r0, lsr #16
+-	do_pop	{r0, r4, r5}
++	do_pop	(r0, r4, r5)
+ 
+ #else
+ 
+@@ -882,7 +882,7 @@
+ 
+ 	@ The status-returning routines are required to preserve all
+ 	@ registers except ip, lr, and cpsr.
+-6:	do_push	{r0, r1, r2, r3, lr}
++6:	do_push	(r0, r1, r2, r3, lr)
+ 	ARM_CALL cmpsf2
+ 	@ Set the Z flag correctly, and the C flag unconditionally.
+ 	cmp	r0, #0
+
+=== modified file 'gcc/config/arm/lib1funcs.asm'
+--- old/gcc/config/arm/lib1funcs.asm	2010-04-02 18:54:46 +0000
++++ new/gcc/config/arm/lib1funcs.asm	2010-08-05 15:20:54 +0000
+@@ -254,8 +254,8 @@
+ .macro shift1 op, arg0, arg1, arg2
+ 	\op	\arg0, \arg1, \arg2
+ .endm
+-#define do_push	push
+-#define do_pop	pop
++#define do_push(...)	push {__VA_ARGS__}
++#define do_pop(...)	pop {__VA_ARGS__}
+ #define COND(op1, op2, cond) op1 ## op2 ## cond
+ /* Perform an arithmetic operation with a variable shift operand.  This
+    requires two instructions and a scratch register on Thumb-2.  */
+@@ -269,8 +269,42 @@
+ .macro shift1 op, arg0, arg1, arg2
+ 	mov	\arg0, \arg1, \op \arg2
+ .endm
+-#define do_push	stmfd sp!,
+-#define do_pop	ldmfd sp!,
++#if defined(__low_irq_latency__)        
++#define do_push(...) \
++  _buildN1(do_push, _buildC1(__VA_ARGS__))( __VA_ARGS__)
++#define _buildN1(BASE, X)	_buildN2(BASE, X)
++#define _buildN2(BASE, X)	BASE##X
++#define _buildC1(...)		_buildC2(__VA_ARGS__,9,8,7,6,5,4,3,2,1)
++#define _buildC2(a1,a2,a3,a4,a5,a6,a7,a8,a9,c,...) c
++        
++#define do_push1(r1) str r1, [sp, #-4]!
++#define do_push2(r1, r2) str r2, [sp, #-4]! ; str r1, [sp, #-4]!
++#define do_push3(r1, r2, r3) str r3, [sp, #-4]! ; str r2, [sp, #-4]!; str r1, [sp, #-4]!
++#define do_push4(r1, r2, r3, r4) \
++        do_push3 (r2, r3, r4);\
++        do_push1 (r1)
++#define do_push5(r1, r2, r3, r4, r5) \
++        do_push4 (r2, r3, r4, r5);\
++        do_push1 (r1)
++        
++#define do_pop(...) \
++_buildN1(do_pop, _buildC1(__VA_ARGS__))( __VA_ARGS__)
++        
++#define do_pop1(r1) ldr r1, [sp], #4
++#define do_pop2(r1, r2) ldr r1, [sp], #4 ; ldr r2, [sp], #4
++#define do_pop3(r1, r2, r3) ldr r1, [sp], #4 ; str r2, [sp], #4; str r3, [sp], #4
++#define do_pop4(r1, r2, r3, r4) \
++        do_pop1 (r1);\
++        do_pup3 (r2, r3, r4)
++#define do_pop5(r1, r2, r3, r4, r5) \
++        do_pop1 (r1);\
++        do_pop4 (r2, r3, r4, r5)
++#else
++#define do_push(...)    stmfd sp!, { __VA_ARGS__}
++#define do_pop(...)     ldmfd sp!, {__VA_ARGS__}
++#endif
++
++        
+ #define COND(op1, op2, cond) op1 ## cond ## op2
+ .macro shiftop name, dest, src1, src2, shiftop, shiftreg, tmp
+ 	\name \dest, \src1, \src2, \shiftop \shiftreg
+@@ -1260,7 +1294,7 @@
+ 	ARM_FUNC_START div0
+ #endif
+ 
+-	do_push	{r1, lr}
++	do_push	(r1, lr)
+ 	mov	r0, #SIGFPE
+ 	bl	SYM(raise) __PLT__
+ 	RETLDM	r1
+@@ -1277,7 +1311,7 @@
+ #if defined __ARM_EABI__ && defined __linux__
+ @ EABI GNU/Linux call to cacheflush syscall.
+ 	ARM_FUNC_START clear_cache
+-	do_push	{r7}
++	do_push	(r7)
+ #if __ARM_ARCH__ >= 7 || defined(__ARM_ARCH_6T2__)
+ 	movw	r7, #2
+ 	movt	r7, #0xf
+@@ -1287,7 +1321,7 @@
+ #endif
+ 	mov	r2, #0
+ 	swi	0
+-	do_pop	{r7}
++	do_pop	(r7)
+ 	RET
+ 	FUNC_END clear_cache
+ #else
+@@ -1490,7 +1524,7 @@
+ 	push	{r4, lr}
+ # else
+ ARM_FUNC_START clzdi2
+-	do_push	{r4, lr}
++	do_push	(r4, lr)
+ # endif
+ 	cmp	xxh, #0
+ 	bne	1f
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-07-30 14:17:05 +0000
++++ new/gcc/config/arm/predicates.md	2010-08-05 15:20:54 +0000
+@@ -328,6 +328,9 @@
+   HOST_WIDE_INT i = 1, base = 0;
+   rtx elt;
+ 
++  if (low_irq_latency)
++    return false;
++
+   if (count <= 1
+       || GET_CODE (XVECEXP (op, 0, 0)) != SET)
+     return false;
+@@ -385,6 +388,9 @@
+   HOST_WIDE_INT i = 1, base = 0;
+   rtx elt;
+ 
++  if (low_irq_latency)
++    return false;
++
+   if (count <= 1
+       || GET_CODE (XVECEXP (op, 0, 0)) != SET)
+     return false;
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-07-29 17:03:20 +0000
++++ new/gcc/doc/invoke.texi	2010-08-05 15:20:54 +0000
+@@ -469,6 +469,7 @@
+ -mtpcs-frame  -mtpcs-leaf-frame @gol
+ -mcaller-super-interworking  -mcallee-super-interworking @gol
+ -mtp=@var{name} @gol
++-mlow-irq-latency @gol
+ -mword-relocations @gol
+ -mfix-cortex-m3-ldrd}
+ 
+@@ -9489,6 +9490,12 @@
+ @code{,}, @code{!}, @code{|}, and @code{*} as needed.
+ 
+ 
++@item -mlow-irq-latency
++@opindex mlow-irq-latency
++Avoid instructions with high interrupt latency when generating
++code.  This can increase code size and reduce performance.
++The option is off by default.
++
+ @end table
+ 
+ The conditional text @code{X} in a %@{@code{S}:@code{X}@} or similar
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99324.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99324.patch
new file mode 100644
index 0000000000..40b368862d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99324.patch
@@ -0,0 +1,109 @@
+	Julian Brown  <julian@codesourcery.com>
+	Mark Shinwell  <mark@codesourcery.com>
+
+	gcc/
+	* regrename.c (addresses.h): Move include of addresses.h after
+	include of flags.h.
+	* recog.c: Likewise.
+	* regcprop.c: Likewise.
+	* config/arm/arm.h (CLASS_LIKELY_SPILLED_P): Check against
+	LO_REGS only for Thumb-1.
+	(MODE_BASE_REG_CLASS): Restrict base registers to those which can
+	be used in short instructions when optimising for size on Thumb-2.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	Vladimir Prus  <vladimir@codesourcery.com>
+ 	Julian Brown  <julian@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-05 15:20:54 +0000
++++ new/gcc/config/arm/arm.h	2010-08-05 15:28:47 +0000
+@@ -1254,11 +1254,14 @@
+      || reg_classes_intersect_p (VFP_REGS, (CLASS))	\
+    : 0)
+ 
+-/* We need to define this for LO_REGS on thumb.  Otherwise we can end up
+-   using r0-r4 for function arguments, r7 for the stack frame and don't
+-   have enough left over to do doubleword arithmetic.  */
++/* We need to define this for LO_REGS on Thumb-1.  Otherwise we can end up
++   using r0-r4 for function arguments, r7 for the stack frame and don't have
++   enough left over to do doubleword arithmetic.  For Thumb-2 all the
++   potentially problematic instructions accept high registers so this is not
++   necessary.  Care needs to be taken to avoid adding new Thumb-2 patterns
++   that require many low registers.  */
+ #define CLASS_LIKELY_SPILLED_P(CLASS)	\
+-    ((TARGET_THUMB && (CLASS) == LO_REGS)	\
++    ((TARGET_THUMB1 && (CLASS) == LO_REGS)	\
+      || (CLASS) == CC_REG)
+ 
+ /* The class value for index registers, and the one for base regs.  */
+@@ -1269,7 +1272,7 @@
+    when addressing quantities in QI or HI mode; if we don't know the
+    mode, then we must be conservative.  */
+ #define MODE_BASE_REG_CLASS(MODE)					\
+-    (TARGET_32BIT ? CORE_REGS :					\
++    (TARGET_ARM || (TARGET_THUMB2 && !optimize_size) ? CORE_REGS :	\
+      (((MODE) == SImode) ? BASE_REGS : LO_REGS))
+ 
+ /* For Thumb we can not support SP+reg addressing, so we return LO_REGS
+
+=== modified file 'gcc/recog.c'
+--- old/gcc/recog.c	2010-04-02 18:54:46 +0000
++++ new/gcc/recog.c	2010-08-05 15:28:47 +0000
+@@ -31,10 +31,10 @@
+ #include "hard-reg-set.h"
+ #include "recog.h"
+ #include "regs.h"
+-#include "addresses.h"
+ #include "expr.h"
+ #include "function.h"
+ #include "flags.h"
++#include "addresses.h"
+ #include "real.h"
+ #include "toplev.h"
+ #include "basic-block.h"
+
+=== modified file 'gcc/regcprop.c'
+--- old/gcc/regcprop.c	2010-02-26 11:01:28 +0000
++++ new/gcc/regcprop.c	2010-08-05 15:28:47 +0000
+@@ -26,7 +26,6 @@
+ #include "tm_p.h"
+ #include "insn-config.h"
+ #include "regs.h"
+-#include "addresses.h"
+ #include "hard-reg-set.h"
+ #include "basic-block.h"
+ #include "reload.h"
+@@ -34,6 +33,7 @@
+ #include "function.h"
+ #include "recog.h"
+ #include "flags.h"
++#include "addresses.h"
+ #include "toplev.h"
+ #include "obstack.h"
+ #include "timevar.h"
+
+=== modified file 'gcc/regrename.c'
+--- old/gcc/regrename.c	2010-04-02 18:54:46 +0000
++++ new/gcc/regrename.c	2010-08-05 15:28:47 +0000
+@@ -26,7 +26,6 @@
+ #include "tm_p.h"
+ #include "insn-config.h"
+ #include "regs.h"
+-#include "addresses.h"
+ #include "hard-reg-set.h"
+ #include "basic-block.h"
+ #include "reload.h"
+@@ -34,6 +33,7 @@
+ #include "function.h"
+ #include "recog.h"
+ #include "flags.h"
++#include "addresses.h"
+ #include "toplev.h"
+ #include "obstack.h"
+ #include "timevar.h"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99325.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99325.patch
new file mode 100644
index 0000000000..0dbb3dbf7f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99325.patch
@@ -0,0 +1,174 @@
+	http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00811.html
+
+	Kazu Hirata  <kazu@codesourcery.com>
+
+	gcc/testsuite/
+	* gcc.target/arm/vfp-ldmdbd.c, gcc.target/arm/vfp-ldmdbs.c,
+	gcc.target/arm/vfp-ldmiad.c, gcc.target/arm/vfp-ldmias.c,
+	gcc.target/arm/vfp-stmdbd.c, gcc.target/arm/vfp-stmdbs.c,
+	gcc.target/arm/vfp-stmiad.c, gcc.target/arm/vfp-stmias.c: New.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	Julian Brown  <julian@codesourcery.com>
+ 	Mark Shinwell  <mark@codesourcery.com>
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-ldmdbd.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++extern void bar (double);
++
++void
++foo (double *p, double a, int n)
++{
++  do
++    bar (*--p + a);
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fldmdbd" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-ldmdbs.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-ldmdbs.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-ldmdbs.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++extern void baz (float);
++
++void
++foo (float *p, float a, int n)
++{
++  do
++    bar (*--p + a);
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fldmdbs" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-ldmiad.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-ldmiad.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-ldmiad.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++extern void bar (double);
++
++void
++foo (double *p, double a, int n)
++{
++  do
++    bar (*p++ + a);
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fldmiad" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-ldmias.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-ldmias.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-ldmias.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++extern void baz (float);
++
++void
++foo (float *p, float a, int n)
++{
++  do
++    bar (*p++ + a);
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fldmias" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-stmdbd.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-stmdbd.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-stmdbd.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++void
++foo (double *p, double a, double b, int n)
++{
++  double c = a + b;
++  do
++    *--p = c;
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fstmdbd" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-stmdbs.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-stmdbs.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-stmdbs.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++void
++foo (float *p, float a, float b, int n)
++{
++  float c = a + b;
++  do
++    *--p = c;
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fstmdbs" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-stmiad.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-stmiad.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-stmiad.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++void
++foo (double *p, double a, double b, int n)
++{
++  double c = a + b;
++  do
++    *p++ = c;
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fstmiad" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/vfp-stmias.c'
+--- old/gcc/testsuite/gcc.target/arm/vfp-stmias.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/vfp-stmias.c	2010-08-05 15:37:24 +0000
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_vfp_ok } */
++/* { dg-options "-O2 -mfpu=vfp -mfloat-abi=softfp" } */
++
++void
++foo (float *p, float a, float b, int n)
++{
++  float c = a + b;
++  do
++    *p++ = c;
++  while (n--);
++}
++
++/* { dg-final { scan-assembler "fstmias" } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99326.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99326.patch
new file mode 100644
index 0000000000..59b598ba70
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99326.patch
@@ -0,0 +1,86 @@
+	
+	http://gcc.gnu.org/ml/gcc-patches/2006-03/msg00038.html
+
+	* g++.dg/other/armv7m-1.C: New.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 
+ 	http://gcc.gnu.org/ml/gcc-patches/2006-04/msg00811.html
+ 
+
+=== added file 'gcc/testsuite/g++.dg/other/armv7m-1.C'
+--- old/gcc/testsuite/g++.dg/other/armv7m-1.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/other/armv7m-1.C	2010-08-05 16:23:43 +0000
+@@ -0,0 +1,69 @@
++/* { dg-do run { target arm*-*-* } } */
++/* Test Armv7m interrupt routines.  */
++#include <stdlib.h>
++
++#ifdef __ARM_ARCH_7M__
++void __attribute__((interrupt))
++foo(void)
++{
++  long long n;
++  long p;
++  asm volatile ("" : "=r" (p) : "0" (&n));
++  if (p & 4)
++    abort ();
++  return;
++}
++
++void __attribute__((interrupt))
++bar(void)
++{
++  throw 42;
++}
++
++int main()
++{
++  int a;
++  int before;
++  int after;
++  volatile register int sp asm("sp");
++
++  asm volatile ("mov %0, sp\n"
++		"blx %2\n"
++		"mov %1, sp\n"
++		: "=&r" (before), "=r" (after) : "r" (foo)
++		: "memory", "cc", "r0", "r1", "r2", "r3", "ip", "lr");
++  if (before != after)
++    abort();
++  asm volatile ("mov %0, sp\n"
++		"sub sp, sp, #4\n"
++		"blx %2\n"
++		"add sp, sp, #4\n"
++		"mov %1, sp\n"
++		: "=&r" (before), "=r" (after) : "r" (foo)
++		: "memory", "cc", "r0", "r1", "r2", "r3", "ip", "lr");
++  if (before != after)
++    abort();
++  before = sp;
++  try
++    {
++      bar();
++    }
++  catch (int i)
++    {
++      if (i != 42)
++	abort();
++    }
++  catch (...)
++    {
++      abort();
++    }
++  if (before != sp)
++    abort();
++  exit(0);
++}
++#else
++int main()
++{
++  exit (0);
++}
++#endif
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99327.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99327.patch
new file mode 100644
index 0000000000..5d489aab69
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99327.patch
@@ -0,0 +1,132 @@
+	Backport from FSF mainline:
+
+	Mark Shinwell  <shinwell@codesourcery.com>
+	Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* config/arm/thumb2.md (thumb2_movsi_insn): Split ldr and str
+	alternatives according to use of high and low regs.
+	* config/arm/vfp.md (thumb2_movsi_vfp): Likewise.
+	* config/arm/arm.h (CONDITIONAL_REGISTER_USAGE): Use high regs when
+	optimizing for size on Thumb-2.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Merge from Sourcery G++ 4.4:
+ 	
+ 	http://gcc.gnu.org/ml/gcc-patches/2006-03/msg00038.html
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-05 15:28:47 +0000
++++ new/gcc/config/arm/arm.h	2010-08-05 16:34:46 +0000
+@@ -783,12 +783,11 @@
+ 	fixed_regs[regno] = call_used_regs[regno] = 1;		\
+     }								\
+ 								\
+-  if (TARGET_THUMB && optimize_size)				\
+-    {								\
+-      /* When optimizing for size, it's better not to use	\
+-	 the HI regs, because of the overhead of stacking 	\
+-	 them.  */						\
+-      /* ??? Is this still true for thumb2?  */			\
++  if (TARGET_THUMB1 && optimize_size)				\
++    {                                                           \
++      /* When optimizing for size on Thumb-1, it's better not	\
++        to use the HI regs, because of the overhead of		\
++        stacking them.  */                                      \
+       for (regno = FIRST_HI_REGNUM;				\
+ 	   regno <= LAST_HI_REGNUM; ++regno)			\
+ 	fixed_regs[regno] = call_used_regs[regno] = 1;		\
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-04-02 07:32:00 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-05 16:34:46 +0000
+@@ -223,9 +223,14 @@
+    (set_attr "neg_pool_range" "*,*,*,0,*")]
+ )
+ 
++;; We have two alternatives here for memory loads (and similarly for stores)
++;; to reflect the fact that the permissible constant pool ranges differ
++;; between ldr instructions taking low regs and ldr instructions taking high
++;; regs.  The high register alternatives are not taken into account when
++;; choosing register preferences in order to reflect their expense.
+ (define_insn "*thumb2_movsi_insn"
+-  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m")
+-	(match_operand:SI 1 "general_operand"	   "rk ,I,K,j,mi,rk"))]
++  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l, *hk,m,*m")
++	(match_operand:SI 1 "general_operand"	   "rk ,I,K,j,mi,*mi,l,*hk"))]
+   "TARGET_THUMB2 && ! TARGET_IWMMXT
+    && !(TARGET_HARD_FLOAT && TARGET_VFP)
+    && (   register_operand (operands[0], SImode)
+@@ -236,11 +241,13 @@
+    mvn%?\\t%0, #%B1
+    movw%?\\t%0, %1
+    ldr%?\\t%0, %1
++   ldr%?\\t%0, %1
++   str%?\\t%1, %0
+    str%?\\t%1, %0"
+-  [(set_attr "type" "*,*,*,*,load1,store1")
++  [(set_attr "type" "*,*,*,*,load1,load1,store1,store1")
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "*,*,*,*,4096,*")
+-   (set_attr "neg_pool_range" "*,*,*,*,0,*")]
++   (set_attr "pool_range" "*,*,*,*,1020,4096,*,*")
++   (set_attr "neg_pool_range" "*,*,*,*,0,0,*,*")]
+ )
+ 
+ (define_insn "tls_load_dot_plus_four"
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-07-30 14:17:05 +0000
++++ new/gcc/config/arm/vfp.md	2010-08-05 16:34:46 +0000
+@@ -86,9 +86,11 @@
+    (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
+ )
+ 
++;; See thumb2.md:thumb2_movsi_insn for an explanation of the split
++;; high/low register alternatives for loads and stores here.
+ (define_insn "*thumb2_movsi_vfp"
+-  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,rk,m,*t,r, *t,*t, *Uv")
+-      (match_operand:SI 1 "general_operand"	   "rk, I,K,j,mi,rk,r,*t,*t,*Uvi,*t"))]
++  [(set (match_operand:SI 0 "nonimmediate_operand" "=rk,r,r,r,l,*hk,m,*m,*t,r, *t,*t, *Uv")
++      (match_operand:SI 1 "general_operand"	   "rk, I,K,j,mi,*mi,l,*hk,r,*t,*t,*Uvi,*t"))]
+   "TARGET_THUMB2 && TARGET_VFP && TARGET_HARD_FLOAT
+    && (   s_register_operand (operands[0], SImode)
+        || s_register_operand (operands[1], SImode))"
+@@ -102,25 +104,27 @@
+     case 3:
+       return \"movw%?\\t%0, %1\";
+     case 4:
++    case 5:
+       return \"ldr%?\\t%0, %1\";
+-    case 5:
++    case 6:
++    case 7:
+       return \"str%?\\t%1, %0\";
+-    case 6:
++    case 8:
+       return \"fmsr%?\\t%0, %1\\t%@ int\";
+-    case 7:
++    case 9:
+       return \"fmrs%?\\t%0, %1\\t%@ int\";
+-    case 8:
++    case 10:
+       return \"fcpys%?\\t%0, %1\\t%@ int\";
+-    case 9: case 10:
++    case 11: case 12:
+       return output_move_vfp (operands);
+     default:
+       gcc_unreachable ();
+     }
+   "
+   [(set_attr "predicable" "yes")
+-   (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
+-   (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
+-   (set_attr "neg_pool_range" "*,*,*,*,   0,*,*,*,*,1008,*")]
++   (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
++   (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
++   (set_attr "neg_pool_range" "*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
+ )
+ 
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99332.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99332.patch
new file mode 100644
index 0000000000..3e63611305
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99332.patch
@@ -0,0 +1,68 @@
+2010-08-06  Yao Qi  <yao@codesourcery.com>
+
+	LP: #612011
+	gcc/ 
+	* config/arm/arm.c (output_move_double): Fix typo generating 
+	instructions ('ldr'->'str').
+
+	gcc/testsuite/
+	* gcc.target/arm/pr45094.c: New test.
+
+ 2010-08-02  Ulrich Weigand  <uweigand@de.ibm.com>
+ 
+ 	LP: #604874
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/arm.c	2010-08-10 14:03:02 +0000
+@@ -12506,13 +12506,13 @@
+ 	    {
+ 	      if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
+ 		{
+-		  output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
+-		  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
++		  output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
++		  output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
+ 		}
+ 	      else
+ 		{
+-		  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
+-		  output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
++		  output_asm_insn ("str%?\t%H0, [%1, #4]", otherops);
++		  output_asm_insn ("str%?\t%0, [%1], %2", otherops);
+ 		}
+ 	    }
+ 	  else if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr45094.c'
+--- old/gcc/testsuite/gcc.target/arm/pr45094.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr45094.c	2010-08-06 05:10:03 +0000
+@@ -0,0 +1,27 @@
++/* { dg-do run } */
++/* { dg-require-effective-target arm_neon_hw } */
++/* { dg-options "-O2 -mcpu=cortex-a8" } */
++/* { dg-add-options arm_neon } */
++
++#include <stdlib.h>
++
++long long buffer[32];
++
++void __attribute__((noinline)) f(long long *p, int n)
++{
++  while (--n >= 0)
++    {
++      *p = 1;
++      p += 32;
++    }
++}
++
++int main(void)
++{
++  f(buffer, 1);
++  
++  if (!buffer[0])
++    abort();
++
++  return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99335.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99335.patch
new file mode 100644
index 0000000000..f75a74091f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99335.patch
@@ -0,0 +1,138 @@
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+	
+	Mark Shinwell  <shinwell@codesourcery.com>
+
+	gcc/
+	* config/arm/vfp.md (*arm_movsi_vfp, *thumb2_movsi_vfp)
+	(*arm_movdi_vfp, *thumb2_movdi_vfp, *movsf_vfp, *thumb2_movsf_vfp)
+	(*movdf_vfp, *thumb2_movdf_vfp, *movsfcc_vfp, *thumb2_movsfcc_vfp)
+	(*movdfcc_vfp, *thumb2_movdfcc_vfp): Add neon_type.
+	* config/arm/arm.md (neon_type): Update comment.
+
+ 2010-08-10  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/arm.md	2010-08-12 11:29:02 +0000
+@@ -255,8 +255,6 @@
+ (define_attr "ldsched" "no,yes" (const (symbol_ref "arm_ld_sched")))
+ 
+ ;; Classification of NEON instructions for scheduling purposes.
+-;; Do not set this attribute and the "type" attribute together in
+-;; any one instruction pattern.
+ (define_attr "neon_type"
+    "neon_int_1,\
+    neon_int_2,\
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/vfp.md	2010-08-12 11:29:02 +0000
+@@ -82,6 +82,7 @@
+   "
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores")
++   (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*")
+    (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
+    (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
+ )
+@@ -123,6 +124,7 @@
+   "
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "*,*,*,*,load1,load1,store1,store1,r_2_f,f_2_r,fcpys,f_load,f_store")
++   (set_attr "neon_type" "*,*,*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*")
+    (set_attr "pool_range"     "*,*,*,*,1020,4096,*,*,*,*,*,1020,*")
+    (set_attr "neg_pool_range" "*,*,*,*,   0,   0,*,*,*,*,*,1008,*")]
+ )
+@@ -160,6 +162,7 @@
+     }
+   "
+   [(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
++   (set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
+    (set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
+ 			       (eq_attr "alternative" "5")
+ 				(if_then_else
+@@ -198,6 +201,7 @@
+     }
+   "
+   [(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_load,f_store")
++   (set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
+    (set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
+ 			       (eq_attr "alternative" "5")
+ 				(if_then_else
+@@ -352,6 +356,7 @@
+   [(set_attr "predicable" "yes")
+    (set_attr "type"
+      "r_2_f,f_2_r,fconsts,f_loads,f_stores,load1,store1,fcpys,*")
++   (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*")
+    (set_attr "pool_range" "*,*,*,1020,*,4096,*,*,*")
+    (set_attr "neg_pool_range" "*,*,*,1008,*,4080,*,*,*")]
+ )
+@@ -388,6 +393,7 @@
+   [(set_attr "predicable" "yes")
+    (set_attr "type"
+      "r_2_f,f_2_r,fconsts,f_load,f_store,load1,store1,fcpys,*")
++   (set_attr "neon_type" "neon_mcr,neon_mrc,*,*,*,*,*,neon_vmov,*")
+    (set_attr "pool_range" "*,*,*,1020,*,4092,*,*,*")
+    (set_attr "neg_pool_range" "*,*,*,1008,*,0,*,*,*")]
+ )
+@@ -430,6 +436,7 @@
+   "
+   [(set_attr "type"
+      "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*")
++   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+    (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+ 			       (eq_attr "alternative" "7")
+ 				(if_then_else
+@@ -474,6 +481,7 @@
+   "
+   [(set_attr "type"
+      "r_2_f,f_2_r,fconstd,load2,store2,f_load,f_store,ffarithd,*")
++   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+    (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+ 			       (eq_attr "alternative" "7")
+ 				(if_then_else
+@@ -509,7 +517,8 @@
+    fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1"
+    [(set_attr "conds" "use")
+     (set_attr "length" "4,4,8,4,4,8,4,4,8")
+-    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
++    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
++    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")]
+ )
+ 
+ (define_insn "*thumb2_movsfcc_vfp"
+@@ -532,7 +541,8 @@
+    ite\\t%D3\;fmrs%D3\\t%0, %2\;fmrs%d3\\t%0, %1"
+    [(set_attr "conds" "use")
+     (set_attr "length" "6,6,10,6,6,10,6,6,10")
+-    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
++    (set_attr "type" "fcpys,fcpys,fcpys,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
++    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr,neon_mcr,neon_mcr,neon_mrc,neon_mrc,neon_mrc")]
+ )
+ 
+ (define_insn "*movdfcc_vfp"
+@@ -555,7 +565,8 @@
+    fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1"
+    [(set_attr "conds" "use")
+     (set_attr "length" "4,4,8,4,4,8,4,4,8")
+-    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
++    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
++    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")]
+ )
+ 
+ (define_insn "*thumb2_movdfcc_vfp"
+@@ -578,7 +589,8 @@
+    ite\\t%D3\;fmrrd%D3\\t%Q0, %R0, %P2\;fmrrd%d3\\t%Q0, %R0, %P1"
+    [(set_attr "conds" "use")
+     (set_attr "length" "6,6,10,6,6,10,6,6,10")
+-    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")]
++    (set_attr "type" "ffarithd,ffarithd,ffarithd,r_2_f,r_2_f,r_2_f,f_2_r,f_2_r,f_2_r")
++    (set_attr "neon_type" "neon_vmov,neon_vmov,neon_vmov,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mcr_2_mcrr,neon_mrrc,neon_mrrc,neon_mrrc")]
+ )
+ 
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99336.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99336.patch
new file mode 100644
index 0000000000..9b56560942
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99336.patch
@@ -0,0 +1,95 @@
+	gcc/
+	* config/arm/arm.c (arm_override_options): Override alignments if
+	tuning for Cortex-A8.
+	(create_fix_barrier, arm_reorg): If aligning to jumps or loops,
+	make labels have a size.
+	* config/arm/arm.md (VUNSPEC_ALIGN16, VUNSPEC_ALIGN32): New constants.
+	(align_16, align_32): New patterns.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 	
+ 	Mark Shinwell  <shinwell@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-10 14:03:02 +0000
++++ new/gcc/config/arm/arm.c	2010-08-12 11:33:54 +0000
+@@ -1449,6 +1449,16 @@
+      chosen.  */
+   gcc_assert (arm_tune != arm_none);
+ 
++  if (arm_tune == cortexa8 && optimize >= 3)
++    {
++      /* These alignments were experimentally determined to improve SPECint
++	 performance on SPECCPU 2000.  */
++      if (align_functions <= 0)
++	align_functions = 16;
++      if (align_jumps <= 0)
++	align_jumps = 16;
++    }
++
+   tune_flags = all_cores[(int)arm_tune].flags;
+ 
+   if (target_fp16_format_name)
+@@ -11263,7 +11273,10 @@
+       gcc_assert (GET_CODE (from) != BARRIER);
+ 
+       /* Count the length of this insn.  */
+-      count += get_attr_length (from);
++      if (LABEL_P (from) && (align_jumps > 0 || align_loops > 0))
++        count += MAX (align_jumps, align_loops);
++      else
++        count += get_attr_length (from);
+ 
+       /* If there is a jump table, add its length.  */
+       tmp = is_jump_table (from);
+@@ -11603,6 +11616,8 @@
+ 	      insn = table;
+ 	    }
+ 	}
++      else if (LABEL_P (insn) && (align_jumps > 0 || align_loops > 0))
++	address += MAX (align_jumps, align_loops);
+     }
+ 
+   fix = minipool_fix_head;
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-12 11:29:02 +0000
++++ new/gcc/config/arm/arm.md	2010-08-12 11:33:54 +0000
+@@ -135,6 +135,8 @@
+    (VUNSPEC_WCMP_EQ  12) ; Used by the iWMMXt WCMPEQ instructions
+    (VUNSPEC_WCMP_GTU 13) ; Used by the iWMMXt WCMPGTU instructions
+    (VUNSPEC_WCMP_GT  14) ; Used by the iwMMXT WCMPGT instructions
++   (VUNSPEC_ALIGN16  15) ; Used to force 16-byte alignment.
++   (VUNSPEC_ALIGN32  16) ; Used to force 32-byte alignment.
+    (VUNSPEC_EH_RETURN 20); Use to override the return address for exception
+ 			 ; handling.
+   ]
+@@ -11042,6 +11044,24 @@
+   "
+ )
+ 
++(define_insn "align_16"
++  [(unspec_volatile [(const_int 0)] VUNSPEC_ALIGN16)]
++  "TARGET_EITHER"
++  "*
++  assemble_align (128);
++  return \"\";
++  "
++)
++
++(define_insn "align_32"
++  [(unspec_volatile [(const_int 0)] VUNSPEC_ALIGN32)]
++  "TARGET_EITHER"
++  "*
++  assemble_align (256);
++  return \"\";
++  "
++)
++
+ (define_insn "consttable_end"
+   [(unspec_volatile [(const_int 0)] VUNSPEC_POOL_END)]
+   "TARGET_EITHER"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99337.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99337.patch
new file mode 100644
index 0000000000..850acb31b0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99337.patch
@@ -0,0 +1,36 @@
+	2008-09-08  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	gcc/
+	* config/arm/unwind-arm.c (__gnu_unwind_pr_common): Correct test
+	for barrier handlers.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	gcc/
+ 	* config/arm/arm.c (arm_override_options): Override alignments if
+ 	tuning for Cortex-A8.
+
+=== modified file 'gcc/config/arm/unwind-arm.c'
+--- old/gcc/config/arm/unwind-arm.c	2009-10-30 14:55:10 +0000
++++ new/gcc/config/arm/unwind-arm.c	2010-08-12 12:39:35 +0000
+@@ -1196,8 +1196,6 @@
+ 		  ucbp->barrier_cache.bitpattern[4] = (_uw) &data[1];
+ 
+ 		  if (data[0] & uint32_highbit)
+-		    phase2_call_unexpected_after_unwind = 1;
+-		  else
+ 		    {
+ 		      data += rtti_count + 1;
+ 		      /* Setup for entry to the handler.  */
+@@ -1207,6 +1205,8 @@
+ 		      _Unwind_SetGR (context, 0, (_uw) ucbp);
+ 		      return _URC_INSTALL_CONTEXT;
+ 		    }
++		  else
++		    phase2_call_unexpected_after_unwind = 1;
+ 		}
+ 	      if (data[0] & uint32_highbit)
+ 		data++;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99338.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99338.patch
new file mode 100644
index 0000000000..632e80caf7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99338.patch
@@ -0,0 +1,111 @@
+	2009-06-23  Kazu Hirata  <kazu@codesourcery.com>
+
+	Issue #4613
+	gcc/
+	* config/arm/arm.c (arm_rtx_costs_1): Teach that the cost of MLS
+	is the same as its underlying multiplication.
+	* config/arm/arm.md (two splitters): New.
+	* config/arm/predicates.md (binary_operator): New.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2008-09-08  Daniel Jacobowitz  <dan@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-12 11:33:54 +0000
++++ new/gcc/config/arm/arm.c	2010-08-12 13:35:39 +0000
+@@ -6604,6 +6604,19 @@
+ 	  return true;
+ 	}
+ 
++      /* MLS is just as expensive as its underlying multiplication.
++	 Exclude a shift by a constant, which is expressed as a
++	 multiplication.  */
++      if (TARGET_32BIT && arm_arch_thumb2
++	  && GET_CODE (XEXP (x, 1)) == MULT
++	  && ! (GET_CODE (XEXP (XEXP (x, 1), 1)) == CONST_INT
++		&& ((INTVAL (XEXP (XEXP (x, 1), 1)) &
++		     (INTVAL (XEXP (XEXP (x, 1), 1)) - 1)) == 0)))
++	{
++	  /* The cost comes from the cost of the multiply.  */
++	  return false;
++	}
++
+       /* Fall through */
+ 
+     case PLUS:
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-12 11:33:54 +0000
++++ new/gcc/config/arm/arm.md	2010-08-12 13:35:39 +0000
+@@ -1355,6 +1355,49 @@
+    (set_attr "predicable" "yes")]
+ )
+ 
++; The combiner cannot combine the first and last insns in the
++; following sequence because of the intervening insn, so help the
++; combiner with this splitter.  The combiner does attempt to split
++; this particular combination but does not know this exact split.
++; Note that the combiner puts the constant at the outermost operation
++; as a part of canonicalization.
++;
++; mul r3, r2, r1
++; <add/sub> r3, r3, <constant>
++; add r3, r3, r4
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(match_operator:SI 1 "plusminus_operator"
++	 [(plus:SI (mult:SI (match_operand:SI 2 "s_register_operand" "")
++			    (match_operand:SI 3 "s_register_operand" ""))
++		   (match_operand:SI 4 "s_register_operand" ""))
++	  (match_operand:SI 5 "arm_immediate_operand" "")]))]
++  "TARGET_32BIT"
++  [(set (match_dup 0)
++	(plus:SI (mult:SI (match_dup 2) (match_dup 3))
++		 (match_dup 4)))
++   (set (match_dup 0)
++	(match_op_dup:SI 1 [(match_dup 0) (match_dup 5)]))]
++  "")
++
++; Likewise for MLS.  MLS is available only on select architectures.
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(match_operator:SI 1 "plusminus_operator"
++	 [(minus:SI (match_operand:SI 2 "s_register_operand" "")
++		    (mult:SI (match_operand:SI 3 "s_register_operand" "")
++			     (match_operand:SI 4 "s_register_operand" "")))
++	  (match_operand:SI 5 "arm_immediate_operand" "")]))]
++  "TARGET_32BIT && arm_arch_thumb2"
++  [(set (match_dup 0)
++	(minus:SI (match_dup 2)
++		  (mult:SI (match_dup 3) (match_dup 4))))
++   (set (match_dup 0)
++	(match_op_dup:SI 1 [(match_dup 0) (match_dup 5)]))]
++  "")
++
+ (define_insn "*mulsi3addsi_compare0"
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/predicates.md	2010-08-12 13:35:39 +0000
+@@ -197,6 +197,11 @@
+   (and (match_code "plus,minus,ior,xor,and")
+        (match_test "mode == GET_MODE (op)")))
+ 
++;; True for plus/minus operators
++(define_special_predicate "plusminus_operator"
++  (and (match_code "plus,minus")
++       (match_test "mode == GET_MODE (op)")))
++
+ ;; True for logical binary operators.
+ (define_special_predicate "logical_binary_operator"
+   (and (match_code "ior,xor,and")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99339.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99339.patch
new file mode 100644
index 0000000000..f4a8e80ab7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99339.patch
@@ -0,0 +1,236 @@
+	Backport from FSF mainline:
+
+	gcc/
+	* gengtype-lex.l: Add HARD_REG_SET.
+	* expr.c (expand_expr_real_1): Record writes to hard registers.
+	* function.h (rtl_data): Add asm_clobbers.
+	* ira.c (compute_regs_asm_clobbered): Use crtl->asm_clobbers.
+	(ira_setup_eliminable_regset): Remove regs_asm_clobbered.
+	Use crtl->asm_clobbers.
+
+	gcc/testsuite/
+	* gcc.target/arm/frame-pointer-1.c: New test.
+	* gcc.target/i386/pr9771-1.c: Move code out of main to allow frame
+	pointer elimination.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Merge from Sourcery G++ 4.4:
+ 
+ 	2009-06-23  Kazu Hirata  <kazu@codesourcery.com>
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-05-31 14:45:06 +0000
++++ new/gcc/expr.c	2010-08-12 13:51:16 +0000
+@@ -8458,6 +8458,19 @@
+     expand_decl_rtl:
+       gcc_assert (decl_rtl);
+       decl_rtl = copy_rtx (decl_rtl);
++      /* Record writes to register variables.  */
++      if (modifier == EXPAND_WRITE && REG_P (decl_rtl)
++	  && REGNO (decl_rtl) < FIRST_PSEUDO_REGISTER)
++	{
++	    int i = REGNO (decl_rtl);
++	    int nregs = hard_regno_nregs[i][GET_MODE (decl_rtl)];
++	    while (nregs)
++	      {
++		SET_HARD_REG_BIT (crtl->asm_clobbers, i);
++		i++;
++		nregs--;
++	      }
++	}
+ 
+       /* Ensure variable marked as used even if it doesn't go through
+ 	 a parser.  If it hasn't be used yet, write out an external
+
+=== modified file 'gcc/function.h'
+--- old/gcc/function.h	2009-11-25 10:55:54 +0000
++++ new/gcc/function.h	2010-08-12 13:51:16 +0000
+@@ -25,6 +25,7 @@
+ #include "tree.h"
+ #include "hashtab.h"
+ #include "vecprim.h"
++#include "hard-reg-set.h"
+ 
+ /* Stack of pending (incomplete) sequences saved by `start_sequence'.
+    Each element describes one pending sequence.
+@@ -433,6 +434,12 @@
+      TREE_NOTHROW (current_function_decl) it is set even for overwritable
+      function where currently compiled version of it is nothrow.  */
+   bool nothrow;
++
++  /* Like regs_ever_live, but 1 if a reg is set or clobbered from an
++     asm.  Unlike regs_ever_live, elements of this array corresponding
++     to eliminable regs (like the frame pointer) are set if an asm
++     sets them.  */
++  HARD_REG_SET asm_clobbers;
+ };
+ 
+ #define return_label (crtl->x_return_label)
+
+=== modified file 'gcc/gengtype-lex.l'
+--- old/gcc/gengtype-lex.l	2009-11-21 10:24:25 +0000
++++ new/gcc/gengtype-lex.l	2010-08-12 13:51:16 +0000
+@@ -49,7 +49,7 @@
+ ID	[[:alpha:]_][[:alnum:]_]*
+ WS	[[:space:]]+
+ HWS	[ \t\r\v\f]*
+-IWORD	short|long|(un)?signed|char|int|HOST_WIDE_INT|HOST_WIDEST_INT|bool|size_t|BOOL_BITFIELD|CPPCHAR_SIGNED_T|ino_t|dev_t
++IWORD	short|long|(un)?signed|char|int|HOST_WIDE_INT|HOST_WIDEST_INT|bool|size_t|BOOL_BITFIELD|CPPCHAR_SIGNED_T|ino_t|dev_t|HARD_REG_SET
+ ITYPE	{IWORD}({WS}{IWORD})*
+ EOID	[^[:alnum:]_]
+ 
+
+=== modified file 'gcc/ira.c'
+--- old/gcc/ira.c	2010-03-31 01:44:10 +0000
++++ new/gcc/ira.c	2010-08-12 13:51:16 +0000
+@@ -1385,14 +1385,12 @@
+   return for_each_rtx (&insn, insn_contains_asm_1, NULL);
+ }
+ 
+-/* Set up regs_asm_clobbered.  */
++/* Add register clobbers from asm statements.  */
+ static void
+-compute_regs_asm_clobbered (char *regs_asm_clobbered)
++compute_regs_asm_clobbered (void)
+ {
+   basic_block bb;
+ 
+-  memset (regs_asm_clobbered, 0, sizeof (char) * FIRST_PSEUDO_REGISTER);
+-
+   FOR_EACH_BB (bb)
+     {
+       rtx insn;
+@@ -1413,7 +1411,7 @@
+ 		      + hard_regno_nregs[dregno][mode] - 1;
+ 
+ 		    for (i = dregno; i <= end; ++i)
+-		      regs_asm_clobbered[i] = 1;
++		      SET_HARD_REG_BIT(crtl->asm_clobbers, i);
+ 		  }
+ 	      }
+ 	}
+@@ -1425,12 +1423,6 @@
+ void
+ ira_setup_eliminable_regset (void)
+ {
+-  /* Like regs_ever_live, but 1 if a reg is set or clobbered from an
+-     asm.  Unlike regs_ever_live, elements of this array corresponding
+-     to eliminable regs (like the frame pointer) are set if an asm
+-     sets them.  */
+-  char *regs_asm_clobbered
+-    = (char *) alloca (FIRST_PSEUDO_REGISTER * sizeof (char));
+ #ifdef ELIMINABLE_REGS
+   int i;
+   static const struct {const int from, to; } eliminables[] = ELIMINABLE_REGS;
+@@ -1454,7 +1446,8 @@
+   COPY_HARD_REG_SET (ira_no_alloc_regs, no_unit_alloc_regs);
+   CLEAR_HARD_REG_SET (eliminable_regset);
+ 
+-  compute_regs_asm_clobbered (regs_asm_clobbered);
++  compute_regs_asm_clobbered ();
++
+   /* Build the regset of all eliminable registers and show we can't
+      use those that we already know won't be eliminated.  */
+ #ifdef ELIMINABLE_REGS
+@@ -1464,7 +1457,7 @@
+ 	= (! targetm.can_eliminate (eliminables[i].from, eliminables[i].to)
+ 	   || (eliminables[i].to == STACK_POINTER_REGNUM && need_fp));
+ 
+-      if (! regs_asm_clobbered[eliminables[i].from])
++      if (!TEST_HARD_REG_BIT (crtl->asm_clobbers, eliminables[i].from))
+ 	{
+ 	    SET_HARD_REG_BIT (eliminable_regset, eliminables[i].from);
+ 
+@@ -1478,7 +1471,7 @@
+ 	df_set_regs_ever_live (eliminables[i].from, true);
+     }
+ #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
+-  if (! regs_asm_clobbered[HARD_FRAME_POINTER_REGNUM])
++  if (!TEST_HARD_REG_BIT (crtl->asm_clobbers, HARD_FRAME_POINTER_REGNUM))
+     {
+       SET_HARD_REG_BIT (eliminable_regset, HARD_FRAME_POINTER_REGNUM);
+       if (need_fp)
+@@ -1492,7 +1485,7 @@
+ #endif
+ 
+ #else
+-  if (! regs_asm_clobbered[FRAME_POINTER_REGNUM])
++  if (!TEST_HARD_REG_BIT (crtl->asm_clobbers, HARD_FRAME_POINTER_REGNUM))
+     {
+       SET_HARD_REG_BIT (eliminable_regset, FRAME_POINTER_REGNUM);
+       if (need_fp)
+
+=== added file 'gcc/testsuite/gcc.target/arm/frame-pointer-1.c'
+--- old/gcc/testsuite/gcc.target/arm/frame-pointer-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/frame-pointer-1.c	2010-08-12 13:51:16 +0000
+@@ -0,0 +1,42 @@
++/* Check local register variables using a register conventionally 
++   used as the frame pointer aren't clobbered under high register pressure.  */
++/* { dg-do run } */
++/* { dg-options "-Os -mthumb -fomit-frame-pointer" } */
++
++#include <stdlib.h>
++
++int global=5;
++
++void __attribute__((noinline)) foo(int p1, int p2, int p3, int p4)
++{
++  if (global != 5 || p1 != 1 || p2 != 2 || p3 != 3 || p4 != 4)
++    abort();
++}
++
++int __attribute__((noinline)) test(int a, int b, int c, int d)
++{
++  register unsigned long r __asm__("r7") = 0xdeadbeef;
++  int e;
++
++  /* ABCD are live after the call which should be enough
++     to cause r7 to be used if it weren't for the register variable.  */
++  foo(a,b,c,d);
++
++  e = 0;
++  __asm__ __volatile__ ("mov %0, %2"
++			: "=r" (e)
++			: "0" (e), "r" (r));
++
++  global = a+b+c+d;
++
++  return e;
++}
++
++int main()
++{
++  if (test(1, 2, 3, 4) != 0xdeadbeef)
++    abort();
++  if (global != 10)
++    abort();
++  return 0;
++}
+
+=== modified file 'gcc/testsuite/gcc.target/i386/pr9771-1.c'
+--- old/gcc/testsuite/gcc.target/i386/pr9771-1.c	2007-08-22 08:59:14 +0000
++++ new/gcc/testsuite/gcc.target/i386/pr9771-1.c	2010-08-12 13:51:16 +0000
+@@ -28,7 +28,10 @@
+   *adr = save;
+ }
+ 
+-int main()
++/* This must not be inlined becuase main() requires the frame pointer
++   for stack alignment.  */
++void test(void) __attribute__((noinline));
++void test(void)
+ {
+   B = &x;
+ 
+@@ -42,3 +45,9 @@
+   exit(0);
+ }
+ 
++int main()
++{
++  test();
++  return 0;
++
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99340.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99340.patch
new file mode 100644
index 0000000000..31fa99a2e3
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99340.patch
@@ -0,0 +1,43 @@
+	Merge from Sourcery G++ 4.4:
+	
+	2009-08-26  Kazu Hirata  <kazu@codesourcery.com>
+
+	Issue #6089
+	gcc/
+	* config/arm/arm.c (arm_rtx_costs_1): Don't special case for
+	Thumb-2 in the MINUS case.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Backport from FSF mainline:
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-12 13:35:39 +0000
++++ new/gcc/config/arm/arm.c	2010-08-12 14:08:29 +0000
+@@ -6494,23 +6494,6 @@
+       return true;
+ 
+     case MINUS:
+-      if (TARGET_THUMB2)
+-	{
+-	  if (GET_MODE_CLASS (mode) == MODE_FLOAT)
+-	    {
+-	      if (TARGET_HARD_FLOAT && (mode == SFmode || mode == DFmode))
+-		*total = COSTS_N_INSNS (1);
+-	      else
+-		*total = COSTS_N_INSNS (20);
+-	    }
+-	  else
+-	    *total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
+-	  /* Thumb2 does not have RSB, so all arguments must be
+-	     registers (subtracting a constant is canonicalized as
+-	     addition of the negated constant).  */
+-	  return false;
+-	}
+-
+       if (mode == DImode)
+ 	{
+ 	  *total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99341.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99341.patch
new file mode 100644
index 0000000000..d9073123c4
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99341.patch
@@ -0,0 +1,28 @@
+	2009-08-26  Julian Brown  <julian@codesourcery.com>
+
+	gcc/config/arm/
+	* uclinux-eabi.h (LINK_GCC_C_SEQUENCE_SPEC): Override definition
+	for uclinux.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 	
+ 	2009-08-26  Kazu Hirata  <kazu@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/uclinux-eabi.h'
+--- old/gcc/config/arm/uclinux-eabi.h	2009-02-20 15:20:38 +0000
++++ new/gcc/config/arm/uclinux-eabi.h	2010-08-12 15:23:21 +0000
+@@ -50,6 +50,10 @@
+ #undef ARM_DEFAULT_ABI
+ #define ARM_DEFAULT_ABI ARM_ABI_AAPCS_LINUX
+ 
++#undef LINK_GCC_C_SEQUENCE_SPEC
++#define LINK_GCC_C_SEQUENCE_SPEC \
++  "--start-group %G %L --end-group"
++
+ /* Clear the instruction cache from `beg' to `end'.  This makes an
+    inline system call to SYS_cacheflush.  */
+ #undef CLEAR_INSN_CACHE
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch
new file mode 100644
index 0000000000..02db2b4e7e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99342.patch
@@ -0,0 +1,76 @@
+	2010-05-25  Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (arm_tune_cortex_a5): New.
+	(arm_override_options): Set above. Set max_insns_skipped to 1 for
+	Cortex-A5.
+	* config/arm/arm.h (arm_tune_cortex_a5): Add declaration.
+	(BRANCH_COST): Set to zero for Cortex-A5 unless optimising for
+	size.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2009-08-26  Julian Brown  <julian@codesourcery.com>
+ 
+ 	gcc/config/arm/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-12 14:08:29 +0000
++++ new/gcc/config/arm/arm.c	2010-08-12 16:18:41 +0000
+@@ -671,6 +671,9 @@
+    This typically means an ARM6 or ARM7 with MMU or MPU.  */
+ int arm_tune_wbuf = 0;
+ 
++/* Nonzero if tuning for Cortex-A5.  */
++int arm_tune_cortex_a5 = 0;
++
+ /* Nonzero if tuning for Cortex-A9.  */
+ int arm_tune_cortex_a9 = 0;
+ 
+@@ -1582,6 +1585,7 @@
+   arm_tune_xscale = (tune_flags & FL_XSCALE) != 0;
+   arm_arch_iwmmxt = (insn_flags & FL_IWMMXT) != 0;
+   arm_arch_hwdiv = (insn_flags & FL_DIV) != 0;
++  arm_tune_cortex_a5 = (arm_tune == cortexa5) != 0;
+   arm_tune_cortex_a9 = (arm_tune == cortexa9) != 0;
+ 
+   /* If we are not using the default (ARM mode) section anchor offset
+@@ -1880,6 +1884,11 @@
+          that is worth skipping is shorter.  */
+       if (arm_tune_strongarm)
+         max_insns_skipped = 3;
++
++      /* Branches can be dual-issued on Cortex-A5, so conditional execution is
++	 less appealing.  */
++      if (arm_tune_cortex_a5)
++        max_insns_skipped = 1;
+     }
+ 
+   /* Hot/Cold partitioning is not currently supported, since we can't
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-05 16:34:46 +0000
++++ new/gcc/config/arm/arm.h	2010-08-12 16:18:41 +0000
+@@ -435,6 +435,9 @@
+ /* Nonzero if tuning for stores via the write buffer.  */
+ extern int arm_tune_wbuf;
+ 
++/* Nonzero if tuning for Cortex-A5.  */
++extern int arm_tune_cortex_a5;
++
+ /* Nonzero if tuning for Cortex-A9.  */
+ extern int arm_tune_cortex_a9;
+ 
+@@ -2222,7 +2225,8 @@
+ /* Try to generate sequences that don't involve branches, we can then use
+    conditional instructions */
+ #define BRANCH_COST(speed_p, predictable_p) \
+-  (TARGET_32BIT ? (TARGET_THUMB2 && optimize_size ? 1 : 4) \
++  (TARGET_32BIT ? ((arm_tune_cortex_a5 && !optimize_size) ? 0 \
++		   : (TARGET_THUMB2 && optimize_size ? 1 : 4)) \
+ 		: (optimize > 0 ? 2 : 0))
+ 
+ /* Position Independent Code.  */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99343.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99343.patch
new file mode 100644
index 0000000000..86b2d81093
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99343.patch
@@ -0,0 +1,132 @@
+	Backport from FSF mainline:
+
+	gcc/
+	* config/arm/thumb2.md (*thumb2_addsi3_compare0): New.
+	(*thumb2_addsi3_compare0_scratch): New.
+	* config/arm/constraints.md (Pv): New.
+	* config/arm/arm.md (*addsi3_compare0): Remove FIXME comment. Use
+	for ARM mode only.
+	(*addsi3_compare0_scratch): Likewise.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Merge from Sourcery G++ 4.4:
+ 
+ 	2010-05-25  Julian Brown  <julian@codesourcery.com>
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-12 13:35:39 +0000
++++ new/gcc/config/arm/arm.md	2010-08-12 16:47:21 +0000
+@@ -701,7 +701,6 @@
+   ""
+ )
+ 
+-;; ??? Make Thumb-2 variants which prefer low regs
+ (define_insn "*addsi3_compare0"
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV
+@@ -710,7 +709,7 @@
+ 	 (const_int 0)))
+    (set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(plus:SI (match_dup 1) (match_dup 2)))]
+-  "TARGET_32BIT"
++  "TARGET_ARM"
+   "@
+    add%.\\t%0, %1, %2
+    sub%.\\t%0, %1, #%n2"
+@@ -723,7 +722,7 @@
+ 	 (plus:SI (match_operand:SI 0 "s_register_operand" "r, r")
+ 		  (match_operand:SI 1 "arm_add_operand"    "rI,L"))
+ 	 (const_int 0)))]
+-  "TARGET_32BIT"
++  "TARGET_ARM"
+   "@
+    cmn%?\\t%0, %1
+    cmp%?\\t%0, #%n1"
+
+=== modified file 'gcc/config/arm/constraints.md'
+--- old/gcc/config/arm/constraints.md	2010-07-29 16:58:56 +0000
++++ new/gcc/config/arm/constraints.md	2010-08-12 16:47:21 +0000
+@@ -31,7 +31,7 @@
+ ;; The following multi-letter normal constraints have been used:
+ ;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
+ ;; in Thumb-1 state: Pa, Pb
+-;; in Thumb-2 state: Ps, Pt
++;; in Thumb-2 state: Ps, Pt, Pv
+ 
+ ;; The following memory constraints have been used:
+ ;; in ARM/Thumb-2 state: Q, Ut, Uv, Uy, Un, Um, Us
+@@ -158,6 +158,11 @@
+   (and (match_code "const_int")
+        (match_test "TARGET_THUMB2 && ival >= -7 && ival <= 7")))
+ 
++(define_constraint "Pv"
++  "@internal In Thumb-2 state a constant in the range -255 to 0"
++  (and (match_code "const_int")
++       (match_test "TARGET_THUMB2 && ival >= -255 && ival <= 0")))
++
+ (define_constraint "G"
+  "In ARM/Thumb-2 state a valid FPA immediate constant."
+  (and (match_code "const_double")
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-05 16:34:46 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-12 16:47:21 +0000
+@@ -1241,6 +1241,56 @@
+    (set_attr "length" "2")]
+ )
+ 
++(define_insn "*thumb2_addsi3_compare0"
++  [(set (reg:CC_NOOV CC_REGNUM)
++	(compare:CC_NOOV
++	  (plus:SI (match_operand:SI 1 "s_register_operand" "l,  0, r")
++		   (match_operand:SI 2 "arm_add_operand"    "lPt,Ps,rIL"))
++	  (const_int 0)))
++   (set (match_operand:SI 0 "s_register_operand" "=l,l,r")
++	(plus:SI (match_dup 1) (match_dup 2)))]
++  "TARGET_THUMB2"
++  "*
++    HOST_WIDE_INT val;
++
++    if (GET_CODE (operands[2]) == CONST_INT)
++      val = INTVAL (operands[2]);
++    else
++      val = 0;
++
++    if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
++      return \"subs\\t%0, %1, #%n2\";
++    else
++      return \"adds\\t%0, %1, %2\";
++  "
++  [(set_attr "conds" "set")
++   (set_attr "length" "2,2,4")]
++)
++
++(define_insn "*thumb2_addsi3_compare0_scratch"
++  [(set (reg:CC_NOOV CC_REGNUM)
++	(compare:CC_NOOV
++	  (plus:SI (match_operand:SI 0 "s_register_operand" "l,  r")
++		   (match_operand:SI 1 "arm_add_operand"    "lPv,rIL"))
++	  (const_int 0)))]
++  "TARGET_THUMB2"
++  "*
++    HOST_WIDE_INT val;
++
++    if (GET_CODE (operands[1]) == CONST_INT)
++      val = INTVAL (operands[1]);
++    else
++      val = 0;
++
++    if (val < 0 && const_ok_for_arm (ARM_SIGN_EXTEND (-val)))
++      return \"cmp\\t%0, #%n1\";
++    else
++      return \"cmn\\t%0, %1\";
++  "
++  [(set_attr "conds" "set")
++   (set_attr "length" "2,4")]
++)
++
+ ;; 16-bit encodings of "muls" and "mul<c>".  We only use these when
+ ;; optimizing for size since "muls" is slow on all known
+ ;; implementations and since "mul<c>" will be generated by
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99344.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99344.patch
new file mode 100644
index 0000000000..d03ee9406e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99344.patch
@@ -0,0 +1,30 @@
+	2010-02-03  Daniel Gutson  <dgutson@codesourcery.com>
+
+	Issue #6472
+
+	gcc/
+	* config/arm/lib1funcs.asm (__ARM_ARCH__): __ARM_ARCH_7EM__
+	added to the preprocessor condition.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Backport from FSF mainline:
+
+ 	gcc/
+ 	* config/arm/thumb2.md (*thumb2_addsi3_compare0): New.
+ 	(*thumb2_addsi3_compare0_scratch): New.
+
+=== modified file 'gcc/config/arm/lib1funcs.asm'
+--- old/gcc/config/arm/lib1funcs.asm	2010-08-05 15:20:54 +0000
++++ new/gcc/config/arm/lib1funcs.asm	2010-08-12 16:49:44 +0000
+@@ -104,7 +104,8 @@
+ #endif
+ 
+ #if defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__) \
+-	|| defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__)
++	|| defined(__ARM_ARCH_7R__) || defined(__ARM_ARCH_7M__) \
++	|| defined(__ARM_ARCH_7EM__)
+ # define __ARM_ARCH__ 7
+ #endif
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99345.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99345.patch
new file mode 100644
index 0000000000..757e66c8b4
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99345.patch
@@ -0,0 +1,30 @@
+	Merge from Sourcery G++ 4.4:
+
+	2010-02-04  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	Issue #7197 - backtrace() through throw()
+
+	libstdc++-v3/
+	* libsupc++/eh_personality.cc (PERSONALITY_FUNCTION): For
+	ARM EABI, skip handlers for _US_VIRTUAL_UNWIND_FRAME
+	| _US_FORCE_UNWIND.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Backport from FSF mainline:
+ 
+ 	2010-02-03  Daniel Gutson  <dgutson@codesourcery.com>
+
+=== modified file 'libstdc++-v3/libsupc++/eh_personality.cc'
+--- old/libstdc++-v3/libsupc++/eh_personality.cc	2010-02-17 05:43:24 +0000
++++ new/libstdc++-v3/libsupc++/eh_personality.cc	2010-08-12 16:53:10 +0000
+@@ -383,6 +383,8 @@
+   switch (state & _US_ACTION_MASK)
+     {
+     case _US_VIRTUAL_UNWIND_FRAME:
++      if (state & _US_FORCE_UNWIND)
++	CONTINUE_UNWINDING;
+       actions = _UA_SEARCH_PHASE;
+       break;
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99346.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99346.patch
new file mode 100644
index 0000000000..4807195158
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99346.patch
@@ -0,0 +1,170 @@
+	Backport from FSF mainline:
+
+	Julian Brown  <julian@codesourcery.com>
+	Mark Mitchell  <mark@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (arm_function_ok_for_sibcall): Only forbid
+	sibling calls for Thumb-1.
+	* config/arm/arm.h (USE_RETURN_INSN): Enable for Thumb-2.
+	* config/arm/arm.md (*call_symbol, *call_value_symbol): Use for
+	Thumb-2.
+	(*call_insn, *call_value_insn): Don't use for Thumb-2.
+	(sibcall, sibcall_value, *sibcall_insn, *sibcall_value_insn): Use
+	for Thumb-2.
+	(return): New expander.
+	(*arm_return): New name for ARM return insn.
+	* config/arm/thumb2.md (*thumb2_return): New insn pattern.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Merge from Sourcery G++ 4.4:
+ 
+ 	2010-02-04  Daniel Jacobowitz  <dan@codesourcery.com>
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-12 16:18:41 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 10:30:35 +0000
+@@ -4886,8 +4886,8 @@
+     return false;
+ 
+   /* Never tailcall something for which we have no decl, or if we
+-     are in Thumb mode.  */
+-  if (decl == NULL || TARGET_THUMB)
++     are generating code for Thumb-1.  */
++  if (decl == NULL || TARGET_THUMB1)
+     return false;
+ 
+   /* The PIC register is live on entry to VxWorks PLT entries, so we
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-12 16:18:41 +0000
++++ new/gcc/config/arm/arm.h	2010-08-13 10:30:35 +0000
+@@ -1833,11 +1833,8 @@
+ 
+ /* Determine if the epilogue should be output as RTL.
+    You should override this if you define FUNCTION_EXTRA_EPILOGUE.  */
+-/* This is disabled for Thumb-2 because it will confuse the
+-   conditional insn counter.
+-   Do not use a return insn if we're avoiding ldm/stm instructions.  */
+ #define USE_RETURN_INSN(ISCOND)				\
+-  ((TARGET_ARM && !low_irq_latency) ? use_return_insn (ISCOND, NULL) : 0)
++  ((TARGET_32BIT && !low_irq_latency) ? use_return_insn (ISCOND, NULL) : 0)
+ 
+ /* Definitions for register eliminations.
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-12 16:47:21 +0000
++++ new/gcc/config/arm/arm.md	2010-08-13 10:30:35 +0000
+@@ -8798,7 +8798,7 @@
+ 	 (match_operand 1 "" ""))
+    (use (match_operand 2 "" ""))
+    (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_ARM
++  "TARGET_32BIT
+    && (GET_CODE (operands[0]) == SYMBOL_REF)
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))"
+   "*
+@@ -8814,7 +8814,7 @@
+ 	(match_operand:SI 2 "" "")))
+    (use (match_operand 3 "" ""))
+    (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_ARM
++  "TARGET_32BIT
+    && (GET_CODE (operands[1]) == SYMBOL_REF)
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))"
+   "*
+@@ -8829,7 +8829,7 @@
+ 	 (match_operand:SI 1 "" ""))
+    (use (match_operand 2 "" ""))
+    (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_THUMB
++  "TARGET_THUMB1
+    && GET_CODE (operands[0]) == SYMBOL_REF
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[0]))"
+   "bl\\t%a0"
+@@ -8843,7 +8843,7 @@
+ 	      (match_operand 2 "" "")))
+    (use (match_operand 3 "" ""))
+    (clobber (reg:SI LR_REGNUM))]
+-  "TARGET_THUMB
++  "TARGET_THUMB1
+    && GET_CODE (operands[1]) == SYMBOL_REF
+    && !arm_is_long_call_p (SYMBOL_REF_DECL (operands[1]))"
+   "bl\\t%a1"
+@@ -8857,7 +8857,7 @@
+ 		    (match_operand 1 "general_operand" ""))
+ 	      (return)
+ 	      (use (match_operand 2 "" ""))])]
+-  "TARGET_ARM"
++  "TARGET_32BIT"
+   "
+   {
+     if (operands[2] == NULL_RTX)
+@@ -8871,7 +8871,7 @@
+ 			 (match_operand 2 "general_operand" "")))
+ 	      (return)
+ 	      (use (match_operand 3 "" ""))])]
+-  "TARGET_ARM"
++  "TARGET_32BIT"
+   "
+   {
+     if (operands[3] == NULL_RTX)
+@@ -8884,7 +8884,7 @@
+ 	(match_operand 1 "" ""))
+   (return)
+   (use (match_operand 2 "" ""))]
+-  "TARGET_ARM && GET_CODE (operands[0]) == SYMBOL_REF"
++  "TARGET_32BIT && GET_CODE (operands[0]) == SYMBOL_REF"
+   "*
+   return NEED_PLT_RELOC ? \"b%?\\t%a0(PLT)\" : \"b%?\\t%a0\";
+   "
+@@ -8897,15 +8897,20 @@
+ 	     (match_operand 2 "" "")))
+   (return)
+   (use (match_operand 3 "" ""))]
+-  "TARGET_ARM && GET_CODE (operands[1]) == SYMBOL_REF"
++  "TARGET_32BIT && GET_CODE (operands[1]) == SYMBOL_REF"
+   "*
+   return NEED_PLT_RELOC ? \"b%?\\t%a1(PLT)\" : \"b%?\\t%a1\";
+   "
+   [(set_attr "type" "call")]
+ )
+ 
++(define_expand "return"
++  [(return)]
++  "TARGET_32BIT && USE_RETURN_INSN (FALSE)"
++  "")
++
+ ;; Often the return insn will be the same as loading from memory, so set attr
+-(define_insn "return"
++(define_insn "*arm_return"
+   [(return)]
+   "TARGET_ARM && USE_RETURN_INSN (FALSE)"
+   "*
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-12 16:47:21 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-13 10:30:35 +0000
+@@ -1054,6 +1054,19 @@
+    (set_attr "length" "20")]
+ )
+ 
++;; Note: this is not predicable, to avoid issues with linker-generated
++;; interworking stubs.
++(define_insn "*thumb2_return"
++  [(return)]
++  "TARGET_THUMB2 && USE_RETURN_INSN (FALSE)"
++  "*
++  {
++    return output_return_instruction (const_true_rtx, TRUE, FALSE);
++  }"
++  [(set_attr "type" "load1")
++   (set_attr "length" "12")]
++)
++
+ (define_insn_and_split "thumb2_eh_return"
+   [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "r")]
+ 		    VUNSPEC_EH_RETURN)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99347.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99347.patch
new file mode 100644
index 0000000000..57b8605e55
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99347.patch
@@ -0,0 +1,83 @@
+	Merge from Sourcery G++ 4.4:
+
+	2010-02-15  Julian Brown  <julian@codesourcery.com>
+
+	Issue #7486
+
+	gcc/
+	* config/arm/arm.c (arm_libcall_uses_aapcs_base)
+	(arm_init_cumulative_args): Use correct ABI for double-precision
+	helper functions in hard-float mode if only single-precision
+	arithmetic is supported in hardware.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+ 	Backport from FSF mainline:
+ 
+ 	Julian Brown  <julian@codesourcery.com>
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 10:30:35 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 10:43:42 +0000
+@@ -3453,6 +3453,28 @@
+ 		   convert_optab_libfunc (sfix_optab, DImode, SFmode));
+       add_libcall (libcall_htab,
+ 		   convert_optab_libfunc (ufix_optab, DImode, SFmode));
++
++      /* Values from double-precision helper functions are returned in core
++	 registers if the selected core only supports single-precision
++	 arithmetic, even if we are using the hard-float ABI.  */
++      if (TARGET_VFP)
++        {
++	  add_libcall (libcall_htab, optab_libfunc (add_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (sdiv_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (smul_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (neg_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (sub_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (eq_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (lt_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (le_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (ge_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (gt_optab, DFmode));
++	  add_libcall (libcall_htab, optab_libfunc (unord_optab, DFmode));
++	  add_libcall (libcall_htab,
++		       convert_optab_libfunc (sext_optab, DFmode, SFmode));
++	  add_libcall (libcall_htab,
++		       convert_optab_libfunc (trunc_optab, SFmode, DFmode));
++	}
+     }
+ 
+   return libcall && htab_find (libcall_htab, libcall) != NULL;
+@@ -4406,6 +4428,31 @@
+       if (arm_libcall_uses_aapcs_base (libname))
+ 	pcum->pcs_variant = ARM_PCS_AAPCS;
+  
++      /* We must pass arguments to double-precision helper functions in core
++         registers if we only have hardware support for single-precision
++	 arithmetic, even if we are using the hard-float ABI.  */
++      if (TARGET_VFP
++          && (rtx_equal_p (libname, optab_libfunc (add_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (sdiv_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (smul_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (neg_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (sub_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (eq_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (lt_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (le_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (ge_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (gt_optab, DFmode))
++	      || rtx_equal_p (libname, optab_libfunc (unord_optab, DFmode))
++	      || rtx_equal_p (libname, convert_optab_libfunc (sext_optab,
++							      DFmode, SFmode))
++	      || rtx_equal_p (libname, convert_optab_libfunc (trunc_optab,
++							      SFmode, DFmode))
++	      || rtx_equal_p (libname, convert_optab_libfunc (sfix_optab,
++							      SImode, DFmode))
++	      || rtx_equal_p (libname, convert_optab_libfunc (ufix_optab,
++							      SImode, DFmode))))
++        pcum->pcs_variant = ARM_PCS_AAPCS;
++ 
+       pcum->aapcs_ncrn = pcum->aapcs_next_ncrn = 0;
+       pcum->aapcs_reg = NULL_RTX;
+       pcum->aapcs_partial = 0;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99348.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99348.patch
new file mode 100644
index 0000000000..f99938a7f1
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99348.patch
@@ -0,0 +1,37 @@
+	2010-02-23  Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* calls.c (precompute_register_parameters): Avoid generating a
+	register move if optimizing for size.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2010-02-15  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Issue #7486
+
+=== modified file 'gcc/calls.c'
+--- old/gcc/calls.c	2010-04-02 18:54:46 +0000
++++ new/gcc/calls.c	2010-08-13 10:50:45 +0000
+@@ -703,7 +703,9 @@
+ 
+ 	   For small register classes, also do this if this call uses
+ 	   register parameters.  This is to avoid reload conflicts while
+-	   loading the parameters registers.  */
++	   loading the parameters registers.
++	   
++	   Avoid creating the extra move if optimizing for size.  */
+ 
+ 	else if ((! (REG_P (args[i].value)
+ 		     || (GET_CODE (args[i].value) == SUBREG
+@@ -711,6 +713,7 @@
+ 		 && args[i].mode != BLKmode
+ 		 && rtx_cost (args[i].value, SET, optimize_insn_for_speed_p ())
+ 		    > COSTS_N_INSNS (1)
++		 && !optimize_size
+ 		 && ((SMALL_REGISTER_CLASSES && *reg_parm_seen)
+ 		     || optimize))
+ 	  args[i].value = copy_to_mode_reg (args[i].mode, args[i].value);
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99349.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99349.patch
new file mode 100644
index 0000000000..a95b649e43
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99349.patch
@@ -0,0 +1,401 @@
+	* config/arm/arm.c (thumb2_size_rtx_costs): New.
+	(arm_rtx_costs): Call above for Thumb-2.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2010-02-23  Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+ 	* calls.c (precompute_register_parameters): Avoid generating a
+ 	register move if optimizing for size.
+ 
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 10:43:42 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 10:55:28 +0000
+@@ -141,6 +141,7 @@
+ static bool arm_have_conditional_execution (void);
+ static bool arm_rtx_costs_1 (rtx, enum rtx_code, int*, bool);
+ static bool arm_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *);
++static bool thumb2_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *);
+ static bool arm_slowmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool);
+ static bool arm_fastmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool);
+ static bool arm_xscale_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool);
+@@ -7316,14 +7317,372 @@
+     }
+ }
+ 
++static bool
++thumb2_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
++		     int *total)
++{
++  /* Attempt to give a lower cost to RTXs which can optimistically be
++     represented as short insns, assuming that the right conditions will hold
++     later (e.g. low registers will be chosen if a short insn requires them).
++
++     Note that we don't make wide insns cost twice as much as narrow insns,
++     because we can't prove that a particular RTX will actually use a narrow
++     insn, because not enough information is available (e.g., we don't know
++     which hard registers pseudos will be assigned).  Consider these to be
++     "expected" sizes/weightings.
++
++     (COSTS_NARROW_INSNS has the same weight as COSTS_N_INSNS.)  */
++
++#define COSTS_NARROW_INSNS(N) ((N) * 4)
++#define COSTS_WIDE_INSNS(N) ((N) * 6)
++#define THUMB2_LIBCALL_COST COSTS_WIDE_INSNS (2)
++  enum machine_mode mode = GET_MODE (x);
++
++  switch (code)
++    {
++    case MEM:
++      if (REG_P (XEXP (x, 0)))
++	{
++	  /* Hopefully this will use a narrow ldm/stm insn.  */
++	  *total = COSTS_NARROW_INSNS (1);
++	  return true;
++	}
++      else if ((GET_CODE (XEXP (x, 0)) == SYMBOL_REF
++		&& CONSTANT_POOL_ADDRESS_P (XEXP (x, 0)))
++	       || reg_mentioned_p (virtual_stack_vars_rtx, XEXP (x, 0))
++	       || reg_mentioned_p (stack_pointer_rtx, XEXP (x, 0)))
++	{
++	  *total = COSTS_NARROW_INSNS (ARM_NUM_REGS (mode));
++	  return true;
++	}
++      else if (GET_CODE (XEXP (x, 0)) == PLUS)
++	{
++	  rtx plus = XEXP (x, 0);
++
++	  if (GET_CODE (XEXP (plus, 1)) == CONST_INT)
++	    {
++	      HOST_WIDE_INT cst = INTVAL (XEXP (plus, 1));
++
++	      if (cst >= 0 && cst < 256)
++		*total = COSTS_NARROW_INSNS (ARM_NUM_REGS (mode));
++	      else
++		*total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++
++	      *total += rtx_cost (XEXP (plus, 0), code, false);
++
++	      return true;
++	    }
++	}
++
++      *total = COSTS_NARROW_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case DIV:
++    case MOD:
++    case UDIV:
++    case UMOD:
++      if (arm_arch_hwdiv)
++	*total = COSTS_WIDE_INSNS (1);
++      else
++	*total = THUMB2_LIBCALL_COST;
++      return false;
++
++    case ROTATE:
++      if (mode == SImode && REG_P (XEXP (x, 1)))
++	{
++	  *total = COSTS_WIDE_INSNS (1) + COSTS_NARROW_INSNS (1)
++		   + rtx_cost (XEXP (x, 0), code, false);
++	  return true;
++	}
++      /* Fall through */
++
++    case ASHIFT:
++    case LSHIFTRT:
++    case ASHIFTRT:
++      if (mode == DImode && GET_CODE (XEXP (x, 1)) == CONST_INT)
++	{
++	  *total = COSTS_WIDE_INSNS (3) + rtx_cost (XEXP (x, 0), code, false);
++	  return true;
++	}
++      else if (mode == SImode)
++	{
++	  *total = COSTS_NARROW_INSNS (1);
++	  return false;
++	}
++
++      /* Needs a libcall.  */
++      *total = THUMB2_LIBCALL_COST;
++      return false;
++
++    case ROTATERT:
++      if (mode == DImode && GET_CODE (XEXP (x, 1)) == CONST_INT)
++	{
++	  *total = COSTS_WIDE_INSNS (3) + rtx_cost (XEXP (x, 0), code, false);
++	  return true;
++	}
++      else if (mode == SImode)
++	{
++	  if (GET_CODE (XEXP (x, 1)) == CONST_INT)
++	    *total = COSTS_WIDE_INSNS (1) + rtx_cost (XEXP (x, 0), code, false);
++	  else
++	    *total = COSTS_NARROW_INSNS (1)
++		     + rtx_cost (XEXP (x, 0), code, false);
++	  return true;
++	}
++
++      /* Needs a libcall.  */
++      *total = THUMB2_LIBCALL_COST;
++      return false;
++
++    case MINUS:
++      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
++	  && (mode == SFmode || !TARGET_VFP_SINGLE))
++	{
++	  *total = COSTS_WIDE_INSNS (1);
++	  return false;
++	}
++
++      if (mode == SImode)
++	{
++	  enum rtx_code subcode0 = GET_CODE (XEXP (x, 0));
++	  enum rtx_code subcode1 = GET_CODE (XEXP (x, 1));
++
++	  if (subcode0 == ROTATE || subcode0 == ROTATERT || subcode0 == ASHIFT
++	      || subcode0 == LSHIFTRT || subcode0 == ASHIFTRT
++	      || subcode1 == ROTATE || subcode1 == ROTATERT
++	      || subcode1 == ASHIFT || subcode1 == LSHIFTRT
++	      || subcode1 == ASHIFTRT)
++	    {
++	      /* It's just the cost of the two operands.  */
++	      *total = 0;
++	      return false;
++	    }
++
++	  if (subcode1 == CONST_INT)
++	    {
++	      HOST_WIDE_INT cst = INTVAL (XEXP (x, 1));
++
++	      if (cst >= 0 && cst < 256)
++		*total = COSTS_NARROW_INSNS (1);
++	      else
++		*total = COSTS_WIDE_INSNS (1);
++
++	      *total += rtx_cost (XEXP (x, 0), code, false);
++
++	      return true;
++	    }
++
++	  *total = COSTS_NARROW_INSNS (1);
++	  return false;
++	}
++
++      *total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case PLUS:
++      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
++	  && (mode == SFmode || !TARGET_VFP_SINGLE))
++	{
++	  *total = COSTS_WIDE_INSNS (1);
++	  return false;
++	}
++
++      /* Fall through */
++    case AND: case XOR: case IOR:
++      if (mode == SImode)
++	{
++	  enum rtx_code subcode = GET_CODE (XEXP (x, 0));
++
++	  if (subcode == ROTATE || subcode == ROTATERT || subcode == ASHIFT
++	      || subcode == LSHIFTRT || subcode == ASHIFTRT
++	      || (code == AND && subcode == NOT))
++	    {
++	      /* It's just the cost of the two operands.  */
++	      *total = 0;
++	      return false;
++	    }
++
++	  if (code == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
++	    {
++	      HOST_WIDE_INT cst = INTVAL (XEXP (x, 1));
++
++	      if ((reg_mentioned_p (virtual_stack_vars_rtx, XEXP (x, 0))
++		   || reg_mentioned_p (stack_pointer_rtx, XEXP (x, 0)))
++		  && cst > -512 && cst < 1024)
++		/* Only approximately correct, depending on destination
++		   register.  */
++		*total = COSTS_NARROW_INSNS (1);
++	      else if (cst > -256 && cst < 256)
++		*total = COSTS_NARROW_INSNS (1);
++	      else
++		*total = COSTS_WIDE_INSNS (1);
++
++	      *total += rtx_cost (XEXP (x, 0), code, false);
++
++	      return true;
++	    }
++
++	  if (subcode == MULT
++	      && power_of_two_operand (XEXP (XEXP (x, 0), 1), mode))
++	    {
++	      *total = COSTS_WIDE_INSNS (1)
++		       + rtx_cost (XEXP (x, 1), code, false);
++	      return true;
++	    }
++	}
++
++      *total = COSTS_NARROW_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case MULT:
++      if (mode == SImode && GET_CODE (XEXP (x, 1)) != CONST_INT)
++	{
++	  /* Might be using muls.  */
++	  *total = COSTS_NARROW_INSNS (1);
++	  return false;
++	}
++      *total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case NEG:
++      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
++	  && (mode == SFmode || !TARGET_VFP_SINGLE))
++	{
++	  *total = COSTS_WIDE_INSNS (1);
++	  return false;
++	}
++
++      /* Fall through */
++    case NOT:
++      if (mode == SImode)
++	{
++	  *total = COSTS_NARROW_INSNS (1);
++	  return false;
++	}
++      *total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case IF_THEN_ELSE:
++      *total = COSTS_NARROW_INSNS (1);
++      return false;
++
++    case COMPARE:
++      if (cc_register (XEXP (x, 0), VOIDmode))
++	*total = 0;
++      else
++	*total = COSTS_NARROW_INSNS (1);
++      return false;
++
++    case ABS:
++      if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
++	  && (mode == SFmode || !TARGET_VFP_SINGLE))
++	*total = COSTS_WIDE_INSNS (1);
++      else
++	*total = COSTS_NARROW_INSNS (ARM_NUM_REGS (mode)) * 2;
++      return false;
++
++    case SIGN_EXTEND:
++      if (GET_MODE_SIZE (mode) <= 4)
++	*total = GET_CODE (XEXP (x, 0)) == MEM ? 0 : COSTS_NARROW_INSNS (1);
++      else
++	*total = COSTS_NARROW_INSNS (1)
++		 + COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++      return false;
++
++    case ZERO_EXTEND:
++      if (GET_MODE_SIZE (mode) > 4)
++	*total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode) - 1);
++      else if (GET_CODE (XEXP (x, 0)) == MEM)
++	*total = 0;
++      else
++	*total = COSTS_NARROW_INSNS (1);
++      return false;
++
++    case CONST_INT:
++      {
++	HOST_WIDE_INT cst = INTVAL (x);
++
++	switch (outer_code)
++	  {
++	  case PLUS:
++	    if (cst > -256 && cst < 256)
++	      *total = 0;
++	    else
++	      /* See note about optabs below.  */
++	      *total = COSTS_N_INSNS (1);
++	    return true;
++
++	  case MINUS:
++	  case COMPARE:
++	    if (cst >= 0 && cst < 256)
++	      *total = 0;
++	    else
++	      /* See note about optabs below.  */
++	      *total = COSTS_N_INSNS (1);
++	    return true;
++
++	  case ASHIFT:
++	  case ASHIFTRT:
++	  case LSHIFTRT:
++	    *total = 0;
++	    return true;
++
++	  default:
++	    /* Constants are compared explicitly against COSTS_N_INSNS (1) in
++	       optabs.c, creating an alternative, larger code sequence for more
++	       expensive constants).  So, it doesn't pay to make some constants
++	       cost more than this.  */
++	    *total = COSTS_N_INSNS (1);
++	  }
++	return true;
++      }
++
++    case CONST:
++    case LABEL_REF:
++    case SYMBOL_REF:
++      *total = COSTS_WIDE_INSNS (2);
++      return true;
++
++    case CONST_DOUBLE:
++      *total = COSTS_WIDE_INSNS (4);
++      return true;
++
++    case HIGH:
++    case LO_SUM:
++      /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
++       cost of these slightly.  */
++      *total = COSTS_WIDE_INSNS (1) + 1;
++      return true;
++
++    default:
++      if (mode != VOIDmode)
++	*total = COSTS_WIDE_INSNS (ARM_NUM_REGS (mode));
++      else
++	/* A guess (inherited from arm_size_rtx_costs).  */
++	*total = COSTS_WIDE_INSNS (4);
++      return false;
++    }
++
++  return true;
++#undef THUMB2_LIBCALL_COST
++#undef COSTS_WIDE_INSNS
++#undef COSTS_NARROW_INSNS
++}
++
+ /* RTX costs when optimizing for size.  */
+ static bool
+ arm_rtx_costs (rtx x, int code, int outer_code, int *total,
+ 	       bool speed)
+ {
+   if (!speed)
+-    return arm_size_rtx_costs (x, (enum rtx_code) code,
+-			       (enum rtx_code) outer_code, total);
++    {
++      if (TARGET_THUMB2)
++	return thumb2_size_rtx_costs (x, (enum rtx_code) code,
++				      (enum rtx_code) outer_code, total);
++      else
++	return arm_size_rtx_costs (x, (enum rtx_code) code,
++				   (enum rtx_code) outer_code, total);
++    }
+   else
+     return all_cores[(int)arm_tune].rtx_costs (x, (enum rtx_code) code,
+ 					       (enum rtx_code) outer_code,
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch
new file mode 100644
index 0000000000..3f66f9d157
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99350.patch
@@ -0,0 +1,184 @@
+	Jie Zhang  <jie@codesourcery.com>
+
+	Issue #7122
+
+	gcc/
+	* config/arm/vfp.md (movdf_vfp): Add load double 0.0 case.
+	(thumb2_movdf_vfp): Likewise. Require that one of the operands be a
+	register.
+	* config/arm/constraints.md (D0): New constraint.
+	
+	gcc/testsuite/
+	* gcc.target/arm/neon-load-df0.c: New test.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2010-02-23  Julian Brown  <julian@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/constraints.md'
+--- old/gcc/config/arm/constraints.md	2010-08-12 16:47:21 +0000
++++ new/gcc/config/arm/constraints.md	2010-08-13 10:59:06 +0000
+@@ -29,7 +29,7 @@
+ ;; in Thumb-1 state: I, J, K, L, M, N, O
+ 
+ ;; The following multi-letter normal constraints have been used:
+-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
++;; in ARM/Thumb-2 state: D0, Da, Db, Dc, Di, Dn, Dl, DL, Dv, Dy
+ ;; in Thumb-1 state: Pa, Pb
+ ;; in Thumb-2 state: Ps, Pt, Pv
+ 
+@@ -173,6 +173,13 @@
+  (and (match_code "const_double")
+       (match_test "TARGET_32BIT && neg_const_double_rtx_ok_for_fpa (op)")))
+ 
++(define_constraint "D0"
++ "@internal
++  In ARM/Thumb-2 state a 0.0 floating point constant which can
++  be loaded with a Neon vmov immediate instruction."
++ (and (match_code "const_double")
++      (match_test "TARGET_NEON && op == CONST0_RTX (mode)")))
++
+ (define_constraint "Da"
+  "@internal
+   In ARM/Thumb-2 state a const_int, const_double or const_vector that can
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-08-12 11:29:02 +0000
++++ new/gcc/config/arm/vfp.md	2010-08-13 10:59:06 +0000
+@@ -402,8 +402,8 @@
+ ;; DFmode moves
+ 
+ (define_insn "*movdf_vfp"
+-  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w  ,Uv,w,r")
+-	(match_operand:DF 1 "soft_df_operand"		   " ?r,w,Dy,mF,r,UvF,w, w,r"))]
++  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w, r, m,w  ,Uv,w,r")
++	(match_operand:DF 1 "soft_df_operand"		   " ?r,w,Dy,D0,mF,r,UvF,w, w,r"))]
+   "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
+    && (   register_operand (operands[0], DFmode)
+        || register_operand (operands[1], DFmode))"
+@@ -418,16 +418,18 @@
+       case 2:
+ 	gcc_assert (TARGET_VFP_DOUBLE);
+         return \"fconstd%?\\t%P0, #%G1\";
+-      case 3: case 4:
++      case 3:
++	return \"vmov.i32\\t%P0, #0\";
++      case 4: case 5:
+ 	return output_move_double (operands);
+-      case 5: case 6:
++      case 6: case 7:
+ 	return output_move_vfp (operands);
+-      case 7:
++      case 8:
+ 	if (TARGET_VFP_SINGLE)
+ 	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
+ 	else
+ 	  return \"fcpyd%?\\t%P0, %P1\";
+-      case 8:
++      case 9:
+         return \"#\";
+       default:
+ 	gcc_unreachable ();
+@@ -435,10 +437,10 @@
+     }
+   "
+   [(set_attr "type"
+-     "r_2_f,f_2_r,fconstd,f_loadd,f_stored,load2,store2,ffarithd,*")
+-   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+-   (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+-			       (eq_attr "alternative" "7")
++     "r_2_f,f_2_r,fconstd,*,f_loadd,f_stored,load2,store2,ffarithd,*")
++   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,neon_vmov,*,*,*,*,neon_vmov,*")
++   (set (attr "length") (cond [(eq_attr "alternative" "4,5,9") (const_int 8)
++			       (eq_attr "alternative" "8")
+ 				(if_then_else
+ 				 (eq (symbol_ref "TARGET_VFP_SINGLE")
+ 				     (const_int 1))
+@@ -446,14 +448,16 @@
+ 				 (const_int 4))]
+ 			      (const_int 4)))
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "*,*,*,1020,*,1020,*,*,*")
+-   (set_attr "neg_pool_range" "*,*,*,1008,*,1008,*,*,*")]
++   (set_attr "pool_range" "*,*,*,*,1020,*,1020,*,*,*")
++   (set_attr "neg_pool_range" "*,*,*,*,1008,*,1008,*,*,*")]
+ )
+ 
+ (define_insn "*thumb2_movdf_vfp"
+-  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,r, m,w  ,Uv,w,r")
+-	(match_operand:DF 1 "soft_df_operand"		   " ?r,w,Dy,mF,r,UvF,w, w,r"))]
+-  "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP"
++  [(set (match_operand:DF 0 "nonimmediate_soft_df_operand" "=w,?r,w ,w,r, m,w  ,Uv,w,r")
++	(match_operand:DF 1 "soft_df_operand"		   " ?r,w,Dy,D0,mF,r,UvF,w, w,r"))]
++  "TARGET_THUMB2 && TARGET_HARD_FLOAT && TARGET_VFP
++   && (   register_operand (operands[0], DFmode)
++       || register_operand (operands[1], DFmode))"
+   "*
+   {
+     switch (which_alternative)
+@@ -465,11 +469,13 @@
+       case 2:
+ 	gcc_assert (TARGET_VFP_DOUBLE);
+ 	return \"fconstd%?\\t%P0, #%G1\";
+-      case 3: case 4: case 8:
++      case 3:
++	return \"vmov.i32\\t%P0, #0\";
++      case 4: case 5: case 9:
+ 	return output_move_double (operands);
+-      case 5: case 6:
++      case 6: case 7:
+ 	return output_move_vfp (operands);
+-      case 7:
++      case 8:
+ 	if (TARGET_VFP_SINGLE)
+ 	  return \"fcpys%?\\t%0, %1\;fcpys%?\\t%p0, %p1\";
+ 	else
+@@ -480,18 +486,18 @@
+     }
+   "
+   [(set_attr "type"
+-     "r_2_f,f_2_r,fconstd,load2,store2,f_load,f_store,ffarithd,*")
+-   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,*,*,*,*,neon_vmov,*")
+-   (set (attr "length") (cond [(eq_attr "alternative" "3,4,8") (const_int 8)
+-			       (eq_attr "alternative" "7")
++     "r_2_f,f_2_r,fconstd,*,load2,store2,f_load,f_store,ffarithd,*")
++   (set_attr "neon_type" "neon_mcr_2_mcrr,neon_mrrc,*,neon_vmov,*,*,*,*,neon_vmov,*")
++   (set (attr "length") (cond [(eq_attr "alternative" "4,5,9") (const_int 8)
++			       (eq_attr "alternative" "8")
+ 				(if_then_else
+ 				 (eq (symbol_ref "TARGET_VFP_SINGLE")
+ 				     (const_int 1))
+ 				 (const_int 8)
+ 				 (const_int 4))]
+ 			      (const_int 4)))
+-   (set_attr "pool_range" "*,*,*,4096,*,1020,*,*,*")
+-   (set_attr "neg_pool_range" "*,*,*,0,*,1008,*,*,*")]
++   (set_attr "pool_range" "*,*,*,*,4096,*,1020,*,*,*")
++   (set_attr "neg_pool_range" "*,*,*,*,0,*,1008,*,*,*")]
+ )
+ 
+ 
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-load-df0.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-load-df0.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-load-df0.c	2010-08-13 10:59:06 +0000
+@@ -0,0 +1,14 @@
++/* Test the optimization of loading 0.0 for ARM Neon.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++double x;
++void bar ()
++{
++  x = 0.0;
++}
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[dD\]\[0-9\]+, #0\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
new file mode 100644
index 0000000000..aa3b3eb85f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99351.patch
@@ -0,0 +1,548 @@
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+        Merge from Sourcery G++ 4.4:
+
+        Jie Zhang  <jie@codesourcery.com>
+        Issue #7122
+
+        gcc/
+	* config/arm/arm.c (arm_rtx_costs_1): Adjust cost for
+	CONST_VECTOR.
+	(arm_size_rtx_costs): Likewise.
+	(thumb2_size_rtx_costs): Likewise.
+	(neon_valid_immediate): Add a case for double 0.0.
+
+	gcc/testsuite/
+	* gcc.target/arm/neon-vdup-1.c: New test case.
+	* gcc.target/arm/neon-vdup-2.c: New test case.
+	* gcc.target/arm/neon-vdup-3.c: New test case.
+	* gcc.target/arm/neon-vdup-4.c: New test case.
+	* gcc.target/arm/neon-vdup-5.c: New test case.
+	* gcc.target/arm/neon-vdup-6.c: New test case.
+	* gcc.target/arm/neon-vdup-7.c: New test case.
+	* gcc.target/arm/neon-vdup-8.c: New test case.
+	* gcc.target/arm/neon-vdup-9.c: New test case.
+	* gcc.target/arm/neon-vdup-10.c: New test case.
+	* gcc.target/arm/neon-vdup-11.c: New test case.
+	* gcc.target/arm/neon-vdup-12.c: New test case.
+	* gcc.target/arm/neon-vdup-13.c: New test case.
+	* gcc.target/arm/neon-vdup-14.c: New test case.
+	* gcc.target/arm/neon-vdup-15.c: New test case.
+	* gcc.target/arm/neon-vdup-16.c: New test case.
+	* gcc.target/arm/neon-vdup-17.c: New test case.
+	* gcc.target/arm/neon-vdup-18.c: New test case.
+	* gcc.target/arm/neon-vdup-19.c: New test case.
+
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 10:55:28 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 11:02:47 +0000
+@@ -7061,6 +7061,17 @@
+ 	*total = COSTS_N_INSNS (4);
+       return true;
+ 
++    case CONST_VECTOR:
++      if (TARGET_NEON
++	  && TARGET_HARD_FLOAT
++	  && outer == SET
++	  && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
++	  && neon_immediate_valid_for_move (x, mode, NULL, NULL))
++	*total = COSTS_N_INSNS (1);
++      else
++	*total = COSTS_N_INSNS (4);
++      return true;
++
+     default:
+       *total = COSTS_N_INSNS (4);
+       return false;
+@@ -7301,6 +7312,17 @@
+       *total = COSTS_N_INSNS (4);
+       return true;
+ 
++    case CONST_VECTOR:
++      if (TARGET_NEON
++	  && TARGET_HARD_FLOAT
++	  && outer_code == SET
++	  && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
++	  && neon_immediate_valid_for_move (x, mode, NULL, NULL))
++	*total = COSTS_N_INSNS (1);
++      else
++	*total = COSTS_N_INSNS (4);
++      return true;
++
+     case HIGH:
+     case LO_SUM:
+       /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
+@@ -7647,6 +7669,17 @@
+       *total = COSTS_WIDE_INSNS (4);
+       return true;
+ 
++    case CONST_VECTOR:
++      if (TARGET_NEON
++	  && TARGET_HARD_FLOAT
++	  && outer_code == SET
++	  && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode))
++	  && neon_immediate_valid_for_move (x, mode, NULL, NULL))
++	*total = COSTS_WIDE_INSNS (1);
++      else
++	*total = COSTS_WIDE_INSNS (4);
++      return true;
++
+     case HIGH:
+     case LO_SUM:
+       /* We prefer constant pool entries to MOVW/MOVT pairs, so bump the
+@@ -8315,11 +8348,14 @@
+    vmov  i64    17    aaaaaaaa bbbbbbbb cccccccc dddddddd
+                       eeeeeeee ffffffff gggggggg hhhhhhhh
+    vmov  f32    18    aBbbbbbc defgh000 00000000 00000000
++   vmov  f32    19    00000000 00000000 00000000 00000000
+ 
+    For case 18, B = !b. Representable values are exactly those accepted by
+    vfp3_const_double_index, but are output as floating-point numbers rather
+    than indices.
+ 
++   For case 19, we will change it to vmov.i32 when assembling.
++
+    Variants 0-5 (inclusive) may also be used as immediates for the second
+    operand of VORR/VBIC instructions.
+ 
+@@ -8362,7 +8398,7 @@
+       rtx el0 = CONST_VECTOR_ELT (op, 0);
+       REAL_VALUE_TYPE r0;
+ 
+-      if (!vfp3_const_double_rtx (el0))
++      if (!vfp3_const_double_rtx (el0) && el0 != CONST0_RTX (GET_MODE (el0)))
+         return -1;
+ 
+       REAL_VALUE_FROM_CONST_DOUBLE (r0, el0);
+@@ -8384,7 +8420,10 @@
+       if (elementwidth)
+         *elementwidth = 0;
+ 
+-      return 18;
++      if (el0 == CONST0_RTX (GET_MODE (el0)))
++	return 19;
++      else
++	return 18;
+     }
+ 
+   /* Splat vector constant out into a byte vector.  */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-1.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-1.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++float32x4_t out_float32x4_t;
++void test_vdupq_nf32 (void)
++{
++  out_float32x4_t = vdupq_n_f32 (0.0);
++}
++
++/* { dg-final { scan-assembler "vmov\.f32\[ 	\]+\[qQ\]\[0-9\]+, #0\.0\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-10.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-10.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-10.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x12000000);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #3992977407\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-11.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-11.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-11.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint16x8_t out_uint16x8_t;
++void test_vdupq_nu16 (void)
++{
++  out_uint16x8_t = vdupq_n_u16 (0x12);
++}
++
++/* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-12.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-12.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-12.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint16x8_t out_uint16x8_t;
++void test_vdupq_nu16 (void)
++{
++  out_uint16x8_t = vdupq_n_u16 (0x1200);
++}
++
++/* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-13.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-13.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-13.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint16x8_t out_uint16x8_t;
++void test_vdupq_nu16 (void)
++{
++  out_uint16x8_t = vdupq_n_u16 (~0x12);
++}
++
++/* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #65517\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-14.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-14.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-14.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u16' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint16x8_t out_uint16x8_t;
++void test_vdupq_nu16 (void)
++{
++  out_uint16x8_t = vdupq_n_u16 (~0x1200);
++}
++
++/* { dg-final { scan-assembler "vmov\.i16\[ 	\]+\[qQ\]\[0-9\]+, #60927\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-15.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-15.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-15.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u8' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint8x16_t out_uint8x16_t;
++void test_vdupq_nu8 (void)
++{
++  out_uint8x16_t = vdupq_n_u8 (0x12);
++}
++
++/* { dg-final { scan-assembler "vmov\.i8\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-16.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-16.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x12ff);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4863\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-17.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-17.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-17.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x12ffff);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #1245183\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-18.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-18.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-18.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x12ff);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294962432\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-19.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-19.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-19.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x12ffff);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4293722112\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-2.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-2.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_f32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++float32x4_t out_float32x4_t;
++void test_vdupq_nf32 (void)
++{
++  out_float32x4_t = vdupq_n_f32 (0.125);
++}
++
++/* { dg-final { scan-assembler "vmov\.f32\[ 	\]+\[qQ\]\[0-9\]+, #1\.25e-1\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-3.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-3.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x12);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #18\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-4.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-4.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-4.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x1200);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4608\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-5.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-5.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-5.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x120000);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #1179648\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-6.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-6.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-6.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (0x12000000);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #301989888\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-7.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-7.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-7.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x12);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294967277\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-8.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-8.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x1200);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4294962687\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vdup-9.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vdup-9.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vdup-9.c	2010-08-13 11:02:47 +0000
+@@ -0,0 +1,17 @@
++/* Test the optimization of `vdupq_n_u32' ARM Neon intrinsic.  */
++
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O2" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint32x4_t out_uint32x4_t;
++void test_vdupq_nu32 (void)
++{
++  out_uint32x4_t = vdupq_n_u32 (~0x120000);
++}
++
++/* { dg-final { scan-assembler "vmov\.i32\[ 	\]+\[qQ\]\[0-9\]+, #4293787647\(\[ \]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { cleanup-saved-temps } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99352.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99352.patch
new file mode 100644
index 0000000000..8d48ada2fd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99352.patch
@@ -0,0 +1,118 @@
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+        Merge from Sourcery G++ 4.4:
+
+	2010-04-07  Thomas Schwinge  <thomas@codesourcery.com>
+		    Daniel Jacobowitz  <dan@codesourcery.com>
+
+	Issue #6715
+
+	PR debug/40521
+
+	gcc/
+	* dwarf2out.c (NEED_UNWIND_TABLES): Define.
+	(dwarf2out_do_frame, dwarf2out_do_cfi_asm, dwarf2out_begin_prologue)
+	(dwarf2out_frame_finish, dwarf2out_assembly_start): Use it.
+	(dwarf2out_assembly_start): Correct logic for TARGET_UNWIND_INFO.
+	* config/arm/arm.h (DWARF2_UNWIND_INFO): Remove definition.
+	* config/arm/bpabi.h (DWARF2_UNWIND_INFO): Define to zero.
+
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-13 10:30:35 +0000
++++ new/gcc/config/arm/arm.h	2010-08-13 11:11:15 +0000
+@@ -932,9 +932,6 @@
+ #define MUST_USE_SJLJ_EXCEPTIONS 1
+ #endif
+ 
+-/* We can generate DWARF2 Unwind info, even though we don't use it.  */
+-#define DWARF2_UNWIND_INFO 1
+-
+ /* Use r0 and r1 to pass exception handling information.  */
+ #define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? N : INVALID_REGNUM)
+ 
+
+=== modified file 'gcc/config/arm/bpabi.h'
+--- old/gcc/config/arm/bpabi.h	2009-11-20 17:37:30 +0000
++++ new/gcc/config/arm/bpabi.h	2010-08-13 11:11:15 +0000
+@@ -26,6 +26,7 @@
+ #define TARGET_BPABI (TARGET_AAPCS_BASED)
+ 
+ /* BPABI targets use EABI frame unwinding tables.  */
++#define DWARF2_UNWIND_INFO 0
+ #define TARGET_UNWIND_INFO 1
+ 
+ /* Section 4.1 of the AAPCS requires the use of VFP format.  */
+
+=== modified file 'gcc/dwarf2out.c'
+--- old/gcc/dwarf2out.c	2010-07-01 11:31:19 +0000
++++ new/gcc/dwarf2out.c	2010-08-13 11:11:15 +0000
+@@ -124,6 +124,9 @@
+ # endif
+ #endif
+ 
++#define NEED_UNWIND_TABLES \
++  (flag_unwind_tables || (flag_exceptions && ! USING_SJLJ_EXCEPTIONS))
++
+ /* Map register numbers held in the call frame info that gcc has
+    collected using DWARF_FRAME_REGNUM to those that should be output in
+    .debug_frame and .eh_frame.  */
+@@ -147,9 +150,7 @@
+ 	  || write_symbols == VMS_AND_DWARF2_DEBUG
+ 	  || DWARF2_FRAME_INFO || saved_do_cfi_asm
+ #ifdef DWARF2_UNWIND_INFO
+-	  || (DWARF2_UNWIND_INFO
+-	      && (flag_unwind_tables
+-		  || (flag_exceptions && ! USING_SJLJ_EXCEPTIONS)))
++	  || (DWARF2_UNWIND_INFO && NEED_UNWIND_TABLES)
+ #endif
+ 	  );
+ }
+@@ -185,7 +186,7 @@
+ #ifdef TARGET_UNWIND_INFO
+       return false;
+ #else
+-      if (USING_SJLJ_EXCEPTIONS || (!flag_unwind_tables && !flag_exceptions))
++      if (!NEED_UNWIND_TABLES)
+ 	return false;
+ #endif
+     }
+@@ -3906,8 +3907,7 @@
+   /* ??? current_function_func_begin_label is also used by except.c
+      for call-site information.  We must emit this label if it might
+      be used.  */
+-  if ((! flag_exceptions || USING_SJLJ_EXCEPTIONS)
+-      && ! dwarf2out_do_frame ())
++  if (! NEED_UNWIND_TABLES && ! dwarf2out_do_frame ())
+     return;
+ #else
+   if (! dwarf2out_do_frame ())
+@@ -4067,7 +4067,7 @@
+ 
+ #ifndef TARGET_UNWIND_INFO
+   /* Output another copy for the unwinder.  */
+-  if (! USING_SJLJ_EXCEPTIONS && (flag_unwind_tables || flag_exceptions))
++  if (NEED_UNWIND_TABLES)
+     output_call_frame_info (1);
+ #endif
+ }
+@@ -20732,10 +20732,15 @@
+ {
+   if (HAVE_GAS_CFI_SECTIONS_DIRECTIVE && dwarf2out_do_cfi_asm ())
+     {
+-#ifndef TARGET_UNWIND_INFO
+-      if (USING_SJLJ_EXCEPTIONS || (!flag_unwind_tables && !flag_exceptions))
+-#endif
++#ifdef TARGET_UNWIND_INFO
++      /* We're only ever interested in .debug_frame.  */
++      fprintf (asm_out_file, "\t.cfi_sections\t.debug_frame\n");
++#else
++      /* GAS defaults to emitting .eh_frame only, and .debug_frame is not
++	 wanted in case that the former one is present.  */
++      if (! NEED_UNWIND_TABLES)
+ 	fprintf (asm_out_file, "\t.cfi_sections\t.debug_frame\n");
++#endif
+     }
+ }
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99353.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99353.patch
new file mode 100644
index 0000000000..239251d2b5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99353.patch
@@ -0,0 +1,298 @@
+	2010-04-08  Bernd Schmidt  <bernds@codesourcery.com>
+
+	Issue #6952
+
+	gcc/
+	* ira-costs.c (record_reg_classes): Ignore alternatives that are 
+	not enabled. 
+	* config/arm/vfp.md (arm_movdi_vfp): Enable only when not tuning
+	for Cortex-A8.
+	(arm_movdi_vfp_cortexa8): New pattern.
+	* config/arm/neon.md (adddi3_neon, subdi3_neon, anddi3_neon,
+	iordi3_neon, xordi3_neon): Add alternatives to discourage Neon
+	instructions when tuning for Cortex-A8.  Set attribute "alt_tune".
+	* config/arm/arm.md (define_attr "alt_tune", define_attr "enabled"):
+	New.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2010-04-07  Thomas Schwinge  <thomas@codesourcery.com>
+ 		    Daniel Jacobowitz  <dan@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-13 10:30:35 +0000
++++ new/gcc/config/arm/arm.md	2010-08-13 11:40:17 +0000
+@@ -432,6 +432,20 @@
+ 	  (const_string "yes")
+ 	  (const_string "no"))))
+ 
++; Specifies which machine an alternative is tuned for.  Used to compute
++; attribute ENABLED.
++(define_attr "alt_tune" "all,onlya8,nota8" (const_string "all"))
++
++(define_attr "enabled" ""
++  (cond [(and (eq_attr "alt_tune" "onlya8")
++	      (not (eq_attr "tune" "cortexa8")))
++	 (const_int 0)
++
++	 (and (eq_attr "alt_tune" "nota8")
++	      (eq_attr "tune" "cortexa8"))
++	 (const_int 0)]
++	(const_int 1)))
++
+ (include "arm-generic.md")
+ (include "arm926ejs.md")
+ (include "arm1020e.md")
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/neon.md	2010-08-13 11:40:17 +0000
+@@ -827,23 +827,25 @@
+ )
+ 
+ (define_insn "adddi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r")
+-        (plus:DI (match_operand:DI 1 "s_register_operand" "%w,0,0")
+-                 (match_operand:DI 2 "s_register_operand" "w,r,0")))
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?w,?&r,?&r")
++        (plus:DI (match_operand:DI 1 "s_register_operand" "%w,w,0,0")
++                 (match_operand:DI 2 "s_register_operand" "w,w,r,0")))
+    (clobber (reg:CC CC_REGNUM))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+     {
+-    case 0: return "vadd.i64\t%P0, %P1, %P2";
+-    case 1: return "#";
++    case 0: /* fall through */
++    case 1: return "vadd.i64\t%P0, %P1, %P2";
+     case 2: return "#";
++    case 3: return "#";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_1,*,*")
+-   (set_attr "conds" "*,clob,clob")
+-   (set_attr "length" "*,8,8")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
++   (set_attr "conds" "*,*,clob,clob")
++   (set_attr "length" "*,*,8,8")
++   (set_attr "alt_tune" "nota8,onlya8,*,*")]
+ )
+ 
+ (define_insn "*sub<mode>3_neon"
+@@ -861,24 +863,26 @@
+ )
+ 
+ (define_insn "subdi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r,?&r")
+-        (minus:DI (match_operand:DI 1 "s_register_operand" "w,0,r,0")
+-                  (match_operand:DI 2 "s_register_operand" "w,r,0,0")))
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?w,?&r,?&r,?&r")
++        (minus:DI (match_operand:DI 1 "s_register_operand" "w,w,0,r,0")
++                  (match_operand:DI 2 "s_register_operand" "w,w,r,0,0")))
+    (clobber (reg:CC CC_REGNUM))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+     {
+-    case 0: return "vsub.i64\t%P0, %P1, %P2";
+-    case 1: /* fall through */ 
+-    case 2: /* fall through */
+-    case 3: return  "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2";
++    case 0: /* fall through */
++    case 1: return "vsub.i64\t%P0, %P1, %P2";
++    case 2: /* fall through */ 
++    case 3: /* fall through */
++    case 4: return  "subs\\t%Q0, %Q1, %Q2\;sbc\\t%R0, %R1, %R2";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_2,*,*,*")
+-   (set_attr "conds" "*,clob,clob,clob")
+-   (set_attr "length" "*,8,8,8")]
++  [(set_attr "neon_type" "neon_int_2,neon_int_2,*,*,*")
++   (set_attr "conds" "*,*,clob,clob,clob")
++   (set_attr "length" "*,*,8,8,8")
++   (set_attr "alt_tune" "nota8,onlya8,*,*,*")]
+ )
+ 
+ (define_insn "*mul<mode>3_neon"
+@@ -964,23 +968,26 @@
+ )
+ 
+ (define_insn "iordi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r")
+-        (ior:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r")
+-		(match_operand:DI 2 "neon_logic_op2" "w,Dl,r,r")))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?w,w,?w,?&r,?&r")
++        (ior:DI (match_operand:DI 1 "s_register_operand" "%w,w,0,0,0,r")
++		(match_operand:DI 2 "neon_logic_op2" "w,w,Dl,Dl,r,r")))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+     {
+-    case 0: return "vorr\t%P0, %P1, %P2";
+-    case 1: return neon_output_logic_immediate ("vorr", &operands[2],
++    case 0: /* fall through */
++    case 1: return "vorr\t%P0, %P1, %P2";
++    case 2: /* fall through */
++    case 3: return neon_output_logic_immediate ("vorr", &operands[2],
+ 		     DImode, 0, VALID_NEON_QREG_MODE (DImode));
+-    case 2: return "#";
+-    case 3: return "#";
++    case 4: return "#";
++    case 5: return "#";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
+-   (set_attr "length" "*,*,8,8")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,neon_int_1,neon_int_1,*,*")
++   (set_attr "length" "*,*,*,*,8,8")
++   (set_attr "alt_tune" "nota8,onlya8,nota8,onlya8,*,*")]
+ )
+ 
+ ;; The concrete forms of the Neon immediate-logic instructions are vbic and
+@@ -1006,23 +1013,26 @@
+ )
+ 
+ (define_insn "anddi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,w,?&r,?&r")
+-        (and:DI (match_operand:DI 1 "s_register_operand" "%w,0,0,r")
+-		(match_operand:DI 2 "neon_inv_logic_op2" "w,DL,r,r")))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?w,w,?w,?&r,?&r")
++        (and:DI (match_operand:DI 1 "s_register_operand" "%w,w,0,0,0,r")
++		(match_operand:DI 2 "neon_inv_logic_op2" "w,w,DL,DL,r,r")))]
+   "TARGET_NEON"
+ {
+   switch (which_alternative)
+     {
+-    case 0: return "vand\t%P0, %P1, %P2";
+-    case 1: return neon_output_logic_immediate ("vand", &operands[2],
++    case 0: /* fall through */
++    case 1: return "vand\t%P0, %P1, %P2";
++    case 2: /* fall through */
++    case 3: return neon_output_logic_immediate ("vand", &operands[2],
+     		     DImode, 1, VALID_NEON_QREG_MODE (DImode));
+-    case 2: return "#";
+-    case 3: return "#";
++    case 4: return "#";
++    case 5: return "#";
+     default: gcc_unreachable ();
+     }
+ }
+-  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
+-   (set_attr "length" "*,*,8,8")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,neon_int_1,neon_int_1,*,*")
++   (set_attr "length" "*,*,*,*,8,8")
++   (set_attr "alt_tune" "nota8,onlya8,nota8,onlya8,*,*")]
+ )
+ 
+ (define_insn "orn<mode>3_neon"
+@@ -1080,16 +1090,18 @@
+ )
+ 
+ (define_insn "xordi3_neon"
+-  [(set (match_operand:DI 0 "s_register_operand" "=w,?&r,?&r")
+-        (xor:DI (match_operand:DI 1 "s_register_operand" "%w,0,r")
+-	        (match_operand:DI 2 "s_register_operand" "w,r,r")))]
++  [(set (match_operand:DI 0 "s_register_operand" "=w,?w,?&r,?&r")
++        (xor:DI (match_operand:DI 1 "s_register_operand" "%w,w,0,r")
++	        (match_operand:DI 2 "s_register_operand" "w,w,r,r")))]
+   "TARGET_NEON"
+   "@
+    veor\t%P0, %P1, %P2
++   veor\t%P0, %P1, %P2
+    #
+    #"
+-  [(set_attr "neon_type" "neon_int_1,*,*")
+-   (set_attr "length" "*,8,8")]
++  [(set_attr "neon_type" "neon_int_1,neon_int_1,*,*")
++   (set_attr "length" "*,*,8,8")
++   (set_attr "alt_tune" "nota8,onlya8,*,*")]
+ )
+ 
+ (define_insn "one_cmpl<mode>2"
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-08-13 10:59:06 +0000
++++ new/gcc/config/arm/vfp.md	2010-08-13 11:40:17 +0000
+@@ -133,9 +133,51 @@
+ ;; DImode moves
+ 
+ (define_insn "*arm_movdi_vfp"
+-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r,m,w,r,w,w, Uv")
+-	(match_operand:DI 1 "di_operand"              "rIK,mi,r,r,w,w,Uvi,w"))]
+-  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP
++  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r, m,w,r,w,w, Uv")
++	(match_operand:DI 1 "di_operand"              "rIK,mi,r,r,w,w,Uvi,w"))]
++  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8
++   && (   register_operand (operands[0], DImode)
++       || register_operand (operands[1], DImode))"
++  "*
++  switch (which_alternative)
++    {
++    case 0: 
++      return \"#\";
++    case 1:
++    case 2:
++      return output_move_double (operands);
++    case 3:
++      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
++    case 4:
++      return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
++    case 5:
++      if (TARGET_VFP_SINGLE)
++	return \"fcpys%?\\t%0, %1\\t%@ int\;fcpys%?\\t%p0, %p1\\t%@ int\";
++      else
++	return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
++    case 6: case 7:
++      return output_move_vfp (operands);
++    default:
++      gcc_unreachable ();
++    }
++  "
++  [(set_attr "type" "*,load2,store2,r_2_f,f_2_r,ffarithd,f_loadd,f_stored")
++   (set_attr "neon_type" "*,*,*,neon_mcr_2_mcrr,neon_mrrc,neon_vmov,*,*")
++   (set (attr "length") (cond [(eq_attr "alternative" "0,1,2") (const_int 8)
++			       (eq_attr "alternative" "5")
++				(if_then_else
++				 (eq (symbol_ref "TARGET_VFP_SINGLE") (const_int 1))
++				 (const_int 8)
++				 (const_int 4))]
++			      (const_int 4)))
++   (set_attr "pool_range"     "*,1020,*,*,*,*,1020,*")
++   (set_attr "neg_pool_range" "*,1008,*,*,*,*,1008,*")]
++)
++
++(define_insn "*arm_movdi_vfp_cortexa8"
++  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r, r,m,w,!r,w,w, Uv")
++	(match_operand:DI 1 "di_operand"              "rIK,mi,r,r,w,w,Uvi,w"))]
++  "TARGET_ARM && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8
+    && (   register_operand (operands[0], DImode)
+        || register_operand (operands[1], DImode))"
+   "*
+
+=== modified file 'gcc/ira-costs.c'
+--- old/gcc/ira-costs.c	2009-11-25 10:55:54 +0000
++++ new/gcc/ira-costs.c	2010-08-13 11:40:17 +0000
+@@ -224,6 +224,14 @@
+       int alt_fail = 0;
+       int alt_cost = 0, op_cost_add;
+ 
++      if (!recog_data.alternative_enabled_p[alt])
++	{
++	  for (i = 0; i < recog_data.n_operands; i++)
++	    constraints[i] = skip_alternative (constraints[i]);
++
++	  continue;
++	}
++
+       for (i = 0; i < n_ops; i++)
+ 	{
+ 	  unsigned char c;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99354.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99354.patch
new file mode 100644
index 0000000000..743e2751c7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99354.patch
@@ -0,0 +1,384 @@
+	Richard Earnshaw  <rearnsha@arm.com>
+
+	gcc/
+	* doc/tm.texi (OVERLAPPING_REGISTER_NAMES): Document new macro.
+	* output.h (decode_reg_name_and_count): Declare.
+	* varasm.c (decode_reg_name_and_count): New function.
+	(decode_reg_name): Reimplement using decode_reg_name_and_count.
+	* reginfo.c (fix_register): Use decode_reg_name_and_count and 
+	iterate over all regs used.
+	* stmt.c (expand_asm_operands): Likewise.
+	* config/arm/aout.h (OVERLAPPING_REGISTER_NAMES): Define.
+	(ADDITIONAL_REGISTER_NAMES): Remove aliases that overlap
+	multiple machine registers.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	2010-04-08  Bernd Schmidt  <bernds@codesourcery.com>
+ 
+ 	Issue #6952
+
+=== modified file 'gcc/config/arm/aout.h'
+--- old/gcc/config/arm/aout.h	2009-06-21 19:48:15 +0000
++++ new/gcc/config/arm/aout.h	2010-08-13 11:53:46 +0000
+@@ -163,31 +163,45 @@
+   {"mvdx12", 39},				\
+   {"mvdx13", 40},				\
+   {"mvdx14", 41},				\
+-  {"mvdx15", 42},				\
+-  {"d0", 63}, {"q0", 63},			\
+-  {"d1", 65},					\
+-  {"d2", 67}, {"q1", 67},			\
+-  {"d3", 69},					\
+-  {"d4", 71}, {"q2", 71},			\
+-  {"d5", 73},					\
+-  {"d6", 75}, {"q3", 75},			\
+-  {"d7", 77},					\
+-  {"d8", 79}, {"q4", 79},			\
+-  {"d9", 81},					\
+-  {"d10", 83}, {"q5", 83},			\
+-  {"d11", 85},					\
+-  {"d12", 87}, {"q6", 87},			\
+-  {"d13", 89},					\
+-  {"d14", 91}, {"q7", 91},			\
+-  {"d15", 93},					\
+-  {"q8", 95},					\
+-  {"q9", 99},					\
+-  {"q10", 103},					\
+-  {"q11", 107},					\
+-  {"q12", 111},					\
+-  {"q13", 115},					\
+-  {"q14", 119},					\
+-  {"q15", 123}					\
++  {"mvdx15", 42}				\
++}
++#endif
++
++#ifndef OVERLAPPING_REGISTER_NAMES
++#define OVERLAPPING_REGISTER_NAMES		\
++{						\
++  {"d0", 63, 2},				\
++  {"d1", 65, 2},				\
++  {"d2", 67, 2},				\
++  {"d3", 69, 2},				\
++  {"d4", 71, 2},				\
++  {"d5", 73, 2},				\
++  {"d6", 75, 2},				\
++  {"d7", 77, 2},				\
++  {"d8", 79, 2},				\
++  {"d9", 81, 2},				\
++  {"d10", 83, 2},				\
++  {"d11", 85, 2},				\
++  {"d12", 87, 2},				\
++  {"d13", 89, 2},				\
++  {"d14", 91, 2},				\
++  {"d15", 93, 2},				\
++  {"q0", 63, 4},				\
++  {"q1", 67, 4},				\
++  {"q2", 71, 4},				\
++  {"q3", 75, 4},				\
++  {"q4", 79, 4},				\
++  {"q5", 83, 4},				\
++  {"q6", 87, 4},				\
++  {"q7", 91, 4},				\
++  {"q8", 95, 4},				\
++  {"q9", 99, 4},				\
++  {"q10", 103, 4},				\
++  {"q11", 107, 4},				\
++  {"q12", 111, 4},				\
++  {"q13", 115, 4},				\
++  {"q14", 119, 4},				\
++  {"q15", 123, 4}				\
+ }
+ #endif
+ 
+
+=== modified file 'gcc/doc/tm.texi'
+--- old/gcc/doc/tm.texi	2010-06-24 20:06:37 +0000
++++ new/gcc/doc/tm.texi	2010-08-13 11:53:46 +0000
+@@ -8339,6 +8339,22 @@
+ to registers using alternate names.
+ @end defmac
+ 
++@defmac OVERLAPPING_REGISTER_NAMES
++If defined, a C initializer for an array of structures containing a
++name, a register number and a count of the number of consecutive
++machine registers the name overlaps.  This macro defines additional
++names for hard registers, thus allowing the @code{asm} option in
++declarations to refer to registers using alternate names.  Unlike
++@code{ADDITIONAL_REGISTER_NAMES}, this macro should be used when the
++register name implies multiple underlying registers.
++
++This macro should be used when it is important that a clobber in an
++@code{asm} statement clobbers all the underlying values implied by the
++register name.  For example, on ARM, clobbering the double-precision
++VFP register ``d0'' implies clobbering both single-precision registers
++``s0'' and ``s1''.
++@end defmac
++
+ @defmac ASM_OUTPUT_OPCODE (@var{stream}, @var{ptr})
+ Define this macro if you are using an unusual assembler that
+ requires different names for the machine instructions.
+
+=== modified file 'gcc/output.h'
+--- old/gcc/output.h	2009-10-26 21:57:10 +0000
++++ new/gcc/output.h	2010-08-13 11:53:46 +0000
+@@ -173,6 +173,11 @@
+    Prefixes such as % are optional.  */
+ extern int decode_reg_name (const char *);
+ 
++/* Similar to decode_reg_name, but takes an extra parameter that is a
++   pointer to the number of (internal) registers described by the
++   external name.  */
++extern int decode_reg_name_and_count (const char *, int *);
++
+ extern void assemble_alias (tree, tree);
+ 
+ extern void default_assemble_visibility (tree, int);
+
+=== modified file 'gcc/reginfo.c'
+--- old/gcc/reginfo.c	2010-04-19 09:04:43 +0000
++++ new/gcc/reginfo.c	2010-08-13 11:53:46 +0000
+@@ -799,36 +799,41 @@
+ fix_register (const char *name, int fixed, int call_used)
+ {
+   int i;
++  int reg, nregs;
+ 
+   /* Decode the name and update the primary form of
+      the register info.  */
+ 
+-  if ((i = decode_reg_name (name)) >= 0)
++  if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
+     {
+-      if ((i == STACK_POINTER_REGNUM
++      gcc_assert (nregs >= 1);
++      for (i = reg; i < reg + nregs; i++)
++	{
++	  if ((i == STACK_POINTER_REGNUM
+ #ifdef HARD_FRAME_POINTER_REGNUM
+-	   || i == HARD_FRAME_POINTER_REGNUM
++	       || i == HARD_FRAME_POINTER_REGNUM
+ #else
+-	   || i == FRAME_POINTER_REGNUM
++	       || i == FRAME_POINTER_REGNUM
+ #endif
+-	   )
+-	  && (fixed == 0 || call_used == 0))
+-	{
+-	  static const char * const what_option[2][2] = {
+-	    { "call-saved", "call-used" },
+-	    { "no-such-option", "fixed" }};
++	       )
++	      && (fixed == 0 || call_used == 0))
++	    {
++	      static const char * const what_option[2][2] = {
++		{ "call-saved", "call-used" },
++		{ "no-such-option", "fixed" }};
+ 
+-	  error ("can't use '%s' as a %s register", name,
+-		 what_option[fixed][call_used]);
+-	}
+-      else
+-	{
+-	  fixed_regs[i] = fixed;
+-	  call_used_regs[i] = call_used;
++	      error ("can't use '%s' as a %s register", name,
++		     what_option[fixed][call_used]);
++	    }
++	  else
++	    {
++	      fixed_regs[i] = fixed;
++	      call_used_regs[i] = call_used;
+ #ifdef CALL_REALLY_USED_REGISTERS
+-	  if (fixed == 0)
+-	    call_really_used_regs[i] = call_used;
++	      if (fixed == 0)
++		call_really_used_regs[i] = call_used;
+ #endif
++	    }
+ 	}
+     }
+   else
+
+=== modified file 'gcc/stmt.c'
+--- old/gcc/stmt.c	2010-02-19 09:53:51 +0000
++++ new/gcc/stmt.c	2010-08-13 11:53:46 +0000
+@@ -684,13 +684,14 @@
+   for (tail = clobbers; tail; tail = TREE_CHAIN (tail))
+     {
+       const char *regname;
++      int nregs;
+ 
+       if (TREE_VALUE (tail) == error_mark_node)
+ 	return;
+       regname = TREE_STRING_POINTER (TREE_VALUE (tail));
+ 
+-      i = decode_reg_name (regname);
+-      if (i >= 0 || i == -4)
++      i = decode_reg_name_and_count (regname, &nregs);
++      if (i == -4)
+ 	++nclobbers;
+       else if (i == -2)
+ 	error ("unknown register name %qs in %<asm%>", regname);
+@@ -698,14 +699,21 @@
+       /* Mark clobbered registers.  */
+       if (i >= 0)
+         {
+-	  /* Clobbering the PIC register is an error.  */
+-	  if (i == (int) PIC_OFFSET_TABLE_REGNUM)
++	  int reg;
++
++	  for (reg = i; reg < i + nregs; reg++)
+ 	    {
+-	      error ("PIC register %qs clobbered in %<asm%>", regname);
+-	      return;
++	      ++nclobbers;
++
++	      /* Clobbering the PIC register is an error.  */
++	      if (reg == (int) PIC_OFFSET_TABLE_REGNUM)
++		{
++		  error ("PIC register clobbered by %qs in %<asm%>", regname);
++		  return;
++		}
++
++	      SET_HARD_REG_BIT (clobbered_regs, reg);
+ 	    }
+-
+-	  SET_HARD_REG_BIT (clobbered_regs, i);
+ 	}
+     }
+ 
+@@ -1026,7 +1034,8 @@
+       for (tail = clobbers; tail; tail = TREE_CHAIN (tail))
+ 	{
+ 	  const char *regname = TREE_STRING_POINTER (TREE_VALUE (tail));
+-	  int j = decode_reg_name (regname);
++	  int reg, nregs;
++	  int j = decode_reg_name_and_count (regname, &nregs);
+ 	  rtx clobbered_reg;
+ 
+ 	  if (j < 0)
+@@ -1048,30 +1057,39 @@
+ 	      continue;
+ 	    }
+ 
+-	  /* Use QImode since that's guaranteed to clobber just one reg.  */
+-	  clobbered_reg = gen_rtx_REG (QImode, j);
+-
+-	  /* Do sanity check for overlap between clobbers and respectively
+-	     input and outputs that hasn't been handled.  Such overlap
+-	     should have been detected and reported above.  */
+-	  if (!clobber_conflict_found)
++	  for (reg = j; reg < j + nregs; reg++)
+ 	    {
+-	      int opno;
+-
+-	      /* We test the old body (obody) contents to avoid tripping
+-		 over the under-construction body.  */
+-	      for (opno = 0; opno < noutputs; opno++)
+-		if (reg_overlap_mentioned_p (clobbered_reg, output_rtx[opno]))
+-		  internal_error ("asm clobber conflict with output operand");
+-
+-	      for (opno = 0; opno < ninputs - ninout; opno++)
+-		if (reg_overlap_mentioned_p (clobbered_reg,
+-					     ASM_OPERANDS_INPUT (obody, opno)))
+-		  internal_error ("asm clobber conflict with input operand");
++	      /* Use QImode since that's guaranteed to clobber just
++	       * one reg.  */
++	      clobbered_reg = gen_rtx_REG (QImode, reg);
++
++	      /* Do sanity check for overlap between clobbers and
++		 respectively input and outputs that hasn't been
++		 handled.  Such overlap should have been detected and
++		 reported above.  */
++	      if (!clobber_conflict_found)
++		{
++		  int opno;
++
++		  /* We test the old body (obody) contents to avoid
++		     tripping over the under-construction body.  */
++		  for (opno = 0; opno < noutputs; opno++)
++		    if (reg_overlap_mentioned_p (clobbered_reg,
++						 output_rtx[opno]))
++		      internal_error
++			("asm clobber conflict with output operand");
++
++		  for (opno = 0; opno < ninputs - ninout; opno++)
++		    if (reg_overlap_mentioned_p (clobbered_reg,
++						 ASM_OPERANDS_INPUT (obody,
++								     opno)))
++		      internal_error
++			("asm clobber conflict with input operand");
++		}
++
++	      XVECEXP (body, 0, i++)
++		= gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
+ 	    }
+-
+-	  XVECEXP (body, 0, i++)
+-	    = gen_rtx_CLOBBER (VOIDmode, clobbered_reg);
+ 	}
+ 
+       if (nlabels > 0)
+
+=== modified file 'gcc/varasm.c'
+--- old/gcc/varasm.c	2010-03-27 11:56:30 +0000
++++ new/gcc/varasm.c	2010-08-13 11:53:46 +0000
+@@ -1043,8 +1043,11 @@
+    Prefixes such as % are optional.  */
+ 
+ int
+-decode_reg_name (const char *asmspec)
++decode_reg_name_and_count (const char *asmspec, int *pnregs)
+ {
++  /* Presume just one register is clobbered.  */
++  *pnregs = 1;
++
+   if (asmspec != 0)
+     {
+       int i;
+@@ -1070,6 +1073,25 @@
+ 	    && ! strcmp (asmspec, strip_reg_name (reg_names[i])))
+ 	  return i;
+ 
++#ifdef OVERLAPPING_REGISTER_NAMES
++      {
++	static const struct
++	{
++	  const char *const name;
++	  const int number;
++	  const int nregs;
++	} table[] = OVERLAPPING_REGISTER_NAMES;
++
++	for (i = 0; i < (int) ARRAY_SIZE (table); i++)
++	  if (table[i].name[0]
++	      && ! strcmp (asmspec, table[i].name))
++	    {
++	      *pnregs = table[i].nregs;
++	      return table[i].number;
++	    }
++      }
++#endif /* OVERLAPPING_REGISTER_NAMES */
++
+ #ifdef ADDITIONAL_REGISTER_NAMES
+       {
+ 	static const struct { const char *const name; const int number; } table[]
+@@ -1093,6 +1115,14 @@
+ 
+   return -1;
+ }
++
++int
++decode_reg_name (const char *name)
++{
++  int count;
++  return decode_reg_name_and_count (name, &count);
++}
++
+ 
+ /* Return true if DECL's initializer is suitable for a BSS section.  */
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99355.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99355.patch
new file mode 100644
index 0000000000..b47c2ceb4c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99355.patch
@@ -0,0 +1,181 @@
+	2010-04-12  Andrew Stubbs  <ams@codesourcery.com>
+
+	Issue #7178
+
+	gcc/
+	* config/arm/arm.c (arm_init_libfuncs): Change __gnu_f2h_ieee to
+	__aeabi_f2h, __gnu_f2h_alternative to __aeabi_f2h_alt, __gnu_h2f_ieee
+	to __aeabi_h2f, and __gnu_h2f_alternative to __aeabi_h2f_alt.
+	* config/arm/fp16.c (__gnu_f2h_internal): Change return type to
+	unsigned int. Change 'sign' variable likewise.
+	(__gnu_h2f_internal): Set to static inline.
+	Change return type to unsigned int. Change 'sign' variable likewise.
+	(ALIAS): New define.
+	(__gnu_f2h_ieee): Change unsigned short to unsigned int.
+	(__gnu_h2f_ieee): Likewise.
+	(__gnu_f2h_alternative): Likewise.
+	(__gnu_h2f_alternative): Likewise.
+	(__aeabi_f2h, __aeabi_h2f): New aliases.
+	(__aeabi_f2h_alt, __aeabi_h2f_alt): Likewise.
+	* config/arm/sfp-machine.h (__extendhfsf2): Set to __aeabi_h2f.
+	(__truncsfhf2): Set to __aeabi_f2h.
+
+	gcc/testsuite/
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-5.C: Check for __aeabi_h2f
+	and __aeabi_f2h.
+	* g++.dg/ext/arm-fp16/arm-fp16-ops-6.C: Likewise.
+	* gcc.dg/torture/arm-fp16-ops-5.c: Likewise.
+	* gcc.dg/torture/arm-fp16-ops-6.c: Likewise.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+ 	Richard Earnshaw  <rearnsha@arm.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 11:02:47 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 14:08:20 +0000
+@@ -1054,12 +1054,12 @@
+       /* Conversions.  */
+       set_conv_libfunc (trunc_optab, HFmode, SFmode,
+ 			(arm_fp16_format == ARM_FP16_FORMAT_IEEE
+-			 ? "__gnu_f2h_ieee"
+-			 : "__gnu_f2h_alternative"));
++			 ? "__aeabi_f2h"
++			 : "__aeabi_f2h_alt"));
+       set_conv_libfunc (sext_optab, SFmode, HFmode, 
+ 			(arm_fp16_format == ARM_FP16_FORMAT_IEEE
+-			 ? "__gnu_h2f_ieee"
+-			 : "__gnu_h2f_alternative"));
++			 ? "__aeabi_h2f"
++			 : "__aeabi_h2f_alt"));
+       
+       /* Arithmetic.  */
+       set_optab_libfunc (add_optab, HFmode, NULL);
+
+=== modified file 'gcc/config/arm/fp16.c'
+--- old/gcc/config/arm/fp16.c	2009-06-18 11:26:37 +0000
++++ new/gcc/config/arm/fp16.c	2010-08-13 14:08:20 +0000
+@@ -22,10 +22,10 @@
+    see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+    <http://www.gnu.org/licenses/>.  */
+ 
+-static inline unsigned short
++static inline unsigned int
+ __gnu_f2h_internal(unsigned int a, int ieee)
+ {
+-  unsigned short sign = (a >> 16) & 0x8000;
++  unsigned int sign = (a >> 16) & 0x8000;
+   int aexp = (a >> 23) & 0xff;
+   unsigned int mantissa = a & 0x007fffff;
+   unsigned int mask;
+@@ -95,10 +95,10 @@
+   return sign | (((aexp + 14) << 10) + (mantissa >> 13));
+ }
+ 
+-unsigned int
+-__gnu_h2f_internal(unsigned short a, int ieee)
++static inline unsigned int
++__gnu_h2f_internal(unsigned int a, int ieee)
+ {
+-  unsigned int sign = (unsigned int)(a & 0x8000) << 16;
++  unsigned int sign = (a & 0x00008000) << 16;
+   int aexp = (a >> 10) & 0x1f;
+   unsigned int mantissa = a & 0x3ff;
+ 
+@@ -120,26 +120,33 @@
+   return sign | (((aexp + 0x70) << 23) + (mantissa << 13));
+ }
+ 
+-unsigned short
++#define ALIAS(src, dst) \
++  typeof (src) dst __attribute__ ((alias (#src)));
++
++unsigned int
+ __gnu_f2h_ieee(unsigned int a)
+ {
+   return __gnu_f2h_internal(a, 1);
+ }
++ALIAS (__gnu_f2h_ieee, __aeabi_f2h)
+ 
+ unsigned int
+-__gnu_h2f_ieee(unsigned short a)
++__gnu_h2f_ieee(unsigned int a)
+ {
+   return __gnu_h2f_internal(a, 1);
+ }
++ALIAS (__gnu_h2f_ieee, __aeabi_h2f)
+ 
+-unsigned short
++unsigned int
+ __gnu_f2h_alternative(unsigned int x)
+ {
+   return __gnu_f2h_internal(x, 0);
+ }
++ALIAS (__gnu_f2h_alternative, __aeabi_f2h_alt)
+ 
+ unsigned int
+-__gnu_h2f_alternative(unsigned short a)
++__gnu_h2f_alternative(unsigned int a)
+ {
+   return __gnu_h2f_internal(a, 0);
+ }
++ALIAS (__gnu_h2f_alternative, __aeabi_h2f_alt)
+
+=== modified file 'gcc/config/arm/sfp-machine.h'
+--- old/gcc/config/arm/sfp-machine.h	2009-06-18 11:26:37 +0000
++++ new/gcc/config/arm/sfp-machine.h	2010-08-13 14:08:20 +0000
+@@ -99,7 +99,7 @@
+ #define __fixdfdi	__aeabi_d2lz
+ #define __fixunsdfdi	__aeabi_d2ulz
+ #define __floatdidf	__aeabi_l2d
+-#define __extendhfsf2	__gnu_h2f_ieee
+-#define __truncsfhf2	__gnu_f2h_ieee
++#define __extendhfsf2	__aeabi_h2f
++#define __truncsfhf2	__aeabi_f2h
+ 
+ #endif /* __ARM_EABI__ */
+
+=== modified file 'gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C'
+--- old/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-5.C	2010-08-13 14:08:20 +0000
+@@ -13,3 +13,5 @@
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_h2f" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_f2h" } } */
+
+=== modified file 'gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C'
+--- old/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/g++.dg/ext/arm-fp16/arm-fp16-ops-6.C	2010-08-13 14:08:20 +0000
+@@ -13,3 +13,5 @@
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_h2f" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_f2h" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c'
+--- old/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-5.c	2010-08-13 14:08:20 +0000
+@@ -13,3 +13,5 @@
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_h2f" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_f2h" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c'
+--- old/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.dg/torture/arm-fp16-ops-6.c	2010-08-13 14:08:20 +0000
+@@ -13,3 +13,5 @@
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h\[a-z\]*_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_h2f_ieee" } } */
+ /* { dg-final { scan-assembler-not "\tbl\t__gnu_f2h_ieee" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_h2f" } } */
++/* { dg-final { scan-assembler-not "\tbl\t__aeabi_f2h" } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99356.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99356.patch
new file mode 100644
index 0000000000..64efbc759e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99356.patch
@@ -0,0 +1,376 @@
+	
+	2010-04-11  Julian Brown  <julian@codesourcery.com>
+
+	Issue #7326
+
+	gcc/
+	* config/arm/arm.c (arm_issue_rate): Return 2 for Cortex-A5.
+	* config/arm/arm.md (generic_sched): No for Cortex-A5.
+	(generic_vfp): Likewise.
+	(cortex-a5.md): Include.
+	* config/arm/cortex-a5.md: New.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 
+ 	2010-04-12  Andrew Stubbs  <ams@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 14:08:20 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 15:15:12 +0000
+@@ -22262,6 +22262,7 @@
+     {
+     case cortexr4:
+     case cortexr4f:
++    case cortexa5:
+     case cortexa8:
+     case cortexa9:
+       return 2;
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-13 11:40:17 +0000
++++ new/gcc/config/arm/arm.md	2010-08-13 15:15:12 +0000
+@@ -419,7 +419,7 @@
+ 
+ (define_attr "generic_sched" "yes,no"
+   (const (if_then_else 
+-          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa8,cortexa9")
++          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9")
+ 	      (eq_attr "tune_cortexr4" "yes"))
+           (const_string "no")
+           (const_string "yes"))))
+@@ -427,7 +427,7 @@
+ (define_attr "generic_vfp" "yes,no"
+   (const (if_then_else
+ 	  (and (eq_attr "fpu" "vfp")
+-	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa8,cortexa9")
++	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9")
+ 	       (eq_attr "tune_cortexr4" "no"))
+ 	  (const_string "yes")
+ 	  (const_string "no"))))
+@@ -451,6 +451,7 @@
+ (include "arm1020e.md")
+ (include "arm1026ejs.md")
+ (include "arm1136jfs.md")
++(include "cortex-a5.md")
+ (include "cortex-a8.md")
+ (include "cortex-a9.md")
+ (include "cortex-r4.md")
+
+=== added file 'gcc/config/arm/cortex-a5.md'
+--- old/gcc/config/arm/cortex-a5.md	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/cortex-a5.md	2010-08-13 15:15:12 +0000
+@@ -0,0 +1,310 @@
++;; ARM Cortex-A5 pipeline description
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;; Contributed by CodeSourcery.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.
++
++(define_automaton "cortex_a5")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Functional units.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; The integer (ALU) pipeline.  There are five DPU pipeline stages. However the
++;; decode/issue stages operate the same for all instructions, so do not model
++;; them.  We only need to model the first execute stage because instructions
++;; always advance one stage per cycle in order. Only branch instructions may
++;; dual-issue, so a single unit  covers all of the LS, ALU, MAC and FPU
++;; pipelines.
++
++(define_cpu_unit "cortex_a5_ex1" "cortex_a5")
++
++;; The branch pipeline.  Branches can dual-issue with other instructions
++;; (except when those instructions take multiple cycles to issue).
++
++(define_cpu_unit "cortex_a5_branch" "cortex_a5")
++
++;; Pseudo-unit for blocking the multiply pipeline when a double-precision
++;; multiply is in progress.
++
++(define_cpu_unit "cortex_a5_fpmul_pipe" "cortex_a5")
++
++;; The floating-point add pipeline (ex1/f1 stage), used to model the usage
++;; of the add pipeline by fmac instructions, etc.
++
++(define_cpu_unit "cortex_a5_fpadd_pipe" "cortex_a5")
++
++;; Floating-point div/sqrt (long latency, out-of-order completion).
++
++(define_cpu_unit "cortex_a5_fp_div_sqrt" "cortex_a5")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; ALU instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_alu" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "alu"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_alu_shift" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "alu_shift,alu_shift_reg"))
++  "cortex_a5_ex1")
++
++;; Forwarding path for unshifted operands.
++
++(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
++  "cortex_a5_alu")
++
++(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
++  "cortex_a5_alu_shift"
++  "arm_no_early_alu_shift_dep")
++
++;; The multiplier pipeline can forward results from wr stage only (so I don't
++;; think there's any need to specify bypasses).
++
++(define_insn_reservation "cortex_a5_mul" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "mult"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Load/store instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; Address-generation happens in the issue stage, which is one stage behind
++;; the ex1 stage (the first stage we care about for scheduling purposes). The
++;; dc1 stage is parallel with ex1, dc2 with ex2 and rot with wr.
++
++;; FIXME: These might not be entirely accurate for load2, load3, load4. I think
++;; they make sense since there's a 32-bit interface between the DPU and the DCU,
++;; so we can't load more than that per cycle.  The store2, store3, store4
++;; reservations are similarly guessed.
++
++(define_insn_reservation "cortex_a5_load1" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load_byte,load1"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store1" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store1"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load2" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load2"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store2" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store2"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load3" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store3" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load4" 5
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store4" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Branches.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; Direct branches are the only instructions we can dual-issue (also IT and
++;; nop, but those aren't very interesting for scheduling).  (The latency here
++;; is meant to represent when the branch actually takes place, but may not be
++;; entirely correct.)
++
++(define_insn_reservation "cortex_a5_branch" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "branch,call"))
++  "cortex_a5_branch")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point arithmetic.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_fpalu" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys, fmuls, f_cvt,\
++			fcmps, fcmpd"))
++  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
++
++;; For fconsts and fconstd, 8-bit immediate data is passed directly from
++;; f1 to f3 (which I think reduces the latency by one cycle).
++
++(define_insn_reservation "cortex_a5_fconst" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fconsts,fconstd"))
++  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
++
++;; We should try not to attempt to issue a single-precision multiplication in
++;; the middle of a double-precision multiplication operation (the usage of
++;; cortex_a5_fpmul_pipe).
++
++(define_insn_reservation "cortex_a5_fpmuls" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmuls"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe")
++
++;; For single-precision multiply-accumulate, the add (accumulate) is issued
++;; whilst the multiply is in F4.  The multiply result can then be forwarded
++;; from F5 to F1.  The issue unit is only used once (when we first start
++;; processing the instruction), but the usage of the FP add pipeline could
++;; block other instructions attempting to use it simultaneously.  We try to
++;; avoid that using cortex_a5_fpadd_pipe.
++
++(define_insn_reservation "cortex_a5_fpmacs" 8
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmacs"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
++
++;; Non-multiply instructions can issue in the middle two instructions of a
++;; double-precision multiply.  Note that it isn't entirely clear when a branch
++;; can dual-issue when a multi-cycle multiplication is in progress; we ignore
++;; that for now though.
++
++(define_insn_reservation "cortex_a5_fpmuld" 7
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmuld"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
++   cortex_a5_ex1+cortex_a5_fpmul_pipe")
++
++(define_insn_reservation "cortex_a5_fpmacd" 11
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmacd"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
++   cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point divide/square root instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; ??? Not sure if the 14 cycles taken for single-precision divide to complete
++;; includes the time taken for the special instruction used to collect the
++;; result to travel down the multiply pipeline, or not.  Assuming so.  (If
++;; that's wrong, the latency should be increased by a few cycles.)
++
++;; fsqrt takes one cycle less, but that is not modelled, nor is the use of the
++;; multiply pipeline to collect the divide/square-root result.
++
++(define_insn_reservation "cortex_a5_fdivs" 14
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fdivs"))
++  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 13")
++
++;; ??? Similarly for fdivd.
++
++(define_insn_reservation "cortex_a5_fdivd" 29
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fdivd"))
++  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 28")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP to/from core transfers.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; FP loads take data from wr/rot/f3.  Might need to define bypasses to model
++;; this?
++
++;; Core-to-VFP transfers use the multiply pipeline.
++;; Not sure about this at all... I think we need some bypasses too.
++
++(define_insn_reservation "cortex_a5_r2f" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "r_2_f"))
++  "cortex_a5_ex1")
++
++;; Not sure about this either. 6.8.7 says "Additionally, the store pipe used
++;; for store and FP->core register transfers can forward into the F2 and F3
++;; stages."
++;; This doesn't correspond to what we have though.
++
++(define_insn_reservation "cortex_a5_f2r" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_2_r"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP flag transfer.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; ??? The flag forwarding described in section 6.8.11 of the Cortex-A5 DPU
++;; specification (from fmstat to the ex2 stage of the second instruction) is
++;; not modeled at present.
++
++(define_insn_reservation "cortex_a5_f_flags" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_flag"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP load/store.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_f_loads" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_loads"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_loadd" 5
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_load,f_loadd"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_stores" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_stores"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_stored" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_store,f_stored"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++;; Load-to-use for floating-point values has a penalty of one cycle, i.e. a
++;; latency of two (6.8.3).
++
++(define_bypass 2 "cortex_a5_f_loads"
++                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
++		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
++		  cortex_a5_f2r")
++
++(define_bypass 3 "cortex_a5_f_loadd"
++                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
++		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
++		  cortex_a5_f2r")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99357.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99357.patch
new file mode 100644
index 0000000000..bbdd38b559
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99357.patch
@@ -0,0 +1,27 @@
+	2010-06-12  Jie Zhang  <jie@codesourcery.com>
+
+	gcc/
+	* config/arm/vfp.md (arm_movsi_vfp): Set neon_type correctly
+	for neon_ldr and neon_str instructions.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+	
+ 	2010-04-11  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Issue #7326
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-08-13 11:40:17 +0000
++++ new/gcc/config/arm/vfp.md	2010-08-13 15:28:31 +0000
+@@ -82,7 +82,7 @@
+   "
+   [(set_attr "predicable" "yes")
+    (set_attr "type" "*,*,*,*,load1,store1,r_2_f,f_2_r,fcpys,f_loads,f_stores")
+-   (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,*,*")
++   (set_attr "neon_type" "*,*,*,*,*,*,neon_mcr,neon_mrc,neon_vmov,neon_ldr,neon_str")
+    (set_attr "pool_range"     "*,*,*,*,4096,*,*,*,*,1020,*")
+    (set_attr "neg_pool_range" "*,*,*,*,4084,*,*,*,*,1008,*")]
+ )
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99358.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99358.patch
new file mode 100644
index 0000000000..eedcf62d1e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99358.patch
@@ -0,0 +1,38 @@
+	2010-06-14  Paul Brook  <paul@codesourcery.com>
+
+	Issue #8879
+	gcc/
+	* config/arm/arm.c (use_vfp_abi): Add sorry() for Thumb-1
+	hard-float ABI.
+
+2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+ 	
+ 	2010-06-12  Jie Zhang  <jie@codesourcery.com>
+ 
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 15:15:12 +0000
++++ new/gcc/config/arm/arm.c	2010-08-13 15:37:39 +0000
+@@ -3969,7 +3969,18 @@
+ use_vfp_abi (enum arm_pcs pcs_variant, bool is_double)
+ {
+   if (pcs_variant == ARM_PCS_AAPCS_VFP)
+-    return true;
++    {
++      static bool seen_thumb1_vfp = false;
++
++      if (TARGET_THUMB1 && !seen_thumb1_vfp)
++	{
++	  sorry ("Thumb-1 hard-float VFP ABI");
++	  /* sorry() is not immediately fatal, so only display this once.  */
++	  seen_thumb1_vfp = true;
++	}
++
++      return true;
++    }
+ 
+   if (pcs_variant != ARM_PCS_AAPCS_LOCAL)
+     return false;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99359.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99359.patch
new file mode 100644
index 0000000000..92dfe00383
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99359.patch
@@ -0,0 +1,27 @@
+2010-07-28  Julian Brown  <julian@codesourcery.com>
+
+	Backport from FSF mainline:
+
+	gcc/
+	* config/arm/thumb2.md (*thumb2_movdf_soft_insn): Fix alternatives
+	for pool ranges.
+
+ 2010-07-26  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-13 10:30:35 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-13 16:00:58 +0000
+@@ -319,8 +319,8 @@
+   "
+   [(set_attr "length" "8,12,16,8,8")
+    (set_attr "type" "*,*,*,load2,store2")
+-   (set_attr "pool_range" "1020")
+-   (set_attr "neg_pool_range" "0")]
++   (set_attr "pool_range" "*,*,*,1020,*")
++   (set_attr "neg_pool_range" "*,*,*,0,*")]
+ )
+ 
+ (define_insn "*thumb2_cmpsi_shiftsi"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99360.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99360.patch
new file mode 100644
index 0000000000..a58dd24416
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99360.patch
@@ -0,0 +1,1759 @@
+2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+	Backport code hoisting improvements from mainline:
+
+	2010-07-28  Jakub Jelinek  <jakub@redhat.com>
+	PR debug/45105
+	* gcc.dg/pr45105.c: New test.
+
+	2010-07-28  Jakub Jelinek  <jakub@redhat.com>
+	PR debug/45105
+	* gcse.c (hoist_code): Use FOR_BB_INSNS macro.
+
+	2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/45107
+	* gcc.dg/pr45107.c: New test.
+
+	2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/45107
+	* gcse.c (hash_scan_set): Use max_distance for gcse-las.
+
+	2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/45101
+	* gcc.dg/pr45101.c: New test.
+
+	2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/45101
+	* gcse.c (hash_scan_set): Fix argument ordering of insert_expr_in_table
+	for gcse-las.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/40956
+	PR target/42495
+	PR middle-end/42574
+	* gcc.target/arm/pr40956.c, gcc.target/arm/pr42495.c,
+	* gcc.target/arm/pr42574.c: Add tests.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* config/arm/arm.c (params.h): Include.
+	(arm_override_options): Tune gcse-unrestricted-cost.
+	* config/arm/t-arm (arm.o): Define dependencies.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR target/42495
+	PR middle-end/42574
+	* basic-block.h (get_dominated_to_depth): Declare.
+	* dominance.c (get_dominated_to_depth): New function, use
+	get_all_dominated_blocks as a base.
+	(get_all_dominated_blocks): Use get_dominated_to_depth.
+	* gcse.c (occr_t, VEC (occr_t, heap)): Define.
+	(hoist_exprs): Remove.
+	(alloc_code_hoist_mem, free_code_hoist_mem): Update.
+	(compute_code_hoist_vbeinout): Add debug print outs.
+	(hoist_code): Partially rewrite, simplify.  Use get_dominated_to_depth.
+	* params.def (PARAM_MAX_HOIST_DEPTH): New parameter to avoid
+	quadratic behavior.
+	* params.h (MAX_HOIST_DEPTH): New macro.
+	* doc/invoke.texi (max-hoist-depth): Document.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/40956
+	* config/arm/arm.c (thumb1_size_rtx_costs): Fix cost of simple
+	constants.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+  	PR target/42495
+  	PR middle-end/42574
+	* config/arm/arm.c (legitimize_pic_address): Use
+	gen_calculate_pic_address pattern to emit calculation of PIC address.
+	(will_be_in_index_register): New function.
+	(arm_legitimate_address_outer_p, thumb2_legitimate_address_p,)
+	(thumb1_legitimate_address_p): Use it provided !strict_p.
+	* config/arm/arm.md (calculate_pic_address): New expand and split.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR target/42495
+	PR middle-end/42574
+	* config/arm/arm.c (thumb1_size_rtx_costs): Add cost for "J" constants.
+	* config/arm/arm.md (define_split "J", define_split "K"): Make
+	IRA/reload friendly.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* gcse.c (insert_insn_end_basic_block): Update signature, remove
+	unused checks.
+	(pre_edge_insert, hoist_code): Update.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR target/42495
+	PR middle-end/42574
+	* gcse.c (hoist_expr_reaches_here_p): Remove excessive check.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* gcse.c (hoist_code): Generate new pseudo for every new set insn.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	PR rtl-optimization/40956
+	PR target/42495
+	PR middle-end/42574
+	* gcse.c (compute_code_hoist_vbeinout): Consider more expressions
+	for hoisting.
+	(hoist_code): Count occurences in current block too.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* gcse.c (struct expr:max_distance): New field.
+	(doing_code_hoisting_p): New static variable.
+	(want_to_gcse_p): Change signature.  Allow constrained hoisting of
+	simple expressions, don't change behavior for PRE.  Set max_distance.
+	(insert_expr_in_table): Set new max_distance field.
+	(hash_scan_set): Update.
+	(hoist_expr_reaches_here_p): Stop search after max_distance
+	instructions.
+	(find_occr_in_bb): New static function.  Use it in ...
+	(hoist_code): Calculate sizes of basic block before any changes are
+	done.  Pass max_distance to hoist_expr_reaches_here_p.
+	(one_code_hoisting_pass): Set doing_code_hoisting_p.
+	* params.def (PARAM_GCSE_COST_DISTANCE_RATIO,)
+	(PARAM_GCSE_UNRESTRICTED_COST): New parameters.
+	* params.h (GCSE_COST_DISTANCE_RATIO, GCSE_UNRESTRICTED_COST): New
+	macros.
+	* doc/invoke.texi (gcse-cost-distance-ratio, gcse-unrestricted-cost):
+	Document.
+
+	2010-07-27  Jeff Law  <law@redhat.com>
+	    Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* gcse.c (compute_transpout, transpout): Remove, move logic
+	to prune_expressions.
+	(compute_pre_data): Move pruning of trapping expressions ...
+	(prune_expressions): ... here.  New static function.
+	(compute_code_hoist_data): Use it.
+	(alloc_code_hoist_mem, free_code_hoist_mem, hoist_code): Update.
+
+	2010-07-27  Maxim Kuvyrkov  <maxim@codesourcery.com>
+	* dbgcnt.def (hoist_insn): New debug counter.
+	* gcse.c (hoist_code): Use it.
+
+ 2010-07-28  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Backport from FSF mainline:
+
+=== modified file 'gcc/basic-block.h'
+--- old/gcc/basic-block.h	2010-04-02 18:54:46 +0000
++++ new/gcc/basic-block.h	2010-08-16 09:41:58 +0000
+@@ -932,6 +932,8 @@
+ extern VEC (basic_block, heap) *get_dominated_by_region (enum cdi_direction,
+ 							 basic_block *,
+ 							 unsigned);
++extern VEC (basic_block, heap) *get_dominated_to_depth (enum cdi_direction,
++							basic_block, int);
+ extern VEC (basic_block, heap) *get_all_dominated_blocks (enum cdi_direction,
+ 							  basic_block);
+ extern void add_to_dominance_info (enum cdi_direction, basic_block);
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-13 15:37:39 +0000
++++ new/gcc/config/arm/arm.c	2010-08-16 09:41:58 +0000
+@@ -56,6 +56,7 @@
+ #include "df.h"
+ #include "intl.h"
+ #include "libfuncs.h"
++#include "params.h"
+ 
+ /* Forward definitions of types.  */
+ typedef struct minipool_node    Mnode;
+@@ -1902,6 +1903,14 @@
+       flag_reorder_blocks = 1;
+     }
+ 
++  if (!PARAM_SET_P (PARAM_GCSE_UNRESTRICTED_COST)
++      && flag_pic)
++    /* Hoisting PIC address calculations more aggressively provides a small,
++       but measurable, size reduction for PIC code.  Therefore, we decrease
++       the bar for unrestricted expression hoisting to the cost of PIC address
++       calculation, which is 2 instructions.  */
++    set_param_value ("gcse-unrestricted-cost", 2);
++
+   /* Register global variables with the garbage collector.  */
+   arm_add_gc_roots ();
+ 
+@@ -5070,17 +5079,13 @@
+   if (GET_CODE (orig) == SYMBOL_REF
+       || GET_CODE (orig) == LABEL_REF)
+     {
+-      rtx pic_ref, address;
+       rtx insn;
+ 
+       if (reg == 0)
+ 	{
+ 	  gcc_assert (can_create_pseudo_p ());
+ 	  reg = gen_reg_rtx (Pmode);
+-	  address = gen_reg_rtx (Pmode);
+ 	}
+-      else
+-	address = reg;
+ 
+       /* VxWorks does not impose a fixed gap between segments; the run-time
+ 	 gap can be different from the object-file gap.  We therefore can't
+@@ -5096,18 +5101,21 @@
+ 	insn = arm_pic_static_addr (orig, reg);
+       else
+ 	{
++	  rtx pat;
++	  rtx mem;
++
+ 	  /* If this function doesn't have a pic register, create one now.  */
+ 	  require_pic_register ();
+ 
+-	  if (TARGET_32BIT)
+-	    emit_insn (gen_pic_load_addr_32bit (address, orig));
+-	  else /* TARGET_THUMB1 */
+-	    emit_insn (gen_pic_load_addr_thumb1 (address, orig));
+-
+-	  pic_ref = gen_const_mem (Pmode,
+-				   gen_rtx_PLUS (Pmode, cfun->machine->pic_reg,
+-					         address));
+-	  insn = emit_move_insn (reg, pic_ref);
++	  pat = gen_calculate_pic_address (reg, cfun->machine->pic_reg, orig);
++
++	  /* Make the MEM as close to a constant as possible.  */
++	  mem = SET_SRC (pat);
++	  gcc_assert (MEM_P (mem) && !MEM_VOLATILE_P (mem));
++	  MEM_READONLY_P (mem) = 1;
++	  MEM_NOTRAP_P (mem) = 1;
++
++	  insn = emit_insn (pat);
+ 	}
+ 
+       /* Put a REG_EQUAL note on this insn, so that it can be optimized
+@@ -5387,6 +5395,15 @@
+   return FALSE;
+ }
+ 
++/* Return true if X will surely end up in an index register after next
++   splitting pass.  */
++static bool
++will_be_in_index_register (const_rtx x)
++{
++  /* arm.md: calculate_pic_address will split this into a register.  */
++  return GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_PIC_SYM;
++}
++
+ /* Return nonzero if X is a valid ARM state address operand.  */
+ int
+ arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer,
+@@ -5444,8 +5461,9 @@
+       rtx xop1 = XEXP (x, 1);
+ 
+       return ((arm_address_register_rtx_p (xop0, strict_p)
+-	       && GET_CODE(xop1) == CONST_INT
+-	       && arm_legitimate_index_p (mode, xop1, outer, strict_p))
++	       && ((GET_CODE(xop1) == CONST_INT
++		    && arm_legitimate_index_p (mode, xop1, outer, strict_p))
++		   || (!strict_p && will_be_in_index_register (xop1))))
+ 	      || (arm_address_register_rtx_p (xop1, strict_p)
+ 		  && arm_legitimate_index_p (mode, xop0, outer, strict_p)));
+     }
+@@ -5531,7 +5549,8 @@
+       rtx xop1 = XEXP (x, 1);
+ 
+       return ((arm_address_register_rtx_p (xop0, strict_p)
+-	       && thumb2_legitimate_index_p (mode, xop1, strict_p))
++	       && (thumb2_legitimate_index_p (mode, xop1, strict_p)
++		   || (!strict_p && will_be_in_index_register (xop1))))
+ 	      || (arm_address_register_rtx_p (xop1, strict_p)
+ 		  && thumb2_legitimate_index_p (mode, xop0, strict_p)));
+     }
+@@ -5834,7 +5853,8 @@
+ 	  && XEXP (x, 0) != frame_pointer_rtx
+ 	  && XEXP (x, 1) != frame_pointer_rtx
+ 	  && thumb1_index_register_rtx_p (XEXP (x, 0), strict_p)
+-	  && thumb1_index_register_rtx_p (XEXP (x, 1), strict_p))
++	  && (thumb1_index_register_rtx_p (XEXP (x, 1), strict_p)
++	      || (!strict_p && will_be_in_index_register (XEXP (x, 1)))))
+ 	return 1;
+ 
+       /* REG+const has 5-7 bit offset for non-SP registers.  */
+@@ -6413,12 +6433,16 @@
+ 
+     case CONST_INT:
+       if (outer == SET)
+-	{
+-	  if ((unsigned HOST_WIDE_INT) INTVAL (x) < 256)
+-	    return 0;
+-	  if (thumb_shiftable_const (INTVAL (x)))
+-	    return COSTS_N_INSNS (2);
+-	  return COSTS_N_INSNS (3);
++        {
++          if ((unsigned HOST_WIDE_INT) INTVAL (x) < 256)
++            return COSTS_N_INSNS (1);
++	  /* See split "TARGET_THUMB1 && satisfies_constraint_J".  */
++	  if (INTVAL (x) >= -255 && INTVAL (x) <= -1)
++            return COSTS_N_INSNS (2);
++	  /* See split "TARGET_THUMB1 && satisfies_constraint_K".  */
++          if (thumb_shiftable_const (INTVAL (x)))
++            return COSTS_N_INSNS (2);
++          return COSTS_N_INSNS (3);
+ 	}
+       else if ((outer == PLUS || outer == COMPARE)
+ 	       && INTVAL (x) < 256 && INTVAL (x) > -256)
+@@ -7110,6 +7134,12 @@
+ 	 a single register, otherwise it costs one insn per word.  */
+       if (REG_P (XEXP (x, 0)))
+ 	*total = COSTS_N_INSNS (1);
++      else if (flag_pic
++	       && GET_CODE (XEXP (x, 0)) == PLUS
++	       && will_be_in_index_register (XEXP (XEXP (x, 0), 1)))
++	/* This will be split into two instructions.
++	   See arm.md:calculate_pic_address.  */
++	*total = COSTS_N_INSNS (2);
+       else
+ 	*total = COSTS_N_INSNS (ARM_NUM_REGS (mode));
+       return true;
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-13 15:15:12 +0000
++++ new/gcc/config/arm/arm.md	2010-08-16 09:41:58 +0000
+@@ -5290,17 +5290,21 @@
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(match_operand:SI 1 "const_int_operand" ""))]
+   "TARGET_THUMB1 && satisfies_constraint_J (operands[1])"
+-  [(set (match_dup 0) (match_dup 1))
+-   (set (match_dup 0) (neg:SI (match_dup 0)))]
+-  "operands[1] = GEN_INT (- INTVAL (operands[1]));"
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 0) (neg:SI (match_dup 2)))]
++  "
++  {
++    operands[1] = GEN_INT (- INTVAL (operands[1]));
++    operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
++  }"
+ )
+ 
+ (define_split 
+   [(set (match_operand:SI 0 "register_operand" "")
+ 	(match_operand:SI 1 "const_int_operand" ""))]
+   "TARGET_THUMB1 && satisfies_constraint_K (operands[1])"
+-  [(set (match_dup 0) (match_dup 1))
+-   (set (match_dup 0) (ashift:SI (match_dup 0) (match_dup 2)))]
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 0) (ashift:SI (match_dup 2) (match_dup 3)))]
+   "
+   {
+     unsigned HOST_WIDE_INT val = INTVAL (operands[1]) & 0xffffffffu;
+@@ -5311,12 +5315,13 @@
+       if ((val & (mask << i)) == val)
+         break;
+ 
+-    /* Shouldn't happen, but we don't want to split if the shift is zero.  */
++    /* Don't split if the shift is zero.  */
+     if (i == 0)
+       FAIL;
+ 
+     operands[1] = GEN_INT (val >> i);
+-    operands[2] = GEN_INT (i);
++    operands[2] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];
++    operands[3] = GEN_INT (i);
+   }"
+ )
+ 
+@@ -5325,6 +5330,34 @@
+ ;; we use an unspec.  The offset will be loaded from a constant pool entry,
+ ;; since that is the only type of relocation we can use.
+ 
++;; Wrap calculation of the whole PIC address in a single pattern for the
++;; benefit of optimizers, particularly, PRE and HOIST.  Calculation of
++;; a PIC address involves two loads from memory, so we want to CSE it
++;; as often as possible.
++;; This pattern will be split into one of the pic_load_addr_* patterns
++;; and a move after GCSE optimizations.
++;;
++;; Note: Update arm.c: legitimize_pic_address() when changing this pattern.
++(define_expand "calculate_pic_address"
++  [(set (match_operand:SI 0 "register_operand" "")
++	(mem:SI (plus:SI (match_operand:SI 1 "register_operand" "")
++			 (unspec:SI [(match_operand:SI 2 "" "")]
++				    UNSPEC_PIC_SYM))))]
++  "flag_pic"
++)
++
++;; Split calculate_pic_address into pic_load_addr_* and a move.
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(mem:SI (plus:SI (match_operand:SI 1 "register_operand" "")
++			 (unspec:SI [(match_operand:SI 2 "" "")]
++				    UNSPEC_PIC_SYM))))]
++  "flag_pic"
++  [(set (match_dup 3) (unspec:SI [(match_dup 2)] UNSPEC_PIC_SYM))
++   (set (match_dup 0) (mem:SI (plus:SI (match_dup 1) (match_dup 3))))]
++  "operands[3] = can_create_pseudo_p () ? gen_reg_rtx (SImode) : operands[0];"
++)
++
+ ;; The rather odd constraints on the following are to force reload to leave
+ ;; the insn alone, and to force the minipool generation pass to then move
+ ;; the GOT symbol to memory.
+
+=== modified file 'gcc/config/arm/t-arm'
+--- old/gcc/config/arm/t-arm	2009-06-21 19:48:15 +0000
++++ new/gcc/config/arm/t-arm	2010-08-16 09:41:58 +0000
+@@ -45,6 +45,15 @@
+ 		$(srcdir)/config/arm/arm-cores.def > \
+ 		$(srcdir)/config/arm/arm-tune.md
+ 
++arm.o: $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
++  $(RTL_H) $(TREE_H) $(OBSTACK_H) $(REGS_H) hard-reg-set.h \
++  insn-config.h conditions.h output.h \
++  $(INSN_ATTR_H) $(FLAGS_H) reload.h $(FUNCTION_H) \
++  $(EXPR_H) $(OPTABS_H) toplev.h $(RECOG_H) $(CGRAPH_H) \
++  $(GGC_H) except.h $(C_PRAGMA_H) $(INTEGRATE_H) $(TM_P_H) \
++  $(TARGET_H) $(TARGET_DEF_H) debug.h langhooks.h $(DF_H) \
++  intl.h libfuncs.h $(PARAMS_H)
++
+ arm-c.o: $(srcdir)/config/arm/arm-c.c $(CONFIG_H) $(SYSTEM_H) \
+     coretypes.h $(TM_H) $(TREE_H) output.h $(C_COMMON_H)
+ 	$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) \
+
+=== modified file 'gcc/dbgcnt.def'
+--- old/gcc/dbgcnt.def	2009-11-25 10:55:54 +0000
++++ new/gcc/dbgcnt.def	2010-08-16 09:41:58 +0000
+@@ -158,6 +158,7 @@
+ DEBUG_COUNTER (global_alloc_at_func)
+ DEBUG_COUNTER (global_alloc_at_reg)
+ DEBUG_COUNTER (hoist)
++DEBUG_COUNTER (hoist_insn)
+ DEBUG_COUNTER (ia64_sched2)
+ DEBUG_COUNTER (if_conversion)
+ DEBUG_COUNTER (if_after_combine)
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-08-05 15:20:54 +0000
++++ new/gcc/doc/invoke.texi	2010-08-16 09:41:58 +0000
+@@ -8086,6 +8086,29 @@
+ vectorization needs to be greater than the value specified by this option
+ to allow vectorization.  The default value is 0.
+ 
++@item gcse-cost-distance-ratio
++Scaling factor in calculation of maximum distance an expression
++can be moved by GCSE optimizations.  This is currently supported only in
++code hoisting pass.  The bigger the ratio, the more agressive code hoisting
++will be with simple expressions, i.e., the expressions which have cost
++less than @option{gcse-unrestricted-cost}.  Specifying 0 will disable
++hoisting of simple expressions.  The default value is 10.
++
++@item gcse-unrestricted-cost
++Cost, roughly measured as the cost of a single typical machine
++instruction, at which GCSE optimizations will not constrain
++the distance an expression can travel.  This is currently
++supported only in code hoisting pass.  The lesser the cost,
++the more aggressive code hoisting will be.  Specifying 0 will
++allow all expressions to travel unrestricted distances.
++The default value is 3.
++
++@item max-hoist-depth
++The depth of search in the dominator tree for expressions to hoist.
++This is used to avoid quadratic behavior in hoisting algorithm.
++The value of 0 will avoid limiting the search, but may slow down compilation
++of huge functions.  The default value is 30.
++
+ @item max-unrolled-insns
+ The maximum number of instructions that a loop should have if that loop
+ is unrolled, and if the loop is unrolled, it determines how many times
+
+=== modified file 'gcc/dominance.c'
+--- old/gcc/dominance.c	2010-04-02 18:54:46 +0000
++++ new/gcc/dominance.c	2010-08-16 09:41:58 +0000
+@@ -782,16 +782,20 @@
+ }
+ 
+ /* Returns the list of basic blocks including BB dominated by BB, in the
+-   direction DIR.  The vector will be sorted in preorder.  */
++   direction DIR up to DEPTH in the dominator tree.  The DEPTH of zero will
++   produce a vector containing all dominated blocks.  The vector will be sorted
++   in preorder.  */
+ 
+ VEC (basic_block, heap) *
+-get_all_dominated_blocks (enum cdi_direction dir, basic_block bb)
++get_dominated_to_depth (enum cdi_direction dir, basic_block bb, int depth)
+ {
+   VEC(basic_block, heap) *bbs = NULL;
+   unsigned i;
++  unsigned next_level_start;
+ 
+   i = 0;
+   VEC_safe_push (basic_block, heap, bbs, bb);
++  next_level_start = 1; /* = VEC_length (basic_block, bbs); */
+ 
+   do
+     {
+@@ -802,12 +806,24 @@
+ 	   son;
+ 	   son = next_dom_son (dir, son))
+ 	VEC_safe_push (basic_block, heap, bbs, son);
++
++      if (i == next_level_start && --depth)
++	next_level_start = VEC_length (basic_block, bbs);
+     }
+-  while (i < VEC_length (basic_block, bbs));
++  while (i < next_level_start);
+ 
+   return bbs;
+ }
+ 
++/* Returns the list of basic blocks including BB dominated by BB, in the
++   direction DIR.  The vector will be sorted in preorder.  */
++
++VEC (basic_block, heap) *
++get_all_dominated_blocks (enum cdi_direction dir, basic_block bb)
++{
++  return get_dominated_to_depth (dir, bb, 0);
++}
++
+ /* Redirect all edges pointing to BB to TO.  */
+ void
+ redirect_immediate_dominators (enum cdi_direction dir, basic_block bb,
+
+=== modified file 'gcc/gcse.c'
+--- old/gcc/gcse.c	2010-03-16 10:50:42 +0000
++++ new/gcc/gcse.c	2010-08-16 09:41:58 +0000
+@@ -296,6 +296,12 @@
+      The value is the newly created pseudo-reg to record a copy of the
+      expression in all the places that reach the redundant copy.  */
+   rtx reaching_reg;
++  /* Maximum distance in instructions this expression can travel.
++     We avoid moving simple expressions for more than a few instructions
++     to keep register pressure under control.
++     A value of "0" removes restrictions on how far the expression can
++     travel.  */
++  int max_distance;
+ };
+ 
+ /* Occurrence of an expression.
+@@ -317,6 +323,10 @@
+   char copied_p;
+ };
+ 
++typedef struct occr *occr_t;
++DEF_VEC_P (occr_t);
++DEF_VEC_ALLOC_P (occr_t, heap);
++
+ /* Expression and copy propagation hash tables.
+    Each hash table is an array of buckets.
+    ??? It is known that if it were an array of entries, structure elements
+@@ -419,6 +429,9 @@
+ /* Number of global copies propagated.  */
+ static int global_copy_prop_count;
+ 
++/* Doing code hoisting.  */
++static bool doing_code_hoisting_p = false;
++
+ /* For available exprs */
+ static sbitmap *ae_kill;
+ 
+@@ -432,12 +445,12 @@
+ static void hash_scan_set (rtx, rtx, struct hash_table_d *);
+ static void hash_scan_clobber (rtx, rtx, struct hash_table_d *);
+ static void hash_scan_call (rtx, rtx, struct hash_table_d *);
+-static int want_to_gcse_p (rtx);
++static int want_to_gcse_p (rtx, int *);
+ static bool gcse_constant_p (const_rtx);
+ static int oprs_unchanged_p (const_rtx, const_rtx, int);
+ static int oprs_anticipatable_p (const_rtx, const_rtx);
+ static int oprs_available_p (const_rtx, const_rtx);
+-static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int,
++static void insert_expr_in_table (rtx, enum machine_mode, rtx, int, int, int,
+ 				  struct hash_table_d *);
+ static void insert_set_in_table (rtx, rtx, struct hash_table_d *);
+ static unsigned int hash_expr (const_rtx, enum machine_mode, int *, int);
+@@ -462,7 +475,6 @@
+ static void alloc_cprop_mem (int, int);
+ static void free_cprop_mem (void);
+ static void compute_transp (const_rtx, int, sbitmap *, int);
+-static void compute_transpout (void);
+ static void compute_local_properties (sbitmap *, sbitmap *, sbitmap *,
+ 				      struct hash_table_d *);
+ static void compute_cprop_data (void);
+@@ -486,7 +498,7 @@
+ static void compute_pre_data (void);
+ static int pre_expr_reaches_here_p (basic_block, struct expr *,
+ 				    basic_block);
+-static void insert_insn_end_basic_block (struct expr *, basic_block, int);
++static void insert_insn_end_basic_block (struct expr *, basic_block);
+ static void pre_insert_copy_insn (struct expr *, rtx);
+ static void pre_insert_copies (void);
+ static int pre_delete (void);
+@@ -497,7 +509,8 @@
+ static void free_code_hoist_mem (void);
+ static void compute_code_hoist_vbeinout (void);
+ static void compute_code_hoist_data (void);
+-static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *);
++static int hoist_expr_reaches_here_p (basic_block, int, basic_block, char *,
++				      int, int *);
+ static int hoist_code (void);
+ static int one_code_hoisting_pass (void);
+ static rtx process_insert_insn (struct expr *);
+@@ -755,7 +768,7 @@
+    GCSE.  */
+ 
+ static int
+-want_to_gcse_p (rtx x)
++want_to_gcse_p (rtx x, int *max_distance_ptr)
+ {
+ #ifdef STACK_REGS
+   /* On register stack architectures, don't GCSE constants from the
+@@ -765,18 +778,67 @@
+     x = avoid_constant_pool_reference (x);
+ #endif
+ 
++  /* GCSE'ing constants:
++
++     We do not specifically distinguish between constant and non-constant
++     expressions in PRE and Hoist.  We use rtx_cost below to limit
++     the maximum distance simple expressions can travel.
++
++     Nevertheless, constants are much easier to GCSE, and, hence,
++     it is easy to overdo the optimizations.  Usually, excessive PRE and
++     Hoisting of constant leads to increased register pressure.
++
++     RA can deal with this by rematerialing some of the constants.
++     Therefore, it is important that the back-end generates sets of constants
++     in a way that allows reload rematerialize them under high register
++     pressure, i.e., a pseudo register with REG_EQUAL to constant
++     is set only once.  Failing to do so will result in IRA/reload
++     spilling such constants under high register pressure instead of
++     rematerializing them.  */
++
+   switch (GET_CODE (x))
+     {
+     case REG:
+     case SUBREG:
+-    case CONST_INT:
+-    case CONST_DOUBLE:
+-    case CONST_FIXED:
+-    case CONST_VECTOR:
+     case CALL:
+       return 0;
+ 
++    case CONST_INT:
++    case CONST_DOUBLE:
++    case CONST_FIXED:
++    case CONST_VECTOR:
++      if (!doing_code_hoisting_p)
++	/* Do not PRE constants.  */
++	return 0;
++
++      /* FALLTHRU */
++
+     default:
++      if (doing_code_hoisting_p)
++	/* PRE doesn't implement max_distance restriction.  */
++	{
++	  int cost;
++	  int max_distance;
++
++	  gcc_assert (!optimize_function_for_speed_p (cfun)
++		      && optimize_function_for_size_p (cfun));
++	  cost = rtx_cost (x, SET, 0);
++
++	  if (cost < COSTS_N_INSNS (GCSE_UNRESTRICTED_COST))
++	    {
++	      max_distance = (GCSE_COST_DISTANCE_RATIO * cost) / 10;
++	      if (max_distance == 0)
++		return 0;
++
++	      gcc_assert (max_distance > 0);
++	    }
++	  else
++	    max_distance = 0;
++
++	  if (max_distance_ptr)
++	    *max_distance_ptr = max_distance;
++	}
++
+       return can_assign_to_reg_without_clobbers_p (x);
+     }
+ }
+@@ -1090,11 +1152,14 @@
+    It is only used if X is a CONST_INT.
+ 
+    ANTIC_P is nonzero if X is an anticipatable expression.
+-   AVAIL_P is nonzero if X is an available expression.  */
++   AVAIL_P is nonzero if X is an available expression.
++
++   MAX_DISTANCE is the maximum distance in instructions this expression can
++   be moved.  */
+ 
+ static void
+ insert_expr_in_table (rtx x, enum machine_mode mode, rtx insn, int antic_p,
+-		      int avail_p, struct hash_table_d *table)
++		      int avail_p, int max_distance, struct hash_table_d *table)
+ {
+   int found, do_not_record_p;
+   unsigned int hash;
+@@ -1137,7 +1202,11 @@
+       cur_expr->next_same_hash = NULL;
+       cur_expr->antic_occr = NULL;
+       cur_expr->avail_occr = NULL;
++      gcc_assert (max_distance >= 0);
++      cur_expr->max_distance = max_distance;
+     }
++  else
++    gcc_assert (cur_expr->max_distance == max_distance);
+ 
+   /* Now record the occurrence(s).  */
+   if (antic_p)
+@@ -1238,6 +1307,8 @@
+       cur_expr->next_same_hash = NULL;
+       cur_expr->antic_occr = NULL;
+       cur_expr->avail_occr = NULL;
++      /* Not used for set_p tables.  */
++      cur_expr->max_distance = 0;
+     }
+ 
+   /* Now record the occurrence.  */
+@@ -1307,6 +1378,7 @@
+     {
+       unsigned int regno = REGNO (dest);
+       rtx tmp;
++      int max_distance = 0;
+ 
+       /* See if a REG_EQUAL note shows this equivalent to a simpler expression.
+ 
+@@ -1329,7 +1401,7 @@
+ 	  && !REG_P (src)
+ 	  && (table->set_p
+ 	      ? gcse_constant_p (XEXP (note, 0))
+-	      : want_to_gcse_p (XEXP (note, 0))))
++	      : want_to_gcse_p (XEXP (note, 0), NULL)))
+ 	src = XEXP (note, 0), pat = gen_rtx_SET (VOIDmode, dest, src);
+ 
+       /* Only record sets of pseudo-regs in the hash table.  */
+@@ -1344,7 +1416,7 @@
+ 	     can't do the same thing at the rtl level.  */
+ 	  && !can_throw_internal (insn)
+ 	  /* Is SET_SRC something we want to gcse?  */
+-	  && want_to_gcse_p (src)
++	  && want_to_gcse_p (src, &max_distance)
+ 	  /* Don't CSE a nop.  */
+ 	  && ! set_noop_p (pat)
+ 	  /* Don't GCSE if it has attached REG_EQUIV note.
+@@ -1368,7 +1440,8 @@
+ 	  int avail_p = (oprs_available_p (src, insn)
+ 			 && ! JUMP_P (insn));
+ 
+-	  insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p, table);
++	  insert_expr_in_table (src, GET_MODE (dest), insn, antic_p, avail_p,
++				max_distance, table);
+ 	}
+ 
+       /* Record sets for constant/copy propagation.  */
+@@ -1394,6 +1467,7 @@
+   else if (flag_gcse_las && REG_P (src) && MEM_P (dest))
+       {
+         unsigned int regno = REGNO (src);
++	int max_distance = 0;
+ 
+         /* Do not do this for constant/copy propagation.  */
+         if (! table->set_p
+@@ -1405,7 +1479,7 @@
+ 	      do that easily for EH edges so disable GCSE on these for now.  */
+ 	   && !can_throw_internal (insn)
+ 	   /* Is SET_DEST something we want to gcse?  */
+-	   && want_to_gcse_p (dest)
++	   && want_to_gcse_p (dest, &max_distance)
+ 	   /* Don't CSE a nop.  */
+ 	   && ! set_noop_p (pat)
+ 	   /* Don't GCSE if it has attached REG_EQUIV note.
+@@ -1427,7 +1501,7 @@
+ 
+ 	       /* Record the memory expression (DEST) in the hash table.  */
+ 	       insert_expr_in_table (dest, GET_MODE (dest), insn,
+-				     antic_p, avail_p, table);
++				     antic_p, avail_p, max_distance, table);
+              }
+       }
+ }
+@@ -1513,8 +1587,8 @@
+     if (flat_table[i] != 0)
+       {
+ 	expr = flat_table[i];
+-	fprintf (file, "Index %d (hash value %d)\n  ",
+-		 expr->bitmap_index, hash_val[i]);
++	fprintf (file, "Index %d (hash value %d; max distance %d)\n  ",
++		 expr->bitmap_index, hash_val[i], expr->max_distance);
+ 	print_rtl (file, expr->expr);
+ 	fprintf (file, "\n");
+       }
+@@ -3168,11 +3242,6 @@
+ /* Nonzero for expressions that are transparent in the block.  */
+ static sbitmap *transp;
+ 
+-/* Nonzero for expressions that are transparent at the end of the block.
+-   This is only zero for expressions killed by abnormal critical edge
+-   created by a calls.  */
+-static sbitmap *transpout;
+-
+ /* Nonzero for expressions that are computed (available) in the block.  */
+ static sbitmap *comp;
+ 
+@@ -3236,28 +3305,105 @@
+   pre_optimal = pre_redundant = pre_insert_map = pre_delete_map = NULL;
+ }
+ 
+-/* Top level routine to do the dataflow analysis needed by PRE.  */
++/* Remove certain expressions from anticipatable and transparent
++   sets of basic blocks that have incoming abnormal edge.
++   For PRE remove potentially trapping expressions to avoid placing
++   them on abnormal edges.  For hoisting remove memory references that
++   can be clobbered by calls.  */
+ 
+ static void
+-compute_pre_data (void)
++prune_expressions (bool pre_p)
+ {
+-  sbitmap trapping_expr;
+-  basic_block bb;
++  sbitmap prune_exprs;
+   unsigned int ui;
+-
+-  compute_local_properties (transp, comp, antloc, &expr_hash_table);
+-  sbitmap_vector_zero (ae_kill, last_basic_block);
+-
+-  /* Collect expressions which might trap.  */
+-  trapping_expr = sbitmap_alloc (expr_hash_table.n_elems);
+-  sbitmap_zero (trapping_expr);
++  basic_block bb;
++
++  prune_exprs = sbitmap_alloc (expr_hash_table.n_elems);
++  sbitmap_zero (prune_exprs);
+   for (ui = 0; ui < expr_hash_table.size; ui++)
+     {
+       struct expr *e;
+       for (e = expr_hash_table.table[ui]; e != NULL; e = e->next_same_hash)
+-	if (may_trap_p (e->expr))
+-	  SET_BIT (trapping_expr, e->bitmap_index);
+-    }
++	{
++	  /* Note potentially trapping expressions.  */
++	  if (may_trap_p (e->expr))
++	    {
++	      SET_BIT (prune_exprs, e->bitmap_index);
++	      continue;
++	    }
++
++	  if (!pre_p && MEM_P (e->expr))
++	    /* Note memory references that can be clobbered by a call.
++	       We do not split abnormal edges in hoisting, so would
++	       a memory reference get hoisted along an abnormal edge,
++	       it would be placed /before/ the call.  Therefore, only
++	       constant memory references can be hoisted along abnormal
++	       edges.  */
++	    {
++	      if (GET_CODE (XEXP (e->expr, 0)) == SYMBOL_REF
++		  && CONSTANT_POOL_ADDRESS_P (XEXP (e->expr, 0)))
++		continue;
++
++	      if (MEM_READONLY_P (e->expr)
++		  && !MEM_VOLATILE_P (e->expr)
++		  && MEM_NOTRAP_P (e->expr))
++		/* Constant memory reference, e.g., a PIC address.  */
++		continue;
++
++	      /* ??? Optimally, we would use interprocedural alias
++		 analysis to determine if this mem is actually killed
++		 by this call.  */
++
++	      SET_BIT (prune_exprs, e->bitmap_index);
++	    }
++	}
++    }
++
++  FOR_EACH_BB (bb)
++    {
++      edge e;
++      edge_iterator ei;
++
++      /* If the current block is the destination of an abnormal edge, we
++	 kill all trapping (for PRE) and memory (for hoist) expressions
++	 because we won't be able to properly place the instruction on
++	 the edge.  So make them neither anticipatable nor transparent.
++	 This is fairly conservative.
++
++	 ??? For hoisting it may be necessary to check for set-and-jump
++	 instructions here, not just for abnormal edges.  The general problem
++	 is that when an expression cannot not be placed right at the end of
++	 a basic block we should account for any side-effects of a subsequent
++	 jump instructions that could clobber the expression.  It would
++	 be best to implement this check along the lines of
++	 hoist_expr_reaches_here_p where the target block is already known
++	 and, hence, there's no need to conservatively prune expressions on
++	 "intermediate" set-and-jump instructions.  */
++      FOR_EACH_EDGE (e, ei, bb->preds)
++	if ((e->flags & EDGE_ABNORMAL)
++	    && (pre_p || CALL_P (BB_END (e->src))))
++	  {
++	    sbitmap_difference (antloc[bb->index],
++				antloc[bb->index], prune_exprs);
++	    sbitmap_difference (transp[bb->index],
++				transp[bb->index], prune_exprs);
++	    break;
++	  }
++    }
++
++  sbitmap_free (prune_exprs);
++}
++
++/* Top level routine to do the dataflow analysis needed by PRE.  */
++
++static void
++compute_pre_data (void)
++{
++  basic_block bb;
++
++  compute_local_properties (transp, comp, antloc, &expr_hash_table);
++  prune_expressions (true);
++  sbitmap_vector_zero (ae_kill, last_basic_block);
+ 
+   /* Compute ae_kill for each basic block using:
+ 
+@@ -3266,21 +3412,6 @@
+ 
+   FOR_EACH_BB (bb)
+     {
+-      edge e;
+-      edge_iterator ei;
+-
+-      /* If the current block is the destination of an abnormal edge, we
+-	 kill all trapping expressions because we won't be able to properly
+-	 place the instruction on the edge.  So make them neither
+-	 anticipatable nor transparent.  This is fairly conservative.  */
+-      FOR_EACH_EDGE (e, ei, bb->preds)
+-	if (e->flags & EDGE_ABNORMAL)
+-	  {
+-	    sbitmap_difference (antloc[bb->index], antloc[bb->index], trapping_expr);
+-	    sbitmap_difference (transp[bb->index], transp[bb->index], trapping_expr);
+-	    break;
+-	  }
+-
+       sbitmap_a_or_b (ae_kill[bb->index], transp[bb->index], comp[bb->index]);
+       sbitmap_not (ae_kill[bb->index], ae_kill[bb->index]);
+     }
+@@ -3291,7 +3422,6 @@
+   antloc = NULL;
+   sbitmap_vector_free (ae_kill);
+   ae_kill = NULL;
+-  sbitmap_free (trapping_expr);
+ }
+ 
+ /* PRE utilities */
+@@ -3406,14 +3536,10 @@
+ 
+ /* Add EXPR to the end of basic block BB.
+ 
+-   This is used by both the PRE and code hoisting.
+-
+-   For PRE, we want to verify that the expr is either transparent
+-   or locally anticipatable in the target block.  This check makes
+-   no sense for code hoisting.  */
++   This is used by both the PRE and code hoisting.  */
+ 
+ static void
+-insert_insn_end_basic_block (struct expr *expr, basic_block bb, int pre)
++insert_insn_end_basic_block (struct expr *expr, basic_block bb)
+ {
+   rtx insn = BB_END (bb);
+   rtx new_insn;
+@@ -3440,12 +3566,6 @@
+ #ifdef HAVE_cc0
+       rtx note;
+ #endif
+-      /* It should always be the case that we can put these instructions
+-	 anywhere in the basic block with performing PRE optimizations.
+-	 Check this.  */
+-      gcc_assert (!NONJUMP_INSN_P (insn) || !pre
+-		  || TEST_BIT (antloc[bb->index], expr->bitmap_index)
+-		  || TEST_BIT (transp[bb->index], expr->bitmap_index));
+ 
+       /* If this is a jump table, then we can't insert stuff here.  Since
+ 	 we know the previous real insn must be the tablejump, we insert
+@@ -3482,15 +3602,7 @@
+       /* Keeping in mind SMALL_REGISTER_CLASSES and parameters in registers,
+ 	 we search backward and place the instructions before the first
+ 	 parameter is loaded.  Do this for everyone for consistency and a
+-	 presumption that we'll get better code elsewhere as well.
+-
+-	 It should always be the case that we can put these instructions
+-	 anywhere in the basic block with performing PRE optimizations.
+-	 Check this.  */
+-
+-      gcc_assert (!pre
+-		  || TEST_BIT (antloc[bb->index], expr->bitmap_index)
+-		  || TEST_BIT (transp[bb->index], expr->bitmap_index));
++	 presumption that we'll get better code elsewhere as well.  */
+ 
+       /* Since different machines initialize their parameter registers
+ 	 in different orders, assume nothing.  Collect the set of all
+@@ -3587,7 +3699,7 @@
+ 			   now.  */
+ 
+ 			if (eg->flags & EDGE_ABNORMAL)
+-			  insert_insn_end_basic_block (index_map[j], bb, 0);
++			  insert_insn_end_basic_block (index_map[j], bb);
+ 			else
+ 			  {
+ 			    insn = process_insert_insn (index_map[j]);
+@@ -4046,61 +4158,12 @@
+     }
+ }
+ 
+-/* Compute transparent outgoing information for each block.
+-
+-   An expression is transparent to an edge unless it is killed by
+-   the edge itself.  This can only happen with abnormal control flow,
+-   when the edge is traversed through a call.  This happens with
+-   non-local labels and exceptions.
+-
+-   This would not be necessary if we split the edge.  While this is
+-   normally impossible for abnormal critical edges, with some effort
+-   it should be possible with exception handling, since we still have
+-   control over which handler should be invoked.  But due to increased
+-   EH table sizes, this may not be worthwhile.  */
+-
+-static void
+-compute_transpout (void)
+-{
+-  basic_block bb;
+-  unsigned int i;
+-  struct expr *expr;
+-
+-  sbitmap_vector_ones (transpout, last_basic_block);
+-
+-  FOR_EACH_BB (bb)
+-    {
+-      /* Note that flow inserted a nop at the end of basic blocks that
+-	 end in call instructions for reasons other than abnormal
+-	 control flow.  */
+-      if (! CALL_P (BB_END (bb)))
+-	continue;
+-
+-      for (i = 0; i < expr_hash_table.size; i++)
+-	for (expr = expr_hash_table.table[i]; expr ; expr = expr->next_same_hash)
+-	  if (MEM_P (expr->expr))
+-	    {
+-	      if (GET_CODE (XEXP (expr->expr, 0)) == SYMBOL_REF
+-		  && CONSTANT_POOL_ADDRESS_P (XEXP (expr->expr, 0)))
+-		continue;
+-
+-	      /* ??? Optimally, we would use interprocedural alias
+-		 analysis to determine if this mem is actually killed
+-		 by this call.  */
+-	      RESET_BIT (transpout[bb->index], expr->bitmap_index);
+-	    }
+-    }
+-}
+-
+ /* Code Hoisting variables and subroutines.  */
+ 
+ /* Very busy expressions.  */
+ static sbitmap *hoist_vbein;
+ static sbitmap *hoist_vbeout;
+ 
+-/* Hoistable expressions.  */
+-static sbitmap *hoist_exprs;
+-
+ /* ??? We could compute post dominators and run this algorithm in
+    reverse to perform tail merging, doing so would probably be
+    more effective than the tail merging code in jump.c.
+@@ -4119,8 +4182,6 @@
+ 
+   hoist_vbein = sbitmap_vector_alloc (n_blocks, n_exprs);
+   hoist_vbeout = sbitmap_vector_alloc (n_blocks, n_exprs);
+-  hoist_exprs = sbitmap_vector_alloc (n_blocks, n_exprs);
+-  transpout = sbitmap_vector_alloc (n_blocks, n_exprs);
+ }
+ 
+ /* Free vars used for code hoisting analysis.  */
+@@ -4134,8 +4195,6 @@
+ 
+   sbitmap_vector_free (hoist_vbein);
+   sbitmap_vector_free (hoist_vbeout);
+-  sbitmap_vector_free (hoist_exprs);
+-  sbitmap_vector_free (transpout);
+ 
+   free_dominance_info (CDI_DOMINATORS);
+ }
+@@ -4166,8 +4225,15 @@
+       FOR_EACH_BB_REVERSE (bb)
+ 	{
+ 	  if (bb->next_bb != EXIT_BLOCK_PTR)
+-	    sbitmap_intersection_of_succs (hoist_vbeout[bb->index],
+-					   hoist_vbein, bb->index);
++	    {
++	      sbitmap_intersection_of_succs (hoist_vbeout[bb->index],
++					     hoist_vbein, bb->index);
++
++	      /* Include expressions in VBEout that are calculated
++		 in BB and available at its end.  */
++	      sbitmap_a_or_b (hoist_vbeout[bb->index],
++			      hoist_vbeout[bb->index], comp[bb->index]);
++	    }
+ 
+ 	  changed |= sbitmap_a_or_b_and_c_cg (hoist_vbein[bb->index],
+ 					      antloc[bb->index],
+@@ -4179,7 +4245,17 @@
+     }
+ 
+   if (dump_file)
+-    fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes);
++    {
++      fprintf (dump_file, "hoisting vbeinout computation: %d passes\n", passes);
++
++      FOR_EACH_BB (bb)
++        {
++	  fprintf (dump_file, "vbein (%d): ", bb->index);
++	  dump_sbitmap_file (dump_file, hoist_vbein[bb->index]);
++	  fprintf (dump_file, "vbeout(%d): ", bb->index);
++	  dump_sbitmap_file (dump_file, hoist_vbeout[bb->index]);
++	}
++    }
+ }
+ 
+ /* Top level routine to do the dataflow analysis needed by code hoisting.  */
+@@ -4188,7 +4264,7 @@
+ compute_code_hoist_data (void)
+ {
+   compute_local_properties (transp, comp, antloc, &expr_hash_table);
+-  compute_transpout ();
++  prune_expressions (false);
+   compute_code_hoist_vbeinout ();
+   calculate_dominance_info (CDI_DOMINATORS);
+   if (dump_file)
+@@ -4197,6 +4273,8 @@
+ 
+ /* Determine if the expression identified by EXPR_INDEX would
+    reach BB unimpared if it was placed at the end of EXPR_BB.
++   Stop the search if the expression would need to be moved more
++   than DISTANCE instructions.
+ 
+    It's unclear exactly what Muchnick meant by "unimpared".  It seems
+    to me that the expression must either be computed or transparent in
+@@ -4209,12 +4287,24 @@
+    paths.  */
+ 
+ static int
+-hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb, char *visited)
++hoist_expr_reaches_here_p (basic_block expr_bb, int expr_index, basic_block bb,
++			   char *visited, int distance, int *bb_size)
+ {
+   edge pred;
+   edge_iterator ei;
+   int visited_allocated_locally = 0;
+ 
++  /* Terminate the search if distance, for which EXPR is allowed to move,
++     is exhausted.  */
++  if (distance > 0)
++    {
++      distance -= bb_size[bb->index];
++
++      if (distance <= 0)
++	return 0;
++    }
++  else
++    gcc_assert (distance == 0);
+ 
+   if (visited == NULL)
+     {
+@@ -4233,9 +4323,6 @@
+       else if (visited[pred_bb->index])
+ 	continue;
+ 
+-      /* Does this predecessor generate this expression?  */
+-      else if (TEST_BIT (comp[pred_bb->index], expr_index))
+-	break;
+       else if (! TEST_BIT (transp[pred_bb->index], expr_index))
+ 	break;
+ 
+@@ -4243,8 +4330,8 @@
+       else
+ 	{
+ 	  visited[pred_bb->index] = 1;
+-	  if (! hoist_expr_reaches_here_p (expr_bb, expr_index,
+-					   pred_bb, visited))
++	  if (! hoist_expr_reaches_here_p (expr_bb, expr_index, pred_bb,
++					   visited, distance, bb_size))
+ 	    break;
+ 	}
+     }
+@@ -4254,20 +4341,33 @@
+   return (pred == NULL);
+ }
+ 
++/* Find occurence in BB.  */
++static struct occr *
++find_occr_in_bb (struct occr *occr, basic_block bb)
++{
++  /* Find the right occurrence of this expression.  */
++  while (occr && BLOCK_FOR_INSN (occr->insn) != bb)
++    occr = occr->next;
++
++  return occr;
++}
++
+ /* Actually perform code hoisting.  */
+ 
+ static int
+ hoist_code (void)
+ {
+   basic_block bb, dominated;
++  VEC (basic_block, heap) *dom_tree_walk;
++  unsigned int dom_tree_walk_index;
+   VEC (basic_block, heap) *domby;
+   unsigned int i,j;
+   struct expr **index_map;
+   struct expr *expr;
++  int *to_bb_head;
++  int *bb_size;
+   int changed = 0;
+ 
+-  sbitmap_vector_zero (hoist_exprs, last_basic_block);
+-
+   /* Compute a mapping from expression number (`bitmap_index') to
+      hash table entry.  */
+ 
+@@ -4276,28 +4376,98 @@
+     for (expr = expr_hash_table.table[i]; expr != NULL; expr = expr->next_same_hash)
+       index_map[expr->bitmap_index] = expr;
+ 
++  /* Calculate sizes of basic blocks and note how far
++     each instruction is from the start of its block.  We then use this
++     data to restrict distance an expression can travel.  */
++
++  to_bb_head = XCNEWVEC (int, get_max_uid ());
++  bb_size = XCNEWVEC (int, last_basic_block);
++
++  FOR_EACH_BB (bb)
++    {
++      rtx insn;
++      int to_head;
++
++      to_head = 0;
++      FOR_BB_INSNS (bb, insn)
++	{
++	  /* Don't count debug instructions to avoid them affecting
++	     decision choices.  */
++	  if (NONDEBUG_INSN_P (insn))
++	    to_bb_head[INSN_UID (insn)] = to_head++;
++	}
++
++      bb_size[bb->index] = to_head;
++    }
++
++  gcc_assert (EDGE_COUNT (ENTRY_BLOCK_PTR->succs) == 1
++	      && (EDGE_SUCC (ENTRY_BLOCK_PTR, 0)->dest
++		  == ENTRY_BLOCK_PTR->next_bb));
++
++  dom_tree_walk = get_all_dominated_blocks (CDI_DOMINATORS,
++					    ENTRY_BLOCK_PTR->next_bb);
++
+   /* Walk over each basic block looking for potentially hoistable
+      expressions, nothing gets hoisted from the entry block.  */
+-  FOR_EACH_BB (bb)
++  for (dom_tree_walk_index = 0;
++       VEC_iterate (basic_block, dom_tree_walk, dom_tree_walk_index, bb);
++       dom_tree_walk_index++)
+     {
+-      int found = 0;
+-      int insn_inserted_p;
+-
+-      domby = get_dominated_by (CDI_DOMINATORS, bb);
++      domby = get_dominated_to_depth (CDI_DOMINATORS, bb, MAX_HOIST_DEPTH);
++
++      if (VEC_length (basic_block, domby) == 0)
++	continue;
++
+       /* Examine each expression that is very busy at the exit of this
+ 	 block.  These are the potentially hoistable expressions.  */
+       for (i = 0; i < hoist_vbeout[bb->index]->n_bits; i++)
+ 	{
+-	  int hoistable = 0;
+-
+-	  if (TEST_BIT (hoist_vbeout[bb->index], i)
+-	      && TEST_BIT (transpout[bb->index], i))
++	  if (TEST_BIT (hoist_vbeout[bb->index], i))
+ 	    {
++	      /* Current expression.  */
++	      struct expr *expr = index_map[i];
++	      /* Number of occurences of EXPR that can be hoisted to BB.  */
++	      int hoistable = 0;
++	      /* Basic blocks that have occurences reachable from BB.  */
++	      bitmap_head _from_bbs, *from_bbs = &_from_bbs;
++	      /* Occurences reachable from BB.  */
++	      VEC (occr_t, heap) *occrs_to_hoist = NULL;
++	      /* We want to insert the expression into BB only once, so
++		 note when we've inserted it.  */
++	      int insn_inserted_p;
++	      occr_t occr;
++
++	      bitmap_initialize (from_bbs, 0);
++
++	      /* If an expression is computed in BB and is available at end of
++		 BB, hoist all occurences dominated by BB to BB.  */
++	      if (TEST_BIT (comp[bb->index], i))
++		{
++		  occr = find_occr_in_bb (expr->antic_occr, bb);
++
++		  if (occr)
++		    {
++		      /* An occurence might've been already deleted
++			 while processing a dominator of BB.  */
++		      if (occr->deleted_p)
++			gcc_assert (MAX_HOIST_DEPTH > 1);
++		      else
++			{
++			  gcc_assert (NONDEBUG_INSN_P (occr->insn));
++			  hoistable++;
++			}
++		    }
++		  else
++		    hoistable++;
++		}
++
+ 	      /* We've found a potentially hoistable expression, now
+ 		 we look at every block BB dominates to see if it
+ 		 computes the expression.  */
+ 	      for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
+ 		{
++		  int max_distance;
++
+ 		  /* Ignore self dominance.  */
+ 		  if (bb == dominated)
+ 		    continue;
+@@ -4307,17 +4477,43 @@
+ 		  if (!TEST_BIT (antloc[dominated->index], i))
+ 		    continue;
+ 
++		  occr = find_occr_in_bb (expr->antic_occr, dominated);
++		  gcc_assert (occr);
++
++		  /* An occurence might've been already deleted
++		     while processing a dominator of BB.  */
++		  if (occr->deleted_p)
++		    {
++		      gcc_assert (MAX_HOIST_DEPTH > 1);
++		      continue;
++		    }
++		  gcc_assert (NONDEBUG_INSN_P (occr->insn));
++
++		  max_distance = expr->max_distance;
++		  if (max_distance > 0)
++		    /* Adjust MAX_DISTANCE to account for the fact that
++		       OCCR won't have to travel all of DOMINATED, but
++		       only part of it.  */
++		    max_distance += (bb_size[dominated->index]
++				     - to_bb_head[INSN_UID (occr->insn)]);
++
+ 		  /* Note if the expression would reach the dominated block
+ 		     unimpared if it was placed at the end of BB.
+ 
+ 		     Keep track of how many times this expression is hoistable
+ 		     from a dominated block into BB.  */
+-		  if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
+-		    hoistable++;
++		  if (hoist_expr_reaches_here_p (bb, i, dominated, NULL,
++						 max_distance, bb_size))
++		    {
++		      hoistable++;
++		      VEC_safe_push (occr_t, heap,
++				     occrs_to_hoist, occr);
++		      bitmap_set_bit (from_bbs, dominated->index);
++		    }
+ 		}
+ 
+ 	      /* If we found more than one hoistable occurrence of this
+-		 expression, then note it in the bitmap of expressions to
++		 expression, then note it in the vector of expressions to
+ 		 hoist.  It makes no sense to hoist things which are computed
+ 		 in only one BB, and doing so tends to pessimize register
+ 		 allocation.  One could increase this value to try harder
+@@ -4326,91 +4522,80 @@
+ 		 the vast majority of hoistable expressions are only movable
+ 		 from two successors, so raising this threshold is likely
+ 		 to nullify any benefit we get from code hoisting.  */
+-	      if (hoistable > 1)
+-		{
+-		  SET_BIT (hoist_exprs[bb->index], i);
+-		  found = 1;
+-		}
+-	    }
+-	}
+-      /* If we found nothing to hoist, then quit now.  */
+-      if (! found)
+-        {
+-	  VEC_free (basic_block, heap, domby);
+-	  continue;
+-	}
+-
+-      /* Loop over all the hoistable expressions.  */
+-      for (i = 0; i < hoist_exprs[bb->index]->n_bits; i++)
+-	{
+-	  /* We want to insert the expression into BB only once, so
+-	     note when we've inserted it.  */
+-	  insn_inserted_p = 0;
+-
+-	  /* These tests should be the same as the tests above.  */
+-	  if (TEST_BIT (hoist_exprs[bb->index], i))
+-	    {
+-	      /* We've found a potentially hoistable expression, now
+-		 we look at every block BB dominates to see if it
+-		 computes the expression.  */
+-	      for (j = 0; VEC_iterate (basic_block, domby, j, dominated); j++)
+-		{
+-		  /* Ignore self dominance.  */
+-		  if (bb == dominated)
+-		    continue;
+-
+-		  /* We've found a dominated block, now see if it computes
+-		     the busy expression and whether or not moving that
+-		     expression to the "beginning" of that block is safe.  */
+-		  if (!TEST_BIT (antloc[dominated->index], i))
+-		    continue;
+-
+-		  /* The expression is computed in the dominated block and
+-		     it would be safe to compute it at the start of the
+-		     dominated block.  Now we have to determine if the
+-		     expression would reach the dominated block if it was
+-		     placed at the end of BB.  */
+-		  if (hoist_expr_reaches_here_p (bb, i, dominated, NULL))
+-		    {
+-		      struct expr *expr = index_map[i];
+-		      struct occr *occr = expr->antic_occr;
+-		      rtx insn;
+-		      rtx set;
+-
+-		      /* Find the right occurrence of this expression.  */
+-		      while (BLOCK_FOR_INSN (occr->insn) != dominated && occr)
+-			occr = occr->next;
+-
+-		      gcc_assert (occr);
+-		      insn = occr->insn;
+-		      set = single_set (insn);
+-		      gcc_assert (set);
+-
+-		      /* Create a pseudo-reg to store the result of reaching
+-			 expressions into.  Get the mode for the new pseudo
+-			 from the mode of the original destination pseudo.  */
+-		      if (expr->reaching_reg == NULL)
+-			expr->reaching_reg
+-			  = gen_reg_rtx_and_attrs (SET_DEST (set));
+-
+-		      gcse_emit_move_after (expr->reaching_reg, SET_DEST (set), insn);
+-		      delete_insn (insn);
+-		      occr->deleted_p = 1;
+-		      changed = 1;
+-		      gcse_subst_count++;
+-
+-		      if (!insn_inserted_p)
+-			{
+-			  insert_insn_end_basic_block (index_map[i], bb, 0);
+-			  insn_inserted_p = 1;
+-			}
+-		    }
+-		}
++	      if (hoistable > 1 && dbg_cnt (hoist_insn))
++		{
++		  /* If (hoistable != VEC_length), then there is
++		     an occurence of EXPR in BB itself.  Don't waste
++		     time looking for LCA in this case.  */
++		  if ((unsigned) hoistable
++		      == VEC_length (occr_t, occrs_to_hoist))
++		    {
++		      basic_block lca;
++
++		      lca = nearest_common_dominator_for_set (CDI_DOMINATORS,
++							      from_bbs);
++		      if (lca != bb)
++			/* Punt, it's better to hoist these occurences to
++			   LCA.  */
++			VEC_free (occr_t, heap, occrs_to_hoist);
++		    }
++		}
++	      else
++		/* Punt, no point hoisting a single occurence.  */
++		VEC_free (occr_t, heap, occrs_to_hoist);
++
++	      insn_inserted_p = 0;
++
++	      /* Walk through occurences of I'th expressions we want
++		 to hoist to BB and make the transformations.  */
++	      for (j = 0;
++		   VEC_iterate (occr_t, occrs_to_hoist, j, occr);
++		   j++)
++		{
++		  rtx insn;
++		  rtx set;
++
++		  gcc_assert (!occr->deleted_p);
++
++		  insn = occr->insn;
++		  set = single_set (insn);
++		  gcc_assert (set);
++
++		  /* Create a pseudo-reg to store the result of reaching
++		     expressions into.  Get the mode for the new pseudo
++		     from the mode of the original destination pseudo.
++
++		     It is important to use new pseudos whenever we
++		     emit a set.  This will allow reload to use
++		     rematerialization for such registers.  */
++		  if (!insn_inserted_p)
++		    expr->reaching_reg
++		      = gen_reg_rtx_and_attrs (SET_DEST (set));
++
++		  gcse_emit_move_after (expr->reaching_reg, SET_DEST (set),
++					insn);
++		  delete_insn (insn);
++		  occr->deleted_p = 1;
++		  changed = 1;
++		  gcse_subst_count++;
++
++		  if (!insn_inserted_p)
++		    {
++		      insert_insn_end_basic_block (expr, bb);
++		      insn_inserted_p = 1;
++		    }
++		}
++
++	      VEC_free (occr_t, heap, occrs_to_hoist);
++	      bitmap_clear (from_bbs);
+ 	    }
+ 	}
+       VEC_free (basic_block, heap, domby);
+     }
+ 
++  VEC_free (basic_block, heap, dom_tree_walk);
++  free (bb_size);
++  free (to_bb_head);
+   free (index_map);
+ 
+   return changed;
+@@ -4433,6 +4618,8 @@
+       || is_too_expensive (_("GCSE disabled")))
+     return 0;
+ 
++  doing_code_hoisting_p = true;
++
+   /* We need alias.  */
+   init_alias_analysis ();
+ 
+@@ -4468,6 +4655,8 @@
+ 	       gcse_subst_count, gcse_create_count);
+     }
+ 
++  doing_code_hoisting_p = false;
++
+   return changed;
+ }
+ 
+
+=== modified file 'gcc/params.def'
+--- old/gcc/params.def	2010-04-02 18:54:46 +0000
++++ new/gcc/params.def	2010-08-16 09:41:58 +0000
+@@ -219,6 +219,29 @@
+ 	"gcse-after-reload-critical-fraction",
+ 	"The threshold ratio of critical edges execution count that permit performing redundancy elimination after reload",
+         10, 0, 0)
++
++/* GCSE will use GCSE_COST_DISTANCE_RATION as a scaling factor
++   to calculate maximum distance for which an expression is allowed to move
++   from its rtx_cost.  */
++DEFPARAM(PARAM_GCSE_COST_DISTANCE_RATIO,
++	 "gcse-cost-distance-ratio",
++	 "Scaling factor in calculation of maximum distance an expression can be moved by GCSE optimizations",
++	 10, 0, 0)
++/* GCSE won't restrict distance for which an expression with rtx_cost greater
++   than COSTS_N_INSN(GCSE_UNRESTRICTED_COST) is allowed to move.  */
++DEFPARAM(PARAM_GCSE_UNRESTRICTED_COST,
++	 "gcse-unrestricted-cost",
++	 "Cost at which GCSE optimizations will not constraint the distance an expression can travel",
++	 3, 0, 0)
++
++/* How deep from a given basic block the dominator tree should be searched
++   for expressions to hoist to the block.  The value of 0 will avoid limiting
++   the search.  */
++DEFPARAM(PARAM_MAX_HOIST_DEPTH,
++	 "max-hoist-depth",
++	 "Maximum depth of search in the dominator tree for expressions to hoist",
++	 30, 0, 0)
++
+ /* This parameter limits the number of insns in a loop that will be unrolled,
+    and by how much the loop is unrolled.
+ 
+
+=== modified file 'gcc/params.h'
+--- old/gcc/params.h	2009-12-01 19:12:29 +0000
++++ new/gcc/params.h	2010-08-16 09:41:58 +0000
+@@ -125,6 +125,12 @@
+   PARAM_VALUE (PARAM_GCSE_AFTER_RELOAD_PARTIAL_FRACTION)
+ #define GCSE_AFTER_RELOAD_CRITICAL_FRACTION \
+   PARAM_VALUE (PARAM_GCSE_AFTER_RELOAD_CRITICAL_FRACTION)
++#define GCSE_COST_DISTANCE_RATIO \
++  PARAM_VALUE (PARAM_GCSE_COST_DISTANCE_RATIO)
++#define GCSE_UNRESTRICTED_COST \
++  PARAM_VALUE (PARAM_GCSE_UNRESTRICTED_COST)
++#define MAX_HOIST_DEPTH \
++  PARAM_VALUE (PARAM_MAX_HOIST_DEPTH)
+ #define MAX_UNROLLED_INSNS \
+   PARAM_VALUE (PARAM_MAX_UNROLLED_INSNS)
+ #define MAX_SMS_LOOP_NUMBER \
+
+=== added file 'gcc/testsuite/gcc.dg/pr45101.c'
+--- old/gcc/testsuite/gcc.dg/pr45101.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr45101.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,15 @@
++/* PR rtl-optimization/45101 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -fgcse -fgcse-las" } */
++
++struct
++{
++  int i;
++} *s;
++
++extern void bar (void);
++
++void foo ()
++{
++  !s ? s->i++ : bar ();
++}
+
+=== added file 'gcc/testsuite/gcc.dg/pr45105.c'
+--- old/gcc/testsuite/gcc.dg/pr45105.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr45105.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,27 @@
++/* PR debug/45105 */
++/* { dg-do compile } */
++/* { dg-options "-Os -fcompare-debug" } */
++
++extern int *baz (int *, int *);
++
++void
++bar (int *p1, int *p2)
++{
++  int n = *baz (0, 0);
++  p1[n] = p2[n];
++}
++
++void
++foo (int *p, int l)
++{
++  int a1[32];
++  int a2[32];
++  baz (a1, a2);
++  while (l)
++    {
++      if (l & 1)
++	p = baz (a2, p);
++      l--;
++      bar (a1, a2);
++    }
++}
+
+=== added file 'gcc/testsuite/gcc.dg/pr45107.c'
+--- old/gcc/testsuite/gcc.dg/pr45107.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr45107.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,13 @@
++/* PR rtl-optimization/45107 */
++/* { dg-do compile } */
++/* { dg-options "-Os -fgcse-las" } */
++
++extern void bar(int *);
++
++int foo (int *p)
++{
++    int i = *p;
++    if (i != 1)
++      bar(&i);
++    *p = i;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr40956.c'
+--- old/gcc/testsuite/gcc.target/arm/pr40956.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr40956.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,14 @@
++/* { dg-options "-mthumb -Os -fpic -march=armv5te" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-require-effective-target fpic } */
++/* Make sure the constant "0" is loaded into register only once.  */
++/* { dg-final { scan-assembler-times "mov\[\\t \]*r., #0" 1 } } */
++
++int foo(int p, int* q)
++{
++  if (p!=9)
++    *q = 0;
++  else
++    *(q+1) = 0;
++  return 3;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42495.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42495.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42495.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,31 @@
++/* { dg-options "-mthumb -Os -fpic -march=armv5te -fdump-rtl-hoist" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-require-effective-target fpic } */
++/* Make sure all calculations of gObj's address get hoisted to one location.  */
++/* { dg-final { scan-rtl-dump "PRE/HOIST: end of bb .* copying expression" "hoist" } } */
++
++struct st_a {
++   int data;
++};
++
++struct st_b {
++   struct st_a *p_a;
++    struct st_b *next;
++};
++
++extern struct st_b gObj;
++extern void foo(int, struct st_b*);
++
++int goo(struct st_b * obj) {
++   struct st_a *pa;
++   if (gObj.p_a->data != 0) {
++     foo(gObj.p_a->data, obj);
++   }
++   pa = obj->p_a;
++   if (pa == 0) {
++     return 0;
++   } else if (pa == gObj.p_a) {
++     return 0;
++   }
++   return pa->data;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42574.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42574.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42574.c	2010-08-16 09:41:58 +0000
+@@ -0,0 +1,24 @@
++/* { dg-options "-mthumb -Os -fpic -march=armv5te" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-require-effective-target fpic } */
++/* Make sure the address of glob.c is calculated only once and using
++   a logical shift for the offset (200<<1).  */
++/* { dg-final { scan-assembler-times "lsl" 1 } } */
++
++struct A {
++ char a[400];
++ float* c;
++};
++struct A glob;
++void func();
++void func1(float*);
++int func2(float*, int*);
++void func3(float*);
++
++void test(int *p) {
++ func1(glob.c);
++ if (func2(glob.c, p)) {
++   func();
++ }
++ func3(glob.c);
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99361.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99361.patch
new file mode 100644
index 0000000000..db9e63917d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99361.patch
@@ -0,0 +1,17586 @@
+2010-08-04  Julian Brown  <julian@codesourcery.com>
+
+	gcc/
+	* config/arm/neon-testgen.ml (regexps): Allow any characters
+	in comments after assembly instructions.
+
+	gcc/testsuite/
+	* gcc.target/arm/neon/vfp-shift-a2t2.c: Allow any characters in
+	comments after assembly instructions.
+	* gcc.target/arm/neon/v*.c: Regenerate.
+
+ 2010-07-28  Maxim Kuvyrkov  <maxim@codesourcery.com>
+ 
+ 	Backport code hoisting improvements from mainline:
+
+=== modified file 'gcc/config/arm/neon-testgen.ml'
+--- old/gcc/config/arm/neon-testgen.ml	2010-07-29 15:38:15 +0000
++++ new/gcc/config/arm/neon-testgen.ml	2010-08-20 13:27:11 +0000
+@@ -257,7 +257,7 @@
+      intrinsic expands to.  Watch out for any writeback character and
+      comments after the instruction.  *)
+   let regexps = List.map (fun regexp -> insn_regexp ^ "\\[ \t\\]+" ^ regexp ^
+-			  "!?\\(\\[ \t\\]+@\\[a-zA-Z0-9 \\]+\\)?\\n")
++			  "!?\\(\\[ \t\\]+@.*\\)?\\n")
+                          (analyze_all_shapes features shape analyze_shape)
+   in
+     (* Emit file and function prologues.  *)
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vraddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vraddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vraddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhnu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vraddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhnu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vraddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRaddhnu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vraddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vraddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vrhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vrhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vrhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vrhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vrhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vrhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhadds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhadds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vrhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhadds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhadds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vrhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhadds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhadds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vrhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vrhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vrhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRhaddu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vrhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshls64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshls64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshls64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vrshrq_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vrshrq_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vrshrq_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vrshrq_n_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vrshrq_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vrshrq_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vrshrq_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vrshrq_n_u8 (arg0_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vrshr_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vrshr_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vrshr_n_s64 (arg0_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vrshr_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vrshr_n_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vrshr_n_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vrshr_n_u64 (arg0_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshr_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vrshr_n_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vrshrn_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vrshrn_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vrshrn_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vrshrn_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vrshrn_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRshrn_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vrshrn_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vrsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vrsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vrsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vrsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vrsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vrsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vrsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsraQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vrsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vrsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vrsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vrsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vrsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vrsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vrsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vrsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsra_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vrsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vrsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vrsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vrsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhnu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vrsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhnu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vrsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vRsubhnu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vrsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQs16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vabaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQs32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vabaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQs8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x16_t = vabaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vabaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vabaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabaQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabaQu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x16_t = vabaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabals16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabals16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabals16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vabal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabals32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabals32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabals32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vabal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabals8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabals8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabals8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vabal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabalu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabalu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabalu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vabal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabalu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabalu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabalu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vabal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabalu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabalu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabalu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vabal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabas16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabas16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabas16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vaba_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabas32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabas32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabas32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vaba_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabas8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabas8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabas8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vaba_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabau16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabau16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabau16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vaba_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabau32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabau32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabau32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vaba_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabau8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabau8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabau8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vaba_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaba\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vabdq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vabdq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vabdq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vabdq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vabdq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vabdq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vabdq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vabd_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vabdl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vabdl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vabdl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vabdl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vabdl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vabdl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabdl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabdl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vabd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vabd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vabd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vabd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vabd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabdu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabdu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabdu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vabd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabsQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabsQf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vabsq_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabsQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabsQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vabsq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabsQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabsQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vabsq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabsQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabsQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vabsq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabsf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabsf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabsf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vabs_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabss16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabss16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabss16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vabs_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabss32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabss32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabss32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vabs_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vabss8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vabss8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vabss8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vabs_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vaddq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vaddhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vaddhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vaddhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhnu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vaddhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhnu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vaddhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddhnu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vaddhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vaddl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vaddl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vaddl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vaddl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vaddl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vaddl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vadds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vadds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vadds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vadds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vadds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vadds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vadds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vadds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vadds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddws16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddws16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddws16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vaddw_s16 (arg0_int32x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddws32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddws32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddws32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vaddw_s32 (arg0_int64x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddws8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddws8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddws8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vaddw_s8 (arg0_int16x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddwu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddwu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vaddw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddwu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddwu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vaddw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vaddwu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vaddwu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vaddw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vaddw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vaddw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vandq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vandq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vandq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vandq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vandq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vandq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vandq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vandq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vands16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vands16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vands16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vand_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vands32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vands32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vands32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vand_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vands8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vands8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vands8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vand_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vand_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vand_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vandu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vandu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vandu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vand_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vand\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vbicq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vbicq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vbicq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vbicq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vbicq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vbicq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vbicq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vbicq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbics16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbics16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbics16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vbic_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbics32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbics32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbics32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vbic_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbics8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbics8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbics8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vbic_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vbic_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vbic_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbicu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbicu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbicu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vbic_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vbic\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vbslq_f32 (arg0_uint32x4_t, arg1_float32x4_t, arg2_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQp16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly16x8_t = vbslq_p16 (arg0_uint16x8_t, arg1_poly16x8_t, arg2_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQp8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x16_t = vbslq_p8 (arg0_uint8x16_t, arg1_poly8x16_t, arg2_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQs16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vbslq_s16 (arg0_uint16x8_t, arg1_int16x8_t, arg2_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQs32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vbslq_s32 (arg0_uint32x4_t, arg1_int32x4_t, arg2_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQs64.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vbslq_s64 (arg0_uint64x2_t, arg1_int64x2_t, arg2_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQs8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x16_t = vbslq_s8 (arg0_uint8x16_t, arg1_int8x16_t, arg2_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vbslq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vbslq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQu64.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vbslq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, arg2_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslQu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x16_t = vbslq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vbsl_f32 (arg0_uint32x2_t, arg1_float32x2_t, arg2_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslp16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly16x4_t = vbsl_p16 (arg0_uint16x4_t, arg1_poly16x4_t, arg2_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslp8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x8_t = vbsl_p8 (arg0_uint8x8_t, arg1_poly8x8_t, arg2_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbsls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbsls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbsls16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vbsl_s16 (arg0_uint16x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbsls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbsls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbsls32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vbsl_s32 (arg0_uint32x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbsls64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbsls64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbsls64.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x1_t = vbsl_s64 (arg0_uint64x1_t, arg1_int64x1_t, arg2_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbsls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbsls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbsls8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vbsl_s8 (arg0_uint8x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vbsl_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vbsl_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslu64.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x1_t = vbsl_u64 (arg0_uint64x1_t, arg1_uint64x1_t, arg2_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vbslu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vbslu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vbslu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vbsl_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "((vbsl)|(vbit)|(vbif))\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcageQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcageQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcageq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcagef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcagef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcagef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcage_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcagtQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcagtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcagtf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcagtf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcagt_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcaleQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcaleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcalef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcalef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcalef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcale_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcaltQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcaltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcaltf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcaltf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcalt_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vacgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vceqq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vceqq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vceqq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vceqq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vceqq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vceqq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vceqq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vceqq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vceq_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vceq_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vceq_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vceq_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vceqs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vceqs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vceqs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vceq_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcequ16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcequ16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcequ16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vceq_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcequ32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcequ32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcequ32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vceq_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcequ8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcequ8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcequ8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vceq_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vceq\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgeq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcgeq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgeq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcgeq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcgeq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgeq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcgeq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcge_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcges16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcges16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcges16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcge_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcges32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcges32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcges32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcge_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcges8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcges8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcges8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcge_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcge_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcge_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgeu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgeu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcge_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgtq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcgtq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgtq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcgtq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcgtq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcgtq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcgtq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcgt_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgts16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgts16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgts16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcgt_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgts32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgts32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgts32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcgt_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgts8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgts8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgts8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcgt_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcgt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcgt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcgtu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcgtu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcgt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcleq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcleq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcleq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcleq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcleq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcleq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcleq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcle_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcles16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcles16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcles16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcle_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcles32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcles32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcles32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcle_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcles8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcles8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcles8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcle_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vcle_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vcle_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcleu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcleu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcleu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vcle_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcge\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclsQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclsQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vclsq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclsQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclsQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vclsq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclsQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclsQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vclsq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclss16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclss16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclss16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vcls_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclss32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclss32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclss32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vcls_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclss8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclss8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclss8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vcls_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcls\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcltq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcltq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcltq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcltq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vcltq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vcltq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vcltq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vclt_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclts16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclts16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclts16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vclt_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclts32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclts32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclts32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vclt_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclts8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclts8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclts8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vclt_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vclt_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vclt_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcltu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcltu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcltu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vclt_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcgt\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vclzq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vclzq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vclzq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vclzq_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vclzq_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzQu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vclzq_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vclz_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vclz_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vclz_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vclz_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vclz_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vclzu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vclzu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vclzu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vclz_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vclz\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcntQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcntQp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vcntq_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcntQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcntQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vcntq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcntQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcntQu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vcntq_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcntp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcntp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcntp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vcnt_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcnts8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcnts8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcnts8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vcnt_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcntu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcntu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcntu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vcnt_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcnt\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vcvtq_n_f32_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nf32_u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vcvtq_n_f32_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQ_ns32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vcvtq_n_s32_f32 (arg0_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQ_nu32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vcvtq_n_u32_f32 (arg0_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vcvtq_f32_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQf32_u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vcvtq_f32_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQs32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vcvtq_s32_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtQu32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vcvtq_u32_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vcvt_n_f32_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvt_nf32_u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vcvt_n_f32_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvt_ns32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vcvt_n_s32_f32 (arg0_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvt_nu32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vcvt_n_u32_f32 (arg0_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtf32_s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vcvt_f32_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtf32_u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vcvt_f32_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.f32.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvts32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vcvt_s32_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.s32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vcvtu32_f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vcvt_u32_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vcvt\.u32.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vdupq_lane_f32 (arg0_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vdupq_lane_p16 (arg0_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vdupq_lane_p8 (arg0_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vdupq_lane_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vdupq_lane_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vdupq_lane_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vdupq_lane_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vdupq_lane_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vdupq_lane_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_nf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vdupq_n_f32 (arg0_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_np16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vdupq_n_p16 (arg0_poly16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_np8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vdupq_n_p8 (arg0_poly8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vdupq_n_s16 (arg0_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vdupq_n_s32 (arg0_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vdupq_n_s8 (arg0_int8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vdupq_n_u16 (arg0_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vdupq_n_u32 (arg0_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdupQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vdupq_n_u8 (arg0_uint8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vdup_lane_f32 (arg0_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vdup_lane_p16 (arg0_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vdup_lane_p8 (arg0_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vdup_lane_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vdup_lane_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vdup_lane_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vdup_lane_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vdup_lane_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vdup_lane_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_nf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vdup_n_f32 (arg0_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_np16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vdup_n_p16 (arg0_poly16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_np8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vdup_n_p8 (arg0_poly8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vdup_n_s16 (arg0_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vdup_n_s32 (arg0_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vdup_n_s8 (arg0_int8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vdup_n_u16 (arg0_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vdup_n_u32 (arg0_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vdup_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vdup_n_u8 (arg0_uint8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = veorq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = veorq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = veorq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = veorq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = veorq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = veorq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = veorq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veorQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veorQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veorQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = veorq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veors16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veors16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veors16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = veor_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veors32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veors32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veors32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = veor_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veors8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veors8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veors8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = veor_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veoru16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veoru16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veoru16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = veor_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veoru32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veoru32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veoru32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = veor_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/veoru8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/veoru8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/veoru8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = veor_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "veor\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vextq_f32 (arg0_float32x4_t, arg1_float32x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8_t = vextq_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16_t = vextq_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vextq_s16 (arg0_int16x8_t, arg1_int16x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vextq_s32 (arg0_int32x4_t, arg1_int32x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vextq_s64 (arg0_int64x2_t, arg1_int64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vextq_s8 (arg0_int8x16_t, arg1_int8x16_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vextq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vextq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vextq_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vextq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vext_f32 (arg0_float32x2_t, arg1_float32x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4_t = vext_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vext_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vexts16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vexts16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vexts16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vext_s16 (arg0_int16x4_t, arg1_int16x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vexts32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vexts32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vexts32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vext_s32 (arg0_int32x2_t, arg1_int32x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vexts64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vexts64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vexts64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vext_s64 (arg0_int64x1_t, arg1_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vexts8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vexts8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vexts8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vext_s8 (arg0_int8x8_t, arg1_int8x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vext_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vext_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vext_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vextu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vextu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vextu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vext_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vext\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vfp-shift-a2t2.c	2010-08-20 13:27:11 +0000
+@@ -22,7 +22,7 @@
+     return vshll_n_u32(a, 32);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32_t = vgetq_lane_f32 (arg0_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16_t = vgetq_lane_p16 (arg0_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8_t = vgetq_lane_p8 (arg0_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16_t = vgetq_lane_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32_t = vgetq_lane_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64_t = vgetq_lane_s64 (arg0_int64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8_t = vgetq_lane_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16_t = vgetq_lane_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32_t = vgetq_lane_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64_t = vgetq_lane_u64 (arg0_uint64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[rR\]\[0-9\]+, \[rR\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vgetQ_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8_t = vgetq_lane_u8 (arg0_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32_t = vget_lane_f32 (arg0_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16_t = vget_lane_p16 (arg0_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8_t = vget_lane_p8 (arg0_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16_t = vget_lane_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.s16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32_t = vget_lane_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8_t = vget_lane_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.s8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16_t = vget_lane_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u16\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32_t = vget_lane_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8_t = vget_lane_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.u8\[ 	\]+\[rR\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vget_low_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowp16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vget_low_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vget_low_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lows16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lows16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vget_low_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lows32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lows32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vget_low_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lows8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lows8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vget_low_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vget_low_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vget_low_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vget_lowu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vget_low_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vhaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vhaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vhaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vhaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vhaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vhaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhadds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhadds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhadds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vhadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhadds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhadds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhadds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vhadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhadds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhadds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhadds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vhadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vhadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vhadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhaddu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhaddu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vhadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vhsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vhsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vhsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vhsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vhsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vhsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vhsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vhsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vhsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vhsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vhsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vhsubu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vhsubu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vhsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vhsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x4_t = vld1q_dup_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x8_t = vld1q_dup_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x16_t = vld1q_dup_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x8_t = vld1q_dup_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x4_t = vld1q_dup_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x2_t = vld1q_dup_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dups8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x16_t = vld1q_dup_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x8_t = vld1q_dup_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x4_t = vld1q_dup_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x2_t = vld1q_dup_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_dupu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x16_t = vld1q_dup_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vld1q_lane_f32 (0, arg1_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vld1q_lane_p16 (0, arg1_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vld1q_lane_p8 (0, arg1_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vld1q_lane_s16 (0, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vld1q_lane_s32 (0, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vld1q_lane_s64 (0, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vld1q_lane_s8 (0, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vld1q_lane_u16 (0, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vld1q_lane_u32 (0, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vld1q_lane_u64 (0, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Q_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vld1q_lane_u8 (0, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x4_t = vld1q_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x8_t = vld1q_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x16_t = vld1q_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x8_t = vld1q_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x4_t = vld1q_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x2_t = vld1q_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qs8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x16_t = vld1q_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x8_t = vld1q_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x4_t = vld1q_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x2_t = vld1q_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1Qu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x16_t = vld1q_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2_t = vld1_dup_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4_t = vld1_dup_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8_t = vld1_dup_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4_t = vld1_dup_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2_t = vld1_dup_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1_t = vld1_dup_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dups8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8_t = vld1_dup_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4_t = vld1_dup_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2_t = vld1_dup_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1_t = vld1_dup_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_dupu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8_t = vld1_dup_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\\\]\\\})|(\[dD\]\[0-9\]+\\\[\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vld1_lane_f32 (0, arg1_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vld1_lane_p16 (0, arg1_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vld1_lane_p8 (0, arg1_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vld1_lane_s16 (0, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vld1_lane_s32 (0, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vld1_lane_s64 (0, arg1_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vld1_lane_s8 (0, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vld1_lane_u16 (0, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vld1_lane_u32 (0, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vld1_lane_u64 (0, arg1_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vld1_lane_u8 (0, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1f32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2_t = vld1_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1p16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4_t = vld1_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1p8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8_t = vld1_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1s16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4_t = vld1_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1s32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2_t = vld1_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1s64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1_t = vld1_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1s8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8_t = vld1_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1u16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4_t = vld1_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1u32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2_t = vld1_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1u64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1_t = vld1_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld1u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld1u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld1u8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8_t = vld1_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4x2_t = vld2q_lane_f32 (0, arg1_float32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8x2_t = vld2q_lane_p16 (0, arg1_poly16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8x2_t = vld2q_lane_s16 (0, arg1_int16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4x2_t = vld2q_lane_s32 (0, arg1_int32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8x2_t = vld2q_lane_u16 (0, arg1_uint16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4x2_t = vld2q_lane_u32 (0, arg1_uint32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qf32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_float32x4x2_t = vld2q_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly16x8x2_t = vld2q_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qp8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly8x16x2_t = vld2q_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int16x8x2_t = vld2q_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int32x4x2_t = vld2q_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qs8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int8x16x2_t = vld2q_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint16x8x2_t = vld2q_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint32x4x2_t = vld2q_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2Qu8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint8x16x2_t = vld2q_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x2_t = vld2_dup_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x2_t = vld2_dup_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x2_t = vld2_dup_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x2_t = vld2_dup_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x2_t = vld2_dup_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x2_t = vld2_dup_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dups8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x2_t = vld2_dup_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x2_t = vld2_dup_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x2_t = vld2_dup_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x2_t = vld2_dup_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_dupu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x2_t = vld2_dup_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2x2_t = vld2_lane_f32 (0, arg1_float32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4x2_t = vld2_lane_p16 (0, arg1_poly16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8x2_t = vld2_lane_p8 (0, arg1_poly8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4x2_t = vld2_lane_s16 (0, arg1_int16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2x2_t = vld2_lane_s32 (0, arg1_int32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8x2_t = vld2_lane_s8 (0, arg1_int8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4x2_t = vld2_lane_u16 (0, arg1_uint16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2x2_t = vld2_lane_u32 (0, arg1_uint32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8x2_t = vld2_lane_u8 (0, arg1_uint8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2f32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x2_t = vld2_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2p16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x2_t = vld2_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2p8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x2_t = vld2_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2s16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x2_t = vld2_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2s32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x2_t = vld2_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2s64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x2_t = vld2_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2s8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x2_t = vld2_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2u16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x2_t = vld2_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2u32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x2_t = vld2_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2u64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x2_t = vld2_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld2u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld2u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld2u8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x2_t = vld2_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4x3_t = vld3q_lane_f32 (0, arg1_float32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8x3_t = vld3q_lane_p16 (0, arg1_poly16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8x3_t = vld3q_lane_s16 (0, arg1_int16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4x3_t = vld3q_lane_s32 (0, arg1_int32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8x3_t = vld3q_lane_u16 (0, arg1_uint16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4x3_t = vld3q_lane_u32 (0, arg1_uint32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qf32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_float32x4x3_t = vld3q_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly16x8x3_t = vld3q_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qp8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly8x16x3_t = vld3q_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int16x8x3_t = vld3q_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int32x4x3_t = vld3q_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qs8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int8x16x3_t = vld3q_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint16x8x3_t = vld3q_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint32x4x3_t = vld3q_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3Qu8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint8x16x3_t = vld3q_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x3_t = vld3_dup_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x3_t = vld3_dup_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x3_t = vld3_dup_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x3_t = vld3_dup_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x3_t = vld3_dup_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x3_t = vld3_dup_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dups8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x3_t = vld3_dup_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x3_t = vld3_dup_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x3_t = vld3_dup_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x3_t = vld3_dup_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_dupu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x3_t = vld3_dup_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2x3_t = vld3_lane_f32 (0, arg1_float32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4x3_t = vld3_lane_p16 (0, arg1_poly16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8x3_t = vld3_lane_p8 (0, arg1_poly8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4x3_t = vld3_lane_s16 (0, arg1_int16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2x3_t = vld3_lane_s32 (0, arg1_int32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8x3_t = vld3_lane_s8 (0, arg1_int8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4x3_t = vld3_lane_u16 (0, arg1_uint16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2x3_t = vld3_lane_u32 (0, arg1_uint32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8x3_t = vld3_lane_u8 (0, arg1_uint8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3f32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x3_t = vld3_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3p16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x3_t = vld3_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3p8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x3_t = vld3_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3s16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x3_t = vld3_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3s32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x3_t = vld3_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3s64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x3_t = vld3_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3s8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x3_t = vld3_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3u16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x3_t = vld3_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3u32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x3_t = vld3_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3u64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x3_t = vld3_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld3u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld3u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld3u8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x3_t = vld3_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4x4_t = vld4q_lane_f32 (0, arg1_float32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8x4_t = vld4q_lane_p16 (0, arg1_poly16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8x4_t = vld4q_lane_s16 (0, arg1_int16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4x4_t = vld4q_lane_s32 (0, arg1_int32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8x4_t = vld4q_lane_u16 (0, arg1_uint16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4x4_t = vld4q_lane_u32 (0, arg1_uint32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qf32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_float32x4x4_t = vld4q_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly16x8x4_t = vld4q_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qp8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_poly8x16x4_t = vld4q_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int16x8x4_t = vld4q_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int32x4x4_t = vld4q_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qs8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_int8x16x4_t = vld4q_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu16.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint16x8x4_t = vld4q_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu32.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint32x4x4_t = vld4q_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4Qu8.c	2010-08-20 13:27:11 +0000
+@@ -15,6 +15,6 @@
+   out_uint8x16x4_t = vld4q_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupf32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x4_t = vld4_dup_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x4_t = vld4_dup_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupp8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x4_t = vld4_dup_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x4_t = vld4_dup_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x4_t = vld4_dup_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x4_t = vld4_dup_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dups8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x4_t = vld4_dup_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x4_t = vld4_dup_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x4_t = vld4_dup_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x4_t = vld4_dup_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_dupu8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x4_t = vld4_dup_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\\\]-\[dD\]\[0-9\]+\\\[\\\])|(\[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\], \[dD\]\[0-9\]+\\\[\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2x4_t = vld4_lane_f32 (0, arg1_float32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4x4_t = vld4_lane_p16 (0, arg1_poly16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8x4_t = vld4_lane_p8 (0, arg1_poly8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4x4_t = vld4_lane_s16 (0, arg1_int16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2x4_t = vld4_lane_s32 (0, arg1_int32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8x4_t = vld4_lane_s8 (0, arg1_int8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4x4_t = vld4_lane_u16 (0, arg1_uint16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2x4_t = vld4_lane_u32 (0, arg1_uint32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8x4_t = vld4_lane_u8 (0, arg1_uint8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4f32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_float32x2x4_t = vld4_f32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4p16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly16x4x4_t = vld4_p16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4p8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_poly8x8x4_t = vld4_p8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4s16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int16x4x4_t = vld4_s16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4s32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int32x2x4_t = vld4_s32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4s64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int64x1x4_t = vld4_s64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4s8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_int8x8x4_t = vld4_s8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4u16.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint16x4x4_t = vld4_u16 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4u32.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint32x2x4_t = vld4_u32 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4u64.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint64x1x4_t = vld4_u64 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vld4u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vld4u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vld4u8.c	2010-08-20 13:27:11 +0000
+@@ -15,5 +15,5 @@
+   out_uint8x8x4_t = vld4_u8 (0);
+ }
+ 
+-/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vld4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vmaxq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vmaxq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmaxq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vmaxq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vmaxq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmaxq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vmaxq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmaxu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmaxu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vminq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vminq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vminq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vminq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vminq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vminq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vminq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmins16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmins16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmins16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmins32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmins32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmins32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmins8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmins8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmins8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vminu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vminu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vminu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlaq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlaq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlaq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlaq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlaq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlaq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlaq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlaq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlaq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlaq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlaq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQs16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlaq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQs32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlaq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQs8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x16_t = vmlaq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlaq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlaq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaQu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x16_t = vmlaq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmla_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmla_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmla_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmla_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmla_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_nf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmla_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmla_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmla_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmla_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmla_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmla_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlaf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlaf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmla_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlal_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlal_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlal_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlal_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlal_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlals16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlals16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlals16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlals32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlals32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlals32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlals8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlals8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlals8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlal_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlalu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlalu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlal_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlalu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlalu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlal_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlalu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlalu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlal_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlas16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlas16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlas16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmla_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlas32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlas32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlas32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmla_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlas8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlas8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlas8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vmla_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlau16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlau16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlau16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmla_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlau32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlau32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlau32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmla_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlau8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlau8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlau8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vmla_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmla\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlsq_lane_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlsq_lane_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsq_lane_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlsq_lane_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsq_lane_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlsq_n_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlsq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlsq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x4_t = vmlsq_f32 (arg0_float32x4_t, arg1_float32x4_t, arg2_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQs16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlsq_s16 (arg0_int16x8_t, arg1_int16x8_t, arg2_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQs32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsq_s32 (arg0_int32x4_t, arg1_int32x4_t, arg2_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQs8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x16_t = vmlsq_s8 (arg0_int8x16_t, arg1_int8x16_t, arg2_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlsq_u16 (arg0_uint16x8_t, arg1_uint16x8_t, arg2_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsq_u32 (arg0_uint32x4_t, arg1_uint32x4_t, arg2_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsQu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x16_t = vmlsq_u8 (arg0_uint8x16_t, arg1_uint8x16_t, arg2_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmls_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmls_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmls_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmls_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmls_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_nf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmls_n_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmls_n_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmls_n_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmls_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmls_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmls_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsf32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_float32x2_t = vmls_f32 (arg0_float32x2_t, arg1_float32x2_t, arg2_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsl_lane_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlsl_lane_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsl_n_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsl_nu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlsl_n_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsls16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsls32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsls8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x8_t = vmlsl_s8 (arg0_int16x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlslu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlslu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x4_t = vmlsl_u16 (arg0_uint32x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlslu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlslu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint64x2_t = vmlsl_u32 (arg0_uint64x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlslu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlslu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x8_t = vmlsl_u8 (arg0_uint16x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmlsl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmlsl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlss16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlss16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlss16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int16x4_t = vmls_s16 (arg0_int16x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlss32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlss32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlss32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x2_t = vmls_s32 (arg0_int32x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlss8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlss8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlss8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vmls_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsu16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint16x4_t = vmls_u16 (arg0_uint16x4_t, arg1_uint16x4_t, arg2_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsu32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint32x2_t = vmls_u32 (arg0_uint32x2_t, arg1_uint32x2_t, arg2_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmlsu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmlsu8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vmls_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmls\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_nf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vmovq_n_f32 (arg0_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_np16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vmovq_n_p16 (arg0_poly16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_np8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vmovq_n_p8 (arg0_poly8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vmovq_n_s16 (arg0_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vmovq_n_s32 (arg0_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vmovq_n_s8 (arg0_int8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vmovq_n_u16 (arg0_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vmovq_n_u32 (arg0_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vmovq_n_u8 (arg0_uint8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[qQ\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_nf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vmov_n_f32 (arg0_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_np16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vmov_n_p16 (arg0_poly16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_np8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vmov_n_p8 (arg0_poly8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vmov_n_s16 (arg0_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vmov_n_s32 (arg0_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vmov_n_s8 (arg0_int8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vmov_n_u16 (arg0_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.16\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vmov_n_u32 (arg0_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.32\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmov_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vmov_n_u8 (arg0_uint8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vdup\.8\[ 	\]+\[dD\]\[0-9\]+, (\[rR\]\[0-9\]+|\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovls16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vmovl_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovls32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vmovl_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovls8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vmovl_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovlu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vmovl_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovlu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vmovl_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovlu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vmovl_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vmovn_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vmovn_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vmovn_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovnu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vmovn_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovnu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vmovn_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmovnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmovnu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vmovn_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmovn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vmulq_lane_f32 (arg0_float32x4_t, arg1_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vmulq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmulq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vmulq_lane_u16 (arg0_uint16x8_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmulq_lane_u32 (arg0_uint32x4_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_nf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vmulq_n_f32 (arg0_float32x4_t, arg1_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vmulq_n_s16 (arg0_int16x8_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmulq_n_s32 (arg0_int32x4_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vmulq_n_u16 (arg0_uint16x8_t, arg1_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmulq_n_u32 (arg0_uint32x4_t, arg1_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vmulq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16_t = vmulq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vmulq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmulq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vmulq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vmulq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmulq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vmulq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vmul_lane_f32 (arg0_float32x2_t, arg1_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vmul_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vmul_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vmul_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vmul_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_nf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vmul_n_f32 (arg0_float32x2_t, arg1_float32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vmul_n_s16 (arg0_int16x4_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vmul_n_s32 (arg0_int32x2_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vmul_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmul_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vmul_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vmul_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmull_lane_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vmull_lane_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmull_n_u16 (arg0_uint16x4_t, arg1_uint16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmull_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vmull_n_u32 (arg0_uint32x2_t, arg1_uint32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmullp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmullp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmullp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8_t = vmull_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.p8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vmull_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmullu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmullu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmullu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vmull_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmullu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmullu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmullu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vmull_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmullu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmullu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmullu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vmull_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmull\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmull\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vmul_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.p8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmuls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmuls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmuls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vmul_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmuls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmuls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmuls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vmul_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmuls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmuls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmuls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vmul_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vmul_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vmul_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmulu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmulu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmulu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vmul_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmul\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vmvnq_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vmvnq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vmvnq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vmvnq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vmvnq_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vmvnq_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnQu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vmvnq_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vmvn_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vmvn_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vmvn_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vmvn_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vmvn_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vmvn_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vmvnu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vmvnu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vmvn_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmvn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegQf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vnegq_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vnegq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vnegq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vnegq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vneg_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vneg_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vneg_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vnegs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vnegs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vnegs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vneg_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vornq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vornq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vornq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vornq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vornq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vornq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vornq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vornq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vorn_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vorn_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vorn_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vorn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vorn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vornu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vornu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vornu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vorn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorn\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vorrq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vorrq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vorrq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vorrq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vorrq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vorrq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vorrq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vorrq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vorr_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vorr_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorrs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorrs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorrs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vorr_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorru16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorru16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorru16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vorr_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorru32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorru32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorru32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vorr_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vorru8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vorru8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vorru8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vorr_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vorr\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vpadalq_s16 (arg0_int32x4_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vpadalq_s32 (arg0_int64x2_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vpadalq_s8 (arg0_int16x8_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vpadalq_u16 (arg0_uint32x4_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vpadalq_u32 (arg0_uint64x2_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vpadalq_u8 (arg0_uint16x8_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadals16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadals16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadals16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vpadal_s16 (arg0_int32x2_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadals32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadals32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadals32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vpadal_s32 (arg0_int64x1_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadals8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadals8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadals8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vpadal_s8 (arg0_int16x4_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vpadal_u16 (arg0_uint32x2_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vpadal_u32 (arg0_uint64x1_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadalu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadalu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vpadal_u8 (arg0_uint16x4_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadal\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vpadd_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vpaddlq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vpaddlq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vpaddlq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vpaddlq_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vpaddlq_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlQu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vpaddlq_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddls16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vpaddl_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddls32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vpaddl_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddls8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vpaddl_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vpaddl_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vpaddl_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddlu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vpaddl_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpaddl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vpadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vpadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpadds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpadds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpadds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vpadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vpadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vpadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpaddu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpaddu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vpadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpadd\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vpmax_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vpmax_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vpmax_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vpmax_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vpmax_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vpmax_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmaxu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vpmax_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmax\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpminf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpminf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpminf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vpmin_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmins16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmins16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmins16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vpmin_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmins32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmins32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmins32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vpmin_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpmins8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpmins8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpmins8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vpmin_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpminu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpminu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpminu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vpmin_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpminu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpminu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpminu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vpmin_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vpminu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vpminu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vpminu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vpmin_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vpmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vpmin\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqrdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqrdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqrdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqrdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqrdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqrdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqrdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqrdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqrdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulh_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqrdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqrdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRdmulhs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqrdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqrshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqrshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqrshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vqrshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vqrshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vqrshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vqrshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vqrshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqrshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqrshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshls64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshls64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vqrshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vqrshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vqrshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vqrshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vqrshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vqrshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqrshrn_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqrshrn_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqrshrn_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqrshrn_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqrshrn_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrn_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqrshrn_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqrshrun_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqrshrun_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqRshrun_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqrshrun_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqrshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqrshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabsQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vqabsq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabsQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vqabsq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabsQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vqabsq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabss16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabss16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabss16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqabs_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabss32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabss32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabss32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqabs_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqabss8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqabss8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqabss8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqabs_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqabs\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqaddq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqaddq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqaddq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vqaddq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vqaddq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vqaddq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vqaddq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vqaddq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqadds16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqadds16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqadds16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqadd_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqadds32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqadds32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqadds32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqadd_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqadds64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqadds64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqadds64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vqadd_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqadds8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqadds8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqadds8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vqadd_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vqadd_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vqadd_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vqadd_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqaddu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqaddu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vqadd_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqadd\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlal_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlal_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlal_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlal_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlal_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlal_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlals16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlal_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlals32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlal_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlal\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlsl_lane_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlsl_lane_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlsl_n_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsl_ns32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlsl_n_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsls16.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int32x4_t = vqdmlsl_s16 (arg0_int32x4_t, arg1_int16x4_t, arg2_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmlsls32.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int64x2_t = vqdmlsl_s32 (arg0_int64x2_t, arg1_int32x2_t, arg2_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmlsl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqdmulhq_lane_s16 (arg0_int16x8_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmulhq_lane_s32 (arg0_int32x4_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqdmulhq_n_s16 (arg0_int16x8_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmulhq_n_s32 (arg0_int32x4_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqdmulhq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmulhq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqdmulh_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulh_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqdmulh_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqdmulh_n_s16 (arg0_int16x4_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulh_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqdmulh_n_s32 (arg0_int32x2_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqdmulh_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulhs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqdmulh_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmulh\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmull_lane_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmull_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqdmull_lane_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmull_n_s16 (arg0_int16x4_t, arg1_int16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmull_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqdmull_n_s32 (arg0_int32x2_t, arg1_int32_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqdmull_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqdmulls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqdmull_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqdmull\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqmovn_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqmovn_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqmovn_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovnu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqmovn_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovnu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqmovn_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovnu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqmovn_u64 (arg0_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovuns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqmovun_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovuns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqmovun_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqmovuns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqmovun_s64 (arg0_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqmovun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqmovun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegQs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vqnegq_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegQs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vqnegq_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegQs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vqnegq_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqneg_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqneg_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqnegs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqnegs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqneg_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqneg\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vqshlq_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vqshlq_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vqshlq_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vqshlq_n_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vqshlq_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vqshlq_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vqshlq_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vqshlq_n_u8 (arg0_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vqshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vqshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vqshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vqshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vqshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqshl_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqshl_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vqshl_n_s64 (arg0_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqshl_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqshl_n_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqshl_n_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vqshl_n_u64 (arg0_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshl_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqshl_n_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshls64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshls64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshls64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vqshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vqshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vqshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vqshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vqshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vqshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vqshluq_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vqshluq_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vqshluq_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshluQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vqshluq_n_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqshlu_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqshlu_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vqshlu_n_s64 (arg0_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshlu_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqshlu_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshlu\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vqshrn_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vqshrn_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vqshrn_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqshrn_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.u16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqshrn_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.u32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrn_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqshrn_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrn\.u64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vqshrun_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrun\.s16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vqshrun_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrun\.s32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqshrun_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vqshrun_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vqshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqshrun\.s64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vqsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vqsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vqsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vqsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vqsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vqsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vqsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vqsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vqsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vqsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vqsub_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vqsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vqsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vqsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vqsub_u64 (arg0_uint64x1_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vqsubu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vqsubu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vqsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vqsub\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpeQf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vrecpeq_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpeQu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vrecpeq_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vrecpe_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecpe\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpeu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vrecpe_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecpe\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpsQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vrecpsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrecpsf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vrecps_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrecps\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vrev16q_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vrev16q_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vrev16q_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vrev16_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vrev16_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev16u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev16u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vrev16_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev16\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vrev32q_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vrev32q_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vrev32q_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vrev32q_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vrev32q_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vrev32q_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vrev32_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vrev32_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vrev32_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vrev32_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vrev32_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev32u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev32u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vrev32_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev32\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vrev64q_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x8_t = vrev64q_p16 (arg0_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x16_t = vrev64q_p8 (arg0_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vrev64q_s16 (arg0_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vrev64q_s32 (arg0_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vrev64q_s8 (arg0_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vrev64q_u16 (arg0_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vrev64q_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vrev64q_u8 (arg0_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vrev64_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly16x4_t = vrev64_p16 (arg0_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_poly8x8_t = vrev64_p8 (arg0_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vrev64_s16 (arg0_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vrev64_s32 (arg0_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vrev64_s8 (arg0_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vrev64_u16 (arg0_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vrev64_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrev64u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrev64u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vrev64_u8 (arg0_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrev64\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrteQf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x4_t = vrsqrteq_f32 (arg0_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrteQu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vrsqrteq_u32 (arg0_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrtef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_float32x2_t = vrsqrte_f32 (arg0_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrte\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrteu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vrsqrte_u32 (arg0_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrte\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrtsQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vrsqrtsq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vrsqrtsf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vrsqrts_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vrsqrts\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vsetq_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8_t = vsetq_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16_t = vsetq_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsetq_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsetq_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsetq_lane_s64 (arg0_int64_t, arg1_int64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vsetq_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsetq_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsetq_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsetq_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\[ 	\]+\[dD\]\[0-9\]+, \[rR\]\[0-9\]+, \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsetQ_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vsetq_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vset_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4_t = vset_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vset_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vset_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vset_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vset_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vset_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.16\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vset_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.32\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vset_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vset_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vmov\.8\[ 	\]+\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[rR\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vshlq_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vshlq_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vshlq_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vshlq_n_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vshlq_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vshlq_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vshlq_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vshlq_n_u8 (arg0_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vshlq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vshlq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vshlq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vshlq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vshlq_u16 (arg0_uint16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vshlq_u32 (arg0_uint32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vshlq_u64 (arg0_uint64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vshlq_u8 (arg0_uint8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vshl_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vshl_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vshl_n_s64 (arg0_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vshl_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vshl_n_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vshl_n_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vshl_n_u64 (arg0_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshl_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vshl_n_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vshll_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vshll_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vshll_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vshll_n_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vshll_n_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshll_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vshll_n_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshll\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vshl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vshl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshls64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshls64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshls64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vshl_s64 (arg0_int64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vshl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vshl_u16 (arg0_uint16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vshl_u32 (arg0_uint32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vshl_u64 (arg0_uint64x1_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshlu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshlu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshlu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vshl_u8 (arg0_uint8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshl\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x8_t = vshrq_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x4_t = vshrq_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x2_t = vshrq_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x16_t = vshrq_n_s8 (arg0_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x8_t = vshrq_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x4_t = vshrq_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x2_t = vshrq_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x16_t = vshrq_n_u8 (arg0_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vshr_n_s16 (arg0_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vshr_n_s32 (arg0_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int64x1_t = vshr_n_s64 (arg0_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_ns8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vshr_n_s8 (arg0_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vshr_n_u16 (arg0_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vshr_n_u32 (arg0_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint64x1_t = vshr_n_u64 (arg0_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshr_nu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vshr_n_u8 (arg0_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshr\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_ns16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int8x8_t = vshrn_n_s16 (arg0_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_ns32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int16x4_t = vshrn_n_s32 (arg0_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_ns64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_int32x2_t = vshrn_n_s64 (arg0_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_nu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint8x8_t = vshrn_n_u16 (arg0_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_nu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint16x4_t = vshrn_n_u32 (arg0_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vshrn_nu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   out_uint32x2_t = vshrn_n_u64 (arg0_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vshrn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_np16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8_t = vsliq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_np8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16_t = vsliq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsliq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsliq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsliq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vsliq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsliq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsliq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsliq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsliQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vsliq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_np16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4_t = vsli_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_np8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vsli_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vsli_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vsli_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vsli_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vsli_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vsli_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vsli_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vsli_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsli_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vsli_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsli\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsraq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsraq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsraq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vsraq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsraq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsraq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsraq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsraQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vsraq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vsra_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vsra_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vsra_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vsra_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.s8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vsra_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vsra_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vsra_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsra_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vsra_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsra\.u8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_np16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8_t = vsriq_n_p16 (arg0_poly16x8_t, arg1_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_np8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16_t = vsriq_n_p8 (arg0_poly8x16_t, arg1_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsriq_n_s16 (arg0_int16x8_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsriq_n_s32 (arg0_int32x4_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsriq_n_s64 (arg0_int64x2_t, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vsriq_n_s8 (arg0_int8x16_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsriq_n_u16 (arg0_uint16x8_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsriq_n_u32 (arg0_uint32x4_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsriq_n_u64 (arg0_uint64x2_t, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsriQ_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vsriq_n_u8 (arg0_uint8x16_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_np16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_np16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4_t = vsri_n_p16 (arg0_poly16x4_t, arg1_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_np8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_np8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vsri_n_p8 (arg0_poly8x8_t, arg1_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_ns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vsri_n_s16 (arg0_int16x4_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_ns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vsri_n_s32 (arg0_int32x2_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_ns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x1_t = vsri_n_s64 (arg0_int64x1_t, arg1_int64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_ns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vsri_n_s8 (arg0_int8x8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_nu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vsri_n_u16 (arg0_uint16x4_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_nu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vsri_n_u32 (arg0_uint32x2_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_nu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x1_t = vsri_n_u64 (arg0_uint64x1_t, arg1_uint64x1_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.64\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsri_nu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vsri_n_u8 (arg0_uint8x8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsri\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, #\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_f32 (arg0_float32_t, arg1_float32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_p16 (arg0_poly16_t, arg1_poly16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_p8 (arg0_poly8_t, arg1_poly8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_s16 (arg0_int16_t, arg1_int16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_s32 (arg0_int32_t, arg1_int32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_s64 (arg0_int64_t, arg1_int64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_s8 (arg0_int8_t, arg1_int8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_u16 (arg0_uint16_t, arg1_uint16x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_u32 (arg0_uint32_t, arg1_uint32x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_u64 (arg0_uint64_t, arg1_uint64x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Q_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_lane_u8 (arg0_uint8_t, arg1_uint8x16_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qf32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_f32 (arg0_float32_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_p16 (arg0_poly16_t, arg1_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_p8 (arg0_poly8_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_s16 (arg0_int16_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_s32 (arg0_int32_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_s64 (arg0_int64_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_s8 (arg0_int8_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_u16 (arg0_uint16_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_u32 (arg0_uint32_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_u64 (arg0_uint64_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1q_u8 (arg0_uint8_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_f32 (arg0_float32_t, arg1_float32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_p16 (arg0_poly16_t, arg1_poly16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_p8 (arg0_poly8_t, arg1_poly8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_s16 (arg0_int16_t, arg1_int16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_s32 (arg0_int32_t, arg1_int32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_s64 (arg0_int64_t, arg1_int64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_s8 (arg0_int8_t, arg1_int8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_u16 (arg0_uint16_t, arg1_uint16x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_u32 (arg0_uint32_t, arg1_uint32x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_u64 (arg0_uint64_t, arg1_uint64x1_t, 0);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_lane_u8 (arg0_uint8_t, arg1_uint8x8_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]\\\})|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_f32 (arg0_float32_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_p16 (arg0_poly16_t, arg1_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_p8 (arg0_poly8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_s16 (arg0_int16_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_s32 (arg0_int32_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1s64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_s64 (arg0_int64_t, arg1_int64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_s8 (arg0_int8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_u16 (arg0_uint16_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.16\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_u32 (arg0_uint32_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.32\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1u64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_u64 (arg0_uint64_t, arg1_uint64x1_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst1u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst1u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst1u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst1_u8 (arg0_uint8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.8\[ 	\]+((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_f32 (arg0_float32_t, arg1_float32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_p16 (arg0_poly16_t, arg1_poly16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_s16 (arg0_int16_t, arg1_int16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_s32 (arg0_int32_t, arg1_int32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_u16 (arg0_uint16_t, arg1_uint16x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2q_lane_u32 (arg0_uint32_t, arg1_uint32x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qf32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_f32 (arg0_float32_t, arg1_float32x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_p16 (arg0_poly16_t, arg1_poly16x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_p8 (arg0_poly8_t, arg1_poly8x16x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_s16 (arg0_int16_t, arg1_int16x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_s32 (arg0_int32_t, arg1_int32x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_s8 (arg0_int8_t, arg1_int8x16x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_u16 (arg0_uint16_t, arg1_uint16x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_u32 (arg0_uint32_t, arg1_uint32x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst2q_u8 (arg0_uint8_t, arg1_uint8x16x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_f32 (arg0_float32_t, arg1_float32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_p16 (arg0_poly16_t, arg1_poly16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_p8 (arg0_poly8_t, arg1_poly8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_s16 (arg0_int16_t, arg1_int16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_s32 (arg0_int32_t, arg1_int32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_s8 (arg0_int8_t, arg1_int8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_u16 (arg0_uint16_t, arg1_uint16x4x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_u32 (arg0_uint32_t, arg1_uint32x2x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_lane_u8 (arg0_uint8_t, arg1_uint8x8x2_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_f32 (arg0_float32_t, arg1_float32x2x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_p16 (arg0_poly16_t, arg1_poly16x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_p8 (arg0_poly8_t, arg1_poly8x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_s16 (arg0_int16_t, arg1_int16x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_s32 (arg0_int32_t, arg1_int32x2x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2s64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_s64 (arg0_int64_t, arg1_int64x1x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_s8 (arg0_int8_t, arg1_int8x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_u16 (arg0_uint16_t, arg1_uint16x4x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_u32 (arg0_uint32_t, arg1_uint32x2x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2u64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_u64 (arg0_uint64_t, arg1_uint64x1x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst2u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst2u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst2u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst2_u8 (arg0_uint8_t, arg1_uint8x8x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst2\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_f32 (arg0_float32_t, arg1_float32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_p16 (arg0_poly16_t, arg1_poly16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_s16 (arg0_int16_t, arg1_int16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_s32 (arg0_int32_t, arg1_int32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_u16 (arg0_uint16_t, arg1_uint16x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3q_lane_u32 (arg0_uint32_t, arg1_uint32x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qf32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_f32 (arg0_float32_t, arg1_float32x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_p16 (arg0_poly16_t, arg1_poly16x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_p8 (arg0_poly8_t, arg1_poly8x16x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_s16 (arg0_int16_t, arg1_int16x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_s32 (arg0_int32_t, arg1_int32x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_s8 (arg0_int8_t, arg1_int8x16x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_u16 (arg0_uint16_t, arg1_uint16x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_u32 (arg0_uint32_t, arg1_uint32x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst3q_u8 (arg0_uint8_t, arg1_uint8x16x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_f32 (arg0_float32_t, arg1_float32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_p16 (arg0_poly16_t, arg1_poly16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_p8 (arg0_poly8_t, arg1_poly8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_s16 (arg0_int16_t, arg1_int16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_s32 (arg0_int32_t, arg1_int32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_s8 (arg0_int8_t, arg1_int8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_u16 (arg0_uint16_t, arg1_uint16x4x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_u32 (arg0_uint32_t, arg1_uint32x2x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_lane_u8 (arg0_uint8_t, arg1_uint8x8x3_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_f32 (arg0_float32_t, arg1_float32x2x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_p16 (arg0_poly16_t, arg1_poly16x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_p8 (arg0_poly8_t, arg1_poly8x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_s16 (arg0_int16_t, arg1_int16x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_s32 (arg0_int32_t, arg1_int32x2x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3s64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_s64 (arg0_int64_t, arg1_int64x1x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_s8 (arg0_int8_t, arg1_int8x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_u16 (arg0_uint16_t, arg1_uint16x4x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_u32 (arg0_uint32_t, arg1_uint32x2x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3u64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_u64 (arg0_uint64_t, arg1_uint64x1x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst3u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst3u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst3u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst3_u8 (arg0_uint8_t, arg1_uint8x8x3_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst3\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_f32 (arg0_float32_t, arg1_float32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_p16 (arg0_poly16_t, arg1_poly16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_s16 (arg0_int16_t, arg1_int16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_s32 (arg0_int32_t, arg1_int32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_u16 (arg0_uint16_t, arg1_uint16x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Q_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4q_lane_u32 (arg0_uint32_t, arg1_uint32x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qf32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_f32 (arg0_float32_t, arg1_float32x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_p16 (arg0_poly16_t, arg1_poly16x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qp8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_p8 (arg0_poly8_t, arg1_poly8x16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_s16 (arg0_int16_t, arg1_int16x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_s32 (arg0_int32_t, arg1_int32x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qs8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_s8 (arg0_int8_t, arg1_int8x16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu16.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_u16 (arg0_uint16_t, arg1_uint16x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu32.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_u32 (arg0_uint32_t, arg1_uint32x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4Qu8.c	2010-08-20 13:27:11 +0000
+@@ -16,6 +16,6 @@
+   vst4q_u8 (arg0_uint8_t, arg1_uint8x16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanef32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_f32 (arg0_float32_t, arg1_float32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_p16 (arg0_poly16_t, arg1_poly16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanep8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_p8 (arg0_poly8_t, arg1_poly8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_s16 (arg0_int16_t, arg1_int16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_s32 (arg0_int32_t, arg1_int32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_lanes8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_s8 (arg0_int8_t, arg1_int8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_u16 (arg0_uint16_t, arg1_uint16x4x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_u32 (arg0_uint32_t, arg1_uint32x2x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4_laneu8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_lane_u8 (arg0_uint8_t, arg1_uint8x8x4_t, 1);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+\\\[\[0-9\]+\\\]-\[dD\]\[0-9\]+\\\[\[0-9\]+\\\])|(\[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\], \[dD\]\[0-9\]+\\\[\[0-9\]+\\\]))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4f32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4f32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4f32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_f32 (arg0_float32_t, arg1_float32x2x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4p16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4p16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_p16 (arg0_poly16_t, arg1_poly16x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4p8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_p8 (arg0_poly8_t, arg1_poly8x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4s16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4s16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_s16 (arg0_int16_t, arg1_int16x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4s32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4s32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_s32 (arg0_int32_t, arg1_int32x2x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4s64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4s64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_s64 (arg0_int64_t, arg1_int64x1x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4s8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_s8 (arg0_int8_t, arg1_int8x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4u16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4u16.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_u16 (arg0_uint16_t, arg1_uint16x4x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.16\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4u32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4u32.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_u32 (arg0_uint32_t, arg1_uint32x2x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.32\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4u64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4u64.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_u64 (arg0_uint64_t, arg1_uint64x1x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst1\.64\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vst4u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vst4u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vst4u8.c	2010-08-20 13:27:11 +0000
+@@ -16,5 +16,5 @@
+   vst4_u8 (arg0_uint8_t, arg1_uint8x8x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vst4\.8\[ 	\]+\\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \\\[\[rR\]\[0-9\]+\\\]!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4_t = vsubq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsubq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsubq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQs64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQs64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsubq_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16_t = vsubq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsubq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsubq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsubq_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i64\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vsubq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2_t = vsub_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.f32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vsubhn_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vsubhn_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhns64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhns64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vsubhn_s64 (arg0_int64x2_t, arg1_int64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhnu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vsubhn_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i16\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhnu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vsubhn_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i32\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubhnu64.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vsubhn_u64 (arg0_uint64x2_t, arg1_uint64x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubhn\.i64\[ 	\]+\[dD\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubls16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubls16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubls16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsubl_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubls32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubls32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubls32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsubl_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubls8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubls8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubls8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsubl_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsublu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsublu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsublu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsubl_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsublu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsublu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsublu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsubl_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsublu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsublu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsublu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsubl_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubl\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4_t = vsub_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2_t = vsub_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vsub_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vsub_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vsub_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vsub_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsub\.i8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubws16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubws16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubws16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4_t = vsubw_s16 (arg0_int32x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.s16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubws32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubws32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubws32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int64x2_t = vsubw_s32 (arg0_int64x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.s32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubws8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubws8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubws8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8_t = vsubw_s8 (arg0_int16x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.s8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubwu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubwu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vsubw_u16 (arg0_uint32x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.u16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubwu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubwu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint64x2_t = vsubw_u32 (arg0_uint64x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.u32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vsubwu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vsubwu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vsubw_u8 (arg0_uint16x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vsubw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vsubw\.u8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl1p8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vtbl1_p8 (arg0_poly8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl1s8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vtbl1_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl1u8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtbl1_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl2p8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vtbl2_p8 (arg0_poly8x8x2_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl2s8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vtbl2_s8 (arg0_int8x8x2_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl2u8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtbl2_u8 (arg0_uint8x8x2_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl3p8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vtbl3_p8 (arg0_poly8x8x3_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl3s8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vtbl3_s8 (arg0_int8x8x3_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl3u8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtbl3_u8 (arg0_uint8x8x3_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl4p8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8_t = vtbl4_p8 (arg0_poly8x8x4_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl4s8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8_t = vtbl4_s8 (arg0_int8x8x4_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbl4u8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtbl4_u8 (arg0_uint8x8x4_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbl\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx1p8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x8_t = vtbx1_p8 (arg0_poly8x8_t, arg1_poly8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx1s8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vtbx1_s8 (arg0_int8x8_t, arg1_int8x8_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx1u8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vtbx1_u8 (arg0_uint8x8_t, arg1_uint8x8_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, ((\\\{\[dD\]\[0-9\]+\\\})|(\[dD\]\[0-9\]+)), \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx2p8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x8_t = vtbx2_p8 (arg0_poly8x8_t, arg1_poly8x8x2_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx2s8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vtbx2_s8 (arg0_int8x8_t, arg1_int8x8x2_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx2u8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vtbx2_u8 (arg0_uint8x8_t, arg1_uint8x8x2_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx3p8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x8_t = vtbx3_p8 (arg0_poly8x8_t, arg1_poly8x8x3_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx3s8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vtbx3_s8 (arg0_int8x8_t, arg1_int8x8x3_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx3u8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vtbx3_u8 (arg0_uint8x8_t, arg1_uint8x8x3_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx4p8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_poly8x8_t = vtbx4_p8 (arg0_poly8x8_t, arg1_poly8x8x4_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx4s8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_int8x8_t = vtbx4_s8 (arg0_int8x8_t, arg1_int8x8x4_t, arg2_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtbx4u8.c	2010-08-20 13:27:11 +0000
+@@ -18,5 +18,5 @@
+   out_uint8x8_t = vtbx4_u8 (arg0_uint8x8_t, arg1_uint8x8x4_t, arg2_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtbx\.8\[ 	\]+\[dD\]\[0-9\]+, \\\{((\[dD\]\[0-9\]+-\[dD\]\[0-9\]+)|(\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+))\\\}, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4x2_t = vtrnq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8x2_t = vtrnq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16x2_t = vtrnq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8x2_t = vtrnq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4x2_t = vtrnq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16x2_t = vtrnq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8x2_t = vtrnq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4x2_t = vtrnq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16x2_t = vtrnq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2x2_t = vtrn_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4x2_t = vtrn_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8x2_t = vtrn_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrns16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrns16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrns16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4x2_t = vtrn_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrns32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrns32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrns32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2x2_t = vtrn_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrns8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrns8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrns8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8x2_t = vtrn_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4x2_t = vtrn_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2x2_t = vtrn_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtrnu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtrnu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8x2_t = vtrn_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtrn\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vtstq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vtstq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vtstq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vtstq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8_t = vtstq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4_t = vtstq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16_t = vtstq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtst_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtsts16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtsts16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtsts16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vtst_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtsts32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtsts32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtsts32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vtst_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtsts8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtsts8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtsts8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtst_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4_t = vtst_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2_t = vtst_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vtstu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vtstu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vtstu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8_t = vtst_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vtst\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4x2_t = vuzpq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8x2_t = vuzpq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16x2_t = vuzpq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8x2_t = vuzpq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4x2_t = vuzpq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16x2_t = vuzpq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8x2_t = vuzpq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4x2_t = vuzpq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16x2_t = vuzpq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2x2_t = vuzp_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4x2_t = vuzp_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8x2_t = vuzp_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzps16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzps16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzps16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4x2_t = vuzp_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzps32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzps32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzps32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2x2_t = vuzp_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzps8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzps8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzps8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8x2_t = vuzp_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4x2_t = vuzp_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2x2_t = vuzp_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vuzpu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vuzpu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8x2_t = vuzp_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vuzp\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x4x2_t = vzipq_f32 (arg0_float32x4_t, arg1_float32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x8x2_t = vzipq_p16 (arg0_poly16x8_t, arg1_poly16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x16x2_t = vzipq_p8 (arg0_poly8x16_t, arg1_poly8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQs16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQs16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x8x2_t = vzipq_s16 (arg0_int16x8_t, arg1_int16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQs32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQs32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x4x2_t = vzipq_s32 (arg0_int32x4_t, arg1_int32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQs8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQs8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x16x2_t = vzipq_s8 (arg0_int8x16_t, arg1_int8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x8x2_t = vzipq_u16 (arg0_uint16x8_t, arg1_uint16x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x4x2_t = vzipq_u32 (arg0_uint32x4_t, arg1_uint32x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipQu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipQu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x16x2_t = vzipq_u8 (arg0_uint8x16_t, arg1_uint8x16_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[qQ\]\[0-9\]+, \[qQ\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipf32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipf32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipf32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_float32x2x2_t = vzip_f32 (arg0_float32x2_t, arg1_float32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipp16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipp16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipp16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly16x4x2_t = vzip_p16 (arg0_poly16x4_t, arg1_poly16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipp8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipp8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipp8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_poly8x8x2_t = vzip_p8 (arg0_poly8x8_t, arg1_poly8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzips16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzips16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzips16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int16x4x2_t = vzip_s16 (arg0_int16x4_t, arg1_int16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzips32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzips32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzips32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int32x2x2_t = vzip_s32 (arg0_int32x2_t, arg1_int32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzips8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzips8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzips8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_int8x8x2_t = vzip_s8 (arg0_int8x8_t, arg1_int8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipu16.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipu16.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipu16.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint16x4x2_t = vzip_u16 (arg0_uint16x4_t, arg1_uint16x4_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.16\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipu32.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipu32.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipu32.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint32x2x2_t = vzip_u32 (arg0_uint32x2_t, arg1_uint32x2_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.32\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon/vzipu8.c'
+--- old/gcc/testsuite/gcc.target/arm/neon/vzipu8.c	2010-07-29 15:38:15 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon/vzipu8.c	2010-08-20 13:27:11 +0000
+@@ -17,5 +17,5 @@
+   out_uint8x8x2_t = vzip_u8 (arg0_uint8x8_t, arg1_uint8x8_t);
+ }
+ 
+-/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@\[a-zA-Z0-9 \]+\)?\n" } } */
++/* { dg-final { scan-assembler "vzip\.8\[ 	\]+\[dD\]\[0-9\]+, \[dD\]\[0-9\]+!?\(\[ 	\]+@.*\)?\n" } } */
+ /* { dg-final { cleanup-saved-temps } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99363.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99363.patch
new file mode 100644
index 0000000000..7003cf8376
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99363.patch
@@ -0,0 +1,95 @@
+2010-08-05  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #7257
+
+	Backport from mainline:
+
+	gcc/
+	2010-08-05  Jie Zhang  <jie@codesourcery.com>
+	PR tree-optimization/45144
+	* tree-sra.c (type_consists_of_records_p): Return false
+	if the record contains bit-field.
+
+	gcc/testsuite/
+	2010-08-05  Jie Zhang  <jie@codesourcery.com>
+	PR tree-optimization/45144
+	* gcc.dg/tree-ssa/pr45144.c: New test.
+
+ 2010-08-04  Mark Mitchell  <mark@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== added file 'gcc/testsuite/gcc.dg/tree-ssa/pr45144.c'
+--- old/gcc/testsuite/gcc.dg/tree-ssa/pr45144.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/tree-ssa/pr45144.c	2010-08-20 16:04:44 +0000
+@@ -0,0 +1,46 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-optimized" } */
++
++void baz (unsigned);
++
++extern unsigned buf[];
++
++struct A
++{
++  unsigned a1:10;
++  unsigned a2:3;
++  unsigned:19;
++};
++
++union TMP
++{
++  struct A a;
++  unsigned int b;
++};
++
++static unsigned
++foo (struct A *p)
++{
++  union TMP t;
++  struct A x;
++  
++  x = *p;
++  t.a = x;
++  return t.b;
++}
++
++void
++bar (unsigned orig, unsigned *new)
++{
++  struct A a;
++  union TMP s;
++
++  s.b = orig;
++  a = s.a;
++  if (a.a1)
++    baz (a.a2);
++  *new = foo (&a);
++}
++
++/* { dg-final { scan-tree-dump "x = a;" "optimized"} } */
++/* { dg-final { cleanup-tree-dump "optimized" } } */
+
+=== modified file 'gcc/tree-sra.c'
+--- old/gcc/tree-sra.c	2010-08-10 13:31:21 +0000
++++ new/gcc/tree-sra.c	2010-08-20 16:04:44 +0000
+@@ -805,7 +805,7 @@
+ /* Return true iff TYPE is a RECORD_TYPE with fields that are either of gimple
+    register types or (recursively) records with only these two kinds of fields.
+    It also returns false if any of these records has a zero-size field as its
+-   last field.  */
++   last field or has a bit-field.  */
+ 
+ static bool
+ type_consists_of_records_p (tree type)
+@@ -821,6 +821,9 @@
+       {
+ 	tree ft = TREE_TYPE (fld);
+ 
++	if (DECL_BIT_FIELD (fld))
++	  return false;
++
+ 	if (!is_gimple_reg_type (ft)
+ 	    && !type_consists_of_records_p (ft))
+ 	  return false;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch
new file mode 100644
index 0000000000..8ae781ecab
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99364.patch
@@ -0,0 +1,511 @@
+2010-08-05  Julian Brown  <julian@codesourcery.com>
+
+	Backport from mainline (candidate patch):
+
+	gcc/
+	* expr.c (expand_assignment): Add assertion to prevent emitting null
+	rtx for movmisalign pattern.
+	(expand_expr_real_1): Likewise.
+	* config/arm/arm.c (arm_builtin_support_vector_misalignment): New.
+	(TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): New. Use above.
+	(arm_vector_alignment_reachable): New.
+	(TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE): New. Use above.
+	(neon_vector_mem_operand): Disallow PRE_DEC for misaligned loads.
+	(arm_print_operand): Include alignment qualifier in %A.
+	* config/arm/neon.md (UNSPEC_MISALIGNED_ACCESS): New constant.
+	(movmisalign<mode>): New expander.
+	(movmisalign<mode>_neon_store, movmisalign<mode>_neon_load): New
+	insn patterns.
+
+	gcc/testsuite/
+	* gcc.dg/vect/vect-42.c: Use vect_element_align instead of
+	vect_hw_misalign.
+	* gcc.dg/vect/vect-60.c: Likewise.
+	* gcc.dg/vect/vect-56.c: Likewise.
+	* gcc.dg/vect/vect-93.c: Likewise.
+	* gcc.dg/vect/no-scevccp-outer-8.c: Likewise.
+	* gcc.dg/vect/vect-95.c: Likewise.
+	* gcc.dg/vect/vect-96.c: Likewise.
+	* gcc.dg/vect/vect-outer-5.c: Use quad-word vectors when available.
+	* gcc.dg/vect/slp-25.c: Likewise.
+	* gcc.dg/vect/slp-3.c: Likewise.
+	* gcc.dg/vect/vect-multitypes-1.c: Likewise.
+	* gcc.dg/vect/no-vfa-pr29145.c: Likewise.
+	* gcc.dg/vect/vect-multitypes-4.c: Likewise. Use vect_element_align.
+	* gcc.dg/vect/vect-109.c: Likewise.
+	* gcc.dg/vect/vect-peel-1.c: Likewise.
+	* gcc.dg/vect/vect-peel-2.c: Likewise.
+	* lib/target-supports.exp
+	(check_effective_target_arm_vect_no_misalign): New.
+	(check_effective_target_vect_no_align): Use above.
+	(check_effective_target_vect_element_align): New.
+	(add_options_for_quad_vectors): New.
+
+ 2010-08-05  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Issue #7257
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-16 09:41:58 +0000
++++ new/gcc/config/arm/arm.c	2010-08-20 16:21:01 +0000
+@@ -228,6 +228,11 @@
+ static void arm_trampoline_init (rtx, tree, rtx);
+ static rtx arm_trampoline_adjust_address (rtx);
+ static rtx arm_pic_static_addr (rtx orig, rtx reg);
++static bool arm_vector_alignment_reachable (const_tree type, bool is_packed);
++static bool arm_builtin_support_vector_misalignment (enum machine_mode mode,
++						     const_tree type,
++						     int misalignment,
++						     bool is_packed);
+ 
+ 
+ /* Table of machine attributes.  */
+@@ -514,6 +519,14 @@
+ #undef TARGET_CAN_ELIMINATE
+ #define TARGET_CAN_ELIMINATE arm_can_eliminate
+ 
++#undef TARGET_VECTOR_ALIGNMENT_REACHABLE
++#define TARGET_VECTOR_ALIGNMENT_REACHABLE \
++  arm_vector_alignment_reachable
++
++#undef TARGET_SUPPORT_VECTOR_MISALIGNMENT
++#define TARGET_SUPPORT_VECTOR_MISALIGNMENT \
++  arm_builtin_support_vector_misalignment
++
+ struct gcc_target targetm = TARGET_INITIALIZER;
+ 
+ /* Obstack for minipool constant handling.  */
+@@ -9084,7 +9097,8 @@
+     return arm_address_register_rtx_p (ind, 0);
+ 
+   /* Allow post-increment with Neon registers.  */
+-  if (type != 1 && (GET_CODE (ind) == POST_INC || GET_CODE (ind) == PRE_DEC))
++  if ((type != 1 && GET_CODE (ind) == POST_INC)
++      || (type == 0 && GET_CODE (ind) == PRE_DEC))
+     return arm_address_register_rtx_p (XEXP (ind, 0), 0);
+ 
+   /* FIXME: vld1 allows register post-modify.  */
+@@ -16365,6 +16379,8 @@
+       {
+ 	rtx addr;
+ 	bool postinc = FALSE;
++	unsigned align, modesize, align_bits;
++
+ 	gcc_assert (GET_CODE (x) == MEM);
+ 	addr = XEXP (x, 0);
+ 	if (GET_CODE (addr) == POST_INC)
+@@ -16372,7 +16388,29 @@
+ 	    postinc = 1;
+ 	    addr = XEXP (addr, 0);
+ 	  }
+-	asm_fprintf (stream, "[%r]", REGNO (addr));
++	asm_fprintf (stream, "[%r", REGNO (addr));
++
++	/* We know the alignment of this access, so we can emit a hint in the
++	   instruction (for some alignments) as an aid to the memory subsystem
++	   of the target.  */
++	align = MEM_ALIGN (x) >> 3;
++	modesize = GET_MODE_SIZE (GET_MODE (x));
++	
++	/* Only certain alignment specifiers are supported by the hardware.  */
++	if (modesize == 16 && (align % 32) == 0)
++	  align_bits = 256;
++	else if ((modesize == 8 || modesize == 16) && (align % 16) == 0)
++	  align_bits = 128;
++	else if ((align % 8) == 0)
++	  align_bits = 64;
++	else
++	  align_bits = 0;
++	
++	if (align_bits != 0)
++	  asm_fprintf (stream, ", :%d", align_bits);
++
++	asm_fprintf (stream, "]");
++
+ 	if (postinc)
+ 	  fputs("!", stream);
+       }
+@@ -22450,4 +22488,43 @@
+   return !TARGET_THUMB1;
+ }
+ 
++static bool
++arm_vector_alignment_reachable (const_tree type, bool is_packed)
++{
++  /* Vectors which aren't in packed structures will not be less aligned than
++     the natural alignment of their element type, so this is safe.  */
++  if (TARGET_NEON && !BYTES_BIG_ENDIAN)
++    return !is_packed;
++
++  return default_builtin_vector_alignment_reachable (type, is_packed);
++}
++
++static bool
++arm_builtin_support_vector_misalignment (enum machine_mode mode,
++					 const_tree type, int misalignment,
++					 bool is_packed)
++{
++  if (TARGET_NEON && !BYTES_BIG_ENDIAN)
++    {
++      HOST_WIDE_INT align = TYPE_ALIGN_UNIT (type);
++
++      if (is_packed)
++        return align == 1;
++
++      /* If the misalignment is unknown, we should be able to handle the access
++	 so long as it is not to a member of a packed data structure.  */
++      if (misalignment == -1)
++        return true;
++
++      /* Return true if the misalignment is a multiple of the natural alignment
++         of the vector's element type.  This is probably always going to be
++	 true in practice, since we've already established that this isn't a
++	 packed access.  */
++      return ((misalignment % align) == 0);
++    }
++  
++  return default_builtin_support_vector_misalignment (mode, type, misalignment,
++						      is_packed);
++}
++
+ #include "gt-arm.h"
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md	2010-08-13 11:40:17 +0000
++++ new/gcc/config/arm/neon.md	2010-08-20 16:21:01 +0000
+@@ -140,7 +140,8 @@
+    (UNSPEC_VUZP1		201)
+    (UNSPEC_VUZP2		202)
+    (UNSPEC_VZIP1		203)
+-   (UNSPEC_VZIP2		204)])
++   (UNSPEC_VZIP2		204)
++   (UNSPEC_MISALIGNED_ACCESS	205)])
+ 
+ ;; Double-width vector modes.
+ (define_mode_iterator VD [V8QI V4HI V2SI V2SF])
+@@ -660,6 +661,52 @@
+   neon_disambiguate_copy (operands, dest, src, 4);
+ })
+ 
++(define_expand "movmisalign<mode>"
++  [(set (match_operand:VDQX 0 "nonimmediate_operand"	      "")
++	(unspec:VDQX [(match_operand:VDQX 1 "general_operand" "")]
++		     UNSPEC_MISALIGNED_ACCESS))]
++  "TARGET_NEON && !BYTES_BIG_ENDIAN"
++{
++  /* This pattern is not permitted to fail during expansion: if both arguments
++     are non-registers (e.g. memory := constant, which can be created by the
++     auto-vectorizer), force operand 1 into a register.  */
++  if (!s_register_operand (operands[0], <MODE>mode)
++      && !s_register_operand (operands[1], <MODE>mode))
++    operands[1] = force_reg (<MODE>mode, operands[1]);
++})
++
++(define_insn "*movmisalign<mode>_neon_store"
++  [(set (match_operand:VDX 0 "memory_operand"		       "=Um")
++	(unspec:VDX [(match_operand:VDX 1 "s_register_operand" " w")]
++		    UNSPEC_MISALIGNED_ACCESS))]
++  "TARGET_NEON && !BYTES_BIG_ENDIAN"
++  "vst1.<V_sz_elem>\t{%P1}, %A0"
++  [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
++
++(define_insn "*movmisalign<mode>_neon_load"
++  [(set (match_operand:VDX 0 "s_register_operand"	   "=w")
++	(unspec:VDX [(match_operand:VDX 1 "memory_operand" " Um")]
++		    UNSPEC_MISALIGNED_ACCESS))]
++  "TARGET_NEON && !BYTES_BIG_ENDIAN"
++  "vld1.<V_sz_elem>\t{%P0}, %A1"
++  [(set_attr "neon_type" "neon_vld1_1_2_regs")])
++
++(define_insn "*movmisalign<mode>_neon_store"
++  [(set (match_operand:VQX 0 "memory_operand"		       "=Um")
++	(unspec:VQX [(match_operand:VQX 1 "s_register_operand" " w")]
++		    UNSPEC_MISALIGNED_ACCESS))]
++  "TARGET_NEON && !BYTES_BIG_ENDIAN"
++  "vst1.<V_sz_elem>\t{%q1}, %A0"
++  [(set_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs")])
++
++(define_insn "*movmisalign<mode>_neon_load"
++  [(set (match_operand:VQX 0 "s_register_operand"	   "=w")
++	(unspec:VQX [(match_operand:VQX 1 "memory_operand" " Um")]
++		    UNSPEC_MISALIGNED_ACCESS))]
++  "TARGET_NEON && !BYTES_BIG_ENDIAN"
++  "vld1.<V_sz_elem>\t{%q0}, %A1"
++  [(set_attr "neon_type" "neon_vld1_1_2_regs")])
++
+ (define_insn "vec_set<mode>_internal"
+   [(set (match_operand:VD 0 "s_register_operand" "=w")
+         (vec_merge:VD
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-08-12 13:51:16 +0000
++++ new/gcc/expr.c	2010-08-20 16:21:01 +0000
+@@ -4362,7 +4362,10 @@
+            && op_mode1 != VOIDmode)
+          reg = copy_to_mode_reg (op_mode1, reg);
+ 
+-      insn = GEN_FCN (icode) (mem, reg);
++       insn = GEN_FCN (icode) (mem, reg);
++       /* The movmisalign<mode> pattern cannot fail, else the assignment would
++          silently be omitted.  */
++       gcc_assert (insn != NULL_RTX);
+        emit_insn (insn);
+        return;
+      }
+@@ -8742,6 +8745,7 @@
+ 
+ 	    /* Nor can the insn generator.  */
+ 	    insn = GEN_FCN (icode) (reg, temp);
++	    gcc_assert (insn != NULL_RTX);
+ 	    emit_insn (insn);
+ 
+ 	    return reg;
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c'
+--- old/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c	2009-06-05 14:28:50 +0000
++++ new/gcc/testsuite/gcc.dg/vect/no-scevccp-outer-8.c	2010-08-20 16:21:01 +0000
+@@ -46,5 +46,5 @@
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_hw_misalign } } } } } */
++/* { dg-final { scan-tree-dump-times "OUTER LOOP VECTORIZED." 1 "vect" { xfail { ! { vect_element_align } } } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c'
+--- old/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c	2008-08-18 19:36:03 +0000
++++ new/gcc/testsuite/gcc.dg/vect/no-vfa-pr29145.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/slp-25.c'
+--- old/gcc/testsuite/gcc.dg/vect/slp-25.c	2009-10-27 11:46:07 +0000
++++ new/gcc/testsuite/gcc.dg/vect/slp-25.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/slp-3.c'
+--- old/gcc/testsuite/gcc.dg/vect/slp-3.c	2009-05-12 13:05:28 +0000
++++ new/gcc/testsuite/gcc.dg/vect/slp-3.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include <stdio.h>
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-109.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-109.c	2010-07-10 20:38:32 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-109.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+@@ -72,8 +73,8 @@
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_hw_misalign } } } */
+-/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 2 "vect" { xfail vect_hw_misalign } } } */
+-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 10 "vect" { target vect_hw_misalign } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { target vect_element_align } } } */
++/* { dg-final { scan-tree-dump-times "not vectorized: unsupported unaligned store" 2 "vect" { xfail vect_element_align } } } */
++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 10 "vect" { target vect_element_align } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-42.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-42.c	2009-11-04 10:22:22 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-42.c	2010-08-20 16:21:01 +0000
+@@ -64,7 +64,7 @@
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 2 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 3 "vect" { target vect_no_align } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { ! vector_alignment_reachable } && { ! vect_hw_misalign } } } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 1 "vect" { target { { ! vector_alignment_reachable } && { ! vect_element_align } } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || { ! vector_alignment_reachable } } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || { ! vector_alignment_reachable } } } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-95.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-95.c	2009-10-27 11:46:07 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-95.c	2010-08-20 16:21:01 +0000
+@@ -56,14 +56,14 @@
+ }
+ 
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail {vect_hw_misalign} } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 0 "vect" { xfail {vect_element_align} } } } */
+ 
+ /* For targets that support unaligned loads we version for the two unaligned 
+    stores and generate misaligned accesses for the loads. For targets that 
+    don't support unaligned loads we version for all four accesses.  */
+ 
+-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_hw_misalign} } } }  */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align} } } }  */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /*  { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 0 "vect" { target vect_no_align } } } */
+ /*  { dg-final { scan-tree-dump-times "Alignment of access forced using versioning" 4 "vect" { target vect_no_align } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-96.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-96.c	2009-10-27 11:46:07 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-96.c	2010-08-20 16:21:01 +0000
+@@ -45,5 +45,5 @@
+ /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { target { {! vect_no_align} && vector_alignment_reachable } } } } */
+ /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align } || {! vector_alignment_reachable} } } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align || { {! vector_alignment_reachable} && {! vect_hw_misalign} } } } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 1 "vect" { target { vect_no_align || { {! vector_alignment_reachable} && {! vect_element_align} } } } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c	2009-10-27 11:46:07 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-multitypes-1.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+@@ -78,11 +79,11 @@
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_hw_misalign} } } } */
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_hw_misalign} } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_element_align} } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_element_align} } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail *-*-* } } } */
+-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 2 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c	2009-10-27 11:46:07 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-multitypes-4.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_int } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdarg.h>
+ #include "tree-vect.h"
+@@ -85,11 +86,11 @@
+   return 0;
+ }
+ 
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_hw_misalign} } } } */
+-/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_hw_misalign}  } } } */
+-/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 2 "vect" { xfail {! vect_element_align} } } } */
++/* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 2 "vect" { xfail {! vect_element_align}  } } } */
++/* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 8 "vect" { xfail *-*-* } } } */
+-/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || vect_hw_misalign } } } } */
++/* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 4 "vect" { xfail { vect_no_align || vect_element_align } } } } */
+ /* { dg-final { cleanup-tree-dump "vect" } } */
+ 
+
+=== modified file 'gcc/testsuite/gcc.dg/vect/vect-outer-5.c'
+--- old/gcc/testsuite/gcc.dg/vect/vect-outer-5.c	2009-05-08 12:39:01 +0000
++++ new/gcc/testsuite/gcc.dg/vect/vect-outer-5.c	2010-08-20 16:21:01 +0000
+@@ -1,4 +1,5 @@
+ /* { dg-require-effective-target vect_float } */
++/* { dg-add-options quad_vectors } */
+ 
+ #include <stdio.h>
+ #include <stdarg.h>
+
+=== modified file 'gcc/testsuite/lib/target-supports.exp'
+--- old/gcc/testsuite/lib/target-supports.exp	2010-08-10 13:31:21 +0000
++++ new/gcc/testsuite/lib/target-supports.exp	2010-08-20 16:21:01 +0000
+@@ -1642,6 +1642,18 @@
+     }]
+ }
+ 
++# Return 1 if this is an ARM target that only supports aligned vector accesses
++proc check_effective_target_arm_vect_no_misalign { } {
++    return [check_no_compiler_messages arm_vect_no_misalign assembly {
++	#if !defined(__arm__) \
++	    || (defined(__ARMEL__) \
++	        && (!defined(__thumb__) || defined(__thumb2__)))
++	#error FOO
++	#endif
++    }]
++}
++
++
+ # Return 1 if this is an ARM target supporting -mfpu=vfp
+ # -mfloat-abi=softfp.  Some multilibs may be incompatible with these
+ # options.
+@@ -2547,7 +2559,7 @@
+ 	if { [istarget mipsisa64*-*-*]
+ 	     || [istarget sparc*-*-*]
+ 	     || [istarget ia64-*-*]
+-	     || [check_effective_target_arm32] } { 
++	     || [check_effective_target_arm_vect_no_misalign] } { 
+ 	    set et_vect_no_align_saved 1
+ 	}
+     }
+@@ -2682,6 +2694,25 @@
+     return $et_vector_alignment_reachable_for_64bit_saved
+ }
+ 
++# Return 1 if the target only requires element alignment for vector accesses
++
++proc check_effective_target_vect_element_align { } {
++    global et_vect_element_align
++
++    if [info exists et_vect_element_align] {
++	verbose "check_effective_target_vect_element_align: using cached result" 2
++    } else {
++	set et_vect_element_align 0
++	if { [istarget arm*-*-*]
++	     || [check_effective_target_vect_hw_misalign] } {
++	   set et_vect_element_align 1
++	}
++    }
++
++    verbose "check_effective_target_vect_element_align: returning $et_vect_element_align" 2
++    return $et_vect_element_align
++}
++
+ # Return 1 if the target supports vector conditional operations, 0 otherwise.
+ 
+ proc check_effective_target_vect_condition { } {
+@@ -3239,6 +3270,16 @@
+     return $flags
+ }
+ 
++# Add to FLAGS the flags needed to enable 128-bit vectors.
++
++proc add_options_for_quad_vectors { flags } {
++    if [is-effective-target arm_neon_ok] {
++	return "$flags -mvectorize-with-neon-quad"
++    }
++
++    return $flags
++}
++
+ # Return 1 if the target provides a full C99 runtime.
+ 
+ proc check_effective_target_c99_runtime { } {
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99365.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99365.patch
new file mode 100644
index 0000000000..36a942118a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99365.patch
@@ -0,0 +1,38 @@
+2010-08-12  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/testsuite/
+	2010-08-12  Jie Zhang  <jie@codesourcery.com>
+	* gcc.dg/graphite/interchange-9.c (M): Define to be 111.
+	(N): Likewise.
+	(main): Adjust accordingly.
+
+ 2010-08-05  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Backport from mainline (candidate patch):
+
+=== modified file 'gcc/testsuite/gcc.dg/graphite/interchange-9.c'
+--- old/gcc/testsuite/gcc.dg/graphite/interchange-9.c	2010-02-07 19:49:26 +0000
++++ new/gcc/testsuite/gcc.dg/graphite/interchange-9.c	2010-08-20 16:32:45 +0000
+@@ -5,8 +5,8 @@
+ #include <stdio.h>
+ #endif
+ 
+-#define N 1111
+-#define M 1111
++#define N 111
++#define M 111
+ 
+ static int __attribute__((noinline))
+ foo (int *x)
+@@ -38,7 +38,7 @@
+   fprintf (stderr, "res = %d \n", res);
+ #endif
+ 
+-  if (res != 2468642)
++  if (res != 24642)
+     abort ();
+ 
+   return 0;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99366.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99366.patch
new file mode 100644
index 0000000000..0998c812e8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99366.patch
@@ -0,0 +1,26 @@
+2010-08-13  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-08-13  Jie Zhang  <jie@codesourcery.com>
+	* config/arm/arm.md (cstoredf4): Only valid when
+	!TARGET_VFP_SINGLE.
+
+ 2010-08-12  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-16 09:41:58 +0000
++++ new/gcc/config/arm/arm.md	2010-08-20 16:41:37 +0000
+@@ -8344,7 +8344,7 @@
+ 	(match_operator:SI 1 "arm_comparison_operator"
+ 	 [(match_operand:DF 2 "s_register_operand" "")
+ 	  (match_operand:DF 3 "arm_float_compare_operand" "")]))]
+-  "TARGET_32BIT && TARGET_HARD_FLOAT"
++  "TARGET_32BIT && TARGET_HARD_FLOAT && !TARGET_VFP_SINGLE"
+   "emit_insn (gen_cstore_cc (operands[0], operands[1],
+ 			     operands[2], operands[3])); DONE;"
+ )
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99367.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99367.patch
new file mode 100644
index 0000000000..2d572b1bb0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99367.patch
@@ -0,0 +1,49 @@
+2010-08-18  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/testsuite/
+	2010-08-18  Jie Zhang  <jie@codesourcery.com>
+	* gcc.dg/builtin-apply2.c (STACK_ARGUMENTS_SIZE): Define to
+	20 if __ARM_PCS is defined otherwise 64.
+	(bar): Use STACK_ARGUMENTS_SIZE for the third argument
+	instead of hard coded 64.
+
+ 2010-08-13  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/testsuite/gcc.dg/builtin-apply2.c'
+--- old/gcc/testsuite/gcc.dg/builtin-apply2.c	2009-08-06 13:27:45 +0000
++++ new/gcc/testsuite/gcc.dg/builtin-apply2.c	2010-08-23 13:59:02 +0000
+@@ -8,10 +8,19 @@
+ /* Verify that __builtin_apply behaves correctly on targets
+    with pre-pushed arguments (e.g. SPARC).  */
+ 
+-   
++
+ 
+ #define INTEGER_ARG  5
+ 
++#ifdef __ARM_PCS
++/* For Base AAPCS, NAME is passed in r0.  D is passed in r2 and r3.
++   E, F and G are passed on stack.  So the size of the stack argument
++   data is 20.  */
++#define STACK_ARGUMENTS_SIZE  20
++#else
++#define STACK_ARGUMENTS_SIZE  64
++#endif
++
+ extern void abort(void);
+ 
+ void foo(char *name, double d, double e, double f, int g)
+@@ -22,7 +31,7 @@
+ 
+ void bar(char *name, ...)
+ {
+-  __builtin_apply(foo, __builtin_apply_args(), 64);
++  __builtin_apply(foo, __builtin_apply_args(), STACK_ARGUMENTS_SIZE);
+ }
+ 
+ int main(void)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99368.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99368.patch
new file mode 100644
index 0000000000..0705e4183f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99368.patch
@@ -0,0 +1,342 @@
+2010-08-18  Julian Brown  <julian@codesourcery.com>
+
+	Issue #9222
+
+	gcc/
+	* config/arm/neon.md (UNSPEC_VCLE, UNSPEC_VCLT): New constants for
+	unspecs.
+	(vcond<mode>, vcondu<mode>): New expanders.
+	(neon_vceq<mode>, neon_vcge<mode>, neon_vcgt<mode>): Support
+	comparisons with zero.
+	(neon_vcle<mode>, neon_vclt<mode>): New patterns.
+	* config/arm/constraints.md (Dz): New constraint.
+
+ 2010-08-18  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/config/arm/constraints.md'
+Index: gcc-4.5/gcc/config/arm/constraints.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/constraints.md
++++ gcc-4.5/gcc/config/arm/constraints.md
+@@ -29,7 +29,7 @@
+ ;; in Thumb-1 state: I, J, K, L, M, N, O
+ 
+ ;; The following multi-letter normal constraints have been used:
+-;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di
++;; in ARM/Thumb-2 state: Da, Db, Dc, Dn, Dl, DL, Dv, Dy, Di, Dz
+ ;; in Thumb-1 state: Pa, Pb
+ ;; in Thumb-2 state: Ps, Pt, Pv
+ 
+@@ -173,6 +173,12 @@
+  (and (match_code "const_double")
+       (match_test "TARGET_32BIT && neg_const_double_rtx_ok_for_fpa (op)")))
+ 
++(define_constraint "Dz"
++ "@internal
++  In ARM/Thumb-2 state a vector of constant zeros."
++ (and (match_code "const_vector")
++      (match_test "TARGET_NEON && op == CONST0_RTX (mode)")))
++
+ (define_constraint "Da"
+  "@internal
+   In ARM/Thumb-2 state a const_int, const_double or const_vector that can
+Index: gcc-4.5/gcc/config/arm/neon.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/neon.md
++++ gcc-4.5/gcc/config/arm/neon.md
+@@ -141,7 +141,9 @@
+    (UNSPEC_VUZP2		202)
+    (UNSPEC_VZIP1		203)
+    (UNSPEC_VZIP2		204)
+-   (UNSPEC_MISALIGNED_ACCESS	205)])
++   (UNSPEC_MISALIGNED_ACCESS	205)
++   (UNSPEC_VCLE			206)
++   (UNSPEC_VCLT			207)])
+ 
+ ;; Double-width vector modes.
+ (define_mode_iterator VD [V8QI V4HI V2SI V2SF])
+@@ -1804,6 +1806,169 @@
+   [(set_attr "neon_type" "neon_int_5")]
+ )
+ 
++;; Conditional instructions.  These are comparisons with conditional moves for
++;; vectors.  They perform the assignment:
++;;   
++;;     Vop0 = (Vop4 <op3> Vop5) ? Vop1 : Vop2;
++;;
++;; where op3 is <, <=, ==, !=, >= or >.  Operations are performed
++;; element-wise.
++
++(define_expand "vcond<mode>"
++  [(set (match_operand:VDQW 0 "s_register_operand" "")
++	(if_then_else:VDQW
++	  (match_operator 3 "arm_comparison_operator"
++	    [(match_operand:VDQW 4 "s_register_operand" "")
++	     (match_operand:VDQW 5 "nonmemory_operand" "")])
++	  (match_operand:VDQW 1 "s_register_operand" "")
++	  (match_operand:VDQW 2 "s_register_operand" "")))]
++  "TARGET_NEON && (!<Is_float_mode> || flag_unsafe_math_optimizations)"
++{
++  rtx mask;
++  int inverse = 0, immediate_zero = 0;
++  /* See the description of "magic" bits in the 'T' case of
++     arm_print_operand.  */
++  HOST_WIDE_INT magic_word = (<MODE>mode == V2SFmode || <MODE>mode == V4SFmode)
++			     ? 3 : 1;
++  rtx magic_rtx = GEN_INT (magic_word);
++  
++  mask = gen_reg_rtx (<V_cmp_result>mode);
++  
++  if (operands[5] == CONST0_RTX (<MODE>mode))
++    immediate_zero = 1;
++  else if (!REG_P (operands[5]))
++    operands[5] = force_reg (<MODE>mode, operands[5]);
++  
++  switch (GET_CODE (operands[3]))
++    {
++    case GE:
++      emit_insn (gen_neon_vcge<mode> (mask, operands[4], operands[5],
++				      magic_rtx));
++      break;
++    
++    case GT:
++      emit_insn (gen_neon_vcgt<mode> (mask, operands[4], operands[5],
++				      magic_rtx));
++      break;
++    
++    case EQ:
++      emit_insn (gen_neon_vceq<mode> (mask, operands[4], operands[5],
++				      magic_rtx));
++      break;
++    
++    case LE:
++      if (immediate_zero)
++	emit_insn (gen_neon_vcle<mode> (mask, operands[4], operands[5],
++					magic_rtx));
++      else
++	emit_insn (gen_neon_vcge<mode> (mask, operands[5], operands[4],
++					magic_rtx));
++      break;
++    
++    case LT:
++      if (immediate_zero)
++	emit_insn (gen_neon_vclt<mode> (mask, operands[4], operands[5],
++					magic_rtx));
++      else
++	emit_insn (gen_neon_vcgt<mode> (mask, operands[5], operands[4],
++					magic_rtx));
++      break;
++    
++    case NE:
++      emit_insn (gen_neon_vceq<mode> (mask, operands[4], operands[5],
++				      magic_rtx));
++      inverse = 1;
++      break;
++    
++    default:
++      gcc_unreachable ();
++    }
++  
++  if (inverse)
++    emit_insn (gen_neon_vbsl<mode> (operands[0], mask, operands[2],
++				    operands[1]));
++  else
++    emit_insn (gen_neon_vbsl<mode> (operands[0], mask, operands[1],
++				    operands[2]));
++
++  DONE;
++})
++
++(define_expand "vcondu<mode>"
++  [(set (match_operand:VDQIW 0 "s_register_operand" "")
++	(if_then_else:VDQIW
++	  (match_operator 3 "arm_comparison_operator"
++	    [(match_operand:VDQIW 4 "s_register_operand" "")
++	     (match_operand:VDQIW 5 "s_register_operand" "")])
++	  (match_operand:VDQIW 1 "s_register_operand" "")
++	  (match_operand:VDQIW 2 "s_register_operand" "")))]
++  "TARGET_NEON"
++{
++  rtx mask;
++  int inverse = 0, immediate_zero = 0;
++  
++  mask = gen_reg_rtx (<V_cmp_result>mode);
++  
++  if (operands[5] == CONST0_RTX (<MODE>mode))
++    immediate_zero = 1;
++  else if (!REG_P (operands[5]))
++    operands[5] = force_reg (<MODE>mode, operands[5]);
++  
++  switch (GET_CODE (operands[3]))
++    {
++    case GEU:
++      emit_insn (gen_neon_vcge<mode> (mask, operands[4], operands[5],
++				      const0_rtx));
++      break;
++    
++    case GTU:
++      emit_insn (gen_neon_vcgt<mode> (mask, operands[4], operands[5],
++				      const0_rtx));
++      break;
++    
++    case EQ:
++      emit_insn (gen_neon_vceq<mode> (mask, operands[4], operands[5],
++				      const0_rtx));
++      break;
++    
++    case LEU:
++      if (immediate_zero)
++	emit_insn (gen_neon_vcle<mode> (mask, operands[4], operands[5],
++					const0_rtx));
++      else
++	emit_insn (gen_neon_vcge<mode> (mask, operands[5], operands[4],
++					const0_rtx));
++      break;
++    
++    case LTU:
++      if (immediate_zero)
++        emit_insn (gen_neon_vclt<mode> (mask, operands[4], operands[5],
++					const0_rtx));
++      else
++	emit_insn (gen_neon_vcgt<mode> (mask, operands[5], operands[4],
++					const0_rtx));
++      break;
++    
++    case NE:
++      emit_insn (gen_neon_vceq<mode> (mask, operands[4], operands[5],
++				      const0_rtx));
++      inverse = 1;
++      break;
++    
++    default:
++      gcc_unreachable ();
++    }
++  
++  if (inverse)
++    emit_insn (gen_neon_vbsl<mode> (operands[0], mask, operands[2],
++				    operands[1]));
++  else
++    emit_insn (gen_neon_vbsl<mode> (operands[0], mask, operands[1],
++				    operands[2]));
++
++  DONE;
++})
++
+ ;; Patterns for builtins.
+ 
+ ; good for plain vadd, vaddq.
+@@ -2215,13 +2380,16 @@
+ )
+ 
+ (define_insn "neon_vceq<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w")
+-		                (match_operand:VDQW 2 "s_register_operand" "w")
+-                                (match_operand:SI 3 "immediate_operand" "i")]
+-                               UNSPEC_VCEQ))]
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
++        (unspec:<V_cmp_result>
++	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
++	   (match_operand:VDQW 2 "nonmemory_operand" "w,Dz")
++	   (match_operand:SI 3 "immediate_operand" "i,i")]
++          UNSPEC_VCEQ))]
+   "TARGET_NEON"
+-  "vceq.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++  "@
++  vceq.<V_if_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
++  vceq.<V_if_elem>\t%<V_reg>0, %<V_reg>1, #0"
+   [(set (attr "neon_type")
+       (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+                     (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+@@ -2231,13 +2399,16 @@
+ )
+ 
+ (define_insn "neon_vcge<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w")
+-		                (match_operand:VDQW 2 "s_register_operand" "w")
+-                                (match_operand:SI 3 "immediate_operand" "i")]
+-                               UNSPEC_VCGE))]
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
++        (unspec:<V_cmp_result>
++	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
++	   (match_operand:VDQW 2 "nonmemory_operand" "w,Dz")
++	   (match_operand:SI 3 "immediate_operand" "i,i")]
++          UNSPEC_VCGE))]
+   "TARGET_NEON"
+-  "vcge.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++  "@
++  vcge.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
++  vcge.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, #0"
+   [(set (attr "neon_type")
+      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+@@ -2247,13 +2418,16 @@
+ )
+ 
+ (define_insn "neon_vcgt<mode>"
+-  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+-        (unspec:<V_cmp_result> [(match_operand:VDQW 1 "s_register_operand" "w")
+-		                (match_operand:VDQW 2 "s_register_operand" "w")
+-                                (match_operand:SI 3 "immediate_operand" "i")]
+-                               UNSPEC_VCGT))]
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w,w")
++        (unspec:<V_cmp_result>
++	  [(match_operand:VDQW 1 "s_register_operand" "w,w")
++	   (match_operand:VDQW 2 "nonmemory_operand" "w,Dz")
++           (match_operand:SI 3 "immediate_operand" "i,i")]
++          UNSPEC_VCGT))]
+   "TARGET_NEON"
+-  "vcgt.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
++  "@
++  vcgt.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, %<V_reg>2
++  vcgt.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, #0"
+   [(set (attr "neon_type")
+      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
+                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
+@@ -2262,6 +2436,43 @@
+                    (const_string "neon_int_5")))]
+ )
+ 
++;; VCLE and VCLT only support comparisons with immediate zero (register
++;; variants are VCGE and VCGT with operands reversed).
++
++(define_insn "neon_vcle<mode>"
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
++        (unspec:<V_cmp_result>
++	  [(match_operand:VDQW 1 "s_register_operand" "w")
++	   (match_operand:VDQW 2 "nonmemory_operand" "Dz")
++	   (match_operand:SI 3 "immediate_operand" "i")]
++          UNSPEC_VCLE))]
++  "TARGET_NEON"
++  "vcle.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, #0"
++  [(set (attr "neon_type")
++      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
++                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
++                                  (const_string "neon_fp_vadd_ddd_vabs_dd")
++                                  (const_string "neon_fp_vadd_qqq_vabs_qq"))
++                    (const_string "neon_int_5")))]
++)
++
++(define_insn "neon_vclt<mode>"
++  [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
++        (unspec:<V_cmp_result>
++	  [(match_operand:VDQW 1 "s_register_operand" "w")
++	   (match_operand:VDQW 2 "nonmemory_operand" "Dz")
++	   (match_operand:SI 3 "immediate_operand" "i")]
++          UNSPEC_VCLT))]
++  "TARGET_NEON"
++  "vclt.%T3%#<V_sz_elem>\t%<V_reg>0, %<V_reg>1, #0"
++  [(set (attr "neon_type")
++      (if_then_else (ne (symbol_ref "<Is_float_mode>") (const_int 0))
++                    (if_then_else (ne (symbol_ref "<Is_d_reg>") (const_int 0))
++                                  (const_string "neon_fp_vadd_ddd_vabs_dd")
++                                  (const_string "neon_fp_vadd_qqq_vabs_qq"))
++                    (const_string "neon_int_5")))]
++)
++
+ (define_insn "neon_vcage<mode>"
+   [(set (match_operand:<V_cmp_result> 0 "s_register_operand" "=w")
+         (unspec:<V_cmp_result> [(match_operand:VCVTF 1 "s_register_operand" "w")
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99369.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99369.patch
new file mode 100644
index 0000000000..9bbc020629
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99369.patch
@@ -0,0 +1,53 @@
+2010-08-20  Jie Zhang  <jie@codesourcery.com>
+
+	Merged from Sourcery G++ 4.4:
+
+	gcc/
+	2009-05-29  Julian Brown  <julian@codesourcery.com>
+	Merged from Sourcery G++ 4.3:
+	* config/arm/arm.md (movsi): Don't split symbol refs here.
+	(define_split): New.
+
+ 2010-08-18  Julian Brown  <julian@codesourcery.com>
+ 
+ 	Issue #9222
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-20 16:41:37 +0000
++++ new/gcc/config/arm/arm.md	2010-08-23 14:39:12 +0000
+@@ -5150,14 +5150,6 @@
+ 			       optimize && can_create_pseudo_p ());
+           DONE;
+         }
+-
+-      if (TARGET_USE_MOVT && !target_word_relocations
+-	  && GET_CODE (operands[1]) == SYMBOL_REF
+-	  && !flag_pic && !arm_tls_referenced_p (operands[1]))
+-	{
+-	  arm_emit_movpair (operands[0], operands[1]);
+-	  DONE;
+-	}
+     }
+   else /* TARGET_THUMB1...  */
+     {
+@@ -5265,6 +5257,19 @@
+   "
+ )
+ 
++(define_split
++  [(set (match_operand:SI 0 "arm_general_register_operand" "")
++	(match_operand:SI 1 "general_operand" ""))]
++  "TARGET_32BIT
++   && TARGET_USE_MOVT && GET_CODE (operands[1]) == SYMBOL_REF
++   && !flag_pic && !target_word_relocations
++   && !arm_tls_referenced_p (operands[1])"
++  [(clobber (const_int 0))]
++{
++  arm_emit_movpair (operands[0], operands[1]);
++  DONE;
++})
++
+ (define_insn "*thumb1_movsi_insn"
+   [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*lhk")
+ 	(match_operand:SI 1 "general_operand"      "l, I,J,K,>,l,mi,l,*lhk"))]
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99371.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99371.patch
new file mode 100644
index 0000000000..be102160c5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99371.patch
@@ -0,0 +1,663 @@
+2010-08-24  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from FSF:
+
+	2010-08-07  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/arm/cortex-a9.md: Rewrite VFP Pipeline description.
+	* config/arm/arm.c (arm_xscale_tune): Initialize sched_adjust_cost.
+	 (arm_fastmul_tune,arm_slowmul_tune, arm_9e_tune): Likewise.
+	 (arm_adjust_cost): Split into xscale_sched_adjust_cost and a
+	 generic part.
+	 (cortex_a9_sched_adjust_cost): New function.
+	 (xscale_sched_adjust_cost): New function.
+	* config/arm/arm-protos.h (struct tune_params): New field
+	sched_adjust_cost.
+	* config/arm/arm-cores.def: Adjust costs for cortex-a9.
+
+	2010-04-17  Richard Earnshaw  <rearnsha@arm.com>
+
+	* arm-protos.h (tune_params): New structure.
+	* arm.c (current_tune): New variable.
+	(arm_constant_limit): Delete.
+	(struct processors): Add pointer to the tune parameters.
+	(arm_slowmul_tune): New tuning option.
+	(arm_fastmul_tune, arm_xscale_tune, arm_9e_tune): Likewise.
+	(all_cores): Adjust to pick up the tuning model.
+	(arm_constant_limit): New function.
+	(arm_override_options): Select the appropriate tuning model.  Delete
+	initialization of arm_const_limit.
+	(arm_split_constant): Use the new constant-limit model.
+	(arm_rtx_costs): Pick up the current tuning model.
+	* arm.md (is_strongarm, is_xscale): Delete.
+	* arm-generic.md (load_ldsched_x, load_ldsched): Test explicitly
+	for Xscale variant architectures.
+	(mult_ldsched_strongarm, mult_ldsched): Similarly for StrongARM.
+
+ 2010-08-23  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Backport from FSF:
+
+=== modified file 'gcc/config/arm/arm-cores.def'
+--- old/gcc/config/arm/arm-cores.def	2010-07-29 15:53:39 +0000
++++ new/gcc/config/arm/arm-cores.def	2010-08-24 13:15:54 +0000
+@@ -120,7 +120,7 @@
+ ARM_CORE("arm1156t2f-s",  arm1156t2fs,  6T2,				 FL_LDSCHED | FL_VFPV2, 9e)
+ ARM_CORE("cortex-a5",	  cortexa5,	7A,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-a8",	  cortexa8,	7A,				 FL_LDSCHED, 9e)
+-ARM_CORE("cortex-a9",	  cortexa9,	7A,				 FL_LDSCHED, 9e)
++ARM_CORE("cortex-a9",	  cortexa9,	7A,				 FL_LDSCHED, cortex_a9)
+ ARM_CORE("cortex-r4",	  cortexr4,	7R,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-r4f",	  cortexr4f,	7R,				 FL_LDSCHED, 9e)
+ ARM_CORE("cortex-m4",	  cortexm4,	7EM,				 FL_LDSCHED, 9e)
+
+=== modified file 'gcc/config/arm/arm-generic.md'
+--- old/gcc/config/arm/arm-generic.md	2007-08-02 09:49:31 +0000
++++ new/gcc/config/arm/arm-generic.md	2010-08-24 13:15:54 +0000
+@@ -104,14 +104,14 @@
+   (and (eq_attr "generic_sched" "yes")
+        (and (eq_attr "ldsched" "yes") 
+ 	    (and (eq_attr "type" "load_byte,load1")
+-	         (eq_attr "is_xscale" "yes"))))
++	         (eq_attr "tune" "xscale,iwmmxt,iwmmxt2"))))
+   "core")
+ 
+ (define_insn_reservation "load_ldsched" 2
+   (and (eq_attr "generic_sched" "yes")
+        (and (eq_attr "ldsched" "yes") 
+ 	    (and (eq_attr "type" "load_byte,load1")
+-	         (eq_attr "is_xscale" "no"))))
++	         (eq_attr "tune" "!xscale,iwmmxt,iwmmxt2"))))
+   "core")
+ 
+ (define_insn_reservation "load_or_store" 2
+@@ -128,14 +128,16 @@
+ (define_insn_reservation "mult_ldsched_strongarm" 3
+   (and (eq_attr "generic_sched" "yes")
+        (and (eq_attr "ldsched" "yes") 
+-	    (and (eq_attr "is_strongarm" "yes")
++	    (and (eq_attr "tune"
++		  "strongarm,strongarm110,strongarm1100,strongarm1110")
+ 	         (eq_attr "type" "mult"))))
+   "core*2")
+ 
+ (define_insn_reservation "mult_ldsched" 4
+   (and (eq_attr "generic_sched" "yes")
+        (and (eq_attr "ldsched" "yes") 
+-	    (and (eq_attr "is_strongarm" "no")
++	    (and (eq_attr "tune"
++		  "!strongarm,strongarm110,strongarm1100,strongarm1110")
+ 	         (eq_attr "type" "mult"))))
+   "core*4")
+ 
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+--- old/gcc/config/arm/arm-protos.h	2010-08-10 13:31:21 +0000
++++ new/gcc/config/arm/arm-protos.h	2010-08-24 13:15:54 +0000
+@@ -214,4 +214,17 @@
+ 
+ extern void arm_order_regs_for_local_alloc (void);
+ 
++#ifdef RTX_CODE
++/* This needs to be here because we need RTX_CODE and similar.  */
++
++struct tune_params
++{
++  bool (*rtx_costs) (rtx, RTX_CODE, RTX_CODE, int *, bool);
++  bool (*sched_adjust_cost) (rtx, rtx, rtx, int *);
++  int constant_limit;
++};
++
++extern const struct tune_params *current_tune;
++#endif /* RTX_CODE */
++
+ #endif /* ! GCC_ARM_PROTOS_H */
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-20 16:21:01 +0000
++++ new/gcc/config/arm/arm.c	2010-08-24 13:15:54 +0000
+@@ -228,6 +228,8 @@
+ static void arm_trampoline_init (rtx, tree, rtx);
+ static rtx arm_trampoline_adjust_address (rtx);
+ static rtx arm_pic_static_addr (rtx orig, rtx reg);
++static bool cortex_a9_sched_adjust_cost (rtx, rtx, rtx, int *);
++static bool xscale_sched_adjust_cost (rtx, rtx, rtx, int *);
+ static bool arm_vector_alignment_reachable (const_tree type, bool is_packed);
+ static bool arm_builtin_support_vector_misalignment (enum machine_mode mode,
+ 						     const_tree type,
+@@ -545,6 +547,9 @@
+ /* The processor for which instructions should be scheduled.  */
+ enum processor_type arm_tune = arm_none;
+ 
++/* The current tuning set.  */
++const struct tune_params *current_tune;
++
+ /* The default processor used if not overridden by commandline.  */
+ static enum processor_type arm_default_cpu = arm_none;
+ 
+@@ -720,9 +725,6 @@
+    the next function.  */
+ static int after_arm_reorg = 0;
+ 
+-/* The maximum number of insns to be used when loading a constant.  */
+-static int arm_constant_limit = 3;
+-
+ enum arm_pcs arm_pcs_default;
+ 
+ /* For an explanation of these variables, see final_prescan_insn below.  */
+@@ -761,8 +763,44 @@
+   enum processor_type core;
+   const char *arch;
+   const unsigned long flags;
+-  bool (* rtx_costs) (rtx, enum rtx_code, enum rtx_code, int *, bool);
+-};
++  const struct tune_params *const tune;
++};
++
++const struct tune_params arm_slowmul_tune =
++{
++  arm_slowmul_rtx_costs,
++  NULL,
++  3
++};
++
++const struct tune_params arm_fastmul_tune =
++{
++  arm_fastmul_rtx_costs,
++  NULL,
++  1
++};
++
++const struct tune_params arm_xscale_tune =
++{
++  arm_xscale_rtx_costs,
++  xscale_sched_adjust_cost,
++  2
++};
++
++const struct tune_params arm_9e_tune =
++{
++  arm_9e_rtx_costs,
++  NULL,
++  1
++};
++
++const struct tune_params arm_cortex_a9_tune =
++{
++  arm_9e_rtx_costs,
++  cortex_a9_sched_adjust_cost,
++  1
++};
++
+ 
+ /* Not all of these give usefully different compilation alternatives,
+    but there is no simple way of generalizing them.  */
+@@ -770,7 +808,7 @@
+ {
+   /* ARM Cores */
+ #define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
+-  {NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, arm_##COSTS##_rtx_costs},
++  {NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, &arm_##COSTS##_tune},
+ #include "arm-cores.def"
+ #undef ARM_CORE
+   {NULL, arm_none, NULL, 0, NULL}
+@@ -779,7 +817,7 @@
+ static const struct processors all_architectures[] =
+ {
+   /* ARM Architectures */
+-  /* We don't specify rtx_costs here as it will be figured out
++  /* We don't specify tuning costs here as it will be figured out
+      from the core.  */
+ 
+   {"armv2",   arm2,       "2",   FL_CO_PROC | FL_MODE26 | FL_FOR_ARCH2, NULL},
+@@ -928,6 +966,13 @@
+   TLS_LE32
+ };
+ 
++/* The maximum number of insns to be used when loading a constant.  */
++inline static int
++arm_constant_limit (bool size_p)
++{
++  return size_p ? 1 : current_tune->constant_limit;
++}
++
+ /* Emit an insn that's a simple single-set.  Both the operands must be known
+    to be valid.  */
+ inline static rtx
+@@ -1478,6 +1523,7 @@
+     }
+ 
+   tune_flags = all_cores[(int)arm_tune].flags;
++  current_tune = all_cores[(int)arm_tune].tune;
+ 
+   if (target_fp16_format_name)
+     {
+@@ -1875,26 +1921,12 @@
+ 
+   if (optimize_size)
+     {
+-      arm_constant_limit = 1;
+-
+       /* If optimizing for size, bump the number of instructions that we
+          are prepared to conditionally execute (even on a StrongARM).  */
+       max_insns_skipped = 6;
+     }
+   else
+     {
+-      /* For processors with load scheduling, it never costs more than
+-         2 cycles to load a constant, and the load scheduler may well
+-	 reduce that to 1.  */
+-      if (arm_ld_sched)
+-        arm_constant_limit = 1;
+-
+-      /* On XScale the longer latency of a load makes it more difficult
+-         to achieve a good schedule, so it's faster to synthesize
+-	 constants that can be done in two insns.  */
+-      if (arm_tune_xscale)
+-        arm_constant_limit = 2;
+-
+       /* StrongARM has early execution of branches, so a sequence
+          that is worth skipping is shorter.  */
+       if (arm_tune_strongarm)
+@@ -2423,7 +2455,8 @@
+ 	  && !cond
+ 	  && (arm_gen_constant (code, mode, NULL_RTX, val, target, source,
+ 				1, 0)
+-	      > arm_constant_limit + (code != SET)))
++	      > (arm_constant_limit (optimize_function_for_size_p (cfun))
++		 + (code != SET))))
+ 	{
+ 	  if (code == SET)
+ 	    {
+@@ -7771,9 +7804,9 @@
+ 				   (enum rtx_code) outer_code, total);
+     }
+   else
+-    return all_cores[(int)arm_tune].rtx_costs (x, (enum rtx_code) code,
+-					       (enum rtx_code) outer_code,
+-					       total, speed);
++    return current_tune->rtx_costs (x, (enum rtx_code) code,
++				    (enum rtx_code) outer_code,
++				    total, speed);
+ }
+ 
+ /* RTX costs for cores with a slow MUL implementation.  Thumb-2 is not
+@@ -7918,7 +7951,8 @@
+    so it can be ignored.  */
+ 
+ static bool
+-arm_xscale_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed)
++arm_xscale_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
++		      int *total, bool speed)
+ {
+   enum machine_mode mode = GET_MODE (x);
+ 
+@@ -8119,15 +8153,15 @@
+   return TARGET_32BIT ? arm_arm_address_cost (x) : arm_thumb_address_cost (x);
+ }
+ 
+-static int
+-arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
++/* Adjust cost hook for XScale.  */
++static bool
++xscale_sched_adjust_cost (rtx insn, rtx link, rtx dep, int * cost)
+ {
+   rtx i_pat, d_pat;
+ 
+   /* Some true dependencies can have a higher cost depending
+      on precisely how certain input operands are used.  */
+-  if (arm_tune_xscale
+-      && REG_NOTE_KIND (link) == 0
++  if (REG_NOTE_KIND (link) == 0
+       && recog_memoized (insn) >= 0
+       && recog_memoized (dep) >= 0)
+     {
+@@ -8161,10 +8195,106 @@
+ 
+ 	      if (reg_overlap_mentioned_p (recog_data.operand[opno],
+ 					   shifted_operand))
+-		return 2;
++		{
++		  *cost = 2;
++		  return false;
++		}
+ 	    }
+ 	}
+     }
++  return true;
++}
++
++/* Adjust cost hook for Cortex A9.  */
++static bool
++cortex_a9_sched_adjust_cost (rtx insn, rtx link, rtx dep, int * cost)
++{
++  switch (REG_NOTE_KIND (link))
++    {
++    case REG_DEP_ANTI:
++      *cost = 0;
++      return false;
++
++    case REG_DEP_TRUE:
++    case REG_DEP_OUTPUT:
++	if (recog_memoized (insn) >= 0
++	    && recog_memoized (dep) >= 0)
++	  {
++	    if (GET_CODE (PATTERN (insn)) == SET)
++	      {
++		if (GET_MODE_CLASS 
++		    (GET_MODE (SET_DEST (PATTERN (insn)))) == MODE_FLOAT
++		  || GET_MODE_CLASS 
++		    (GET_MODE (SET_SRC (PATTERN (insn)))) == MODE_FLOAT)
++		  {
++		    enum attr_type attr_type_insn = get_attr_type (insn);
++		    enum attr_type attr_type_dep = get_attr_type (dep);
++
++		    /* By default all dependencies of the form
++		       s0 = s0 <op> s1
++		       s0 = s0 <op> s2
++		       have an extra latency of 1 cycle because
++		       of the input and output dependency in this
++		       case. However this gets modeled as an true
++		       dependency and hence all these checks.  */
++		    if (REG_P (SET_DEST (PATTERN (insn)))
++			&& REG_P (SET_DEST (PATTERN (dep)))
++			&& reg_overlap_mentioned_p (SET_DEST (PATTERN (insn)),
++						    SET_DEST (PATTERN (dep))))
++		      {
++			/* FMACS is a special case where the dependant
++			   instruction can be issued 3 cycles before
++			   the normal latency in case of an output 
++			   dependency.  */
++			if ((attr_type_insn == TYPE_FMACS
++			     || attr_type_insn == TYPE_FMACD)
++			    && (attr_type_dep == TYPE_FMACS
++				|| attr_type_dep == TYPE_FMACD))
++			  {
++			    if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
++			      *cost = insn_default_latency (dep) - 3;
++			    else
++			      *cost = insn_default_latency (dep);
++			    return false;
++			  }
++			else
++			  {
++			    if (REG_NOTE_KIND (link) == REG_DEP_OUTPUT)
++			      *cost = insn_default_latency (dep) + 1;
++			    else
++			      *cost = insn_default_latency (dep);
++			  }
++			return false;
++		      }
++		  }
++	      }
++	  }
++	break;
++
++    default:
++      gcc_unreachable ();
++    }
++
++  return true;
++}
++
++/* This function implements the target macro TARGET_SCHED_ADJUST_COST.
++   It corrects the value of COST based on the relationship between
++   INSN and DEP through the dependence LINK.  It returns the new
++   value. There is a per-core adjust_cost hook to adjust scheduler costs
++   and the per-core hook can choose to completely override the generic 
++   adjust_cost function. Only put bits of code into arm_adjust_cost that 
++   are common across all cores.  */
++static int
++arm_adjust_cost (rtx insn, rtx link, rtx dep, int cost)
++{
++  rtx i_pat, d_pat;
++
++  if (current_tune->sched_adjust_cost != NULL)
++    {
++      if (!current_tune->sched_adjust_cost (insn, link, dep, &cost))
++	return cost;
++    }
+ 
+   /* XXX This is not strictly true for the FPA.  */
+   if (REG_NOTE_KIND (link) == REG_DEP_ANTI
+@@ -8187,7 +8317,8 @@
+ 	 constant pool are cached, and that others will miss.  This is a
+ 	 hack.  */
+ 
+-      if ((GET_CODE (src_mem) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (src_mem))
++      if ((GET_CODE (src_mem) == SYMBOL_REF 
++	   && CONSTANT_POOL_ADDRESS_P (src_mem))
+ 	  || reg_mentioned_p (stack_pointer_rtx, src_mem)
+ 	  || reg_mentioned_p (frame_pointer_rtx, src_mem)
+ 	  || reg_mentioned_p (hard_frame_pointer_rtx, src_mem))
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-23 14:39:12 +0000
++++ new/gcc/config/arm/arm.md	2010-08-24 13:15:54 +0000
+@@ -150,13 +150,6 @@
+ ; patterns that share the same RTL in both ARM and Thumb code.
+ (define_attr "is_thumb" "no,yes" (const (symbol_ref "thumb_code")))
+ 
+-; IS_STRONGARM is set to 'yes' when compiling for StrongARM, it affects
+-; scheduling decisions for the load unit and the multiplier.
+-(define_attr "is_strongarm" "no,yes" (const (symbol_ref "arm_tune_strongarm")))
+-
+-; IS_XSCALE is set to 'yes' when compiling for XScale.
+-(define_attr "is_xscale" "no,yes" (const (symbol_ref "arm_tune_xscale")))
+-
+ ;; Operand number of an input operand that is shifted.  Zero if the
+ ;; given instruction does not shift one of its input operands.
+ (define_attr "shift" "" (const_int 0))
+
+=== modified file 'gcc/config/arm/cortex-a9.md'
+--- old/gcc/config/arm/cortex-a9.md	2009-10-31 16:40:03 +0000
++++ new/gcc/config/arm/cortex-a9.md	2010-08-24 13:15:54 +0000
+@@ -2,8 +2,10 @@
+ ;; Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+ ;; Originally written by CodeSourcery for VFP.
+ ;;
+-;; Integer core pipeline description contributed by ARM Ltd.
+-;;
++;; Rewritten by Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
++;; Integer Pipeline description contributed by ARM Ltd.
++;; VFP Pipeline description rewritten and contributed by ARM Ltd.
++
+ ;; This file is part of GCC.
+ ;;
+ ;; GCC is free software; you can redistribute it and/or modify it
+@@ -22,28 +24,27 @@
+ 
+ (define_automaton "cortex_a9")
+ 
+-;; The Cortex-A9 integer core is modelled as a dual issue pipeline that has
++;; The Cortex-A9 core is modelled as a dual issue pipeline that has
+ ;; the following components.
+ ;; 1. 1 Load Store Pipeline.
+ ;; 2. P0 / main pipeline for data processing instructions.
+ ;; 3. P1 / Dual pipeline for Data processing instructions.
+ ;; 4. MAC pipeline for multiply as well as multiply
+ ;;    and accumulate instructions.
+-;; 5. 1 VFP / Neon pipeline.
+-;; The Load/Store and VFP/Neon pipeline are multiplexed.
++;; 5. 1 VFP and an optional Neon unit.
++;; The Load/Store, VFP and Neon issue pipeline are multiplexed.
+ ;; The P0 / main pipeline and M1 stage of the MAC pipeline are
+ ;;   multiplexed.
+ ;; The P1 / dual pipeline and M2 stage of the MAC pipeline are
+ ;;   multiplexed.
+-;; There are only 4 register read ports and hence at any point of
++;; There are only 4 integer register read ports and hence at any point of
+ ;; time we can't have issue down the E1 and the E2 ports unless
+ ;; of course there are bypass paths that get exercised.
+ ;; Both P0 and P1 have 2 stages E1 and E2.
+ ;; Data processing instructions issue to E1 or E2 depending on
+ ;; whether they have an early shift or not.
+ 
+-
+-(define_cpu_unit "cortex_a9_vfp, cortex_a9_ls" "cortex_a9")
++(define_cpu_unit "ca9_issue_vfp_neon, cortex_a9_ls" "cortex_a9")
+ (define_cpu_unit "cortex_a9_p0_e1, cortex_a9_p0_e2" "cortex_a9")
+ (define_cpu_unit "cortex_a9_p1_e1, cortex_a9_p1_e2" "cortex_a9")
+ (define_cpu_unit "cortex_a9_p0_wb, cortex_a9_p1_wb" "cortex_a9")
+@@ -71,11 +72,7 @@
+ 
+ ;; Issue at the same time along the load store pipeline and
+ ;; the VFP / Neon pipeline is not possible.
+-;; FIXME:: At some point we need to model the issue
+-;; of the load store and the vfp being shared rather than anything else.
+-
+-(exclusion_set "cortex_a9_ls" "cortex_a9_vfp")
+-
++(exclusion_set "cortex_a9_ls" "ca9_issue_vfp_neon")
+ 
+ ;; Default data processing instruction without any shift
+ ;; The only exception to this is the mov instruction
+@@ -101,18 +98,13 @@
+ 
+ (define_insn_reservation "cortex_a9_load1_2" 4
+   (and (eq_attr "tune" "cortexa9")
+-       (eq_attr "type" "load1, load2, load_byte"))
++       (eq_attr "type" "load1, load2, load_byte, f_loads, f_loadd"))
+   "cortex_a9_ls")
+ 
+ ;; Loads multiples and store multiples can't be issued for 2 cycles in a
+ ;; row. The description below assumes that addresses are 64 bit aligned.
+ ;; If not, there is an extra cycle latency which is not modelled.
+ 
+-;; FIXME:: This bit might need to be reworked when we get to
+-;; tuning for the VFP because strictly speaking the ldm
+-;; is sent to the LSU unit as is and there is only an
+-;; issue restriction between the LSU and the VFP/ Neon unit.
+-
+ (define_insn_reservation "cortex_a9_load3_4" 5
+   (and (eq_attr "tune" "cortexa9")
+        (eq_attr "type" "load3, load4"))
+@@ -120,12 +112,13 @@
+ 
+ (define_insn_reservation "cortex_a9_store1_2" 0
+   (and (eq_attr "tune" "cortexa9")
+-       (eq_attr "type" "store1, store2"))
++       (eq_attr "type" "store1, store2, f_stores, f_stored"))
+   "cortex_a9_ls")
+ 
+ ;; Almost all our store multiples use an auto-increment
+ ;; form. Don't issue back to back load and store multiples
+ ;; because the load store unit will stall.
++
+ (define_insn_reservation "cortex_a9_store3_4" 0
+   (and (eq_attr "tune" "cortexa9")
+        (eq_attr "type" "store3, store4"))
+@@ -193,47 +186,79 @@
+ (define_insn_reservation "cortex_a9_call"  0
+   (and (eq_attr "tune" "cortexa9")
+        (eq_attr "type" "call"))
+-  "cortex_a9_issue_branch + cortex_a9_multcycle1 + cortex_a9_ls + cortex_a9_vfp")
++  "cortex_a9_issue_branch + cortex_a9_multcycle1 + cortex_a9_ls + ca9_issue_vfp_neon")
+ 
+ 
+ ;; Pipelining for VFP instructions.
+-
+-(define_insn_reservation "cortex_a9_ffarith" 1
++;; Issue happens either along load store unit or the VFP / Neon unit.
++;; Pipeline   Instruction Classification.
++;; FPS - fcpys, ffariths, ffarithd,r_2_f,f_2_r
++;; FP_ADD   - fadds, faddd, fcmps (1)
++;; FPMUL   - fmul{s,d}, fmac{s,d}
++;; FPDIV - fdiv{s,d}
++(define_cpu_unit "ca9fps" "cortex_a9")
++(define_cpu_unit "ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4" "cortex_a9")
++(define_cpu_unit "ca9fp_mul1, ca9fp_mul2 , ca9fp_mul3, ca9fp_mul4" "cortex_a9")
++(define_cpu_unit "ca9fp_ds1" "cortex_a9")
++
++
++;; fmrs, fmrrd, fmstat and fmrx - The data is available after 1 cycle.
++(define_insn_reservation "cortex_a9_fps" 2
+  (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fcpys,ffariths,ffarithd,fcmps,fcmpd,fconsts,fconstd"))
+- "cortex_a9_vfp")
++      (eq_attr "type" "fcpys, fconsts, fconstd, ffariths, ffarithd, r_2_f, f_2_r, f_flag"))
++ "ca9_issue_vfp_neon + ca9fps")
++
++(define_bypass 1
++  "cortex_a9_fps"
++  "cortex_a9_fadd, cortex_a9_fps, cortex_a9_fcmp, cortex_a9_dp, cortex_a9_dp_shift, cortex_a9_multiply")
++
++;; Scheduling on the FP_ADD pipeline.
++(define_reservation "ca9fp_add" "ca9_issue_vfp_neon + ca9fp_add1, ca9fp_add2, ca9fp_add3, ca9fp_add4")
+ 
+ (define_insn_reservation "cortex_a9_fadd" 4
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fadds,faddd,f_cvt"))
+- "cortex_a9_vfp")
+-
+-(define_insn_reservation "cortex_a9_fmuls" 5
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fmuls"))
+- "cortex_a9_vfp")
+-
+-(define_insn_reservation "cortex_a9_fmuld" 6
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fmuld"))
+- "cortex_a9_vfp*2")
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fadds, faddd, f_cvt"))
++  "ca9fp_add")
++
++(define_insn_reservation "cortex_a9_fcmp" 1
++  (and (eq_attr "tune" "cortexa9")
++      (eq_attr "type" "fcmps, fcmpd"))
++ "ca9_issue_vfp_neon + ca9fp_add1")
++
++;; Scheduling for the Multiply and MAC instructions.
++(define_reservation "ca9fmuls"
++  "ca9fp_mul1 + ca9_issue_vfp_neon, ca9fp_mul2, ca9fp_mul3, ca9fp_mul4")
++
++(define_reservation "ca9fmuld"
++  "ca9fp_mul1 + ca9_issue_vfp_neon, (ca9fp_mul1 + ca9fp_mul2), ca9fp_mul2, ca9fp_mul3, ca9fp_mul4")
++
++(define_insn_reservation "cortex_a9_fmuls" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fmuls"))
++  "ca9fmuls")
++
++(define_insn_reservation "cortex_a9_fmuld" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fmuld"))
++  "ca9fmuld")
+ 
+ (define_insn_reservation "cortex_a9_fmacs" 8
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fmacs"))
+- "cortex_a9_vfp")
+-
+-(define_insn_reservation "cortex_a9_fmacd" 8
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fmacd"))
+- "cortex_a9_vfp*2")
+-
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fmacs"))
++  "ca9fmuls, ca9fp_add")
++
++(define_insn_reservation "cortex_a9_fmacd" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fmacd"))
++  "ca9fmuld, ca9fp_add")
++
++;; Division pipeline description.
+ (define_insn_reservation "cortex_a9_fdivs" 15
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fdivs"))
+- "cortex_a9_vfp*10")
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fdivs"))
++  "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*14")
+ 
+ (define_insn_reservation "cortex_a9_fdivd" 25
+- (and (eq_attr "tune" "cortexa9")
+-      (eq_attr "type" "fdivd"))
+- "cortex_a9_vfp*20")
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "type" "fdivd"))
++  "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99372.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99372.patch
new file mode 100644
index 0000000000..03b478b798
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99372.patch
@@ -0,0 +1,380 @@
+2010-08-25  Andrew Stubbs  <ams@codesourcery.com>
+
+	Revert:
+
+	2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+	
+	2010-04-11  Julian Brown  <julian@codesourcery.com>
+
+	Issue #7326
+
+	gcc/
+	* config/arm/arm.c (arm_issue_rate): Return 2 for Cortex-A5.
+	* config/arm/arm.md (generic_sched): No for Cortex-A5.
+	(generic_vfp): Likewise.
+	(cortex-a5.md): Include.
+	* config/arm/cortex-a5.md: New.
+
+ 2010-08-24  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Backport from FSF:
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-24 13:15:54 +0000
++++ new/gcc/config/arm/arm.c	2010-08-25 16:20:13 +0000
+@@ -22472,7 +22472,6 @@
+     {
+     case cortexr4:
+     case cortexr4f:
+-    case cortexa5:
+     case cortexa8:
+     case cortexa9:
+       return 2;
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-24 13:15:54 +0000
++++ new/gcc/config/arm/arm.md	2010-08-25 16:20:13 +0000
+@@ -412,7 +412,7 @@
+ 
+ (define_attr "generic_sched" "yes,no"
+   (const (if_then_else 
+-          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9")
++          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa8,cortexa9")
+ 	      (eq_attr "tune_cortexr4" "yes"))
+           (const_string "no")
+           (const_string "yes"))))
+@@ -420,7 +420,7 @@
+ (define_attr "generic_vfp" "yes,no"
+   (const (if_then_else
+ 	  (and (eq_attr "fpu" "vfp")
+-	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9")
++	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa8,cortexa9")
+ 	       (eq_attr "tune_cortexr4" "no"))
+ 	  (const_string "yes")
+ 	  (const_string "no"))))
+@@ -444,7 +444,6 @@
+ (include "arm1020e.md")
+ (include "arm1026ejs.md")
+ (include "arm1136jfs.md")
+-(include "cortex-a5.md")
+ (include "cortex-a8.md")
+ (include "cortex-a9.md")
+ (include "cortex-r4.md")
+
+=== removed file 'gcc/config/arm/cortex-a5.md'
+--- old/gcc/config/arm/cortex-a5.md	2010-08-13 15:15:12 +0000
++++ new/gcc/config/arm/cortex-a5.md	1970-01-01 00:00:00 +0000
+@@ -1,310 +0,0 @@
+-;; ARM Cortex-A5 pipeline description
+-;; Copyright (C) 2010 Free Software Foundation, Inc.
+-;; Contributed by CodeSourcery.
+-;;
+-;; This file is part of GCC.
+-;;
+-;; GCC is free software; you can redistribute it and/or modify it
+-;; under the terms of the GNU General Public License as published by
+-;; the Free Software Foundation; either version 3, or (at your option)
+-;; any later version.
+-;;
+-;; GCC is distributed in the hope that it will be useful, but
+-;; WITHOUT ANY WARRANTY; without even the implied warranty of
+-;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+-;; General Public License for more details.
+-;;
+-;; You should have received a copy of the GNU General Public License
+-;; along with GCC; see the file COPYING3.  If not see
+-;; <http://www.gnu.org/licenses/>.
+-
+-(define_automaton "cortex_a5")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Functional units.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; The integer (ALU) pipeline.  There are five DPU pipeline stages. However the
+-;; decode/issue stages operate the same for all instructions, so do not model
+-;; them.  We only need to model the first execute stage because instructions
+-;; always advance one stage per cycle in order. Only branch instructions may
+-;; dual-issue, so a single unit  covers all of the LS, ALU, MAC and FPU
+-;; pipelines.
+-
+-(define_cpu_unit "cortex_a5_ex1" "cortex_a5")
+-
+-;; The branch pipeline.  Branches can dual-issue with other instructions
+-;; (except when those instructions take multiple cycles to issue).
+-
+-(define_cpu_unit "cortex_a5_branch" "cortex_a5")
+-
+-;; Pseudo-unit for blocking the multiply pipeline when a double-precision
+-;; multiply is in progress.
+-
+-(define_cpu_unit "cortex_a5_fpmul_pipe" "cortex_a5")
+-
+-;; The floating-point add pipeline (ex1/f1 stage), used to model the usage
+-;; of the add pipeline by fmac instructions, etc.
+-
+-(define_cpu_unit "cortex_a5_fpadd_pipe" "cortex_a5")
+-
+-;; Floating-point div/sqrt (long latency, out-of-order completion).
+-
+-(define_cpu_unit "cortex_a5_fp_div_sqrt" "cortex_a5")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; ALU instructions.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-(define_insn_reservation "cortex_a5_alu" 2
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "alu"))
+-  "cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_alu_shift" 2
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "alu_shift,alu_shift_reg"))
+-  "cortex_a5_ex1")
+-
+-;; Forwarding path for unshifted operands.
+-
+-(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
+-  "cortex_a5_alu")
+-
+-(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
+-  "cortex_a5_alu_shift"
+-  "arm_no_early_alu_shift_dep")
+-
+-;; The multiplier pipeline can forward results from wr stage only (so I don't
+-;; think there's any need to specify bypasses).
+-
+-(define_insn_reservation "cortex_a5_mul" 2
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "mult"))
+-  "cortex_a5_ex1")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Load/store instructions.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; Address-generation happens in the issue stage, which is one stage behind
+-;; the ex1 stage (the first stage we care about for scheduling purposes). The
+-;; dc1 stage is parallel with ex1, dc2 with ex2 and rot with wr.
+-
+-;; FIXME: These might not be entirely accurate for load2, load3, load4. I think
+-;; they make sense since there's a 32-bit interface between the DPU and the DCU,
+-;; so we can't load more than that per cycle.  The store2, store3, store4
+-;; reservations are similarly guessed.
+-
+-(define_insn_reservation "cortex_a5_load1" 2
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "load_byte,load1"))
+-  "cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_store1" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "store1"))
+-  "cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_load2" 3
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "load2"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_store2" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "store2"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_load3" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "load3"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
+-   cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_store3" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "store3"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
+-   cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_load4" 5
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "load3"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
+-   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_store4" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "store3"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
+-   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Branches.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; Direct branches are the only instructions we can dual-issue (also IT and
+-;; nop, but those aren't very interesting for scheduling).  (The latency here
+-;; is meant to represent when the branch actually takes place, but may not be
+-;; entirely correct.)
+-
+-(define_insn_reservation "cortex_a5_branch" 3
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "branch,call"))
+-  "cortex_a5_branch")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Floating-point arithmetic.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-(define_insn_reservation "cortex_a5_fpalu" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys, fmuls, f_cvt,\
+-			fcmps, fcmpd"))
+-  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
+-
+-;; For fconsts and fconstd, 8-bit immediate data is passed directly from
+-;; f1 to f3 (which I think reduces the latency by one cycle).
+-
+-(define_insn_reservation "cortex_a5_fconst" 3
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fconsts,fconstd"))
+-  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
+-
+-;; We should try not to attempt to issue a single-precision multiplication in
+-;; the middle of a double-precision multiplication operation (the usage of
+-;; cortex_a5_fpmul_pipe).
+-
+-(define_insn_reservation "cortex_a5_fpmuls" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fmuls"))
+-  "cortex_a5_ex1+cortex_a5_fpmul_pipe")
+-
+-;; For single-precision multiply-accumulate, the add (accumulate) is issued
+-;; whilst the multiply is in F4.  The multiply result can then be forwarded
+-;; from F5 to F1.  The issue unit is only used once (when we first start
+-;; processing the instruction), but the usage of the FP add pipeline could
+-;; block other instructions attempting to use it simultaneously.  We try to
+-;; avoid that using cortex_a5_fpadd_pipe.
+-
+-(define_insn_reservation "cortex_a5_fpmacs" 8
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fmacs"))
+-  "cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
+-
+-;; Non-multiply instructions can issue in the middle two instructions of a
+-;; double-precision multiply.  Note that it isn't entirely clear when a branch
+-;; can dual-issue when a multi-cycle multiplication is in progress; we ignore
+-;; that for now though.
+-
+-(define_insn_reservation "cortex_a5_fpmuld" 7
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fmuld"))
+-  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
+-   cortex_a5_ex1+cortex_a5_fpmul_pipe")
+-
+-(define_insn_reservation "cortex_a5_fpmacd" 11
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fmacd"))
+-  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
+-   cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; Floating-point divide/square root instructions.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; ??? Not sure if the 14 cycles taken for single-precision divide to complete
+-;; includes the time taken for the special instruction used to collect the
+-;; result to travel down the multiply pipeline, or not.  Assuming so.  (If
+-;; that's wrong, the latency should be increased by a few cycles.)
+-
+-;; fsqrt takes one cycle less, but that is not modelled, nor is the use of the
+-;; multiply pipeline to collect the divide/square-root result.
+-
+-(define_insn_reservation "cortex_a5_fdivs" 14
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fdivs"))
+-  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 13")
+-
+-;; ??? Similarly for fdivd.
+-
+-(define_insn_reservation "cortex_a5_fdivd" 29
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "fdivd"))
+-  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 28")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP to/from core transfers.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; FP loads take data from wr/rot/f3.  Might need to define bypasses to model
+-;; this?
+-
+-;; Core-to-VFP transfers use the multiply pipeline.
+-;; Not sure about this at all... I think we need some bypasses too.
+-
+-(define_insn_reservation "cortex_a5_r2f" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "r_2_f"))
+-  "cortex_a5_ex1")
+-
+-;; Not sure about this either. 6.8.7 says "Additionally, the store pipe used
+-;; for store and FP->core register transfers can forward into the F2 and F3
+-;; stages."
+-;; This doesn't correspond to what we have though.
+-
+-(define_insn_reservation "cortex_a5_f2r" 2
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_2_r"))
+-  "cortex_a5_ex1")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP flag transfer.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-;; ??? The flag forwarding described in section 6.8.11 of the Cortex-A5 DPU
+-;; specification (from fmstat to the ex2 stage of the second instruction) is
+-;; not modeled at present.
+-
+-(define_insn_reservation "cortex_a5_f_flags" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_flag"))
+-  "cortex_a5_ex1")
+-
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-;; VFP load/store.
+-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+-
+-(define_insn_reservation "cortex_a5_f_loads" 4
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_loads"))
+-  "cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_f_loadd" 5
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_load,f_loadd"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_f_stores" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_stores"))
+-  "cortex_a5_ex1")
+-
+-(define_insn_reservation "cortex_a5_f_stored" 0
+-  (and (eq_attr "tune" "cortexa5")
+-       (eq_attr "type" "f_store,f_stored"))
+-  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
+-
+-;; Load-to-use for floating-point values has a penalty of one cycle, i.e. a
+-;; latency of two (6.8.3).
+-
+-(define_bypass 2 "cortex_a5_f_loads"
+-                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
+-		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
+-		  cortex_a5_f2r")
+-
+-(define_bypass 3 "cortex_a5_f_loadd"
+-                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
+-		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
+-		  cortex_a5_f2r")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99373.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99373.patch
new file mode 100644
index 0000000000..60608e4813
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99373.patch
@@ -0,0 +1,360 @@
+	Backport from FSF:
+
+	2010-08-25  Julian Brown  <julian@codesourcery.com>
+
+	* config/arm/arm.c (arm_issue_rate): Return 2 for Cortex-A5.
+	* config/arm/arm.md (generic_sched): No for Cortex-A5.
+	(generic_vfp): Likewise.
+	(cortex-a5.md): Include.
+	* config/arm/cortex-a5.md: New.
+
+2010-08-25  Andrew Stubbs  <ams@codesourcery.com>
+
+ 	Revert:
+ 
+ 	2010-07-26  Julian Brown  <julian@codesourcery.com>
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-25 16:20:13 +0000
++++ new/gcc/config/arm/arm.c	2010-08-25 16:22:17 +0000
+@@ -22472,6 +22472,7 @@
+     {
+     case cortexr4:
+     case cortexr4f:
++    case cortexa5:
+     case cortexa8:
+     case cortexa9:
+       return 2;
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-25 16:20:13 +0000
++++ new/gcc/config/arm/arm.md	2010-08-25 16:22:17 +0000
+@@ -412,7 +412,7 @@
+ 
+ (define_attr "generic_sched" "yes,no"
+   (const (if_then_else 
+-          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa8,cortexa9")
++          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9")
+ 	      (eq_attr "tune_cortexr4" "yes"))
+           (const_string "no")
+           (const_string "yes"))))
+@@ -420,7 +420,7 @@
+ (define_attr "generic_vfp" "yes,no"
+   (const (if_then_else
+ 	  (and (eq_attr "fpu" "vfp")
+-	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa8,cortexa9")
++	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9")
+ 	       (eq_attr "tune_cortexr4" "no"))
+ 	  (const_string "yes")
+ 	  (const_string "no"))))
+@@ -444,6 +444,7 @@
+ (include "arm1020e.md")
+ (include "arm1026ejs.md")
+ (include "arm1136jfs.md")
++(include "cortex-a5.md")
+ (include "cortex-a8.md")
+ (include "cortex-a9.md")
+ (include "cortex-r4.md")
+
+=== added file 'gcc/config/arm/cortex-a5.md'
+--- old/gcc/config/arm/cortex-a5.md	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/cortex-a5.md	2010-08-25 16:22:17 +0000
+@@ -0,0 +1,297 @@
++;; ARM Cortex-A5 pipeline description
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;; Contributed by CodeSourcery.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.
++
++(define_automaton "cortex_a5")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Functional units.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; The integer (ALU) pipeline.  There are five DPU pipeline
++;; stages. However the decode/issue stages operate the same for all
++;; instructions, so do not model them.  We only need to model the
++;; first execute stage because instructions always advance one stage
++;; per cycle in order.  Only branch instructions may dual-issue, so a
++;; single unit covers all of the LS, ALU, MAC and FPU pipelines.
++
++(define_cpu_unit "cortex_a5_ex1" "cortex_a5")
++
++;; The branch pipeline.  Branches can dual-issue with other instructions
++;; (except when those instructions take multiple cycles to issue).
++
++(define_cpu_unit "cortex_a5_branch" "cortex_a5")
++
++;; Pseudo-unit for blocking the multiply pipeline when a double-precision
++;; multiply is in progress.
++
++(define_cpu_unit "cortex_a5_fpmul_pipe" "cortex_a5")
++
++;; The floating-point add pipeline (ex1/f1 stage), used to model the usage
++;; of the add pipeline by fmac instructions, etc.
++
++(define_cpu_unit "cortex_a5_fpadd_pipe" "cortex_a5")
++
++;; Floating-point div/sqrt (long latency, out-of-order completion).
++
++(define_cpu_unit "cortex_a5_fp_div_sqrt" "cortex_a5")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; ALU instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_alu" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "alu"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_alu_shift" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "alu_shift,alu_shift_reg"))
++  "cortex_a5_ex1")
++
++;; Forwarding path for unshifted operands.
++
++(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
++  "cortex_a5_alu")
++
++(define_bypass 1 "cortex_a5_alu,cortex_a5_alu_shift"
++  "cortex_a5_alu_shift"
++  "arm_no_early_alu_shift_dep")
++
++;; The multiplier pipeline can forward results from wr stage only so 
++;; there's no need to specify bypasses).
++
++(define_insn_reservation "cortex_a5_mul" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "mult"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Load/store instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; Address-generation happens in the issue stage, which is one stage behind
++;; the ex1 stage (the first stage we care about for scheduling purposes). The
++;; dc1 stage is parallel with ex1, dc2 with ex2 and rot with wr.
++
++(define_insn_reservation "cortex_a5_load1" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load_byte,load1"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store1" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store1"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load2" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load2"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store2" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store2"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load3" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store3" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_load4" 5
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "load3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_store4" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "store3"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1+cortex_a5_branch,\
++   cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Branches.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; Direct branches are the only instructions we can dual-issue (also IT and
++;; nop, but those aren't very interesting for scheduling).  (The latency here
++;; is meant to represent when the branch actually takes place, but may not be
++;; entirely correct.)
++
++(define_insn_reservation "cortex_a5_branch" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "branch,call"))
++  "cortex_a5_branch")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point arithmetic.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_fpalu" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "ffariths, fadds, ffarithd, faddd, fcpys, fmuls, f_cvt,\
++			fcmps, fcmpd"))
++  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
++
++;; For fconsts and fconstd, 8-bit immediate data is passed directly from
++;; f1 to f3 (which I think reduces the latency by one cycle).
++
++(define_insn_reservation "cortex_a5_fconst" 3
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fconsts,fconstd"))
++  "cortex_a5_ex1+cortex_a5_fpadd_pipe")
++
++;; We should try not to attempt to issue a single-precision multiplication in
++;; the middle of a double-precision multiplication operation (the usage of
++;; cortex_a5_fpmul_pipe).
++
++(define_insn_reservation "cortex_a5_fpmuls" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmuls"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe")
++
++;; For single-precision multiply-accumulate, the add (accumulate) is issued
++;; whilst the multiply is in F4.  The multiply result can then be forwarded
++;; from F5 to F1.  The issue unit is only used once (when we first start
++;; processing the instruction), but the usage of the FP add pipeline could
++;; block other instructions attempting to use it simultaneously.  We try to
++;; avoid that using cortex_a5_fpadd_pipe.
++
++(define_insn_reservation "cortex_a5_fpmacs" 8
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmacs"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
++
++;; Non-multiply instructions can issue in the middle two instructions of a
++;; double-precision multiply.  Note that it isn't entirely clear when a branch
++;; can dual-issue when a multi-cycle multiplication is in progress; we ignore
++;; that for now though.
++
++(define_insn_reservation "cortex_a5_fpmuld" 7
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmuld"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
++   cortex_a5_ex1+cortex_a5_fpmul_pipe")
++
++(define_insn_reservation "cortex_a5_fpmacd" 11
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fmacd"))
++  "cortex_a5_ex1+cortex_a5_fpmul_pipe, cortex_a5_fpmul_pipe*2,\
++   cortex_a5_ex1+cortex_a5_fpmul_pipe, nothing*3, cortex_a5_fpadd_pipe")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; Floating-point divide/square root instructions.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; ??? Not sure if the 14 cycles taken for single-precision divide to complete
++;; includes the time taken for the special instruction used to collect the
++;; result to travel down the multiply pipeline, or not.  Assuming so.  (If
++;; that's wrong, the latency should be increased by a few cycles.)
++
++;; fsqrt takes one cycle less, but that is not modelled, nor is the use of the
++;; multiply pipeline to collect the divide/square-root result.
++
++(define_insn_reservation "cortex_a5_fdivs" 14
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fdivs"))
++  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 13")
++
++;; ??? Similarly for fdivd.
++
++(define_insn_reservation "cortex_a5_fdivd" 29
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "fdivd"))
++  "cortex_a5_ex1, cortex_a5_fp_div_sqrt * 28")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP to/from core transfers.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; FP loads take data from wr/rot/f3.
++
++;; Core-to-VFP transfers use the multiply pipeline.
++
++(define_insn_reservation "cortex_a5_r2f" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "r_2_f"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f2r" 2
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_2_r"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP flag transfer.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++;; ??? The flag forwarding from fmstat to the ex2 stage of the second
++;; instruction is not modeled at present.
++
++(define_insn_reservation "cortex_a5_f_flags" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_flag"))
++  "cortex_a5_ex1")
++
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++;; VFP load/store.
++;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
++
++(define_insn_reservation "cortex_a5_f_loads" 4
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_loads"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_loadd" 5
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_load,f_loadd"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_stores" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_stores"))
++  "cortex_a5_ex1")
++
++(define_insn_reservation "cortex_a5_f_stored" 0
++  (and (eq_attr "tune" "cortexa5")
++       (eq_attr "type" "f_store,f_stored"))
++  "cortex_a5_ex1+cortex_a5_branch, cortex_a5_ex1")
++
++;; Load-to-use for floating-point values has a penalty of one cycle,
++;; i.e. a latency of two.
++
++(define_bypass 2 "cortex_a5_f_loads"
++                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
++		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
++		  cortex_a5_f2r")
++
++(define_bypass 3 "cortex_a5_f_loadd"
++                 "cortex_a5_fpalu, cortex_a5_fpmacs, cortex_a5_fpmuld,\
++		  cortex_a5_fpmacd, cortex_a5_fdivs, cortex_a5_fdivd,\
++		  cortex_a5_f2r")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99374.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99374.patch
new file mode 100644
index 0000000000..dfe193ff28
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99374.patch
@@ -0,0 +1,72 @@
+2010-08-26  Andrew Stubbs  <ams@codesourcery.com>
+
+	Merge from Ubuntu GCC:
+
+	GCC bugzilla PR objc/41848.
+
+	gcc/
+	* objc/lang-specs.h: Work around ObjC and -fsection-anchors.
+
+	gcc/testsuite/
+	* objc/execute/forward-1.x: Update for ARM.
+
+ 2010-08-25  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Backport from FSF:
+
+=== modified file 'gcc/objc/lang-specs.h'
+--- old/gcc/objc/lang-specs.h	2007-08-02 09:37:36 +0000
++++ new/gcc/objc/lang-specs.h	2010-08-26 14:02:04 +0000
+@@ -26,29 +26,33 @@
+   {"@objective-c",
+      "%{E|M|MM:cc1obj -E %{traditional|ftraditional|traditional-cpp:-traditional-cpp}\
+           %(cpp_options) %(cpp_debug_options)}\
++        %{fsection-anchors: %eGNU Objective C can't use -fsection-anchors} \
+       %{!E:%{!M:%{!MM:\
+ 	%{traditional|ftraditional|traditional-cpp:\
+ %eGNU Objective C no longer supports traditional compilation}\
+ 	%{save-temps|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps:%b.mi} %{!save-temps:%g.mi} \n\
+-	    cc1obj -fpreprocessed %{save-temps:%b.mi} %{!save-temps:%g.mi} %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}\
++           cc1obj -fpreprocessed -fno-section-anchors %{save-temps:%b.mi} %{!save-temps:%g.mi} %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}\
+ 	%{!save-temps:%{!no-integrated-cpp:\
+-	    cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}}\
++	    cc1obj %(cpp_unique_options) -fno-section-anchors %(cc1_options) %{print-objc-runtime-info} %{gen-decls}}}\
+         %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
+   {".mi", "@objc-cpp-output", 0, 0, 0},
+   {"@objc-cpp-output",
+-     "%{!M:%{!MM:%{!E:cc1obj -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
+-			     %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0},
++     "%{!M:%{!MM:%{!E:cc1obj -fno-section-anchors -fpreprocessed %i %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++			     %{!fsyntax-only:%(invoke_as)}}}}   \
++    %{fsection-anchors: %eGNU Objective C can't use -fsection-anchors} ", 0, 0, 0},
+   {"@objective-c-header",
+      "%{E|M|MM:cc1obj -E %{traditional|ftraditional|traditional-cpp:-traditional-cpp}\
+           %(cpp_options) %(cpp_debug_options)}\
++        %{fsection-anchors: %eGNU Objective C can't use -fsection-anchors} \
+       %{!E:%{!M:%{!MM:\
+ 	%{traditional|ftraditional|traditional-cpp:\
+ %eGNU Objective C no longer supports traditional compilation}\
+ 	%{save-temps|no-integrated-cpp:cc1obj -E %(cpp_options) -o %{save-temps:%b.mi} %{!save-temps:%g.mi} \n\
+-	    cc1obj -fpreprocessed %b.mi %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++	    cc1obj -fpreprocessed %b.mi %(cc1_options) -fno-section-anchors %{print-objc-runtime-info} %{gen-decls}\
+                         -o %g.s %{!o*:--output-pch=%i.gch}\
+                         %W{o*:--output-pch=%*}%V}\
++        %{fsection-anchors: %eGNU Objective C can't use -fsection-anchors} \
+ 	%{!save-temps:%{!no-integrated-cpp:\
+-	    cc1obj %(cpp_unique_options) %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
++	    cc1obj %(cpp_unique_options) -fno-section-anchors %(cc1_options) %{print-objc-runtime-info} %{gen-decls}\
+                         -o %g.s %{!o*:--output-pch=%i.gch}\
+                         %W{o*:--output-pch=%*}%V}}}}}", 0, 0, 0},
+
+=== modified file 'gcc/testsuite/objc/execute/forward-1.x'
+--- old/gcc/testsuite/objc/execute/forward-1.x	2010-03-25 22:25:05 +0000
++++ new/gcc/testsuite/objc/execute/forward-1.x	2010-08-26 14:02:04 +0000
+@@ -4,6 +4,7 @@
+ 
+ if { ([istarget x86_64-*-linux*] && [check_effective_target_lp64] )
+      || [istarget powerpc*-*-linux*]
++     || [istarget arm*]
+      || [istarget powerpc*-*-aix*]
+      || [istarget s390*-*-*-linux*]
+      || [istarget sh4-*-linux*]
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99375.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99375.patch
new file mode 100644
index 0000000000..fac64b9642
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99375.patch
@@ -0,0 +1,146 @@
+2010-08-26  Maciej Rozycki  <macro@codesourcery.com>
+
+	Merge from Sourcery G++ 4.4:
+
+	2009-02-17  Andrew Jenner  <andrew@codesourcery.com>
+	            Maciej Rozycki  <macro@codesourcery.com>
+
+	gcc/
+	* unwind.inc (_Unwind_RaiseException): Use return value of
+	uw_init_context.
+	* unwind-dw2.c (uw_init_context): Make macro an expression instead of
+	a statement.
+	(uw_init_context_1): Add return value.
+	* unwind-sjlj.c (uw_init_context): Add return value.
+
+ 2010-08-26  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Merge from Ubuntu GCC:
+
+=== modified file 'gcc/unwind-dw2.c'
+--- old/gcc/unwind-dw2.c	2010-04-27 08:41:30 +0000
++++ new/gcc/unwind-dw2.c	2010-08-26 15:38:19 +0000
+@@ -1414,16 +1414,12 @@
+ /* Fill in CONTEXT for top-of-stack.  The only valid registers at this
+    level will be the return address and the CFA.  */
+ 
+-#define uw_init_context(CONTEXT)					   \
+-  do									   \
+-    {									   \
+-      /* Do any necessary initialization to access arbitrary stack frames. \
+-	 On the SPARC, this means flushing the register windows.  */	   \
+-      __builtin_unwind_init ();						   \
+-      uw_init_context_1 (CONTEXT, __builtin_dwarf_cfa (),		   \
+-			 __builtin_return_address (0));			   \
+-    }									   \
+-  while (0)
++#define uw_init_context(CONTEXT)					\
++  /* Do any necessary initialization to access arbitrary stack frames.	\
++     On the SPARC, this means flushing the register windows.  */	\
++  (__builtin_unwind_init (),						\
++   uw_init_context_1 ((CONTEXT), __builtin_dwarf_cfa (),		\
++		      __builtin_return_address (0)))
+ 
+ static inline void
+ init_dwarf_reg_size_table (void)
+@@ -1431,7 +1427,7 @@
+   __builtin_init_dwarf_reg_size_table (dwarf_reg_size_table);
+ }
+ 
+-static void __attribute__((noinline))
++static _Unwind_Reason_Code __attribute__((noinline))
+ uw_init_context_1 (struct _Unwind_Context *context,
+ 		   void *outer_cfa, void *outer_ra)
+ {
+@@ -1445,7 +1441,8 @@
+   context->flags = EXTENDED_CONTEXT_BIT;
+ 
+   code = uw_frame_state_for (context, &fs);
+-  gcc_assert (code == _URC_NO_REASON);
++  if (code != _URC_NO_REASON)
++    return code;
+ 
+ #if __GTHREADS
+   {
+@@ -1471,6 +1468,8 @@
+      initialization context, then we can't see it in the given
+      call frame data.  So have the initialization context tell us.  */
+   context->ra = __builtin_extract_return_addr (outer_ra);
++
++  return _URC_NO_REASON;
+ }
+ 
+ static void _Unwind_DebugHook (void *, void *)
+
+=== modified file 'gcc/unwind-sjlj.c'
+--- old/gcc/unwind-sjlj.c	2009-04-09 14:00:19 +0000
++++ new/gcc/unwind-sjlj.c	2010-08-26 15:38:19 +0000
+@@ -292,10 +292,11 @@
+   uw_update_context (context, fs);
+ }
+ 
+-static inline void
++static inline _Unwind_Reason_Code
+ uw_init_context (struct _Unwind_Context *context)
+ {
+   context->fc = _Unwind_SjLj_GetContext ();
++  return _URC_NO_REASON;
+ }
+ 
+ static void __attribute__((noreturn))
+
+=== modified file 'gcc/unwind.inc'
+--- old/gcc/unwind.inc	2009-04-09 14:00:19 +0000
++++ new/gcc/unwind.inc	2010-08-26 15:38:19 +0000
+@@ -85,7 +85,8 @@
+   _Unwind_Reason_Code code;
+ 
+   /* Set up this_context to describe the current stack frame.  */
+-  uw_init_context (&this_context);
++  code = uw_init_context (&this_context);
++  gcc_assert (code == _URC_NO_REASON);
+   cur_context = this_context;
+ 
+   /* Phase 1: Search.  Unwind the stack, calling the personality routine
+@@ -198,7 +199,8 @@
+   struct _Unwind_Context this_context, cur_context;
+   _Unwind_Reason_Code code;
+ 
+-  uw_init_context (&this_context);
++  code = uw_init_context (&this_context);
++  gcc_assert (code == _URC_NO_REASON);
+   cur_context = this_context;
+ 
+   exc->private_1 = (_Unwind_Ptr) stop;
+@@ -221,7 +223,8 @@
+   struct _Unwind_Context this_context, cur_context;
+   _Unwind_Reason_Code code;
+ 
+-  uw_init_context (&this_context);
++  code = uw_init_context (&this_context);
++  gcc_assert (code == _URC_NO_REASON);
+   cur_context = this_context;
+ 
+   /* Choose between continuing to process _Unwind_RaiseException
+@@ -251,7 +254,8 @@
+   if (exc->private_1 == 0)
+     return _Unwind_RaiseException (exc);
+ 
+-  uw_init_context (&this_context);
++  code = uw_init_context (&this_context);
++  gcc_assert (code == _URC_NO_REASON);
+   cur_context = this_context;
+ 
+   code = _Unwind_ForcedUnwind_Phase2 (exc, &cur_context);
+@@ -280,7 +284,9 @@
+   struct _Unwind_Context context;
+   _Unwind_Reason_Code code;
+ 
+-  uw_init_context (&context);
++  code = uw_init_context (&context);
++  if (code != _URC_NO_REASON)
++    return _URC_FATAL_PHASE1_ERROR;
+ 
+   while (1)
+     {
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99376.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99376.patch
new file mode 100644
index 0000000000..5e402a753e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99376.patch
@@ -0,0 +1,35 @@
+2010-08-26  Paul Brook  <paul@codesourcery.com>
+
+	Merge from Sourcery G++ 4.3/4.4:
+	2007-03-30  Paul Brook  <paul@codesourcery.com>
+	gcc/
+	* calls.c (store_one_arg): Check alignment of mode used for save.
+
+ 2010-08-26  Maciej Rozycki  <macro@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.4:
+
+=== modified file 'gcc/calls.c'
+--- old/gcc/calls.c	2010-08-13 10:50:45 +0000
++++ new/gcc/calls.c	2010-08-26 15:44:20 +0000
+@@ -4048,8 +4048,17 @@
+ 	      /* We need to make a save area.  */
+ 	      unsigned int size = arg->locate.size.constant * BITS_PER_UNIT;
+ 	      enum machine_mode save_mode = mode_for_size (size, MODE_INT, 1);
+-	      rtx adr = memory_address (save_mode, XEXP (arg->stack_slot, 0));
+-	      rtx stack_area = gen_rtx_MEM (save_mode, adr);
++	      rtx adr;
++	      rtx stack_area;
++
++	      /* We can only use save_mode if the arg is sufficiently
++	         aligned.  */
++	      if (STRICT_ALIGNMENT
++		  && GET_MODE_ALIGNMENT (save_mode) > arg->locate.boundary)
++		save_mode = BLKmode;
++
++	      adr = memory_address (save_mode, XEXP (arg->stack_slot, 0));
++	      stack_area = gen_rtx_MEM (save_mode, adr);
+ 
+ 	      if (save_mode == BLKmode)
+ 		{
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99377.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99377.patch
new file mode 100644
index 0000000000..d51f0874e3
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99377.patch
@@ -0,0 +1,28 @@
+	Issue #1510
+	2007-04-27  Paul Brook  <paul@codesourcery.com>
+	gcc/
+	* cse.c (cse_process_notes): Make sure PLUS are canonical.
+
+2010-08-26  Paul Brook  <paul@codesourcery.com>
+
+	Merge from Sourcery G++ 4.3/4.4:
+ 	2007-03-30  Paul Brook  <paul@codesourcery.com>
+ 	gcc/
+ 	* calls.c (store_one_arg): Check alignment of mode used for save.
+
+=== modified file 'gcc/cse.c'
+--- old/gcc/cse.c	2010-01-12 20:25:10 +0000
++++ new/gcc/cse.c	2010-08-26 15:53:20 +0000
+@@ -6061,6 +6061,11 @@
+       validate_change (object, &XEXP (x, i),
+ 		       cse_process_notes (XEXP (x, i), object, changed), 0);
+ 
++  /* Rebuild a PLUS expression in canonical form if the first operand
++     ends up as a constant.  */
++  if (code == PLUS && GET_CODE (XEXP (x, 0)) == CONST_INT)
++    return plus_constant (XEXP(x, 1), INTVAL (XEXP (x, 0)));
++
+   return x;
+ }
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99378.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99378.patch
new file mode 100644
index 0000000000..aacf19b7c9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99378.patch
@@ -0,0 +1,159 @@
+2010-08-27  Paul Brook  <paul@codesourcery.com>
+
+	gcc/
+	* config/arm/thumb2.md (thumb_andsi_not_shiftsi_si,
+	thumb2_notsi_shiftsi, thumb2_notsi_shiftsi_compare0,
+	thumb2_not_shiftsi_compare0_scratch, thumb2_cmpsi_shiftsi,
+	thumb2_cmpsi_shiftsi_swp, thumb2_cmpsi_neg_shiftsi,
+	thumb2_arith_shiftsi, thumb2_arith_shiftsi_compare0,
+	thumb2_arith_shiftsi_compare0_scratch, thumb2_sub_shiftsi,
+	thumb2_sub_shiftsi_compare0, thumb2_sub_shiftsi_compare0_scratch):
+	Use const_shift_count predicate for "M" constraints.
+	* config/arm/predicates.md (const_shift_operand): Remove.
+	(const_shift_count): New.
+
+	gcc/testsuite/
+	* gcc.dg/long-long-shift-1.c: New test.
+
+ 2010-08-26  Paul Brook  <paul@codesourcery.com>
+ 
+ 	Merge from Sourcery G++ 4.3/4.4:
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-08-12 13:35:39 +0000
++++ new/gcc/config/arm/predicates.md	2010-08-31 09:40:16 +0000
+@@ -318,10 +318,9 @@
+        (and (match_code "reg,subreg,mem")
+ 	    (match_operand 0 "nonimmediate_soft_df_operand"))))
+ 
+-(define_predicate "const_shift_operand"
++(define_predicate "const_shift_count"
+   (and (match_code "const_int")
+-       (ior (match_operand 0 "power_of_two_operand")
+-	    (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) < 32"))))
++       (match_test "((unsigned HOST_WIDE_INT) INTVAL (op)) < 32")))
+ 
+ 
+ (define_special_predicate "load_multiple_operation"
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-13 16:00:58 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-31 09:40:16 +0000
+@@ -55,7 +55,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(and:SI (not:SI (match_operator:SI 4 "shift_operator"
+ 			 [(match_operand:SI 2 "s_register_operand" "r")
+-			  (match_operand:SI 3 "const_int_operand" "M")]))
++			  (match_operand:SI 3 "const_shift_count" "M")]))
+ 		(match_operand:SI 1 "s_register_operand" "r")))]
+   "TARGET_THUMB2"
+   "bic%?\\t%0, %1, %2%S4"
+@@ -124,7 +124,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(not:SI (match_operator:SI 3 "shift_operator"
+ 		 [(match_operand:SI 1 "s_register_operand" "r")
+-		  (match_operand:SI 2 "const_int_operand"  "M")])))]
++		  (match_operand:SI 2 "const_shift_count"  "M")])))]
+   "TARGET_THUMB2"
+   "mvn%?\\t%0, %1%S3"
+   [(set_attr "predicable" "yes")
+@@ -136,7 +136,7 @@
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV (not:SI (match_operator:SI 3 "shift_operator"
+ 			  [(match_operand:SI 1 "s_register_operand" "r")
+-			   (match_operand:SI 2 "const_int_operand"  "M")]))
++			   (match_operand:SI 2 "const_shift_count"  "M")]))
+ 			 (const_int 0)))
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(not:SI (match_op_dup 3 [(match_dup 1) (match_dup 2)])))]
+@@ -151,7 +151,7 @@
+   [(set (reg:CC_NOOV CC_REGNUM)
+ 	(compare:CC_NOOV (not:SI (match_operator:SI 3 "shift_operator"
+ 			  [(match_operand:SI 1 "s_register_operand" "r")
+-			   (match_operand:SI 2 "const_int_operand"  "M")]))
++			   (match_operand:SI 2 "const_shift_count"  "M")]))
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_THUMB2"
+@@ -328,7 +328,7 @@
+ 	(compare:CC (match_operand:SI   0 "s_register_operand" "r")
+ 		    (match_operator:SI  3 "shift_operator"
+ 		     [(match_operand:SI 1 "s_register_operand" "r")
+-		      (match_operand:SI 2 "const_int_operand"  "M")])))]
++		      (match_operand:SI 2 "const_shift_count"  "M")])))]
+   "TARGET_THUMB2"
+   "cmp%?\\t%0, %1%S3"
+   [(set_attr "conds" "set")
+@@ -340,7 +340,7 @@
+   [(set (reg:CC_SWP CC_REGNUM)
+ 	(compare:CC_SWP (match_operator:SI 3 "shift_operator"
+ 			 [(match_operand:SI 1 "s_register_operand" "r")
+-			  (match_operand:SI 2 "const_int_operand" "M")])
++			  (match_operand:SI 2 "const_shift_count" "M")])
+ 			(match_operand:SI 0 "s_register_operand" "r")))]
+   "TARGET_THUMB2"
+   "cmp%?\\t%0, %1%S3"
+@@ -354,7 +354,7 @@
+ 	(compare:CC (match_operand:SI 0 "s_register_operand" "r")
+ 		    (neg:SI (match_operator:SI 3 "shift_operator"
+ 			     [(match_operand:SI 1 "s_register_operand" "r")
+-			      (match_operand:SI 2 "const_int_operand" "M")]))))]
++			      (match_operand:SI 2 "const_shift_count" "M")]))))]
+   "TARGET_THUMB2"
+   "cmn%?\\t%0, %1%S3"
+   [(set_attr "conds" "set")
+@@ -466,7 +466,7 @@
+         (match_operator:SI 1 "shiftable_operator"
+           [(match_operator:SI 3 "shift_operator"
+              [(match_operand:SI 4 "s_register_operand" "r")
+-              (match_operand:SI 5 "const_int_operand" "M")])
++              (match_operand:SI 5 "const_shift_count" "M")])
+            (match_operand:SI 2 "s_register_operand" "r")]))]
+   "TARGET_THUMB2"
+   "%i1%?\\t%0, %2, %4%S3"
+@@ -499,7 +499,7 @@
+         (compare:CC_NOOV (match_operator:SI 1 "shiftable_operator"
+ 		          [(match_operator:SI 3 "shift_operator"
+ 		            [(match_operand:SI 4 "s_register_operand" "r")
+-		             (match_operand:SI 5 "const_int_operand" "M")])
++		             (match_operand:SI 5 "const_shift_count" "M")])
+ 		           (match_operand:SI 2 "s_register_operand" "r")])
+ 			 (const_int 0)))
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+@@ -517,7 +517,7 @@
+         (compare:CC_NOOV (match_operator:SI 1 "shiftable_operator"
+ 		          [(match_operator:SI 3 "shift_operator"
+ 		            [(match_operand:SI 4 "s_register_operand" "r")
+-		             (match_operand:SI 5 "const_int_operand" "M")])
++		             (match_operand:SI 5 "const_shift_count" "M")])
+ 		           (match_operand:SI 2 "s_register_operand" "r")])
+ 			 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+@@ -533,7 +533,7 @@
+ 	(minus:SI (match_operand:SI 1 "s_register_operand" "r")
+ 		  (match_operator:SI 2 "shift_operator"
+ 		   [(match_operand:SI 3 "s_register_operand" "r")
+-		    (match_operand:SI 4 "const_int_operand" "M")])))]
++		    (match_operand:SI 4 "const_shift_count" "M")])))]
+   "TARGET_THUMB2"
+   "sub%?\\t%0, %1, %3%S2"
+   [(set_attr "predicable" "yes")
+@@ -547,7 +547,7 @@
+ 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r")
+ 		   (match_operator:SI 2 "shift_operator"
+ 		    [(match_operand:SI 3 "s_register_operand" "r")
+-		     (match_operand:SI 4 "const_int_operand" "M")]))
++		     (match_operand:SI 4 "const_shift_count" "M")]))
+ 	 (const_int 0)))
+    (set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(minus:SI (match_dup 1) (match_op_dup 2 [(match_dup 3)
+@@ -565,7 +565,7 @@
+ 	 (minus:SI (match_operand:SI 1 "s_register_operand" "r")
+ 		   (match_operator:SI 2 "shift_operator"
+ 		    [(match_operand:SI 3 "s_register_operand" "r")
+-		     (match_operand:SI 4 "const_int_operand" "M")]))
++		     (match_operand:SI 4 "const_shift_count" "M")]))
+ 	 (const_int 0)))
+    (clobber (match_scratch:SI 0 "=r"))]
+   "TARGET_THUMB2"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99379.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99379.patch
new file mode 100644
index 0000000000..e1e89bf8af
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99379.patch
@@ -0,0 +1,2011 @@
+2010-08-29  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-04-16  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/41514
+	gcc/
+	* config/arm/arm.md (cbranchsi4_insn): Renamed from "*cbranchsi4_insn".
+	If the previous insn is a cbranchsi4_insn with the same arguments,
+	omit the compare instruction.
+
+	gcc/testsuite/
+	* gcc.target/arm/thumb-comparisons.c: New test.
+
+	gcc/
+	* config/arm/arm.md (addsi3_cbranch): If destination is a high
+	register, inputs must be low registers and we need a low register
+	scratch.  Handle alternative 2 like alternative 3.
+
+	PR target/40603
+	gcc/
+	* config/arm/arm.md (cbranchqi4): New pattern.
+	* config/arm/predicates.md (const0_operand,
+	cbranchqi4_comparison_operator): New predicates.
+
+	gcc/testsuite/
+	* gcc.target/arm/thumb-cbranchqi.c: New test.
+
+	2010-04-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/40657
+	gcc/
+	* config/arm/arm.c (thumb1_extra_regs_pushed): New function.
+	(thumb1_expand_prologue, thumb1_output_function_prologue): Call it
+	here to determine which regs to push and how much stack to reserve.
+
+	gcc/testsuite/
+	* gcc.target/arm/thumb-stackframe.c: New test.
+
+	2010-07-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/42835
+	gcc/
+	* config/arm/arm-modes.def (CC_NOTB): New mode.
+	* config/arm/arm.c (get_arm_condition_code): Handle it.
+	* config/arm/thumb2.md (thumb2_compare_scc): Delete pattern.
+	* config/arm/arm.md (subsi3_compare0_c): New pattern.
+	(compare_scc): Now a define_and_split.  Add a number of extra
+	splitters before it.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42835.c: New test.
+
+	PR target/42172
+	gcc/
+	* config/arm/arm.c (thumb1_rtx_costs): Improve support for SIGN_EXTEND
+	and ZERO_EXTEND.
+	(arm_rtx_costs_1): Likewise.
+	(arm_size_rtx_costs): Use arm_rtx_costs_1 for these codes.
+	* config/arm/arm.md (is_arch6): New attribute.
+	(zero_extendhisi2, zero_extendqisi2, extendhisi2,
+	extendqisi2): Tighten the code somewhat, avoiding invalid
+	RTL to occur in the expander patterns.
+	(thumb1_zero_extendhisi2): Merge with thumb1_zero_extendhisi2_v6.
+	(thumb1_zero_extendhisi2_v6): Delete.
+	(thumb1_extendhisi2): Merge with thumb1_extendhisi2_v6.
+	(thumb1_extendhisi2_v6): Delete.
+	(thumb1_extendqisi2): Merge with thumb1_extendhisi2_v6.
+	(thumb1_extendqisi2_v6): Delete.
+	(zero_extendhisi2 for register input splitter): New.
+	(zero_extendqisi2 for register input splitter): New.
+	(thumb1_extendhisi2 for register input splitter): New.
+	(extendhisi2 for register input splitter): New.
+	(extendqisi2 for register input splitter): New.
+	(TARGET_THUMB1 extendqisi2 for memory input splitter): New.
+	(arm_zero_extendhisi2): Allow nonimmediate_operand for operand 1,
+	and add support for a register alternative requiring a split.
+	(thumb1_zero_extendqisi2): Likewise.
+	(arm_zero_extendqisi2): Likewise.
+	(arm_extendhisi2): Likewise.
+	(arm_extendqisi2): Likewise.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42172-1.c: New test.
+
+	2010-07-05  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/arm/arm.c (get_arm_condition_code): Remove CC_NOTBmode case.
+	* arm-modes.def (CC_NOTB): Don't define.
+	* config/arm/arm.md (arm_adddi3): Generate canonical RTL.
+	(adddi_sesidi_di, adddi_zesidi_di): Likewise.
+	(LTUGEU): New code_iterator.
+	(cnb, optab): New corresponding code_attrs.
+	(addsi3_carryin_<optab>): Renamed from addsi3_carryin.  Change pattern
+	to canonical form.  Operands 1 and 2 are commutative.  Parametrize
+	using LTUGEU.
+	(addsi3_carryin_shift_<optab>): Likewise.
+	(addsi3_carryin_alt2_<optab>): Renamed from addsi3_carryin_alt2.
+	Operands 1 and 2 are commutative.  Parametrize using LTUGEU.
+	(addsi3_carryin_alt1, addsi3_carryin_alt3): Remove.
+	(subsi3_compare): Renamed from subsi3_compare0_c.  Change CC_NOTB to
+	CC.
+	(arm_subsi3_insn): Allow constants for operand 0.
+	(compare_scc peephole for eq case): New.
+	(compare_scc splitters): Change CC_NOTB to CC.
+
+	2010-07-09  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/40657
+	gcc/
+	* config/arm/arm.c (thumb1_extra_regs_pushed): New arg FOR_PROLOGUE.
+	All callers changed.
+	Handle the case when we're called for the epilogue.
+	(thumb_unexpanded_epilogue): Use it.
+	(thumb1_expand_epilogue): Likewise.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr40657-1.c: New test.
+	* gcc.target/arm/pr40657-2.c: New test.
+	* gcc.c-torture/execute/pr40657.c: New test.
+
+	gcc/
+	* config/arm/arm.md (addsi3_cbranch): Switch alternatives 0 and 1.
+
+	* config/arm/arm.md (Thumb-1 ldrsb peephole): New.
+
+	* config/arm/arm.md (cbranchqi4): Fix array size.
+	(addsi3_cbranch): Also andle alternative 2 like alternative 3 when
+	calculating length.
+
+ 2010-08-27  Paul Brook  <paul@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm-modes.def'
+--- old/gcc/config/arm/arm-modes.def	2010-07-29 16:58:56 +0000
++++ new/gcc/config/arm/arm-modes.def	2010-08-31 10:00:27 +0000
+@@ -34,6 +34,8 @@
+    CCFPmode should be used with floating equalities.
+    CC_NOOVmode should be used with SImode integer equalities.
+    CC_Zmode should be used if only the Z flag is set correctly
++   CC_Cmode should be used if only the C flag is set correctly, after an
++     addition.
+    CC_Nmode should be used if only the N (sign) flag is set correctly
+    CC_CZmode should be used if only the C and Z flags are correct
+    (used for DImode unsigned comparisons).
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-25 16:22:17 +0000
++++ new/gcc/config/arm/arm.c	2010-08-31 10:00:27 +0000
+@@ -6443,6 +6443,7 @@
+ thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer)
+ {
+   enum machine_mode mode = GET_MODE (x);
++  int total;
+ 
+   switch (code)
+     {
+@@ -6545,24 +6546,20 @@
+ 	return 14;
+       return 2;
+ 
++    case SIGN_EXTEND:
+     case ZERO_EXTEND:
+-      /* XXX still guessing.  */
+-      switch (GET_MODE (XEXP (x, 0)))
+-	{
+-	case QImode:
+-	  return (1 + (mode == DImode ? 4 : 0)
+-		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
+-
+-	case HImode:
+-	  return (4 + (mode == DImode ? 4 : 0)
+-		  + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
+-
+-	case SImode:
+-	  return (1 + (GET_CODE (XEXP (x, 0)) == MEM ? 10 : 0));
+-
+-	default:
+-	  return 99;
+-	}
++      total = mode == DImode ? COSTS_N_INSNS (1) : 0;
++      total += thumb1_rtx_costs (XEXP (x, 0), GET_CODE (XEXP (x, 0)), code);
++
++      if (mode == SImode)
++	return total;
++
++      if (arm_arch6)
++	return total + COSTS_N_INSNS (1);
++
++      /* Assume a two-shift sequence.  Increase the cost slightly so
++	 we prefer actual shifts over an extend operation.  */
++      return total + 1 + COSTS_N_INSNS (2);
+ 
+     default:
+       return 99;
+@@ -7046,44 +7043,39 @@
+       return false;
+ 
+     case SIGN_EXTEND:
+-      if (GET_MODE_CLASS (mode) == MODE_INT)
+-	{
+-	  *total = 0;
+-	  if (mode == DImode)
+-	    *total += COSTS_N_INSNS (1);
+-
+-	  if (GET_MODE (XEXP (x, 0)) != SImode)
+-	    {
+-	      if (arm_arch6)
+-		{
+-		  if (GET_CODE (XEXP (x, 0)) != MEM)
+-		    *total += COSTS_N_INSNS (1);
+-		}
+-	      else if (!arm_arch4 || GET_CODE (XEXP (x, 0)) != MEM)
+-		*total += COSTS_N_INSNS (2);
+-	    }
+-
+-	  return false;
+-	}
+-
+-      /* Fall through */
+     case ZERO_EXTEND:
+       *total = 0;
+       if (GET_MODE_CLASS (mode) == MODE_INT)
+ 	{
++	  rtx op = XEXP (x, 0);
++	  enum machine_mode opmode = GET_MODE (op);
++
+ 	  if (mode == DImode)
+ 	    *total += COSTS_N_INSNS (1);
+ 
+-	  if (GET_MODE (XEXP (x, 0)) != SImode)
++	  if (opmode != SImode)
+ 	    {
+-	      if (arm_arch6)
++	      if (MEM_P (op))
+ 		{
+-		  if (GET_CODE (XEXP (x, 0)) != MEM)
+-		    *total += COSTS_N_INSNS (1);
++		  /* If !arm_arch4, we use one of the extendhisi2_mem
++		     or movhi_bytes patterns for HImode.  For a QImode
++		     sign extension, we first zero-extend from memory
++		     and then perform a shift sequence.  */
++		  if (!arm_arch4 && (opmode != QImode || code == SIGN_EXTEND))
++		    *total += COSTS_N_INSNS (2);
+ 		}
+-	      else if (!arm_arch4 || GET_CODE (XEXP (x, 0)) != MEM)
+-		*total += COSTS_N_INSNS (GET_MODE (XEXP (x, 0)) == QImode ?
+-					 1 : 2);
++	      else if (arm_arch6)
++		*total += COSTS_N_INSNS (1);
++
++	      /* We don't have the necessary insn, so we need to perform some
++		 other operation.  */
++	      else if (TARGET_ARM && code == ZERO_EXTEND && mode == QImode)
++		/* An and with constant 255.  */
++		*total += COSTS_N_INSNS (1);
++	      else
++		/* A shift sequence.  Increase costs slightly to avoid
++		   combining two shifts into an extend operation.  */
++		*total += COSTS_N_INSNS (2) + 1;
+ 	    }
+ 
+ 	  return false;
+@@ -7333,41 +7325,8 @@
+       return false;
+ 
+     case SIGN_EXTEND:
+-      *total = 0;
+-      if (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) < 4)
+-	{
+-	  if (!(arm_arch4 && MEM_P (XEXP (x, 0))))
+-	    *total += COSTS_N_INSNS (arm_arch6 ? 1 : 2);
+-	}
+-      if (mode == DImode)
+-	*total += COSTS_N_INSNS (1);
+-      return false;
+-
+     case ZERO_EXTEND:
+-      *total = 0;
+-      if (!(arm_arch4 && MEM_P (XEXP (x, 0))))
+-	{
+-	  switch (GET_MODE (XEXP (x, 0)))
+-	    {
+-	    case QImode:
+-	      *total += COSTS_N_INSNS (1);
+-	      break;
+-
+-	    case HImode:
+-	      *total += COSTS_N_INSNS (arm_arch6 ? 1 : 2);
+-
+-	    case SImode:
+-	      break;
+-
+-	    default:
+-	      *total += COSTS_N_INSNS (2);
+-	    }
+-	}
+-
+-      if (mode == DImode)
+-	*total += COSTS_N_INSNS (1);
+-
+-      return false;
++      return arm_rtx_costs_1 (x, outer_code, total, 0);
+ 
+     case CONST_INT:
+       if (const_ok_for_arm (INTVAL (x)))
+@@ -16898,11 +16857,11 @@
+ 
+     case CC_Cmode:
+       switch (comp_code)
+-      {
+-      case LTU: return ARM_CS;
+-      case GEU: return ARM_CC;
+-      default: gcc_unreachable ();
+-      }
++	{
++	case LTU: return ARM_CS;
++	case GEU: return ARM_CC;
++	default: gcc_unreachable ();
++	}
+ 
+     case CC_CZmode:
+       switch (comp_code)
+@@ -20127,6 +20086,81 @@
+ #endif
+ }
+ 
++/* Given the stack offsets and register mask in OFFSETS, decide how
++   many additional registers to push instead of subtracting a constant
++   from SP.  For epilogues the principle is the same except we use pop.
++   FOR_PROLOGUE indicates which we're generating.  */
++static int
++thumb1_extra_regs_pushed (arm_stack_offsets *offsets, bool for_prologue)
++{
++  HOST_WIDE_INT amount;
++  unsigned long live_regs_mask = offsets->saved_regs_mask;
++  /* Extract a mask of the ones we can give to the Thumb's push/pop
++     instruction.  */
++  unsigned long l_mask = live_regs_mask & (for_prologue ? 0x40ff : 0xff);
++  /* Then count how many other high registers will need to be pushed.  */
++  unsigned long high_regs_pushed = bit_count (live_regs_mask & 0x0f00);
++  int n_free, reg_base;
++
++  if (!for_prologue && frame_pointer_needed)
++    amount = offsets->locals_base - offsets->saved_regs;
++  else
++    amount = offsets->outgoing_args - offsets->saved_regs;
++
++  /* If the stack frame size is 512 exactly, we can save one load
++     instruction, which should make this a win even when optimizing
++     for speed.  */
++  if (!optimize_size && amount != 512)
++    return 0;
++
++  /* Can't do this if there are high registers to push.  */
++  if (high_regs_pushed != 0)
++    return 0;
++
++  /* Shouldn't do it in the prologue if no registers would normally
++     be pushed at all.  In the epilogue, also allow it if we'll have
++     a pop insn for the PC.  */
++  if  (l_mask == 0
++       && (for_prologue
++	   || TARGET_BACKTRACE
++	   || (live_regs_mask & 1 << LR_REGNUM) == 0
++	   || TARGET_INTERWORK
++	   || crtl->args.pretend_args_size != 0))
++    return 0;
++
++  /* Don't do this if thumb_expand_prologue wants to emit instructions
++     between the push and the stack frame allocation.  */
++  if (for_prologue
++      && ((flag_pic && arm_pic_register != INVALID_REGNUM)
++	  || (!frame_pointer_needed && CALLER_INTERWORKING_SLOT_SIZE > 0)))
++    return 0;
++
++  reg_base = 0;
++  n_free = 0;
++  if (!for_prologue)
++    {
++      reg_base = arm_size_return_regs () / UNITS_PER_WORD;
++      live_regs_mask >>= reg_base;
++    }
++
++  while (reg_base + n_free < 8 && !(live_regs_mask & 1)
++	 && (for_prologue || call_used_regs[reg_base + n_free]))
++    {
++      live_regs_mask >>= 1;
++      n_free++;
++    }
++
++  if (n_free == 0)
++    return 0;
++  gcc_assert (amount / 4 * 4 == amount);
++
++  if (amount >= 512 && (amount - n_free * 4) < 512)
++    return (amount - 508) / 4;
++  if (amount <= n_free * 4)
++    return amount / 4;
++  return 0;
++}
++
+ /* The bits which aren't usefully expanded as rtl.  */
+ const char *
+ thumb_unexpanded_epilogue (void)
+@@ -20135,6 +20169,7 @@
+   int regno;
+   unsigned long live_regs_mask = 0;
+   int high_regs_pushed = 0;
++  int extra_pop;
+   int had_to_push_lr;
+   int size;
+ 
+@@ -20154,6 +20189,13 @@
+      the register is used to hold a return value.  */
+   size = arm_size_return_regs ();
+ 
++  extra_pop = thumb1_extra_regs_pushed (offsets, false);
++  if (extra_pop > 0)
++    {
++      unsigned long extra_mask = (1 << extra_pop) - 1;
++      live_regs_mask |= extra_mask << (size / UNITS_PER_WORD);
++    }
++
+   /* The prolog may have pushed some high registers to use as
+      work registers.  e.g. the testsuite file:
+      gcc/testsuite/gcc/gcc.c-torture/execute/complex-2.c
+@@ -20237,7 +20279,9 @@
+ 		       live_regs_mask);
+ 
+       /* We have either just popped the return address into the
+-	 PC or it is was kept in LR for the entire function.  */
++	 PC or it is was kept in LR for the entire function.
++	 Note that thumb_pushpop has already called thumb_exit if the
++	 PC was in the list.  */
+       if (!had_to_push_lr)
+ 	thumb_exit (asm_out_file, LR_REGNUM);
+     }
+@@ -20419,6 +20463,7 @@
+ 		    stack_pointer_rtx);
+ 
+   amount = offsets->outgoing_args - offsets->saved_regs;
++  amount -= 4 * thumb1_extra_regs_pushed (offsets, true);
+   if (amount)
+     {
+       if (amount < 512)
+@@ -20503,6 +20548,7 @@
+       emit_insn (gen_movsi (stack_pointer_rtx, hard_frame_pointer_rtx));
+       amount = offsets->locals_base - offsets->saved_regs;
+     }
++  amount -= 4 * thumb1_extra_regs_pushed (offsets, false);
+ 
+   gcc_assert (amount >= 0);
+   if (amount)
+@@ -20723,7 +20769,11 @@
+      register.  */
+   else if ((l_mask & 0xff) != 0
+ 	   || (high_regs_pushed == 0 && l_mask))
+-    thumb_pushpop (f, l_mask, 1, &cfa_offset, l_mask);
++    {
++      unsigned long mask = l_mask;
++      mask |= (1 << thumb1_extra_regs_pushed (offsets, true)) - 1;
++      thumb_pushpop (f, mask, 1, &cfa_offset, mask);
++    }
+ 
+   if (high_regs_pushed)
+     {
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-25 16:22:17 +0000
++++ new/gcc/config/arm/arm.md	2010-08-31 10:00:27 +0000
+@@ -150,6 +150,9 @@
+ ; patterns that share the same RTL in both ARM and Thumb code.
+ (define_attr "is_thumb" "no,yes" (const (symbol_ref "thumb_code")))
+ 
++; IS_ARCH6 is set to 'yes' when we are generating code form ARMv6.
++(define_attr "is_arch6" "no,yes" (const (symbol_ref "arm_arch6")))
++
+ ;; Operand number of an input operand that is shifted.  Zero if the
+ ;; given instruction does not shift one of its input operands.
+ (define_attr "shift" "" (const_int 0))
+@@ -515,8 +518,8 @@
+ 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
+ 				 (match_dup 1)))
+ 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
+-   (set (match_dup 3) (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-			       (plus:SI (match_dup 4) (match_dup 5))))]
++   (set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (match_dup 5))
++			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
+   "
+   {
+     operands[3] = gen_highpart (SImode, operands[0]);
+@@ -543,10 +546,10 @@
+ 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
+ 				 (match_dup 1)))
+ 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
+-   (set (match_dup 3) (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-			       (plus:SI (ashiftrt:SI (match_dup 2)
++   (set (match_dup 3) (plus:SI (plus:SI (ashiftrt:SI (match_dup 2)
+ 						     (const_int 31))
+-					(match_dup 4))))]
++					(match_dup 4))
++			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
+   "
+   {
+     operands[3] = gen_highpart (SImode, operands[0]);
+@@ -572,8 +575,8 @@
+ 		   (compare:CC_C (plus:SI (match_dup 1) (match_dup 2))
+ 				 (match_dup 1)))
+ 	      (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 2)))])
+-   (set (match_dup 3) (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-			       (plus:SI (match_dup 4) (const_int 0))))]
++   (set (match_dup 3) (plus:SI (plus:SI (match_dup 4) (const_int 0))
++			       (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
+   "
+   {
+     operands[3] = gen_highpart (SImode, operands[0]);
+@@ -861,24 +864,38 @@
+   [(set_attr "conds" "set")]
+ )
+ 
+-(define_insn "*addsi3_carryin"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-		 (plus:SI (match_operand:SI 1 "s_register_operand" "r")
+-			  (match_operand:SI 2 "arm_rhs_operand" "rI"))))]
+-  "TARGET_32BIT"
+-  "adc%?\\t%0, %1, %2"
+-  [(set_attr "conds" "use")]
+-)
+-
+-(define_insn "*addsi3_carryin_shift"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-		 (plus:SI
+-		   (match_operator:SI 2 "shift_operator"
+-		      [(match_operand:SI 3 "s_register_operand" "r")
+-		       (match_operand:SI 4 "reg_or_int_operand" "rM")])
+-		    (match_operand:SI 1 "s_register_operand" "r"))))]
++(define_code_iterator LTUGEU [ltu geu])
++(define_code_attr cnb [(ltu "CC_C") (geu "CC")])
++(define_code_attr optab [(ltu "ltu") (geu "geu")])
++
++(define_insn "*addsi3_carryin_<optab>"
++  [(set (match_operand:SI 0 "s_register_operand" "=r")
++	(plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r")
++			  (match_operand:SI 2 "arm_rhs_operand" "rI"))
++		 (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))]
++  "TARGET_32BIT"
++  "adc%?\\t%0, %1, %2"
++  [(set_attr "conds" "use")]
++)
++
++(define_insn "*addsi3_carryin_alt2_<optab>"
++  [(set (match_operand:SI 0 "s_register_operand" "=r")
++	(plus:SI (plus:SI (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))
++			  (match_operand:SI 1 "s_register_operand" "%r"))
++		 (match_operand:SI 2 "arm_rhs_operand" "rI")))]
++  "TARGET_32BIT"
++  "adc%?\\t%0, %1, %2"
++  [(set_attr "conds" "use")]
++)
++
++(define_insn "*addsi3_carryin_shift_<optab>"
++  [(set (match_operand:SI 0 "s_register_operand" "=r")
++	(plus:SI (plus:SI
++		  (match_operator:SI 2 "shift_operator"
++		    [(match_operand:SI 3 "s_register_operand" "r")
++		     (match_operand:SI 4 "reg_or_int_operand" "rM")])
++		  (match_operand:SI 1 "s_register_operand" "r"))
++		 (LTUGEU:SI (reg:<cnb> CC_REGNUM) (const_int 0))))]
+   "TARGET_32BIT"
+   "adc%?\\t%0, %1, %3%S2"
+   [(set_attr "conds" "use")
+@@ -887,36 +904,6 @@
+ 		      (const_string "alu_shift_reg")))]
+ )
+ 
+-(define_insn "*addsi3_carryin_alt1"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "r")
+-			  (match_operand:SI 2 "arm_rhs_operand" "rI"))
+-		 (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))))]
+-  "TARGET_32BIT"
+-  "adc%?\\t%0, %1, %2"
+-  [(set_attr "conds" "use")]
+-)
+-
+-(define_insn "*addsi3_carryin_alt2"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-			  (match_operand:SI 1 "s_register_operand" "r"))
+-		 (match_operand:SI 2 "arm_rhs_operand" "rI")))]
+-  "TARGET_32BIT"
+-  "adc%?\\t%0, %1, %2"
+-  [(set_attr "conds" "use")]
+-)
+-
+-(define_insn "*addsi3_carryin_alt3"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
+-			  (match_operand:SI 2 "arm_rhs_operand" "rI"))
+-		 (match_operand:SI 1 "s_register_operand" "r")))]
+-  "TARGET_32BIT"
+-  "adc%?\\t%0, %1, %2"
+-  [(set_attr "conds" "use")]
+-)
+-
+ (define_expand "incscc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+         (plus:SI (match_operator:SI 2 "arm_comparison_operator"
+@@ -1116,24 +1103,27 @@
+ 
+ ; ??? Check Thumb-2 split length
+ (define_insn_and_split "*arm_subsi3_insn"
+-  [(set (match_operand:SI           0 "s_register_operand" "=r,rk,r")
+-	(minus:SI (match_operand:SI 1 "reg_or_int_operand" "rI,!k,?n")
+-		  (match_operand:SI 2 "s_register_operand" "r, r, r")))]
++  [(set (match_operand:SI           0 "s_register_operand" "=r,r,rk,r,r")
++	(minus:SI (match_operand:SI 1 "reg_or_int_operand" "rI,r,!k,?n,r")
++		  (match_operand:SI 2 "reg_or_int_operand" "r,rI, r, r,?n")))]
+   "TARGET_32BIT"
+   "@
+    rsb%?\\t%0, %2, %1
+    sub%?\\t%0, %1, %2
++   sub%?\\t%0, %1, %2
++   #
+    #"
+-  "TARGET_32BIT
+-   && GET_CODE (operands[1]) == CONST_INT
+-   && !const_ok_for_arm (INTVAL (operands[1]))"
++  "&& ((GET_CODE (operands[1]) == CONST_INT
++       	&& !const_ok_for_arm (INTVAL (operands[1])))
++       || (GET_CODE (operands[2]) == CONST_INT
++	   && !const_ok_for_arm (INTVAL (operands[2]))))"
+   [(clobber (const_int 0))]
+   "
+   arm_split_constant (MINUS, SImode, curr_insn,
+                       INTVAL (operands[1]), operands[0], operands[2], 0);
+   DONE;
+   "
+-  [(set_attr "length" "4,4,16")
++  [(set_attr "length" "4,4,4,16,16")
+    (set_attr "predicable" "yes")]
+ )
+ 
+@@ -1165,6 +1155,19 @@
+   [(set_attr "conds" "set")]
+ )
+ 
++(define_insn "*subsi3_compare"
++  [(set (reg:CC CC_REGNUM)
++	(compare:CC (match_operand:SI 1 "arm_rhs_operand" "r,I")
++		    (match_operand:SI 2 "arm_rhs_operand" "rI,r")))
++   (set (match_operand:SI 0 "s_register_operand" "=r,r")
++	(minus:SI (match_dup 1) (match_dup 2)))]
++  "TARGET_32BIT"
++  "@
++   sub%.\\t%0, %1, %2
++   rsb%.\\t%0, %2, %1"
++  [(set_attr "conds" "set")]
++)
++
+ (define_expand "decscc"
+   [(set (match_operand:SI            0 "s_register_operand" "=r,r")
+         (minus:SI (match_operand:SI  1 "s_register_operand" "0,?r")
+@@ -4050,93 +4053,46 @@
+ )
+ 
+ (define_expand "zero_extendhisi2"
+-  [(set (match_dup 2)
+-	(ashift:SI (match_operand:HI 1 "nonimmediate_operand" "")
+-		   (const_int 16)))
+-   (set (match_operand:SI 0 "s_register_operand" "")
+-	(lshiftrt:SI (match_dup 2) (const_int 16)))]
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
+   "TARGET_EITHER"
+-  "
+-  {
+-    if ((TARGET_THUMB1 || arm_arch4) && GET_CODE (operands[1]) == MEM)
+-      {
+-	emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-				gen_rtx_ZERO_EXTEND (SImode, operands[1])));
+-	DONE;
+-      }
+-
+-    if (TARGET_ARM && GET_CODE (operands[1]) == MEM)
+-      {
+-	emit_insn (gen_movhi_bytes (operands[0], operands[1]));
+-	DONE;
+-      }
+-
+-    if (!s_register_operand (operands[1], HImode))
+-      operands[1] = copy_to_mode_reg (HImode, operands[1]);
+-
+-    if (arm_arch6)
+-      {
+-	emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-				gen_rtx_ZERO_EXTEND (SImode, operands[1])));
+-	DONE;
+-      }
+-
+-    operands[1] = gen_lowpart (SImode, operands[1]);
+-    operands[2] = gen_reg_rtx (SImode);
+-  }"
+-)
++{
++  if (TARGET_ARM && !arm_arch4 && MEM_P (operands[1]))
++    {
++      emit_insn (gen_movhi_bytes (operands[0], operands[1]));
++      DONE;
++    }
++  if (!arm_arch6 && !MEM_P (operands[1]))
++    {
++      rtx t = gen_lowpart (SImode, operands[1]);
++      rtx tmp = gen_reg_rtx (SImode);
++      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (16)));
++      emit_insn (gen_lshrsi3 (operands[0], tmp, GEN_INT (16)));
++      DONE;
++    }
++})
++
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(zero_extend:SI (match_operand:HI 1 "register_operand" "l,m")))]
++  "!TARGET_THUMB2 && !arm_arch6"
++  [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 16)))
++   (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 16)))]
++{
++  operands[2] = gen_lowpart (SImode, operands[1]);
++})
+ 
+ (define_insn "*thumb1_zero_extendhisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=l")
+-	(zero_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
+-  "TARGET_THUMB1 && !arm_arch6"
+-  "*
+-  rtx mem = XEXP (operands[1], 0);
+-
+-  if (GET_CODE (mem) == CONST)
+-    mem = XEXP (mem, 0);
+-    
+-  if (GET_CODE (mem) == LABEL_REF)
+-    return \"ldr\\t%0, %1\";
+-    
+-  if (GET_CODE (mem) == PLUS)
+-    {
+-      rtx a = XEXP (mem, 0);
+-      rtx b = XEXP (mem, 1);
+-
+-      /* This can happen due to bugs in reload.  */
+-      if (GET_CODE (a) == REG && REGNO (a) == SP_REGNUM)
+-        {
+-          rtx ops[2];
+-          ops[0] = operands[0];
+-          ops[1] = a;
+-      
+-          output_asm_insn (\"mov	%0, %1\", ops);
+-
+-          XEXP (mem, 0) = operands[0];
+-       }
+-
+-      else if (   GET_CODE (a) == LABEL_REF
+-	       && GET_CODE (b) == CONST_INT)
+-        return \"ldr\\t%0, %1\";
+-    }
+-    
+-  return \"ldrh\\t%0, %1\";
+-  "
+-  [(set_attr "length" "4")
+-   (set_attr "type" "load_byte")
+-   (set_attr "pool_range" "60")]
+-)
+-
+-(define_insn "*thumb1_zero_extendhisi2_v6"
+   [(set (match_operand:SI 0 "register_operand" "=l,l")
+ 	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "l,m")))]
+-  "TARGET_THUMB1 && arm_arch6"
++  "TARGET_THUMB1"
+   "*
+   rtx mem;
+ 
+-  if (which_alternative == 0)
++  if (which_alternative == 0 && arm_arch6)
+     return \"uxth\\t%0, %1\";
++  if (which_alternative == 0)
++    return \"#\";
+ 
+   mem = XEXP (operands[1], 0);
+ 
+@@ -4170,20 +4126,25 @@
+     
+   return \"ldrh\\t%0, %1\";
+   "
+-  [(set_attr "length" "2,4")
++  [(set_attr_alternative "length"
++			 [(if_then_else (eq_attr "is_arch6" "yes")
++				       (const_int 2) (const_int 4))
++			 (const_int 4)])
+    (set_attr "type" "alu_shift,load_byte")
+    (set_attr "pool_range" "*,60")]
+ )
+ 
+ (define_insn "*arm_zero_extendhisi2"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(zero_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
++  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
++	(zero_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,m")))]
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+-  "ldr%(h%)\\t%0, %1"
+-  [(set_attr "type" "load_byte")
++  "@
++   #
++   ldr%(h%)\\t%0, %1"
++  [(set_attr "type" "alu_shift,load_byte")
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "256")
+-   (set_attr "neg_pool_range" "244")]
++   (set_attr "pool_range" "*,256")
++   (set_attr "neg_pool_range" "*,244")]
+ )
+ 
+ (define_insn "*arm_zero_extendhisi2_v6"
+@@ -4213,50 +4174,49 @@
+   [(set (match_operand:SI 0 "s_register_operand" "")
+ 	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "")))]
+   "TARGET_EITHER"
+-  "
+-  if (!arm_arch6 && GET_CODE (operands[1]) != MEM)
+-    {
+-      if (TARGET_ARM)
+-        {
+-          emit_insn (gen_andsi3 (operands[0],
+-				 gen_lowpart (SImode, operands[1]),
+-			         GEN_INT (255)));
+-        }
+-      else /* TARGET_THUMB */
+-        {
+-          rtx temp = gen_reg_rtx (SImode);
+-	  rtx ops[3];
+-	  
+-          operands[1] = copy_to_mode_reg (QImode, operands[1]);
+-          operands[1] = gen_lowpart (SImode, operands[1]);
+-
+-	  ops[0] = temp;
+-	  ops[1] = operands[1];
+-	  ops[2] = GEN_INT (24);
+-
+-	  emit_insn (gen_rtx_SET (VOIDmode, ops[0],
+-				  gen_rtx_ASHIFT (SImode, ops[1], ops[2])));
+-	  
+-          ops[0] = operands[0];
+-	  ops[1] = temp;
+-	  ops[2] = GEN_INT (24);
+-
+-	  emit_insn (gen_rtx_SET (VOIDmode, ops[0],
+-				  gen_rtx_LSHIFTRT (SImode, ops[1], ops[2])));
+-	}
+-      DONE;
+-    }
+-  "
+-)
++{
++  if (TARGET_ARM && !arm_arch6 && GET_CODE (operands[1]) != MEM)
++    {
++      emit_insn (gen_andsi3 (operands[0],
++			     gen_lowpart (SImode, operands[1]),
++					  GEN_INT (255)));
++      DONE;
++    }
++  if (!arm_arch6 && !MEM_P (operands[1]))
++    {
++      rtx t = gen_lowpart (SImode, operands[1]);
++      rtx tmp = gen_reg_rtx (SImode);
++      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (24)));
++      emit_insn (gen_lshrsi3 (operands[0], tmp, GEN_INT (24)));
++      DONE;
++    }
++})
++
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(zero_extend:SI (match_operand:QI 1 "register_operand" "")))]
++  "!arm_arch6"
++  [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 24)))
++   (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 24)))]
++{
++  operands[2] = simplify_gen_subreg (SImode, operands[1], QImode, 0);
++  if (TARGET_ARM)
++    {
++      emit_insn (gen_andsi3 (operands[0], operands[2], GEN_INT (255)));
++      DONE;
++    }
++})
+ 
+ (define_insn "*thumb1_zero_extendqisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=l")
+-	(zero_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
++  [(set (match_operand:SI 0 "register_operand" "=l,l")
++	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "l,m")))]
+   "TARGET_THUMB1 && !arm_arch6"
+-  "ldrb\\t%0, %1"
+-  [(set_attr "length" "2")
+-   (set_attr "type" "load_byte")
+-   (set_attr "pool_range" "32")]
++  "@
++   #
++   ldrb\\t%0, %1"
++  [(set_attr "length" "4,2")
++   (set_attr "type" "alu_shift,load_byte")
++   (set_attr "pool_range" "*,32")]
+ )
+ 
+ (define_insn "*thumb1_zero_extendqisi2_v6"
+@@ -4272,14 +4232,17 @@
+ )
+ 
+ (define_insn "*arm_zero_extendqisi2"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(zero_extend:SI (match_operand:QI 1 "memory_operand" "m")))]
++  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
++	(zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" "r,m")))]
+   "TARGET_ARM && !arm_arch6"
+-  "ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
+-  [(set_attr "type" "load_byte")
++  "@
++   #
++   ldr%(b%)\\t%0, %1\\t%@ zero_extendqisi2"
++  [(set_attr "length" "8,4")
++   (set_attr "type" "alu_shift,load_byte")
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "4096")
+-   (set_attr "neg_pool_range" "4084")]
++   (set_attr "pool_range" "*,4096")
++   (set_attr "neg_pool_range" "*,4084")]
+ )
+ 
+ (define_insn "*arm_zero_extendqisi2_v6"
+@@ -4358,108 +4321,42 @@
+ )
+ 
+ (define_expand "extendhisi2"
+-  [(set (match_dup 2)
+-	(ashift:SI (match_operand:HI 1 "nonimmediate_operand" "")
+-		   (const_int 16)))
+-   (set (match_operand:SI 0 "s_register_operand" "")
+-	(ashiftrt:SI (match_dup 2)
+-		     (const_int 16)))]
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "")))]
+   "TARGET_EITHER"
+-  "
+-  {
+-    if (GET_CODE (operands[1]) == MEM)
+-      {
+-	if (TARGET_THUMB1)
+-	  {
+-	    emit_insn (gen_thumb1_extendhisi2 (operands[0], operands[1]));
+-	    DONE;
+-          }
+-	else if (arm_arch4)
+-	  {
+-	    emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-		       gen_rtx_SIGN_EXTEND (SImode, operands[1])));
+-	    DONE;
+-	  }
+-      }
+-
+-    if (TARGET_ARM && GET_CODE (operands[1]) == MEM)
+-      {
+-        emit_insn (gen_extendhisi2_mem (operands[0], operands[1]));
+-        DONE;
+-      }
+-
+-    if (!s_register_operand (operands[1], HImode))
+-      operands[1] = copy_to_mode_reg (HImode, operands[1]);
+-
+-    if (arm_arch6)
+-      {
+-	if (TARGET_THUMB1)
+-	  emit_insn (gen_thumb1_extendhisi2 (operands[0], operands[1]));
+-	else
+-	  emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-		     gen_rtx_SIGN_EXTEND (SImode, operands[1])));
+-
+-	DONE;
+-      }
+-
+-    operands[1] = gen_lowpart (SImode, operands[1]);
+-    operands[2] = gen_reg_rtx (SImode);
+-  }"
+-)
+-
+-(define_insn "thumb1_extendhisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=l")
+-	(sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))
+-   (clobber (match_scratch:SI 2 "=&l"))]
+-  "TARGET_THUMB1 && !arm_arch6"
+-  "*
+-  {
+-    rtx ops[4];
+-    rtx mem = XEXP (operands[1], 0);
+-
+-    /* This code used to try to use 'V', and fix the address only if it was
+-       offsettable, but this fails for e.g. REG+48 because 48 is outside the
+-       range of QImode offsets, and offsettable_address_p does a QImode
+-       address check.  */
+-       
+-    if (GET_CODE (mem) == CONST)
+-      mem = XEXP (mem, 0);
+-    
+-    if (GET_CODE (mem) == LABEL_REF)
+-      return \"ldr\\t%0, %1\";
+-    
+-    if (GET_CODE (mem) == PLUS)
+-      {
+-        rtx a = XEXP (mem, 0);
+-        rtx b = XEXP (mem, 1);
+-
+-        if (GET_CODE (a) == LABEL_REF
+-	    && GET_CODE (b) == CONST_INT)
+-          return \"ldr\\t%0, %1\";
+-
+-        if (GET_CODE (b) == REG)
+-          return \"ldrsh\\t%0, %1\";
+-	  
+-        ops[1] = a;
+-        ops[2] = b;
+-      }
+-    else
+-      {
+-        ops[1] = mem;
+-        ops[2] = const0_rtx;
+-      }
+-
+-    gcc_assert (GET_CODE (ops[1]) == REG);
+-
+-    ops[0] = operands[0];
+-    ops[3] = operands[2];
+-    output_asm_insn (\"mov\\t%3, %2\;ldrsh\\t%0, [%1, %3]\", ops);
+-    return \"\";
+-  }"
+-  [(set_attr "length" "4")
+-   (set_attr "type" "load_byte")
+-   (set_attr "pool_range" "1020")]
+-)
++{
++  if (TARGET_THUMB1)
++    {
++      emit_insn (gen_thumb1_extendhisi2 (operands[0], operands[1]));
++      DONE;
++    }
++  if (MEM_P (operands[1]) && TARGET_ARM && !arm_arch4)
++    {
++      emit_insn (gen_extendhisi2_mem (operands[0], operands[1]));
++      DONE;
++    }
++
++  if (!arm_arch6 && !MEM_P (operands[1]))
++    {
++      rtx t = gen_lowpart (SImode, operands[1]);
++      rtx tmp = gen_reg_rtx (SImode);
++      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (16)));
++      emit_insn (gen_ashrsi3 (operands[0], tmp, GEN_INT (16)));
++      DONE;
++    }
++})
++
++(define_split
++  [(parallel
++    [(set (match_operand:SI 0 "register_operand" "")
++	  (sign_extend:SI (match_operand:HI 1 "register_operand" "")))
++     (clobber (match_scratch:SI 2 ""))])]
++  "!arm_arch6"
++  [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 16)))
++   (set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 16)))]
++{
++  operands[2] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
++})
+ 
+ ;; We used to have an early-clobber on the scratch register here.
+ ;; However, there's a bug somewhere in reload which means that this
+@@ -4468,16 +4365,18 @@
+ ;; we try to verify the operands.  Fortunately, we don't really need
+ ;; the early-clobber: we can always use operand 0 if operand 2
+ ;; overlaps the address.
+-(define_insn "*thumb1_extendhisi2_insn_v6"
++(define_insn "thumb1_extendhisi2"
+   [(set (match_operand:SI 0 "register_operand" "=l,l")
+ 	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "l,m")))
+    (clobber (match_scratch:SI 2 "=X,l"))]
+-  "TARGET_THUMB1 && arm_arch6"
++  "TARGET_THUMB1"
+   "*
+   {
+     rtx ops[4];
+     rtx mem;
+ 
++    if (which_alternative == 0 && !arm_arch6)
++      return \"#\";
+     if (which_alternative == 0)
+       return \"sxth\\t%0, %1\";
+ 
+@@ -4525,7 +4424,10 @@
+     output_asm_insn (\"mov\\t%3, %2\;ldrsh\\t%0, [%1, %3]\", ops);
+     return \"\";
+   }"
+-  [(set_attr "length" "2,4")
++  [(set_attr_alternative "length"
++			 [(if_then_else (eq_attr "is_arch6" "yes")
++					(const_int 2) (const_int 4))
++			  (const_int 4)])
+    (set_attr "type" "alu_shift,load_byte")
+    (set_attr "pool_range" "*,1020")]
+ )
+@@ -4566,15 +4468,28 @@
+   }"
+ )
+ 
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(sign_extend:SI (match_operand:HI 1 "register_operand" "")))]
++  "!arm_arch6"
++  [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 16)))
++   (set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 16)))]
++{
++  operands[2] = simplify_gen_subreg (SImode, operands[1], HImode, 0);
++})
++
+ (define_insn "*arm_extendhisi2"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(sign_extend:SI (match_operand:HI 1 "memory_operand" "m")))]
++  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
++	(sign_extend:SI (match_operand:HI 1 "nonimmediate_operand" "r,m")))]
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+-  "ldr%(sh%)\\t%0, %1"
+-  [(set_attr "type" "load_byte")
++  "@
++   #
++   ldr%(sh%)\\t%0, %1"
++  [(set_attr "length" "8,4")
++   (set_attr "type" "alu_shift,load_byte")
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "256")
+-   (set_attr "neg_pool_range" "244")]
++   (set_attr "pool_range" "*,256")
++   (set_attr "neg_pool_range" "*,244")]
+ )
+ 
+ ;; ??? Check Thumb-2 pool range
+@@ -4636,46 +4551,45 @@
+ )
+ 
+ (define_expand "extendqisi2"
+-  [(set (match_dup 2)
+-	(ashift:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")
+-		   (const_int 24)))
+-   (set (match_operand:SI 0 "s_register_operand" "")
+-	(ashiftrt:SI (match_dup 2)
+-		     (const_int 24)))]
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(sign_extend:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "")))]
+   "TARGET_EITHER"
+-  "
+-  {
+-    if ((TARGET_THUMB || arm_arch4) && GET_CODE (operands[1]) == MEM)
+-      {
+-        emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-			        gen_rtx_SIGN_EXTEND (SImode, operands[1])));
+-        DONE;
+-      }
+-
+-    if (!s_register_operand (operands[1], QImode))
+-      operands[1] = copy_to_mode_reg (QImode, operands[1]);
+-
+-    if (arm_arch6)
+-      {
+-        emit_insn (gen_rtx_SET (VOIDmode, operands[0],
+-			        gen_rtx_SIGN_EXTEND (SImode, operands[1])));
+-        DONE;
+-      }
+-
+-    operands[1] = gen_lowpart (SImode, operands[1]);
+-    operands[2] = gen_reg_rtx (SImode);
+-  }"
+-)
++{
++  if (!arm_arch4 && MEM_P (operands[1]))
++    operands[1] = copy_to_mode_reg (QImode, operands[1]);
++
++  if (!arm_arch6 && !MEM_P (operands[1]))
++    {
++      rtx t = gen_lowpart (SImode, operands[1]);
++      rtx tmp = gen_reg_rtx (SImode);
++      emit_insn (gen_ashlsi3 (tmp, t, GEN_INT (24)));
++      emit_insn (gen_ashrsi3 (operands[0], tmp, GEN_INT (24)));
++      DONE;
++    }
++})
++
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(sign_extend:SI (match_operand:QI 1 "register_operand" "")))]
++  "!arm_arch6"
++  [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 24)))
++   (set (match_dup 0) (ashiftrt:SI (match_dup 0) (const_int 24)))]
++{
++  operands[2] = simplify_gen_subreg (SImode, operands[1], QImode, 0);
++})
+ 
+ (define_insn "*arm_extendqisi"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(sign_extend:SI (match_operand:QI 1 "arm_extendqisi_mem_op" "Uq")))]
++  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
++	(sign_extend:SI (match_operand:QI 1 "arm_reg_or_extendqisi_mem_op" "r,Uq")))]
+   "TARGET_ARM && arm_arch4 && !arm_arch6"
+-  "ldr%(sb%)\\t%0, %1"
+-  [(set_attr "type" "load_byte")
++  "@
++   #
++   ldr%(sb%)\\t%0, %1"
++  [(set_attr "length" "8,4")
++   (set_attr "type" "alu_shift,load_byte")
+    (set_attr "predicable" "yes")
+-   (set_attr "pool_range" "256")
+-   (set_attr "neg_pool_range" "244")]
++   (set_attr "pool_range" "*,256")
++   (set_attr "neg_pool_range" "*,244")]
+ )
+ 
+ (define_insn "*arm_extendqisi_v6"
+@@ -4703,162 +4617,103 @@
+    (set_attr "predicable" "yes")]
+ )
+ 
+-(define_insn "*thumb1_extendqisi2"
+-  [(set (match_operand:SI 0 "register_operand" "=l,l")
+-	(sign_extend:SI (match_operand:QI 1 "memory_operand" "V,m")))]
+-  "TARGET_THUMB1 && !arm_arch6"
+-  "*
+-  {
+-    rtx ops[3];
+-    rtx mem = XEXP (operands[1], 0);
+-    
+-    if (GET_CODE (mem) == CONST)
+-      mem = XEXP (mem, 0);
+-    
+-    if (GET_CODE (mem) == LABEL_REF)
+-      return \"ldr\\t%0, %1\";
+-
+-    if (GET_CODE (mem) == PLUS
+-        && GET_CODE (XEXP (mem, 0)) == LABEL_REF)
+-      return \"ldr\\t%0, %1\";
+-      
+-    if (which_alternative == 0)
+-      return \"ldrsb\\t%0, %1\";
+-      
+-    ops[0] = operands[0];
+-    
+-    if (GET_CODE (mem) == PLUS)
+-      {
+-        rtx a = XEXP (mem, 0);
+-	rtx b = XEXP (mem, 1);
+-	
+-        ops[1] = a;
+-        ops[2] = b;
+-
+-        if (GET_CODE (a) == REG)
+-	  {
+-	    if (GET_CODE (b) == REG)
+-              output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops);
+-            else if (REGNO (a) == REGNO (ops[0]))
+-	      {
+-                output_asm_insn (\"ldrb\\t%0, [%1, %2]\", ops);
+-		output_asm_insn (\"lsl\\t%0, %0, #24\", ops);
+-		output_asm_insn (\"asr\\t%0, %0, #24\", ops);
+-	      }
+-	    else
+-              output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-	  }
+-	else
+-          {
+-	    gcc_assert (GET_CODE (b) == REG);
+-            if (REGNO (b) == REGNO (ops[0]))
+-	      {
+-                output_asm_insn (\"ldrb\\t%0, [%2, %1]\", ops);
+-		output_asm_insn (\"lsl\\t%0, %0, #24\", ops);
+-		output_asm_insn (\"asr\\t%0, %0, #24\", ops);
+-	      }
+-	    else
+-              output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-          }
+-      }
+-    else if (GET_CODE (mem) == REG && REGNO (ops[0]) == REGNO (mem))
+-      {
+-        output_asm_insn (\"ldrb\\t%0, [%0, #0]\", ops);
+-	output_asm_insn (\"lsl\\t%0, %0, #24\", ops);
+-	output_asm_insn (\"asr\\t%0, %0, #24\", ops);
+-      }
+-    else
+-      {
+-        ops[1] = mem;
+-        ops[2] = const0_rtx;
+-	
+-        output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-      }
+-    return \"\";
+-  }"
+-  [(set_attr "length" "2,6")
+-   (set_attr "type" "load_byte,load_byte")
+-   (set_attr "pool_range" "32,32")]
+-)
+-
+-(define_insn "*thumb1_extendqisi2_v6"
++(define_split
++  [(set (match_operand:SI 0 "register_operand" "")
++	(sign_extend:SI (match_operand:QI 1 "memory_operand" "")))]
++  "TARGET_THUMB1 && reload_completed"
++  [(set (match_dup 0) (match_dup 2))
++   (set (match_dup 0) (sign_extend:SI (match_dup 3)))]
++{
++  rtx addr = XEXP (operands[1], 0);
++
++  if (GET_CODE (addr) == CONST)
++    addr = XEXP (addr, 0);
++
++  if (GET_CODE (addr) == PLUS
++      && REG_P (XEXP (addr, 0)) && REG_P (XEXP (addr, 1)))
++    /* No split necessary.  */
++    FAIL;
++
++  if (GET_CODE (addr) == PLUS
++      && !REG_P (XEXP (addr, 0)) && !REG_P (XEXP (addr, 1)))
++    FAIL;
++
++  if (reg_overlap_mentioned_p (operands[0], addr))
++    {
++      rtx t = gen_lowpart (QImode, operands[0]);
++      emit_move_insn (t, operands[1]);
++      emit_insn (gen_thumb1_extendqisi2 (operands[0], t));
++      DONE;
++    }
++
++  if (REG_P (addr))
++    {
++      addr = gen_rtx_PLUS (Pmode, addr, operands[0]);
++      operands[2] = const0_rtx;
++    }
++  else if (GET_CODE (addr) != PLUS)
++    FAIL;
++  else if (REG_P (XEXP (addr, 0)))
++    {
++      operands[2] = XEXP (addr, 1);
++      addr = gen_rtx_PLUS (Pmode, XEXP (addr, 0), operands[0]);
++    }
++  else
++    {
++      operands[2] = XEXP (addr, 0);
++      addr = gen_rtx_PLUS (Pmode, XEXP (addr, 1), operands[0]);
++    }
++
++  operands[3] = change_address (operands[1], QImode, addr);
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "register_operand" "")
++	(plus:SI (match_dup 0) (match_operand 1 "const_int_operand")))
++   (set (match_operand:SI 2 "register_operand" "") (const_int 0))
++   (set (match_operand:SI 3 "register_operand" "")
++	(sign_extend:SI (match_operand:QI 4 "memory_operand" "")))]
++  "TARGET_THUMB1
++   && GET_CODE (XEXP (operands[4], 0)) == PLUS
++   && rtx_equal_p (operands[0], XEXP (XEXP (operands[4], 0), 0))
++   && rtx_equal_p (operands[2], XEXP (XEXP (operands[4], 0), 1))
++   && (peep2_reg_dead_p (3, operands[0])
++       || rtx_equal_p (operands[0], operands[3]))
++   && (peep2_reg_dead_p (3, operands[2])
++       || rtx_equal_p (operands[2], operands[3]))"
++  [(set (match_dup 2) (match_dup 1))
++   (set (match_dup 3) (sign_extend:SI (match_dup 4)))]
++{
++  rtx addr = gen_rtx_PLUS (Pmode, operands[0], operands[2]);
++  operands[4] = change_address (operands[4], QImode, addr);
++})
++
++(define_insn "thumb1_extendqisi2"
+   [(set (match_operand:SI 0 "register_operand" "=l,l,l")
+ 	(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "l,V,m")))]
+-  "TARGET_THUMB1 && arm_arch6"
+-  "*
+-  {
+-    rtx ops[3];
+-    rtx mem;
+-
+-    if (which_alternative == 0)
+-      return \"sxtb\\t%0, %1\";
+-
+-    mem = XEXP (operands[1], 0);
+-    
+-    if (GET_CODE (mem) == CONST)
+-      mem = XEXP (mem, 0);
+-    
+-    if (GET_CODE (mem) == LABEL_REF)
+-      return \"ldr\\t%0, %1\";
+-
+-    if (GET_CODE (mem) == PLUS
+-        && GET_CODE (XEXP (mem, 0)) == LABEL_REF)
+-      return \"ldr\\t%0, %1\";
+-      
+-    if (which_alternative == 0)
+-      return \"ldrsb\\t%0, %1\";
+-      
+-    ops[0] = operands[0];
+-    
+-    if (GET_CODE (mem) == PLUS)
+-      {
+-        rtx a = XEXP (mem, 0);
+-	rtx b = XEXP (mem, 1);
+-	
+-        ops[1] = a;
+-        ops[2] = b;
+-
+-        if (GET_CODE (a) == REG)
+-	  {
+-	    if (GET_CODE (b) == REG)
+-              output_asm_insn (\"ldrsb\\t%0, [%1, %2]\", ops);
+-            else if (REGNO (a) == REGNO (ops[0]))
+-	      {
+-                output_asm_insn (\"ldrb\\t%0, [%1, %2]\", ops);
+-		output_asm_insn (\"sxtb\\t%0, %0\", ops);
+-	      }
+-	    else
+-              output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-	  }
+-	else
+-          {
+-	    gcc_assert (GET_CODE (b) == REG);
+-            if (REGNO (b) == REGNO (ops[0]))
+-	      {
+-                output_asm_insn (\"ldrb\\t%0, [%2, %1]\", ops);
+-		output_asm_insn (\"sxtb\\t%0, %0\", ops);
+-	      }
+-	    else
+-              output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-          }
+-      }
+-    else if (GET_CODE (mem) == REG && REGNO (ops[0]) == REGNO (mem))
+-      {
+-        output_asm_insn (\"ldrb\\t%0, [%0, #0]\", ops);
+-	output_asm_insn (\"sxtb\\t%0, %0\", ops);
+-      }
+-    else
+-      {
+-        ops[1] = mem;
+-        ops[2] = const0_rtx;
+-	
+-        output_asm_insn (\"mov\\t%0, %2\;ldrsb\\t%0, [%1, %0]\", ops);
+-      }
+-    return \"\";
+-  }"
+-  [(set_attr "length" "2,2,4")
+-   (set_attr "type" "alu_shift,load_byte,load_byte")
+-   (set_attr "pool_range" "*,32,32")]
++  "TARGET_THUMB1"
++{
++  rtx addr;
++
++  if (which_alternative == 0 && arm_arch6)
++    return "sxtb\\t%0, %1";
++  if (which_alternative == 0)
++    return "#";
++
++  addr = XEXP (operands[1], 0);
++  if (GET_CODE (addr) == PLUS
++      && REG_P (XEXP (addr, 0)) && REG_P (XEXP (addr, 1)))
++    return "ldrsb\\t%0, %1";
++      
++  return "#";
++}
++  [(set_attr_alternative "length"
++			 [(if_then_else (eq_attr "is_arch6" "yes")
++					(const_int 2) (const_int 4))
++			  (const_int 2)
++			  (if_then_else (eq_attr "is_arch6" "yes")
++					(const_int 4) (const_int 6))])
++   (set_attr "type" "alu_shift,load_byte,load_byte")]
+ )
+ 
+ (define_expand "extendsfdf2"
+@@ -6784,6 +6639,30 @@
+     operands[2] = force_reg (SImode, operands[2]);
+   ")
+ 
++;; A pattern to recognize a special situation and optimize for it.
++;; On the thumb, zero-extension from memory is preferrable to sign-extension
++;; due to the available addressing modes.  Hence, convert a signed comparison
++;; with zero into an unsigned comparison with 127 if possible.
++(define_expand "cbranchqi4"
++  [(set (pc) (if_then_else
++	      (match_operator 0 "lt_ge_comparison_operator"
++	       [(match_operand:QI 1 "memory_operand" "")
++	        (match_operand:QI 2 "const0_operand" "")])
++	      (label_ref (match_operand 3 "" ""))
++	      (pc)))]
++  "TARGET_THUMB1"
++{
++  rtx xops[4];
++  xops[1] = gen_reg_rtx (SImode);
++  emit_insn (gen_zero_extendqisi2 (xops[1], operands[1]));
++  xops[2] = GEN_INT (127);
++  xops[0] = gen_rtx_fmt_ee (GET_CODE (operands[0]) == GE ? LEU : GTU,
++			    VOIDmode, xops[1], xops[2]);
++  xops[3] = operands[3];
++  emit_insn (gen_cbranchsi4 (xops[0], xops[1], xops[2], xops[3]));
++  DONE;
++})
++
+ (define_expand "cbranchsf4"
+   [(set (pc) (if_then_else
+ 	      (match_operator 0 "arm_comparison_operator"
+@@ -6849,7 +6728,7 @@
+    }"
+ )
+ 
+-(define_insn "*cbranchsi4_insn"
++(define_insn "cbranchsi4_insn"
+   [(set (pc) (if_then_else
+ 	      (match_operator 0 "arm_comparison_operator"
+ 	       [(match_operand:SI 1 "s_register_operand" "l,*h")
+@@ -6858,7 +6737,20 @@
+ 	      (pc)))]
+   "TARGET_THUMB1"
+   "*
+-  output_asm_insn (\"cmp\\t%1, %2\", operands);
++  rtx t = prev_nonnote_insn (insn);
++  if (t != NULL_RTX
++      && INSN_P (t)
++      && INSN_CODE (t) == CODE_FOR_cbranchsi4_insn)
++    {
++      t = XEXP (SET_SRC (PATTERN (t)), 0);
++      if (!rtx_equal_p (XEXP (t, 0), operands[1])
++	  || !rtx_equal_p (XEXP (t, 1), operands[2]))
++	t = NULL_RTX;
++    }
++  else
++    t = NULL_RTX;
++  if (t == NULL_RTX)
++    output_asm_insn (\"cmp\\t%1, %2\", operands);
+ 
+   switch (get_attr_length (insn))
+     {
+@@ -7674,15 +7566,15 @@
+ 	(if_then_else
+ 	 (match_operator 4 "arm_comparison_operator"
+ 	  [(plus:SI
+-	    (match_operand:SI 2 "s_register_operand" "%l,0,*0,1,1,1")
+-	    (match_operand:SI 3 "reg_or_int_operand" "lL,IJ,*r,lIJ,lIJ,lIJ"))
++	    (match_operand:SI 2 "s_register_operand" "%0,l,*l,1,1,1")
++	    (match_operand:SI 3 "reg_or_int_operand" "IJ,lL,*l,lIJ,lIJ,lIJ"))
+ 	   (const_int 0)])
+ 	 (label_ref (match_operand 5 "" ""))
+ 	 (pc)))
+    (set
+     (match_operand:SI 0 "thumb_cbrch_target_operand" "=l,l,*!h,*?h,*?m,*?m")
+     (plus:SI (match_dup 2) (match_dup 3)))
+-   (clobber (match_scratch:SI 1 "=X,X,X,l,&l,&l"))]
++   (clobber (match_scratch:SI 1 "=X,X,l,l,&l,&l"))]
+   "TARGET_THUMB1
+    && (GET_CODE (operands[4]) == EQ
+        || GET_CODE (operands[4]) == NE
+@@ -7692,8 +7584,7 @@
+    {
+      rtx cond[3];
+ 
+-     
+-     cond[0] = (which_alternative < 3) ? operands[0] : operands[1];
++     cond[0] = (which_alternative < 2) ? operands[0] : operands[1];
+      cond[1] = operands[2];
+      cond[2] = operands[3];
+ 
+@@ -7702,13 +7593,13 @@
+      else
+        output_asm_insn (\"add\\t%0, %1, %2\", cond);
+ 
+-     if (which_alternative >= 3
++     if (which_alternative >= 2
+ 	 && which_alternative < 4)
+        output_asm_insn (\"mov\\t%0, %1\", operands);
+      else if (which_alternative >= 4)
+        output_asm_insn (\"str\\t%1, %0\", operands);
+ 
+-     switch (get_attr_length (insn) - ((which_alternative >= 3) ? 2 : 0))
++     switch (get_attr_length (insn) - ((which_alternative >= 2) ? 2 : 0))
+        {
+ 	 case 4:
+ 	   return \"b%d4\\t%l5\";
+@@ -7722,7 +7613,7 @@
+   [(set (attr "far_jump")
+         (if_then_else
+ 	    (ior (and (lt (symbol_ref ("which_alternative"))
+-	                  (const_int 3))
++	                  (const_int 2))
+ 		      (eq_attr "length" "8"))
+ 		 (eq_attr "length" "10"))
+ 	    (const_string "yes")
+@@ -7730,7 +7621,7 @@
+    (set (attr "length")
+      (if_then_else
+        (lt (symbol_ref ("which_alternative"))
+-		       (const_int 3))
++		       (const_int 2))
+        (if_then_else
+ 	 (and (ge (minus (match_dup 5) (pc)) (const_int -250))
+ 	      (le (minus (match_dup 5) (pc)) (const_int 256)))
+@@ -9483,41 +9374,117 @@
+    (set_attr "length" "4,8")]
+ )
+ 
+-(define_insn "*compare_scc"
++; A series of splitters for the compare_scc pattern below.  Note that
++; order is important.
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(lt:SI (match_operand:SI 1 "s_register_operand" "")
++	       (const_int 0)))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_32BIT && reload_completed"
++  [(set (match_dup 0) (lshiftrt:SI (match_dup 1) (const_int 31)))])
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(ge:SI (match_operand:SI 1 "s_register_operand" "")
++	       (const_int 0)))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_32BIT && reload_completed"
++  [(set (match_dup 0) (not:SI (match_dup 1)))
++   (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 31)))])
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(eq:SI (match_operand:SI 1 "s_register_operand" "")
++	       (const_int 0)))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_32BIT && reload_completed"
++  [(parallel
++    [(set (reg:CC CC_REGNUM)
++	  (compare:CC (const_int 1) (match_dup 1)))
++     (set (match_dup 0)
++	  (minus:SI (const_int 1) (match_dup 1)))])
++   (cond_exec (ltu:CC (reg:CC CC_REGNUM) (const_int 0))
++	      (set (match_dup 0) (const_int 0)))])
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(ne:SI (match_operand:SI 1 "s_register_operand" "")
++	       (match_operand:SI 2 "const_int_operand" "")))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_32BIT && reload_completed"
++  [(parallel
++    [(set (reg:CC CC_REGNUM)
++	  (compare:CC (match_dup 1) (match_dup 2)))
++     (set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3)))])
++   (cond_exec (ne:CC (reg:CC CC_REGNUM) (const_int 0))
++	      (set (match_dup 0) (const_int 1)))]
++{
++  operands[3] = GEN_INT (-INTVAL (operands[2]));
++})
++
++(define_split
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(ne:SI (match_operand:SI 1 "s_register_operand" "")
++	       (match_operand:SI 2 "arm_add_operand" "")))
++   (clobber (reg:CC CC_REGNUM))]
++  "TARGET_32BIT && reload_completed"
++  [(parallel
++    [(set (reg:CC_NOOV CC_REGNUM)
++	  (compare:CC_NOOV (minus:SI (match_dup 1) (match_dup 2))
++			   (const_int 0)))
++     (set (match_dup 0) (minus:SI (match_dup 1) (match_dup 2)))])
++   (cond_exec (ne:CC_NOOV (reg:CC_NOOV CC_REGNUM) (const_int 0))
++	      (set (match_dup 0) (const_int 1)))])
++
++(define_insn_and_split "*compare_scc"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+ 	(match_operator:SI 1 "arm_comparison_operator"
+ 	 [(match_operand:SI 2 "s_register_operand" "r,r")
+ 	  (match_operand:SI 3 "arm_add_operand" "rI,L")]))
+    (clobber (reg:CC CC_REGNUM))]
+-  "TARGET_ARM"
+-  "*
+-    if (operands[3] == const0_rtx)
+-      {
+-	if (GET_CODE (operands[1]) == LT)
+-	  return \"mov\\t%0, %2, lsr #31\";
+-
+-	if (GET_CODE (operands[1]) == GE)
+-	  return \"mvn\\t%0, %2\;mov\\t%0, %0, lsr #31\";
+-
+-	if (GET_CODE (operands[1]) == EQ)
+-	  return \"rsbs\\t%0, %2, #1\;movcc\\t%0, #0\";
+-      }
+-
+-    if (GET_CODE (operands[1]) == NE)
+-      {
+-        if (which_alternative == 1)
+-	  return \"adds\\t%0, %2, #%n3\;movne\\t%0, #1\";
+-        return \"subs\\t%0, %2, %3\;movne\\t%0, #1\";
+-      }
+-    if (which_alternative == 1)
+-      output_asm_insn (\"cmn\\t%2, #%n3\", operands);
+-    else
+-      output_asm_insn (\"cmp\\t%2, %3\", operands);
+-    return \"mov%D1\\t%0, #0\;mov%d1\\t%0, #1\";
+-  "
+-  [(set_attr "conds" "clob")
+-   (set_attr "length" "12")]
+-)
++  "TARGET_32BIT"
++  "#"
++  "&& reload_completed"
++  [(set (reg:CC CC_REGNUM) (compare:CC (match_dup 2) (match_dup 3)))
++   (cond_exec (match_dup 4) (set (match_dup 0) (const_int 0)))
++   (cond_exec (match_dup 5) (set (match_dup 0) (const_int 1)))]
++{
++  rtx tmp1;
++  enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]),
++					   operands[2], operands[3]);
++  enum rtx_code rc = GET_CODE (operands[1]);
++
++  tmp1 = gen_rtx_REG (mode, CC_REGNUM);
++
++  operands[5] = gen_rtx_fmt_ee (rc, VOIDmode, tmp1, const0_rtx);
++  if (mode == CCFPmode || mode == CCFPEmode)
++    rc = reverse_condition_maybe_unordered (rc);
++  else
++    rc = reverse_condition (rc);
++  operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, tmp1, const0_rtx);
++})
++
++;; Attempt to improve the sequence generated by the compare_scc splitters
++;; not to use conditional execution.
++(define_peephole2
++  [(set (reg:CC CC_REGNUM)
++	(compare:CC (match_operand:SI 1 "register_operand" "")
++		    (match_operand:SI 2 "arm_rhs_operand" "")))
++   (cond_exec (ne (reg:CC CC_REGNUM) (const_int 0))
++	      (set (match_operand:SI 0 "register_operand" "") (const_int 0)))
++   (cond_exec (eq (reg:CC CC_REGNUM) (const_int 0))
++	      (set (match_dup 0) (const_int 1)))
++   (match_scratch:SI 3 "r")]
++  "TARGET_32BIT"
++  [(set (match_dup 3) (minus:SI (match_dup 1) (match_dup 2)))
++   (parallel
++    [(set (reg:CC CC_REGNUM)
++	  (compare:CC (const_int 0) (match_dup 3)))
++     (set (match_dup 0) (minus:SI (const_int 0) (match_dup 3)))])
++   (set (match_dup 0)
++	(plus:SI (plus:SI (match_dup 0) (match_dup 3))
++		 (geu:SI (reg:CC CC_REGNUM) (const_int 0))))])
+ 
+ (define_insn "*cond_move"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-08-31 09:40:16 +0000
++++ new/gcc/config/arm/predicates.md	2010-08-31 10:00:27 +0000
+@@ -115,6 +115,10 @@
+   (and (match_code "const_int")
+        (match_test "const_ok_for_arm (~INTVAL (op))")))
+ 
++(define_predicate "const0_operand"
++  (and (match_code "const_int")
++       (match_test "INTVAL (op) == 0")))
++
+ ;; Something valid on the RHS of an ARM data-processing instruction
+ (define_predicate "arm_rhs_operand"
+   (ior (match_operand 0 "s_register_operand")
+@@ -233,6 +237,9 @@
+ 			 && (TARGET_FPA || TARGET_VFP)")
+             (match_code "unordered,ordered,unlt,unle,unge,ungt"))))
+ 
++(define_special_predicate "lt_ge_comparison_operator"
++  (match_code "lt,ge"))
++
+ (define_special_predicate "minmax_operator"
+   (and (match_code "smin,smax,umin,umax")
+        (match_test "mode == GET_MODE (op)")))
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-31 09:40:16 +0000
++++ new/gcc/config/arm/thumb2.md	2010-08-31 10:00:27 +0000
+@@ -599,42 +599,6 @@
+    (set_attr "length" "6,10")]
+ )
+ 
+-(define_insn "*thumb2_compare_scc"
+-  [(set (match_operand:SI 0 "s_register_operand" "=r,r")
+-	(match_operator:SI 1 "arm_comparison_operator"
+-	 [(match_operand:SI 2 "s_register_operand" "r,r")
+-	  (match_operand:SI 3 "arm_add_operand" "rI,L")]))
+-   (clobber (reg:CC CC_REGNUM))]
+-  "TARGET_THUMB2"
+-  "*
+-    if (operands[3] == const0_rtx)
+-      {
+-	if (GET_CODE (operands[1]) == LT)
+-	  return \"lsr\\t%0, %2, #31\";
+-
+-	if (GET_CODE (operands[1]) == GE)
+-	  return \"mvn\\t%0, %2\;lsr\\t%0, %0, #31\";
+-
+-	if (GET_CODE (operands[1]) == EQ)
+-	  return \"rsbs\\t%0, %2, #1\;it\\tcc\;movcc\\t%0, #0\";
+-      }
+-
+-    if (GET_CODE (operands[1]) == NE)
+-      {
+-        if (which_alternative == 1)
+-	  return \"adds\\t%0, %2, #%n3\;it\\tne\;movne\\t%0, #1\";
+-        return \"subs\\t%0, %2, %3\;it\\tne\;movne\\t%0, #1\";
+-      }
+-    if (which_alternative == 1)
+-      output_asm_insn (\"cmn\\t%2, #%n3\", operands);
+-    else
+-      output_asm_insn (\"cmp\\t%2, %3\", operands);
+-    return \"ite\\t%D1\;mov%D1\\t%0, #0\;mov%d1\\t%0, #1\";
+-  "
+-  [(set_attr "conds" "clob")
+-   (set_attr "length" "14")]
+-)
+-
+ (define_insn "*thumb2_cond_move"
+   [(set (match_operand:SI 0 "s_register_operand" "=r,r,r")
+ 	(if_then_else:SI (match_operator 3 "equality_operator"
+
+=== added file 'gcc/testsuite/gcc.c-torture/execute/pr40657.c'
+--- old/gcc/testsuite/gcc.c-torture/execute/pr40657.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/execute/pr40657.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,23 @@
++/* Verify that that Thumb-1 epilogue size optimization does not clobber the
++   return value.  */
++
++long long v = 0x123456789abc;
++
++__attribute__((noinline)) void bar (int *x)
++{
++  asm volatile ("" : "=m" (x) ::);
++}
++
++__attribute__((noinline)) long long foo()
++{
++  int x;
++  bar(&x);
++  return v;
++}
++
++int main ()
++{
++  if (foo () != v)
++    abort ();
++  exit (0);
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr40657-1.c'
+--- old/gcc/testsuite/gcc.target/arm/pr40657-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr40657-1.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,13 @@
++/* { dg-options "-Os -march=armv5te -mthumb" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-final { scan-assembler "pop.*r1.*pc" } } */
++/* { dg-final { scan-assembler-not "sub\[\\t \]*sp,\[\\t \]*sp" } } */
++/* { dg-final { scan-assembler-not "add\[\\t \]*sp,\[\\t \]*sp" } } */
++
++extern void bar(int*);
++int foo()
++{
++  int x;
++  bar(&x);
++  return x;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr40657-2.c'
+--- old/gcc/testsuite/gcc.target/arm/pr40657-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr40657-2.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,20 @@
++/* { dg-options "-Os -march=armv4t -mthumb" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-final { scan-assembler-not "sub\[\\t \]*sp,\[\\t \]*sp" } } */
++/* { dg-final { scan-assembler-not "add\[\\t \]*sp,\[\\t \]*sp" } } */
++
++/* Here, we test that if there's a pop of r[4567] in the epilogue,
++   add sp,sp,#12 is removed and replaced by three additional pops
++   of lower-numbered regs.  */
++
++extern void bar(int*);
++
++int t1, t2, t3, t4, t5;
++int foo()
++{
++  int i,j,k,x = 0;
++  for (i = 0; i < t1; i++)
++    for (j = 0; j < t2; j++)
++	  bar(&x);
++  return x;
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42172-1.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42172-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42172-1.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,19 @@
++/* { dg-options "-O2" }  */
++
++struct A {
++  unsigned int f1 : 3;
++  unsigned int f2 : 3;
++  unsigned int f3 : 1;
++  unsigned int f4 : 1;
++
++};
++
++void init_A (struct A *this)
++{
++  this->f1 = 0;
++  this->f2 = 1;
++  this->f3 = 0;
++  this->f4 = 0;
++}
++
++/* { dg-final { scan-assembler-times "ldr" 1 } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42835.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42835.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42835.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-mthumb -Os" }  */
++/* { dg-require-effective-target arm_thumb2_ok } */
++
++int foo(int *p, int i)
++{
++  return( (i < 0 && *p == 1)
++	  || (i > 0 && *p == 2) );
++}
++
++/* { dg-final { scan-assembler-times "movne\[\\t \]*r.,\[\\t \]*#" 1 } } */
++/* { dg-final { scan-assembler-times "moveq\[\\t \]*r.,\[\\t \]*#" 1 } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/thumb-cbranchqi.c'
+--- old/gcc/testsuite/gcc.target/arm/thumb-cbranchqi.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/thumb-cbranchqi.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,15 @@
++/* { dg-do compile } */
++/* { dg-options "-mthumb -Os" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++
++int ldrb(unsigned char* p)
++{
++  if (p[8] <= 0x7F)
++    return 2;
++  else
++    return 5;
++}
++
++
++/* { dg-final { scan-assembler "127" } } */
++/* { dg-final { scan-assembler "bhi" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/thumb-comparisons.c'
+--- old/gcc/testsuite/gcc.target/arm/thumb-comparisons.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/thumb-comparisons.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-mthumb -Os" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++
++int foo(char ch)
++{
++  switch (ch) {
++    case '-':
++    case '?':
++    case '/':
++    case 99:
++        return 1;
++    default:
++        return 0;
++  }
++}
++
++/* { dg-final { scan-assembler-times "cmp\[\\t \]*r.,\[\\t \]*#63" 1 } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/thumb-stackframe.c'
+--- old/gcc/testsuite/gcc.target/arm/thumb-stackframe.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/thumb-stackframe.c	2010-08-31 10:00:27 +0000
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-options "-mthumb -Os" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++
++extern void bar(int*);
++int foo()
++{
++  int x;
++  bar(&x);
++  return x;
++}
++
++/* { dg-final { scan-assembler-not "sub\[\\t \]*sp,\[\\t \]*sp," } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99380.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99380.patch
new file mode 100644
index 0000000000..c66c11f82c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99380.patch
@@ -0,0 +1,2997 @@
+2010-08-31  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-04-14  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/21803
+	gcc/
+	* ifcvt.c (cond_exec_process_if_block): Look for identical sequences
+	at the start and end of the then/else blocks, and omit them from the
+	conversion.
+	* cfgcleanup.c (flow_find_cross_jump): No longer static.  Remove MODE
+	argument; all callers changed.  Pass zero to old_insns_match_p instead.
+	(flow_find_head_matching_sequence): New function.
+	(old_insns_match_p): Check REG_EH_REGION notes for calls.
+	* basic-block.h (flow_find_cross_jump,
+	flow_find_head_matching_sequence): Declare functions.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42496.c: New test.
+
+	2010-04-22  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR middle-end/29274
+	gcc/
+	* tree-pass.h (pass_optimize_widening_mul): Declare.
+	* tree-ssa-math-opts.c (execute_optimize_widening_mul,
+	gate_optimize_widening_mul): New static functions.
+	(pass_optimize_widening_mul): New.
+	* expr.c (expand_expr_real_2) <case WIDEN_MULT_EXPR>: New case.
+	<case MULT_EXPR>: Remove support for widening multiplies.
+	* tree.def (WIDEN_MULT_EXPR): Tweak comment.
+	* cfgexpand.c (expand_debug_expr) <case WIDEN_MULT_EXPR>: Use
+	simplify_gen_unary rather than directly building extensions.
+	* tree-cfg.c (verify_gimple_assign_binary): Add tests for
+	WIDEN_MULT_EXPR.
+	* expmed.c (expand_widening_mult): New function.
+	* passes.c (init_optimization_passes): Add pass_optimize_widening_mul.
+	* optabs.h (expand_widening_mult): Declare.
+
+	gcc/testsuite/
+	* gcc.target/i386/wmul-1.c: New test.
+	* gcc.target/i386/wmul-2.c: New test.
+	* gcc.target/bfin/wmul-1.c: New test.
+	* gcc.target/bfin/wmul-2.c: New test.	
+	* gcc.target/arm/wmul-1.c: New test.
+	* gcc.target/arm/wmul-2.c: New test.
+
+	2010-04-24  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR tree-optimization/41442
+	gcc/
+	* fold-const.c (merge_truthop_with_opposite_arm): New function.
+	(fold_binary_loc): Call it.
+
+	gcc/testsuite/
+	* gcc.target/i386/pr41442.c: New test.
+
+	2010-04-29  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/42895
+	gcc/
+	* doc/tm.texi (ADJUST_REG_ALLOC_ORDER): Renamed from
+	ORDER_REGS_FOR_LOCAL_ALLOC.  All instances of this macro changed.
+	(HONOR_REG_ALLOC_ORDER): Describe new macro.
+	* ira.c (setup_alloc_regs): Use ADJUST_REG_ALLOC_ORDER if defined.
+	* ira-color.c (assign_hard_reg): Take prologue/epilogue costs into
+	account only if HONOR_REG_ALLOC_ORDER is not defined.
+	* config/arm/arm.h (HONOR_REG_ALLOC_ORDER): Define.
+	* system.h (ORDER_REGS_FOR_LOCAL_ALLOC): Poison.
+
+	2010-05-04  Mikael Pettersson  <mikpe@it.uu.se>
+
+	PR bootstrap/43964
+	gcc/
+	* ira-color.c (assign_hard_reg): Declare rclass and add_cost
+	only if HONOR_REG_ALLOC_ORDER is not defined.
+
+	2010-06-04  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR rtl-optimization/39871
+	PR rtl-optimization/40615
+	PR rtl-optimization/42500
+	PR rtl-optimization/42502
+	gcc/
+	* ira.c (init_reg_equiv_memory_loc: New function.
+	(ira): Call it twice.
+	* reload.h (calculate_elim_costs_all_insns): Declare.
+	* ira-costs.c: Include "reload.h".
+	(regno_equiv_gains): New static variable.
+	(init_costs): Allocate it.
+	(finish_costs): Free it.
+	(ira_costs): Call calculate_elim_costs_all_insns.
+	(find_costs_and_classes): Take estimated elimination costs
+	into account.
+	(ira_adjust_equiv_reg_cost): New function.
+	* ira.h (ira_adjust_equiv_reg_cost): Declare it.
+	* reload1.c (init_eliminable_invariants, free_reg_equiv,
+	elimination_costs_in_insn, note_reg_elim_costly): New static functions.
+	(elim_bb): New static variable.
+	(reload): Move code out of here into init_eliminable_invariants and
+	free_reg_equiv.  Call them.
+	(calculate_elim_costs_all_insns): New function.
+	(eliminate_regs_1): Declare.  Add extra arg FOR_COSTS;
+	all callers changed.  If FOR_COSTS is true, don't call alter_reg,
+	but call note_reg_elim_costly if we turned a valid memory address
+	into an invalid one.
+	* Makefile.in (ira-costs.o): Depend on reload.h.
+
+	gcc/testsuite/
+	* gcc.target/arm/eliminate.c: New test.
+
+	2010-06-09  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (thumb2_reorg): New function.
+	(arm_reorg): Call it.
+	* config/arm/thumb2.md (define_peephole2 for flag clobbering
+	arithmetic operations): Delete.
+
+	2010-06-12  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (thumb2_reorg): Fix errors in previous change.
+
+	2010-06-17  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR rtl-optimization/39871
+	gcc/
+	* reload1.c (init_eliminable_invariants): For flag_pic, disable
+	equivalences only for constants that aren't LEGITIMATE_PIC_OPERAND_P.
+	(function_invariant_p): Rule out a plus of frame or arg pointer with
+	a SYMBOL_REF.
+	* ira.c (find_reg_equiv_invariant_const): Likewise.
+
+	2010-06-18  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR rtl-optimization/40900
+	gcc/
+	* expr.c (expand_expr_real_1) <SSA_NAME>: Fix long line.  Save the
+	original expression for later reuse.
+	<expand_decl_rtl>: Use promote_function_mode to compute the signedness
+	of the promoted RTL for a SSA_NAME on the LHS of a call statement.
+
+	2010-06-18  Bernd Schmidt  <bernds@codesourcery.com>
+	gcc/testsuite/
+	* gcc.target/arm/pr40900.c: New test.
+
+	2010-06-30  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR tree-optimization/39799
+	gcc/
+	* tree-inline.c (remap_ssa_name): Initialize variable only if
+	SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
+	* tree-ssa.c (warn_uninit): Avoid emitting an unnecessary message.
+
+	gcc/testsuite/
+	* c-c++-common/uninit-17.c: New test.
+
+	2010-07-25  Eric Botcazou  <ebotcazou@adacore.com>
+
+	PR target/44484
+	gcc/
+	* config/sparc/predicates.md (memory_reg_operand): Delete.
+	* config/sparc/sync.md (sync_compare_and_swap): Minor tweaks.
+	(*sync_compare_and_swap): Encode the address form in the pattern.
+	(*sync_compare_and_swapdi_v8plus): Likewise.
+
+ 2010-08-29  Chung-Lin Tang  <cltang@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/Makefile.in'
+--- old/gcc/Makefile.in	2010-08-10 13:31:21 +0000
++++ new/gcc/Makefile.in	2010-09-01 13:29:58 +0000
+@@ -3193,7 +3193,7 @@
+ ira-costs.o: ira-costs.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
+    hard-reg-set.h $(RTL_H) $(EXPR_H) $(TM_P_H) $(FLAGS_H) $(BASIC_BLOCK_H) \
+    $(REGS_H) addresses.h insn-config.h $(RECOG_H) $(TOPLEV_H) $(TARGET_H) \
+-   $(PARAMS_H) $(IRA_INT_H)
++   $(PARAMS_H) $(IRA_INT_H) reload.h
+ ira-conflicts.o: ira-conflicts.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) \
+    $(TARGET_H) $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) \
+    insn-config.h $(RECOG_H) $(BASIC_BLOCK_H) $(TOPLEV_H) $(TM_P_H) $(PARAMS_H) \
+
+=== modified file 'gcc/basic-block.h'
+--- old/gcc/basic-block.h	2010-08-16 09:41:58 +0000
++++ new/gcc/basic-block.h	2010-09-01 13:29:58 +0000
+@@ -894,6 +894,10 @@
+ 
+ /* In cfgcleanup.c.  */
+ extern bool cleanup_cfg (int);
++extern int flow_find_cross_jump (basic_block, basic_block, rtx *, rtx *);
++extern int flow_find_head_matching_sequence (basic_block, basic_block,
++					     rtx *, rtx *, int);
++
+ extern bool delete_unreachable_blocks (void);
+ 
+ extern bool mark_dfs_back_edges (void);
+
+=== modified file 'gcc/cfgcleanup.c'
+--- old/gcc/cfgcleanup.c	2010-05-17 16:26:22 +0000
++++ new/gcc/cfgcleanup.c	2010-09-01 13:29:58 +0000
+@@ -68,7 +68,6 @@
+ static bool try_crossjump_to_edge (int, edge, edge);
+ static bool try_crossjump_bb (int, basic_block);
+ static bool outgoing_edges_match (int, basic_block, basic_block);
+-static int flow_find_cross_jump (int, basic_block, basic_block, rtx *, rtx *);
+ static bool old_insns_match_p (int, rtx, rtx);
+ 
+ static void merge_blocks_move_predecessor_nojumps (basic_block, basic_block);
+@@ -972,13 +971,27 @@
+      be filled that clobbers a parameter expected by the subroutine.
+ 
+      ??? We take the simple route for now and assume that if they're
+-     equal, they were constructed identically.  */
+-
+-  if (CALL_P (i1)
+-      && (!rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
++     equal, they were constructed identically.
++
++     Also check for identical exception regions.  */
++
++  if (CALL_P (i1))
++    {
++      /* Ensure the same EH region.  */
++      rtx n1 = find_reg_note (i1, REG_EH_REGION, 0);
++      rtx n2 = find_reg_note (i2, REG_EH_REGION, 0);
++
++      if (!n1 && n2)
++	return false;
++
++      if (n1 && (!n2 || XEXP (n1, 0) != XEXP (n2, 0)))
++	return false;
++
++      if (!rtx_equal_p (CALL_INSN_FUNCTION_USAGE (i1),
+ 			CALL_INSN_FUNCTION_USAGE (i2))
+-	  || SIBLING_CALL_P (i1) != SIBLING_CALL_P (i2)))
+-    return false;
++	  || SIBLING_CALL_P (i1) != SIBLING_CALL_P (i2))
++	return false;
++    }
+ 
+ #ifdef STACK_REGS
+   /* If cross_jump_death_matters is not 0, the insn's mode
+@@ -1017,6 +1030,29 @@
+   return false;
+ }
+ 
++/* When comparing insns I1 and I2 in flow_find_cross_jump or
++   flow_find_head_matching_sequence, ensure the notes match.  */
++
++static void
++merge_notes (rtx i1, rtx i2)
++{
++  /* If the merged insns have different REG_EQUAL notes, then
++     remove them.  */
++  rtx equiv1 = find_reg_equal_equiv_note (i1);
++  rtx equiv2 = find_reg_equal_equiv_note (i2);
++
++  if (equiv1 && !equiv2)
++    remove_note (i1, equiv1);
++  else if (!equiv1 && equiv2)
++    remove_note (i2, equiv2);
++  else if (equiv1 && equiv2
++	   && !rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
++    {
++      remove_note (i1, equiv1);
++      remove_note (i2, equiv2);
++    }
++}
++
+ /* Look through the insns at the end of BB1 and BB2 and find the longest
+    sequence that are equivalent.  Store the first insns for that sequence
+    in *F1 and *F2 and return the sequence length.
+@@ -1024,9 +1060,8 @@
+    To simplify callers of this function, if the blocks match exactly,
+    store the head of the blocks in *F1 and *F2.  */
+ 
+-static int
+-flow_find_cross_jump (int mode ATTRIBUTE_UNUSED, basic_block bb1,
+-		      basic_block bb2, rtx *f1, rtx *f2)
++int
++flow_find_cross_jump (basic_block bb1, basic_block bb2, rtx *f1, rtx *f2)
+ {
+   rtx i1, i2, last1, last2, afterlast1, afterlast2;
+   int ninsns = 0;
+@@ -1066,7 +1101,7 @@
+       if (i1 == BB_HEAD (bb1) || i2 == BB_HEAD (bb2))
+ 	break;
+ 
+-      if (!old_insns_match_p (mode, i1, i2))
++      if (!old_insns_match_p (0, i1, i2))
+ 	break;
+ 
+       merge_memattrs (i1, i2);
+@@ -1074,21 +1109,7 @@
+       /* Don't begin a cross-jump with a NOTE insn.  */
+       if (INSN_P (i1))
+ 	{
+-	  /* If the merged insns have different REG_EQUAL notes, then
+-	     remove them.  */
+-	  rtx equiv1 = find_reg_equal_equiv_note (i1);
+-	  rtx equiv2 = find_reg_equal_equiv_note (i2);
+-
+-	  if (equiv1 && !equiv2)
+-	    remove_note (i1, equiv1);
+-	  else if (!equiv1 && equiv2)
+-	    remove_note (i2, equiv2);
+-	  else if (equiv1 && equiv2
+-		   && !rtx_equal_p (XEXP (equiv1, 0), XEXP (equiv2, 0)))
+-	    {
+-	      remove_note (i1, equiv1);
+-	      remove_note (i2, equiv2);
+-	    }
++	  merge_notes (i1, i2);
+ 
+ 	  afterlast1 = last1, afterlast2 = last2;
+ 	  last1 = i1, last2 = i2;
+@@ -1130,6 +1151,97 @@
+   return ninsns;
+ }
+ 
++/* Like flow_find_cross_jump, except start looking for a matching sequence from
++   the head of the two blocks.  Do not include jumps at the end.
++   If STOP_AFTER is nonzero, stop after finding that many matching
++   instructions.  */
++
++int
++flow_find_head_matching_sequence (basic_block bb1, basic_block bb2, rtx *f1,
++				  rtx *f2, int stop_after)
++{
++  rtx i1, i2, last1, last2, beforelast1, beforelast2;
++  int ninsns = 0;
++  edge e;
++  edge_iterator ei;
++  int nehedges1 = 0, nehedges2 = 0;
++
++  FOR_EACH_EDGE (e, ei, bb1->succs)
++    if (e->flags & EDGE_EH)
++      nehedges1++;
++  FOR_EACH_EDGE (e, ei, bb2->succs)
++    if (e->flags & EDGE_EH)
++      nehedges2++;
++
++  i1 = BB_HEAD (bb1);
++  i2 = BB_HEAD (bb2);
++  last1 = beforelast1 = last2 = beforelast2 = NULL_RTX;
++
++  while (true)
++    {
++
++      /* Ignore notes.  */
++      while (!NONDEBUG_INSN_P (i1) && i1 != BB_END (bb1))
++	i1 = NEXT_INSN (i1);
++
++      while (!NONDEBUG_INSN_P (i2) && i2 != BB_END (bb2))
++	i2 = NEXT_INSN (i2);
++
++      if (NOTE_P (i1) || NOTE_P (i2)
++	  || JUMP_P (i1) || JUMP_P (i2))
++	break;
++
++      /* A sanity check to make sure we're not merging insns with different
++	 effects on EH.  If only one of them ends a basic block, it shouldn't
++	 have an EH edge; if both end a basic block, there should be the same
++	 number of EH edges.  */
++      if ((i1 == BB_END (bb1) && i2 != BB_END (bb2)
++	   && nehedges1 > 0)
++	  || (i2 == BB_END (bb2) && i1 != BB_END (bb1)
++	      && nehedges2 > 0)
++	  || (i1 == BB_END (bb1) && i2 == BB_END (bb2)
++	      && nehedges1 != nehedges2))
++	break;
++
++      if (!old_insns_match_p (0, i1, i2))
++	break;
++
++      merge_memattrs (i1, i2);
++
++      /* Don't begin a cross-jump with a NOTE insn.  */
++      if (INSN_P (i1))
++	{
++	  merge_notes (i1, i2);
++
++	  beforelast1 = last1, beforelast2 = last2;
++	  last1 = i1, last2 = i2;
++	  ninsns++;
++	}
++
++      if (i1 == BB_END (bb1) || i2 == BB_END (bb2)
++	  || (stop_after > 0 && ninsns == stop_after))
++	break;
++
++      i1 = NEXT_INSN (i1);
++      i2 = NEXT_INSN (i2);
++    }
++
++#ifdef HAVE_cc0
++  /* Don't allow a compare to be shared by cross-jumping unless the insn
++     after the compare is also shared.  */
++  if (ninsns && reg_mentioned_p (cc0_rtx, last1) && sets_cc0_p (last1))
++    last1 = beforelast1, last2 = beforelast2, ninsns--;
++#endif
++
++  if (ninsns)
++    {
++      *f1 = last1;
++      *f2 = last2;
++    }
++
++  return ninsns;
++}
++
+ /* Return true iff outgoing edges of BB1 and BB2 match, together with
+    the branch instruction.  This means that if we commonize the control
+    flow before end of the basic block, the semantic remains unchanged.
+@@ -1498,7 +1610,7 @@
+     return false;
+ 
+   /* ... and part the second.  */
+-  nmatch = flow_find_cross_jump (mode, src1, src2, &newpos1, &newpos2);
++  nmatch = flow_find_cross_jump (src1, src2, &newpos1, &newpos2);
+ 
+   /* Don't proceed with the crossjump unless we found a sufficient number
+      of matching instructions or the 'from' block was totally matched
+
+=== modified file 'gcc/cfgexpand.c'
+--- old/gcc/cfgexpand.c	2010-05-14 17:11:03 +0000
++++ new/gcc/cfgexpand.c	2010-09-01 13:29:58 +0000
+@@ -3026,14 +3026,15 @@
+       if (SCALAR_INT_MODE_P (GET_MODE (op0))
+ 	  && SCALAR_INT_MODE_P (mode))
+ 	{
++	  enum machine_mode inner_mode = GET_MODE (op0);
+ 	  if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 0))))
+-	    op0 = gen_rtx_ZERO_EXTEND (mode, op0);
++	    op0 = simplify_gen_unary (ZERO_EXTEND, mode, op0, inner_mode);
+ 	  else
+-	    op0 = gen_rtx_SIGN_EXTEND (mode, op0);
++	    op0 = simplify_gen_unary (SIGN_EXTEND, mode, op0, inner_mode);
+ 	  if (TYPE_UNSIGNED (TREE_TYPE (TREE_OPERAND (exp, 1))))
+-	    op1 = gen_rtx_ZERO_EXTEND (mode, op1);
++	    op1 = simplify_gen_unary (ZERO_EXTEND, mode, op1, inner_mode);
+ 	  else
+-	    op1 = gen_rtx_SIGN_EXTEND (mode, op1);
++	    op1 = simplify_gen_unary (SIGN_EXTEND, mode, op1, inner_mode);
+ 	  return gen_rtx_MULT (mode, op0, op1);
+ 	}
+       return NULL;
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-08-31 10:00:27 +0000
++++ new/gcc/config/arm/arm.c	2010-09-01 13:29:58 +0000
+@@ -8116,8 +8116,6 @@
+ static bool
+ xscale_sched_adjust_cost (rtx insn, rtx link, rtx dep, int * cost)
+ {
+-  rtx i_pat, d_pat;
+-
+   /* Some true dependencies can have a higher cost depending
+      on precisely how certain input operands are used.  */
+   if (REG_NOTE_KIND (link) == 0
+@@ -12166,6 +12164,60 @@
+   return result;
+ }
+ 
++/* Convert instructions to their cc-clobbering variant if possible, since
++   that allows us to use smaller encodings.  */
++
++static void
++thumb2_reorg (void)
++{
++  basic_block bb;
++  regset_head live;
++
++  INIT_REG_SET (&live);
++
++  /* We are freeing block_for_insn in the toplev to keep compatibility
++     with old MDEP_REORGS that are not CFG based.  Recompute it now.  */
++  compute_bb_for_insn ();
++  df_analyze ();
++
++  FOR_EACH_BB (bb)
++    {
++      rtx insn;
++      COPY_REG_SET (&live, DF_LR_OUT (bb));
++      df_simulate_initialize_backwards (bb, &live);
++      FOR_BB_INSNS_REVERSE (bb, insn)
++	{
++	  if (NONJUMP_INSN_P (insn)
++	      && !REGNO_REG_SET_P (&live, CC_REGNUM))
++	    {
++	      rtx pat = PATTERN (insn);
++	      if (GET_CODE (pat) == SET
++		  && low_register_operand (XEXP (pat, 0), SImode)
++		  && thumb_16bit_operator (XEXP (pat, 1), SImode)
++		  && low_register_operand (XEXP (XEXP (pat, 1), 0), SImode)
++		  && low_register_operand (XEXP (XEXP (pat, 1), 1), SImode))
++		{
++		  rtx dst = XEXP (pat, 0);
++		  rtx src = XEXP (pat, 1);
++		  rtx op0 = XEXP (src, 0);
++		  if (rtx_equal_p (dst, op0)
++		      || GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
++		    {
++		      rtx ccreg = gen_rtx_REG (CCmode, CC_REGNUM);
++		      rtx clobber = gen_rtx_CLOBBER (VOIDmode, ccreg);
++		      rtvec vec = gen_rtvec (2, pat, clobber);
++		      PATTERN (insn) = gen_rtx_PARALLEL (VOIDmode, vec);
++		      INSN_CODE (insn) = -1;
++		    }
++		}
++	    }
++	  if (NONDEBUG_INSN_P (insn))
++	    df_simulate_one_insn_backwards (bb, insn, &live);
++	}
++    }
++  CLEAR_REG_SET (&live);
++}
++
+ /* Gcc puts the pool in the wrong place for ARM, since we can only
+    load addresses a limited distance around the pc.  We do some
+    special munging to move the constant pool values to the correct
+@@ -12177,6 +12229,9 @@
+   HOST_WIDE_INT address = 0;
+   Mfix * fix;
+ 
++  if (TARGET_THUMB2)
++    thumb2_reorg ();
++  
+   minipool_fix_head = minipool_fix_tail = NULL;
+ 
+   /* The first insn must always be a note, or the code below won't
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-08-13 11:11:15 +0000
++++ new/gcc/config/arm/arm.h	2010-09-01 13:29:58 +0000
+@@ -1133,7 +1133,11 @@
+ }
+ 
+ /* Use different register alloc ordering for Thumb.  */
+-#define ORDER_REGS_FOR_LOCAL_ALLOC arm_order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER arm_order_regs_for_local_alloc ()
++
++/* Tell IRA to use the order we define rather than messing it up with its
++   own cost calculations.  */
++#define HONOR_REG_ALLOC_ORDER
+ 
+ /* Interrupt functions can only use registers that have already been
+    saved by the prologue, even if they would normally be
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-08-31 10:00:27 +0000
++++ new/gcc/config/arm/arm.md	2010-09-01 13:29:58 +0000
+@@ -4074,7 +4074,7 @@
+ 
+ (define_split
+   [(set (match_operand:SI 0 "register_operand" "")
+-	(zero_extend:SI (match_operand:HI 1 "register_operand" "l,m")))]
++	(zero_extend:SI (match_operand:HI 1 "register_operand" "")))]
+   "!TARGET_THUMB2 && !arm_arch6"
+   [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 16)))
+    (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 16)))]
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-08-31 10:00:27 +0000
++++ new/gcc/config/arm/thumb2.md	2010-09-01 13:29:58 +0000
+@@ -1046,29 +1046,6 @@
+   }"
+ )
+ 
+-;; Peepholes and insns for 16-bit flag clobbering instructions.
+-;; The conditional forms of these instructions do not clobber CC.
+-;; However by the time peepholes are run it is probably too late to do
+-;; anything useful with this information.
+-(define_peephole2
+-  [(set (match_operand:SI          0 "low_register_operand" "")
+-        (match_operator:SI 3 "thumb_16bit_operator"
+-	 [(match_operand:SI 1  "low_register_operand" "")
+-	  (match_operand:SI 2 "low_register_operand" "")]))]
+-  "TARGET_THUMB2
+-   && (rtx_equal_p(operands[0], operands[1])
+-       || GET_CODE(operands[3]) == PLUS
+-       || GET_CODE(operands[3]) == MINUS)
+-   && peep2_regno_dead_p(0, CC_REGNUM)"
+-  [(parallel
+-    [(set (match_dup 0)
+-	  (match_op_dup 3
+-	   [(match_dup 1)
+-	    (match_dup 2)]))
+-     (clobber (reg:CC CC_REGNUM))])]
+-  ""
+-)
+-
+ (define_insn "*thumb2_alusi3_short"
+   [(set (match_operand:SI          0 "s_register_operand" "=l")
+         (match_operator:SI 3 "thumb_16bit_operator"
+
+=== modified file 'gcc/config/avr/avr.h'
+--- old/gcc/config/avr/avr.h	2010-01-11 23:12:14 +0000
++++ new/gcc/config/avr/avr.h	2010-09-01 13:29:58 +0000
+@@ -232,7 +232,7 @@
+     32,33,34,35					\
+     }
+ 
+-#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
+ 
+ 
+ #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
+
+=== modified file 'gcc/config/i386/i386.h'
+--- old/gcc/config/i386/i386.h	2010-04-27 19:14:19 +0000
++++ new/gcc/config/i386/i386.h	2010-09-01 13:29:58 +0000
+@@ -955,7 +955,7 @@
+    registers listed in CALL_USED_REGISTERS, keeping the others
+    available for storage of persistent values.
+ 
+-   The ORDER_REGS_FOR_LOCAL_ALLOC actually overwrite the order,
++   The ADJUST_REG_ALLOC_ORDER actually overwrite the order,
+    so this is just empty initializer for array.  */
+ 
+ #define REG_ALLOC_ORDER 					\
+@@ -964,11 +964,11 @@
+    33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,  \
+    48, 49, 50, 51, 52 }
+ 
+-/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order
++/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order
+    to be rearranged based on a particular function.  When using sse math,
+    we want to allocate SSE before x87 registers and vice versa.  */
+ 
+-#define ORDER_REGS_FOR_LOCAL_ALLOC x86_order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER x86_order_regs_for_local_alloc ()
+ 
+ 
+ #define OVERRIDE_ABI_FORMAT(FNDECL) ix86_call_abi_override (FNDECL)
+
+=== modified file 'gcc/config/mips/mips.h'
+--- old/gcc/config/mips/mips.h	2009-10-29 17:39:52 +0000
++++ new/gcc/config/mips/mips.h	2010-09-01 13:29:58 +0000
+@@ -2059,12 +2059,12 @@
+   182,183,184,185,186,187						\
+ }
+ 
+-/* ORDER_REGS_FOR_LOCAL_ALLOC is a macro which permits reg_alloc_order
++/* ADJUST_REG_ALLOC_ORDER is a macro which permits reg_alloc_order
+    to be rearranged based on a particular function.  On the mips16, we
+    want to allocate $24 (T_REG) before other registers for
+    instructions for which it is possible.  */
+ 
+-#define ORDER_REGS_FOR_LOCAL_ALLOC mips_order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER mips_order_regs_for_local_alloc ()
+ 
+ /* True if VALUE is an unsigned 6-bit number.  */
+ 
+
+=== modified file 'gcc/config/picochip/picochip.h'
+--- old/gcc/config/picochip/picochip.h	2009-11-04 11:06:36 +0000
++++ new/gcc/config/picochip/picochip.h	2010-09-01 13:29:58 +0000
+@@ -261,7 +261,7 @@
+ /* We can dynamically change the REG_ALLOC_ORDER using the following hook.
+    It would be desirable to change it for leaf functions so we can put
+    r12 at the end of this list.*/
+-#define ORDER_REGS_FOR_LOCAL_ALLOC picochip_order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER picochip_order_regs_for_local_alloc ()
+ 
+ /* How Values Fit in Registers  */
+ 
+
+=== modified file 'gcc/config/sparc/predicates.md'
+--- old/gcc/config/sparc/predicates.md	2009-02-20 15:20:38 +0000
++++ new/gcc/config/sparc/predicates.md	2010-09-01 13:29:58 +0000
+@@ -1,5 +1,5 @@
+ ;; Predicate definitions for SPARC.
+-;; Copyright (C) 2005, 2007, 2008 Free Software Foundation, Inc.
++;; Copyright (C) 2005, 2007, 2008, 2010 Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+ ;;
+@@ -473,9 +473,3 @@
+ ;; and (xor ... (not ...)) to (not (xor ...)).  */
+ (define_predicate "cc_arith_not_operator"
+   (match_code "and,ior"))
+-
+-;; Return true if OP is memory operand with just [%reg] addressing mode.
+-(define_predicate "memory_reg_operand"
+-  (and (match_code "mem")
+-       (and (match_operand 0 "memory_operand")
+-	    (match_test "REG_P (XEXP (op, 0))"))))
+
+=== modified file 'gcc/config/sparc/sparc.h'
+--- old/gcc/config/sparc/sparc.h	2010-04-02 18:54:46 +0000
++++ new/gcc/config/sparc/sparc.h	2010-09-01 13:29:58 +0000
+@@ -1181,7 +1181,7 @@
+   96, 97, 98, 99,			/* %fcc0-3 */	\
+   100, 0, 14, 30, 31, 101}		/* %icc, %g0, %o6, %i6, %i7, %sfp */
+ 
+-#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
+ 
+ extern char sparc_leaf_regs[];
+ #define LEAF_REGISTERS sparc_leaf_regs
+
+=== modified file 'gcc/config/sparc/sync.md'
+--- old/gcc/config/sparc/sync.md	2009-02-20 15:20:38 +0000
++++ new/gcc/config/sparc/sync.md	2010-09-01 13:29:58 +0000
+@@ -1,5 +1,5 @@
+ ;; GCC machine description for SPARC synchronization instructions.
+-;; Copyright (C) 2005, 2007, 2009
++;; Copyright (C) 2005, 2007, 2009, 2010
+ ;; Free Software Foundation, Inc.
+ ;;
+ ;; This file is part of GCC.
+@@ -62,7 +62,7 @@
+ 
+ (define_expand "sync_compare_and_swap<mode>"
+   [(parallel
+-     [(set (match_operand:I48MODE 0 "register_operand" "=r")
++     [(set (match_operand:I48MODE 0 "register_operand" "")
+ 	   (match_operand:I48MODE 1 "memory_operand" ""))
+       (set (match_dup 1)
+ 	   (unspec_volatile:I48MODE
+@@ -71,7 +71,7 @@
+ 	     UNSPECV_CAS))])]
+   "TARGET_V9"
+ {
+-  if (! REG_P (XEXP (operands[1], 0)))
++  if (!REG_P (XEXP (operands[1], 0)))
+     {
+       rtx addr = force_reg (Pmode, XEXP (operands[1], 0));
+       operands[1] = replace_equiv_address (operands[1], addr);
+@@ -81,20 +81,20 @@
+ 
+ (define_insn "*sync_compare_and_swap<mode>"
+   [(set (match_operand:I48MODE 0 "register_operand" "=r")
+-	(match_operand:I48MODE 1 "memory_reg_operand" "+m"))
+-   (set (match_dup 1)
++	(mem:I48MODE (match_operand 1 "register_operand" "r")))
++   (set (mem:I48MODE (match_dup 1))
+ 	(unspec_volatile:I48MODE
+ 	  [(match_operand:I48MODE 2 "register_operand" "r")
+ 	   (match_operand:I48MODE 3 "register_operand" "0")]
+ 	  UNSPECV_CAS))]
+   "TARGET_V9 && (<MODE>mode == SImode || TARGET_ARCH64)"
+-  "cas<modesuffix>\t%1, %2, %0"
++  "cas<modesuffix>\t[%1], %2, %0"
+   [(set_attr "type" "multi")])
+ 
+ (define_insn "*sync_compare_and_swapdi_v8plus"
+   [(set (match_operand:DI 0 "register_operand" "=h")
+-	(match_operand:DI 1 "memory_reg_operand" "+m"))
+-   (set (match_dup 1)
++	(mem:DI (match_operand 1 "register_operand" "r")))
++   (set (mem:DI (match_dup 1))
+ 	(unspec_volatile:DI
+ 	  [(match_operand:DI 2 "register_operand" "h")
+ 	   (match_operand:DI 3 "register_operand" "0")]
+@@ -109,7 +109,7 @@
+     output_asm_insn ("srl\t%L2, 0, %L2", operands);
+   output_asm_insn ("sllx\t%H2, 32, %H3", operands);
+   output_asm_insn ("or\t%L2, %H3, %H3", operands);
+-  output_asm_insn ("casx\t%1, %H3, %L3", operands);
++  output_asm_insn ("casx\t[%1], %H3, %L3", operands);
+   return "srlx\t%L3, 32, %H3";
+ }
+   [(set_attr "type" "multi")
+
+=== modified file 'gcc/config/xtensa/xtensa.h'
+--- old/gcc/config/xtensa/xtensa.h	2009-09-23 21:24:42 +0000
++++ new/gcc/config/xtensa/xtensa.h	2010-09-01 13:29:58 +0000
+@@ -286,7 +286,7 @@
+    incoming argument in a2 is live throughout the function and
+    local-alloc decides to use a2, then the incoming argument must
+    either be spilled or copied to another register.  To get around
+-   this, we define ORDER_REGS_FOR_LOCAL_ALLOC to redefine
++   this, we define ADJUST_REG_ALLOC_ORDER to redefine
+    reg_alloc_order for leaf functions such that lowest numbered
+    registers are used first with the exception that the incoming
+    argument registers are not used until after other register choices
+@@ -300,7 +300,7 @@
+   35, \
+ }
+ 
+-#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
++#define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
+ 
+ /* For Xtensa, the only point of this is to prevent GCC from otherwise
+    giving preference to call-used registers.  To minimize window
+
+=== modified file 'gcc/doc/tm.texi'
+--- old/gcc/doc/tm.texi	2010-08-13 11:53:46 +0000
++++ new/gcc/doc/tm.texi	2010-09-01 13:29:58 +0000
+@@ -2093,7 +2093,7 @@
+ the highest numbered allocable register first.
+ @end defmac
+ 
+-@defmac ORDER_REGS_FOR_LOCAL_ALLOC
++@defmac ADJUST_REG_ALLOC_ORDER
+ A C statement (sans semicolon) to choose the order in which to allocate
+ hard registers for pseudo-registers local to a basic block.
+ 
+@@ -2107,6 +2107,15 @@
+ On most machines, it is not necessary to define this macro.
+ @end defmac
+ 
++@defmac HONOR_REG_ALLOC_ORDER
++Normally, IRA tries to estimate the costs for saving a register in the
++prologue and restoring it in the epilogue.  This discourages it from
++using call-saved registers.  If a machine wants to ensure that IRA
++allocates registers in the order given by REG_ALLOC_ORDER even if some
++call-saved registers appear earlier than call-used ones, this macro
++should be defined.
++@end defmac
++
+ @defmac IRA_HARD_REGNO_ADD_COST_MULTIPLIER (@var{regno})
+ In some case register allocation order is not enough for the
+ Integrated Register Allocator (@acronym{IRA}) to generate a good code.
+
+=== modified file 'gcc/expmed.c'
+--- old/gcc/expmed.c	2010-03-03 22:10:17 +0000
++++ new/gcc/expmed.c	2010-09-01 13:29:58 +0000
+@@ -3253,6 +3253,55 @@
+   gcc_assert (op0);
+   return op0;
+ }
++
++/* Perform a widening multiplication and return an rtx for the result.
++   MODE is mode of value; OP0 and OP1 are what to multiply (rtx's);
++   TARGET is a suggestion for where to store the result (an rtx).
++   THIS_OPTAB is the optab we should use, it must be either umul_widen_optab
++   or smul_widen_optab.
++
++   We check specially for a constant integer as OP1, comparing the
++   cost of a widening multiply against the cost of a sequence of shifts
++   and adds.  */
++
++rtx
++expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target,
++		      int unsignedp, optab this_optab)
++{
++  bool speed = optimize_insn_for_speed_p ();
++
++  if (CONST_INT_P (op1)
++      && (INTVAL (op1) >= 0
++	  || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT))
++    {
++      HOST_WIDE_INT coeff = INTVAL (op1);
++      int max_cost;
++      enum mult_variant variant;
++      struct algorithm algorithm;
++
++      /* Special case powers of two.  */
++      if (EXACT_POWER_OF_2_OR_ZERO_P (coeff))
++	{
++	  op0 = convert_to_mode (mode, op0, this_optab == umul_widen_optab);
++	  return expand_shift (LSHIFT_EXPR, mode, op0,
++			       build_int_cst (NULL_TREE, floor_log2 (coeff)),
++			       target, unsignedp);
++	}
++
++      /* Exclude cost of op0 from max_cost to match the cost
++	 calculation of the synth_mult.  */
++      max_cost = mul_widen_cost[speed][mode];
++      if (choose_mult_variant (mode, coeff, &algorithm, &variant,
++			       max_cost))
++	{
++	  op0 = convert_to_mode (mode, op0, this_optab == umul_widen_optab);
++	  return expand_mult_const (mode, op0, coeff, target,
++				    &algorithm, variant);
++	}
++    }
++  return expand_binop (mode, this_optab, op0, op1, target,
++		       unsignedp, OPTAB_LIB_WIDEN);
++}
+ 
+ /* Return the smallest n such that 2**n >= X.  */
+ 
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-08-20 16:21:01 +0000
++++ new/gcc/expr.c	2010-09-01 13:29:58 +0000
+@@ -7224,7 +7224,6 @@
+   optab this_optab;
+   rtx subtarget, original_target;
+   int ignore;
+-  tree subexp0, subexp1;
+   bool reduce_bit_field;
+   gimple subexp0_def, subexp1_def;
+   tree top0, top1;
+@@ -7679,13 +7678,7 @@
+ 
+       goto binop2;
+ 
+-    case MULT_EXPR:
+-      /* If this is a fixed-point operation, then we cannot use the code
+-	 below because "expand_mult" doesn't support sat/no-sat fixed-point
+-         multiplications.   */
+-      if (ALL_FIXED_POINT_MODE_P (mode))
+-	goto binop;
+-
++    case WIDEN_MULT_EXPR:
+       /* If first operand is constant, swap them.
+ 	 Thus the following special case checks need only
+ 	 check the second operand.  */
+@@ -7696,96 +7689,35 @@
+ 	  treeop1 = t1;
+ 	}
+ 
+-      /* Attempt to return something suitable for generating an
+-	 indexed address, for machines that support that.  */
+-
+-      if (modifier == EXPAND_SUM && mode == ptr_mode
+-	  && host_integerp (treeop1, 0))
+-	{
+-	  tree exp1 = treeop1;
+-
+-	  op0 = expand_expr (treeop0, subtarget, VOIDmode,
+-			     EXPAND_SUM);
+-
+-	  if (!REG_P (op0))
+-	    op0 = force_operand (op0, NULL_RTX);
+-	  if (!REG_P (op0))
+-	    op0 = copy_to_mode_reg (mode, op0);
+-
+-	  return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
+-			       gen_int_mode (tree_low_cst (exp1, 0),
+-					     TYPE_MODE (TREE_TYPE (exp1)))));
+-	}
+-
+-      if (modifier == EXPAND_STACK_PARM)
+-	target = 0;
+-
+-      /* Check for multiplying things that have been extended
+-	 from a narrower type.  If this machine supports multiplying
+-	 in that narrower type with a result in the desired type,
+-	 do it that way, and avoid the explicit type-conversion.  */
+-
+-      subexp0 = treeop0;
+-      subexp1 = treeop1;
+-      subexp0_def = get_def_for_expr (subexp0, NOP_EXPR);
+-      subexp1_def = get_def_for_expr (subexp1, NOP_EXPR);
+-      top0 = top1 = NULL_TREE;
+-
+       /* First, check if we have a multiplication of one signed and one
+ 	 unsigned operand.  */
+-      if (subexp0_def
+-	  && (top0 = gimple_assign_rhs1 (subexp0_def))
+-	  && subexp1_def
+-	  && (top1 = gimple_assign_rhs1 (subexp1_def))
+-	  && TREE_CODE (type) == INTEGER_TYPE
+-	  && (TYPE_PRECISION (TREE_TYPE (top0))
+-	      < TYPE_PRECISION (TREE_TYPE (subexp0)))
+-	  && (TYPE_PRECISION (TREE_TYPE (top0))
+-	      == TYPE_PRECISION (TREE_TYPE (top1)))
+-	  && (TYPE_UNSIGNED (TREE_TYPE (top0))
+-	      != TYPE_UNSIGNED (TREE_TYPE (top1))))
++      if (TREE_CODE (treeop1) != INTEGER_CST
++	  && (TYPE_UNSIGNED (TREE_TYPE (treeop0))
++	      != TYPE_UNSIGNED (TREE_TYPE (treeop1))))
+ 	{
+-	  enum machine_mode innermode
+-	    = TYPE_MODE (TREE_TYPE (top0));
++	  enum machine_mode innermode = TYPE_MODE (TREE_TYPE (treeop0));
+ 	  this_optab = usmul_widen_optab;
+-	  if (mode == GET_MODE_WIDER_MODE (innermode))
++	  if (mode == GET_MODE_2XWIDER_MODE (innermode))
+ 	    {
+ 	      if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
+ 		{
+-		  if (TYPE_UNSIGNED (TREE_TYPE (top0)))
+-		    expand_operands (top0, top1, NULL_RTX, &op0, &op1,
++		  if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
++		    expand_operands (treeop0, treeop1, subtarget, &op0, &op1,
+ 				     EXPAND_NORMAL);
+ 		  else
+-		    expand_operands (top0, top1, NULL_RTX, &op1, &op0,
++		    expand_operands (treeop0, treeop1, subtarget, &op1, &op0,
+ 				     EXPAND_NORMAL);
+-
+ 		  goto binop3;
+ 		}
+ 	    }
+ 	}
+-      /* Check for a multiplication with matching signedness.  If
+-	 valid, TOP0 and TOP1 were set in the previous if
+-	 condition.  */
+-      else if (top0
+-	  && TREE_CODE (type) == INTEGER_TYPE
+-	  && (TYPE_PRECISION (TREE_TYPE (top0))
+-	      < TYPE_PRECISION (TREE_TYPE (subexp0)))
+-	  && ((TREE_CODE (subexp1) == INTEGER_CST
+-	       && int_fits_type_p (subexp1, TREE_TYPE (top0))
+-	       /* Don't use a widening multiply if a shift will do.  */
+-	       && ((GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (subexp1)))
+-		    > HOST_BITS_PER_WIDE_INT)
+-		   || exact_log2 (TREE_INT_CST_LOW (subexp1)) < 0))
+-	      ||
+-	      (top1
+-	       && (TYPE_PRECISION (TREE_TYPE (top1))
+-		   == TYPE_PRECISION (TREE_TYPE (top0))
+-	       /* If both operands are extended, they must either both
+-		  be zero-extended or both be sign-extended.  */
+-	       && (TYPE_UNSIGNED (TREE_TYPE (top1))
+-		   == TYPE_UNSIGNED (TREE_TYPE (top0)))))))
++      /* Check for a multiplication with matching signedness.  */
++      else if ((TREE_CODE (treeop1) == INTEGER_CST
++		&& int_fits_type_p (treeop1, TREE_TYPE (treeop0)))
++	       || (TYPE_UNSIGNED (TREE_TYPE (treeop1))
++		   == TYPE_UNSIGNED (TREE_TYPE (treeop0))))
+ 	{
+-	  tree op0type = TREE_TYPE (top0);
++	  tree op0type = TREE_TYPE (treeop0);
+ 	  enum machine_mode innermode = TYPE_MODE (op0type);
+ 	  bool zextend_p = TYPE_UNSIGNED (op0type);
+ 	  optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
+@@ -7795,24 +7727,22 @@
+ 	    {
+ 	      if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
+ 		{
+-		  if (TREE_CODE (subexp1) == INTEGER_CST)
+-		    expand_operands (top0, subexp1, NULL_RTX, &op0, &op1,
+-				     EXPAND_NORMAL);
+-		  else
+-		    expand_operands (top0, top1, NULL_RTX, &op0, &op1,
+-				     EXPAND_NORMAL);
+-		  goto binop3;
++		  expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
++				   EXPAND_NORMAL);
++		  temp = expand_widening_mult (mode, op0, op1, target,
++					       unsignedp, this_optab);
++		  return REDUCE_BIT_FIELD (temp);
+ 		}
+-	      else if (optab_handler (other_optab, mode)->insn_code != CODE_FOR_nothing
+-		       && innermode == word_mode)
++	      if (optab_handler (other_optab, mode)->insn_code != CODE_FOR_nothing
++		  && innermode == word_mode)
+ 		{
+ 		  rtx htem, hipart;
+-		  op0 = expand_normal (top0);
+-		  if (TREE_CODE (subexp1) == INTEGER_CST)
++		  op0 = expand_normal (treeop0);
++		  if (TREE_CODE (treeop1) == INTEGER_CST)
+ 		    op1 = convert_modes (innermode, mode,
+-					 expand_normal (subexp1), unsignedp);
++					 expand_normal (treeop1), unsignedp);
+ 		  else
+-		    op1 = expand_normal (top1);
++		    op1 = expand_normal (treeop1);
+ 		  temp = expand_binop (mode, other_optab, op0, op1, target,
+ 				       unsignedp, OPTAB_LIB_WIDEN);
+ 		  hipart = gen_highpart (innermode, temp);
+@@ -7825,7 +7755,53 @@
+ 		}
+ 	    }
+ 	}
+-      expand_operands (subexp0, subexp1, subtarget, &op0, &op1, EXPAND_NORMAL);
++      treeop0 = fold_build1 (CONVERT_EXPR, type, treeop0);
++      treeop1 = fold_build1 (CONVERT_EXPR, type, treeop1);
++      expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
++      return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
++
++    case MULT_EXPR:
++      /* If this is a fixed-point operation, then we cannot use the code
++	 below because "expand_mult" doesn't support sat/no-sat fixed-point
++         multiplications.   */
++      if (ALL_FIXED_POINT_MODE_P (mode))
++	goto binop;
++
++      /* If first operand is constant, swap them.
++	 Thus the following special case checks need only
++	 check the second operand.  */
++      if (TREE_CODE (treeop0) == INTEGER_CST)
++	{
++	  tree t1 = treeop0;
++	  treeop0 = treeop1;
++	  treeop1 = t1;
++	}
++
++      /* Attempt to return something suitable for generating an
++	 indexed address, for machines that support that.  */
++
++      if (modifier == EXPAND_SUM && mode == ptr_mode
++	  && host_integerp (treeop1, 0))
++	{
++	  tree exp1 = treeop1;
++
++	  op0 = expand_expr (treeop0, subtarget, VOIDmode,
++			     EXPAND_SUM);
++
++	  if (!REG_P (op0))
++	    op0 = force_operand (op0, NULL_RTX);
++	  if (!REG_P (op0))
++	    op0 = copy_to_mode_reg (mode, op0);
++
++	  return REDUCE_BIT_FIELD (gen_rtx_MULT (mode, op0,
++			       gen_int_mode (tree_low_cst (exp1, 0),
++					     TYPE_MODE (TREE_TYPE (exp1)))));
++	}
++
++      if (modifier == EXPAND_STACK_PARM)
++	target = 0;
++
++      expand_operands (treeop0, treeop1, subtarget, &op0, &op1, EXPAND_NORMAL);
+       return REDUCE_BIT_FIELD (expand_mult (mode, op0, op1, target, unsignedp));
+ 
+     case TRUNC_DIV_EXPR:
+@@ -8311,6 +8287,8 @@
+   location_t loc = EXPR_LOCATION (exp);
+   struct separate_ops ops;
+   tree treeop0, treeop1, treeop2;
++  tree ssa_name = NULL_TREE;
++  gimple g;
+ 
+   type = TREE_TYPE (exp);
+   mode = TYPE_MODE (type);
+@@ -8423,15 +8401,17 @@
+ 	 base variable.  This unnecessarily allocates a pseudo, see how we can
+ 	 reuse it, if partition base vars have it set already.  */
+       if (!currently_expanding_to_rtl)
+-	return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier, NULL);
+-      {
+-	gimple g = get_gimple_for_ssa_name (exp);
+-	if (g)
+-	  return expand_expr_real (gimple_assign_rhs_to_tree (g), target,
+-				   tmode, modifier, NULL);
+-      }
+-      decl_rtl = get_rtx_for_ssa_name (exp);
+-      exp = SSA_NAME_VAR (exp);
++	return expand_expr_real_1 (SSA_NAME_VAR (exp), target, tmode, modifier,
++				   NULL);
++
++      g = get_gimple_for_ssa_name (exp);
++      if (g)
++	return expand_expr_real (gimple_assign_rhs_to_tree (g), target, tmode,
++				 modifier, NULL);
++
++      ssa_name = exp;
++      decl_rtl = get_rtx_for_ssa_name (ssa_name);
++      exp = SSA_NAME_VAR (ssa_name);
+       goto expand_decl_rtl;
+ 
+     case PARM_DECL:
+@@ -8533,15 +8513,21 @@
+       /* If the mode of DECL_RTL does not match that of the decl, it
+ 	 must be a promoted value.  We return a SUBREG of the wanted mode,
+ 	 but mark it so that we know that it was already extended.  */
+-
+-      if (REG_P (decl_rtl)
+-	  && GET_MODE (decl_rtl) != DECL_MODE (exp))
++      if (REG_P (decl_rtl) && GET_MODE (decl_rtl) != DECL_MODE (exp))
+ 	{
+ 	  enum machine_mode pmode;
+ 
+-	  /* Get the signedness used for this variable.  Ensure we get the
+-	     same mode we got when the variable was declared.  */
+-	  pmode = promote_decl_mode (exp, &unsignedp);
++	  /* Get the signedness to be used for this variable.  Ensure we get
++	     the same mode we got when the variable was declared.  */
++	  if (code == SSA_NAME
++	      && (g = SSA_NAME_DEF_STMT (ssa_name))
++	      && gimple_code (g) == GIMPLE_CALL)
++	    pmode = promote_function_mode (type, mode, &unsignedp,
++					   TREE_TYPE
++					   (TREE_TYPE (gimple_call_fn (g))),
++					   2);
++	  else
++	    pmode = promote_decl_mode (exp, &unsignedp);
+ 	  gcc_assert (GET_MODE (decl_rtl) == pmode);
+ 
+ 	  temp = gen_lowpart_SUBREG (mode, decl_rtl);
+
+=== modified file 'gcc/fold-const.c'
+--- old/gcc/fold-const.c	2010-04-06 09:36:57 +0000
++++ new/gcc/fold-const.c	2010-09-01 13:29:58 +0000
+@@ -5741,6 +5741,76 @@
+ 		       const_binop (BIT_XOR_EXPR, c, temp, 0));
+ }
+ 
++/* For an expression that has the form
++     (A && B) || ~B
++   or
++     (A || B) && ~B,
++   we can drop one of the inner expressions and simplify to
++     A || ~B
++   or
++     A && ~B
++   LOC is the location of the resulting expression.  OP is the inner 
++   logical operation; the left-hand side in the examples above, while CMPOP
++   is the right-hand side.  RHS_ONLY is used to prevent us from accidentally
++   removing a condition that guards another, as in
++     (A != NULL && A->...) || A == NULL
++   which we must not transform.  If RHS_ONLY is true, only eliminate the
++   right-most operand of the inner logical operation.  */
++
++static tree
++merge_truthop_with_opposite_arm (location_t loc, tree op, tree cmpop,
++				 bool rhs_only)
++{
++  tree type = TREE_TYPE (cmpop);
++  enum tree_code code = TREE_CODE (cmpop);
++  enum tree_code truthop_code = TREE_CODE (op);
++  tree lhs = TREE_OPERAND (op, 0);
++  tree rhs = TREE_OPERAND (op, 1);
++  tree orig_lhs = lhs, orig_rhs = rhs;
++  enum tree_code rhs_code = TREE_CODE (rhs);
++  enum tree_code lhs_code = TREE_CODE (lhs);
++  enum tree_code inv_code;
++
++  if (TREE_SIDE_EFFECTS (op) || TREE_SIDE_EFFECTS (cmpop))
++    return NULL_TREE;
++
++  if (TREE_CODE_CLASS (code) != tcc_comparison)
++    return NULL_TREE;
++
++  if (rhs_code == truthop_code)
++    {
++      tree newrhs = merge_truthop_with_opposite_arm (loc, rhs, cmpop, rhs_only);
++      if (newrhs != NULL_TREE)
++	{
++	  rhs = newrhs;
++	  rhs_code = TREE_CODE (rhs);
++	}
++    }
++  if (lhs_code == truthop_code && !rhs_only)
++    {
++      tree newlhs = merge_truthop_with_opposite_arm (loc, lhs, cmpop, false);
++      if (newlhs != NULL_TREE)
++	{
++	  lhs = newlhs;
++	  lhs_code = TREE_CODE (lhs);
++	}
++    }
++
++  inv_code = invert_tree_comparison (code, HONOR_NANS (TYPE_MODE (type)));
++  if (inv_code == rhs_code
++      && operand_equal_p (TREE_OPERAND (rhs, 0), TREE_OPERAND (cmpop, 0), 0)
++      && operand_equal_p (TREE_OPERAND (rhs, 1), TREE_OPERAND (cmpop, 1), 0))
++    return lhs;
++  if (!rhs_only && inv_code == lhs_code
++      && operand_equal_p (TREE_OPERAND (lhs, 0), TREE_OPERAND (cmpop, 0), 0)
++      && operand_equal_p (TREE_OPERAND (lhs, 1), TREE_OPERAND (cmpop, 1), 0))
++    return rhs;
++  if (rhs != orig_rhs || lhs != orig_lhs)
++    return fold_build2_loc (loc, truthop_code, TREE_TYPE (cmpop),
++			    lhs, rhs);
++  return NULL_TREE;
++}
++
+ /* Find ways of folding logical expressions of LHS and RHS:
+    Try to merge two comparisons to the same innermost item.
+    Look for range tests like "ch >= '0' && ch <= '9'".
+@@ -12539,6 +12609,22 @@
+       if (0 != (tem = fold_range_test (loc, code, type, op0, op1)))
+ 	return tem;
+ 
++      if ((code == TRUTH_ANDIF_EXPR && TREE_CODE (arg0) == TRUTH_ORIF_EXPR)
++	  || (code == TRUTH_ORIF_EXPR && TREE_CODE (arg0) == TRUTH_ANDIF_EXPR))
++	{
++	  tem = merge_truthop_with_opposite_arm (loc, arg0, arg1, true);
++	  if (tem)
++	    return fold_build2_loc (loc, code, type, tem, arg1);
++	}
++
++      if ((code == TRUTH_ANDIF_EXPR && TREE_CODE (arg1) == TRUTH_ORIF_EXPR)
++	  || (code == TRUTH_ORIF_EXPR && TREE_CODE (arg1) == TRUTH_ANDIF_EXPR))
++	{
++	  tem = merge_truthop_with_opposite_arm (loc, arg1, arg0, false);
++	  if (tem)
++	    return fold_build2_loc (loc, code, type, arg0, tem);
++	}
++
+       /* Check for the possibility of merging component references.  If our
+ 	 lhs is another similar operation, try to merge its rhs with our
+ 	 rhs.  Then try to merge our lhs and rhs.  */
+
+=== modified file 'gcc/ifcvt.c'
+--- old/gcc/ifcvt.c	2010-04-02 18:54:46 +0000
++++ new/gcc/ifcvt.c	2010-09-01 13:29:58 +0000
+@@ -385,7 +385,11 @@
+   rtx false_expr;		/* test for then block insns */
+   rtx true_prob_val;		/* probability of else block */
+   rtx false_prob_val;		/* probability of then block */
+-  int n_insns;
++  rtx then_last_head = NULL_RTX;	/* Last match at the head of THEN */
++  rtx else_last_head = NULL_RTX;	/* Last match at the head of ELSE */
++  rtx then_first_tail = NULL_RTX;	/* First match at the tail of THEN */
++  rtx else_first_tail = NULL_RTX;	/* First match at the tail of ELSE */
++  int then_n_insns, else_n_insns, n_insns;
+   enum rtx_code false_code;
+ 
+   /* If test is comprised of && or || elements, and we've failed at handling
+@@ -418,15 +422,78 @@
+      number of insns and see if it is small enough to convert.  */
+   then_start = first_active_insn (then_bb);
+   then_end = last_active_insn (then_bb, TRUE);
+-  n_insns = ce_info->num_then_insns = count_bb_insns (then_bb);
++  then_n_insns = ce_info->num_then_insns = count_bb_insns (then_bb);
++  n_insns = then_n_insns;
+   max = MAX_CONDITIONAL_EXECUTE;
+ 
+   if (else_bb)
+     {
++      int n_matching;
++
+       max *= 2;
+       else_start = first_active_insn (else_bb);
+       else_end = last_active_insn (else_bb, TRUE);
+-      n_insns += ce_info->num_else_insns = count_bb_insns (else_bb);
++      else_n_insns = ce_info->num_else_insns = count_bb_insns (else_bb);
++      n_insns += else_n_insns;
++
++      /* Look for matching sequences at the head and tail of the two blocks,
++	 and limit the range of insns to be converted if possible.  */
++      n_matching = flow_find_cross_jump (then_bb, else_bb,
++					 &then_first_tail, &else_first_tail);
++      if (then_first_tail == BB_HEAD (then_bb))
++	then_start = then_end = NULL_RTX;
++      if (else_first_tail == BB_HEAD (else_bb))
++	else_start = else_end = NULL_RTX;
++
++      if (n_matching > 0)
++	{
++	  if (then_end)
++	    then_end = prev_active_insn (then_first_tail);
++	  if (else_end)
++	    else_end = prev_active_insn (else_first_tail);
++	  n_insns -= 2 * n_matching;
++	}
++
++      if (then_start && else_start)
++	{
++	  int longest_match = MIN (then_n_insns - n_matching,
++				   else_n_insns - n_matching);
++	  n_matching
++	    = flow_find_head_matching_sequence (then_bb, else_bb,
++						&then_last_head,
++						&else_last_head,
++						longest_match);
++
++	  if (n_matching > 0)
++	    {
++	      rtx insn;
++
++	      /* We won't pass the insns in the head sequence to
++		 cond_exec_process_insns, so we need to test them here
++		 to make sure that they don't clobber the condition.  */
++	      for (insn = BB_HEAD (then_bb);
++		   insn != NEXT_INSN (then_last_head);
++		   insn = NEXT_INSN (insn))
++		if (!LABEL_P (insn) && !NOTE_P (insn)
++		    && !DEBUG_INSN_P (insn)
++		    && modified_in_p (test_expr, insn))
++		  return FALSE;
++	    }
++
++	  if (then_last_head == then_end)
++	    then_start = then_end = NULL_RTX;
++	  if (else_last_head == else_end)
++	    else_start = else_end = NULL_RTX;
++
++	  if (n_matching > 0)
++	    {
++	      if (then_start)
++		then_start = next_active_insn (then_last_head);
++	      if (else_start)
++		else_start = next_active_insn (else_last_head);
++	      n_insns -= 2 * n_matching;
++	    }
++	}
+     }
+ 
+   if (n_insns > max)
+@@ -570,7 +637,21 @@
+     fprintf (dump_file, "%d insn%s converted to conditional execution.\n",
+ 	     n_insns, (n_insns == 1) ? " was" : "s were");
+ 
+-  /* Merge the blocks!  */
++  /* Merge the blocks!  If we had matching sequences, make sure to delete one
++     copy at the appropriate location first: delete the copy in the THEN branch
++     for a tail sequence so that the remaining one is executed last for both
++     branches, and delete the copy in the ELSE branch for a head sequence so
++     that the remaining one is executed first for both branches.  */
++  if (then_first_tail)
++    {
++      rtx from = then_first_tail;
++      if (!INSN_P (from))
++	from = next_active_insn (from);
++      delete_insn_chain (from, BB_END (then_bb), false);
++    }
++  if (else_last_head)
++    delete_insn_chain (first_active_insn (else_bb), else_last_head, false);
++
+   merge_if_block (ce_info);
+   cond_exec_changed_p = TRUE;
+   return TRUE;
+
+=== modified file 'gcc/ira-color.c'
+--- old/gcc/ira-color.c	2010-04-02 18:54:46 +0000
++++ new/gcc/ira-color.c	2010-09-01 13:29:58 +0000
+@@ -441,14 +441,18 @@
+ {
+   HARD_REG_SET conflicting_regs;
+   int i, j, k, hard_regno, best_hard_regno, class_size;
+-  int cost, mem_cost, min_cost, full_cost, min_full_cost, add_cost;
++  int cost, mem_cost, min_cost, full_cost, min_full_cost;
+   int *a_costs;
+   int *conflict_costs;
+-  enum reg_class cover_class, rclass, conflict_cover_class;
++  enum reg_class cover_class, conflict_cover_class;
+   enum machine_mode mode;
+   ira_allocno_t a, conflict_allocno;
+   ira_allocno_conflict_iterator aci;
+   static int costs[FIRST_PSEUDO_REGISTER], full_costs[FIRST_PSEUDO_REGISTER];
++#ifndef HONOR_REG_ALLOC_ORDER
++  enum reg_class rclass;
++  int add_cost;
++#endif
+ #ifdef STACK_REGS
+   bool no_stack_reg_p;
+ #endif
+@@ -586,6 +590,7 @@
+ 	continue;
+       cost = costs[i];
+       full_cost = full_costs[i];
++#ifndef HONOR_REG_ALLOC_ORDER
+       if (! allocated_hardreg_p[hard_regno]
+ 	  && ira_hard_reg_not_in_set_p (hard_regno, mode, call_used_reg_set))
+ 	/* We need to save/restore the hard register in
+@@ -598,6 +603,7 @@
+ 	  cost += add_cost;
+ 	  full_cost += add_cost;
+ 	}
++#endif
+       if (min_cost > cost)
+ 	min_cost = cost;
+       if (min_full_cost > full_cost)
+
+=== modified file 'gcc/ira-costs.c'
+--- old/gcc/ira-costs.c	2010-08-13 11:40:17 +0000
++++ new/gcc/ira-costs.c	2010-09-01 13:29:58 +0000
+@@ -33,6 +33,7 @@
+ #include "addresses.h"
+ #include "insn-config.h"
+ #include "recog.h"
++#include "reload.h"
+ #include "toplev.h"
+ #include "target.h"
+ #include "params.h"
+@@ -123,6 +124,10 @@
+ /* Record cover register class of each allocno with the same regno.  */
+ static enum reg_class *regno_cover_class;
+ 
++/* Record cost gains for not allocating a register with an invariant
++   equivalence.  */
++static int *regno_equiv_gains;
++
+ /* Execution frequency of the current insn.  */
+ static int frequency;
+ 
+@@ -1263,6 +1268,7 @@
+ #ifdef FORBIDDEN_INC_DEC_CLASSES
+ 	  int inc_dec_p = false;
+ #endif
++	  int equiv_savings = regno_equiv_gains[i];
+ 
+ 	  if (! allocno_p)
+ 	    {
+@@ -1311,6 +1317,15 @@
+ #endif
+ 		}
+ 	    }
++	  if (equiv_savings < 0)
++	    temp_costs->mem_cost = -equiv_savings;
++	  else if (equiv_savings > 0)
++	    {
++	      temp_costs->mem_cost = 0;
++	      for (k = 0; k < cost_classes_num; k++)
++		temp_costs->cost[k] += equiv_savings;
++	    }
++
+ 	  best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1;
+ 	  best = ALL_REGS;
+ 	  alt_class = NO_REGS;
+@@ -1680,6 +1695,8 @@
+   regno_cover_class
+     = (enum reg_class *) ira_allocate (sizeof (enum reg_class)
+ 				       * max_reg_num ());
++  regno_equiv_gains = (int *) ira_allocate (sizeof (int) * max_reg_num ());
++  memset (regno_equiv_gains, 0, sizeof (int) * max_reg_num ());
+ }
+ 
+ /* Common finalization function for ira_costs and
+@@ -1687,6 +1704,7 @@
+ static void
+ finish_costs (void)
+ {
++  ira_free (regno_equiv_gains);
+   ira_free (regno_cover_class);
+   ira_free (pref_buffer);
+   ira_free (costs);
+@@ -1702,6 +1720,7 @@
+   init_costs ();
+   total_allocno_costs = (struct costs *) ira_allocate (max_struct_costs_size
+ 						       * ira_allocnos_num);
++  calculate_elim_costs_all_insns ();
+   find_costs_and_classes (ira_dump_file);
+   setup_allocno_cover_class_and_costs ();
+   finish_costs ();
+@@ -1775,3 +1794,16 @@
+ 	ALLOCNO_COVER_CLASS_COST (a) = min_cost;
+     }
+ }
++
++/* Add COST to the estimated gain for eliminating REGNO with its
++   equivalence.  If COST is zero, record that no such elimination is
++   possible.  */
++
++void
++ira_adjust_equiv_reg_cost (unsigned regno, int cost)
++{
++  if (cost == 0)
++    regno_equiv_gains[regno] = 0;
++  else
++    regno_equiv_gains[regno] += cost;
++}
+
+=== modified file 'gcc/ira.c'
+--- old/gcc/ira.c	2010-08-12 13:51:16 +0000
++++ new/gcc/ira.c	2010-09-01 13:29:58 +0000
+@@ -431,9 +431,6 @@
+   HARD_REG_SET processed_hard_reg_set;
+ 
+   ira_assert (SHRT_MAX >= FIRST_PSEUDO_REGISTER);
+-  /* We could call ORDER_REGS_FOR_LOCAL_ALLOC here (it is usually
+-     putting hard callee-used hard registers first).  But our
+-     heuristics work better.  */
+   for (cl = (int) N_REG_CLASSES - 1; cl >= 0; cl--)
+     {
+       COPY_HARD_REG_SET (temp_hard_regset, reg_class_contents[cl]);
+@@ -490,6 +487,9 @@
+ static void
+ setup_alloc_regs (bool use_hard_frame_p)
+ {
++#ifdef ADJUST_REG_ALLOC_ORDER
++  ADJUST_REG_ALLOC_ORDER;
++#endif
+   COPY_HARD_REG_SET (no_unit_alloc_regs, fixed_reg_set);
+   if (! use_hard_frame_p)
+     SET_HARD_REG_BIT (no_unit_alloc_regs, HARD_FRAME_POINTER_REGNUM);
+@@ -1533,12 +1533,8 @@
+ 
+ 	  x = XEXP (note, 0);
+ 
+-	  if (! function_invariant_p (x)
+-	      || ! flag_pic
+-	      /* A function invariant is often CONSTANT_P but may
+-		 include a register.  We promise to only pass CONSTANT_P
+-		 objects to LEGITIMATE_PIC_OPERAND_P.  */
+-	      || (CONSTANT_P (x) && LEGITIMATE_PIC_OPERAND_P (x)))
++	  if (! CONSTANT_P (x)
++	      || ! flag_pic || LEGITIMATE_PIC_OPERAND_P (x))
+ 	    {
+ 	      /* It can happen that a REG_EQUIV note contains a MEM
+ 		 that is not a legitimate memory operand.  As later
+@@ -3097,8 +3093,19 @@
+   if (dump_file)
+     print_insn_chains (dump_file);
+ }
+-
+ 
++/* Allocate memory for reg_equiv_memory_loc.  */
++static void
++init_reg_equiv_memory_loc (void)
++{
++  max_regno = max_reg_num ();
++
++  /* And the reg_equiv_memory_loc array.  */
++  VEC_safe_grow (rtx, gc, reg_equiv_memory_loc_vec, max_regno);
++  memset (VEC_address (rtx, reg_equiv_memory_loc_vec), 0,
++	  sizeof (rtx) * max_regno);
++  reg_equiv_memory_loc = VEC_address (rtx, reg_equiv_memory_loc_vec);
++}
+ 
+ /* All natural loops.  */
+ struct loops ira_loops;
+@@ -3203,6 +3210,8 @@
+   record_loop_exits ();
+   current_loops = &ira_loops;
+ 
++  init_reg_equiv_memory_loc ();
++
+   if (internal_flag_ira_verbose > 0 && ira_dump_file != NULL)
+     fprintf (ira_dump_file, "Building IRA IR\n");
+   loops_p = ira_build (optimize
+@@ -3263,13 +3272,8 @@
+ #endif
+ 
+   delete_trivially_dead_insns (get_insns (), max_reg_num ());
+-  max_regno = max_reg_num ();
+ 
+-  /* And the reg_equiv_memory_loc array.  */
+-  VEC_safe_grow (rtx, gc, reg_equiv_memory_loc_vec, max_regno);
+-  memset (VEC_address (rtx, reg_equiv_memory_loc_vec), 0,
+-	  sizeof (rtx) * max_regno);
+-  reg_equiv_memory_loc = VEC_address (rtx, reg_equiv_memory_loc_vec);
++  init_reg_equiv_memory_loc ();
+ 
+   if (max_regno != max_regno_before_ira)
+     {
+
+=== modified file 'gcc/ira.h'
+--- old/gcc/ira.h	2009-09-02 17:54:25 +0000
++++ new/gcc/ira.h	2010-09-01 13:29:58 +0000
+@@ -87,3 +87,4 @@
+ extern void ira_mark_new_stack_slot (rtx, int, unsigned int);
+ extern bool ira_better_spill_reload_regno_p (int *, int *, rtx, rtx, rtx);
+ 
++extern void ira_adjust_equiv_reg_cost (unsigned, int);
+
+=== modified file 'gcc/optabs.h'
+--- old/gcc/optabs.h	2009-11-25 10:55:54 +0000
++++ new/gcc/optabs.h	2010-09-01 13:29:58 +0000
+@@ -771,6 +771,9 @@
+ /* Generate code for float to integral conversion.  */
+ extern bool expand_sfix_optab (rtx, rtx, convert_optab);
+ 
++/* Generate code for a widening multiply.  */
++extern rtx expand_widening_mult (enum machine_mode, rtx, rtx, rtx, int, optab);
++
+ /* Return tree if target supports vector operations for COND_EXPR.  */
+ bool expand_vec_cond_expr_p (tree, enum machine_mode);
+ 
+
+=== modified file 'gcc/passes.c'
+--- old/gcc/passes.c	2010-05-19 12:14:37 +0000
++++ new/gcc/passes.c	2010-09-01 13:29:58 +0000
+@@ -944,6 +944,7 @@
+       NEXT_PASS (pass_forwprop);
+       NEXT_PASS (pass_phiopt);
+       NEXT_PASS (pass_fold_builtins);
++      NEXT_PASS (pass_optimize_widening_mul);
+       NEXT_PASS (pass_tail_calls);
+       NEXT_PASS (pass_rename_ssa_copies);
+       NEXT_PASS (pass_uncprop);
+
+=== modified file 'gcc/reload.h'
+--- old/gcc/reload.h	2010-04-02 18:54:46 +0000
++++ new/gcc/reload.h	2010-09-01 13:29:58 +0000
+@@ -347,6 +347,10 @@
+ extern rtx eliminate_regs (rtx, enum machine_mode, rtx);
+ extern bool elimination_target_reg_p (rtx);
+ 
++/* Called from the register allocator to estimate costs of eliminating
++   invariant registers.  */
++extern void calculate_elim_costs_all_insns (void);
++
+ /* Deallocate the reload register used by reload number R.  */
+ extern void deallocate_reload_reg (int r);
+ 
+
+=== modified file 'gcc/reload1.c'
+--- old/gcc/reload1.c	2010-03-02 18:56:50 +0000
++++ new/gcc/reload1.c	2010-09-01 13:29:58 +0000
+@@ -413,6 +413,7 @@
+ static void set_label_offsets (rtx, rtx, int);
+ static void check_eliminable_occurrences (rtx);
+ static void elimination_effects (rtx, enum machine_mode);
++static rtx eliminate_regs_1 (rtx, enum machine_mode, rtx, bool, bool);
+ static int eliminate_regs_in_insn (rtx, int);
+ static void update_eliminable_offsets (void);
+ static void mark_not_eliminable (rtx, const_rtx, void *);
+@@ -420,8 +421,11 @@
+ static bool verify_initial_elim_offsets (void);
+ static void set_initial_label_offsets (void);
+ static void set_offsets_for_label (rtx);
++static void init_eliminable_invariants (rtx, bool);
+ static void init_elim_table (void);
++static void free_reg_equiv (void);
+ static void update_eliminables (HARD_REG_SET *);
++static void elimination_costs_in_insn (rtx);
+ static void spill_hard_reg (unsigned int, int);
+ static int finish_spills (int);
+ static void scan_paradoxical_subregs (rtx);
+@@ -698,6 +702,9 @@
+ 
+ /* Global variables used by reload and its subroutines.  */
+ 
++/* The current basic block while in calculate_elim_costs_all_insns.  */
++static basic_block elim_bb;
++
+ /* Set during calculate_needs if an insn needs register elimination.  */
+ static int something_needs_elimination;
+ /* Set during calculate_needs if an insn needs an operand changed.  */
+@@ -776,22 +783,6 @@
+       if (! call_used_regs[i] && ! fixed_regs[i] && ! LOCAL_REGNO (i))
+ 	df_set_regs_ever_live (i, true);
+ 
+-  /* Find all the pseudo registers that didn't get hard regs
+-     but do have known equivalent constants or memory slots.
+-     These include parameters (known equivalent to parameter slots)
+-     and cse'd or loop-moved constant memory addresses.
+-
+-     Record constant equivalents in reg_equiv_constant
+-     so they will be substituted by find_reloads.
+-     Record memory equivalents in reg_mem_equiv so they can
+-     be substituted eventually by altering the REG-rtx's.  */
+-
+-  reg_equiv_constant = XCNEWVEC (rtx, max_regno);
+-  reg_equiv_invariant = XCNEWVEC (rtx, max_regno);
+-  reg_equiv_mem = XCNEWVEC (rtx, max_regno);
+-  reg_equiv_alt_mem_list = XCNEWVEC (rtx, max_regno);
+-  reg_equiv_address = XCNEWVEC (rtx, max_regno);
+-  reg_max_ref_width = XCNEWVEC (unsigned int, max_regno);
+   reg_old_renumber = XCNEWVEC (short, max_regno);
+   memcpy (reg_old_renumber, reg_renumber, max_regno * sizeof (short));
+   pseudo_forbidden_regs = XNEWVEC (HARD_REG_SET, max_regno);
+@@ -799,115 +790,9 @@
+ 
+   CLEAR_HARD_REG_SET (bad_spill_regs_global);
+ 
+-  /* Look for REG_EQUIV notes; record what each pseudo is equivalent
+-     to.  Also find all paradoxical subregs and find largest such for
+-     each pseudo.  */
+-
+-  num_eliminable_invariants = 0;
+-  for (insn = first; insn; insn = NEXT_INSN (insn))
+-    {
+-      rtx set = single_set (insn);
+-
+-      /* We may introduce USEs that we want to remove at the end, so
+-	 we'll mark them with QImode.  Make sure there are no
+-	 previously-marked insns left by say regmove.  */
+-      if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
+-	  && GET_MODE (insn) != VOIDmode)
+-	PUT_MODE (insn, VOIDmode);
+-
+-      if (NONDEBUG_INSN_P (insn))
+-	scan_paradoxical_subregs (PATTERN (insn));
+-
+-      if (set != 0 && REG_P (SET_DEST (set)))
+-	{
+-	  rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
+-	  rtx x;
+-
+-	  if (! note)
+-	    continue;
+-
+-	  i = REGNO (SET_DEST (set));
+-	  x = XEXP (note, 0);
+-
+-	  if (i <= LAST_VIRTUAL_REGISTER)
+-	    continue;
+-
+-	  if (! function_invariant_p (x)
+-	      || ! flag_pic
+-	      /* A function invariant is often CONSTANT_P but may
+-		 include a register.  We promise to only pass
+-		 CONSTANT_P objects to LEGITIMATE_PIC_OPERAND_P.  */
+-	      || (CONSTANT_P (x)
+-		  && LEGITIMATE_PIC_OPERAND_P (x)))
+-	    {
+-	      /* It can happen that a REG_EQUIV note contains a MEM
+-		 that is not a legitimate memory operand.  As later
+-		 stages of reload assume that all addresses found
+-		 in the reg_equiv_* arrays were originally legitimate,
+-		 we ignore such REG_EQUIV notes.  */
+-	      if (memory_operand (x, VOIDmode))
+-		{
+-		  /* Always unshare the equivalence, so we can
+-		     substitute into this insn without touching the
+-		       equivalence.  */
+-		  reg_equiv_memory_loc[i] = copy_rtx (x);
+-		}
+-	      else if (function_invariant_p (x))
+-		{
+-		  if (GET_CODE (x) == PLUS)
+-		    {
+-		      /* This is PLUS of frame pointer and a constant,
+-			 and might be shared.  Unshare it.  */
+-		      reg_equiv_invariant[i] = copy_rtx (x);
+-		      num_eliminable_invariants++;
+-		    }
+-		  else if (x == frame_pointer_rtx || x == arg_pointer_rtx)
+-		    {
+-		      reg_equiv_invariant[i] = x;
+-		      num_eliminable_invariants++;
+-		    }
+-		  else if (LEGITIMATE_CONSTANT_P (x))
+-		    reg_equiv_constant[i] = x;
+-		  else
+-		    {
+-		      reg_equiv_memory_loc[i]
+-			= force_const_mem (GET_MODE (SET_DEST (set)), x);
+-		      if (! reg_equiv_memory_loc[i])
+-			reg_equiv_init[i] = NULL_RTX;
+-		    }
+-		}
+-	      else
+-		{
+-		  reg_equiv_init[i] = NULL_RTX;
+-		  continue;
+-		}
+-	    }
+-	  else
+-	    reg_equiv_init[i] = NULL_RTX;
+-	}
+-    }
+-
+-  if (dump_file)
+-    for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
+-      if (reg_equiv_init[i])
+-	{
+-	  fprintf (dump_file, "init_insns for %u: ", i);
+-	  print_inline_rtx (dump_file, reg_equiv_init[i], 20);
+-	  fprintf (dump_file, "\n");
+-	}
+-
++  init_eliminable_invariants (first, true);
+   init_elim_table ();
+ 
+-  first_label_num = get_first_label_num ();
+-  num_labels = max_label_num () - first_label_num;
+-
+-  /* Allocate the tables used to store offset information at labels.  */
+-  /* We used to use alloca here, but the size of what it would try to
+-     allocate would occasionally cause it to exceed the stack limit and
+-     cause a core dump.  */
+-  offsets_known_at = XNEWVEC (char, num_labels);
+-  offsets_at = (HOST_WIDE_INT (*)[NUM_ELIMINABLE_REGS]) xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (HOST_WIDE_INT));
+-
+   /* Alter each pseudo-reg rtx to contain its hard reg number.  Assign
+      stack slots to the pseudos that lack hard regs or equivalents.
+      Do not touch virtual registers.  */
+@@ -1411,31 +1296,11 @@
+ 	}
+     }
+ 
++  free (temp_pseudo_reg_arr);
++
+   /* Indicate that we no longer have known memory locations or constants.  */
+-  if (reg_equiv_constant)
+-    free (reg_equiv_constant);
+-  if (reg_equiv_invariant)
+-    free (reg_equiv_invariant);
+-  reg_equiv_constant = 0;
+-  reg_equiv_invariant = 0;
+-  VEC_free (rtx, gc, reg_equiv_memory_loc_vec);
+-  reg_equiv_memory_loc = 0;
+-
+-  free (temp_pseudo_reg_arr);
+-
+-  if (offsets_known_at)
+-    free (offsets_known_at);
+-  if (offsets_at)
+-    free (offsets_at);
+-
+-  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+-    if (reg_equiv_alt_mem_list[i])
+-      free_EXPR_LIST_list (&reg_equiv_alt_mem_list[i]);
+-  free (reg_equiv_alt_mem_list);
+-
+-  free (reg_equiv_mem);
++  free_reg_equiv ();
+   reg_equiv_init = 0;
+-  free (reg_equiv_address);
+   free (reg_max_ref_width);
+   free (reg_old_renumber);
+   free (pseudo_previous_regs);
+@@ -1728,6 +1593,100 @@
+   *pprev_reload = 0;
+ }
+ 
++/* This function is called from the register allocator to set up estimates
++   for the cost of eliminating pseudos which have REG_EQUIV equivalences to
++   an invariant.  The structure is similar to calculate_needs_all_insns.  */
++
++void
++calculate_elim_costs_all_insns (void)
++{
++  int *reg_equiv_init_cost;
++  basic_block bb;
++  int i;
++
++  reg_equiv_init_cost = XCNEWVEC (int, max_regno);
++  init_elim_table ();
++  init_eliminable_invariants (get_insns (), false);
++
++  set_initial_elim_offsets ();
++  set_initial_label_offsets ();
++
++  FOR_EACH_BB (bb)
++    {
++      rtx insn;
++      elim_bb = bb;
++
++      FOR_BB_INSNS (bb, insn)
++	{
++	  /* If this is a label, a JUMP_INSN, or has REG_NOTES (which might
++	     include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
++	     what effects this has on the known offsets at labels.  */
++
++	  if (LABEL_P (insn) || JUMP_P (insn)
++	      || (INSN_P (insn) && REG_NOTES (insn) != 0))
++	    set_label_offsets (insn, insn, 0);
++
++	  if (INSN_P (insn))
++	    {
++	      rtx set = single_set (insn);
++
++	      /* Skip insns that only set an equivalence.  */
++	      if (set && REG_P (SET_DEST (set))
++		  && reg_renumber[REGNO (SET_DEST (set))] < 0
++		  && (reg_equiv_constant[REGNO (SET_DEST (set))]
++		      || (reg_equiv_invariant[REGNO (SET_DEST (set))])))
++		{
++		  unsigned regno = REGNO (SET_DEST (set));
++		  rtx init = reg_equiv_init[regno];
++		  if (init)
++		    {
++		      rtx t = eliminate_regs_1 (SET_SRC (set), VOIDmode, insn,
++						false, true);
++		      int cost = rtx_cost (t, SET,
++					   optimize_bb_for_speed_p (bb));
++		      int freq = REG_FREQ_FROM_BB (bb);
++
++		      reg_equiv_init_cost[regno] = cost * freq;
++		      continue;
++		    }
++		}
++	      /* If needed, eliminate any eliminable registers.  */
++	      if (num_eliminable || num_eliminable_invariants)
++		elimination_costs_in_insn (insn);
++
++	      if (num_eliminable)
++		update_eliminable_offsets ();
++	    }
++	}
++    }
++  for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
++    {
++      if (reg_equiv_invariant[i])
++	{
++	  if (reg_equiv_init[i])
++	    {
++	      int cost = reg_equiv_init_cost[i];
++	      if (dump_file)
++		fprintf (dump_file,
++			 "Reg %d has equivalence, initial gains %d\n", i, cost);
++	      if (cost != 0)
++		ira_adjust_equiv_reg_cost (i, cost);
++	    }
++	  else
++	    {
++	      if (dump_file)
++		fprintf (dump_file,
++			 "Reg %d had equivalence, but can't be eliminated\n",
++			 i);
++	      ira_adjust_equiv_reg_cost (i, 0);
++	    }
++	}
++    }
++
++  free_reg_equiv ();
++  free (reg_equiv_init_cost);
++}
++
+ /* Comparison function for qsort to decide which of two reloads
+    should be handled first.  *P1 and *P2 are the reload numbers.  */
+ 
+@@ -2514,6 +2473,36 @@
+     }
+ }
+ 
++/* Called through for_each_rtx, this function examines every reg that occurs
++   in PX and adjusts the costs for its elimination which are gathered by IRA.
++   DATA is the insn in which PX occurs.  We do not recurse into MEM
++   expressions.  */
++
++static int
++note_reg_elim_costly (rtx *px, void *data)
++{
++  rtx insn = (rtx)data;
++  rtx x = *px;
++
++  if (MEM_P (x))
++    return -1;
++
++  if (REG_P (x)
++      && REGNO (x) >= FIRST_PSEUDO_REGISTER
++      && reg_equiv_init[REGNO (x)]
++      && reg_equiv_invariant[REGNO (x)])
++    {
++      rtx t = reg_equiv_invariant[REGNO (x)];
++      rtx new_rtx = eliminate_regs_1 (t, Pmode, insn, true, true);
++      int cost = rtx_cost (new_rtx, SET, optimize_bb_for_speed_p (elim_bb));
++      int freq = REG_FREQ_FROM_BB (elim_bb);
++
++      if (cost != 0)
++	ira_adjust_equiv_reg_cost (REGNO (x), -cost * freq);
++    }
++  return 0;
++}
++
+ /* Scan X and replace any eliminable registers (such as fp) with a
+    replacement (such as sp), plus an offset.
+ 
+@@ -2533,6 +2522,9 @@
+    This means, do not set ref_outside_mem even if the reference
+    is outside of MEMs.
+ 
++   If FOR_COSTS is true, we are being called before reload in order to
++   estimate the costs of keeping registers with an equivalence unallocated.
++
+    REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had
+    replacements done assuming all offsets are at their initial values.  If
+    they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we
+@@ -2541,7 +2533,7 @@
+ 
+ static rtx
+ eliminate_regs_1 (rtx x, enum machine_mode mem_mode, rtx insn,
+-		  bool may_use_invariant)
++		  bool may_use_invariant, bool for_costs)
+ {
+   enum rtx_code code = GET_CODE (x);
+   struct elim_table *ep;
+@@ -2589,11 +2581,12 @@
+ 	{
+ 	  if (may_use_invariant || (insn && DEBUG_INSN_P (insn)))
+ 	    return eliminate_regs_1 (copy_rtx (reg_equiv_invariant[regno]),
+-			             mem_mode, insn, true);
++			             mem_mode, insn, true, for_costs);
+ 	  /* There exists at least one use of REGNO that cannot be
+ 	     eliminated.  Prevent the defining insn from being deleted.  */
+ 	  reg_equiv_init[regno] = NULL_RTX;
+-	  alter_reg (regno, -1, true);
++	  if (!for_costs)
++	    alter_reg (regno, -1, true);
+ 	}
+       return x;
+ 
+@@ -2654,8 +2647,10 @@
+ 	 operand of a load-address insn.  */
+ 
+       {
+-	rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
+-	rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
++	rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true,
++				     for_costs);
++	rtx new1 = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
++				     for_costs);
+ 
+ 	if (reg_renumber && (new0 != XEXP (x, 0) || new1 != XEXP (x, 1)))
+ 	  {
+@@ -2729,9 +2724,11 @@
+     case GE:       case GT:       case GEU:    case GTU:
+     case LE:       case LT:       case LEU:    case LTU:
+       {
+-	rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
++	rtx new0 = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false,
++				     for_costs);
+ 	rtx new1 = XEXP (x, 1)
+-		   ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false) : 0;
++	  ? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, false,
++			      for_costs) : 0;
+ 
+ 	if (new0 != XEXP (x, 0) || new1 != XEXP (x, 1))
+ 	  return gen_rtx_fmt_ee (code, GET_MODE (x), new0, new1);
+@@ -2742,7 +2739,8 @@
+       /* If we have something in XEXP (x, 0), the usual case, eliminate it.  */
+       if (XEXP (x, 0))
+ 	{
+-	  new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true);
++	  new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, true,
++				      for_costs);
+ 	  if (new_rtx != XEXP (x, 0))
+ 	    {
+ 	      /* If this is a REG_DEAD note, it is not valid anymore.
+@@ -2750,7 +2748,8 @@
+ 		 REG_DEAD note for the stack or frame pointer.  */
+ 	      if (REG_NOTE_KIND (x) == REG_DEAD)
+ 		return (XEXP (x, 1)
+-			? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true)
++			? eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
++					    for_costs)
+ 			: NULL_RTX);
+ 
+ 	      x = alloc_reg_note (REG_NOTE_KIND (x), new_rtx, XEXP (x, 1));
+@@ -2765,7 +2764,8 @@
+ 	 strictly needed, but it simplifies the code.  */
+       if (XEXP (x, 1))
+ 	{
+-	  new_rtx = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true);
++	  new_rtx = eliminate_regs_1 (XEXP (x, 1), mem_mode, insn, true,
++				      for_costs);
+ 	  if (new_rtx != XEXP (x, 1))
+ 	    return
+ 	      gen_rtx_fmt_ee (GET_CODE (x), GET_MODE (x), XEXP (x, 0), new_rtx);
+@@ -2791,7 +2791,7 @@
+ 	  && XEXP (XEXP (x, 1), 0) == XEXP (x, 0))
+ 	{
+ 	  rtx new_rtx = eliminate_regs_1 (XEXP (XEXP (x, 1), 1), mem_mode,
+-				      insn, true);
++					  insn, true, for_costs);
+ 
+ 	  if (new_rtx != XEXP (XEXP (x, 1), 1))
+ 	    return gen_rtx_fmt_ee (code, GET_MODE (x), XEXP (x, 0),
+@@ -2814,7 +2814,8 @@
+     case POPCOUNT:
+     case PARITY:
+     case BSWAP:
+-      new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false);
++      new_rtx = eliminate_regs_1 (XEXP (x, 0), mem_mode, insn, false,
++				  for_costs);
+       if (new_rtx != XEXP (x, 0))
+ 	return gen_rtx_fmt_e (code, GET_MODE (x), new_rtx);
+       return x;
+@@ -2835,7 +2836,8 @@
+ 	  new_rtx = SUBREG_REG (x);
+ 	}
+       else
+-	new_rtx = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false);
++	new_rtx = eliminate_regs_1 (SUBREG_REG (x), mem_mode, insn, false,
++				    for_costs);
+ 
+       if (new_rtx != SUBREG_REG (x))
+ 	{
+@@ -2869,14 +2871,20 @@
+       /* Our only special processing is to pass the mode of the MEM to our
+ 	 recursive call and copy the flags.  While we are here, handle this
+ 	 case more efficiently.  */
+-      return
+-	replace_equiv_address_nv (x,
+-				  eliminate_regs_1 (XEXP (x, 0), GET_MODE (x),
+-						    insn, true));
++
++      new_rtx = eliminate_regs_1 (XEXP (x, 0), GET_MODE (x), insn, true,
++				  for_costs);
++      if (for_costs
++	  && memory_address_p (GET_MODE (x), XEXP (x, 0))
++	  && !memory_address_p (GET_MODE (x), new_rtx))
++	for_each_rtx (&XEXP (x, 0), note_reg_elim_costly, insn);
++
++      return replace_equiv_address_nv (x, new_rtx);
+ 
+     case USE:
+       /* Handle insn_list USE that a call to a pure function may generate.  */
+-      new_rtx = eliminate_regs_1 (XEXP (x, 0), VOIDmode, insn, false);
++      new_rtx = eliminate_regs_1 (XEXP (x, 0), VOIDmode, insn, false,
++				  for_costs);
+       if (new_rtx != XEXP (x, 0))
+ 	return gen_rtx_USE (GET_MODE (x), new_rtx);
+       return x;
+@@ -2900,7 +2908,8 @@
+     {
+       if (*fmt == 'e')
+ 	{
+-	  new_rtx = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false);
++	  new_rtx = eliminate_regs_1 (XEXP (x, i), mem_mode, insn, false,
++				      for_costs);
+ 	  if (new_rtx != XEXP (x, i) && ! copied)
+ 	    {
+ 	      x = shallow_copy_rtx (x);
+@@ -2913,7 +2922,8 @@
+ 	  int copied_vec = 0;
+ 	  for (j = 0; j < XVECLEN (x, i); j++)
+ 	    {
+-	      new_rtx = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false);
++	      new_rtx = eliminate_regs_1 (XVECEXP (x, i, j), mem_mode, insn, false,
++					  for_costs);
+ 	      if (new_rtx != XVECEXP (x, i, j) && ! copied_vec)
+ 		{
+ 		  rtvec new_v = gen_rtvec_v (XVECLEN (x, i),
+@@ -2937,7 +2947,7 @@
+ rtx
+ eliminate_regs (rtx x, enum machine_mode mem_mode, rtx insn)
+ {
+-  return eliminate_regs_1 (x, mem_mode, insn, false);
++  return eliminate_regs_1 (x, mem_mode, insn, false, false);
+ }
+ 
+ /* Scan rtx X for modifications of elimination target registers.  Update
+@@ -3455,7 +3465,8 @@
+ 	  /* Companion to the above plus substitution, we can allow
+ 	     invariants as the source of a plain move.  */
+ 	  is_set_src = false;
+-	  if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set))
++	  if (old_set
++	      && recog_data.operand_loc[i] == &SET_SRC (old_set))
+ 	    is_set_src = true;
+ 	  in_plus = false;
+ 	  if (plus_src
+@@ -3466,7 +3477,7 @@
+ 	  substed_operand[i]
+ 	    = eliminate_regs_1 (recog_data.operand[i], VOIDmode,
+ 			        replace ? insn : NULL_RTX,
+-				is_set_src || in_plus);
++				is_set_src || in_plus, false);
+ 	  if (substed_operand[i] != orig_operand[i])
+ 	    val = 1;
+ 	  /* Terminate the search in check_eliminable_occurrences at
+@@ -3594,11 +3605,167 @@
+      the pre-passes.  */
+   if (val && REG_NOTES (insn) != 0)
+     REG_NOTES (insn)
+-      = eliminate_regs_1 (REG_NOTES (insn), VOIDmode, REG_NOTES (insn), true);
++      = eliminate_regs_1 (REG_NOTES (insn), VOIDmode, REG_NOTES (insn), true,
++			  false);
+ 
+   return val;
+ }
+ 
++/* Like eliminate_regs_in_insn, but only estimate costs for the use of the
++   register allocator.  INSN is the instruction we need to examine, we perform
++   eliminations in its operands and record cases where eliminating a reg with
++   an invariant equivalence would add extra cost.  */
++
++static void
++elimination_costs_in_insn (rtx insn)
++{
++  int icode = recog_memoized (insn);
++  rtx old_body = PATTERN (insn);
++  int insn_is_asm = asm_noperands (old_body) >= 0;
++  rtx old_set = single_set (insn);
++  int i;
++  rtx orig_operand[MAX_RECOG_OPERANDS];
++  rtx orig_dup[MAX_RECOG_OPERANDS];
++  struct elim_table *ep;
++  rtx plus_src, plus_cst_src;
++  bool sets_reg_p;
++
++  if (! insn_is_asm && icode < 0)
++    {
++      gcc_assert (GET_CODE (PATTERN (insn)) == USE
++		  || GET_CODE (PATTERN (insn)) == CLOBBER
++		  || GET_CODE (PATTERN (insn)) == ADDR_VEC
++		  || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC
++		  || GET_CODE (PATTERN (insn)) == ASM_INPUT
++		  || DEBUG_INSN_P (insn));
++      return;
++    }
++
++  if (old_set != 0 && REG_P (SET_DEST (old_set))
++      && REGNO (SET_DEST (old_set)) < FIRST_PSEUDO_REGISTER)
++    {
++      /* Check for setting an eliminable register.  */
++      for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
++	if (ep->from_rtx == SET_DEST (old_set) && ep->can_eliminate)
++	  return;
++    }
++
++  /* We allow one special case which happens to work on all machines we
++     currently support: a single set with the source or a REG_EQUAL
++     note being a PLUS of an eliminable register and a constant.  */
++  plus_src = plus_cst_src = 0;
++  sets_reg_p = false;
++  if (old_set && REG_P (SET_DEST (old_set)))
++    {
++      sets_reg_p = true;
++      if (GET_CODE (SET_SRC (old_set)) == PLUS)
++	plus_src = SET_SRC (old_set);
++      /* First see if the source is of the form (plus (...) CST).  */
++      if (plus_src
++	  && CONST_INT_P (XEXP (plus_src, 1)))
++	plus_cst_src = plus_src;
++      else if (REG_P (SET_SRC (old_set))
++	       || plus_src)
++	{
++	  /* Otherwise, see if we have a REG_EQUAL note of the form
++	     (plus (...) CST).  */
++	  rtx links;
++	  for (links = REG_NOTES (insn); links; links = XEXP (links, 1))
++	    {
++	      if ((REG_NOTE_KIND (links) == REG_EQUAL
++		   || REG_NOTE_KIND (links) == REG_EQUIV)
++		  && GET_CODE (XEXP (links, 0)) == PLUS
++		  && CONST_INT_P (XEXP (XEXP (links, 0), 1)))
++		{
++		  plus_cst_src = XEXP (links, 0);
++		  break;
++		}
++	    }
++	}
++    }
++
++  /* Determine the effects of this insn on elimination offsets.  */
++  elimination_effects (old_body, VOIDmode);
++
++  /* Eliminate all eliminable registers occurring in operands that
++     can be handled by reload.  */
++  extract_insn (insn);
++  for (i = 0; i < recog_data.n_dups; i++)
++    orig_dup[i] = *recog_data.dup_loc[i];
++
++  for (i = 0; i < recog_data.n_operands; i++)
++    {
++      orig_operand[i] = recog_data.operand[i];
++
++      /* For an asm statement, every operand is eliminable.  */
++      if (insn_is_asm || insn_data[icode].operand[i].eliminable)
++	{
++	  bool is_set_src, in_plus;
++
++	  /* Check for setting a register that we know about.  */
++	  if (recog_data.operand_type[i] != OP_IN
++	      && REG_P (orig_operand[i]))
++	    {
++	      /* If we are assigning to a register that can be eliminated, it
++		 must be as part of a PARALLEL, since the code above handles
++		 single SETs.  We must indicate that we can no longer
++		 eliminate this reg.  */
++	      for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS];
++		   ep++)
++		if (ep->from_rtx == orig_operand[i])
++		  ep->can_eliminate = 0;
++	    }
++
++	  /* Companion to the above plus substitution, we can allow
++	     invariants as the source of a plain move.  */
++	  is_set_src = false;
++	  if (old_set && recog_data.operand_loc[i] == &SET_SRC (old_set))
++	    is_set_src = true;
++	  if (is_set_src && !sets_reg_p)
++	    note_reg_elim_costly (&SET_SRC (old_set), insn);
++	  in_plus = false;
++	  if (plus_src && sets_reg_p
++	      && (recog_data.operand_loc[i] == &XEXP (plus_src, 0)
++		  || recog_data.operand_loc[i] == &XEXP (plus_src, 1)))
++	    in_plus = true;
++
++	  eliminate_regs_1 (recog_data.operand[i], VOIDmode,
++			    NULL_RTX,
++			    is_set_src || in_plus, true);
++	  /* Terminate the search in check_eliminable_occurrences at
++	     this point.  */
++	  *recog_data.operand_loc[i] = 0;
++	}
++    }
++
++  for (i = 0; i < recog_data.n_dups; i++)
++    *recog_data.dup_loc[i]
++      = *recog_data.operand_loc[(int) recog_data.dup_num[i]];
++
++  /* If any eliminable remain, they aren't eliminable anymore.  */
++  check_eliminable_occurrences (old_body);
++
++  /* Restore the old body.  */
++  for (i = 0; i < recog_data.n_operands; i++)
++    *recog_data.operand_loc[i] = orig_operand[i];
++  for (i = 0; i < recog_data.n_dups; i++)
++    *recog_data.dup_loc[i] = orig_dup[i];
++
++  /* Update all elimination pairs to reflect the status after the current
++     insn.  The changes we make were determined by the earlier call to
++     elimination_effects.  */
++
++  for (ep = reg_eliminate; ep < &reg_eliminate[NUM_ELIMINABLE_REGS]; ep++)
++    {
++      if (ep->previous_offset != ep->offset && ep->ref_outside_mem)
++	ep->can_eliminate = 0;
++
++      ep->ref_outside_mem = 0;
++    }
++
++  return;
++}
++
+ /* Loop through all elimination pairs.
+    Recalculate the number not at initial offset.
+ 
+@@ -3908,6 +4075,168 @@
+       ep->to_rtx = gen_rtx_REG (Pmode, ep->to);
+     }
+ }
++
++/* Find all the pseudo registers that didn't get hard regs
++   but do have known equivalent constants or memory slots.
++   These include parameters (known equivalent to parameter slots)
++   and cse'd or loop-moved constant memory addresses.
++
++   Record constant equivalents in reg_equiv_constant
++   so they will be substituted by find_reloads.
++   Record memory equivalents in reg_mem_equiv so they can
++   be substituted eventually by altering the REG-rtx's.  */
++
++static void
++init_eliminable_invariants (rtx first, bool do_subregs)
++{
++  int i;
++  rtx insn;
++
++  reg_equiv_constant = XCNEWVEC (rtx, max_regno);
++  reg_equiv_invariant = XCNEWVEC (rtx, max_regno);
++  reg_equiv_mem = XCNEWVEC (rtx, max_regno);
++  reg_equiv_alt_mem_list = XCNEWVEC (rtx, max_regno);
++  reg_equiv_address = XCNEWVEC (rtx, max_regno);
++  if (do_subregs)
++    reg_max_ref_width = XCNEWVEC (unsigned int, max_regno);
++  else
++    reg_max_ref_width = NULL;
++
++  num_eliminable_invariants = 0;
++
++  first_label_num = get_first_label_num ();
++  num_labels = max_label_num () - first_label_num;
++
++  /* Allocate the tables used to store offset information at labels.  */
++  offsets_known_at = XNEWVEC (char, num_labels);
++  offsets_at = (HOST_WIDE_INT (*)[NUM_ELIMINABLE_REGS]) xmalloc (num_labels * NUM_ELIMINABLE_REGS * sizeof (HOST_WIDE_INT));
++
++/* Look for REG_EQUIV notes; record what each pseudo is equivalent
++   to.  If DO_SUBREGS is true, also find all paradoxical subregs and
++   find largest such for each pseudo.  FIRST is the head of the insn
++   list.  */
++
++  for (insn = first; insn; insn = NEXT_INSN (insn))
++    {
++      rtx set = single_set (insn);
++
++      /* We may introduce USEs that we want to remove at the end, so
++	 we'll mark them with QImode.  Make sure there are no
++	 previously-marked insns left by say regmove.  */
++      if (INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
++	  && GET_MODE (insn) != VOIDmode)
++	PUT_MODE (insn, VOIDmode);
++
++      if (do_subregs && NONDEBUG_INSN_P (insn))
++	scan_paradoxical_subregs (PATTERN (insn));
++
++      if (set != 0 && REG_P (SET_DEST (set)))
++	{
++	  rtx note = find_reg_note (insn, REG_EQUIV, NULL_RTX);
++	  rtx x;
++
++	  if (! note)
++	    continue;
++
++	  i = REGNO (SET_DEST (set));
++	  x = XEXP (note, 0);
++
++	  if (i <= LAST_VIRTUAL_REGISTER)
++	    continue;
++
++	  /* If flag_pic and we have constant, verify it's legitimate.  */
++	  if (!CONSTANT_P (x)
++	      || !flag_pic || LEGITIMATE_PIC_OPERAND_P (x))
++	    {
++	      /* It can happen that a REG_EQUIV note contains a MEM
++		 that is not a legitimate memory operand.  As later
++		 stages of reload assume that all addresses found
++		 in the reg_equiv_* arrays were originally legitimate,
++		 we ignore such REG_EQUIV notes.  */
++	      if (memory_operand (x, VOIDmode))
++		{
++		  /* Always unshare the equivalence, so we can
++		     substitute into this insn without touching the
++		       equivalence.  */
++		  reg_equiv_memory_loc[i] = copy_rtx (x);
++		}
++	      else if (function_invariant_p (x))
++		{
++		  if (GET_CODE (x) == PLUS)
++		    {
++		      /* This is PLUS of frame pointer and a constant,
++			 and might be shared.  Unshare it.  */
++		      reg_equiv_invariant[i] = copy_rtx (x);
++		      num_eliminable_invariants++;
++		    }
++		  else if (x == frame_pointer_rtx || x == arg_pointer_rtx)
++		    {
++		      reg_equiv_invariant[i] = x;
++		      num_eliminable_invariants++;
++		    }
++		  else if (LEGITIMATE_CONSTANT_P (x))
++		    reg_equiv_constant[i] = x;
++		  else
++		    {
++		      reg_equiv_memory_loc[i]
++			= force_const_mem (GET_MODE (SET_DEST (set)), x);
++		      if (! reg_equiv_memory_loc[i])
++			reg_equiv_init[i] = NULL_RTX;
++		    }
++		}
++	      else
++		{
++		  reg_equiv_init[i] = NULL_RTX;
++		  continue;
++		}
++	    }
++	  else
++	    reg_equiv_init[i] = NULL_RTX;
++	}
++    }
++
++  if (dump_file)
++    for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
++      if (reg_equiv_init[i])
++	{
++	  fprintf (dump_file, "init_insns for %u: ", i);
++	  print_inline_rtx (dump_file, reg_equiv_init[i], 20);
++	  fprintf (dump_file, "\n");
++	}
++}
++
++/* Indicate that we no longer have known memory locations or constants.
++   Free all data involved in tracking these.  */
++
++static void
++free_reg_equiv (void)
++{
++  int i;
++
++  if (reg_equiv_constant)
++    free (reg_equiv_constant);
++  if (reg_equiv_invariant)
++    free (reg_equiv_invariant);
++  reg_equiv_constant = 0;
++  reg_equiv_invariant = 0;
++  VEC_free (rtx, gc, reg_equiv_memory_loc_vec);
++  reg_equiv_memory_loc = 0;
++
++  if (offsets_known_at)
++    free (offsets_known_at);
++  if (offsets_at)
++    free (offsets_at);
++  offsets_at = 0;
++  offsets_known_at = 0;
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    if (reg_equiv_alt_mem_list[i])
++      free_EXPR_LIST_list (&reg_equiv_alt_mem_list[i]);
++  free (reg_equiv_alt_mem_list);
++
++  free (reg_equiv_mem);
++  free (reg_equiv_address);
++}
+ 
+ /* Kick all pseudos out of hard register REGNO.
+ 
+@@ -5664,7 +5993,7 @@
+     return 1;
+   if (GET_CODE (x) == PLUS
+       && (XEXP (x, 0) == frame_pointer_rtx || XEXP (x, 0) == arg_pointer_rtx)
+-      && CONSTANT_P (XEXP (x, 1)))
++      && GET_CODE (XEXP (x, 1)) == CONST_INT)
+     return 1;
+   return 0;
+ }
+
+=== modified file 'gcc/system.h'
+--- old/gcc/system.h	2009-12-13 23:00:53 +0000
++++ new/gcc/system.h	2010-09-01 13:29:58 +0000
+@@ -761,7 +761,8 @@
+ 	TARGET_ASM_EXCEPTION_SECTION TARGET_ASM_EH_FRAME_SECTION	   \
+ 	SMALL_ARG_MAX ASM_OUTPUT_SHARED_BSS ASM_OUTPUT_SHARED_COMMON	   \
+ 	ASM_OUTPUT_SHARED_LOCAL ASM_MAKE_LABEL_LINKONCE			   \
+-	STACK_CHECK_PROBE_INTERVAL STACK_CHECK_PROBE_LOAD
++	STACK_CHECK_PROBE_INTERVAL STACK_CHECK_PROBE_LOAD		   \
++	ORDER_REGS_FOR_LOCAL_ALLOC
+ 
+ /* Hooks that are no longer used.  */
+  #pragma GCC poison LANG_HOOKS_FUNCTION_MARK LANG_HOOKS_FUNCTION_FREE	\
+
+=== added file 'gcc/testsuite/c-c++-common/uninit-17.c'
+--- old/gcc/testsuite/c-c++-common/uninit-17.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/c-c++-common/uninit-17.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,25 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -Wuninitialized" } */
++
++inline int foo(int x)
++{
++  return x;
++}
++static void bar(int a, int *ptr)
++{
++  do
++  {
++    int b; /* { dg-warning "is used uninitialized" } */
++    if (b < 40) {
++      ptr[0] = b;
++    }
++    b += 1;
++    ptr++;
++  }
++  while (--a != 0);
++}
++void foobar(int a, int *ptr)
++{
++  bar(foo(a), ptr);
++}
++
+
+=== added file 'gcc/testsuite/gcc.target/arm/eliminate.c'
+--- old/gcc/testsuite/gcc.target/arm/eliminate.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/eliminate.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,19 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" }  */
++
++struct X
++{
++  int c;
++};
++
++extern void bar(struct X *);
++
++void foo ()
++{
++  struct X x;
++  bar (&x);
++  bar (&x);
++  bar (&x);
++}
++
++/* { dg-final { scan-assembler-times "r0,\[\\t \]*sp" 3 } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr40900.c'
+--- old/gcc/testsuite/gcc.target/arm/pr40900.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr40900.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fno-optimize-sibling-calls" }  */
++
++extern short shortv2();
++short shortv1()
++{
++  return shortv2();
++}
++
++/* { dg-final { scan-assembler-not "lsl" } } */
++/* { dg-final { scan-assembler-not "asr" } } */
++/* { dg-final { scan-assembler-not "sxth" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr42496.c'
+--- old/gcc/testsuite/gcc.target/arm/pr42496.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr42496.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,16 @@
++/* { dg-options "-O2" }  */
++
++void foo(int i)
++{
++    extern int j;
++
++    if (i) {
++         j = 10;
++    }
++    else {
++          j = 20;
++    }
++}
++
++/* { dg-final { scan-assembler-not "strne" } } */
++/* { dg-final { scan-assembler-not "streq" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/wmul-1.c'
+--- old/gcc/testsuite/gcc.target/arm/wmul-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/wmul-1.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv6t2 -fno-unroll-loops" } */
++
++int mac(const short *a, const short *b, int sqr, int *sum)
++{
++  int i;
++  int dotp = *sum;
++
++  for (i = 0; i < 150; i++) {
++    dotp += b[i] * a[i];
++    sqr += b[i] * b[i];
++  }
++
++  *sum = dotp;
++  return sqr;
++}
++
++/* { dg-final { scan-assembler-times "smulbb" 2 } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/wmul-2.c'
+--- old/gcc/testsuite/gcc.target/arm/wmul-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/wmul-2.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -march=armv6t2 -fno-unroll-loops" } */
++
++void vec_mpy(int y[], const short x[], short scaler)
++{
++ int i;
++
++ for (i = 0; i < 150; i++)
++   y[i] += ((scaler * x[i]) >> 31);
++}
++
++/* { dg-final { scan-assembler-times "smulbb" 1 } } */
+
+=== added file 'gcc/testsuite/gcc.target/bfin/wmul-1.c'
+--- old/gcc/testsuite/gcc.target/bfin/wmul-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/bfin/wmul-1.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++int mac(const short *a, const short *b, int sqr, int *sum)
++{
++  int i;
++  int dotp = *sum;
++
++  for (i = 0; i < 150; i++) {
++    dotp += b[i] * a[i];
++    sqr += b[i] * b[i];
++  }
++
++  *sum = dotp;
++  return sqr;
++}
++
++/* { dg-final { scan-assembler-times "\\(IS\\)" 2 } } */
+
+=== added file 'gcc/testsuite/gcc.target/bfin/wmul-2.c'
+--- old/gcc/testsuite/gcc.target/bfin/wmul-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/bfin/wmul-2.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void vec_mpy(int y[], const short x[], short scaler)
++{
++ int i;
++
++ for (i = 0; i < 150; i++)
++   y[i] += ((scaler * x[i]) >> 31);
++}
++
++/* { dg-final { scan-assembler-times "\\(IS\\)" 1 } } */
+
+=== added file 'gcc/testsuite/gcc.target/i386/pr41442.c'
+--- old/gcc/testsuite/gcc.target/i386/pr41442.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/i386/pr41442.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef struct LINK link;
++struct LINK
++{
++    link* next;
++};
++
++int haha(link* p1, link* p2)
++{
++  if ((p1->next && !p2->next) || p2->next)
++    return 0;
++
++  return 1;
++}
++
++/* { dg-final { scan-assembler-times "test|cmp" 2 } } */
+
+=== added file 'gcc/testsuite/gcc.target/i386/wmul-1.c'
+--- old/gcc/testsuite/gcc.target/i386/wmul-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/i386/wmul-1.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,18 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++long long mac(const int *a, const int *b, long long sqr, long long *sum)
++{
++  int i;
++  long long dotp = *sum;
++
++  for (i = 0; i < 150; i++) {
++    dotp += (long long)b[i] * a[i];
++    sqr += (long long)b[i] * b[i];
++  }
++
++  *sum = dotp;
++  return sqr;
++}
++
++/* { dg-final { scan-assembler-times "imull" 2 } } */
+
+=== added file 'gcc/testsuite/gcc.target/i386/wmul-2.c'
+--- old/gcc/testsuite/gcc.target/i386/wmul-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/i386/wmul-2.c	2010-09-01 13:29:58 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++void vec_mpy(int y[], const int x[], int scaler)
++{
++ int i;
++
++ for (i = 0; i < 150; i++)
++   y[i] += (((long long)scaler * x[i]) >> 31);
++}
++
++/* { dg-final { scan-assembler-times "imull" 1 } } */
+
+=== modified file 'gcc/tree-cfg.c'
+--- old/gcc/tree-cfg.c	2010-08-10 13:31:21 +0000
++++ new/gcc/tree-cfg.c	2010-09-01 13:29:58 +0000
+@@ -3428,8 +3428,13 @@
+ 	 connected to the operand types.  */
+       return verify_gimple_comparison (lhs_type, rhs1, rhs2);
+ 
++    case WIDEN_MULT_EXPR:
++      if (TREE_CODE (lhs_type) != INTEGER_TYPE)
++	return true;
++      return ((2 * TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (lhs_type))
++	      || (TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (rhs2_type)));
++
+     case WIDEN_SUM_EXPR:
+-    case WIDEN_MULT_EXPR:
+     case VEC_WIDEN_MULT_HI_EXPR:
+     case VEC_WIDEN_MULT_LO_EXPR:
+     case VEC_PACK_TRUNC_EXPR:
+
+=== modified file 'gcc/tree-inline.c'
+--- old/gcc/tree-inline.c	2010-08-10 13:31:21 +0000
++++ new/gcc/tree-inline.c	2010-09-01 13:29:58 +0000
+@@ -229,6 +229,7 @@
+ 	     regions of the CFG, but this is expensive to test.  */
+ 	  if (id->entry_bb
+ 	      && is_gimple_reg (SSA_NAME_VAR (name))
++	      && SSA_NAME_OCCURS_IN_ABNORMAL_PHI (name)
+ 	      && TREE_CODE (SSA_NAME_VAR (name)) != PARM_DECL
+ 	      && (id->entry_bb != EDGE_SUCC (ENTRY_BLOCK_PTR, 0)->dest
+ 		  || EDGE_COUNT (id->entry_bb->preds) != 1))
+
+=== modified file 'gcc/tree-pass.h'
+--- old/gcc/tree-pass.h	2010-04-02 18:54:46 +0000
++++ new/gcc/tree-pass.h	2010-09-01 13:29:58 +0000
+@@ -407,6 +407,7 @@
+ extern struct gimple_opt_pass pass_cse_reciprocals;
+ extern struct gimple_opt_pass pass_cse_sincos;
+ extern struct gimple_opt_pass pass_optimize_bswap;
++extern struct gimple_opt_pass pass_optimize_widening_mul;
+ extern struct gimple_opt_pass pass_warn_function_return;
+ extern struct gimple_opt_pass pass_warn_function_noreturn;
+ extern struct gimple_opt_pass pass_cselim;
+
+=== modified file 'gcc/tree-ssa-math-opts.c'
+--- old/gcc/tree-ssa-math-opts.c	2010-04-02 18:54:46 +0000
++++ new/gcc/tree-ssa-math-opts.c	2010-09-01 13:29:58 +0000
+@@ -1260,3 +1260,137 @@
+   0                                     /* todo_flags_finish */
+  }
+ };
++
++/* Find integer multiplications where the operands are extended from
++   smaller types, and replace the MULT_EXPR with a WIDEN_MULT_EXPR
++   where appropriate.  */
++
++static unsigned int
++execute_optimize_widening_mul (void)
++{
++  bool changed = false;
++  basic_block bb;
++
++  FOR_EACH_BB (bb)
++    {
++      gimple_stmt_iterator gsi;
++
++      for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi))
++        {
++	  gimple stmt = gsi_stmt (gsi);
++	  gimple rhs1_stmt = NULL, rhs2_stmt = NULL;
++	  tree type, type1 = NULL, type2 = NULL;
++	  tree rhs1, rhs2, rhs1_convop = NULL, rhs2_convop = NULL;
++	  enum tree_code rhs1_code, rhs2_code;
++
++	  if (!is_gimple_assign (stmt)
++	      || gimple_assign_rhs_code (stmt) != MULT_EXPR)
++	    continue;
++
++	  type = TREE_TYPE (gimple_assign_lhs (stmt));
++
++	  if (TREE_CODE (type) != INTEGER_TYPE)
++	    continue;
++
++	  rhs1 = gimple_assign_rhs1 (stmt);
++	  rhs2 = gimple_assign_rhs2 (stmt);
++
++	  if (TREE_CODE (rhs1) == SSA_NAME)
++	    {
++	      rhs1_stmt = SSA_NAME_DEF_STMT (rhs1);
++	      if (!is_gimple_assign (rhs1_stmt))
++		continue;
++	      rhs1_code = gimple_assign_rhs_code (rhs1_stmt);
++	      if (!CONVERT_EXPR_CODE_P (rhs1_code))
++		continue;
++	      rhs1_convop = gimple_assign_rhs1 (rhs1_stmt);
++	      type1 = TREE_TYPE (rhs1_convop);
++	      if (TYPE_PRECISION (type1) * 2 != TYPE_PRECISION (type))
++		continue;
++	    }
++	  else if (TREE_CODE (rhs1) != INTEGER_CST)
++	    continue;
++
++	  if (TREE_CODE (rhs2) == SSA_NAME)
++	    {
++	      rhs2_stmt = SSA_NAME_DEF_STMT (rhs2);
++	      if (!is_gimple_assign (rhs2_stmt))
++		continue;
++	      rhs2_code = gimple_assign_rhs_code (rhs2_stmt);
++	      if (!CONVERT_EXPR_CODE_P (rhs2_code))
++		continue;
++	      rhs2_convop = gimple_assign_rhs1 (rhs2_stmt);
++	      type2 = TREE_TYPE (rhs2_convop);
++	      if (TYPE_PRECISION (type2) * 2 != TYPE_PRECISION (type))
++		continue;
++	    }
++	  else if (TREE_CODE (rhs2) != INTEGER_CST)
++	    continue;
++
++	  if (rhs1_stmt == NULL && rhs2_stmt == NULL)
++	    continue;
++
++	  /* Verify that the machine can perform a widening multiply in this
++	     mode/signedness combination, otherwise this transformation is
++	     likely to pessimize code.  */
++	  if ((rhs1_stmt == NULL || TYPE_UNSIGNED (type1))
++	      && (rhs2_stmt == NULL || TYPE_UNSIGNED (type2))
++	      && (optab_handler (umul_widen_optab, TYPE_MODE (type))
++		  ->insn_code == CODE_FOR_nothing))
++	    continue;
++	  else if ((rhs1_stmt == NULL || !TYPE_UNSIGNED (type1))
++		   && (rhs2_stmt == NULL || !TYPE_UNSIGNED (type2))
++		   && (optab_handler (smul_widen_optab, TYPE_MODE (type))
++		       ->insn_code == CODE_FOR_nothing))
++	    continue;
++	  else if (rhs1_stmt != NULL && rhs2_stmt != 0
++		   && (TYPE_UNSIGNED (type1) != TYPE_UNSIGNED (type2))
++		   && (optab_handler (usmul_widen_optab, TYPE_MODE (type))
++		       ->insn_code == CODE_FOR_nothing))
++	    continue;
++
++	  if ((rhs1_stmt == NULL && !int_fits_type_p (rhs1, type2))
++	      || (rhs2_stmt == NULL && !int_fits_type_p (rhs2, type1)))
++	    continue;
++
++	  if (rhs1_stmt == NULL)
++	    gimple_assign_set_rhs1 (stmt, fold_convert (type2, rhs1));
++	  else
++	    gimple_assign_set_rhs1 (stmt, rhs1_convop);
++	  if (rhs2_stmt == NULL)
++	    gimple_assign_set_rhs2 (stmt, fold_convert (type1, rhs2));
++	  else
++	    gimple_assign_set_rhs2 (stmt, rhs2_convop);
++	  gimple_assign_set_rhs_code (stmt, WIDEN_MULT_EXPR);
++	  update_stmt (stmt);
++	  changed = true;
++	}
++    }
++  return (changed ? TODO_dump_func | TODO_update_ssa | TODO_verify_ssa
++	  | TODO_verify_stmts : 0);
++}
++
++static bool
++gate_optimize_widening_mul (void)
++{
++  return flag_expensive_optimizations && optimize;
++}
++
++struct gimple_opt_pass pass_optimize_widening_mul =
++{
++ {
++  GIMPLE_PASS,
++  "widening_mul",			/* name */
++  gate_optimize_widening_mul,		/* gate */
++  execute_optimize_widening_mul,	/* execute */
++  NULL,					/* sub */
++  NULL,					/* next */
++  0,					/* static_pass_number */
++  TV_NONE,				/* tv_id */
++  PROP_ssa,				/* properties_required */
++  0,					/* properties_provided */
++  0,					/* properties_destroyed */
++  0,					/* todo_flags_start */
++  0                                     /* todo_flags_finish */
++ }
++};
+
+=== modified file 'gcc/tree-ssa.c'
+--- old/gcc/tree-ssa.c	2009-12-07 22:42:10 +0000
++++ new/gcc/tree-ssa.c	2010-09-01 13:29:58 +0000
+@@ -1671,6 +1671,8 @@
+     {
+       TREE_NO_WARNING (var) = 1;
+ 
++      if (location == DECL_SOURCE_LOCATION (var))
++	return;
+       if (xloc.file != floc.file
+ 	  || xloc.line < floc.line
+ 	  || xloc.line > LOCATION_LINE (cfun->function_end_locus))
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99381.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99381.patch
new file mode 100644
index 0000000000..c504f44fbe
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99381.patch
@@ -0,0 +1,512 @@
+2010-09-06  Mark Mitchell  <mark@codesourcery.com>
+
+	Issue #9022
+
+	Backport from mainline:
+	2010-09-05  Mark Mitchell  <mark@codesourcery.com>
+	* doc/invoke.texi: Document -Wdouble-promotion.
+	* c-typeck.c (convert_arguments): Check for implicit conversions
+	from float to double.
+	(do_warn_double_promotion): New function.
+	(build_conditional_expr): Use it.
+	(build_binary_op): Likewise.
+	* c.opt (Wdouble-promotion): New.
+	2010-09-05  Mark Mitchell  <mark@codesourcery.com>
+	* gcc.dg/Wdouble-promotion.c: New.
+	2010-09-06  Mark Mitchell  <mark@codesourcery.com>
+	gcc/
+	* c-common.h (do_warn_double_promotion): Declare.
+	* c-common.c (do_warn_double_promotion): Define.
+	* c-typeck.c (do_warn_double_promotion): Remove.
+	* doc/invoke.texi (-Wdouble-promotion): Note available for C++ and
+	Objective-C++ too.
+	gcc/cp/
+	* typeck.c (cp_build_binary_op): Call do_warn_double_promotion.
+	* call.c (build_conditional_expr): Likewise.
+	(convert_arg_to_ellipsis): Likewise.
+	gcc/testsuite/
+	* g++.dg/warn/Wdouble-promotion.C: New.
+
+ 2010-08-31  Chung-Lin Tang  <cltang@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/c-common.c'
+--- old/gcc/c-common.c	2010-06-25 09:35:40 +0000
++++ new/gcc/c-common.c	2010-09-07 15:47:57 +0000
+@@ -9172,6 +9172,40 @@
+     }
+ }
+ 
++/* RESULT_TYPE is the result of converting TYPE1 and TYPE2 to a common
++   type via c_common_type.  If -Wdouble-promotion is in use, and the
++   conditions for warning have been met, issue a warning.  GMSGID is
++   the warning message.  It must have two %T specifiers for the type
++   that was converted (generally "float") and the type to which it was
++   converted (generally "double), respectively.  LOC is the location
++   to which the awrning should refer.  */
++
++void
++do_warn_double_promotion (tree result_type, tree type1, tree type2,
++			 const char *gmsgid, location_t loc)
++{
++  tree source_type;
++
++  if (!warn_double_promotion)
++    return;
++  /* If the conversion will not occur at run-time, there is no need to
++     warn about it.  */
++  if (c_inhibit_evaluation_warnings)
++    return;
++  if (TYPE_MAIN_VARIANT (result_type) != double_type_node
++      && TYPE_MAIN_VARIANT (result_type) != complex_double_type_node)
++    return;
++  if (TYPE_MAIN_VARIANT (type1) == float_type_node
++      || TYPE_MAIN_VARIANT (type1) == complex_float_type_node)
++    source_type = type1;
++  else if (TYPE_MAIN_VARIANT (type2) == float_type_node
++	   || TYPE_MAIN_VARIANT (type2) == complex_float_type_node)
++    source_type = type2;
++  else
++    return;
++  warning_at (loc, OPT_Wdouble_promotion, gmsgid, source_type, result_type);
++}
++
+ /* Setup a TYPE_DECL node as a typedef representation.
+ 
+    X is a TYPE_DECL for a typedef statement.  Create a brand new
+
+=== modified file 'gcc/c-common.h'
+--- old/gcc/c-common.h	2009-12-17 03:22:22 +0000
++++ new/gcc/c-common.h	2010-09-07 15:47:57 +0000
+@@ -1056,6 +1056,8 @@
+ 				   tree op0, tree op1,
+ 				   tree result_type,
+ 				   enum tree_code resultcode);
++extern void do_warn_double_promotion (tree, tree, tree, const char *, 
++				      location_t);
+ extern void set_underlying_type (tree x);
+ extern bool is_typedef_decl (tree x);
+ extern VEC(tree,gc) *make_tree_vector (void);
+
+=== modified file 'gcc/c-typeck.c'
+--- old/gcc/c-typeck.c	2010-04-02 18:54:46 +0000
++++ new/gcc/c-typeck.c	2010-09-07 15:47:57 +0000
+@@ -3012,8 +3012,15 @@
+ 	  if (type_generic)
+ 	    parmval = val;
+ 	  else
+-	    /* Convert `float' to `double'.  */
+-	    parmval = convert (double_type_node, val);
++	    {
++	      /* Convert `float' to `double'.  */
++	      if (warn_double_promotion && !c_inhibit_evaluation_warnings)
++		warning (OPT_Wdouble_promotion,
++			 "implicit conversion from %qT to %qT when passing "
++			 "argument to function",
++			 valtype, double_type_node);
++	      parmval = convert (double_type_node, val);
++	    }
+ 	}
+       else if (excess_precision && !type_generic)
+ 	/* A "double" argument with excess precision being passed
+@@ -4036,6 +4043,10 @@
+ 	       || code2 == COMPLEX_TYPE))
+     {
+       result_type = c_common_type (type1, type2);
++      do_warn_double_promotion (result_type, type1, type2,
++				"implicit conversion from %qT to %qT to "
++				"match other result of conditional",
++				colon_loc);
+ 
+       /* If -Wsign-compare, warn here if type1 and type2 have
+ 	 different signedness.  We'll promote the signed to unsigned
+@@ -9607,6 +9618,11 @@
+       if (shorten || common || short_compare)
+ 	{
+ 	  result_type = c_common_type (type0, type1);
++	  do_warn_double_promotion (result_type, type0, type1,
++				    "implicit conversion from %qT to %qT "
++				    "to match other operand of binary "
++				    "expression",
++				    location);
+ 	  if (result_type == error_mark_node)
+ 	    return error_mark_node;
+ 	}
+
+=== modified file 'gcc/c.opt'
+--- old/gcc/c.opt	2010-04-02 18:54:46 +0000
++++ new/gcc/c.opt	2010-09-07 15:47:57 +0000
+@@ -265,6 +265,10 @@
+ Wimplicit
+ C ObjC C++ ObjC++ Warning
+ 
++Wdouble-promotion
++C ObjC C++ ObjC++ Var(warn_double_promotion) Warning
++Warn about implicit conversions from \"float\" to \"double\"
++
+ Wimplicit-function-declaration
+ C ObjC Var(warn_implicit_function_declaration) Init(-1) Warning
+ Warn about implicit function declarations
+
+=== modified file 'gcc/cp/call.c'
+--- old/gcc/cp/call.c	2010-07-08 13:08:36 +0000
++++ new/gcc/cp/call.c	2010-09-07 15:47:57 +0000
+@@ -3946,6 +3946,10 @@
+       /* In this case, there is always a common type.  */
+       result_type = type_after_usual_arithmetic_conversions (arg2_type,
+ 							     arg3_type);
++      do_warn_double_promotion (result_type, arg2_type, arg3_type,
++				"implicit conversion from %qT to %qT to "
++				"match other result of conditional",
++				input_location);
+ 
+       if (TREE_CODE (arg2_type) == ENUMERAL_TYPE
+ 	  && TREE_CODE (arg3_type) == ENUMERAL_TYPE)
+@@ -5179,11 +5183,14 @@
+ tree
+ convert_arg_to_ellipsis (tree arg)
+ {
++  tree arg_type;
++
+   /* [expr.call]
+ 
+      The lvalue-to-rvalue, array-to-pointer, and function-to-pointer
+      standard conversions are performed.  */
+   arg = decay_conversion (arg);
++  arg_type = TREE_TYPE (arg);
+   /* [expr.call]
+ 
+      If the argument has integral or enumeration type that is subject
+@@ -5191,19 +5198,27 @@
+      type that is subject to the floating point promotion
+      (_conv.fpprom_), the value of the argument is converted to the
+      promoted type before the call.  */
+-  if (TREE_CODE (TREE_TYPE (arg)) == REAL_TYPE
+-      && (TYPE_PRECISION (TREE_TYPE (arg))
++  if (TREE_CODE (arg_type) == REAL_TYPE
++      && (TYPE_PRECISION (arg_type)
+ 	  < TYPE_PRECISION (double_type_node))
+-      && !DECIMAL_FLOAT_MODE_P (TYPE_MODE (TREE_TYPE (arg))))
+-    arg = convert_to_real (double_type_node, arg);
+-  else if (INTEGRAL_OR_ENUMERATION_TYPE_P (TREE_TYPE (arg)))
++      && !DECIMAL_FLOAT_MODE_P (TYPE_MODE (arg_type)))
++    {
++      if (warn_double_promotion && !c_inhibit_evaluation_warnings)
++	warning (OPT_Wdouble_promotion,
++		 "implicit conversion from %qT to %qT when passing "
++		 "argument to function",
++		 arg_type, double_type_node);
++      arg = convert_to_real (double_type_node, arg);
++    }
++  else if (INTEGRAL_OR_ENUMERATION_TYPE_P (arg_type))
+     arg = perform_integral_promotions (arg);
+ 
+   arg = require_complete_type (arg);
++  arg_type = TREE_TYPE (arg);
+ 
+   if (arg != error_mark_node
+-      && (type_has_nontrivial_copy_init (TREE_TYPE (arg))
+-	  || TYPE_HAS_NONTRIVIAL_DESTRUCTOR (TREE_TYPE (arg))))
++      && (type_has_nontrivial_copy_init (arg_type)
++	  || TYPE_HAS_NONTRIVIAL_DESTRUCTOR (arg_type)))
+     {
+       /* [expr.call] 5.2.2/7:
+ 	 Passing a potentially-evaluated argument of class type (Clause 9)
+@@ -5218,7 +5233,7 @@
+ 	 it is not potentially-evaluated.  */
+       if (cp_unevaluated_operand == 0)
+ 	error ("cannot pass objects of non-trivially-copyable "
+-	       "type %q#T through %<...%>", TREE_TYPE (arg));
++	       "type %q#T through %<...%>", arg_type);
+     }
+ 
+   return arg;
+
+=== modified file 'gcc/cp/typeck.c'
+--- old/gcc/cp/typeck.c	2010-06-30 21:06:28 +0000
++++ new/gcc/cp/typeck.c	2010-09-07 15:47:57 +0000
+@@ -260,6 +260,7 @@
+   enum tree_code code2 = TREE_CODE (t2);
+   tree attributes;
+ 
++
+   /* In what follows, we slightly generalize the rules given in [expr] so
+      as to deal with `long long' and `complex'.  First, merge the
+      attributes.  */
+@@ -4226,7 +4227,14 @@
+   if (!result_type
+       && arithmetic_types_p
+       && (shorten || common || short_compare))
+-    result_type = cp_common_type (type0, type1);
++    {
++      result_type = cp_common_type (type0, type1);
++      do_warn_double_promotion (result_type, type0, type1,
++				"implicit conversion from %qT to %qT "
++				"to match other operand of binary "
++				"expression",
++				location);
++    }
+ 
+   if (!result_type)
+     {
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-08-16 09:41:58 +0000
++++ new/gcc/doc/invoke.texi	2010-09-07 15:47:57 +0000
+@@ -234,8 +234,8 @@
+ -Wchar-subscripts -Wclobbered  -Wcomment @gol
+ -Wconversion  -Wcoverage-mismatch  -Wno-deprecated  @gol
+ -Wno-deprecated-declarations -Wdisabled-optimization  @gol
+--Wno-div-by-zero -Wempty-body  -Wenum-compare -Wno-endif-labels @gol
+--Werror  -Werror=* @gol
++-Wno-div-by-zero -Wdouble-promotion -Wempty-body  -Wenum-compare @gol
++-Wno-endif-labels -Werror  -Werror=* @gol
+ -Wfatal-errors  -Wfloat-equal  -Wformat  -Wformat=2 @gol
+ -Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral @gol
+ -Wformat-security  -Wformat-y2k @gol
+@@ -2976,6 +2976,30 @@
+ comment, or whenever a Backslash-Newline appears in a @samp{//} comment.
+ This warning is enabled by @option{-Wall}.
+ 
++@item -Wdouble-promotion @r{(C, C++, Objective-C and Objective-C++ only)}
++@opindex Wdouble-promotion
++@opindex Wno-double-promotion
++Give a warning when a value of type @code{float} is implicitly
++promoted to @code{double}.  CPUs with a 32-bit ``single-precision''
++floating-point unit implement @code{float} in hardware, but emulate
++@code{double} in software.  On such a machine, doing computations
++using @code{double} values is much more expensive because of the
++overhead required for software emulation.  
++
++It is easy to accidentally do computations with @code{double} because
++floating-point literals are implicitly of type @code{double}.  For
++example, in:
++@smallexample
++@group
++float area(float radius)
++@{
++   return 3.14159 * radius * radius;        
++@}
++@end group
++@end smallexample
++the compiler will perform the entire computation with @code{double}
++because the floating-point literal is a @code{double}.
++
+ @item -Wformat
+ @opindex Wformat
+ @opindex Wno-format
+
+=== added file 'gcc/testsuite/g++.dg/warn/Wdouble-promotion.C'
+--- old/gcc/testsuite/g++.dg/warn/Wdouble-promotion.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/warn/Wdouble-promotion.C	2010-09-07 15:47:57 +0000
+@@ -0,0 +1,99 @@
++/* { dg-do compile } */
++/* { dg-options "-Wdouble-promotion" } */
++
++#include <stddef.h>
++
++/* Some targets do not provide <complex.h> so we define I ourselves.  */
++#define I 1.0iF
++#define ID ((_Complex double)I)
++
++float f;
++double d;
++int i;
++long double ld;
++_Complex float cf;
++_Complex double cd;
++_Complex long double cld;
++size_t s;
++
++extern void varargs_fn (int, ...);
++extern void double_fn (double);
++extern float float_fn (void);
++
++void 
++usual_arithmetic_conversions(void) 
++{
++  float local_f;
++  _Complex float local_cf;
++
++  /* Values of type "float" are implicitly converted to "double" or
++     "long double" due to use in arithmetic with "double" or "long
++     double" operands.  */
++  local_f = f + 1.0;         /* { dg-warning "implicit" } */
++  local_f = f - d;           /* { dg-warning "implicit" } */
++  local_f = 1.0f * 1.0;      /* { dg-warning "implicit" } */
++  local_f = 1.0f / d;        /* { dg-warning "implicit" } */
++
++  local_cf = cf + 1.0;       /* { dg-warning "implicit" } */
++  local_cf = cf - d;         /* { dg-warning "implicit" } */
++  local_cf = cf + 1.0 * ID;  /* { dg-warning "implicit" } */
++  local_cf = cf - cd;        /* { dg-warning "implicit" } */
++  
++  local_f = i ? f : d;       /* { dg-warning "implicit" } */
++  i = f == d;                /* { dg-warning "implicit" } */
++  i = d != f;                /* { dg-warning "implicit" } */
++}
++
++void 
++default_argument_promotion (void) 
++{
++  /* Because "f" is part of the variable argument list, it is promoted
++     to "double".  */
++  varargs_fn (1, f);   /* { dg-warning "implicit" } */
++}
++
++/* There is no warning when an explicit cast is used to perform the
++   conversion.  */
++
++void
++casts (void) 
++{
++  float local_f;
++  _Complex float local_cf;
++
++  local_f = (double)f + 1.0;                 /* { dg-bogus "implicit" } */
++  local_f = (double)f - d;                   /* { dg-bogus "implicit" } */
++  local_f = (double)1.0f + 1.0;              /* { dg-bogus "implicit" } */
++  local_f = (double)1.0f - d;                /* { dg-bogus "implicit" } */
++
++  local_cf = (_Complex double)cf + 1.0;      /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf - d;        /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf + 1.0 * ID; /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf - cd;       /* { dg-bogus "implicit" } */
++
++  local_f = i ? (double)f : d;               /* { dg-bogus "implicit" } */
++  i = (double)f == d;                        /* { dg-bogus "implicit" } */
++  i = d != (double)f;                        /* { dg-bogus "implicit" } */
++}
++
++/* There is no warning on conversions that occur in assignment (and
++   assignment-like) contexts.  */
++
++void 
++assignments (void)
++{
++  d = f;           /* { dg-bogus "implicit" } */
++  double_fn (f);   /* { dg-bogus "implicit" } */
++  d = float_fn (); /* { dg-bogus "implicit" } */
++}
++
++/* There is no warning in non-evaluated contexts.  */
++
++void
++non_evaluated (void)
++{
++  s = sizeof (f + 1.0);             /* { dg-bogus "implicit" } */
++  s = __alignof__ (f + 1.0);        /* { dg-bogus "implicit" } */
++  d = (__typeof__(f + 1.0))f;       /* { dg-bogus "implicit" } */
++  s = sizeof (i ? f : d);           /* { dg-bogus "implicit" } */
++}
+
+=== added file 'gcc/testsuite/gcc.dg/Wdouble-promotion.c'
+--- old/gcc/testsuite/gcc.dg/Wdouble-promotion.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/Wdouble-promotion.c	2010-09-07 15:47:57 +0000
+@@ -0,0 +1,104 @@
++/* { dg-do compile } */
++/* { dg-options "-Wdouble-promotion" } */
++
++#include <stddef.h>
++
++/* Some targets do not provide <complex.h> so we define I ourselves.  */
++#define I 1.0iF
++#define ID ((_Complex double)I)
++
++float f;
++double d;
++int i;
++long double ld;
++_Complex float cf;
++_Complex double cd;
++_Complex long double cld;
++size_t s;
++
++extern void unprototyped_fn ();
++extern void varargs_fn (int, ...);
++extern void double_fn (double);
++extern float float_fn (void);
++
++void 
++usual_arithmetic_conversions(void) 
++{
++  float local_f;
++  _Complex float local_cf;
++
++  /* Values of type "float" are implicitly converted to "double" or
++     "long double" due to use in arithmetic with "double" or "long
++     double" operands.  */
++  local_f = f + 1.0;         /* { dg-warning "implicit" } */
++  local_f = f - d;           /* { dg-warning "implicit" } */
++  local_f = 1.0f * 1.0;      /* { dg-warning "implicit" } */
++  local_f = 1.0f / d;        /* { dg-warning "implicit" } */
++
++  local_cf = cf + 1.0;       /* { dg-warning "implicit" } */
++  local_cf = cf - d;         /* { dg-warning "implicit" } */
++  local_cf = cf + 1.0 * ID;  /* { dg-warning "implicit" } */
++  local_cf = cf - cd;        /* { dg-warning "implicit" } */
++  
++  local_f = i ? f : d;       /* { dg-warning "implicit" } */
++  i = f == d;                /* { dg-warning "implicit" } */
++  i = d != f;                /* { dg-warning "implicit" } */
++}
++
++void 
++default_argument_promotion (void) 
++{
++  /* Because there is no prototype, "f" is promoted to "double".  */
++  unprototyped_fn (f); /* { dg-warning "implicit" } */
++  undeclared_fn (f);   /* { dg-warning "implicit" } */
++  /* Because "f" is part of the variable argument list, it is promoted
++     to "double".  */
++  varargs_fn (1, f);   /* { dg-warning "implicit" } */
++}
++
++/* There is no warning when an explicit cast is used to perform the
++   conversion.  */
++
++void
++casts (void) 
++{
++  float local_f;
++  _Complex float local_cf;
++
++  local_f = (double)f + 1.0;                 /* { dg-bogus "implicit" } */
++  local_f = (double)f - d;                   /* { dg-bogus "implicit" } */
++  local_f = (double)1.0f + 1.0;              /* { dg-bogus "implicit" } */
++  local_f = (double)1.0f - d;                /* { dg-bogus "implicit" } */
++
++  local_cf = (_Complex double)cf + 1.0;      /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf - d;        /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf + 1.0 * ID; /* { dg-bogus "implicit" } */
++  local_cf = (_Complex double)cf - cd;       /* { dg-bogus "implicit" } */
++
++  local_f = i ? (double)f : d;               /* { dg-bogus "implicit" } */
++  i = (double)f == d;                        /* { dg-bogus "implicit" } */
++  i = d != (double)f;                        /* { dg-bogus "implicit" } */
++}
++
++/* There is no warning on conversions that occur in assignment (and
++   assignment-like) contexts.  */
++
++void 
++assignments (void)
++{
++  d = f;           /* { dg-bogus "implicit" } */
++  double_fn (f);   /* { dg-bogus "implicit" } */
++  d = float_fn (); /* { dg-bogus "implicit" } */
++}
++
++/* There is no warning in non-evaluated contexts.  */
++
++void
++non_evaluated (void)
++{
++  s = sizeof (f + 1.0);             /* { dg-bogus "implicit" } */
++  s = __alignof__ (f + 1.0);        /* { dg-bogus "implicit" } */
++  d = (__typeof__(f + 1.0))f;       /* { dg-bogus "implicit" } */
++  s = sizeof (i ? f : d);           /* { dg-bogus "implicit" } */
++  s = sizeof (unprototyped_fn (f)); /* { dg-bogus "implicit" } */
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99383.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99383.patch
new file mode 100644
index 0000000000..82a9e93e43
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99383.patch
@@ -0,0 +1,369 @@
+2010-09-09  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-08-25  Tejas Belagod  <tejas.belagod@arm.com>
+	* config/arm/iterators.md (VU, SE, V_widen_l): New.
+	(V_unpack, US): New.
+	* config/arm/neon.md (vec_unpack<US>_hi_<mode>): Expansion for
+	vmovl.
+	(vec_unpack<US>_lo_<mode>): Likewise.
+	(neon_vec_unpack<US>_hi_<mode>): Instruction pattern for vmovl.
+	(neon_vec_unpack<US>_lo_<mode>): Likewise.
+	(vec_widen_<US>mult_lo_<mode>): Expansion for vmull.
+	(vec_widen_<US>mult_hi_<mode>): Likewise.
+	(neon_vec_<US>mult_lo_<mode>"): Instruction pattern for vmull.
+	(neon_vec_<US>mult_hi_<mode>"): Likewise.
+	(neon_unpack<US>_<mode>): Widening move intermediate step for
+	vectorizing without -mvectorize-with-neon-quad.
+	(neon_vec_<US>mult_<mode>): Widening multiply intermediate step
+	for vectorizing without -mvectorize-with-neon-quad.
+	* config/arm/predicates.md (vect_par_constant_high): Check for
+	high-half lanes of a vector.
+	(vect_par_constant_low): Check for low-half lanes of a vector.
+
+	2010-08-25  Tejas Belagod  <tejas.belagod@arm.com>
+	* lib/target-supports.exp (check_effective_target_vect_unpack):
+	Set vect_unpack supported flag to true for neon.
+
+ 2010-09-07  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Backport from gcc-patches:
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-01 13:29:58 +0000
++++ new/gcc/config/arm/arm.md	2010-09-09 14:11:34 +0000
+@@ -868,6 +868,9 @@
+ (define_code_attr cnb [(ltu "CC_C") (geu "CC")])
+ (define_code_attr optab [(ltu "ltu") (geu "geu")])
+ 
++;; Assembler mnemonics for signedness of widening operations.
++(define_code_attr US [(sign_extend "s") (zero_extend "u")])
++
+ (define_insn "*addsi3_carryin_<optab>"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+ 	(plus:SI (plus:SI (match_operand:SI 1 "s_register_operand" "%r")
+
+=== modified file 'gcc/config/arm/neon.md'
+--- old/gcc/config/arm/neon.md	2010-08-23 14:29:45 +0000
++++ new/gcc/config/arm/neon.md	2010-09-09 14:11:34 +0000
+@@ -235,6 +235,9 @@
+ ;; Modes with 32-bit elements only.
+ (define_mode_iterator V32 [V2SI V2SF V4SI V4SF])
+ 
++;; Modes with 8-bit, 16-bit and 32-bit elements.
++(define_mode_iterator VU [V16QI V8HI V4SI])
++ 
+ ;; (Opposite) mode to convert to/from for above conversions.
+ (define_mode_attr V_CVTTO [(V2SI "V2SF") (V2SF "V2SI")
+ 			   (V4SI "V4SF") (V4SF "V4SI")])
+@@ -388,6 +391,9 @@
+ ;; Same, without unsigned variants (for use with *SFmode pattern).
+ (define_code_iterator vqhs_ops [plus smin smax])
+ 
++;; A list of widening operators
++(define_code_iterator SE [sign_extend zero_extend])
++
+ ;; Assembler mnemonics for above codes.
+ (define_code_attr VQH_mnem [(plus "vadd") (smin "vmin") (smax "vmax")
+ 			    (umin "vmin") (umax "vmax")])
+@@ -443,6 +449,12 @@
+                                  (V2SF "2") (V4SF "4")
+                                  (DI "1")   (V2DI "2")])
+ 
++;; Same as V_widen, but lower-case.
++(define_mode_attr V_widen_l [(V8QI "v8hi") (V4HI "v4si") ( V2SI "v2di")])
++
++;; Widen. Result is half the number of elements, but widened to double-width.
++(define_mode_attr V_unpack   [(V16QI "V8HI") (V8HI "V4SI") (V4SI "V2DI")])
++
+ (define_insn "*neon_mov<mode>"
+   [(set (match_operand:VD 0 "nonimmediate_operand"
+ 	  "=w,Uv,w, w,  ?r,?w,?r,?r, ?Us")
+@@ -5540,3 +5552,205 @@
+   emit_insn (gen_orn<mode>3_neon (operands[0], operands[1], operands[2]));
+   DONE;
+ })
++
++(define_insn "neon_vec_unpack<US>_lo_<mode>"
++  [(set (match_operand:<V_unpack> 0 "register_operand" "=w")
++        (SE:<V_unpack> (vec_select:<V_HALF>
++			  (match_operand:VU 1 "register_operand" "w")
++			  (match_operand:VU 2 "vect_par_constant_low" ""))))]
++  "TARGET_NEON"
++  "vmovl.<US><V_sz_elem> %q0, %e1"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_insn "neon_vec_unpack<US>_hi_<mode>"
++  [(set (match_operand:<V_unpack> 0 "register_operand" "=w")
++        (SE:<V_unpack> (vec_select:<V_HALF>
++			  (match_operand:VU 1 "register_operand" "w")
++			  (match_operand:VU 2 "vect_par_constant_high" ""))))]
++  "TARGET_NEON"
++  "vmovl.<US><V_sz_elem> %q0, %f1"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_expand "vec_unpack<US>_hi_<mode>"
++  [(match_operand:<V_unpack> 0 "register_operand" "")
++   (SE:<V_unpack> (match_operand:VU 1 "register_operand"))]
++ "TARGET_NEON"
++  {
++   rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
++   rtx t1;
++   int i;
++   for (i = 0; i < (<V_mode_nunits>/2); i++)
++     RTVEC_ELT (v, i) = GEN_INT ((<V_mode_nunits>/2) + i);
++  
++   t1 = gen_rtx_PARALLEL (<MODE>mode, v);
++   emit_insn (gen_neon_vec_unpack<US>_hi_<mode> (operands[0], 
++                                                 operands[1], 
++					         t1));
++   DONE;
++  }
++)
++
++(define_expand "vec_unpack<US>_lo_<mode>"
++  [(match_operand:<V_unpack> 0 "register_operand" "")
++   (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))]
++ "TARGET_NEON"
++  {
++   rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
++   rtx t1;
++   int i;
++   for (i = 0; i < (<V_mode_nunits>/2) ; i++)
++     RTVEC_ELT (v, i) = GEN_INT (i);
++   t1 = gen_rtx_PARALLEL (<MODE>mode, v);
++   emit_insn (gen_neon_vec_unpack<US>_lo_<mode> (operands[0], 
++                                                 operands[1], 
++				   	         t1));
++   DONE;
++  }
++)
++
++(define_insn "neon_vec_<US>mult_lo_<mode>"
++ [(set (match_operand:<V_unpack> 0 "register_operand" "=w")
++       (mult:<V_unpack> (SE:<V_unpack> (vec_select:<V_HALF>
++			   (match_operand:VU 1 "register_operand" "w") 
++                           (match_operand:VU 2 "vect_par_constant_low" "")))
++ 		        (SE:<V_unpack> (vec_select:<V_HALF>
++                           (match_operand:VU 3 "register_operand" "w") 
++                           (match_dup 2)))))]
++  "TARGET_NEON"
++  "vmull.<US><V_sz_elem> %q0, %e1, %e3"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_expand "vec_widen_<US>mult_lo_<mode>"
++  [(match_operand:<V_unpack> 0 "register_operand" "")
++   (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
++   (SE:<V_unpack> (match_operand:VU 2 "register_operand" ""))]
++ "TARGET_NEON"
++ {
++   rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
++   rtx t1;
++   int i;
++   for (i = 0; i < (<V_mode_nunits>/2) ; i++)
++     RTVEC_ELT (v, i) = GEN_INT (i);
++   t1 = gen_rtx_PARALLEL (<MODE>mode, v);
++
++   emit_insn (gen_neon_vec_<US>mult_lo_<mode> (operands[0],
++ 					       operands[1],
++					       t1,
++					       operands[2]));
++   DONE;
++ }
++)
++
++(define_insn "neon_vec_<US>mult_hi_<mode>"
++ [(set (match_operand:<V_unpack> 0 "register_operand" "=w")
++      (mult:<V_unpack> (SE:<V_unpack> (vec_select:<V_HALF>
++			    (match_operand:VU 1 "register_operand" "w") 
++			    (match_operand:VU 2 "vect_par_constant_high" "")))
++		       (SE:<V_unpack> (vec_select:<V_HALF>
++			    (match_operand:VU 3 "register_operand" "w") 
++			    (match_dup 2)))))]
++  "TARGET_NEON"
++  "vmull.<US><V_sz_elem> %q0, %f1, %f3"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_expand "vec_widen_<US>mult_hi_<mode>"
++  [(match_operand:<V_unpack> 0 "register_operand" "")
++   (SE:<V_unpack> (match_operand:VU 1 "register_operand" ""))
++   (SE:<V_unpack> (match_operand:VU 2 "register_operand" ""))]
++ "TARGET_NEON"
++ {
++   rtvec v = rtvec_alloc (<V_mode_nunits>/2)  ;
++   rtx t1;
++   int i;
++   for (i = 0; i < (<V_mode_nunits>/2) ; i++)
++     RTVEC_ELT (v, i) = GEN_INT (<V_mode_nunits>/2 + i);
++   t1 = gen_rtx_PARALLEL (<MODE>mode, v);
++
++   emit_insn (gen_neon_vec_<US>mult_hi_<mode> (operands[0],
++ 					       operands[1],
++					       t1,
++					       operands[2]));
++   DONE;
++
++ }
++)
++
++;; Vectorize for non-neon-quad case
++(define_insn "neon_unpack<US>_<mode>"
++ [(set (match_operand:<V_widen> 0 "register_operand" "=w")
++       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "")))]
++ "TARGET_NEON"
++ "vmovl.<US><V_sz_elem> %q0, %1"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_expand "vec_unpack<US>_lo_<mode>"
++ [(match_operand:<V_double_width> 0 "register_operand" "")
++  (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
++ "TARGET_NEON"
++{
++  rtx tmpreg = gen_reg_rtx (<V_widen>mode);
++  emit_insn (gen_neon_unpack<US>_<mode> (tmpreg, operands[1]));
++  emit_insn (gen_neon_vget_low<V_widen_l> (operands[0], tmpreg));
++
++  DONE;
++}
++)
++
++(define_expand "vec_unpack<US>_hi_<mode>"
++ [(match_operand:<V_double_width> 0 "register_operand" "")
++  (SE:<V_double_width>(match_operand:VDI 1 "register_operand"))]
++ "TARGET_NEON"
++{
++  rtx tmpreg = gen_reg_rtx (<V_widen>mode);
++  emit_insn (gen_neon_unpack<US>_<mode> (tmpreg, operands[1]));
++  emit_insn (gen_neon_vget_high<V_widen_l> (operands[0], tmpreg));
++
++  DONE;
++}
++)
++
++(define_insn "neon_vec_<US>mult_<mode>"
++ [(set (match_operand:<V_widen> 0 "register_operand" "=w")
++       (mult:<V_widen> (SE:<V_widen> 
++		 	   (match_operand:VDI 1 "register_operand" "w"))
++ 		       (SE:<V_widen> 
++			   (match_operand:VDI 2 "register_operand" "w"))))]
++  "TARGET_NEON"
++  "vmull.<US><V_sz_elem> %q0, %1, %2"
++  [(set_attr "neon_type" "neon_shift_1")]
++)
++
++(define_expand "vec_widen_<US>mult_hi_<mode>"
++  [(match_operand:<V_double_width> 0 "register_operand" "")
++   (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
++   (SE:<V_double_width> (match_operand:VDI 2 "register_operand" ""))]
++ "TARGET_NEON"
++ {
++   rtx tmpreg = gen_reg_rtx (<V_widen>mode);
++   emit_insn (gen_neon_vec_<US>mult_<mode> (tmpreg, operands[1], operands[2]));
++   emit_insn (gen_neon_vget_high<V_widen_l> (operands[0], tmpreg));
++ 					    
++   DONE;
++
++ }
++)
++
++(define_expand "vec_widen_<US>mult_lo_<mode>"
++  [(match_operand:<V_double_width> 0 "register_operand" "")
++   (SE:<V_double_width> (match_operand:VDI 1 "register_operand" ""))
++   (SE:<V_double_width> (match_operand:VDI 2 "register_operand" ""))]
++ "TARGET_NEON"
++ {
++   rtx tmpreg = gen_reg_rtx (<V_widen>mode);
++   emit_insn (gen_neon_vec_<US>mult_<mode> (tmpreg, operands[1], operands[2]));
++   emit_insn (gen_neon_vget_low<V_widen_l> (operands[0], tmpreg));
++ 					    
++   DONE;
++
++ }
++)
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-08-31 10:00:27 +0000
++++ new/gcc/config/arm/predicates.md	2010-09-09 14:11:34 +0000
+@@ -573,3 +573,61 @@
+ 		(and (match_test "TARGET_32BIT")
+ 		     (match_operand 0 "arm_di_operand"))))
+ 
++;; Predicates for parallel expanders based on mode.
++(define_special_predicate "vect_par_constant_high" 
++  (match_code "parallel")
++{
++  HOST_WIDE_INT count = XVECLEN (op, 0);
++  int i;
++  int base = GET_MODE_NUNITS (mode);
++
++  if ((count < 1)
++      || (count != base/2))
++    return false;
++    
++  if (!VECTOR_MODE_P (mode))
++    return false;
++
++  for (i = 0; i < count; i++)
++   {
++     rtx elt = XVECEXP (op, 0, i);
++     int val;
++
++     if (GET_CODE (elt) != CONST_INT)
++       return false;
++
++     val = INTVAL (elt);
++     if (val != (base/2) + i)
++       return false;
++   }
++  return true; 
++})
++
++(define_special_predicate "vect_par_constant_low"
++  (match_code "parallel")
++{
++  HOST_WIDE_INT count = XVECLEN (op, 0);
++  int i;
++  int base = GET_MODE_NUNITS (mode);
++
++  if ((count < 1)
++      || (count != base/2))
++    return false;
++    
++  if (!VECTOR_MODE_P (mode))
++    return false;
++
++  for (i = 0; i < count; i++)
++   {
++     rtx elt = XVECEXP (op, 0, i);
++     int val;
++
++     if (GET_CODE (elt) != CONST_INT)
++       return false;
++
++     val = INTVAL (elt);
++     if (val != i)
++       return false;
++   } 
++  return true; 
++})
+
+=== modified file 'gcc/testsuite/lib/target-supports.exp'
+--- old/gcc/testsuite/lib/target-supports.exp	2010-08-24 13:00:03 +0000
++++ new/gcc/testsuite/lib/target-supports.exp	2010-09-09 14:11:34 +0000
+@@ -2519,7 +2519,8 @@
+         if { ([istarget powerpc*-*-*] && ![istarget powerpc-*paired*])
+              || [istarget i?86-*-*]
+              || [istarget x86_64-*-*] 
+-             || [istarget spu-*-*] } {
++             || [istarget spu-*-*]
++             || ([istarget arm*-*-*] && [check_effective_target_arm_neon]) } {
+             set et_vect_unpack_saved 1
+         }
+     }
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99384.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99384.patch
new file mode 100644
index 0000000000..89c04a8949
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99384.patch
@@ -0,0 +1,1202 @@
+	2010-08-18  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+	* config/arm/arm-protos.h (arm_expand_sync): New.
+	(arm_output_memory_barrier, arm_output_sync_insn): New.
+	(arm_sync_loop_insns): New.
+	* config/arm/arm.c (FL_ARCH7): New.
+	(FL_FOR_ARCH7): Include FL_ARCH7.
+	(arm_arch7): New.
+	(arm_print_operand): Support %C markup.
+	(arm_legitimize_sync_memory): New.
+	(arm_emit, arm_insn_count, arm_count, arm_output_asm_insn): New.
+	(arm_process_output_memory_barrier, arm_output_memory_barrier): New.
+	(arm_ldrex_suffix, arm_output_ldrex, arm_output_strex): New.
+	(arm_output_op2, arm_output_op3, arm_output_sync_loop): New.
+	(arm_get_sync_operand, FETCH_SYNC_OPERAND): New.
+	(arm_process_output_sync_insn, arm_output_sync_insn): New.
+	(arm_sync_loop_insns,arm_call_generator, arm_expand_sync): New.
+	* config/arm/arm.h (struct arm_sync_generator): New.
+	(TARGET_HAVE_DMB, TARGET_HAVE_DMB_MCR): New.
+	(TARGET_HAVE_MEMORY_BARRIER): New.
+	(TARGET_HAVE_LDREX, TARGET_HAVE_LDREXBHD): New.
+	* config/arm/arm.md: Include sync.md.
+	(UNSPEC_MEMORY_BARRIER): New.
+	(VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK): New.
+	(VUNSPEC_SYNC_OP):New.
+	(VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): New.
+	(sync_result, sync_memory, sync_required_value): New attributes.
+	(sync_new_value, sync_t1, sync_t2): Likewise.
+	(sync_release_barrier, sync_op): Likewise.
+	(length): Add logic to length attribute defintion to call
+	arm_sync_loop_insns when appropriate.
+	* config/arm/sync.md: New file.
+
+2010-09-09  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from mainline:
+
+ 	2010-08-25  Tejas Belagod  <tejas.belagod@arm.com>
+ 	* config/arm/iterators.md (VU, SE, V_widen_l): New.
+ 	(V_unpack, US): New.
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+--- old/gcc/config/arm/arm-protos.h	2010-08-24 13:15:54 +0000
++++ new/gcc/config/arm/arm-protos.h	2010-09-09 15:03:00 +0000
+@@ -148,6 +148,11 @@
+ extern void arm_set_return_address (rtx, rtx);
+ extern int arm_eliminable_register (rtx);
+ extern const char *arm_output_shift(rtx *, int);
++extern void arm_expand_sync (enum machine_mode, struct arm_sync_generator *,
++ 			     rtx, rtx, rtx, rtx);
++extern const char *arm_output_memory_barrier (rtx *);
++extern const char *arm_output_sync_insn (rtx, rtx *);
++extern unsigned int arm_sync_loop_insns (rtx , rtx *);
+ 
+ extern bool arm_output_addr_const_extra (FILE *, rtx);
+ 
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-09-01 13:29:58 +0000
++++ new/gcc/config/arm/arm.c	2010-09-09 15:03:00 +0000
+@@ -605,6 +605,7 @@
+ #define FL_NEON       (1 << 20)       /* Neon instructions.  */
+ #define FL_ARCH7EM    (1 << 21)	      /* Instructions present in the ARMv7E-M
+ 					 architecture.  */
++#define FL_ARCH7      (1 << 22)       /* Architecture 7.  */
+ 
+ #define FL_IWMMXT     (1 << 29)	      /* XScale v2 or "Intel Wireless MMX technology".  */
+ 
+@@ -625,7 +626,7 @@
+ #define FL_FOR_ARCH6ZK	FL_FOR_ARCH6K
+ #define FL_FOR_ARCH6T2	(FL_FOR_ARCH6 | FL_THUMB2)
+ #define FL_FOR_ARCH6M	(FL_FOR_ARCH6 & ~FL_NOTM)
+-#define FL_FOR_ARCH7	(FL_FOR_ARCH6T2 &~ FL_NOTM)
++#define FL_FOR_ARCH7	((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
+ #define FL_FOR_ARCH7A	(FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
+ #define FL_FOR_ARCH7R	(FL_FOR_ARCH7A | FL_DIV)
+ #define FL_FOR_ARCH7M	(FL_FOR_ARCH7 | FL_DIV)
+@@ -663,6 +664,9 @@
+ /* Nonzero if this chip supports the ARM 6K extensions.  */
+ int arm_arch6k = 0;
+ 
++/* Nonzero if this chip supports the ARM 7 extensions.  */
++int arm_arch7 = 0;
++
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ int arm_arch_notm = 0;
+ 
+@@ -1634,6 +1638,7 @@
+   arm_arch6 = (insn_flags & FL_ARCH6) != 0;
+   arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+   arm_arch_notm = (insn_flags & FL_NOTM) != 0;
++  arm_arch7 = (insn_flags & FL_ARCH7) != 0;
+   arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
+   arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
+   arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
+@@ -16561,6 +16566,17 @@
+       }
+       return;
+ 
++    case 'C':
++      {
++	rtx addr;
++
++	gcc_assert (GET_CODE (x) == MEM);
++	addr = XEXP (x, 0);
++	gcc_assert (GET_CODE (addr) == REG);
++	asm_fprintf (stream, "[%r]", REGNO (addr));
++      }
++      return;
++
+     /* Translate an S register number into a D register number and element index.  */
+     case 'y':
+       {
+@@ -22763,4 +22779,372 @@
+ 						      is_packed);
+ }
+ 
++/* Legitimize a memory reference for sync primitive implemented using
++   ldrex / strex.  We currently force the form of the reference to be
++   indirect without offset.  We do not yet support the indirect offset
++   addressing supported by some ARM targets for these
++   instructions.  */
++static rtx
++arm_legitimize_sync_memory (rtx memory)
++{
++  rtx addr = force_reg (Pmode, XEXP (memory, 0));
++  rtx legitimate_memory = gen_rtx_MEM (GET_MODE (memory), addr);
++
++  set_mem_alias_set (legitimate_memory, ALIAS_SET_MEMORY_BARRIER);
++  MEM_VOLATILE_P (legitimate_memory) = MEM_VOLATILE_P (memory);
++  return legitimate_memory;
++}
++
++/* An instruction emitter. */
++typedef void (* emit_f) (int label, const char *, rtx *);
++
++/* An instruction emitter that emits via the conventional
++   output_asm_insn.  */
++static void
++arm_emit (int label ATTRIBUTE_UNUSED, const char *pattern, rtx *operands)
++{
++  output_asm_insn (pattern, operands);
++}
++
++/* Count the number of emitted synchronization instructions.  */
++static unsigned arm_insn_count;
++
++/* An emitter that counts emitted instructions but does not actually
++   emit instruction into the the instruction stream.  */
++static void
++arm_count (int label,
++	   const char *pattern ATTRIBUTE_UNUSED,
++	   rtx *operands ATTRIBUTE_UNUSED)
++{
++  if (! label)
++    ++ arm_insn_count;
++}
++
++/* Construct a pattern using conventional output formatting and feed
++   it to output_asm_insn.  Provides a mechanism to construct the
++   output pattern on the fly.  Note the hard limit on the pattern
++   buffer size.  */
++static void
++arm_output_asm_insn (emit_f emit, int label, rtx *operands,
++		     const char *pattern, ...)
++{
++  va_list ap;
++  char buffer[256];
++
++  va_start (ap, pattern);
++  vsprintf (buffer, pattern, ap);
++  va_end (ap);
++  emit (label, buffer, operands);
++}
++
++/* Emit the memory barrier instruction, if any, provided by this
++   target to a specified emitter.  */
++static void
++arm_process_output_memory_barrier (emit_f emit, rtx *operands)
++{
++  if (TARGET_HAVE_DMB)
++    {
++      /* Note we issue a system level barrier. We should consider
++         issuing a inner shareabilty zone barrier here instead, ie.
++         "DMB ISH".  */
++      emit (0, "dmb\tsy", operands);
++      return;
++    }
++
++  if (TARGET_HAVE_DMB_MCR)
++    {
++      emit (0, "mcr\tp15, 0, r0, c7, c10, 5", operands);
++      return;
++    }
++
++  gcc_unreachable ();
++}
++
++/* Emit the memory barrier instruction, if any, provided by this
++   target.  */
++const char *
++arm_output_memory_barrier (rtx *operands)
++{
++  arm_process_output_memory_barrier (arm_emit, operands);
++  return "";
++}
++
++/* Helper to figure out the instruction suffix required on ldrex/strex
++   for operations on an object of the specified mode.  */
++static const char *
++arm_ldrex_suffix (enum machine_mode mode)
++{
++  switch (mode)
++    {
++    case QImode: return "b";
++    case HImode: return "h";
++    case SImode: return "";
++    case DImode: return "d";
++    default:
++      gcc_unreachable ();
++    }
++  return "";
++}
++
++/* Emit an ldrex{b,h,d, } instruction appropriate for the specified
++   mode.  */
++static void
++arm_output_ldrex (emit_f emit,
++		  enum machine_mode mode,
++		  rtx target,
++		  rtx memory)
++{
++  const char *suffix = arm_ldrex_suffix (mode);
++  rtx operands[2];
++
++  operands[0] = target;
++  operands[1] = memory;
++  arm_output_asm_insn (emit, 0, operands, "ldrex%s\t%%0, %%C1", suffix);
++}
++
++/* Emit a strex{b,h,d, } instruction appropriate for the specified
++   mode.  */
++static void
++arm_output_strex (emit_f emit,
++		  enum machine_mode mode,
++		  const char *cc,
++		  rtx result,
++		  rtx value,
++		  rtx memory)
++{
++  const char *suffix = arm_ldrex_suffix (mode);
++  rtx operands[3];
++
++  operands[0] = result;
++  operands[1] = value;
++  operands[2] = memory;
++  arm_output_asm_insn (emit, 0, operands, "strex%s%s\t%%0, %%1, %%C2", suffix,
++		       cc);
++}
++
++/* Helper to emit a two operand instruction.  */
++static void
++arm_output_op2 (emit_f emit, const char *mnemonic, rtx d, rtx s)
++{
++  rtx operands[2];
++
++  operands[0] = d;
++  operands[1] = s;
++  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1", mnemonic);
++}
++
++/* Helper to emit a three operand instruction.  */
++static void
++arm_output_op3 (emit_f emit, const char *mnemonic, rtx d, rtx a, rtx b)
++{
++  rtx operands[3];
++
++  operands[0] = d;
++  operands[1] = a;
++  operands[2] = b;
++  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1, %%2", mnemonic);
++}
++
++/* Emit a load store exclusive synchronization loop.
++
++   do
++     old_value = [mem]
++     if old_value != required_value
++       break;
++     t1 = sync_op (old_value, new_value)
++     [mem] = t1, t2 = [0|1]
++   while ! t2
++
++   Note:
++     t1 == t2 is not permitted
++     t1 == old_value is permitted
++
++   required_value:
++
++   RTX register or const_int representing the required old_value for
++   the modify to continue, if NULL no comparsion is performed.  */
++static void
++arm_output_sync_loop (emit_f emit,
++		      enum machine_mode mode,
++		      rtx old_value,
++		      rtx memory,
++		      rtx required_value,
++		      rtx new_value,
++		      rtx t1,
++		      rtx t2,
++		      enum attr_sync_op sync_op,
++		      int early_barrier_required)
++{
++  rtx operands[1];
++
++  gcc_assert (t1 != t2);
++
++  if (early_barrier_required)
++    arm_process_output_memory_barrier (emit, NULL);
++
++  arm_output_asm_insn (emit, 1, operands, "%sLSYT%%=:", LOCAL_LABEL_PREFIX);
++
++  arm_output_ldrex (emit, mode, old_value, memory);
++
++  if (required_value)
++    {
++      rtx operands[2];
++
++      operands[0] = old_value;
++      operands[1] = required_value;
++      arm_output_asm_insn (emit, 0, operands, "cmp\t%%0, %%1");
++      arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYB%%=", LOCAL_LABEL_PREFIX);
++    }
++
++  switch (sync_op)
++    {
++    case SYNC_OP_ADD:
++      arm_output_op3 (emit, "add", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_SUB:
++      arm_output_op3 (emit, "sub", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_IOR:
++      arm_output_op3 (emit, "orr", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_XOR:
++      arm_output_op3 (emit, "eor", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_AND:
++      arm_output_op3 (emit,"and", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_NAND:
++      arm_output_op3 (emit, "and", t1, old_value, new_value);
++      arm_output_op2 (emit, "mvn", t1, t1);
++      break;
++
++    case SYNC_OP_NONE:
++      t1 = new_value;
++      break;
++    }
++
++  arm_output_strex (emit, mode, "", t2, t1, memory);
++  operands[0] = t2;
++  arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
++  arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
++
++  arm_process_output_memory_barrier (emit, NULL);
++  arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
++}
++
++static rtx
++arm_get_sync_operand (rtx *operands, int index, rtx default_value)
++{
++  if (index > 0)
++    default_value = operands[index - 1];
++
++  return default_value;
++}
++
++#define FETCH_SYNC_OPERAND(NAME, DEFAULT) \
++  arm_get_sync_operand (operands, (int) get_attr_sync_##NAME (insn), DEFAULT);
++
++/* Extract the operands for a synchroniztion instruction from the
++   instructions attributes and emit the instruction.  */
++static void
++arm_process_output_sync_insn (emit_f emit, rtx insn, rtx *operands)
++{
++  rtx result, memory, required_value, new_value, t1, t2;
++  int early_barrier;
++  enum machine_mode mode;
++  enum attr_sync_op sync_op;
++
++  result = FETCH_SYNC_OPERAND(result, 0);
++  memory = FETCH_SYNC_OPERAND(memory, 0);
++  required_value = FETCH_SYNC_OPERAND(required_value, 0);
++  new_value = FETCH_SYNC_OPERAND(new_value, 0);
++  t1 = FETCH_SYNC_OPERAND(t1, 0);
++  t2 = FETCH_SYNC_OPERAND(t2, 0);
++  early_barrier =
++    get_attr_sync_release_barrier (insn) == SYNC_RELEASE_BARRIER_YES;
++  sync_op = get_attr_sync_op (insn);
++  mode = GET_MODE (memory);
++
++  arm_output_sync_loop (emit, mode, result, memory, required_value,
++			new_value, t1, t2, sync_op, early_barrier);
++}
++
++/* Emit a synchronization instruction loop.  */
++const char *
++arm_output_sync_insn (rtx insn, rtx *operands)
++{
++  arm_process_output_sync_insn (arm_emit, insn, operands);
++  return "";
++}
++
++/* Count the number of machine instruction that will be emitted for a
++   synchronization instruction.  Note that the emitter used does not
++   emit instructions, it just counts instructions being carefull not
++   to count labels.  */
++unsigned int
++arm_sync_loop_insns (rtx insn, rtx *operands)
++{
++  arm_insn_count = 0;
++  arm_process_output_sync_insn (arm_count, insn, operands);
++  return arm_insn_count;
++}
++
++/* Helper to call a target sync instruction generator, dealing with
++   the variation in operands required by the different generators.  */
++static rtx
++arm_call_generator (struct arm_sync_generator *generator, rtx old_value,
++  		    rtx memory, rtx required_value, rtx new_value)
++{
++  switch (generator->op)
++    {
++    case arm_sync_generator_omn:
++      gcc_assert (! required_value);
++      return generator->u.omn (old_value, memory, new_value);
++
++    case arm_sync_generator_omrn:
++      gcc_assert (required_value);
++      return generator->u.omrn (old_value, memory, required_value, new_value);
++    }
++
++  return NULL;
++}
++
++/* Expand a synchronization loop. The synchronization loop is expanded
++   as an opaque block of instructions in order to ensure that we do
++   not subsequently get extraneous memory accesses inserted within the
++   critical region. The exclusive access property of ldrex/strex is
++   only guaranteed in there are no intervening memory accesses. */
++void
++arm_expand_sync (enum machine_mode mode,
++		 struct arm_sync_generator *generator,
++		 rtx target, rtx memory, rtx required_value, rtx new_value)
++{
++  if (target == NULL)
++    target = gen_reg_rtx (mode);
++
++  memory = arm_legitimize_sync_memory (memory);
++  if (mode != SImode)
++    {
++      rtx load_temp = gen_reg_rtx (SImode);
++
++      if (required_value)
++	required_value = convert_modes (SImode, mode, required_value, true);
++
++      new_value = convert_modes (SImode, mode, new_value, true);
++      emit_insn (arm_call_generator (generator, load_temp, memory,
++				     required_value, new_value));
++      emit_move_insn (target, gen_lowpart (mode, load_temp));
++    }
++  else
++    {
++      emit_insn (arm_call_generator (generator, target, memory, required_value,
++				     new_value));
++    }
++}
++
+ #include "gt-arm.h"
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-09-01 13:29:58 +0000
++++ new/gcc/config/arm/arm.h	2010-09-09 15:03:00 +0000
+@@ -128,6 +128,24 @@
+ /* The processor for which instructions should be scheduled.  */
+ extern enum processor_type arm_tune;
+ 
++enum arm_sync_generator_tag
++  {
++    arm_sync_generator_omn,
++    arm_sync_generator_omrn
++  };
++
++/* Wrapper to pass around a polymorphic pointer to a sync instruction
++   generator and.  */
++struct arm_sync_generator
++{
++  enum arm_sync_generator_tag op;
++  union
++  {
++    rtx (* omn) (rtx, rtx, rtx);
++    rtx (* omrn) (rtx, rtx, rtx, rtx);
++  } u;
++};
++
+ typedef enum arm_cond_code
+ {
+   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC,
+@@ -272,6 +290,20 @@
+    for Thumb-2.  */
+ #define TARGET_UNIFIED_ASM TARGET_THUMB2
+ 
++/* Nonzero if this chip provides the DMB instruction.  */
++#define TARGET_HAVE_DMB		(arm_arch7)
++
++/* Nonzero if this chip implements a memory barrier via CP15.  */
++#define TARGET_HAVE_DMB_MCR	(arm_arch6k && ! TARGET_HAVE_DMB)
++
++/* Nonzero if this chip implements a memory barrier instruction.  */
++#define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)
++
++/* Nonzero if this chip supports ldrex and strex */
++#define TARGET_HAVE_LDREX	((arm_arch6 && TARGET_ARM) || arm_arch7)
++
++/* Nonzero if this chip supports ldrex{bhd} and strex{bhd}.  */
++#define TARGET_HAVE_LDREXBHD	((arm_arch6k && TARGET_ARM) || arm_arch7)
+ 
+ /* True iff the full BPABI is being used.  If TARGET_BPABI is true,
+    then TARGET_AAPCS_BASED must be true -- but the converse does not
+@@ -405,6 +437,12 @@
+ /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
+ extern int arm_arch6;
+ 
++/* Nonzero if this chip supports the ARM Architecture 6k extensions.  */
++extern int arm_arch6k;
++
++/* Nonzero if this chip supports the ARM Architecture 7 extensions.  */
++extern int arm_arch7;
++
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ extern int arm_arch_notm;
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-09 14:11:34 +0000
++++ new/gcc/config/arm/arm.md	2010-09-09 15:03:00 +0000
+@@ -103,6 +103,7 @@
+    (UNSPEC_RBIT 26)       ; rbit operation.
+    (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from
+                              ; another symbolic address.
++   (UNSPEC_MEMORY_BARRIER 28) ; Represent a memory barrier.
+   ]
+ )
+ 
+@@ -139,6 +140,11 @@
+    (VUNSPEC_ALIGN32  16) ; Used to force 32-byte alignment.
+    (VUNSPEC_EH_RETURN 20); Use to override the return address for exception
+ 			 ; handling.
++   (VUNSPEC_SYNC_COMPARE_AND_SWAP 21)	; Represent an atomic compare swap.
++   (VUNSPEC_SYNC_LOCK             22)	; Represent a sync_lock_test_and_set.
++   (VUNSPEC_SYNC_OP               23)	; Represent a sync_<op>
++   (VUNSPEC_SYNC_NEW_OP           24)	; Represent a sync_new_<op>
++   (VUNSPEC_SYNC_OLD_OP           25)	; Represent a sync_old_<op>
+   ]
+ )
+ 
+@@ -163,8 +169,21 @@
+ (define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp"
+   (const (symbol_ref "arm_fpu_attr")))
+ 
++(define_attr "sync_result"          "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_memory"          "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_required_value"  "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_new_value"       "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_t1"              "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_t2"              "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_release_barrier" "yes,no"           (const_string "yes"))
++(define_attr "sync_op"              "none,add,sub,ior,xor,and,nand"
++                                    (const_string "none"))
++
+ ; LENGTH of an instruction (in bytes)
+-(define_attr "length" "" (const_int 4))
++(define_attr "length" ""
++  (cond [(not (eq_attr "sync_memory" "none"))
++ 	   (symbol_ref "arm_sync_loop_insns (insn, operands) * 4")
++	] (const_int 4)))
+ 
+ ; POOL_RANGE is how far away from a constant pool entry that this insn
+ ; can be placed.  If the distance is zero, then this insn will never
+@@ -11530,4 +11549,5 @@
+ (include "thumb2.md")
+ ;; Neon patterns
+ (include "neon.md")
+-
++;; Synchronization Primitives
++(include "sync.md")
+
+=== added file 'gcc/config/arm/sync.md'
+--- old/gcc/config/arm/sync.md	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/sync.md	2010-09-09 15:03:00 +0000
+@@ -0,0 +1,594 @@
++;; Machine description for ARM processor synchronization primitives.
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;; Written by Marcus Shawcroft (marcus.shawcroft@arm.com)
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.  */
++
++;; ARMV6 introduced ldrex and strex instruction. These instruction
++;; access SI width data. In order to implement synchronization
++;; primitives for the narrower QI and HI modes we insert appropriate
++;; AND/OR sequences into the synchronization loop to mask out the
++;; relevant component of an SI access.
++
++(define_expand "memory_barrier"
++  [(set (match_dup 0)
++	(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
++  "TARGET_HAVE_MEMORY_BARRIER"
++{
++  operands[0] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
++  MEM_VOLATILE_P (operands[0]) = 1;
++})
++
++(define_expand "sync_compare_and_swapsi"
++  [(set (match_operand:SI 0 "s_register_operand")
++        (unspec_volatile:SI [(match_operand:SI 1 "memory_operand")
++			     (match_operand:SI 2 "s_register_operand")
++			     (match_operand:SI 3 "s_register_operand")]
++			     VUNSPEC_SYNC_COMPARE_AND_SWAP))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omrn;
++    generator.u.omrn = gen_arm_sync_compare_and_swapsi;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], operands[2],
++                     operands[3]);
++    DONE;
++  })
++
++(define_mode_iterator NARROW [QI HI])
++
++(define_expand "sync_compare_and_swap<mode>"
++  [(set (match_operand:NARROW 0 "s_register_operand")
++        (unspec_volatile:NARROW [(match_operand:NARROW 1 "memory_operand")
++			     (match_operand:NARROW 2 "s_register_operand")
++			     (match_operand:NARROW 3 "s_register_operand")]
++			     VUNSPEC_SYNC_COMPARE_AND_SWAP))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omrn;
++    generator.u.omrn = gen_arm_sync_compare_and_swap<mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1],
++                     operands[2], operands[3]);
++    DONE;
++  })
++
++(define_expand "sync_lock_test_and_setsi"
++  [(match_operand:SI 0 "s_register_operand")
++   (match_operand:SI 1 "memory_operand")
++   (match_operand:SI 2 "s_register_operand")]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_lock_test_and_setsi;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL,
++                     operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_lock_test_and_set<mode>"
++  [(match_operand:NARROW 0 "s_register_operand")
++   (match_operand:NARROW 1 "memory_operand")
++   (match_operand:NARROW 2 "s_register_operand")]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_lock_test_and_set<mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1], NULL,
++                     operands[2]);
++    DONE;
++  })
++
++(define_code_iterator syncop [plus minus ior xor and])
++
++(define_code_attr sync_optab [(ior "ior")
++			      (xor "xor")
++			      (and "and")
++			      (plus "add")
++			      (minus "sub")])
++
++(define_expand "sync_<sync_optab>si"
++  [(match_operand:SI 0 "memory_operand")
++   (match_operand:SI 1 "s_register_operand")
++   (syncop:SI (match_dup 0) (match_dup 1))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_<sync_optab>si;
++    arm_expand_sync (SImode, &generator, NULL, operands[0], NULL, operands[1]);
++    DONE;
++  })
++
++(define_expand "sync_nandsi"
++  [(match_operand:SI 0 "memory_operand")
++   (match_operand:SI 1 "s_register_operand")
++   (not:SI (and:SI (match_dup 0) (match_dup 1)))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_nandsi;
++    arm_expand_sync (SImode, &generator, NULL, operands[0], NULL, operands[1]);
++    DONE;
++  })
++
++(define_expand "sync_<sync_optab><mode>"
++  [(match_operand:NARROW 0 "memory_operand")
++   (match_operand:NARROW 1 "s_register_operand")
++   (syncop:NARROW (match_dup 0) (match_dup 1))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_<sync_optab><mode>;
++    arm_expand_sync (<MODE>mode, &generator, NULL, operands[0], NULL,
++    		     operands[1]);
++    DONE;
++  })
++
++(define_expand "sync_nand<mode>"
++  [(match_operand:NARROW 0 "memory_operand")
++   (match_operand:NARROW 1 "s_register_operand")
++   (not:NARROW (and:NARROW (match_dup 0) (match_dup 1)))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_nand<mode>;
++    arm_expand_sync (<MODE>mode, &generator, NULL, operands[0], NULL,
++                     operands[1]);
++    DONE;
++  })
++
++(define_expand "sync_new_<sync_optab>si"
++  [(match_operand:SI 0 "s_register_operand")
++   (match_operand:SI 1 "memory_operand")
++   (match_operand:SI 2 "s_register_operand")
++   (syncop:SI (match_dup 1) (match_dup 2))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_<sync_optab>si;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL,
++                     operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_new_nandsi"
++  [(match_operand:SI 0 "s_register_operand")
++   (match_operand:SI 1 "memory_operand")
++   (match_operand:SI 2 "s_register_operand")
++   (not:SI (and:SI (match_dup 1) (match_dup 2)))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_nandsi;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL,
++    		     operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_new_<sync_optab><mode>"
++  [(match_operand:NARROW 0 "s_register_operand")
++   (match_operand:NARROW 1 "memory_operand")
++   (match_operand:NARROW 2 "s_register_operand")
++   (syncop:NARROW (match_dup 1) (match_dup 2))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_<sync_optab><mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1],
++    		     NULL, operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_new_nand<mode>"
++  [(match_operand:NARROW 0 "s_register_operand")
++   (match_operand:NARROW 1 "memory_operand")
++   (match_operand:NARROW 2 "s_register_operand")
++   (not:NARROW (and:NARROW (match_dup 1) (match_dup 2)))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_new_nand<mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1],
++    		     NULL, operands[2]);
++    DONE;
++  });
++
++(define_expand "sync_old_<sync_optab>si"
++  [(match_operand:SI 0 "s_register_operand")
++   (match_operand:SI 1 "memory_operand")
++   (match_operand:SI 2 "s_register_operand")
++   (syncop:SI (match_dup 1) (match_dup 2))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_old_<sync_optab>si;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL,
++                     operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_old_nandsi"
++  [(match_operand:SI 0 "s_register_operand")
++   (match_operand:SI 1 "memory_operand")
++   (match_operand:SI 2 "s_register_operand")
++   (not:SI (and:SI (match_dup 1) (match_dup 2)))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_old_nandsi;
++    arm_expand_sync (SImode, &generator, operands[0], operands[1], NULL,
++                     operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_old_<sync_optab><mode>"
++  [(match_operand:NARROW 0 "s_register_operand")
++   (match_operand:NARROW 1 "memory_operand")
++   (match_operand:NARROW 2 "s_register_operand")
++   (syncop:NARROW (match_dup 1) (match_dup 2))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_old_<sync_optab><mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1],
++    		     NULL, operands[2]);
++    DONE;
++  })
++
++(define_expand "sync_old_nand<mode>"
++  [(match_operand:NARROW 0 "s_register_operand")
++   (match_operand:NARROW 1 "memory_operand")
++   (match_operand:NARROW 2 "s_register_operand")
++   (not:NARROW (and:NARROW (match_dup 1) (match_dup 2)))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    struct arm_sync_generator generator;
++    generator.op = arm_sync_generator_omn;
++    generator.u.omn = gen_arm_sync_old_nand<mode>;
++    arm_expand_sync (<MODE>mode, &generator, operands[0], operands[1],
++                     NULL, operands[2]);
++    DONE;
++  })
++
++(define_insn "arm_sync_compare_and_swapsi"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI
++	  [(match_operand:SI 1 "memory_operand" "+m")
++   	   (match_operand:SI 2 "s_register_operand" "r")
++	   (match_operand:SI 3 "s_register_operand" "r")]
++	  VUNSPEC_SYNC_COMPARE_AND_SWAP))
++   (set (match_dup 1) (unspec_volatile:SI [(match_dup 2)]
++                                          VUNSPEC_SYNC_COMPARE_AND_SWAP))
++   (clobber:SI (match_scratch:SI 4 "=&r"))
++   (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
++                                                VUNSPEC_SYNC_COMPARE_AND_SWAP))
++   ]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_required_value"  "2")
++   (set_attr "sync_new_value"       "3")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "4")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_compare_and_swap<mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (zero_extend:SI
++	  (unspec_volatile:NARROW
++	    [(match_operand:NARROW 1 "memory_operand" "+m")
++   	     (match_operand:SI 2 "s_register_operand" "r")
++	     (match_operand:SI 3 "s_register_operand" "r")]
++	    VUNSPEC_SYNC_COMPARE_AND_SWAP)))
++   (set (match_dup 1) (unspec_volatile:NARROW [(match_dup 2)]
++                                          VUNSPEC_SYNC_COMPARE_AND_SWAP))
++   (clobber:SI (match_scratch:SI 4 "=&r"))
++   (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
++                                                VUNSPEC_SYNC_COMPARE_AND_SWAP))
++   ]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_required_value"  "2")
++   (set_attr "sync_new_value"       "3")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "4")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_lock_test_and_setsi"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (match_operand:SI 1 "memory_operand" "+m"))
++   (set (match_dup 1)
++        (unspec_volatile:SI [(match_operand:SI 2 "s_register_operand" "r")]
++	                    VUNSPEC_SYNC_LOCK))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_release_barrier" "no")
++   (set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_lock_test_and_set<mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (zero_extend:SI (match_operand:NARROW 1 "memory_operand" "+m")))
++   (set (match_dup 1)
++        (unspec_volatile:NARROW [(match_operand:SI 2 "s_register_operand" "r")]
++	                        VUNSPEC_SYNC_LOCK))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_release_barrier" "no")
++   (set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_new_<sync_optab>si"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(syncop:SI
++                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 2 "s_register_operand" "r"))
++	                    ]
++	                    VUNSPEC_SYNC_NEW_OP))
++   (set (match_dup 1)
++        (unspec_volatile:SI [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_NEW_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "sync_op"              "<sync_optab>")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_new_nandsi"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(not:SI (and:SI
++                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 2 "s_register_operand" "r")))
++	                    ]
++	                    VUNSPEC_SYNC_NEW_OP))
++   (set (match_dup 1)
++        (unspec_volatile:SI [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_NEW_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "sync_op"              "nand")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_new_<sync_optab><mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(syncop:SI
++                               (zero_extend:SI
++			         (match_operand:NARROW 1 "memory_operand" "+m"))
++                               (match_operand:SI 2 "s_register_operand" "r"))
++	                    ]
++	                    VUNSPEC_SYNC_NEW_OP))
++   (set (match_dup 1)
++        (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)]
++	                        VUNSPEC_SYNC_NEW_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "sync_op"              "<sync_optab>")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_new_nand<mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI
++	  [(not:SI
++	     (and:SI
++               (zero_extend:SI	  
++	         (match_operand:NARROW 1 "memory_operand" "+m"))
++               (match_operand:SI 2 "s_register_operand" "r")))
++	  ] VUNSPEC_SYNC_NEW_OP))
++   (set (match_dup 1)
++        (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)]
++	                        VUNSPEC_SYNC_NEW_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "0")
++   (set_attr "sync_t2"              "3")
++   (set_attr "sync_op"              "nand")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_old_<sync_optab>si"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(syncop:SI
++                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 2 "s_register_operand" "r"))
++	                    ]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (set (match_dup 1)
++        (unspec_volatile:SI [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))
++   (clobber (match_scratch:SI 4 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "3")
++   (set_attr "sync_t2"              "4")
++   (set_attr "sync_op"              "<sync_optab>")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_old_nandsi"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(not:SI (and:SI
++                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 2 "s_register_operand" "r")))
++	                    ]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (set (match_dup 1)
++        (unspec_volatile:SI [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))
++   (clobber (match_scratch:SI 4 "=&r"))]
++  "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "3")
++   (set_attr "sync_t2"              "4")
++   (set_attr "sync_op"              "nand")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_old_<sync_optab><mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(syncop:SI
++                               (zero_extend:SI
++			         (match_operand:NARROW 1 "memory_operand" "+m"))
++                               (match_operand:SI 2 "s_register_operand" "r"))
++	                    ]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (set (match_dup 1)
++        (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))
++   (clobber (match_scratch:SI 4 "=&r"))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "3")
++   (set_attr "sync_t2"              "4")
++   (set_attr "sync_op"              "<sync_optab>")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "arm_sync_old_nand<mode>"
++  [(set (match_operand:SI 0 "s_register_operand" "=&r")
++        (unspec_volatile:SI [(not:SI (and:SI
++                               (zero_extend:SI
++			         (match_operand:NARROW 1 "memory_operand" "+m"))
++                               (match_operand:SI 2 "s_register_operand" "r")))
++	                    ]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (set (match_dup 1)
++        (unspec_volatile:NARROW [(match_dup 1) (match_dup 2)]
++	                    VUNSPEC_SYNC_OLD_OP))
++   (clobber (reg:CC CC_REGNUM))
++   (clobber (match_scratch:SI 3 "=&r"))
++   (clobber (match_scratch:SI 4 "=&r"))]
++  "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_sync_insn (insn, operands);
++  } 
++  [(set_attr "sync_result"          "0")
++   (set_attr "sync_memory"          "1")
++   (set_attr "sync_new_value"       "2")
++   (set_attr "sync_t1"              "3")
++   (set_attr "sync_t2"              "4")
++   (set_attr "sync_op"              "nand")
++   (set_attr "conds" "nocond")
++   (set_attr "predicable" "no")])
++
++(define_insn "*memory_barrier"
++  [(set (match_operand:BLK 0 "" "")
++	(unspec:BLK [(match_dup 0)] UNSPEC_MEMORY_BARRIER))]
++  "TARGET_HAVE_MEMORY_BARRIER"
++  {
++    return arm_output_memory_barrier (operands);
++  }
++  [(set_attr "length" "4")
++   (set_attr "conds" "unconditional")
++   (set_attr "predicable" "no")])
++
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99385.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99385.patch
new file mode 100644
index 0000000000..d10cf34654
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99385.patch
@@ -0,0 +1,151 @@
+	2010-09-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+	* config/arm/predicates.md (arm_sync_memory_operand): New.
+	* config/arm/sync.md (arm_sync_compare_and_swapsi): Change predicate
+	to arm_sync_memory_operand and constraint to Q.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_lock_test_and_setsi): Likewise.
+	(arm_sync_lock_test_and_set<mode>): Likewise.
+	(arm_sync_new_<sync_optab>si): Likewise.
+	(arm_sync_new_nandsi): Likewise.
+	(arm_sync_new_<sync_optab><mode>): Likewise.
+	(arm_sync_new_nand<mode>): Likewise.
+	(arm_sync_old_<sync_optab>si): Likewise.
+	(arm_sync_old_nandsi): Likewise.
+	(arm_sync_old_<sync_optab><mode>): Likewise.
+	(arm_sync_old_nand<mode>): Likewise.
+
+2010-09-09  Andrew Stubbs  <ams@codesourcery.com>
+
+ 	Backport from mainline:
+ 
+ 	2010-08-18  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-09-09 14:11:34 +0000
++++ new/gcc/config/arm/predicates.md	2010-09-09 15:18:16 +0000
+@@ -573,6 +573,11 @@
+ 		(and (match_test "TARGET_32BIT")
+ 		     (match_operand 0 "arm_di_operand"))))
+ 
++;; True if the operand is memory reference suitable for a ldrex/strex.
++(define_predicate "arm_sync_memory_operand"
++  (and (match_operand 0 "memory_operand")
++       (match_code "reg" "0")))
++
+ ;; Predicates for parallel expanders based on mode.
+ (define_special_predicate "vect_par_constant_high" 
+   (match_code "parallel")
+
+=== modified file 'gcc/config/arm/sync.md'
+--- old/gcc/config/arm/sync.md	2010-09-09 15:03:00 +0000
++++ new/gcc/config/arm/sync.md	2010-09-09 15:18:16 +0000
+@@ -280,7 +280,7 @@
+ (define_insn "arm_sync_compare_and_swapsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI
+-	  [(match_operand:SI 1 "memory_operand" "+m")
++	  [(match_operand:SI 1 "arm_sync_memory_operand" "+Q")
+    	   (match_operand:SI 2 "s_register_operand" "r")
+ 	   (match_operand:SI 3 "s_register_operand" "r")]
+ 	  VUNSPEC_SYNC_COMPARE_AND_SWAP))
+@@ -307,7 +307,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (zero_extend:SI
+ 	  (unspec_volatile:NARROW
+-	    [(match_operand:NARROW 1 "memory_operand" "+m")
++	    [(match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")
+    	     (match_operand:SI 2 "s_register_operand" "r")
+ 	     (match_operand:SI 3 "s_register_operand" "r")]
+ 	    VUNSPEC_SYNC_COMPARE_AND_SWAP)))
+@@ -332,7 +332,7 @@
+ 
+ (define_insn "arm_sync_lock_test_and_setsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+-        (match_operand:SI 1 "memory_operand" "+m"))
++        (match_operand:SI 1 "arm_sync_memory_operand" "+Q"))
+    (set (match_dup 1)
+         (unspec_volatile:SI [(match_operand:SI 2 "s_register_operand" "r")]
+ 	                    VUNSPEC_SYNC_LOCK))
+@@ -353,7 +353,7 @@
+ 
+ (define_insn "arm_sync_lock_test_and_set<mode>"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+-        (zero_extend:SI (match_operand:NARROW 1 "memory_operand" "+m")))
++        (zero_extend:SI (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")))
+    (set (match_dup 1)
+         (unspec_volatile:NARROW [(match_operand:SI 2 "s_register_operand" "r")]
+ 	                        VUNSPEC_SYNC_LOCK))
+@@ -375,7 +375,7 @@
+ (define_insn "arm_sync_new_<sync_optab>si"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(syncop:SI
+-                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
+                                (match_operand:SI 2 "s_register_operand" "r"))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_NEW_OP))
+@@ -400,7 +400,7 @@
+ (define_insn "arm_sync_new_nandsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(not:SI (and:SI
+-                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
+                                (match_operand:SI 2 "s_register_operand" "r")))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_NEW_OP))
+@@ -426,7 +426,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(syncop:SI
+                                (zero_extend:SI
+-			         (match_operand:NARROW 1 "memory_operand" "+m"))
++			         (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
+                                (match_operand:SI 2 "s_register_operand" "r"))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_NEW_OP))
+@@ -454,7 +454,7 @@
+ 	  [(not:SI
+ 	     (and:SI
+                (zero_extend:SI	  
+-	         (match_operand:NARROW 1 "memory_operand" "+m"))
++	         (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
+                (match_operand:SI 2 "s_register_operand" "r")))
+ 	  ] VUNSPEC_SYNC_NEW_OP))
+    (set (match_dup 1)
+@@ -478,7 +478,7 @@
+ (define_insn "arm_sync_old_<sync_optab>si"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(syncop:SI
+-                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
+                                (match_operand:SI 2 "s_register_operand" "r"))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_OLD_OP))
+@@ -504,7 +504,7 @@
+ (define_insn "arm_sync_old_nandsi"
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(not:SI (and:SI
+-                               (match_operand:SI 1 "memory_operand" "+m")
++                               (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
+                                (match_operand:SI 2 "s_register_operand" "r")))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_OLD_OP))
+@@ -531,7 +531,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(syncop:SI
+                                (zero_extend:SI
+-			         (match_operand:NARROW 1 "memory_operand" "+m"))
++			         (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
+                                (match_operand:SI 2 "s_register_operand" "r"))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_OLD_OP))
+@@ -558,7 +558,7 @@
+   [(set (match_operand:SI 0 "s_register_operand" "=&r")
+         (unspec_volatile:SI [(not:SI (and:SI
+                                (zero_extend:SI
+-			         (match_operand:NARROW 1 "memory_operand" "+m"))
++			         (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
+                                (match_operand:SI 2 "s_register_operand" "r")))
+ 	                    ]
+ 	                    VUNSPEC_SYNC_OLD_OP))
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch
new file mode 100644
index 0000000000..f603fcadba
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch
@@ -0,0 +1,191 @@
+2010-09-13  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from FSF:
+
+	2010-09-13  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	* config/arm/arm.md: (define_attr "conds"): Update comment.
+	* config/arm/sync.md (arm_sync_compare_and_swapsi): Change 
+	  conds attribute to clob.
+	  (arm_sync_compare_and_swapsi): Likewise.
+	  (arm_sync_compare_and_swap<mode>): Likewise.
+	  (arm_sync_lock_test_and_setsi): Likewise.
+	  (arm_sync_lock_test_and_set<mode>): Likewise.
+	  (arm_sync_new_<sync_optab>si): Likewise.
+	  (arm_sync_new_nandsi): Likewise.
+	  (arm_sync_new_<sync_optab><mode>): Likewise.
+	  (arm_sync_new_nand<mode>): Likewise.
+	  (arm_sync_old_<sync_optab>si): Likewise.
+	  (arm_sync_old_nandsi): Likewise.
+	  (arm_sync_old_<sync_optab><mode>): Likewise.
+	  (arm_sync_old_nand<mode>): Likewise.
+
+	2010-09-13  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	* gcc.target/arm/sync-1.c: New.
+
+ 2010-09-10  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-09 15:03:00 +0000
++++ new/gcc/config/arm/arm.md	2010-09-13 15:39:11 +0000
+@@ -352,10 +352,11 @@
+ ; CLOB means that the condition codes are altered in an undefined manner, if
+ ;   they are altered at all
+ ;
+-; UNCONDITIONAL means the instions can not be conditionally executed.
++; UNCONDITIONAL means the instruction can not be conditionally executed and
++;   that the instruction does not use or alter the condition codes.
+ ;
+-; NOCOND means that the condition codes are neither altered nor affect the
+-;   output of this insn
++; NOCOND means that the instruction does not use or alter the condition
++;   codes but can be converted into a conditionally exectuted instruction.
+ 
+ (define_attr "conds" "use,set,clob,unconditional,nocond"
+ 	(if_then_else (eq_attr "type" "call")
+
+=== modified file 'gcc/config/arm/sync.md'
+--- old/gcc/config/arm/sync.md	2010-09-09 15:18:16 +0000
++++ new/gcc/config/arm/sync.md	2010-09-13 15:39:11 +0000
+@@ -300,7 +300,7 @@
+    (set_attr "sync_new_value"       "3")
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "4")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_compare_and_swap<mode>"
+@@ -327,7 +327,7 @@
+    (set_attr "sync_new_value"       "3")
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "4")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_lock_test_and_setsi"
+@@ -348,7 +348,7 @@
+    (set_attr "sync_new_value"       "2")
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_lock_test_and_set<mode>"
+@@ -369,7 +369,7 @@
+    (set_attr "sync_new_value"       "2")
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_new_<sync_optab>si"
+@@ -394,7 +394,7 @@
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+    (set_attr "sync_op"              "<sync_optab>")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_new_nandsi"
+@@ -419,7 +419,7 @@
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+    (set_attr "sync_op"              "nand")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_new_<sync_optab><mode>"
+@@ -445,7 +445,7 @@
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+    (set_attr "sync_op"              "<sync_optab>")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_new_nand<mode>"
+@@ -472,7 +472,7 @@
+    (set_attr "sync_t1"              "0")
+    (set_attr "sync_t2"              "3")
+    (set_attr "sync_op"              "nand")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_old_<sync_optab>si"
+@@ -498,7 +498,7 @@
+    (set_attr "sync_t1"              "3")
+    (set_attr "sync_t2"              "4")
+    (set_attr "sync_op"              "<sync_optab>")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_old_nandsi"
+@@ -524,7 +524,7 @@
+    (set_attr "sync_t1"              "3")
+    (set_attr "sync_t2"              "4")
+    (set_attr "sync_op"              "nand")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" 		    "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_old_<sync_optab><mode>"
+@@ -551,7 +551,7 @@
+    (set_attr "sync_t1"              "3")
+    (set_attr "sync_t2"              "4")
+    (set_attr "sync_op"              "<sync_optab>")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds" 		    "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "arm_sync_old_nand<mode>"
+@@ -578,7 +578,7 @@
+    (set_attr "sync_t1"              "3")
+    (set_attr "sync_t2"              "4")
+    (set_attr "sync_op"              "nand")
+-   (set_attr "conds" "nocond")
++   (set_attr "conds"                "clob")
+    (set_attr "predicable" "no")])
+ 
+ (define_insn "*memory_barrier"
+
+=== added file 'gcc/testsuite/gcc.target/arm/sync-1.c'
+--- old/gcc/testsuite/gcc.target/arm/sync-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/sync-1.c	2010-09-13 15:39:11 +0000
+@@ -0,0 +1,25 @@
++/* { dg-do run } */
++/* { dg-options "-O2 -march=armv7-a" } */
++
++volatile int mem;
++
++int
++bar (int x, int y)
++{
++  if (x)
++    __sync_fetch_and_add(&mem, y);
++  return 0;
++}
++
++extern void abort (void);
++
++int
++main (int argc, char *argv[])
++{
++  mem = 0;
++  bar (0, 1);
++  bar (1, 1);
++  if (mem != 1)
++    abort ();
++  return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99391.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99391.patch
new file mode 100644
index 0000000000..31122e34be
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99391.patch
@@ -0,0 +1,43 @@
+2010-09-08  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	* gcc/emit-rtl.c (set_mem_attributes_minus_bitpos): Set MEM_READONLY_P
+	for static const strings.
+	* gcc/testsuite/gcc.dg/memcpy-3.c: New test.
+
+ 2010-09-13  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/emit-rtl.c'
+--- old/gcc/emit-rtl.c	2009-11-27 12:00:28 +0000
++++ new/gcc/emit-rtl.c	2010-09-15 16:40:06 +0000
+@@ -1648,6 +1648,11 @@
+ 	  MEM_READONLY_P (ref) = 1;
+ 	}
+ 
++      /* Mark static const strings readonly as well.  */
++      if (base && TREE_CODE (base) == STRING_CST && TREE_READONLY (base)
++	  && TREE_STATIC (base))
++	MEM_READONLY_P (ref) = 1;
++
+       /* If this expression uses it's parent's alias set, mark it such
+ 	 that we won't change it.  */
+       if (component_uses_parent_alias_set (t))
+
+=== added file 'gcc/testsuite/gcc.dg/memcpy-3.c'
+--- old/gcc/testsuite/gcc.dg/memcpy-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/memcpy-3.c	2010-09-15 16:40:06 +0000
+@@ -0,0 +1,11 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-expand" } */
++
++void
++f1 (char *p)
++{
++  __builtin_memcpy (p, "123", 3);
++}
++
++/* { dg-final { scan-rtl-dump-times "mem/s/u:" 3 "expand" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "expand" } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99392.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99392.patch
new file mode 100644
index 0000000000..9a9d5940c8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99392.patch
@@ -0,0 +1,33 @@
+2010-09-10  Nathan Froyd  <froydnj@codesourcery.com>
+
+	Issue #9120
+
+	* release-notes-csl.xml (Compiler optimization improvements): New
+	bullet.
+
+	gcc/
+	* gimple.c (is_gimple_min_invariant): Check for constant INDIRECT_REFs.
+
+ 2010-09-08  Tom de Vries  <tom@codesourcery.com>
+ 
+ 	gcc/
+
+=== modified file 'gcc/gimple.c'
+--- old/gcc/gimple.c	2010-06-22 17:23:11 +0000
++++ new/gcc/gimple.c	2010-09-15 16:47:52 +0000
+@@ -2591,7 +2591,13 @@
+ 
+   op = strip_invariant_refs (TREE_OPERAND (t, 0));
+ 
+-  return op && (CONSTANT_CLASS_P (op) || decl_address_invariant_p (op));
++  if (!op)
++    return false;
++
++  if (TREE_CODE (op) == INDIRECT_REF)
++    return CONSTANT_CLASS_P (TREE_OPERAND (op, 0));
++  else
++    return CONSTANT_CLASS_P (op) || decl_address_invariant_p (op);
+ }
+ 
+ /* Return true if T is a gimple invariant address at IPA level
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
new file mode 100644
index 0000000000..d8df57a448
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
@@ -0,0 +1,45 @@
+2010-09-13  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-09-12  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.md (arm_ashldi3_1bit, arm_ashrdi3_1bit,
+	arm_lshrdi3_1bit): Put earlyclobber on the right alternative.
+
+ 2010-09-10  Nathan Froyd  <froydnj@codesourcery.com>
+ 
+ 	Issue #9120
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-13 15:39:11 +0000
++++ new/gcc/config/arm/arm.md	2010-09-15 16:55:55 +0000
+@@ -3295,7 +3295,7 @@
+ )
+ 
+ (define_insn "arm_ashldi3_1bit"
+-  [(set (match_operand:DI            0 "s_register_operand" "=&r,r")
++  [(set (match_operand:DI            0 "s_register_operand" "=r,&r")
+         (ashift:DI (match_operand:DI 1 "s_register_operand" "0,r")
+                    (const_int 1)))
+    (clobber (reg:CC CC_REGNUM))]
+@@ -3354,7 +3354,7 @@
+ )
+ 
+ (define_insn "arm_ashrdi3_1bit"
+-  [(set (match_operand:DI              0 "s_register_operand" "=&r,r")
++  [(set (match_operand:DI              0 "s_register_operand" "=r,&r")
+         (ashiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
+                      (const_int 1)))
+    (clobber (reg:CC CC_REGNUM))]
+@@ -3410,7 +3410,7 @@
+ )
+ 
+ (define_insn "arm_lshrdi3_1bit"
+-  [(set (match_operand:DI              0 "s_register_operand" "=&r,r")
++  [(set (match_operand:DI              0 "s_register_operand" "=r,&r")
+         (lshiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
+                      (const_int 1)))
+    (clobber (reg:CC CC_REGNUM))]
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99395.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99395.patch
new file mode 100644
index 0000000000..809a20aae0
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99395.patch
@@ -0,0 +1,26 @@
+2010-09-15  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-09-15  Jie Zhang  <jie@codesourcery.com>
+	* config/arm/vfp.md (cmpsf_trap_vfp): Change type from
+	fcmpd to fcmps.
+
+ 2010-09-13  Chung-Lin Tang  <cltang@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/config/arm/vfp.md'
+--- old/gcc/config/arm/vfp.md	2010-08-13 15:28:31 +0000
++++ new/gcc/config/arm/vfp.md	2010-09-16 08:57:30 +0000
+@@ -1159,7 +1159,7 @@
+    fcmpes%?\\t%0, %1
+    fcmpezs%?\\t%0"
+   [(set_attr "predicable" "yes")
+-   (set_attr "type" "fcmpd")]
++   (set_attr "type" "fcmps")]
+ )
+ 
+ (define_insn "*cmpdf_vfp"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99396.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99396.patch
new file mode 100644
index 0000000000..655399ab11
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99396.patch
@@ -0,0 +1,1760 @@
+2010-09-15  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Issue #9441
+
+	Backport from mainline:
+
+	2010-06-25  Bernd Schmidt  <bernds@codesourcery.com>
+
+	With large parts from Jim Wilson:
+	PR target/43902
+
+	gcc/
+	* tree-pretty-print.c (dump_generic_node, op_code_prio): Add
+	WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR.
+	* optabs.c (optab_for_tree_code): Likewise.
+	(expand_widen_pattern_expr): Likewise.
+	* tree-ssa-math-opts.c (convert_mult_to_widen): New function, broken
+	out of execute_optimize_widening_mul.
+	(convert_plusminus_to_widen): New function.
+	(execute_optimize_widening_mul): Use the two new functions.
+	* expr.c (expand_expr_real_2): Add support for GIMPLE_TERNARY_RHS.
+	Remove code to generate widening multiply-accumulate.  Add support
+	for WIDEN_MULT_PLUS_EXPR and WIDEN_MULT_MINUS_EXPR.
+	* gimple-pretty-print.c (dump_ternary_rhs): New function.
+	(dump_gimple_assign): Call it when appropriate.
+	* tree.def (WIDEN_MULT_PLUS_EXPR, WIDEN_MULT_MINUS_EXPR): New codes.
+	* cfgexpand.c (gimple_assign_rhs_to_tree): Likewise.
+	(expand_gimple_stmt_1): Likewise.
+	(expand_debug_expr): Support WIDEN_MULT_PLUS_EXPR and
+	WIDEN_MULT_MINUS_EXPR.
+	* tree-ssa-operands.c (get_expr_operands): Likewise.
+	* tree-inline.c (estimate_operator_cost): Likewise.
+	* gimple.c (extract_ops_from_tree_1): Renamed from
+	extract_ops_from_tree.  Add new arg for a third operand; fill it.
+	(gimple_build_assign_stat): Support operations with three operands.
+	(gimple_build_assign_with_ops_stat): Likewise.
+	(gimple_assign_set_rhs_from_tree): Likewise.
+	(gimple_assign_set_rhs_with_ops_1): Renamed from
+	gimple_assign_set_rhs_with_ops.  Add new arg for a third operand.
+	(get_gimple_rhs_num_ops): Support GIMPLE_TERNARY_RHS.
+	(get_gimple_rhs_num_ops): Handle WIDEN_MULT_PLUS_EXPR and
+	WIDEN_MULT_MINUS_EXPR.
+	* gimple.h (enum gimple_rhs_class): Add GIMPLE_TERNARY_RHS.
+	(extract_ops_from_tree_1): Adjust declaration.
+	(gimple_assign_set_rhs_with_ops_1): Likewise.
+	(gimple_build_assign_with_ops): Pass NULL for last operand.
+	(gimple_build_assign_with_ops3): New macro.
+	(gimple_assign_rhs3, gimple_assign_rhs3_ptr, gimple_assign_set_rhs3,
+	gimple_assign_set_rhs_with_ops, extract_ops_from_tree): New inline
+	functions.
+	* tree-cfg.c (verify_gimple_assign_ternary): New static function.
+	(verify_gimple_assign): Call it.
+	* doc/gimple.texi (Manipulating operands): Document GIMPLE_TERNARY_RHS.
+	(Tuple specific accessors, subsection GIMPLE_ASSIGN): Document new
+	functions for dealing with three-operand statements.
+	* tree.c (commutative_ternary_tree_code): New function.
+	* tree.h (commutative_ternary_tree_code): Declare it.
+	* tree-vrp.c (gimple_assign_nonnegative_warnv_p): Return false for
+	ternary statements.
+	(gimple_assign_nonzero_warnv_p): Likewise.
+	* tree-ssa-sccvn.c (stmt_has_constants): Handle GIMPLE_TERNARY_RHS.
+	* tree-ssa-ccp.c (get_rhs_assign_op_for_ccp): New static function.
+	(ccp_fold): Use it.  Handle GIMPLE_TERNARY_RHS.
+	* tree-ssa-dom.c (enum expr_kind): Add EXPR_TERNARY.
+	(struct hashtable_expr): New member ternary in the union.
+	(initialize_hash_element): Handle GIMPLE_TERNARY_RHS.
+	(hashable_expr_equal_p): Fix indentation.  Handle EXPR_TERNARY.
+	(iterative_hash_hashable_expr): Likewise.
+	(print_expr_hash_elt): Handle EXPR_TERNARY.
+	* gimple-fold.c (fold_gimple_assign): Handle GIMPLE_TERNARY_RHS.
+	* tree-ssa-threadedge.c (fold_assignment_stmt): Remove useless break
+	statements.  Handle GIMPLE_TERNARY_RHS.
+
+	From Jim Wilson:
+	gcc/testsuite/
+	* gcc.target/mips/madd-9.c: New test.
+
+	2010-06-29  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/43902
+	gcc/
+	* config/arm/arm.md (maddsidi4, umaddsidi4): New expanders.
+	(maddhisi4): Renamed from mulhisi3addsi.  Operands renumbered.
+	(maddhidi4): Likewise.
+
+	gcc/testsuite/
+	* gcc.target/arm/wmul-1.c: Test for smlabb instead of smulbb.
+	* gcc.target/arm/wmul-3.c: New test.
+	* gcc.target/arm/wmul-4.c: New test.
+
+	2010-07-22  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	gcc/
+	* tree-ssa-math-opts.c (is_widening_mult_rhs_p): New function.
+	(is_widening_mult_p): Likewise.
+	(convert_to_widen): Use them.
+	(convert_plusminus_to_widen): Likewise.  Handle fixed-point types as
+	well as integer ones.
+
+	2010-07-31  Richard Sandiford  <rdsandiford@googlemail.com>
+
+	gcc/
+	* tree-ssa-math-opts.c (convert_plusminus_to_widen): Fix type
+	used in the call to optab_for_tree_code.  Fix the second
+	is_widening_mult_p call.  Check that both unwidened operands
+	have the same sign.
+
+ 2010-09-15  Jie Zhang  <jie@codesourcery.com>
+ 
+ 	Backport from mainline:
+
+=== modified file 'gcc/cfgexpand.c'
+--- old/gcc/cfgexpand.c	2010-09-01 13:29:58 +0000
++++ new/gcc/cfgexpand.c	2010-09-16 09:15:46 +0000
+@@ -64,7 +64,13 @@
+ 
+   grhs_class = get_gimple_rhs_class (gimple_expr_code (stmt));
+ 
+-  if (grhs_class == GIMPLE_BINARY_RHS)
++  if (grhs_class == GIMPLE_TERNARY_RHS)
++    t = build3 (gimple_assign_rhs_code (stmt),
++		TREE_TYPE (gimple_assign_lhs (stmt)),
++		gimple_assign_rhs1 (stmt),
++		gimple_assign_rhs2 (stmt),
++		gimple_assign_rhs3 (stmt));
++  else if (grhs_class == GIMPLE_BINARY_RHS)
+     t = build2 (gimple_assign_rhs_code (stmt),
+ 		TREE_TYPE (gimple_assign_lhs (stmt)),
+ 		gimple_assign_rhs1 (stmt),
+@@ -1887,6 +1893,9 @@
+ 	    ops.type = TREE_TYPE (lhs);
+ 	    switch (get_gimple_rhs_class (gimple_expr_code (stmt)))
+ 	      {
++		case GIMPLE_TERNARY_RHS:
++		  ops.op2 = gimple_assign_rhs3 (stmt);
++		  /* Fallthru */
+ 		case GIMPLE_BINARY_RHS:
+ 		  ops.op1 = gimple_assign_rhs2 (stmt);
+ 		  /* Fallthru */
+@@ -2237,6 +2246,8 @@
+ 	{
+ 	case COND_EXPR:
+ 	case DOT_PROD_EXPR:
++	case WIDEN_MULT_PLUS_EXPR:
++	case WIDEN_MULT_MINUS_EXPR:
+ 	  goto ternary;
+ 
+ 	case TRUTH_ANDIF_EXPR:
+@@ -3023,6 +3034,8 @@
+       return NULL;
+ 
+     case WIDEN_MULT_EXPR:
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
+       if (SCALAR_INT_MODE_P (GET_MODE (op0))
+ 	  && SCALAR_INT_MODE_P (mode))
+ 	{
+@@ -3035,7 +3048,13 @@
+ 	    op1 = simplify_gen_unary (ZERO_EXTEND, mode, op1, inner_mode);
+ 	  else
+ 	    op1 = simplify_gen_unary (SIGN_EXTEND, mode, op1, inner_mode);
+-	  return gen_rtx_MULT (mode, op0, op1);
++	  op0 = gen_rtx_MULT (mode, op0, op1);
++	  if (TREE_CODE (exp) == WIDEN_MULT_EXPR)
++	    return op0;
++	  else if (TREE_CODE (exp) == WIDEN_MULT_PLUS_EXPR)
++	    return gen_rtx_PLUS (mode, op0, op2);
++	  else
++	    return gen_rtx_MINUS (mode, op2, op0);
+ 	}
+       return NULL;
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-15 16:55:55 +0000
++++ new/gcc/config/arm/arm.md	2010-09-16 09:15:46 +0000
+@@ -1507,7 +1507,15 @@
+    (set_attr "predicable" "yes")]
+ )
+ 
+-;; Unnamed template to match long long multiply-accumulate (smlal)
++(define_expand "maddsidi4"
++  [(set (match_operand:DI 0 "s_register_operand" "")
++	(plus:DI
++	 (mult:DI
++	  (sign_extend:DI (match_operand:SI 1 "s_register_operand" ""))
++	  (sign_extend:DI (match_operand:SI 2 "s_register_operand" "")))
++	 (match_operand:DI 3 "s_register_operand" "")))]
++  "TARGET_32BIT && arm_arch3m"
++  "")
+ 
+ (define_insn "*mulsidi3adddi"
+   [(set (match_operand:DI 0 "s_register_operand" "=&r")
+@@ -1603,7 +1611,15 @@
+    (set_attr "predicable" "yes")]
+ )
+ 
+-;; Unnamed template to match long long unsigned multiply-accumulate (umlal)
++(define_expand "umaddsidi4"
++  [(set (match_operand:DI 0 "s_register_operand" "")
++	(plus:DI
++	 (mult:DI
++	  (zero_extend:DI (match_operand:SI 1 "s_register_operand" ""))
++	  (zero_extend:DI (match_operand:SI 2 "s_register_operand" "")))
++	 (match_operand:DI 3 "s_register_operand" "")))]
++  "TARGET_32BIT && arm_arch3m"
++  "")
+ 
+ (define_insn "*umulsidi3adddi"
+   [(set (match_operand:DI 0 "s_register_operand" "=&r")
+@@ -1771,29 +1787,29 @@
+    (set_attr "predicable" "yes")]
+ )
+ 
+-(define_insn "*mulhisi3addsi"
++(define_insn "maddhisi4"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (match_operand:SI 1 "s_register_operand" "r")
++	(plus:SI (match_operand:SI 3 "s_register_operand" "r")
+ 		 (mult:SI (sign_extend:SI
+-			   (match_operand:HI 2 "s_register_operand" "%r"))
++			   (match_operand:HI 1 "s_register_operand" "%r"))
+ 			  (sign_extend:SI
+-			   (match_operand:HI 3 "s_register_operand" "r")))))]
++			   (match_operand:HI 2 "s_register_operand" "r")))))]
+   "TARGET_DSP_MULTIPLY"
+-  "smlabb%?\\t%0, %2, %3, %1"
++  "smlabb%?\\t%0, %1, %2, %3"
+   [(set_attr "insn" "smlaxy")
+    (set_attr "predicable" "yes")]
+ )
+ 
+-(define_insn "*mulhidi3adddi"
++(define_insn "*maddhidi4"
+   [(set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(plus:DI
+-	  (match_operand:DI 1 "s_register_operand" "0")
++	  (match_operand:DI 3 "s_register_operand" "0")
+ 	  (mult:DI (sign_extend:DI
+-	 	    (match_operand:HI 2 "s_register_operand" "%r"))
++	 	    (match_operand:HI 1 "s_register_operand" "%r"))
+ 		   (sign_extend:DI
+-		    (match_operand:HI 3 "s_register_operand" "r")))))]
++		    (match_operand:HI 2 "s_register_operand" "r")))))]
+   "TARGET_DSP_MULTIPLY"
+-  "smlalbb%?\\t%Q0, %R0, %2, %3"
++  "smlalbb%?\\t%Q0, %R0, %1, %2"
+   [(set_attr "insn" "smlalxy")
+    (set_attr "predicable" "yes")])
+ 
+
+=== modified file 'gcc/doc/gimple.texi'
+--- old/gcc/doc/gimple.texi	2010-07-06 19:23:53 +0000
++++ new/gcc/doc/gimple.texi	2010-09-16 09:15:46 +0000
+@@ -554,6 +554,9 @@
+ @item @code{GIMPLE_INVALID_RHS}
+ The tree cannot be used as a GIMPLE operand.
+ 
++@item @code{GIMPLE_TERNARY_RHS}
++The tree is a valid GIMPLE ternary operation.
++
+ @item @code{GIMPLE_BINARY_RHS}
+ The tree is a valid GIMPLE binary operation.
+ 
+@@ -575,10 +578,11 @@
+ expressions should be flattened into the operand vector.
+ @end itemize
+ 
+-For tree nodes in the categories @code{GIMPLE_BINARY_RHS} and
+-@code{GIMPLE_UNARY_RHS}, they cannot be stored inside tuples directly.
+-They first need to be flattened and separated into individual
+-components.  For instance, given the GENERIC expression
++For tree nodes in the categories @code{GIMPLE_TERNARY_RHS},
++@code{GIMPLE_BINARY_RHS} and @code{GIMPLE_UNARY_RHS}, they cannot be
++stored inside tuples directly.  They first need to be flattened and
++separated into individual components.  For instance, given the GENERIC
++expression
+ 
+ @smallexample
+ a = b + c
+@@ -1082,7 +1086,16 @@
+ Return the address of the second operand on the @code{RHS} of assignment
+ statement @code{G}.
+ @end deftypefn
++
++@deftypefn {GIMPLE function} tree gimple_assign_rhs3 (gimple g)
++Return the third operand on the @code{RHS} of assignment statement @code{G}.
++@end deftypefn
+  
++@deftypefn {GIMPLE function} tree *gimple_assign_rhs3_ptr (gimple g)
++Return the address of the third operand on the @code{RHS} of assignment
++statement @code{G}.
++@end deftypefn
++
+ @deftypefn {GIMPLE function} void gimple_assign_set_lhs (gimple g, tree lhs)
+ Set @code{LHS} to be the @code{LHS} operand of assignment statement @code{G}.
+ @end deftypefn
+@@ -1092,20 +1105,16 @@
+ statement @code{G}.
+ @end deftypefn
+  
+-@deftypefn {GIMPLE function} tree gimple_assign_rhs2 (gimple g)
+-Return the second operand on the @code{RHS} of assignment statement @code{G}.
+-@end deftypefn
+- 
+-@deftypefn {GIMPLE function} tree *gimple_assign_rhs2_ptr (gimple g)
+-Return a pointer to the second operand on the @code{RHS} of assignment
+-statement @code{G}.
+-@end deftypefn
+- 
+ @deftypefn {GIMPLE function} void gimple_assign_set_rhs2 (gimple g, tree rhs)
+ Set @code{RHS} to be the second operand on the @code{RHS} of assignment
+ statement @code{G}.
+ @end deftypefn
+  
++@deftypefn {GIMPLE function} void gimple_assign_set_rhs3 (gimple g, tree rhs)
++Set @code{RHS} to be the third operand on the @code{RHS} of assignment
++statement @code{G}.
++@end deftypefn
++ 
+ @deftypefn {GIMPLE function} bool gimple_assign_cast_p (gimple s)
+ Return true if @code{S} is a type-cast assignment.
+ @end deftypefn
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-09-01 13:29:58 +0000
++++ new/gcc/expr.c	2010-09-16 09:15:46 +0000
+@@ -7225,8 +7225,6 @@
+   rtx subtarget, original_target;
+   int ignore;
+   bool reduce_bit_field;
+-  gimple subexp0_def, subexp1_def;
+-  tree top0, top1;
+   location_t loc = ops->location;
+   tree treeop0, treeop1;
+ #define REDUCE_BIT_FIELD(expr)	(reduce_bit_field			  \
+@@ -7246,7 +7244,8 @@
+      exactly those that are valid in gimple expressions that aren't
+      GIMPLE_SINGLE_RHS (or invalid).  */
+   gcc_assert (get_gimple_rhs_class (code) == GIMPLE_UNARY_RHS
+-	      || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS);
++	      || get_gimple_rhs_class (code) == GIMPLE_BINARY_RHS
++	      || get_gimple_rhs_class (code) == GIMPLE_TERNARY_RHS);
+ 
+   ignore = (target == const0_rtx
+ 	    || ((CONVERT_EXPR_CODE_P (code)
+@@ -7421,58 +7420,6 @@
+ 				    fold_convert_loc (loc, ssizetype,
+ 						      treeop1));
+     case PLUS_EXPR:
+-
+-      /* Check if this is a case for multiplication and addition.  */
+-      if ((TREE_CODE (type) == INTEGER_TYPE
+-	   || TREE_CODE (type) == FIXED_POINT_TYPE)
+-	  && (subexp0_def = get_def_for_expr (treeop0,
+-					      MULT_EXPR)))
+-	{
+-	  tree subsubexp0, subsubexp1;
+-	  gimple subsubexp0_def, subsubexp1_def;
+-	  enum tree_code this_code;
+-
+-	  this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
+-						       : FIXED_CONVERT_EXPR;
+-	  subsubexp0 = gimple_assign_rhs1 (subexp0_def);
+-	  subsubexp0_def = get_def_for_expr (subsubexp0, this_code);
+-	  subsubexp1 = gimple_assign_rhs2 (subexp0_def);
+-	  subsubexp1_def = get_def_for_expr (subsubexp1, this_code);
+-	  if (subsubexp0_def && subsubexp1_def
+-	      && (top0 = gimple_assign_rhs1 (subsubexp0_def))
+-	      && (top1 = gimple_assign_rhs1 (subsubexp1_def))
+-	      && (TYPE_PRECISION (TREE_TYPE (top0))
+-		  < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
+-	      && (TYPE_PRECISION (TREE_TYPE (top0))
+-		  == TYPE_PRECISION (TREE_TYPE (top1)))
+-	      && (TYPE_UNSIGNED (TREE_TYPE (top0))
+-		  == TYPE_UNSIGNED (TREE_TYPE (top1))))
+-	    {
+-	      tree op0type = TREE_TYPE (top0);
+-	      enum machine_mode innermode = TYPE_MODE (op0type);
+-	      bool zextend_p = TYPE_UNSIGNED (op0type);
+-	      bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
+-	      if (sat_p == 0)
+-		this_optab = zextend_p ? umadd_widen_optab : smadd_widen_optab;
+-	      else
+-		this_optab = zextend_p ? usmadd_widen_optab
+-				       : ssmadd_widen_optab;
+-	      if (mode == GET_MODE_2XWIDER_MODE (innermode)
+-		  && (optab_handler (this_optab, mode)->insn_code
+-		      != CODE_FOR_nothing))
+-		{
+-		  expand_operands (top0, top1, NULL_RTX, &op0, &op1,
+-				   EXPAND_NORMAL);
+-		  op2 = expand_expr (treeop1, subtarget,
+-				     VOIDmode, EXPAND_NORMAL);
+-		  temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
+-					    target, unsignedp);
+-		  gcc_assert (temp);
+-		  return REDUCE_BIT_FIELD (temp);
+-		}
+-	    }
+-	}
+-
+       /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
+ 	 something else, make sure we add the register to the constant and
+ 	 then to the other thing.  This case can occur during strength
+@@ -7587,57 +7534,6 @@
+       return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS, mode, op0, op1));
+ 
+     case MINUS_EXPR:
+-      /* Check if this is a case for multiplication and subtraction.  */
+-      if ((TREE_CODE (type) == INTEGER_TYPE
+-	   || TREE_CODE (type) == FIXED_POINT_TYPE)
+-	  && (subexp1_def = get_def_for_expr (treeop1,
+-					      MULT_EXPR)))
+-	{
+-	  tree subsubexp0, subsubexp1;
+-	  gimple subsubexp0_def, subsubexp1_def;
+-	  enum tree_code this_code;
+-
+-	  this_code = TREE_CODE (type) == INTEGER_TYPE ? NOP_EXPR
+-						       : FIXED_CONVERT_EXPR;
+-	  subsubexp0 = gimple_assign_rhs1 (subexp1_def);
+-	  subsubexp0_def = get_def_for_expr (subsubexp0, this_code);
+-	  subsubexp1 = gimple_assign_rhs2 (subexp1_def);
+-	  subsubexp1_def = get_def_for_expr (subsubexp1, this_code);
+-	  if (subsubexp0_def && subsubexp1_def
+-	      && (top0 = gimple_assign_rhs1 (subsubexp0_def))
+-	      && (top1 = gimple_assign_rhs1 (subsubexp1_def))
+-	      && (TYPE_PRECISION (TREE_TYPE (top0))
+-		  < TYPE_PRECISION (TREE_TYPE (subsubexp0)))
+-	      && (TYPE_PRECISION (TREE_TYPE (top0))
+-		  == TYPE_PRECISION (TREE_TYPE (top1)))
+-	      && (TYPE_UNSIGNED (TREE_TYPE (top0))
+-		  == TYPE_UNSIGNED (TREE_TYPE (top1))))
+-	    {
+-	      tree op0type = TREE_TYPE (top0);
+-	      enum machine_mode innermode = TYPE_MODE (op0type);
+-	      bool zextend_p = TYPE_UNSIGNED (op0type);
+-	      bool sat_p = TYPE_SATURATING (TREE_TYPE (subsubexp0));
+-	      if (sat_p == 0)
+-		this_optab = zextend_p ? umsub_widen_optab : smsub_widen_optab;
+-	      else
+-		this_optab = zextend_p ? usmsub_widen_optab
+-				       : ssmsub_widen_optab;
+-	      if (mode == GET_MODE_2XWIDER_MODE (innermode)
+-		  && (optab_handler (this_optab, mode)->insn_code
+-		      != CODE_FOR_nothing))
+-		{
+-		  expand_operands (top0, top1, NULL_RTX, &op0, &op1,
+-				   EXPAND_NORMAL);
+-		  op2 = expand_expr (treeop0, subtarget,
+-				     VOIDmode, EXPAND_NORMAL);
+-		  temp = expand_ternary_op (mode, this_optab, op0, op1, op2,
+-					    target, unsignedp);
+-		  gcc_assert (temp);
+-		  return REDUCE_BIT_FIELD (temp);
+-		}
+-	    }
+-	}
+-
+       /* For initializers, we are allowed to return a MINUS of two
+ 	 symbolic constants.  Here we handle all cases when both operands
+ 	 are constant.  */
+@@ -7678,6 +7574,14 @@
+ 
+       goto binop2;
+ 
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
++      expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1, EXPAND_NORMAL);
++      op2 = expand_normal (ops->op2);
++      target = expand_widen_pattern_expr (ops, op0, op1, op2,
++					  target, unsignedp);
++      return target;
++
+     case WIDEN_MULT_EXPR:
+       /* If first operand is constant, swap them.
+ 	 Thus the following special case checks need only
+
+=== modified file 'gcc/gimple-pretty-print.c'
+--- old/gcc/gimple-pretty-print.c	2009-11-25 10:55:54 +0000
++++ new/gcc/gimple-pretty-print.c	2010-09-16 09:15:46 +0000
+@@ -376,6 +376,34 @@
+     }
+ }
+ 
++/* Helper for dump_gimple_assign.  Print the ternary RHS of the
++   assignment GS.  BUFFER, SPC and FLAGS are as in dump_gimple_stmt.  */
++
++static void
++dump_ternary_rhs (pretty_printer *buffer, gimple gs, int spc, int flags)
++{
++  const char *p;
++  enum tree_code code = gimple_assign_rhs_code (gs);
++  switch (code)
++    {
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
++      for (p = tree_code_name [(int) code]; *p; p++)
++	pp_character (buffer, TOUPPER (*p));
++      pp_string (buffer, " <");
++      dump_generic_node (buffer, gimple_assign_rhs1 (gs), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, gimple_assign_rhs2 (gs), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, gimple_assign_rhs3 (gs), spc, flags, false);
++      pp_character (buffer, '>');
++      break;
++
++    default:
++      gcc_unreachable ();
++    }
++}
++
+ 
+ /* Dump the gimple assignment GS.  BUFFER, SPC and FLAGS are as in
+    dump_gimple_stmt.  */
+@@ -418,6 +446,8 @@
+         dump_unary_rhs (buffer, gs, spc, flags);
+       else if (gimple_num_ops (gs) == 3)
+         dump_binary_rhs (buffer, gs, spc, flags);
++      else if (gimple_num_ops (gs) == 4)
++        dump_ternary_rhs (buffer, gs, spc, flags);
+       else
+         gcc_unreachable ();
+       if (!(flags & TDF_RHS_ONLY))
+
+=== modified file 'gcc/gimple.c'
+--- old/gcc/gimple.c	2010-09-15 16:47:52 +0000
++++ new/gcc/gimple.c	2010-09-16 09:15:46 +0000
+@@ -289,31 +289,40 @@
+ 
+ 
+ /* Extract the operands and code for expression EXPR into *SUBCODE_P,
+-   *OP1_P and *OP2_P respectively.  */
++   *OP1_P, *OP2_P and *OP3_P respectively.  */
+ 
+ void
+-extract_ops_from_tree (tree expr, enum tree_code *subcode_p, tree *op1_p,
+-		       tree *op2_p)
++extract_ops_from_tree_1 (tree expr, enum tree_code *subcode_p, tree *op1_p,
++			 tree *op2_p, tree *op3_p)
+ {
+   enum gimple_rhs_class grhs_class;
+ 
+   *subcode_p = TREE_CODE (expr);
+   grhs_class = get_gimple_rhs_class (*subcode_p);
+ 
+-  if (grhs_class == GIMPLE_BINARY_RHS)
+-    {
+-      *op1_p = TREE_OPERAND (expr, 0);
+-      *op2_p = TREE_OPERAND (expr, 1);
++  if (grhs_class == GIMPLE_TERNARY_RHS)
++    {
++      *op1_p = TREE_OPERAND (expr, 0);
++      *op2_p = TREE_OPERAND (expr, 1);
++      *op3_p = TREE_OPERAND (expr, 2);
++    }
++  else if (grhs_class == GIMPLE_BINARY_RHS)
++    {
++      *op1_p = TREE_OPERAND (expr, 0);
++      *op2_p = TREE_OPERAND (expr, 1);
++      *op3_p = NULL_TREE;
+     }
+   else if (grhs_class == GIMPLE_UNARY_RHS)
+     {
+       *op1_p = TREE_OPERAND (expr, 0);
+       *op2_p = NULL_TREE;
++      *op3_p = NULL_TREE;
+     }
+   else if (grhs_class == GIMPLE_SINGLE_RHS)
+     {
+       *op1_p = expr;
+       *op2_p = NULL_TREE;
++      *op3_p = NULL_TREE;
+     }
+   else
+     gcc_unreachable ();
+@@ -329,10 +338,10 @@
+ gimple_build_assign_stat (tree lhs, tree rhs MEM_STAT_DECL)
+ {
+   enum tree_code subcode;
+-  tree op1, op2;
++  tree op1, op2, op3;
+ 
+-  extract_ops_from_tree (rhs, &subcode, &op1, &op2);
+-  return gimple_build_assign_with_ops_stat (subcode, lhs, op1, op2
++  extract_ops_from_tree_1 (rhs, &subcode, &op1, &op2, &op3);
++  return gimple_build_assign_with_ops_stat (subcode, lhs, op1, op2, op3
+   					    PASS_MEM_STAT);
+ }
+ 
+@@ -343,7 +352,7 @@
+ 
+ gimple
+ gimple_build_assign_with_ops_stat (enum tree_code subcode, tree lhs, tree op1,
+-                                   tree op2 MEM_STAT_DECL)
++                                   tree op2, tree op3 MEM_STAT_DECL)
+ {
+   unsigned num_ops;
+   gimple p;
+@@ -362,6 +371,12 @@
+       gimple_assign_set_rhs2 (p, op2);
+     }
+ 
++  if (op3)
++    {
++      gcc_assert (num_ops > 3);
++      gimple_assign_set_rhs3 (p, op3);
++    }
++
+   return p;
+ }
+ 
+@@ -1860,22 +1875,22 @@
+ gimple_assign_set_rhs_from_tree (gimple_stmt_iterator *gsi, tree expr)
+ {
+   enum tree_code subcode;
+-  tree op1, op2;
++  tree op1, op2, op3;
+ 
+-  extract_ops_from_tree (expr, &subcode, &op1, &op2);
+-  gimple_assign_set_rhs_with_ops (gsi, subcode, op1, op2);
++  extract_ops_from_tree_1 (expr, &subcode, &op1, &op2, &op3);
++  gimple_assign_set_rhs_with_ops_1 (gsi, subcode, op1, op2, op3);
+ }
+ 
+ 
+ /* Set the RHS of assignment statement pointed-to by GSI to CODE with
+-   operands OP1 and OP2.
++   operands OP1, OP2 and OP3.
+ 
+    NOTE: The statement pointed-to by GSI may be reallocated if it
+    did not have enough operand slots.  */
+ 
+ void
+-gimple_assign_set_rhs_with_ops (gimple_stmt_iterator *gsi, enum tree_code code,
+-				tree op1, tree op2)
++gimple_assign_set_rhs_with_ops_1 (gimple_stmt_iterator *gsi, enum tree_code code,
++				  tree op1, tree op2, tree op3)
+ {
+   unsigned new_rhs_ops = get_gimple_rhs_num_ops (code);
+   gimple stmt = gsi_stmt (*gsi);
+@@ -1899,6 +1914,8 @@
+   gimple_assign_set_rhs1 (stmt, op1);
+   if (new_rhs_ops > 1)
+     gimple_assign_set_rhs2 (stmt, op2);
++  if (new_rhs_ops > 2)
++    gimple_assign_set_rhs3 (stmt, op3);
+ }
+ 
+ 
+@@ -2378,6 +2395,8 @@
+     return 1;
+   else if (rhs_class == GIMPLE_BINARY_RHS)
+     return 2;
++  else if (rhs_class == GIMPLE_TERNARY_RHS)
++    return 3;
+   else
+     gcc_unreachable ();
+ }
+@@ -2394,6 +2413,8 @@
+       || (SYM) == TRUTH_OR_EXPR						    \
+       || (SYM) == TRUTH_XOR_EXPR) ? GIMPLE_BINARY_RHS			    \
+    : (SYM) == TRUTH_NOT_EXPR ? GIMPLE_UNARY_RHS				    \
++   : ((SYM) == WIDEN_MULT_PLUS_EXPR					    \
++      || (SYM) == WIDEN_MULT_MINUS_EXPR) ? GIMPLE_TERNARY_RHS		    \
+    : ((SYM) == COND_EXPR						    \
+       || (SYM) == CONSTRUCTOR						    \
+       || (SYM) == OBJ_TYPE_REF						    \
+
+=== modified file 'gcc/gimple.h'
+--- old/gcc/gimple.h	2010-08-10 13:31:21 +0000
++++ new/gcc/gimple.h	2010-09-16 09:15:46 +0000
+@@ -80,6 +80,7 @@
+ enum gimple_rhs_class
+ {
+   GIMPLE_INVALID_RHS,	/* The expression cannot be used on the RHS.  */
++  GIMPLE_TERNARY_RHS,	/* The expression is a ternary operation.  */
+   GIMPLE_BINARY_RHS,	/* The expression is a binary operation.  */
+   GIMPLE_UNARY_RHS,	/* The expression is a unary operation.  */
+   GIMPLE_SINGLE_RHS	/* The expression is a single object (an SSA
+@@ -786,12 +787,14 @@
+ gimple gimple_build_assign_stat (tree, tree MEM_STAT_DECL);
+ #define gimple_build_assign(l,r) gimple_build_assign_stat (l, r MEM_STAT_INFO)
+ 
+-void extract_ops_from_tree (tree, enum tree_code *, tree *, tree *);
++void extract_ops_from_tree_1 (tree, enum tree_code *, tree *, tree *, tree *);
+ 
+ gimple gimple_build_assign_with_ops_stat (enum tree_code, tree, tree,
+-					  tree MEM_STAT_DECL);
+-#define gimple_build_assign_with_ops(c,o1,o2,o3) \
+-  gimple_build_assign_with_ops_stat (c, o1, o2, o3 MEM_STAT_INFO)
++					  tree, tree MEM_STAT_DECL);
++#define gimple_build_assign_with_ops(c,o1,o2,o3)			\
++  gimple_build_assign_with_ops_stat (c, o1, o2, o3, NULL_TREE MEM_STAT_INFO)
++#define gimple_build_assign_with_ops3(c,o1,o2,o3,o4)			\
++  gimple_build_assign_with_ops_stat (c, o1, o2, o3, o4 MEM_STAT_INFO)
+ 
+ gimple gimple_build_debug_bind_stat (tree, tree, gimple MEM_STAT_DECL);
+ #define gimple_build_debug_bind(var,val,stmt)			\
+@@ -850,8 +853,8 @@
+ bool gimple_assign_unary_nop_p (gimple);
+ void gimple_set_bb (gimple, struct basic_block_def *);
+ void gimple_assign_set_rhs_from_tree (gimple_stmt_iterator *, tree);
+-void gimple_assign_set_rhs_with_ops (gimple_stmt_iterator *, enum tree_code,
+-				     tree, tree);
++void gimple_assign_set_rhs_with_ops_1 (gimple_stmt_iterator *, enum tree_code,
++				       tree, tree, tree);
+ tree gimple_get_lhs (const_gimple);
+ void gimple_set_lhs (gimple, tree);
+ void gimple_replace_lhs (gimple, tree);
+@@ -1793,6 +1796,63 @@
+   gimple_set_op (gs, 2, rhs);
+ }
+ 
++/* Return the third operand on the RHS of assignment statement GS.
++   If GS does not have two operands, NULL is returned instead.  */
++
++static inline tree
++gimple_assign_rhs3 (const_gimple gs)
++{
++  GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
++
++  if (gimple_num_ops (gs) >= 4)
++    return gimple_op (gs, 3);
++  else
++    return NULL_TREE;
++}
++
++/* Return a pointer to the third operand on the RHS of assignment
++   statement GS.  */
++
++static inline tree *
++gimple_assign_rhs3_ptr (const_gimple gs)
++{
++  GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
++  return gimple_op_ptr (gs, 3);
++}
++
++
++/* Set RHS to be the third operand on the RHS of assignment statement GS.  */
++
++static inline void
++gimple_assign_set_rhs3 (gimple gs, tree rhs)
++{
++  GIMPLE_CHECK (gs, GIMPLE_ASSIGN);
++
++  gimple_set_op (gs, 3, rhs);
++}
++
++/* A wrapper around gimple_assign_set_rhs_with_ops_1, for callers which expect
++   to see only a maximum of two operands.  */
++
++static inline void
++gimple_assign_set_rhs_with_ops (gimple_stmt_iterator *gsi, enum tree_code code,
++				tree op1, tree op2)
++{
++  gimple_assign_set_rhs_with_ops_1 (gsi, code, op1, op2, NULL);
++}
++
++/* A wrapper around extract_ops_from_tree_1, for callers which expect
++   to see only a maximum of two operands.  */
++
++static inline void
++extract_ops_from_tree (tree expr, enum tree_code *code, tree *op0,
++		       tree *op1)
++{
++  tree op2;
++  extract_ops_from_tree_1 (expr, code, op0, op1, &op2);
++  gcc_assert (op2 == NULL_TREE);
++}
++
+ /* Returns true if GS is a nontemporal move.  */
+ 
+ static inline bool
+
+=== modified file 'gcc/optabs.c'
+--- old/gcc/optabs.c	2010-03-19 19:45:01 +0000
++++ new/gcc/optabs.c	2010-09-16 09:15:46 +0000
+@@ -408,6 +408,20 @@
+     case DOT_PROD_EXPR:
+       return TYPE_UNSIGNED (type) ? udot_prod_optab : sdot_prod_optab;
+ 
++    case WIDEN_MULT_PLUS_EXPR:
++      return (TYPE_UNSIGNED (type)
++	      ? (TYPE_SATURATING (type)
++		 ? usmadd_widen_optab : umadd_widen_optab)
++	      : (TYPE_SATURATING (type)
++		 ? ssmadd_widen_optab : smadd_widen_optab));
++
++    case WIDEN_MULT_MINUS_EXPR:
++      return (TYPE_UNSIGNED (type)
++	      ? (TYPE_SATURATING (type)
++		 ? usmsub_widen_optab : umsub_widen_optab)
++	      : (TYPE_SATURATING (type)
++		 ? ssmsub_widen_optab : smsub_widen_optab));
++
+     case REDUC_MAX_EXPR:
+       return TYPE_UNSIGNED (type) ? reduc_umax_optab : reduc_smax_optab;
+ 
+@@ -547,7 +561,12 @@
+   tmode0 = TYPE_MODE (TREE_TYPE (oprnd0));
+   widen_pattern_optab =
+     optab_for_tree_code (ops->code, TREE_TYPE (oprnd0), optab_default);
+-  icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
++  if (ops->code == WIDEN_MULT_PLUS_EXPR
++      || ops->code == WIDEN_MULT_MINUS_EXPR)
++    icode = (int) optab_handler (widen_pattern_optab,
++				 TYPE_MODE (TREE_TYPE (ops->op2)))->insn_code;
++  else
++    icode = (int) optab_handler (widen_pattern_optab, tmode0)->insn_code;
+   gcc_assert (icode != CODE_FOR_nothing);
+   xmode0 = insn_data[icode].operand[1].mode;
+ 
+
+=== modified file 'gcc/testsuite/gcc.target/arm/wmul-1.c'
+--- old/gcc/testsuite/gcc.target/arm/wmul-1.c	2010-09-01 13:29:58 +0000
++++ new/gcc/testsuite/gcc.target/arm/wmul-1.c	2010-09-16 09:15:46 +0000
+@@ -15,4 +15,4 @@
+   return sqr;
+ }
+ 
+-/* { dg-final { scan-assembler-times "smulbb" 2 } } */
++/* { dg-final { scan-assembler-times "smlabb" 2 } } */
+
+=== modified file 'gcc/tree-cfg.c'
+--- old/gcc/tree-cfg.c	2010-09-01 13:29:58 +0000
++++ new/gcc/tree-cfg.c	2010-09-16 09:15:46 +0000
+@@ -3483,6 +3483,65 @@
+   return false;
+ }
+ 
++/* Verify a gimple assignment statement STMT with a ternary rhs.
++   Returns true if anything is wrong.  */
++
++static bool
++verify_gimple_assign_ternary (gimple stmt)
++{
++  enum tree_code rhs_code = gimple_assign_rhs_code (stmt);
++  tree lhs = gimple_assign_lhs (stmt);
++  tree lhs_type = TREE_TYPE (lhs);
++  tree rhs1 = gimple_assign_rhs1 (stmt);
++  tree rhs1_type = TREE_TYPE (rhs1);
++  tree rhs2 = gimple_assign_rhs2 (stmt);
++  tree rhs2_type = TREE_TYPE (rhs2);
++  tree rhs3 = gimple_assign_rhs3 (stmt);
++  tree rhs3_type = TREE_TYPE (rhs3);
++
++  if (!is_gimple_reg (lhs)
++      && !(optimize == 0
++	   && TREE_CODE (lhs_type) == COMPLEX_TYPE))
++    {
++      error ("non-register as LHS of ternary operation");
++      return true;
++    }
++
++  if (!is_gimple_val (rhs1)
++      || !is_gimple_val (rhs2)
++      || !is_gimple_val (rhs3))
++    {
++      error ("invalid operands in ternary operation");
++      return true;
++    }
++
++  /* First handle operations that involve different types.  */
++  switch (rhs_code)
++    {
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
++      if ((!INTEGRAL_TYPE_P (rhs1_type)
++	   && !FIXED_POINT_TYPE_P (rhs1_type))
++	  || !useless_type_conversion_p (rhs1_type, rhs2_type)
++	  || !useless_type_conversion_p (lhs_type, rhs3_type)
++	  || 2 * TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (lhs_type)
++	  || TYPE_PRECISION (rhs1_type) != TYPE_PRECISION (rhs2_type))
++	{
++	  error ("type mismatch in widening multiply-accumulate expression");
++	  debug_generic_expr (lhs_type);
++	  debug_generic_expr (rhs1_type);
++	  debug_generic_expr (rhs2_type);
++	  debug_generic_expr (rhs3_type);
++	  return true;
++	}
++      break;
++
++    default:
++      gcc_unreachable ();
++    }
++  return false;
++}
++
+ /* Verify a gimple assignment statement STMT with a single rhs.
+    Returns true if anything is wrong.  */
+ 
+@@ -3615,6 +3674,9 @@
+     case GIMPLE_BINARY_RHS:
+       return verify_gimple_assign_binary (stmt);
+ 
++    case GIMPLE_TERNARY_RHS:
++      return verify_gimple_assign_ternary (stmt);
++
+     default:
+       gcc_unreachable ();
+     }
+
+=== modified file 'gcc/tree-inline.c'
+--- old/gcc/tree-inline.c	2010-09-01 13:29:58 +0000
++++ new/gcc/tree-inline.c	2010-09-16 09:15:46 +0000
+@@ -3199,6 +3199,8 @@
+     case WIDEN_SUM_EXPR:
+     case WIDEN_MULT_EXPR:
+     case DOT_PROD_EXPR:
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
+ 
+     case VEC_WIDEN_MULT_HI_EXPR:
+     case VEC_WIDEN_MULT_LO_EXPR:
+
+=== modified file 'gcc/tree-pretty-print.c'
+--- old/gcc/tree-pretty-print.c	2009-11-30 10:36:54 +0000
++++ new/gcc/tree-pretty-print.c	2010-09-16 09:15:46 +0000
+@@ -1939,6 +1939,26 @@
+       pp_string (buffer, " > ");
+       break;
+ 
++    case WIDEN_MULT_PLUS_EXPR:
++      pp_string (buffer, " WIDEN_MULT_PLUS_EXPR < ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 1), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 2), spc, flags, false);
++      pp_string (buffer, " > ");
++      break;
++
++    case WIDEN_MULT_MINUS_EXPR:
++      pp_string (buffer, " WIDEN_MULT_MINUS_EXPR < ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 0), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 1), spc, flags, false);
++      pp_string (buffer, ", ");
++      dump_generic_node (buffer, TREE_OPERAND (node, 2), spc, flags, false);
++      pp_string (buffer, " > ");
++      break;
++
+     case OMP_PARALLEL:
+       pp_string (buffer, "#pragma omp parallel");
+       dump_omp_clauses (buffer, OMP_PARALLEL_CLAUSES (node), spc, flags);
+@@ -2432,6 +2452,8 @@
+     case VEC_WIDEN_MULT_LO_EXPR:
+     case WIDEN_MULT_EXPR:
+     case DOT_PROD_EXPR:
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
+     case MULT_EXPR:
+     case TRUNC_DIV_EXPR:
+     case CEIL_DIV_EXPR:
+
+=== modified file 'gcc/tree-ssa-ccp.c'
+--- old/gcc/tree-ssa-ccp.c	2010-08-10 13:31:21 +0000
++++ new/gcc/tree-ssa-ccp.c	2010-09-16 09:15:46 +0000
+@@ -915,6 +915,23 @@
+ 					TREE_TYPE (TREE_OPERAND (addr, 0))));
+ }
+ 
++/* Get operand number OPNR from the rhs of STMT.  Before returning it,
++   simplify it to a constant if possible.  */
++
++static tree
++get_rhs_assign_op_for_ccp (gimple stmt, int opnr)
++{
++  tree op = gimple_op (stmt, opnr);
++  
++  if (TREE_CODE (op) == SSA_NAME)
++    {
++      prop_value_t *val = get_value (op);
++      if (val->lattice_val == CONSTANT)
++	op = get_value (op)->value;
++    }
++  return op;
++}
++
+ /* CCP specific front-end to the non-destructive constant folding
+    routines.
+ 
+@@ -1037,15 +1054,7 @@
+                  Note that we know the single operand must be a constant,
+                  so this should almost always return a simplified RHS.  */
+               tree lhs = gimple_assign_lhs (stmt);
+-              tree op0 = gimple_assign_rhs1 (stmt);
+-
+-              /* Simplify the operand down to a constant.  */
+-              if (TREE_CODE (op0) == SSA_NAME)
+-                {
+-                  prop_value_t *val = get_value (op0);
+-                  if (val->lattice_val == CONSTANT)
+-                    op0 = get_value (op0)->value;
+-                }
++              tree op0 = get_rhs_assign_op_for_ccp (stmt, 1);
+ 
+ 	      /* Conversions are useless for CCP purposes if they are
+ 		 value-preserving.  Thus the restrictions that
+@@ -1082,23 +1091,8 @@
+           case GIMPLE_BINARY_RHS:
+             {
+               /* Handle binary operators that can appear in GIMPLE form.  */
+-              tree op0 = gimple_assign_rhs1 (stmt);
+-              tree op1 = gimple_assign_rhs2 (stmt);
+-
+-              /* Simplify the operands down to constants when appropriate.  */
+-              if (TREE_CODE (op0) == SSA_NAME)
+-                {
+-                  prop_value_t *val = get_value (op0);
+-                  if (val->lattice_val == CONSTANT)
+-                    op0 = val->value;
+-                }
+-
+-              if (TREE_CODE (op1) == SSA_NAME)
+-                {
+-                  prop_value_t *val = get_value (op1);
+-                  if (val->lattice_val == CONSTANT)
+-                    op1 = val->value;
+-                }
++              tree op0 = get_rhs_assign_op_for_ccp (stmt, 1);
++              tree op1 = get_rhs_assign_op_for_ccp (stmt, 2);
+ 
+ 	      /* Fold &foo + CST into an invariant reference if possible.  */
+ 	      if (gimple_assign_rhs_code (stmt) == POINTER_PLUS_EXPR
+@@ -1115,6 +1109,17 @@
+ 				  gimple_expr_type (stmt), op0, op1);
+             }
+ 
++          case GIMPLE_TERNARY_RHS:
++            {
++              /* Handle binary operators that can appear in GIMPLE form.  */
++              tree op0 = get_rhs_assign_op_for_ccp (stmt, 1);
++              tree op1 = get_rhs_assign_op_for_ccp (stmt, 2);
++              tree op2 = get_rhs_assign_op_for_ccp (stmt, 3);
++
++              return fold_ternary_loc (loc, subcode,
++				       gimple_expr_type (stmt), op0, op1, op2);
++            }
++
+           default:
+             gcc_unreachable ();
+           }
+@@ -2959,6 +2964,33 @@
+         }
+       break;
+ 
++    case GIMPLE_TERNARY_RHS:
++      result = fold_ternary_loc (loc, subcode,
++				 TREE_TYPE (gimple_assign_lhs (stmt)),
++				 gimple_assign_rhs1 (stmt),
++				 gimple_assign_rhs2 (stmt),
++				 gimple_assign_rhs3 (stmt));
++
++      if (result)
++        {
++          STRIP_USELESS_TYPE_CONVERSION (result);
++          if (valid_gimple_rhs_p (result))
++	    return result;
++
++	  /* Fold might have produced non-GIMPLE, so if we trust it blindly
++	     we lose canonicalization opportunities.  Do not go again
++	     through fold here though, or the same non-GIMPLE will be
++	     produced.  */
++          if (commutative_ternary_tree_code (subcode)
++              && tree_swap_operands_p (gimple_assign_rhs1 (stmt),
++                                       gimple_assign_rhs2 (stmt), false))
++            return build3 (subcode, TREE_TYPE (gimple_assign_lhs (stmt)),
++			   gimple_assign_rhs2 (stmt),
++			   gimple_assign_rhs1 (stmt),
++			   gimple_assign_rhs3 (stmt));
++        }
++      break;
++
+     case GIMPLE_INVALID_RHS:
+       gcc_unreachable ();
+     }
+
+=== modified file 'gcc/tree-ssa-dom.c'
+--- old/gcc/tree-ssa-dom.c	2010-07-20 11:44:16 +0000
++++ new/gcc/tree-ssa-dom.c	2010-09-16 09:15:46 +0000
+@@ -54,6 +54,7 @@
+   EXPR_SINGLE,
+   EXPR_UNARY,
+   EXPR_BINARY,
++  EXPR_TERNARY,
+   EXPR_CALL
+ };
+ 
+@@ -64,7 +65,8 @@
+   union {
+     struct { tree rhs; } single;
+     struct { enum tree_code op;  tree opnd; } unary;
+-    struct { enum tree_code op;  tree opnd0; tree opnd1; } binary;
++    struct { enum tree_code op;  tree opnd0, opnd1; } binary;
++    struct { enum tree_code op;  tree opnd0, opnd1, opnd2; } ternary;
+     struct { tree fn; bool pure; size_t nargs; tree *args; } call;
+   } ops;
+ };
+@@ -214,22 +216,30 @@
+       switch (get_gimple_rhs_class (subcode))
+         {
+         case GIMPLE_SINGLE_RHS:
+-          expr->kind = EXPR_SINGLE;
+-          expr->ops.single.rhs = gimple_assign_rhs1 (stmt);
+-          break;
++	  expr->kind = EXPR_SINGLE;
++	  expr->ops.single.rhs = gimple_assign_rhs1 (stmt);
++	  break;
+         case GIMPLE_UNARY_RHS:
+-          expr->kind = EXPR_UNARY;
++	  expr->kind = EXPR_UNARY;
+ 	  expr->type = TREE_TYPE (gimple_assign_lhs (stmt));
+-          expr->ops.unary.op = subcode;
+-          expr->ops.unary.opnd = gimple_assign_rhs1 (stmt);
+-          break;
++	  expr->ops.unary.op = subcode;
++	  expr->ops.unary.opnd = gimple_assign_rhs1 (stmt);
++	  break;
+         case GIMPLE_BINARY_RHS:
+-          expr->kind = EXPR_BINARY;
+-	  expr->type = TREE_TYPE (gimple_assign_lhs (stmt));
+-          expr->ops.binary.op = subcode;
+-          expr->ops.binary.opnd0 = gimple_assign_rhs1 (stmt);
+-          expr->ops.binary.opnd1 = gimple_assign_rhs2 (stmt);
+-          break;
++	  expr->kind = EXPR_BINARY;
++	  expr->type = TREE_TYPE (gimple_assign_lhs (stmt));
++	  expr->ops.binary.op = subcode;
++	  expr->ops.binary.opnd0 = gimple_assign_rhs1 (stmt);
++	  expr->ops.binary.opnd1 = gimple_assign_rhs2 (stmt);
++	  break;
++        case GIMPLE_TERNARY_RHS:
++	  expr->kind = EXPR_TERNARY;
++	  expr->type = TREE_TYPE (gimple_assign_lhs (stmt));
++	  expr->ops.ternary.op = subcode;
++	  expr->ops.ternary.opnd0 = gimple_assign_rhs1 (stmt);
++	  expr->ops.ternary.opnd1 = gimple_assign_rhs2 (stmt);
++	  expr->ops.ternary.opnd2 = gimple_assign_rhs3 (stmt);
++	  break;
+         default:
+           gcc_unreachable ();
+         }
+@@ -374,23 +384,40 @@
+                               expr1->ops.unary.opnd, 0);
+ 
+     case EXPR_BINARY:
+-      {
+-        if (expr0->ops.binary.op != expr1->ops.binary.op)
+-          return false;
+-
+-        if (operand_equal_p (expr0->ops.binary.opnd0,
+-                             expr1->ops.binary.opnd0, 0)
+-            && operand_equal_p (expr0->ops.binary.opnd1,
+-                                expr1->ops.binary.opnd1, 0))
+-          return true;
+-
+-        /* For commutative ops, allow the other order.  */
+-        return (commutative_tree_code (expr0->ops.binary.op)
+-                && operand_equal_p (expr0->ops.binary.opnd0,
+-                                    expr1->ops.binary.opnd1, 0)
+-                && operand_equal_p (expr0->ops.binary.opnd1,
+-                                    expr1->ops.binary.opnd0, 0));
+-      }
++      if (expr0->ops.binary.op != expr1->ops.binary.op)
++	return false;
++
++      if (operand_equal_p (expr0->ops.binary.opnd0,
++			   expr1->ops.binary.opnd0, 0)
++	  && operand_equal_p (expr0->ops.binary.opnd1,
++			      expr1->ops.binary.opnd1, 0))
++	return true;
++
++      /* For commutative ops, allow the other order.  */
++      return (commutative_tree_code (expr0->ops.binary.op)
++	      && operand_equal_p (expr0->ops.binary.opnd0,
++				  expr1->ops.binary.opnd1, 0)
++	      && operand_equal_p (expr0->ops.binary.opnd1,
++				  expr1->ops.binary.opnd0, 0));
++
++    case EXPR_TERNARY:
++      if (expr0->ops.ternary.op != expr1->ops.ternary.op
++	  || !operand_equal_p (expr0->ops.ternary.opnd2,
++			       expr1->ops.ternary.opnd2, 0))
++	return false;
++
++      if (operand_equal_p (expr0->ops.ternary.opnd0,
++			   expr1->ops.ternary.opnd0, 0)
++	  && operand_equal_p (expr0->ops.ternary.opnd1,
++			      expr1->ops.ternary.opnd1, 0))
++	return true;
++
++      /* For commutative ops, allow the other order.  */
++      return (commutative_ternary_tree_code (expr0->ops.ternary.op)
++	      && operand_equal_p (expr0->ops.ternary.opnd0,
++				  expr1->ops.ternary.opnd1, 0)
++	      && operand_equal_p (expr0->ops.ternary.opnd1,
++				  expr1->ops.ternary.opnd0, 0));
+ 
+     case EXPR_CALL:
+       {
+@@ -453,8 +480,8 @@
+     case EXPR_BINARY:
+       val = iterative_hash_object (expr->ops.binary.op, val);
+       if (commutative_tree_code (expr->ops.binary.op))
+-          val = iterative_hash_exprs_commutative (expr->ops.binary.opnd0,
+-                                                  expr->ops.binary.opnd1, val);
++	val = iterative_hash_exprs_commutative (expr->ops.binary.opnd0,
++						expr->ops.binary.opnd1, val);
+       else
+         {
+           val = iterative_hash_expr (expr->ops.binary.opnd0, val);
+@@ -462,6 +489,19 @@
+         }
+       break;
+ 
++    case EXPR_TERNARY:
++      val = iterative_hash_object (expr->ops.ternary.op, val);
++      if (commutative_ternary_tree_code (expr->ops.ternary.op))
++	val = iterative_hash_exprs_commutative (expr->ops.ternary.opnd0,
++						expr->ops.ternary.opnd1, val);
++      else
++        {
++          val = iterative_hash_expr (expr->ops.ternary.opnd0, val);
++          val = iterative_hash_expr (expr->ops.ternary.opnd1, val);
++        }
++      val = iterative_hash_expr (expr->ops.ternary.opnd2, val);
++      break;
++
+     case EXPR_CALL:
+       {
+         size_t i;
+@@ -514,6 +554,16 @@
+         print_generic_expr (stream, element->expr.ops.binary.opnd1, 0);
+         break;
+ 
++      case EXPR_TERNARY:
++        fprintf (stream, " %s <", tree_code_name[element->expr.ops.ternary.op]);
++        print_generic_expr (stream, element->expr.ops.ternary.opnd0, 0);
++	fputs (", ", stream);
++        print_generic_expr (stream, element->expr.ops.ternary.opnd1, 0);
++	fputs (", ", stream);
++        print_generic_expr (stream, element->expr.ops.ternary.opnd2, 0);
++	fputs (">", stream);
++        break;
++
+       case EXPR_CALL:
+         {
+           size_t i;
+
+=== modified file 'gcc/tree-ssa-math-opts.c'
+--- old/gcc/tree-ssa-math-opts.c	2010-09-01 13:29:58 +0000
++++ new/gcc/tree-ssa-math-opts.c	2010-09-16 09:15:46 +0000
+@@ -1261,6 +1261,235 @@
+  }
+ };
+ 
++/* Return true if RHS is a suitable operand for a widening multiplication.
++   There are two cases:
++
++     - RHS makes some value twice as wide.  Store that value in *NEW_RHS_OUT
++       if so, and store its type in *TYPE_OUT.
++
++     - RHS is an integer constant.  Store that value in *NEW_RHS_OUT if so,
++       but leave *TYPE_OUT untouched.  */
++
++static bool
++is_widening_mult_rhs_p (tree rhs, tree *type_out, tree *new_rhs_out)
++{
++  gimple stmt;
++  tree type, type1, rhs1;
++  enum tree_code rhs_code;
++
++  if (TREE_CODE (rhs) == SSA_NAME)
++    {
++      type = TREE_TYPE (rhs);
++      stmt = SSA_NAME_DEF_STMT (rhs);
++      if (!is_gimple_assign (stmt))
++	return false;
++
++      rhs_code = gimple_assign_rhs_code (stmt);
++      if (TREE_CODE (type) == INTEGER_TYPE
++	  ? !CONVERT_EXPR_CODE_P (rhs_code)
++	  : rhs_code != FIXED_CONVERT_EXPR)
++	return false;
++
++      rhs1 = gimple_assign_rhs1 (stmt);
++      type1 = TREE_TYPE (rhs1);
++      if (TREE_CODE (type1) != TREE_CODE (type)
++	  || TYPE_PRECISION (type1) * 2 != TYPE_PRECISION (type))
++	return false;
++
++      *new_rhs_out = rhs1;
++      *type_out = type1;
++      return true;
++    }
++
++  if (TREE_CODE (rhs) == INTEGER_CST)
++    {
++      *new_rhs_out = rhs;
++      *type_out = NULL;
++      return true;
++    }
++
++  return false;
++}
++
++/* Return true if STMT performs a widening multiplication.  If so,
++   store the unwidened types of the operands in *TYPE1_OUT and *TYPE2_OUT
++   respectively.  Also fill *RHS1_OUT and *RHS2_OUT such that converting
++   those operands to types *TYPE1_OUT and *TYPE2_OUT would give the
++   operands of the multiplication.  */
++
++static bool
++is_widening_mult_p (gimple stmt,
++		    tree *type1_out, tree *rhs1_out,
++		    tree *type2_out, tree *rhs2_out)
++{
++  tree type;
++
++  type = TREE_TYPE (gimple_assign_lhs (stmt));
++  if (TREE_CODE (type) != INTEGER_TYPE
++      && TREE_CODE (type) != FIXED_POINT_TYPE)
++    return false;
++
++  if (!is_widening_mult_rhs_p (gimple_assign_rhs1 (stmt), type1_out, rhs1_out))
++    return false;
++
++  if (!is_widening_mult_rhs_p (gimple_assign_rhs2 (stmt), type2_out, rhs2_out))
++    return false;
++
++  if (*type1_out == NULL)
++    {
++      if (*type2_out == NULL || !int_fits_type_p (*rhs1_out, *type2_out))
++	return false;
++      *type1_out = *type2_out;
++    }
++
++  if (*type2_out == NULL)
++    {
++      if (!int_fits_type_p (*rhs2_out, *type1_out))
++	return false;
++      *type2_out = *type1_out;
++    }
++
++  return true;
++}
++
++/* Process a single gimple statement STMT, which has a MULT_EXPR as
++   its rhs, and try to convert it into a WIDEN_MULT_EXPR.  The return
++   value is true iff we converted the statement.  */
++
++static bool
++convert_mult_to_widen (gimple stmt)
++{
++  tree lhs, rhs1, rhs2, type, type1, type2;
++  enum insn_code handler;
++
++  lhs = gimple_assign_lhs (stmt);
++  type = TREE_TYPE (lhs);
++  if (TREE_CODE (type) != INTEGER_TYPE)
++    return false;
++
++  if (!is_widening_mult_p (stmt, &type1, &rhs1, &type2, &rhs2))
++    return false;
++
++  if (TYPE_UNSIGNED (type1) && TYPE_UNSIGNED (type2))
++    handler = optab_handler (umul_widen_optab, TYPE_MODE (type))->insn_code;
++  else if (!TYPE_UNSIGNED (type1) && !TYPE_UNSIGNED (type2))
++    handler = optab_handler (smul_widen_optab, TYPE_MODE (type))->insn_code;
++  else
++    handler = optab_handler (usmul_widen_optab, TYPE_MODE (type))->insn_code;
++
++  if (handler == CODE_FOR_nothing)
++    return false;
++
++  gimple_assign_set_rhs1 (stmt, fold_convert (type1, rhs1));
++  gimple_assign_set_rhs2 (stmt, fold_convert (type2, rhs2));
++  gimple_assign_set_rhs_code (stmt, WIDEN_MULT_EXPR);
++  update_stmt (stmt);
++  return true;
++}
++
++/* Process a single gimple statement STMT, which is found at the
++   iterator GSI and has a either a PLUS_EXPR or a MINUS_EXPR as its
++   rhs (given by CODE), and try to convert it into a
++   WIDEN_MULT_PLUS_EXPR or a WIDEN_MULT_MINUS_EXPR.  The return value
++   is true iff we converted the statement.  */
++
++static bool
++convert_plusminus_to_widen (gimple_stmt_iterator *gsi, gimple stmt,
++			    enum tree_code code)
++{
++  gimple rhs1_stmt = NULL, rhs2_stmt = NULL;
++  tree type, type1, type2;
++  tree lhs, rhs1, rhs2, mult_rhs1, mult_rhs2, add_rhs;
++  enum tree_code rhs1_code = ERROR_MARK, rhs2_code = ERROR_MARK;
++  optab this_optab;
++  enum tree_code wmult_code;
++
++  lhs = gimple_assign_lhs (stmt);
++  type = TREE_TYPE (lhs);
++  if (TREE_CODE (type) != INTEGER_TYPE
++      && TREE_CODE (type) != FIXED_POINT_TYPE)
++    return false;
++
++  if (code == MINUS_EXPR)
++    wmult_code = WIDEN_MULT_MINUS_EXPR;
++  else
++    wmult_code = WIDEN_MULT_PLUS_EXPR;
++
++  rhs1 = gimple_assign_rhs1 (stmt);
++  rhs2 = gimple_assign_rhs2 (stmt);
++
++  if (TREE_CODE (rhs1) == SSA_NAME)
++    {
++      rhs1_stmt = SSA_NAME_DEF_STMT (rhs1);
++      if (is_gimple_assign (rhs1_stmt))
++	rhs1_code = gimple_assign_rhs_code (rhs1_stmt);
++    }
++  else
++    return false;
++
++  if (TREE_CODE (rhs2) == SSA_NAME)
++    {
++      rhs2_stmt = SSA_NAME_DEF_STMT (rhs2);
++      if (is_gimple_assign (rhs2_stmt))
++	rhs2_code = gimple_assign_rhs_code (rhs2_stmt);
++    }
++  else
++    return false;
++
++  if (code == PLUS_EXPR && rhs1_code == MULT_EXPR)
++    {
++      if (!is_widening_mult_p (rhs1_stmt, &type1, &mult_rhs1,
++			       &type2, &mult_rhs2))
++	return false;
++      add_rhs = rhs2;
++    }
++  else if (rhs2_code == MULT_EXPR)
++    {
++      if (!is_widening_mult_p (rhs2_stmt, &type1, &mult_rhs1,
++			       &type2, &mult_rhs2))
++	return false;
++      add_rhs = rhs1;
++    }
++  else if (code == PLUS_EXPR && rhs1_code == WIDEN_MULT_EXPR)
++    {
++      mult_rhs1 = gimple_assign_rhs1 (rhs1_stmt);
++      mult_rhs2 = gimple_assign_rhs2 (rhs1_stmt);
++      type1 = TREE_TYPE (mult_rhs1);
++      type2 = TREE_TYPE (mult_rhs2);
++      add_rhs = rhs2;
++    }
++  else if (rhs2_code == WIDEN_MULT_EXPR)
++    {
++      mult_rhs1 = gimple_assign_rhs1 (rhs2_stmt);
++      mult_rhs2 = gimple_assign_rhs2 (rhs2_stmt);
++      type1 = TREE_TYPE (mult_rhs1);
++      type2 = TREE_TYPE (mult_rhs2);
++      add_rhs = rhs1;
++    }
++  else
++    return false;
++
++  if (TYPE_UNSIGNED (type1) != TYPE_UNSIGNED (type2))
++    return false;
++
++  /* Verify that the machine can perform a widening multiply
++     accumulate in this mode/signedness combination, otherwise
++     this transformation is likely to pessimize code.  */
++  this_optab = optab_for_tree_code (wmult_code, type1, optab_default);
++  if (optab_handler (this_optab, TYPE_MODE (type))->insn_code
++      == CODE_FOR_nothing)
++    return false;
++
++  /* ??? May need some type verification here?  */
++
++  gimple_assign_set_rhs_with_ops_1 (gsi, wmult_code,
++				    fold_convert (type1, mult_rhs1),
++				    fold_convert (type2, mult_rhs2),
++				    add_rhs);
++  update_stmt (gsi_stmt (*gsi));
++  return true;
++}
++
+ /* Find integer multiplications where the operands are extended from
+    smaller types, and replace the MULT_EXPR with a WIDEN_MULT_EXPR
+    where appropriate.  */
+@@ -1278,94 +1507,19 @@
+       for (gsi = gsi_after_labels (bb); !gsi_end_p (gsi); gsi_next (&gsi))
+         {
+ 	  gimple stmt = gsi_stmt (gsi);
+-	  gimple rhs1_stmt = NULL, rhs2_stmt = NULL;
+-	  tree type, type1 = NULL, type2 = NULL;
+-	  tree rhs1, rhs2, rhs1_convop = NULL, rhs2_convop = NULL;
+-	  enum tree_code rhs1_code, rhs2_code;
+-
+-	  if (!is_gimple_assign (stmt)
+-	      || gimple_assign_rhs_code (stmt) != MULT_EXPR)
+-	    continue;
+-
+-	  type = TREE_TYPE (gimple_assign_lhs (stmt));
+-
+-	  if (TREE_CODE (type) != INTEGER_TYPE)
+-	    continue;
+-
+-	  rhs1 = gimple_assign_rhs1 (stmt);
+-	  rhs2 = gimple_assign_rhs2 (stmt);
+-
+-	  if (TREE_CODE (rhs1) == SSA_NAME)
+-	    {
+-	      rhs1_stmt = SSA_NAME_DEF_STMT (rhs1);
+-	      if (!is_gimple_assign (rhs1_stmt))
+-		continue;
+-	      rhs1_code = gimple_assign_rhs_code (rhs1_stmt);
+-	      if (!CONVERT_EXPR_CODE_P (rhs1_code))
+-		continue;
+-	      rhs1_convop = gimple_assign_rhs1 (rhs1_stmt);
+-	      type1 = TREE_TYPE (rhs1_convop);
+-	      if (TYPE_PRECISION (type1) * 2 != TYPE_PRECISION (type))
+-		continue;
+-	    }
+-	  else if (TREE_CODE (rhs1) != INTEGER_CST)
+-	    continue;
+-
+-	  if (TREE_CODE (rhs2) == SSA_NAME)
+-	    {
+-	      rhs2_stmt = SSA_NAME_DEF_STMT (rhs2);
+-	      if (!is_gimple_assign (rhs2_stmt))
+-		continue;
+-	      rhs2_code = gimple_assign_rhs_code (rhs2_stmt);
+-	      if (!CONVERT_EXPR_CODE_P (rhs2_code))
+-		continue;
+-	      rhs2_convop = gimple_assign_rhs1 (rhs2_stmt);
+-	      type2 = TREE_TYPE (rhs2_convop);
+-	      if (TYPE_PRECISION (type2) * 2 != TYPE_PRECISION (type))
+-		continue;
+-	    }
+-	  else if (TREE_CODE (rhs2) != INTEGER_CST)
+-	    continue;
+-
+-	  if (rhs1_stmt == NULL && rhs2_stmt == NULL)
+-	    continue;
+-
+-	  /* Verify that the machine can perform a widening multiply in this
+-	     mode/signedness combination, otherwise this transformation is
+-	     likely to pessimize code.  */
+-	  if ((rhs1_stmt == NULL || TYPE_UNSIGNED (type1))
+-	      && (rhs2_stmt == NULL || TYPE_UNSIGNED (type2))
+-	      && (optab_handler (umul_widen_optab, TYPE_MODE (type))
+-		  ->insn_code == CODE_FOR_nothing))
+-	    continue;
+-	  else if ((rhs1_stmt == NULL || !TYPE_UNSIGNED (type1))
+-		   && (rhs2_stmt == NULL || !TYPE_UNSIGNED (type2))
+-		   && (optab_handler (smul_widen_optab, TYPE_MODE (type))
+-		       ->insn_code == CODE_FOR_nothing))
+-	    continue;
+-	  else if (rhs1_stmt != NULL && rhs2_stmt != 0
+-		   && (TYPE_UNSIGNED (type1) != TYPE_UNSIGNED (type2))
+-		   && (optab_handler (usmul_widen_optab, TYPE_MODE (type))
+-		       ->insn_code == CODE_FOR_nothing))
+-	    continue;
+-
+-	  if ((rhs1_stmt == NULL && !int_fits_type_p (rhs1, type2))
+-	      || (rhs2_stmt == NULL && !int_fits_type_p (rhs2, type1)))
+-	    continue;
+-
+-	  if (rhs1_stmt == NULL)
+-	    gimple_assign_set_rhs1 (stmt, fold_convert (type2, rhs1));
+-	  else
+-	    gimple_assign_set_rhs1 (stmt, rhs1_convop);
+-	  if (rhs2_stmt == NULL)
+-	    gimple_assign_set_rhs2 (stmt, fold_convert (type1, rhs2));
+-	  else
+-	    gimple_assign_set_rhs2 (stmt, rhs2_convop);
+-	  gimple_assign_set_rhs_code (stmt, WIDEN_MULT_EXPR);
+-	  update_stmt (stmt);
+-	  changed = true;
++	  enum tree_code code;
++
++	  if (!is_gimple_assign (stmt))
++	    continue;
++
++	  code = gimple_assign_rhs_code (stmt);
++	  if (code == MULT_EXPR)
++	    changed |= convert_mult_to_widen (stmt);
++	  else if (code == PLUS_EXPR || code == MINUS_EXPR)
++	    changed |= convert_plusminus_to_widen (&gsi, stmt, code);
+ 	}
+     }
++
+   return (changed ? TODO_dump_func | TODO_update_ssa | TODO_verify_ssa
+ 	  | TODO_verify_stmts : 0);
+ }
+
+=== modified file 'gcc/tree-ssa-operands.c'
+--- old/gcc/tree-ssa-operands.c	2010-04-02 18:54:46 +0000
++++ new/gcc/tree-ssa-operands.c	2010-09-16 09:15:46 +0000
+@@ -994,11 +994,13 @@
+ 
+     case DOT_PROD_EXPR:
+     case REALIGN_LOAD_EXPR:
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
+       {
+ 	get_expr_operands (stmt, &TREE_OPERAND (expr, 0), flags);
+-        get_expr_operands (stmt, &TREE_OPERAND (expr, 1), flags);
+-        get_expr_operands (stmt, &TREE_OPERAND (expr, 2), flags);
+-        return;
++	get_expr_operands (stmt, &TREE_OPERAND (expr, 1), flags);
++	get_expr_operands (stmt, &TREE_OPERAND (expr, 2), flags);
++	return;
+       }
+ 
+     case FUNCTION_DECL:
+
+=== modified file 'gcc/tree-ssa-sccvn.c'
+--- old/gcc/tree-ssa-sccvn.c	2010-05-14 11:40:18 +0000
++++ new/gcc/tree-ssa-sccvn.c	2010-09-16 09:15:46 +0000
+@@ -2277,6 +2277,10 @@
+     case GIMPLE_BINARY_RHS:
+       return (is_gimple_min_invariant (gimple_assign_rhs1 (stmt))
+ 	      || is_gimple_min_invariant (gimple_assign_rhs2 (stmt)));
++    case GIMPLE_TERNARY_RHS:
++      return (is_gimple_min_invariant (gimple_assign_rhs1 (stmt))
++	      || is_gimple_min_invariant (gimple_assign_rhs2 (stmt))
++	      || is_gimple_min_invariant (gimple_assign_rhs3 (stmt)));
+     case GIMPLE_SINGLE_RHS:
+       /* Constants inside reference ops are rarely interesting, but
+ 	 it can take a lot of looking to find them.  */
+
+=== modified file 'gcc/tree-ssa-threadedge.c'
+--- old/gcc/tree-ssa-threadedge.c	2009-11-25 10:55:54 +0000
++++ new/gcc/tree-ssa-threadedge.c	2010-09-16 09:15:46 +0000
+@@ -247,14 +247,14 @@
+ 
+         return fold (rhs);
+       }
+-      break;
++
+     case GIMPLE_UNARY_RHS:
+       {
+         tree lhs = gimple_assign_lhs (stmt);
+         tree op0 = gimple_assign_rhs1 (stmt);
+         return fold_unary (subcode, TREE_TYPE (lhs), op0);
+       }
+-      break;
++
+     case GIMPLE_BINARY_RHS:
+       {
+         tree lhs = gimple_assign_lhs (stmt);
+@@ -262,7 +262,16 @@
+         tree op1 = gimple_assign_rhs2 (stmt);
+         return fold_binary (subcode, TREE_TYPE (lhs), op0, op1);
+       }
+-      break;
++
++    case GIMPLE_TERNARY_RHS:
++      {
++        tree lhs = gimple_assign_lhs (stmt);
++        tree op0 = gimple_assign_rhs1 (stmt);
++        tree op1 = gimple_assign_rhs2 (stmt);
++        tree op2 = gimple_assign_rhs3 (stmt);
++        return fold_ternary (subcode, TREE_TYPE (lhs), op0, op1, op2);
++      }
++
+     default:
+       gcc_unreachable ();
+     }
+
+=== modified file 'gcc/tree-vrp.c'
+--- old/gcc/tree-vrp.c	2010-06-14 14:23:31 +0000
++++ new/gcc/tree-vrp.c	2010-09-16 09:15:46 +0000
+@@ -864,6 +864,8 @@
+ 					      gimple_assign_rhs1 (stmt),
+ 					      gimple_assign_rhs2 (stmt),
+ 					      strict_overflow_p);
++    case GIMPLE_TERNARY_RHS:
++      return false;
+     case GIMPLE_SINGLE_RHS:
+       return tree_single_nonnegative_warnv_p (gimple_assign_rhs1 (stmt),
+ 					      strict_overflow_p);
+@@ -935,6 +937,8 @@
+ 					  gimple_assign_rhs1 (stmt),
+ 					  gimple_assign_rhs2 (stmt),
+ 					  strict_overflow_p);
++    case GIMPLE_TERNARY_RHS:
++      return false;
+     case GIMPLE_SINGLE_RHS:
+       return tree_single_nonzero_warnv_p (gimple_assign_rhs1 (stmt),
+ 					  strict_overflow_p);
+
+=== modified file 'gcc/tree.c'
+--- old/gcc/tree.c	2010-08-10 13:31:21 +0000
++++ new/gcc/tree.c	2010-09-16 09:15:46 +0000
+@@ -6538,6 +6538,23 @@
+   return false;
+ }
+ 
++/* Return true if CODE represents a ternary tree code for which the
++   first two operands are commutative.  Otherwise return false.  */
++bool
++commutative_ternary_tree_code (enum tree_code code)
++{
++  switch (code)
++    {
++    case WIDEN_MULT_PLUS_EXPR:
++    case WIDEN_MULT_MINUS_EXPR:
++      return true;
++
++    default:
++      break;
++    }
++  return false;
++}
++
+ /* Generate a hash value for an expression.  This can be used iteratively
+    by passing a previous result as the VAL argument.
+ 
+
+=== modified file 'gcc/tree.def'
+--- old/gcc/tree.def	2010-04-02 18:54:46 +0000
++++ new/gcc/tree.def	2010-09-16 09:15:46 +0000
+@@ -1083,6 +1083,18 @@
+    the arguments from type t1 to type t2, and then multiplying them.  */
+ DEFTREECODE (WIDEN_MULT_EXPR, "widen_mult_expr", tcc_binary, 2)
+ 
++/* Widening multiply-accumulate.
++   The first two arguments are of type t1.
++   The third argument and the result are of type t2, such as t2 is at least
++   twice the size of t1.  t1 and t2 must be integral or fixed-point types.
++   The expression is equivalent to a WIDEN_MULT_EXPR operation
++   of the first two operands followed by an add or subtract of the third
++   operand.  */
++DEFTREECODE (WIDEN_MULT_PLUS_EXPR, "widen_mult_plus_expr", tcc_expression, 3)
++/* This is like the above, except in the final expression the multiply result
++   is subtracted from t3.  */
++DEFTREECODE (WIDEN_MULT_MINUS_EXPR, "widen_mult_plus_expr", tcc_expression, 3)
++
+ /* Whole vector left/right shift in bits.
+    Operand 0 is a vector to be shifted.
+    Operand 1 is an integer shift amount in bits.  */
+
+=== modified file 'gcc/tree.h'
+--- old/gcc/tree.h	2010-08-10 13:31:21 +0000
++++ new/gcc/tree.h	2010-09-16 09:15:46 +0000
+@@ -4705,6 +4705,7 @@
+ extern int type_num_arguments (const_tree);
+ extern bool associative_tree_code (enum tree_code);
+ extern bool commutative_tree_code (enum tree_code);
++extern bool commutative_ternary_tree_code (enum tree_code);
+ extern tree upper_bound_in_type (tree, tree);
+ extern tree lower_bound_in_type (tree, tree);
+ extern int operand_equal_for_phi_arg_p (const_tree, const_tree);
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99397.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99397.patch
new file mode 100644
index 0000000000..e795d54e0f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99397.patch
@@ -0,0 +1,3565 @@
+2010-09-16  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from FSF:
+
+	2010-09-01  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/arm/neon-schedgen.ml (core): New type.
+	(allCores): List of supported cores.
+	(availability_table): Add supported cores.
+	(collate_bypasses): Accept core as a parameter.
+	(worst_case_latencies_and_bypasses): Accept core as a
+	 parameter.
+	(emit_insn_reservations): Accept core as a parameter.
+	Use tuneStr and coreStr to get tune attribute and prefix
+	for functional units.
+	(emit_bypasses): Accept core name and use it.
+	(calculate_per_core_availability_table): New.
+	(filter_core): New.
+	(calculate_core_availability_table): New.
+	(main): Use calculate_core_availablity_table.
+	* config/arm/cortex-a8-neon.md: Update copyright year.
+	Regenerated from ml file and merged in.
+	(neon_mrrc, neon_mrc): Rename to cortex_a8_neon_mrrc and
+	cortex_a8_neon_mrc.
+
+	2010-09-10  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/arm/neon-schedgen.ml (allCores): Add support for
+	Cortex-A9.
+	* config/arm/cortex-a9-neon.md: New and partially generated.
+	* config/arm/cortex-a9.md (cortex_a9_dp): Adjust for Neon.
+
+ 2010-09-15  Chung-Lin Tang  <cltang@codesourcery.com>
+ 
+ 	Issue #9441
+
+=== modified file 'gcc/config/arm/cortex-a8-neon.md'
+--- old/gcc/config/arm/cortex-a8-neon.md	2009-02-20 15:20:38 +0000
++++ new/gcc/config/arm/cortex-a8-neon.md	2010-09-16 09:47:44 +0000
+@@ -182,12 +182,12 @@
+ 
+ ;; NEON -> core transfers.
+ 
+-(define_insn_reservation "neon_mrc" 20
++(define_insn_reservation "cortex_a8_neon_mrc" 20
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mrc"))
+   "cortex_a8_neon_ls")
+ 
+-(define_insn_reservation "neon_mrrc" 21
++(define_insn_reservation "cortex_a8_neon_mrrc" 21
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mrrc"))
+   "cortex_a8_neon_ls_2")
+@@ -196,48 +196,48 @@
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N3.
+-(define_insn_reservation "neon_int_1" 3
++(define_insn_reservation "cortex_a8_neon_int_1" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_int_1"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their (D|Q)m operands at N1,
+ ;; their (D|Q)n operands at N2, and produce a result at N3.
+-(define_insn_reservation "neon_int_2" 3
++(define_insn_reservation "cortex_a8_neon_int_2" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_int_2"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N3.
+-(define_insn_reservation "neon_int_3" 3
++(define_insn_reservation "cortex_a8_neon_int_3" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_int_3"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N4.
+-(define_insn_reservation "neon_int_4" 4
++(define_insn_reservation "cortex_a8_neon_int_4" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_int_4"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their (D|Q)m operands at N1,
+ ;; their (D|Q)n operands at N2, and produce a result at N4.
+-(define_insn_reservation "neon_int_5" 4
++(define_insn_reservation "cortex_a8_neon_int_5" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_int_5"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N4.
+-(define_insn_reservation "neon_vqneg_vqabs" 4
++(define_insn_reservation "cortex_a8_neon_vqneg_vqabs" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vqneg_vqabs"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation produce a result at N3.
+-(define_insn_reservation "neon_vmov" 3
++(define_insn_reservation "cortex_a8_neon_vmov" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vmov"))
+   "cortex_a8_neon_dp")
+@@ -245,7 +245,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N6.
+-(define_insn_reservation "neon_vaba" 6
++(define_insn_reservation "cortex_a8_neon_vaba" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vaba"))
+   "cortex_a8_neon_dp")
+@@ -253,35 +253,35 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N6 on cycle 2.
+-(define_insn_reservation "neon_vaba_qqq" 7
++(define_insn_reservation "cortex_a8_neon_vaba_qqq" 7
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vaba_qqq"))
+   "cortex_a8_neon_dp_2")
+ 
+ ;; Instructions using this reservation read their (D|Q)m operands at N1,
+ ;; their (D|Q)d operands at N3, and produce a result at N6.
+-(define_insn_reservation "neon_vsma" 6
++(define_insn_reservation "cortex_a8_neon_vsma" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vsma"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N6.
+-(define_insn_reservation "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6
++(define_insn_reservation "cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N6 on cycle 2.
+-(define_insn_reservation "neon_mul_qqq_8_16_32_ddd_32" 7
++(define_insn_reservation "cortex_a8_neon_mul_qqq_8_16_32_ddd_32" 7
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32"))
+   "cortex_a8_neon_dp_2")
+ 
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 2.
+-(define_insn_reservation "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7
++(define_insn_reservation "cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"))
+   "cortex_a8_neon_dp_2")
+@@ -289,7 +289,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
+ ;; produce a result at N6.
+-(define_insn_reservation "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6
++(define_insn_reservation "cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"))
+   "cortex_a8_neon_dp")
+@@ -297,7 +297,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
+ ;; produce a result at N6 on cycle 2.
+-(define_insn_reservation "neon_mla_qqq_8_16" 7
++(define_insn_reservation "cortex_a8_neon_mla_qqq_8_16" 7
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mla_qqq_8_16"))
+   "cortex_a8_neon_dp_2")
+@@ -305,7 +305,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N6 on cycle 2.
+-(define_insn_reservation "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7
++(define_insn_reservation "cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))
+   "cortex_a8_neon_dp_2")
+@@ -313,21 +313,21 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N6 on cycle 4.
+-(define_insn_reservation "neon_mla_qqq_32_qqd_32_scalar" 9
++(define_insn_reservation "cortex_a8_neon_mla_qqq_32_qqd_32_scalar" 9
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mla_qqq_32_qqd_32_scalar"))
+   "cortex_a8_neon_dp_4")
+ 
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, and produce a result at N6.
+-(define_insn_reservation "neon_mul_ddd_16_scalar_32_16_long_scalar" 6
++(define_insn_reservation "cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 4.
+-(define_insn_reservation "neon_mul_qqd_32_scalar" 9
++(define_insn_reservation "cortex_a8_neon_mul_qqd_32_scalar" 9
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mul_qqd_32_scalar"))
+   "cortex_a8_neon_dp_4")
+@@ -335,84 +335,84 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N6.
+-(define_insn_reservation "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6
++(define_insn_reservation "cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N3.
+-(define_insn_reservation "neon_shift_1" 3
++(define_insn_reservation "cortex_a8_neon_shift_1" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_shift_1"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N4.
+-(define_insn_reservation "neon_shift_2" 4
++(define_insn_reservation "cortex_a8_neon_shift_2" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_shift_2"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N3 on cycle 2.
+-(define_insn_reservation "neon_shift_3" 4
++(define_insn_reservation "cortex_a8_neon_shift_3" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_shift_3"))
+   "cortex_a8_neon_dp_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N1.
+-(define_insn_reservation "neon_vshl_ddd" 1
++(define_insn_reservation "cortex_a8_neon_vshl_ddd" 1
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vshl_ddd"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N4 on cycle 2.
+-(define_insn_reservation "neon_vqshl_vrshl_vqrshl_qqq" 5
++(define_insn_reservation "cortex_a8_neon_vqshl_vrshl_vqrshl_qqq" 5
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vqshl_vrshl_vqrshl_qqq"))
+   "cortex_a8_neon_dp_2")
+ 
+ ;; Instructions using this reservation read their (D|Q)m operands at N1,
+ ;; their (D|Q)d operands at N3, and produce a result at N6.
+-(define_insn_reservation "neon_vsra_vrsra" 6
++(define_insn_reservation "cortex_a8_neon_vsra_vrsra" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vsra_vrsra"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N5.
+-(define_insn_reservation "neon_fp_vadd_ddd_vabs_dd" 5
++(define_insn_reservation "cortex_a8_neon_fp_vadd_ddd_vabs_dd" 5
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vadd_ddd_vabs_dd"))
+   "cortex_a8_neon_fadd")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N5 on cycle 2.
+-(define_insn_reservation "neon_fp_vadd_qqq_vabs_qq" 6
++(define_insn_reservation "cortex_a8_neon_fp_vadd_qqq_vabs_qq" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vadd_qqq_vabs_qq"))
+   "cortex_a8_neon_fadd_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N5.
+-(define_insn_reservation "neon_fp_vsum" 5
++(define_insn_reservation "cortex_a8_neon_fp_vsum" 5
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vsum"))
+   "cortex_a8_neon_fadd")
+ 
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, and produce a result at N5.
+-(define_insn_reservation "neon_fp_vmul_ddd" 5
++(define_insn_reservation "cortex_a8_neon_fp_vmul_ddd" 5
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmul_ddd"))
+   "cortex_a8_neon_dp")
+ 
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, and produce a result at N5 on cycle 2.
+-(define_insn_reservation "neon_fp_vmul_qqd" 6
++(define_insn_reservation "cortex_a8_neon_fp_vmul_qqd" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmul_qqd"))
+   "cortex_a8_neon_dp_2")
+@@ -420,7 +420,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
+ ;; produce a result at N9.
+-(define_insn_reservation "neon_fp_vmla_ddd" 9
++(define_insn_reservation "cortex_a8_neon_fp_vmla_ddd" 9
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmla_ddd"))
+   "cortex_a8_neon_fmul_then_fadd")
+@@ -428,7 +428,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
+ ;; produce a result at N9 on cycle 2.
+-(define_insn_reservation "neon_fp_vmla_qqq" 10
++(define_insn_reservation "cortex_a8_neon_fp_vmla_qqq" 10
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmla_qqq"))
+   "cortex_a8_neon_fmul_then_fadd_2")
+@@ -436,7 +436,7 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N9.
+-(define_insn_reservation "neon_fp_vmla_ddd_scalar" 9
++(define_insn_reservation "cortex_a8_neon_fp_vmla_ddd_scalar" 9
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmla_ddd_scalar"))
+   "cortex_a8_neon_fmul_then_fadd")
+@@ -444,869 +444,869 @@
+ ;; Instructions using this reservation read their (D|Q)n operands at N2,
+ ;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
+ ;; produce a result at N9 on cycle 2.
+-(define_insn_reservation "neon_fp_vmla_qqq_scalar" 10
++(define_insn_reservation "cortex_a8_neon_fp_vmla_qqq_scalar" 10
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vmla_qqq_scalar"))
+   "cortex_a8_neon_fmul_then_fadd_2")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N9.
+-(define_insn_reservation "neon_fp_vrecps_vrsqrts_ddd" 9
++(define_insn_reservation "cortex_a8_neon_fp_vrecps_vrsqrts_ddd" 9
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_ddd"))
+   "cortex_a8_neon_fmul_then_fadd")
+ 
+ ;; Instructions using this reservation read their source operands at N2, and
+ ;; produce a result at N9 on cycle 2.
+-(define_insn_reservation "neon_fp_vrecps_vrsqrts_qqq" 10
++(define_insn_reservation "cortex_a8_neon_fp_vrecps_vrsqrts_qqq" 10
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_qqq"))
+   "cortex_a8_neon_fmul_then_fadd_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N2.
+-(define_insn_reservation "neon_bp_simple" 2
++(define_insn_reservation "cortex_a8_neon_bp_simple" 2
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_bp_simple"))
+   "cortex_a8_neon_perm")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N2 on cycle 2.
+-(define_insn_reservation "neon_bp_2cycle" 3
++(define_insn_reservation "cortex_a8_neon_bp_2cycle" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_bp_2cycle"))
+   "cortex_a8_neon_perm_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N2 on cycle 3.
+-(define_insn_reservation "neon_bp_3cycle" 4
++(define_insn_reservation "cortex_a8_neon_bp_3cycle" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_bp_3cycle"))
+   "cortex_a8_neon_perm_3")
+ 
+ ;; Instructions using this reservation produce a result at N1.
+-(define_insn_reservation "neon_ldr" 1
++(define_insn_reservation "cortex_a8_neon_ldr" 1
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_ldr"))
+   "cortex_a8_neon_ls")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_str" 0
++(define_insn_reservation "cortex_a8_neon_str" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_str"))
+   "cortex_a8_neon_ls")
+ 
+ ;; Instructions using this reservation produce a result at N1 on cycle 2.
+-(define_insn_reservation "neon_vld1_1_2_regs" 2
++(define_insn_reservation "cortex_a8_neon_vld1_1_2_regs" 2
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld1_1_2_regs"))
+   "cortex_a8_neon_ls_2")
+ 
+ ;; Instructions using this reservation produce a result at N1 on cycle 3.
+-(define_insn_reservation "neon_vld1_3_4_regs" 3
++(define_insn_reservation "cortex_a8_neon_vld1_3_4_regs" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld1_3_4_regs"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation produce a result at N2 on cycle 2.
+-(define_insn_reservation "neon_vld2_2_regs_vld1_vld2_all_lanes" 3
++(define_insn_reservation "cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes"))
+   "cortex_a8_neon_ls_2")
+ 
+ ;; Instructions using this reservation produce a result at N2 on cycle 3.
+-(define_insn_reservation "neon_vld2_4_regs" 4
++(define_insn_reservation "cortex_a8_neon_vld2_4_regs" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld2_4_regs"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation produce a result at N2 on cycle 4.
+-(define_insn_reservation "neon_vld3_vld4" 5
++(define_insn_reservation "cortex_a8_neon_vld3_vld4" 5
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld3_vld4"))
+   "cortex_a8_neon_ls_4")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst1_1_2_regs_vst2_2_regs" 0
++(define_insn_reservation "cortex_a8_neon_vst1_1_2_regs_vst2_2_regs" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs"))
+   "cortex_a8_neon_ls_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst1_3_4_regs" 0
++(define_insn_reservation "cortex_a8_neon_vst1_3_4_regs" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst1_3_4_regs"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst2_4_regs_vst3_vst4" 0
++(define_insn_reservation "cortex_a8_neon_vst2_4_regs_vst3_vst4" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst2_4_regs_vst3_vst4"))
+   "cortex_a8_neon_ls_4")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst3_vst4" 0
++(define_insn_reservation "cortex_a8_neon_vst3_vst4" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst3_vst4"))
+   "cortex_a8_neon_ls_4")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N2 on cycle 3.
+-(define_insn_reservation "neon_vld1_vld2_lane" 4
++(define_insn_reservation "cortex_a8_neon_vld1_vld2_lane" 4
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld1_vld2_lane"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation read their source operands at N1, and
+ ;; produce a result at N2 on cycle 5.
+-(define_insn_reservation "neon_vld3_vld4_lane" 6
++(define_insn_reservation "cortex_a8_neon_vld3_vld4_lane" 6
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld3_vld4_lane"))
+   "cortex_a8_neon_ls_5")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst1_vst2_lane" 0
++(define_insn_reservation "cortex_a8_neon_vst1_vst2_lane" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst1_vst2_lane"))
+   "cortex_a8_neon_ls_2")
+ 
+ ;; Instructions using this reservation read their source operands at N1.
+-(define_insn_reservation "neon_vst3_vst4_lane" 0
++(define_insn_reservation "cortex_a8_neon_vst3_vst4_lane" 0
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vst3_vst4_lane"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation produce a result at N2 on cycle 2.
+-(define_insn_reservation "neon_vld3_vld4_all_lanes" 3
++(define_insn_reservation "cortex_a8_neon_vld3_vld4_all_lanes" 3
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_vld3_vld4_all_lanes"))
+   "cortex_a8_neon_ls_3")
+ 
+ ;; Instructions using this reservation produce a result at N2.
+-(define_insn_reservation "neon_mcr" 2
++(define_insn_reservation "cortex_a8_neon_mcr" 2
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mcr"))
+   "cortex_a8_neon_perm")
+ 
+ ;; Instructions using this reservation produce a result at N2.
+-(define_insn_reservation "neon_mcr_2_mcrr" 2
++(define_insn_reservation "cortex_a8_neon_mcr_2_mcrr" 2
+   (and (eq_attr "tune" "cortexa8")
+        (eq_attr "neon_type" "neon_mcr_2_mcrr"))
+   "cortex_a8_neon_perm_2")
+ 
+ ;; Exceptions to the default latencies.
+ 
+-(define_bypass 1 "neon_mcr_2_mcrr"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 1 "neon_mcr"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_vld3_vld4_all_lanes"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_vld3_vld4_lane"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_vld1_vld2_lane"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 4 "neon_vld3_vld4"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_vld2_4_regs"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_vld2_2_regs_vld1_vld2_all_lanes"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_vld1_3_4_regs"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 1 "neon_vld1_1_2_regs"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 0 "neon_ldr"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_bp_3cycle"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_bp_2cycle"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 1 "neon_bp_simple"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 9 "neon_fp_vrecps_vrsqrts_qqq"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 8 "neon_fp_vrecps_vrsqrts_ddd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 9 "neon_fp_vmla_qqq_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 8 "neon_fp_vmla_ddd_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 9 "neon_fp_vmla_qqq"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 8 "neon_fp_vmla_ddd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_fp_vmul_qqd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 4 "neon_fp_vmul_ddd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 4 "neon_fp_vsum"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_fp_vadd_qqq_vabs_qq"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 4 "neon_fp_vadd_ddd_vabs_dd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_vsra_vrsra"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 4 "neon_vqshl_vrshl_vqrshl_qqq"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 0 "neon_vshl_ddd"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_shift_3"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_shift_2"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_shift_1"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 8 "neon_mul_qqd_32_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_mul_ddd_16_scalar_32_16_long_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 8 "neon_mla_qqq_32_qqd_32_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 6 "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 6 "neon_mla_qqq_8_16"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 6 "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 6 "neon_mul_qqq_8_16_32_ddd_32"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_vsma"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 6 "neon_vaba_qqq"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 5 "neon_vaba"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_vmov"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_vqneg_vqabs"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_int_5"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 3 "neon_int_4"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_int_3"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_int_2"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
+-
+-(define_bypass 2 "neon_int_1"
+-               "neon_int_1,\
+-               neon_int_4,\
+-               neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mul_qqq_8_16_32_ddd_32,\
+-               neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
+-               neon_mla_qqq_8_16,\
+-               neon_fp_vadd_ddd_vabs_dd,\
+-               neon_fp_vadd_qqq_vabs_qq,\
+-               neon_fp_vmla_ddd,\
+-               neon_fp_vmla_qqq,\
+-               neon_fp_vrecps_vrsqrts_ddd,\
+-               neon_fp_vrecps_vrsqrts_qqq")
++(define_bypass 1 "cortex_a8_neon_mcr_2_mcrr"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a8_neon_mcr"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_vld3_vld4_all_lanes"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_vld3_vld4_lane"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_vld1_vld2_lane"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a8_neon_vld3_vld4"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_vld2_4_regs"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_vld2_2_regs_vld1_vld2_all_lanes"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_vld1_3_4_regs"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a8_neon_vld1_1_2_regs"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 0 "cortex_a8_neon_ldr"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_bp_3cycle"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_bp_2cycle"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a8_neon_bp_simple"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a8_neon_fp_vrecps_vrsqrts_qqq"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a8_neon_fp_vrecps_vrsqrts_ddd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a8_neon_fp_vmla_qqq_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a8_neon_fp_vmla_ddd_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a8_neon_fp_vmla_qqq"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a8_neon_fp_vmla_ddd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_fp_vmul_qqd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a8_neon_fp_vmul_ddd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a8_neon_fp_vsum"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_fp_vadd_qqq_vabs_qq"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a8_neon_fp_vadd_ddd_vabs_dd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_vsra_vrsra"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a8_neon_vqshl_vrshl_vqrshl_qqq"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 0 "cortex_a8_neon_vshl_ddd"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_shift_3"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_shift_2"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_shift_1"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a8_neon_mul_qqd_32_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_mul_ddd_16_scalar_32_16_long_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a8_neon_mla_qqq_32_qqd_32_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a8_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a8_neon_mla_qqq_8_16"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a8_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a8_neon_mul_qqq_8_16_32_ddd_32"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_vsma"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a8_neon_vaba_qqq"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a8_neon_vaba"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_vmov"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_vqneg_vqabs"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_int_5"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a8_neon_int_4"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_int_3"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_int_2"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a8_neon_int_1"
++               "cortex_a8_neon_int_1,\
++               cortex_a8_neon_int_4,\
++               cortex_a8_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a8_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a8_neon_mla_qqq_8_16,\
++               cortex_a8_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a8_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a8_neon_fp_vmla_ddd,\
++               cortex_a8_neon_fp_vmla_qqq,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a8_neon_fp_vrecps_vrsqrts_qqq")
+ 
+
+=== added file 'gcc/config/arm/cortex-a9-neon.md'
+--- old/gcc/config/arm/cortex-a9-neon.md	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/cortex-a9-neon.md	2010-09-16 09:47:44 +0000
+@@ -0,0 +1,1237 @@
++;; ARM Cortex-A9 pipeline description
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;;
++;; Neon pipeline description contributed by ARM Ltd.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.
++
++
++(define_automaton "cortex_a9_neon")
++
++;; Only one instruction can be issued per cycle.
++(define_cpu_unit "cortex_a9_neon_issue_perm" "cortex_a9_neon")
++
++;; Only one data-processing instruction can be issued per cycle.
++(define_cpu_unit "cortex_a9_neon_issue_dp" "cortex_a9_neon")
++
++;; We need a special mutual exclusion (to be used in addition to
++;; cortex_a9_neon_issue_dp) for the case when an instruction such as
++;; vmla.f is forwarded from E5 of the floating-point multiply pipeline to
++;; E2 of the floating-point add pipeline.  On the cycle previous to that
++;; forward we must prevent issue of any instruction to the floating-point
++;; add pipeline, but still allow issue of a data-processing instruction
++;; to any of the other pipelines.
++(define_cpu_unit "cortex_a9_neon_issue_fadd" "cortex_a9_neon")
++(define_cpu_unit "cortex_a9_neon_mcr" "cortex_a9_neon")
++
++
++;; Patterns of reservation.
++;; We model the NEON issue units as running in parallel with the core ones.
++;; We assume that multi-cycle NEON instructions get decomposed into
++;; micro-ops as they are issued into the NEON pipeline.
++
++(define_reservation "cortex_a9_neon_dp"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp")
++(define_reservation "cortex_a9_neon_dp_2"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
++                     cortex_a9_neon_issue_dp")
++(define_reservation "cortex_a9_neon_dp_4"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
++                     cortex_a9_neon_issue_dp + cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp + cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp")
++
++(define_reservation "cortex_a9_neon_fadd"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp +  \
++                     cortex_a9_neon_issue_fadd")
++(define_reservation "cortex_a9_neon_fadd_2"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
++                     cortex_a9_neon_issue_fadd,\
++                     cortex_a9_neon_issue_dp")
++
++(define_reservation "cortex_a9_neon_perm"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm")
++(define_reservation "cortex_a9_neon_perm_2"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,  \
++                     cortex_a9_neon_issue_perm")
++(define_reservation "cortex_a9_neon_perm_3"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_perm")
++
++(define_reservation "cortex_a9_neon_ls"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm+cortex_a9_ls")
++(define_reservation "cortex_a9_neon_ls_2"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_perm")
++(define_reservation "cortex_a9_neon_ls_3"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_perm")
++(define_reservation "cortex_a9_neon_ls_4"
++                    "ca9_issue_vfp_neon+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_perm")
++(define_reservation "cortex_a9_neon_ls_5"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_dp+cortex_a9_neon_issue_perm,\
++                     cortex_a9_neon_issue_perm")
++
++(define_reservation "cortex_a9_neon_fmul_then_fadd"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
++		     nothing*3,\
++		     cortex_a9_neon_issue_fadd")
++(define_reservation "cortex_a9_neon_fmul_then_fadd_2"
++                    "ca9_issue_vfp_neon + cortex_a9_neon_issue_dp,\
++		     cortex_a9_neon_issue_dp,\
++		     nothing*2,\
++		     cortex_a9_neon_issue_fadd,\
++		     cortex_a9_neon_issue_fadd")
++
++
++;; NEON -> core transfers.
++(define_insn_reservation "ca9_neon_mrc" 1
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mrc"))
++  "ca9_issue_vfp_neon + cortex_a9_neon_mcr")
++
++(define_insn_reservation "ca9_neon_mrrc" 1
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mrrc"))
++  "ca9_issue_vfp_neon + cortex_a9_neon_mcr")
++
++;; The remainder of this file is auto-generated by neon-schedgen.
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N3.
++(define_insn_reservation "cortex_a9_neon_int_1" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_int_1"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)m operands at N1,
++;; their (D|Q)n operands at N2, and produce a result at N3.
++(define_insn_reservation "cortex_a9_neon_int_2" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_int_2"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N3.
++(define_insn_reservation "cortex_a9_neon_int_3" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_int_3"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N4.
++(define_insn_reservation "cortex_a9_neon_int_4" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_int_4"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)m operands at N1,
++;; their (D|Q)n operands at N2, and produce a result at N4.
++(define_insn_reservation "cortex_a9_neon_int_5" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_int_5"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N4.
++(define_insn_reservation "cortex_a9_neon_vqneg_vqabs" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vqneg_vqabs"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation produce a result at N3.
++(define_insn_reservation "cortex_a9_neon_vmov" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vmov"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_vaba" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vaba"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N6 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_vaba_qqq" 7
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vaba_qqq"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)m operands at N1,
++;; their (D|Q)d operands at N3, and produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_vsma" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vsma"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N6 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_mul_qqq_8_16_32_ddd_32" 7
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mul_qqq_8_16_32_ddd_32"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar" 7
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
++;; produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
++;; produce a result at N6 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_mla_qqq_8_16" 7
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mla_qqq_8_16"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N6 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long" 7
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N6 on cycle 4.
++(define_insn_reservation "cortex_a9_neon_mla_qqq_32_qqd_32_scalar" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mla_qqq_32_qqd_32_scalar"))
++  "cortex_a9_neon_dp_4")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, and produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mul_ddd_16_scalar_32_16_long_scalar"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, and produce a result at N6 on cycle 4.
++(define_insn_reservation "cortex_a9_neon_mul_qqd_32_scalar" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mul_qqd_32_scalar"))
++  "cortex_a9_neon_dp_4")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N3.
++(define_insn_reservation "cortex_a9_neon_shift_1" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_shift_1"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N4.
++(define_insn_reservation "cortex_a9_neon_shift_2" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_shift_2"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N3 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_shift_3" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_shift_3"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N1.
++(define_insn_reservation "cortex_a9_neon_vshl_ddd" 1
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vshl_ddd"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N4 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vqshl_vrshl_vqrshl_qqq"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)m operands at N1,
++;; their (D|Q)d operands at N3, and produce a result at N6.
++(define_insn_reservation "cortex_a9_neon_vsra_vrsra" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vsra_vrsra"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N5.
++(define_insn_reservation "cortex_a9_neon_fp_vadd_ddd_vabs_dd" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vadd_ddd_vabs_dd"))
++  "cortex_a9_neon_fadd")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N5 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_fp_vadd_qqq_vabs_qq" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vadd_qqq_vabs_qq"))
++  "cortex_a9_neon_fadd_2")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N5.
++(define_insn_reservation "cortex_a9_neon_fp_vsum" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vsum"))
++  "cortex_a9_neon_fadd")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, and produce a result at N5.
++(define_insn_reservation "cortex_a9_neon_fp_vmul_ddd" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmul_ddd"))
++  "cortex_a9_neon_dp")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, and produce a result at N5 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_fp_vmul_qqd" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmul_qqd"))
++  "cortex_a9_neon_dp_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
++;; produce a result at N9.
++(define_insn_reservation "cortex_a9_neon_fp_vmla_ddd" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmla_ddd"))
++  "cortex_a9_neon_fmul_then_fadd")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N2, their (D|Q)d operands at N3, and
++;; produce a result at N9 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_fp_vmla_qqq" 10
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmla_qqq"))
++  "cortex_a9_neon_fmul_then_fadd_2")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N9.
++(define_insn_reservation "cortex_a9_neon_fp_vmla_ddd_scalar" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmla_ddd_scalar"))
++  "cortex_a9_neon_fmul_then_fadd")
++
++;; Instructions using this reservation read their (D|Q)n operands at N2,
++;; their (D|Q)m operands at N1, their (D|Q)d operands at N3, and
++;; produce a result at N9 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_fp_vmla_qqq_scalar" 10
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vmla_qqq_scalar"))
++  "cortex_a9_neon_fmul_then_fadd_2")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N9.
++(define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_ddd" 9
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_ddd"))
++  "cortex_a9_neon_fmul_then_fadd")
++
++;; Instructions using this reservation read their source operands at N2, and
++;; produce a result at N9 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_fp_vrecps_vrsqrts_qqq" 10
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_fp_vrecps_vrsqrts_qqq"))
++  "cortex_a9_neon_fmul_then_fadd_2")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N2.
++(define_insn_reservation "cortex_a9_neon_bp_simple" 2
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_bp_simple"))
++  "cortex_a9_neon_perm")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N2 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_bp_2cycle" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_bp_2cycle"))
++  "cortex_a9_neon_perm_2")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N2 on cycle 3.
++(define_insn_reservation "cortex_a9_neon_bp_3cycle" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_bp_3cycle"))
++  "cortex_a9_neon_perm_3")
++
++;; Instructions using this reservation produce a result at N1.
++(define_insn_reservation "cortex_a9_neon_ldr" 1
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_ldr"))
++  "cortex_a9_neon_ls")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_str" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_str"))
++  "cortex_a9_neon_ls")
++
++;; Instructions using this reservation produce a result at N1 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_vld1_1_2_regs" 2
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld1_1_2_regs"))
++  "cortex_a9_neon_ls_2")
++
++;; Instructions using this reservation produce a result at N1 on cycle 3.
++(define_insn_reservation "cortex_a9_neon_vld1_3_4_regs" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld1_3_4_regs"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation produce a result at N2 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld2_2_regs_vld1_vld2_all_lanes"))
++  "cortex_a9_neon_ls_2")
++
++;; Instructions using this reservation produce a result at N2 on cycle 3.
++(define_insn_reservation "cortex_a9_neon_vld2_4_regs" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld2_4_regs"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation produce a result at N2 on cycle 4.
++(define_insn_reservation "cortex_a9_neon_vld3_vld4" 5
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld3_vld4"))
++  "cortex_a9_neon_ls_4")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst1_1_2_regs_vst2_2_regs" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst1_1_2_regs_vst2_2_regs"))
++  "cortex_a9_neon_ls_2")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst1_3_4_regs" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst1_3_4_regs"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst2_4_regs_vst3_vst4" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst2_4_regs_vst3_vst4"))
++  "cortex_a9_neon_ls_4")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst3_vst4" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst3_vst4"))
++  "cortex_a9_neon_ls_4")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N2 on cycle 3.
++(define_insn_reservation "cortex_a9_neon_vld1_vld2_lane" 4
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld1_vld2_lane"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation read their source operands at N1, and
++;; produce a result at N2 on cycle 5.
++(define_insn_reservation "cortex_a9_neon_vld3_vld4_lane" 6
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld3_vld4_lane"))
++  "cortex_a9_neon_ls_5")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst1_vst2_lane" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst1_vst2_lane"))
++  "cortex_a9_neon_ls_2")
++
++;; Instructions using this reservation read their source operands at N1.
++(define_insn_reservation "cortex_a9_neon_vst3_vst4_lane" 0
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vst3_vst4_lane"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation produce a result at N2 on cycle 2.
++(define_insn_reservation "cortex_a9_neon_vld3_vld4_all_lanes" 3
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_vld3_vld4_all_lanes"))
++  "cortex_a9_neon_ls_3")
++
++;; Instructions using this reservation produce a result at N2.
++(define_insn_reservation "cortex_a9_neon_mcr" 2
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mcr"))
++  "cortex_a9_neon_perm")
++
++;; Instructions using this reservation produce a result at N2.
++(define_insn_reservation "cortex_a9_neon_mcr_2_mcrr" 2
++  (and (eq_attr "tune" "cortexa9")
++       (eq_attr "neon_type" "neon_mcr_2_mcrr"))
++  "cortex_a9_neon_perm_2")
++
++;; Exceptions to the default latencies.
++
++(define_bypass 1 "cortex_a9_neon_mcr_2_mcrr"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a9_neon_mcr"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_vld3_vld4_all_lanes"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_vld3_vld4_lane"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_vld1_vld2_lane"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a9_neon_vld3_vld4"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_vld2_4_regs"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_vld2_2_regs_vld1_vld2_all_lanes"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_vld1_3_4_regs"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a9_neon_vld1_1_2_regs"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 0 "cortex_a9_neon_ldr"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_bp_3cycle"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_bp_2cycle"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 1 "cortex_a9_neon_bp_simple"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a9_neon_fp_vrecps_vrsqrts_qqq"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a9_neon_fp_vrecps_vrsqrts_ddd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a9_neon_fp_vmla_qqq_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a9_neon_fp_vmla_ddd_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 9 "cortex_a9_neon_fp_vmla_qqq"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a9_neon_fp_vmla_ddd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_fp_vmul_qqd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a9_neon_fp_vmul_ddd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a9_neon_fp_vsum"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_fp_vadd_qqq_vabs_qq"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a9_neon_fp_vadd_ddd_vabs_dd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_vsra_vrsra"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 4 "cortex_a9_neon_vqshl_vrshl_vqrshl_qqq"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 0 "cortex_a9_neon_vshl_ddd"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_shift_3"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_shift_2"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_shift_1"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_mla_ddd_16_scalar_qdd_32_16_long_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a9_neon_mul_qqd_32_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_mul_ddd_16_scalar_32_16_long_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 8 "cortex_a9_neon_mla_qqq_32_qqd_32_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a9_neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a9_neon_mla_qqq_8_16"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a9_neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a9_neon_mul_qqq_8_16_32_ddd_32"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_vsma"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 6 "cortex_a9_neon_vaba_qqq"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 5 "cortex_a9_neon_vaba"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_vmov"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_vqneg_vqabs"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_int_5"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 3 "cortex_a9_neon_int_4"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_int_3"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_int_2"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
++(define_bypass 2 "cortex_a9_neon_int_1"
++               "cortex_a9_neon_int_1,\
++               cortex_a9_neon_int_4,\
++               cortex_a9_neon_mul_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mul_qqq_8_16_32_ddd_32,\
++               cortex_a9_neon_mla_ddd_8_16_qdd_16_8_long_32_16_long,\
++               cortex_a9_neon_mla_qqq_8_16,\
++               cortex_a9_neon_fp_vadd_ddd_vabs_dd,\
++               cortex_a9_neon_fp_vadd_qqq_vabs_qq,\
++               cortex_a9_neon_fp_vmla_ddd,\
++               cortex_a9_neon_fp_vmla_qqq,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_ddd,\
++               cortex_a9_neon_fp_vrecps_vrsqrts_qqq")
++
+
+=== modified file 'gcc/config/arm/cortex-a9.md'
+--- old/gcc/config/arm/cortex-a9.md	2010-08-24 13:15:54 +0000
++++ new/gcc/config/arm/cortex-a9.md	2010-09-16 09:47:44 +0000
+@@ -80,8 +80,9 @@
+ (define_insn_reservation "cortex_a9_dp" 2
+   (and (eq_attr "tune" "cortexa9")
+        (ior (eq_attr "type" "alu")
+-	    (and (eq_attr "type" "alu_shift_reg, alu_shift")
+-		 (eq_attr "insn" "mov"))))
++	    (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
++		 (eq_attr "insn" "mov"))
++		 (eq_attr "neon_type" "none"))))
+   "cortex_a9_p0_default|cortex_a9_p1_default")
+ 
+ ;; An instruction using the shifter will go down E1.
+
+=== modified file 'gcc/config/arm/neon-schedgen.ml'
+--- old/gcc/config/arm/neon-schedgen.ml	2010-04-02 18:54:46 +0000
++++ new/gcc/config/arm/neon-schedgen.ml	2010-09-16 09:47:44 +0000
+@@ -1,7 +1,6 @@
+ (* Emission of the core of the Cortex-A8 NEON scheduling description.
+    Copyright (C) 2007, 2010 Free Software Foundation, Inc.
+    Contributed by CodeSourcery.
+-
+    This file is part of GCC.
+ 
+    GCC is free software; you can redistribute it and/or modify it under
+@@ -21,7 +20,14 @@
+ 
+ (* This scheduling description generator works as follows.
+    - Each group of instructions has source and destination requirements
+-     specified.  The source requirements may be specified using
++     specified and a list of cores supported. This is then filtered
++     and per core scheduler descriptions are generated out.
++     The reservations generated are prefixed by the name of the
++     core and the check is performed on the basis of what the tuning
++     string is. Running this will generate Neon scheduler descriptions
++     for all cores supported.
++
++     The source requirements may be specified using
+      Source (the stage at which all source operands not otherwise
+      described are read), Source_m (the stage at which Rm operands are
+      read), Source_n (likewise for Rn) and Source_d (likewise for Rd).
+@@ -83,6 +89,17 @@
+ | Ls of int
+ | Fmul_then_fadd | Fmul_then_fadd_2
+ 
++type core = CortexA8 | CortexA9
++let allCores = [CortexA8; CortexA9]
++let coreStr = function
++    CortexA8 -> "cortex_a8"
++  | CortexA9 -> "cortex_a9"
++
++let tuneStr = function
++    CortexA8 -> "cortexa8"
++   | CortexA9 -> "cortexa9"
++
++
+ (* This table must be kept as short as possible by conflating
+    entries with the same availability behavior.
+ 
+@@ -90,129 +107,136 @@
+    Second components: availability requirements, in the order in which
+    they should appear in the comments in the .md file.
+    Third components: reservation info
++   Fourth components: List of supported cores.
+ *)
+ let availability_table = [
+   (* NEON integer ALU instructions.  *)
+   (* vbit vbif vbsl vorr vbic vnot vcls vclz vcnt vadd vand vorr
+      veor vbic vorn ddd qqq *)
+-  "neon_int_1", [Source n2; Dest n3], ALU;
++  "neon_int_1", [Source n2; Dest n3], ALU, allCores;
+   (* vadd vsub qqd vsub ddd qqq *)
+-  "neon_int_2", [Source_m n1; Source_n n2; Dest n3], ALU;
++  "neon_int_2", [Source_m n1; Source_n n2; Dest n3], ALU, allCores;
+   (* vsum vneg dd qq vadd vsub qdd *)
+-  "neon_int_3", [Source n1; Dest n3], ALU;
++  "neon_int_3", [Source n1; Dest n3], ALU, allCores;
+   (* vabs vceqz vcgez vcbtz vclez vcltz vadh vradh vsbh vrsbh dqq *)
+   (* vhadd vrhadd vqadd vtst ddd qqq *)
+-  "neon_int_4", [Source n2; Dest n4], ALU;
++  "neon_int_4", [Source n2; Dest n4], ALU, allCores;
+   (* vabd qdd vhsub vqsub vabd vceq vcge vcgt vmax vmin vfmx vfmn ddd ddd *)
+-  "neon_int_5", [Source_m n1; Source_n n2; Dest n4], ALU;
++  "neon_int_5", [Source_m n1; Source_n n2; Dest n4], ALU, allCores;
+   (* vqneg vqabs dd qq *)
+-  "neon_vqneg_vqabs", [Source n1; Dest n4], ALU;
++  "neon_vqneg_vqabs", [Source n1; Dest n4], ALU, allCores;
+   (* vmov vmvn *)
+-  "neon_vmov", [Dest n3], ALU;
++  "neon_vmov", [Dest n3], ALU, allCores;
+   (* vaba *)
+-  "neon_vaba", [Source_n n2; Source_m n1; Source_d n3; Dest n6], ALU;
++  "neon_vaba", [Source_n n2; Source_m n1; Source_d n3; Dest n6], ALU, allCores;
+   "neon_vaba_qqq",
+-    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], ALU_2cycle;
++    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], 
++   ALU_2cycle, allCores;
+   (* vsma *)
+-  "neon_vsma", [Source_m n1; Source_d n3; Dest n6], ALU;
++  "neon_vsma", [Source_m n1; Source_d n3; Dest n6], ALU, allCores;
+ 
+   (* NEON integer multiply instructions.  *)
+   (* vmul, vqdmlh, vqrdmlh *)
+   (* vmul, vqdmul, qdd 16/8 long 32/16 long *)
+-  "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long", [Source n2; Dest n6], Mul;
+-  "neon_mul_qqq_8_16_32_ddd_32", [Source n2; Dest_n_after (1, n6)], Mul_2cycle;
++  "neon_mul_ddd_8_16_qdd_16_8_long_32_16_long", [Source n2; Dest n6], 
++   Mul, allCores;
++  "neon_mul_qqq_8_16_32_ddd_32", [Source n2; Dest_n_after (1, n6)], 
++   Mul_2cycle, allCores;
+   (* vmul, vqdmul again *)
+   "neon_mul_qdd_64_32_long_qqd_16_ddd_32_scalar_64_32_long_scalar",
+-    [Source_n n2; Source_m n1; Dest_n_after (1, n6)], Mul_2cycle;
++    [Source_n n2; Source_m n1; Dest_n_after (1, n6)], Mul_2cycle, allCores;
+   (* vmla, vmls *)
+   "neon_mla_ddd_8_16_qdd_16_8_long_32_16_long",
+-    [Source_n n2; Source_m n2; Source_d n3; Dest n6], Mul;
++    [Source_n n2; Source_m n2; Source_d n3; Dest n6], Mul, allCores;
+   "neon_mla_qqq_8_16",
+-    [Source_n n2; Source_m n2; Source_d n3; Dest_n_after (1, n6)], Mul_2cycle;
++    [Source_n n2; Source_m n2; Source_d n3; Dest_n_after (1, n6)], 
++   Mul_2cycle, allCores;
+   "neon_mla_ddd_32_qqd_16_ddd_32_scalar_qdd_64_32_long_scalar_qdd_64_32_long",
+-    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], Mul_2cycle;
++    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n6)], 
++   Mul_2cycle, allCores;
+   "neon_mla_qqq_32_qqd_32_scalar",
+-    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (3, n6)], Mul_4cycle;
++    [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (3, n6)], 
++   Mul_4cycle, allCores;
+   (* vmul, vqdmulh, vqrdmulh *)
+   (* vmul, vqdmul *)
+   "neon_mul_ddd_16_scalar_32_16_long_scalar",
+-    [Source_n n2; Source_m n1; Dest n6], Mul;
++    [Source_n n2; Source_m n1; Dest n6], Mul, allCores;
+   "neon_mul_qqd_32_scalar",
+-    [Source_n n2; Source_m n1; Dest_n_after (3, n6)], Mul_4cycle;
++    [Source_n n2; Source_m n1; Dest_n_after (3, n6)], Mul_4cycle, allCores;
+   (* vmla, vmls *)
+   (* vmla, vmla, vqdmla, vqdmls *)
+   "neon_mla_ddd_16_scalar_qdd_32_16_long_scalar",
+-    [Source_n n2; Source_m n1; Source_d n3; Dest n6], Mul;
++    [Source_n n2; Source_m n1; Source_d n3; Dest n6], Mul, allCores;
+ 
+   (* NEON integer shift instructions.  *)
+   (* vshr/vshl immediate, vshr_narrow, vshl_vmvh, vsli_vsri_ddd *)
+-  "neon_shift_1", [Source n1; Dest n3], Shift;
+-  (* vqshl, vrshr immediate; vqshr, vqmov, vrshr, vqrshr narrow;
++  "neon_shift_1", [Source n1; Dest n3], Shift, allCores;
++  (* vqshl, vrshr immediate; vqshr, vqmov, vrshr, vqrshr narrow, allCores;
+      vqshl_vrshl_vqrshl_ddd *)
+-  "neon_shift_2", [Source n1; Dest n4], Shift;
++  "neon_shift_2", [Source n1; Dest n4], Shift, allCores;
+   (* vsli, vsri and vshl for qqq *)
+-  "neon_shift_3", [Source n1; Dest_n_after (1, n3)], Shift_2cycle;
+-  "neon_vshl_ddd", [Source n1; Dest n1], Shift;
++  "neon_shift_3", [Source n1; Dest_n_after (1, n3)], Shift_2cycle, allCores;
++  "neon_vshl_ddd", [Source n1; Dest n1], Shift, allCores;
+   "neon_vqshl_vrshl_vqrshl_qqq", [Source n1; Dest_n_after (1, n4)],
+-    Shift_2cycle;
+-  "neon_vsra_vrsra", [Source_m n1; Source_d n3; Dest n6], Shift;
++    Shift_2cycle, allCores;
++  "neon_vsra_vrsra", [Source_m n1; Source_d n3; Dest n6], Shift, allCores;
+ 
+   (* NEON floating-point instructions.  *)
+   (* vadd, vsub, vabd, vmul, vceq, vcge, vcgt, vcage, vcagt, vmax, vmin *)
+   (* vabs, vneg, vceqz, vcgez, vcgtz, vclez, vcltz, vrecpe, vrsqrte, vcvt *)
+-  "neon_fp_vadd_ddd_vabs_dd", [Source n2; Dest n5], Fadd;
++  "neon_fp_vadd_ddd_vabs_dd", [Source n2; Dest n5], Fadd, allCores;
+   "neon_fp_vadd_qqq_vabs_qq", [Source n2; Dest_n_after (1, n5)],
+-    Fadd_2cycle;
++    Fadd_2cycle, allCores;
+   (* vsum, fvmx, vfmn *)
+-  "neon_fp_vsum", [Source n1; Dest n5], Fadd;
+-  "neon_fp_vmul_ddd", [Source_n n2; Source_m n1; Dest n5], Fmul;
++  "neon_fp_vsum", [Source n1; Dest n5], Fadd, allCores;
++  "neon_fp_vmul_ddd", [Source_n n2; Source_m n1; Dest n5], Fmul, allCores;
+   "neon_fp_vmul_qqd", [Source_n n2; Source_m n1; Dest_n_after (1, n5)],
+-    Fmul_2cycle;
++    Fmul_2cycle, allCores;
+   (* vmla, vmls *)
+   "neon_fp_vmla_ddd",
+-    [Source_n n2; Source_m n2; Source_d n3; Dest n9], Fmul_then_fadd;
++    [Source_n n2; Source_m n2; Source_d n3; Dest n9], Fmul_then_fadd, allCores;
+   "neon_fp_vmla_qqq",
+     [Source_n n2; Source_m n2; Source_d n3; Dest_n_after (1, n9)],
+-    Fmul_then_fadd_2;
++    Fmul_then_fadd_2, allCores;
+   "neon_fp_vmla_ddd_scalar",
+-    [Source_n n2; Source_m n1; Source_d n3; Dest n9], Fmul_then_fadd;
++    [Source_n n2; Source_m n1; Source_d n3; Dest n9], Fmul_then_fadd, allCores;
+   "neon_fp_vmla_qqq_scalar",
+     [Source_n n2; Source_m n1; Source_d n3; Dest_n_after (1, n9)],
+-    Fmul_then_fadd_2;
+-  "neon_fp_vrecps_vrsqrts_ddd", [Source n2; Dest n9], Fmul_then_fadd;
++    Fmul_then_fadd_2, allCores;
++  "neon_fp_vrecps_vrsqrts_ddd", [Source n2; Dest n9], Fmul_then_fadd, allCores;
+   "neon_fp_vrecps_vrsqrts_qqq", [Source n2; Dest_n_after (1, n9)],
+-    Fmul_then_fadd_2;
++    Fmul_then_fadd_2, allCores;
+ 
+   (* NEON byte permute instructions.  *)
+   (* vmov; vtrn and vswp for dd; vzip for dd; vuzp for dd; vrev; vext for dd *)
+-  "neon_bp_simple", [Source n1; Dest n2], Permute 1;
+-  (* vswp for qq; vext for qqq; vtbl with {Dn} or {Dn, Dn1};
++  "neon_bp_simple", [Source n1; Dest n2], Permute 1, allCores;
++  (* vswp for qq; vext for qqq; vtbl with {Dn} or {Dn, Dn1}, allCores;
+      similarly for vtbx *)
+-  "neon_bp_2cycle", [Source n1; Dest_n_after (1, n2)], Permute 2;
++  "neon_bp_2cycle", [Source n1; Dest_n_after (1, n2)], Permute 2, allCores;
+   (* all the rest *)
+-  "neon_bp_3cycle", [Source n1; Dest_n_after (2, n2)], Permute 3;
++  "neon_bp_3cycle", [Source n1; Dest_n_after (2, n2)], Permute 3, allCores;
+ 
+   (* NEON load/store instructions.  *)
+-  "neon_ldr", [Dest n1], Ls 1;
+-  "neon_str", [Source n1], Ls 1;
+-  "neon_vld1_1_2_regs", [Dest_n_after (1, n1)], Ls 2;
+-  "neon_vld1_3_4_regs", [Dest_n_after (2, n1)], Ls 3;
+-  "neon_vld2_2_regs_vld1_vld2_all_lanes", [Dest_n_after (1, n2)], Ls 2;
+-  "neon_vld2_4_regs", [Dest_n_after (2, n2)], Ls 3;
+-  "neon_vld3_vld4", [Dest_n_after (3, n2)], Ls 4;
+-  "neon_vst1_1_2_regs_vst2_2_regs", [Source n1], Ls 2;
+-  "neon_vst1_3_4_regs", [Source n1], Ls 3;
+-  "neon_vst2_4_regs_vst3_vst4", [Source n1], Ls 4;
+-  "neon_vst3_vst4", [Source n1], Ls 4;
+-  "neon_vld1_vld2_lane", [Source n1; Dest_n_after (2, n2)], Ls 3;
+-  "neon_vld3_vld4_lane", [Source n1; Dest_n_after (4, n2)], Ls 5;
+-  "neon_vst1_vst2_lane", [Source n1], Ls 2;
+-  "neon_vst3_vst4_lane", [Source n1], Ls 3;
+-  "neon_vld3_vld4_all_lanes", [Dest_n_after (1, n2)], Ls 3;
++  "neon_ldr", [Dest n1], Ls 1, allCores;
++  "neon_str", [Source n1], Ls 1, allCores;
++  "neon_vld1_1_2_regs", [Dest_n_after (1, n1)], Ls 2, allCores;
++  "neon_vld1_3_4_regs", [Dest_n_after (2, n1)], Ls 3, allCores;
++  "neon_vld2_2_regs_vld1_vld2_all_lanes", [Dest_n_after (1, n2)], Ls 2, allCores;
++  "neon_vld2_4_regs", [Dest_n_after (2, n2)], Ls 3, allCores;
++  "neon_vld3_vld4", [Dest_n_after (3, n2)], Ls 4, allCores;
++  "neon_vst1_1_2_regs_vst2_2_regs", [Source n1], Ls 2, allCores;
++  "neon_vst1_3_4_regs", [Source n1], Ls 3, allCores;
++  "neon_vst2_4_regs_vst3_vst4", [Source n1], Ls 4, allCores;
++  "neon_vst3_vst4", [Source n1], Ls 4, allCores;
++  "neon_vld1_vld2_lane", [Source n1; Dest_n_after (2, n2)], Ls 3, allCores;
++  "neon_vld3_vld4_lane", [Source n1; Dest_n_after (4, n2)], Ls 5, allCores;
++  "neon_vst1_vst2_lane", [Source n1], Ls 2, allCores;
++  "neon_vst3_vst4_lane", [Source n1], Ls 3, allCores;
++  "neon_vld3_vld4_all_lanes", [Dest_n_after (1, n2)], Ls 3, allCores;
+ 
+   (* NEON register transfer instructions.  *)
+-  "neon_mcr", [Dest n2], Permute 1;
+-  "neon_mcr_2_mcrr", [Dest n2], Permute 2;
++  "neon_mcr", [Dest n2], Permute 1, allCores;
++  "neon_mcr_2_mcrr", [Dest n2], Permute 2, allCores;
+   (* MRC instructions are in the .tpl file.  *)
+ ]
+ 
+@@ -221,7 +245,7 @@
+    required.  (It is also possible that an entry in the table has no
+    source requirements.)  *)
+ let calculate_sources =
+-  List.map (fun (name, avail, res) ->
++  List.map (fun (name, avail, res, cores) ->
+               let earliest_stage =
+                 List.fold_left
+                   (fun cur -> fun info ->
+@@ -331,7 +355,7 @@
+    of one bypass from this producer to any particular consumer listed
+    in LATENCIES.)  Use a hash table to collate bypasses with the
+    same latency and guard.  *)
+-let collate_bypasses (producer_name, _, _, _) largest latencies =
++let collate_bypasses (producer_name, _, _, _) largest latencies core =
+   let ht = Hashtbl.create 42 in
+   let keys = ref [] in
+     List.iter (
+@@ -350,7 +374,7 @@
+               (if (try ignore (Hashtbl.find ht (guard, latency)); false
+                    with Not_found -> true) then
+                  keys := (guard, latency) :: !keys);
+-              Hashtbl.add ht (guard, latency) consumer
++              Hashtbl.add ht (guard, latency) ((coreStr core) ^ "_" ^ consumer)
+             end
+     ) latencies;
+     (* The hash table now has bypasses collated so that ones with the
+@@ -372,7 +396,7 @@
+    the output in such a way that all bypasses with the same producer
+    and latency are together, and so that bypasses with the worst-case
+    latency are ignored.  *)
+-let worst_case_latencies_and_bypasses =
++let worst_case_latencies_and_bypasses core =
+   let rec f (worst_acc, bypasses_acc) prev xs =
+     match xs with
+       [] -> (worst_acc, bypasses_acc)
+@@ -400,7 +424,7 @@
+           (* Having got the largest latency, collect all bypasses for
+              this producer and filter out those with that larger
+              latency.  Record the others for later emission.  *)
+-          let bypasses = collate_bypasses producer largest latencies in
++          let bypasses = collate_bypasses producer largest latencies core in
+             (* Go on to process remaining producers, having noted
+                the result for this one.  *)
+             f ((producer_name, producer_avail, largest,
+@@ -444,14 +468,18 @@
+     in
+       f avail 0
+ 
++
+ (* Emit a define_insn_reservation for each producer.  The latency
+    written in will be its worst-case latency.  *)
+-let emit_insn_reservations =
+-  List.iter (
++let emit_insn_reservations core =
++  let corestring = coreStr core in
++  let tunestring = tuneStr core
++  in  List.iter (
+      fun (producer, avail, latency, reservation) ->
+         write_comment producer avail;
+-        Printf.printf "(define_insn_reservation \"%s\" %d\n" producer latency;
+-        Printf.printf "  (and (eq_attr \"tune\" \"cortexa8\")\n";
++        Printf.printf "(define_insn_reservation \"%s_%s\" %d\n" 
++            corestring producer latency;
++            Printf.printf "  (and (eq_attr \"tune\" \"%s\")\n" tunestring;
+         Printf.printf "       (eq_attr \"neon_type\" \"%s\"))\n" producer;
+         let str =
+           match reservation with
+@@ -467,7 +495,7 @@
+ 	  | Fmul_then_fadd -> "fmul_then_fadd"
+ 	  | Fmul_then_fadd_2 -> "fmul_then_fadd_2"
+         in
+-          Printf.printf "  \"cortex_a8_neon_%s\")\n\n" str
++          Printf.printf "  \"%s_neon_%s\")\n\n" corestring str
+     )
+ 
+ (* Given a guard description, return the name of the C function to
+@@ -480,10 +508,12 @@
+   | Guard_none -> assert false
+ 
+ (* Emit a define_bypass for each bypass.  *)
+-let emit_bypasses =
++let emit_bypasses core =
+   List.iter (
+       fun (producer, consumers, latency, guard) ->
+-        Printf.printf "(define_bypass %d \"%s\"\n" latency producer;
++        Printf.printf "(define_bypass %d \"%s_%s\"\n" 
++	latency (coreStr core) producer;
++
+         if guard = Guard_none then
+           Printf.printf "               \"%s\")\n\n" consumers
+         else
+@@ -493,11 +523,21 @@
+           end
+     )
+ 
++
++let calculate_per_core_availability_table core availability_table =
++  let table = calculate_sources availability_table in
++  let worst_cases, bypasses = worst_case_latencies_and_bypasses core table in
++    emit_insn_reservations core (List.rev worst_cases);
++    Printf.printf ";; Exceptions to the default latencies.\n\n";
++    emit_bypasses core bypasses
++
++let calculate_core_availability_table core availability_table =
++let filter_core = List.filter (fun (_, _, _, cores) 
++				   -> List.exists ((=) core) cores)
++in calculate_per_core_availability_table core (filter_core availability_table)
++
++
+ (* Program entry point.  *)
+ let main =
+-  let table = calculate_sources availability_table in
+-  let worst_cases, bypasses = worst_case_latencies_and_bypasses table in
+-    emit_insn_reservations (List.rev worst_cases);
+-    Printf.printf ";; Exceptions to the default latencies.\n\n";
+-    emit_bypasses bypasses
+-
++  List.map (fun core -> calculate_core_availability_table 
++		core availability_table) allCores
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99398.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99398.patch
new file mode 100644
index 0000000000..c332d50fa1
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99398.patch
@@ -0,0 +1,76 @@
+2010-09-21  Yao Qi  <yao@codesourcery.com>
+
+	Backport from FSF to fix ICE found in LP:635409:
+	
+	2010-07-07  Bernd Schmidt  <bernds@codesourcery.com>
+	
+	gcc/
+	PR rtl-optimization/44787
+	* config/arm/arm.md (arith_shiftsi): Allow stack pointer in operand 2.
+	* config/arm/thumb2.md (thumb2_arith_shiftsi): Likewise.
+	
+	gcc/testsuite/
+	PR rtl-optimization/44787
+	* gcc.c-torture/compile/pr44788.c: New test.
+	* gcc.target/arm/pr44788.c: New test.
+	
+ 2010-09-16  Andrew Stubbs  <ams@codesourcery.com>
+ 
+ 	Backport from FSF:
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-09-16 09:15:46 +0000
++++ new/gcc/config/arm/arm.md	2010-09-22 05:54:42 +0000
+@@ -9268,7 +9268,7 @@
+           [(match_operator:SI 3 "shift_operator"
+              [(match_operand:SI 4 "s_register_operand" "r")
+               (match_operand:SI 5 "reg_or_int_operand" "rI")])
+-           (match_operand:SI 2 "s_register_operand" "r")]))]
++           (match_operand:SI 2 "s_register_operand" "rk")]))]
+   "TARGET_ARM"
+   "%i1%?\\t%0, %2, %4%S3"
+   [(set_attr "predicable" "yes")
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-09-01 13:29:58 +0000
++++ new/gcc/config/arm/thumb2.md	2010-09-22 05:54:42 +0000
+@@ -467,7 +467,7 @@
+           [(match_operator:SI 3 "shift_operator"
+              [(match_operand:SI 4 "s_register_operand" "r")
+               (match_operand:SI 5 "const_shift_count" "M")])
+-           (match_operand:SI 2 "s_register_operand" "r")]))]
++           (match_operand:SI 2 "s_register_operand" "rk")]))]
+   "TARGET_THUMB2"
+   "%i1%?\\t%0, %2, %4%S3"
+   [(set_attr "predicable" "yes")
+
+=== added file 'gcc/testsuite/gcc.c-torture/compile/pr44788.c'
+--- old/gcc/testsuite/gcc.c-torture/compile/pr44788.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/compile/pr44788.c	2010-09-22 05:54:42 +0000
+@@ -0,0 +1,8 @@
++void joint_decode(float* mlt_buffer1, int t) {
++    int i;
++    float decode_buffer[1060];
++    foo(decode_buffer);
++    for (i=0; i<10 ; i++) {
++        mlt_buffer1[i] = i * decode_buffer[t];
++    }
++}
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr44788.c'
+--- old/gcc/testsuite/gcc.target/arm/pr44788.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr44788.c	2010-09-22 05:54:42 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_thumb2_ok } */
++/* { dg-options "-Os -fno-strict-aliasing -fPIC -mthumb -march=armv7-a -mfpu=vfp3 -mfloat-abi=softfp" } */
++
++void joint_decode(float* mlt_buffer1, int t) {
++    int i;
++    float decode_buffer[1060];
++    foo(decode_buffer);
++    for (i=0; i<10 ; i++) {
++        mlt_buffer1[i] = i * decode_buffer[t];
++    }
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99402.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99402.patch
new file mode 100644
index 0000000000..6627a11d4a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99402.patch
@@ -0,0 +1,1268 @@
+2010-09-17  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-07-15  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (last_label_ruid, first_index_reg, last_index_reg):
+	New static variables.
+	(reload_combine_recognize_pattern): New static function, broken out
+	of reload_combine.
+	(reload_combine): Use it.  Only initialize first_index_reg and
+	last_index_reg once.
+
+	2010-07-17  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/42235
+	gcc/
+	* postreload.c (reload_cse_move2add): Return bool, true if anything.
+	changed.  All callers changed.
+	(move2add_use_add2_insn): Likewise.
+	(move2add_use_add3_insn): Likewise.
+	(reload_cse_regs): If reload_cse_move2add changed anything, rerun
+	reload_combine.
+	(RELOAD_COMBINE_MAX_USES): Bump to 16.
+	(last_jump_ruid): New static variable.
+	(struct reg_use): New members CONTAINING_MEM and RUID.
+	(reg_state): New members ALL_OFFSETS_MATCH and REAL_STORE_RUID.
+	(reload_combine_split_one_ruid, reload_combine_split_ruids,
+	reload_combine_purge_insn_uses, reload_combine_closest_single_use
+	reload_combine_purge_reg_uses_after_ruid,
+	reload_combine_recognize_const_pattern): New static functions.
+	(reload_combine_recognize_pattern): Verify that ALL_OFFSETS_MATCH
+	is true for our reg and that we have available index regs.
+	(reload_combine_note_use): New args RUID and CONTAINING_MEM.  All
+	callers changed.  Use them to initialize fields in struct reg_use.
+	(reload_combine): Initialize last_jump_ruid.  Be careful when to
+	take PREV_INSN of the scanned insn.  Update REAL_STORE_RUID fields.
+	Call reload_combine_recognize_const_pattern.
+	(reload_combine_note_store): Update REAL_STORE_RUID field.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42235.c: New test.
+
+	2010-07-19  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_closest_single_use): Ignore the
+	number of uses for DEBUG_INSNs.
+	(fixup_debug_insns): New static function.
+	(reload_combine_recognize_const_pattern): Use it.  Don't let the
+	main loop be affected by DEBUG_INSNs.
+	Really disallow moving adds past a jump insn.
+	(reload_combine_recognize_pattern): Don't update use_ruid here.
+	(reload_combine_note_use): Do it here.
+	(reload_combine): Use control_flow_insn_p rather than JUMP_P.
+
+	2010-07-20  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (fixup_debug_insns): Remove arg REGNO.  New args
+	FROM and TO.  All callers changed.  Don't look for tracked uses,
+	just scan the RTL for DEBUG_INSNs and substitute.
+	(reload_combine_recognize_pattern): Call fixup_debug_insns.
+	(reload_combine): Ignore DEBUG_INSNs.
+
+	2010-07-22  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR bootstrap/44970
+	PR middle-end/45009
+	gcc/
+	* postreload.c: Include "target.h".
+	(reload_combine_closest_single_use): Don't take DEBUG_INSNs
+	into account.
+	(fixup_debug_insns): Don't copy the rtx.
+	(reload_combine_recognize_const_pattern): DEBUG_INSNs can't have uses.
+	Don't copy when replacing.  Call fixup_debug_insns in the case where
+	we merged one add with another.
+	(reload_combine_recognize_pattern): Fail if there aren't any uses.
+	Try harder to determine whether we're picking a valid index register.
+	Don't set store_ruid for an insn we're going to scan in the
+	next iteration.
+	(reload_combine): Remove unused code.
+	(reload_combine_note_use): When updating use information for
+	an old insn, ignore a use that occurs after store_ruid.
+	* Makefile.in (postreload.o): Update dependencies.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_recognize_const_pattern): Move test
+	for limiting the insn movement to the right scope.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (try_replace_in_use): New static function.
+	(reload_combine_recognize_const_pattern): Use it here.  Allow
+	substituting into a final add insn, and substituting into a memory
+	reference in an insn that sets the reg.
+
+=== modified file 'gcc/Makefile.in'
+Index: gcc-4.5/gcc/Makefile.in
+===================================================================
+--- gcc-4.5.orig/gcc/Makefile.in
++++ gcc-4.5/gcc/Makefile.in
+@@ -3159,7 +3159,7 @@ postreload.o : postreload.c $(CONFIG_H) 
+    $(RTL_H) $(REAL_H) $(FLAGS_H) $(EXPR_H) $(OPTABS_H) reload.h $(REGS_H) \
+    hard-reg-set.h insn-config.h $(BASIC_BLOCK_H) $(RECOG_H) output.h \
+    $(FUNCTION_H) $(TOPLEV_H) cselib.h $(TM_P_H) $(EXCEPT_H) $(TREE_H) $(MACHMODE_H) \
+-   $(OBSTACK_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
++   $(OBSTACK_H) $(TARGET_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
+ postreload-gcse.o : postreload-gcse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+    $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h \
+    $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \
+Index: gcc-4.5/gcc/postreload.c
+===================================================================
+--- gcc-4.5.orig/gcc/postreload.c
++++ gcc-4.5/gcc/postreload.c
+@@ -44,6 +44,7 @@ along with GCC; see the file COPYING3.  
+ #include "toplev.h"
+ #include "except.h"
+ #include "tree.h"
++#include "target.h"
+ #include "timevar.h"
+ #include "tree-pass.h"
+ #include "df.h"
+@@ -56,10 +57,10 @@ static int reload_cse_simplify_set (rtx,
+ static int reload_cse_simplify_operands (rtx, rtx);
+ 
+ static void reload_combine (void);
+-static void reload_combine_note_use (rtx *, rtx);
++static void reload_combine_note_use (rtx *, rtx, int, rtx);
+ static void reload_combine_note_store (rtx, const_rtx, void *);
+ 
+-static void reload_cse_move2add (rtx);
++static bool reload_cse_move2add (rtx);
+ static void move2add_note_store (rtx, const_rtx, void *);
+ 
+ /* Call cse / combine like post-reload optimization phases.
+@@ -67,11 +68,16 @@ static void move2add_note_store (rtx, co
+ void
+ reload_cse_regs (rtx first ATTRIBUTE_UNUSED)
+ {
++  bool moves_converted;
+   reload_cse_regs_1 (first);
+   reload_combine ();
+-  reload_cse_move2add (first);
++  moves_converted = reload_cse_move2add (first);
+   if (flag_expensive_optimizations)
+-    reload_cse_regs_1 (first);
++    {
++      if (moves_converted)
++	reload_combine ();
++      reload_cse_regs_1 (first);
++    }
+ }
+ 
+ /* See whether a single set SET is a noop.  */
+@@ -660,30 +666,43 @@ reload_cse_simplify_operands (rtx insn, 
+ 
+ /* The maximum number of uses of a register we can keep track of to
+    replace them with reg+reg addressing.  */
+-#define RELOAD_COMBINE_MAX_USES 6
++#define RELOAD_COMBINE_MAX_USES 16
+ 
+-/* INSN is the insn where a register has been used, and USEP points to the
+-   location of the register within the rtl.  */
+-struct reg_use { rtx insn, *usep; };
++/* Describes a recorded use of a register.  */
++struct reg_use
++{
++  /* The insn where a register has been used.  */
++  rtx insn;
++  /* Points to the memory reference enclosing the use, if any, NULL_RTX
++     otherwise.  */
++  rtx containing_mem;
++  /* Location of the register withing INSN.  */
++  rtx *usep;
++  /* The reverse uid of the insn.  */
++  int ruid;
++};
+ 
+ /* If the register is used in some unknown fashion, USE_INDEX is negative.
+    If it is dead, USE_INDEX is RELOAD_COMBINE_MAX_USES, and STORE_RUID
+-   indicates where it becomes live again.
++   indicates where it is first set or clobbered.
+    Otherwise, USE_INDEX is the index of the last encountered use of the
+-   register (which is first among these we have seen since we scan backwards),
+-   OFFSET contains the constant offset that is added to the register in
+-   all encountered uses, and USE_RUID indicates the first encountered, i.e.
+-   last, of these uses.
++   register (which is first among these we have seen since we scan backwards).
++   USE_RUID indicates the first encountered, i.e. last, of these uses.
++   If ALL_OFFSETS_MATCH is true, all encountered uses were inside a PLUS
++   with a constant offset; OFFSET contains this constant in that case.
+    STORE_RUID is always meaningful if we only want to use a value in a
+    register in a different place: it denotes the next insn in the insn
+-   stream (i.e. the last encountered) that sets or clobbers the register.  */
++   stream (i.e. the last encountered) that sets or clobbers the register.
++   REAL_STORE_RUID is similar, but clobbers are ignored when updating it.  */
+ static struct
+   {
+     struct reg_use reg_use[RELOAD_COMBINE_MAX_USES];
+-    int use_index;
+     rtx offset;
++    int use_index;
+     int store_ruid;
++    int real_store_ruid;
+     int use_ruid;
++    bool all_offsets_match;
+   } reg_state[FIRST_PSEUDO_REGISTER];
+ 
+ /* Reverse linear uid.  This is increased in reload_combine while scanning
+@@ -691,42 +710,548 @@ static struct
+    and the store_ruid / use_ruid fields in reg_state.  */
+ static int reload_combine_ruid;
+ 
++/* The RUID of the last label we encountered in reload_combine.  */
++static int last_label_ruid;
++
++/* The RUID of the last jump we encountered in reload_combine.  */
++static int last_jump_ruid;
++
++/* The register numbers of the first and last index register.  A value of
++   -1 in LAST_INDEX_REG indicates that we've previously computed these
++   values and found no suitable index registers.  */
++static int first_index_reg = -1;
++static int last_index_reg;
++
+ #define LABEL_LIVE(LABEL) \
+   (label_live[CODE_LABEL_NUMBER (LABEL) - min_labelno])
+ 
++/* Subroutine of reload_combine_split_ruids, called to fix up a single
++   ruid pointed to by *PRUID if it is higher than SPLIT_RUID.  */
++
++static inline void
++reload_combine_split_one_ruid (int *pruid, int split_ruid)
++{
++  if (*pruid > split_ruid)
++    (*pruid)++;
++}
++
++/* Called when we insert a new insn in a position we've already passed in
++   the scan.  Examine all our state, increasing all ruids that are higher
++   than SPLIT_RUID by one in order to make room for a new insn.  */
++
++static void
++reload_combine_split_ruids (int split_ruid)
++{
++  unsigned i;
++
++  reload_combine_split_one_ruid (&reload_combine_ruid, split_ruid);
++  reload_combine_split_one_ruid (&last_label_ruid, split_ruid);
++  reload_combine_split_one_ruid (&last_jump_ruid, split_ruid);
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    {
++      int j, idx = reg_state[i].use_index;
++      reload_combine_split_one_ruid (&reg_state[i].use_ruid, split_ruid);
++      reload_combine_split_one_ruid (&reg_state[i].store_ruid, split_ruid);
++      reload_combine_split_one_ruid (&reg_state[i].real_store_ruid,
++				     split_ruid);
++      if (idx < 0)
++	continue;
++      for (j = idx; j < RELOAD_COMBINE_MAX_USES; j++)
++	{
++	  reload_combine_split_one_ruid (&reg_state[i].reg_use[j].ruid,
++					 split_ruid);
++	}
++    }
++}
++
++/* Called when we are about to rescan a previously encountered insn with
++   reload_combine_note_use after modifying some part of it.  This clears all
++   information about uses in that particular insn.  */
++
++static void
++reload_combine_purge_insn_uses (rtx insn)
++{
++  unsigned i;
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    {
++      int j, k, idx = reg_state[i].use_index;
++      if (idx < 0)
++	continue;
++      j = k = RELOAD_COMBINE_MAX_USES;
++      while (j-- > idx)
++	{
++	  if (reg_state[i].reg_use[j].insn != insn)
++	    {
++	      k--;
++	      if (k != j)
++		reg_state[i].reg_use[k] = reg_state[i].reg_use[j];
++	    }
++	}
++      reg_state[i].use_index = k;
++    }
++}
++
++/* Called when we need to forget about all uses of REGNO after an insn
++   which is identified by RUID.  */
++
++static void
++reload_combine_purge_reg_uses_after_ruid (unsigned regno, int ruid)
++{
++  int j, k, idx = reg_state[regno].use_index;
++  if (idx < 0)
++    return;
++  j = k = RELOAD_COMBINE_MAX_USES;
++  while (j-- > idx)
++    {
++      if (reg_state[regno].reg_use[j].ruid >= ruid)
++	{
++	  k--;
++	  if (k != j)
++	    reg_state[regno].reg_use[k] = reg_state[regno].reg_use[j];
++	}
++    }
++  reg_state[regno].use_index = k;
++}
++
++/* Find the use of REGNO with the ruid that is highest among those
++   lower than RUID_LIMIT, and return it if it is the only use of this
++   reg in the insn.  Return NULL otherwise.  */
++
++static struct reg_use *
++reload_combine_closest_single_use (unsigned regno, int ruid_limit)
++{
++  int i, best_ruid = 0;
++  int use_idx = reg_state[regno].use_index;
++  struct reg_use *retval;
++
++  if (use_idx < 0)
++    return NULL;
++  retval = NULL;
++  for (i = use_idx; i < RELOAD_COMBINE_MAX_USES; i++)
++    {
++      struct reg_use *use = reg_state[regno].reg_use + i; 
++      int this_ruid = use->ruid;
++      if (this_ruid >= ruid_limit)
++	continue;
++      if (this_ruid > best_ruid)
++	{
++	  best_ruid = this_ruid;
++	  retval = use;
++	}
++      else if (this_ruid == best_ruid)
++	retval = NULL;
++    }
++  if (last_label_ruid >= best_ruid)
++    return NULL;
++  return retval;
++}
++
++/* After we've moved an add insn, fix up any debug insns that occur
++   between the old location of the add and the new location.  REG is
++   the destination register of the add insn; REPLACEMENT is the
++   SET_SRC of the add.  FROM and TO specify the range in which we
++   should make this change on debug insns.  */
++
++static void
++fixup_debug_insns (rtx reg, rtx replacement, rtx from, rtx to)
++{
++  rtx insn;
++  for (insn = from; insn != to; insn = NEXT_INSN (insn))
++    {
++      rtx t;
++
++      if (!DEBUG_INSN_P (insn))
++	continue;
++      
++      t = INSN_VAR_LOCATION_LOC (insn);
++      t = simplify_replace_rtx (t, reg, replacement);
++      validate_change (insn, &INSN_VAR_LOCATION_LOC (insn), t, 0);
++    }
++}
++
++/* Subroutine of reload_combine_recognize_const_pattern.  Try to replace REG
++   with SRC in the insn described by USE, taking costs into account.  Return
++   true if we made the replacement.  */
++
++static bool
++try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
++{
++  rtx use_insn = use->insn;
++  rtx mem = use->containing_mem;
++  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn));
++
++  if (mem != NULL_RTX)
++    {
++      addr_space_t as = MEM_ADDR_SPACE (mem);
++      rtx oldaddr = XEXP (mem, 0);
++      rtx newaddr = NULL_RTX;
++      int old_cost = address_cost (oldaddr, GET_MODE (mem), as, speed);
++      int new_cost;
++
++      newaddr = simplify_replace_rtx (oldaddr, reg, src);
++      if (memory_address_addr_space_p (GET_MODE (mem), newaddr, as))
++	{
++	  XEXP (mem, 0) = newaddr;
++	  new_cost = address_cost (newaddr, GET_MODE (mem), as, speed);
++	  XEXP (mem, 0) = oldaddr;
++	  if (new_cost <= old_cost
++	      && validate_change (use_insn,
++				  &XEXP (mem, 0), newaddr, 0))
++	    return true;
++	}
++    }
++  else
++    {
++      rtx new_set = single_set (use_insn);
++      if (new_set
++	  && REG_P (SET_DEST (new_set))
++	  && GET_CODE (SET_SRC (new_set)) == PLUS
++	  && REG_P (XEXP (SET_SRC (new_set), 0))
++	  && CONSTANT_P (XEXP (SET_SRC (new_set), 1)))
++	{
++	  rtx new_src;
++	  int old_cost = rtx_cost (SET_SRC (new_set), SET, speed);
++
++	  gcc_assert (rtx_equal_p (XEXP (SET_SRC (new_set), 0), reg));
++	  new_src = simplify_replace_rtx (SET_SRC (new_set), reg, src);
++
++	  if (rtx_cost (new_src, SET, speed) <= old_cost
++	      && validate_change (use_insn, &SET_SRC (new_set),
++				  new_src, 0))
++	    return true;
++	}
++    }
++  return false;
++}
++
++/* Called by reload_combine when scanning INSN.  This function tries to detect
++   patterns where a constant is added to a register, and the result is used
++   in an address.
++   Return true if no further processing is needed on INSN; false if it wasn't
++   recognized and should be handled normally.  */
++
++static bool
++reload_combine_recognize_const_pattern (rtx insn)
++{
++  int from_ruid = reload_combine_ruid;
++  rtx set, pat, reg, src, addreg;
++  unsigned int regno;
++  struct reg_use *use;
++  bool must_move_add;
++  rtx add_moved_after_insn = NULL_RTX;
++  int add_moved_after_ruid = 0;
++  int clobbered_regno = -1;
++
++  set = single_set (insn);
++  if (set == NULL_RTX)
++    return false;
++
++  reg = SET_DEST (set);
++  src = SET_SRC (set);
++  if (!REG_P (reg)
++      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1
++      || GET_MODE (reg) != Pmode
++      || reg == stack_pointer_rtx)
++    return false;
++
++  regno = REGNO (reg);
++
++  /* We look for a REG1 = REG2 + CONSTANT insn, followed by either
++     uses of REG1 inside an address, or inside another add insn.  If
++     possible and profitable, merge the addition into subsequent
++     uses.  */
++  if (GET_CODE (src) != PLUS
++      || !REG_P (XEXP (src, 0))
++      || !CONSTANT_P (XEXP (src, 1)))
++    return false;
++
++  addreg = XEXP (src, 0);
++  must_move_add = rtx_equal_p (reg, addreg);
++
++  pat = PATTERN (insn);
++  if (must_move_add && set != pat)
++    {
++      /* We have to be careful when moving the add; apart from the
++	 single_set there may also be clobbers.  Recognize one special
++	 case, that of one clobber alongside the set (likely a clobber
++	 of the CC register).  */
++      gcc_assert (GET_CODE (PATTERN (insn)) == PARALLEL);
++      if (XVECLEN (pat, 0) != 2 || XVECEXP (pat, 0, 0) != set
++	  || GET_CODE (XVECEXP (pat, 0, 1)) != CLOBBER
++	  || !REG_P (XEXP (XVECEXP (pat, 0, 1), 0)))
++	return false;
++      clobbered_regno = REGNO (XEXP (XVECEXP (pat, 0, 1), 0));
++    }
++
++  do
++    {
++      use = reload_combine_closest_single_use (regno, from_ruid);
++
++      if (use)
++	/* Start the search for the next use from here.  */
++	from_ruid = use->ruid;
++
++      if (use && GET_MODE (*use->usep) == Pmode)
++	{
++	  bool delete_add = false;
++	  rtx use_insn = use->insn;
++	  int use_ruid = use->ruid;
++
++	  /* Avoid moving the add insn past a jump.  */
++	  if (must_move_add && use_ruid <= last_jump_ruid)
++	    break;
++
++	  /* If the add clobbers another hard reg in parallel, don't move
++	     it past a real set of this hard reg.  */
++	  if (must_move_add && clobbered_regno >= 0
++	      && reg_state[clobbered_regno].real_store_ruid >= use_ruid)
++	    break;
++
++	  gcc_assert (reg_state[regno].store_ruid <= use_ruid);
++	  /* Avoid moving a use of ADDREG past a point where it is stored.  */
++	  if (reg_state[REGNO (addreg)].store_ruid > use_ruid)
++	    break;
++
++	  /* We also must not move the addition past an insn that sets
++	     the same register, unless we can combine two add insns.  */
++	  if (must_move_add && reg_state[regno].store_ruid == use_ruid)
++	    {
++	      if (use->containing_mem == NULL_RTX)
++		delete_add = true;
++	      else
++		break;
++	    }
++
++	  if (try_replace_in_use (use, reg, src))
++	    {
++	      reload_combine_purge_insn_uses (use_insn);
++	      reload_combine_note_use (&PATTERN (use_insn), use_insn,
++				       use_ruid, NULL_RTX);
++
++	      if (delete_add)
++		{
++		  fixup_debug_insns (reg, src, insn, use_insn);
++		  delete_insn (insn);
++		  return true;
++		}
++	      if (must_move_add)
++		{
++		  add_moved_after_insn = use_insn;
++		  add_moved_after_ruid = use_ruid;
++		}
++	      continue;
++	    }
++	}
++      /* If we get here, we couldn't handle this use.  */
++      if (must_move_add)
++	break;
++    }
++  while (use);
++
++  if (!must_move_add || add_moved_after_insn == NULL_RTX)
++    /* Process the add normally.  */
++    return false;
++
++  fixup_debug_insns (reg, src, insn, add_moved_after_insn);
++
++  reorder_insns (insn, insn, add_moved_after_insn);
++  reload_combine_purge_reg_uses_after_ruid (regno, add_moved_after_ruid);
++  reload_combine_split_ruids (add_moved_after_ruid - 1);
++  reload_combine_note_use (&PATTERN (insn), insn,
++			   add_moved_after_ruid, NULL_RTX);
++  reg_state[regno].store_ruid = add_moved_after_ruid;
++
++  return true;
++}
++
++/* Called by reload_combine when scanning INSN.  Try to detect a pattern we
++   can handle and improve.  Return true if no further processing is needed on
++   INSN; false if it wasn't recognized and should be handled normally.  */
++
++static bool
++reload_combine_recognize_pattern (rtx insn)
++{
++  rtx set, reg, src;
++  unsigned int regno;
++
++  set = single_set (insn);
++  if (set == NULL_RTX)
++    return false;
++
++  reg = SET_DEST (set);
++  src = SET_SRC (set);
++  if (!REG_P (reg)
++      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1)
++    return false;
++
++  regno = REGNO (reg);
++
++  /* Look for (set (REGX) (CONST_INT))
++     (set (REGX) (PLUS (REGX) (REGY)))
++     ...
++     ... (MEM (REGX)) ...
++     and convert it to
++     (set (REGZ) (CONST_INT))
++     ...
++     ... (MEM (PLUS (REGZ) (REGY)))... .
++
++     First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
++     and that we know all uses of REGX before it dies.
++     Also, explicitly check that REGX != REGY; our life information
++     does not yet show whether REGY changes in this insn.  */
++
++  if (GET_CODE (src) == PLUS
++      && reg_state[regno].all_offsets_match
++      && last_index_reg != -1
++      && REG_P (XEXP (src, 1))
++      && rtx_equal_p (XEXP (src, 0), reg)
++      && !rtx_equal_p (XEXP (src, 1), reg)
++      && reg_state[regno].use_index >= 0
++      && reg_state[regno].use_index < RELOAD_COMBINE_MAX_USES
++      && last_label_ruid < reg_state[regno].use_ruid)
++    {
++      rtx base = XEXP (src, 1);
++      rtx prev = prev_nonnote_insn (insn);
++      rtx prev_set = prev ? single_set (prev) : NULL_RTX;
++      rtx index_reg = NULL_RTX;
++      rtx reg_sum = NULL_RTX;
++      int i;
++
++      /* Now we need to set INDEX_REG to an index register (denoted as
++	 REGZ in the illustration above) and REG_SUM to the expression
++	 register+register that we want to use to substitute uses of REG
++	 (typically in MEMs) with.  First check REG and BASE for being
++	 index registers; we can use them even if they are not dead.  */
++      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
++	  || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
++				REGNO (base)))
++	{
++	  index_reg = reg;
++	  reg_sum = src;
++	}
++      else
++	{
++	  /* Otherwise, look for a free index register.  Since we have
++	     checked above that neither REG nor BASE are index registers,
++	     if we find anything at all, it will be different from these
++	     two registers.  */
++	  for (i = first_index_reg; i <= last_index_reg; i++)
++	    {
++	      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], i)
++		  && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
++		  && reg_state[i].store_ruid <= reg_state[regno].use_ruid
++		  && (call_used_regs[i] || df_regs_ever_live_p (i))
++		  && (!frame_pointer_needed || i != HARD_FRAME_POINTER_REGNUM)
++		  && !fixed_regs[i] && !global_regs[i]
++		  && hard_regno_nregs[i][GET_MODE (reg)] == 1
++		  && targetm.hard_regno_scratch_ok (i))
++		{
++		  index_reg = gen_rtx_REG (GET_MODE (reg), i);
++		  reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
++		  break;
++		}
++	    }
++	}
++
++      /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
++	 (REGY), i.e. BASE, is not clobbered before the last use we'll
++	 create.  */
++      if (reg_sum
++	  && prev_set
++	  && CONST_INT_P (SET_SRC (prev_set))
++	  && rtx_equal_p (SET_DEST (prev_set), reg)
++	  && (reg_state[REGNO (base)].store_ruid
++	      <= reg_state[regno].use_ruid))
++	{
++	  /* Change destination register and, if necessary, the constant
++	     value in PREV, the constant loading instruction.  */
++	  validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
++	  if (reg_state[regno].offset != const0_rtx)
++	    validate_change (prev,
++			     &SET_SRC (prev_set),
++			     GEN_INT (INTVAL (SET_SRC (prev_set))
++				      + INTVAL (reg_state[regno].offset)),
++			     1);
++
++	  /* Now for every use of REG that we have recorded, replace REG
++	     with REG_SUM.  */
++	  for (i = reg_state[regno].use_index;
++	       i < RELOAD_COMBINE_MAX_USES; i++)
++	    validate_unshare_change (reg_state[regno].reg_use[i].insn,
++				     reg_state[regno].reg_use[i].usep,
++				     /* Each change must have its own
++					replacement.  */
++				     reg_sum, 1);
++
++	  if (apply_change_group ())
++	    {
++	      struct reg_use *lowest_ruid = NULL;
++
++	      /* For every new use of REG_SUM, we have to record the use
++		 of BASE therein, i.e. operand 1.  */
++	      for (i = reg_state[regno].use_index;
++		   i < RELOAD_COMBINE_MAX_USES; i++)
++		{
++		  struct reg_use *use = reg_state[regno].reg_use + i;
++		  reload_combine_note_use (&XEXP (*use->usep, 1), use->insn,
++					   use->ruid, use->containing_mem);
++		  if (lowest_ruid == NULL || use->ruid < lowest_ruid->ruid)
++		    lowest_ruid = use;
++		}
++
++	      fixup_debug_insns (reg, reg_sum, insn, lowest_ruid->insn);
++
++	      /* Delete the reg-reg addition.  */
++	      delete_insn (insn);
++
++	      if (reg_state[regno].offset != const0_rtx)
++		/* Previous REG_EQUIV / REG_EQUAL notes for PREV
++		   are now invalid.  */
++		remove_reg_equal_equiv_notes (prev);
++
++	      reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
++	      return true;
++	    }
++	}
++    }
++  return false;
++}
++
+ static void
+ reload_combine (void)
+ {
+-  rtx insn, set;
+-  int first_index_reg = -1;
+-  int last_index_reg = 0;
++  rtx insn, prev;
+   int i;
+   basic_block bb;
+   unsigned int r;
+-  int last_label_ruid;
+   int min_labelno, n_labels;
+   HARD_REG_SET ever_live_at_start, *label_live;
+ 
+-  /* If reg+reg can be used in offsetable memory addresses, the main chunk of
+-     reload has already used it where appropriate, so there is no use in
+-     trying to generate it now.  */
+-  if (double_reg_address_ok && INDEX_REG_CLASS != NO_REGS)
+-    return;
+-
+   /* To avoid wasting too much time later searching for an index register,
+      determine the minimum and maximum index register numbers.  */
+-  for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+-    if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
+-      {
+-	if (first_index_reg == -1)
+-	  first_index_reg = r;
++  if (INDEX_REG_CLASS == NO_REGS)
++    last_index_reg = -1;
++  else if (first_index_reg == -1 && last_index_reg == 0)
++    {
++      for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
++	if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
++	  {
++	    if (first_index_reg == -1)
++	      first_index_reg = r;
+ 
+-	last_index_reg = r;
+-      }
++	    last_index_reg = r;
++	  }
+ 
+-  /* If no index register is available, we can quit now.  */
+-  if (first_index_reg == -1)
+-    return;
++      /* If no index register is available, we can quit now.  Set LAST_INDEX_REG
++	 to -1 so we'll know to quit early the next time we get here.  */
++      if (first_index_reg == -1)
++	{
++	  last_index_reg = -1;
++	  return;
++	}
++    }
+ 
+   /* Set up LABEL_LIVE and EVER_LIVE_AT_START.  The register lifetime
+      information is a bit fuzzy immediately after reload, but it's
+@@ -753,20 +1278,23 @@ reload_combine (void)
+     }
+ 
+   /* Initialize last_label_ruid, reload_combine_ruid and reg_state.  */
+-  last_label_ruid = reload_combine_ruid = 0;
++  last_label_ruid = last_jump_ruid = reload_combine_ruid = 0;
+   for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+     {
+-      reg_state[r].store_ruid = reload_combine_ruid;
++      reg_state[r].store_ruid = 0;
++      reg_state[r].real_store_ruid = 0;
+       if (fixed_regs[r])
+ 	reg_state[r].use_index = -1;
+       else
+ 	reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+     }
+ 
+-  for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
++  for (insn = get_last_insn (); insn; insn = prev)
+     {
+       rtx note;
+ 
++      prev = PREV_INSN (insn);
++
+       /* We cannot do our optimization across labels.  Invalidating all the use
+ 	 information we have would be costly, so we just note where the label
+ 	 is and then later disable any optimization that would cross it.  */
+@@ -777,141 +1305,17 @@ reload_combine (void)
+ 	  if (! fixed_regs[r])
+ 	      reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+ 
+-      if (! INSN_P (insn))
++      if (! NONDEBUG_INSN_P (insn))
+ 	continue;
+ 
+       reload_combine_ruid++;
+ 
+-      /* Look for (set (REGX) (CONST_INT))
+-	 (set (REGX) (PLUS (REGX) (REGY)))
+-	 ...
+-	 ... (MEM (REGX)) ...
+-	 and convert it to
+-	 (set (REGZ) (CONST_INT))
+-	 ...
+-	 ... (MEM (PLUS (REGZ) (REGY)))... .
+-
+-	 First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
+-	 and that we know all uses of REGX before it dies.
+-	 Also, explicitly check that REGX != REGY; our life information
+-	 does not yet show whether REGY changes in this insn.  */
+-      set = single_set (insn);
+-      if (set != NULL_RTX
+-	  && REG_P (SET_DEST (set))
+-	  && (hard_regno_nregs[REGNO (SET_DEST (set))]
+-			      [GET_MODE (SET_DEST (set))]
+-	      == 1)
+-	  && GET_CODE (SET_SRC (set)) == PLUS
+-	  && REG_P (XEXP (SET_SRC (set), 1))
+-	  && rtx_equal_p (XEXP (SET_SRC (set), 0), SET_DEST (set))
+-	  && !rtx_equal_p (XEXP (SET_SRC (set), 1), SET_DEST (set))
+-	  && last_label_ruid < reg_state[REGNO (SET_DEST (set))].use_ruid)
+-	{
+-	  rtx reg = SET_DEST (set);
+-	  rtx plus = SET_SRC (set);
+-	  rtx base = XEXP (plus, 1);
+-	  rtx prev = prev_nonnote_nondebug_insn (insn);
+-	  rtx prev_set = prev ? single_set (prev) : NULL_RTX;
+-	  unsigned int regno = REGNO (reg);
+-	  rtx index_reg = NULL_RTX;
+-	  rtx reg_sum = NULL_RTX;
+-
+-	  /* Now we need to set INDEX_REG to an index register (denoted as
+-	     REGZ in the illustration above) and REG_SUM to the expression
+-	     register+register that we want to use to substitute uses of REG
+-	     (typically in MEMs) with.  First check REG and BASE for being
+-	     index registers; we can use them even if they are not dead.  */
+-	  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
+-	      || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
+-				    REGNO (base)))
+-	    {
+-	      index_reg = reg;
+-	      reg_sum = plus;
+-	    }
+-	  else
+-	    {
+-	      /* Otherwise, look for a free index register.  Since we have
+-		 checked above that neither REG nor BASE are index registers,
+-		 if we find anything at all, it will be different from these
+-		 two registers.  */
+-	      for (i = first_index_reg; i <= last_index_reg; i++)
+-		{
+-		  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
+-					 i)
+-		      && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
+-		      && reg_state[i].store_ruid <= reg_state[regno].use_ruid
+-		      && hard_regno_nregs[i][GET_MODE (reg)] == 1)
+-		    {
+-		      index_reg = gen_rtx_REG (GET_MODE (reg), i);
+-		      reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
+-		      break;
+-		    }
+-		}
+-	    }
+-
+-	  /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
+-	     (REGY), i.e. BASE, is not clobbered before the last use we'll
+-	     create.  */
+-	  if (reg_sum
+-	      && prev_set
+-	      && CONST_INT_P (SET_SRC (prev_set))
+-	      && rtx_equal_p (SET_DEST (prev_set), reg)
+-	      && reg_state[regno].use_index >= 0
+-	      && (reg_state[REGNO (base)].store_ruid
+-		  <= reg_state[regno].use_ruid))
+-	    {
+-	      int i;
+-
+-	      /* Change destination register and, if necessary, the constant
+-		 value in PREV, the constant loading instruction.  */
+-	      validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
+-	      if (reg_state[regno].offset != const0_rtx)
+-		validate_change (prev,
+-				 &SET_SRC (prev_set),
+-				 GEN_INT (INTVAL (SET_SRC (prev_set))
+-					  + INTVAL (reg_state[regno].offset)),
+-				 1);
++      if (control_flow_insn_p (insn))
++	last_jump_ruid = reload_combine_ruid;
+ 
+-	      /* Now for every use of REG that we have recorded, replace REG
+-		 with REG_SUM.  */
+-	      for (i = reg_state[regno].use_index;
+-		   i < RELOAD_COMBINE_MAX_USES; i++)
+-		validate_unshare_change (reg_state[regno].reg_use[i].insn,
+-				 	 reg_state[regno].reg_use[i].usep,
+-				 	 /* Each change must have its own
+-				    	    replacement.  */
+-				 	 reg_sum, 1);
+-
+-	      if (apply_change_group ())
+-		{
+-		  /* For every new use of REG_SUM, we have to record the use
+-		     of BASE therein, i.e. operand 1.  */
+-		  for (i = reg_state[regno].use_index;
+-		       i < RELOAD_COMBINE_MAX_USES; i++)
+-		    reload_combine_note_use
+-		      (&XEXP (*reg_state[regno].reg_use[i].usep, 1),
+-		       reg_state[regno].reg_use[i].insn);
+-
+-		  if (reg_state[REGNO (base)].use_ruid
+-		      > reg_state[regno].use_ruid)
+-		    reg_state[REGNO (base)].use_ruid
+-		      = reg_state[regno].use_ruid;
+-
+-		  /* Delete the reg-reg addition.  */
+-		  delete_insn (insn);
+-
+-		  if (reg_state[regno].offset != const0_rtx)
+-		    /* Previous REG_EQUIV / REG_EQUAL notes for PREV
+-		       are now invalid.  */
+-		    remove_reg_equal_equiv_notes (prev);
+-
+-		  reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
+-		  reg_state[REGNO (index_reg)].store_ruid
+-		    = reload_combine_ruid;
+-		  continue;
+-		}
+-	    }
+-	}
++      if (reload_combine_recognize_const_pattern (insn)
++	  || reload_combine_recognize_pattern (insn))
++	continue;
+ 
+       note_stores (PATTERN (insn), reload_combine_note_store, NULL);
+ 
+@@ -967,7 +1371,8 @@ reload_combine (void)
+ 	      reg_state[i].use_index = -1;
+ 	}
+ 
+-      reload_combine_note_use (&PATTERN (insn), insn);
++      reload_combine_note_use (&PATTERN (insn), insn,
++			       reload_combine_ruid, NULL_RTX);
+       for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ 	{
+ 	  if (REG_NOTE_KIND (note) == REG_INC
+@@ -976,6 +1381,7 @@ reload_combine (void)
+ 	      int regno = REGNO (XEXP (note, 0));
+ 
+ 	      reg_state[regno].store_ruid = reload_combine_ruid;
++	      reg_state[regno].real_store_ruid = reload_combine_ruid;
+ 	      reg_state[regno].use_index = -1;
+ 	    }
+ 	}
+@@ -985,8 +1391,8 @@ reload_combine (void)
+ }
+ 
+ /* Check if DST is a register or a subreg of a register; if it is,
+-   update reg_state[regno].store_ruid and reg_state[regno].use_index
+-   accordingly.  Called via note_stores from reload_combine.  */
++   update store_ruid, real_store_ruid and use_index in the reg_state
++   structure accordingly.  Called via note_stores from reload_combine.  */
+ 
+ static void
+ reload_combine_note_store (rtx dst, const_rtx set, void *data ATTRIBUTE_UNUSED)
+@@ -1010,14 +1416,14 @@ reload_combine_note_store (rtx dst, cons
+   /* note_stores might have stripped a STRICT_LOW_PART, so we have to be
+      careful with registers / register parts that are not full words.
+      Similarly for ZERO_EXTRACT.  */
+-  if (GET_CODE (set) != SET
+-      || GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
++  if (GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
+       || GET_CODE (SET_DEST (set)) == STRICT_LOW_PART)
+     {
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].use_index = -1;
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
++	  reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	}
+     }
+   else
+@@ -1025,6 +1431,8 @@ reload_combine_note_store (rtx dst, cons
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
++	  if (GET_CODE (set) == SET)
++	    reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	  reg_state[i].use_index = RELOAD_COMBINE_MAX_USES;
+ 	}
+     }
+@@ -1035,7 +1443,7 @@ reload_combine_note_store (rtx dst, cons
+    *XP is the pattern of INSN, or a part of it.
+    Called from reload_combine, and recursively by itself.  */
+ static void
+-reload_combine_note_use (rtx *xp, rtx insn)
++reload_combine_note_use (rtx *xp, rtx insn, int ruid, rtx containing_mem)
+ {
+   rtx x = *xp;
+   enum rtx_code code = x->code;
+@@ -1048,7 +1456,7 @@ reload_combine_note_use (rtx *xp, rtx in
+     case SET:
+       if (REG_P (SET_DEST (x)))
+ 	{
+-	  reload_combine_note_use (&SET_SRC (x), insn);
++	  reload_combine_note_use (&SET_SRC (x), insn, ruid, NULL_RTX);
+ 	  return;
+ 	}
+       break;
+@@ -1104,6 +1512,11 @@ reload_combine_note_use (rtx *xp, rtx in
+ 	    return;
+ 	  }
+ 
++	/* We may be called to update uses in previously seen insns.
++	   Don't add uses beyond the last store we saw.  */
++	if (ruid < reg_state[regno].store_ruid)
++	  return;
++
+ 	/* If this register is already used in some unknown fashion, we
+ 	   can't do anything.
+ 	   If we decrement the index from zero to -1, we can't store more
+@@ -1112,29 +1525,34 @@ reload_combine_note_use (rtx *xp, rtx in
+ 	if (use_index < 0)
+ 	  return;
+ 
+-	if (use_index != RELOAD_COMBINE_MAX_USES - 1)
+-	  {
+-	    /* We have found another use for a register that is already
+-	       used later.  Check if the offsets match; if not, mark the
+-	       register as used in an unknown fashion.  */
+-	    if (! rtx_equal_p (offset, reg_state[regno].offset))
+-	      {
+-		reg_state[regno].use_index = -1;
+-		return;
+-	      }
+-	  }
+-	else
++	if (use_index == RELOAD_COMBINE_MAX_USES - 1)
+ 	  {
+ 	    /* This is the first use of this register we have seen since we
+ 	       marked it as dead.  */
+ 	    reg_state[regno].offset = offset;
+-	    reg_state[regno].use_ruid = reload_combine_ruid;
++	    reg_state[regno].all_offsets_match = true;
++	    reg_state[regno].use_ruid = ruid;
++	  }
++	else
++	  {
++	    if (reg_state[regno].use_ruid > ruid)
++	      reg_state[regno].use_ruid = ruid;
++
++	    if (! rtx_equal_p (offset, reg_state[regno].offset))
++	      reg_state[regno].all_offsets_match = false;
+ 	  }
++
+ 	reg_state[regno].reg_use[use_index].insn = insn;
++	reg_state[regno].reg_use[use_index].ruid = ruid;
++	reg_state[regno].reg_use[use_index].containing_mem = containing_mem;
+ 	reg_state[regno].reg_use[use_index].usep = xp;
+ 	return;
+       }
+ 
++    case MEM:
++      containing_mem = x;
++      break;
++
+     default:
+       break;
+     }
+@@ -1144,11 +1562,12 @@ reload_combine_note_use (rtx *xp, rtx in
+   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+     {
+       if (fmt[i] == 'e')
+-	reload_combine_note_use (&XEXP (x, i), insn);
++	reload_combine_note_use (&XEXP (x, i), insn, ruid, containing_mem);
+       else if (fmt[i] == 'E')
+ 	{
+ 	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+-	    reload_combine_note_use (&XVECEXP (x, i, j), insn);
++	    reload_combine_note_use (&XVECEXP (x, i, j), insn, ruid,
++				     containing_mem);
+ 	}
+     }
+ }
+@@ -1196,9 +1615,10 @@ static int move2add_last_label_luid;
+    while REG is known to already have value (SYM + offset).
+    This function tries to change INSN into an add instruction
+    (set (REG) (plus (REG) (OFF - offset))) using the known value.
+-   It also updates the information about REG's known value.  */
++   It also updates the information about REG's known value.
++   Return true if we made a change.  */
+ 
+-static void
++static bool
+ move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1207,6 +1627,7 @@ move2add_use_add2_insn (rtx reg, rtx sym
+   rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[regno],
+ 			      GET_MODE (reg));
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
++  bool changed = false;
+ 
+   /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
+      use (set (reg) (reg)) instead.
+@@ -1221,13 +1642,13 @@ move2add_use_add2_insn (rtx reg, rtx sym
+ 	 (reg)), would be discarded.  Maybe we should
+ 	 try a truncMN pattern?  */
+       if (INTVAL (off) == reg_offset [regno])
+-	validate_change (insn, &SET_SRC (pat), reg, 0);
++	changed = validate_change (insn, &SET_SRC (pat), reg, 0);
+     }
+   else if (rtx_cost (new_src, PLUS, speed) < rtx_cost (src, SET, speed)
+ 	   && have_add2_insn (reg, new_src))
+     {
+       rtx tem = gen_rtx_PLUS (GET_MODE (reg), reg, new_src);
+-      validate_change (insn, &SET_SRC (pat), tem, 0);
++      changed = validate_change (insn, &SET_SRC (pat), tem, 0);
+     }
+   else if (sym == NULL_RTX && GET_MODE (reg) != BImode)
+     {
+@@ -1252,8 +1673,9 @@ move2add_use_add2_insn (rtx reg, rtx sym
+ 			     gen_rtx_STRICT_LOW_PART (VOIDmode,
+ 						      narrow_reg),
+ 			     narrow_src);
+-	      if (validate_change (insn, &PATTERN (insn),
+-				   new_set, 0))
++	      changed = validate_change (insn, &PATTERN (insn),
++					 new_set, 0);
++	      if (changed)
+ 		break;
+ 	    }
+ 	}
+@@ -1263,6 +1685,7 @@ move2add_use_add2_insn (rtx reg, rtx sym
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
++  return changed;
+ }
+ 
+ 
+@@ -1272,9 +1695,10 @@ move2add_use_add2_insn (rtx reg, rtx sym
+    value (SYM + offset) and change INSN into an add instruction
+    (set (REG) (plus (the found register) (OFF - offset))) if such
+    a register is found.  It also updates the information about
+-   REG's known value.  */
++   REG's known value.
++   Return true iff we made a change.  */
+ 
+-static void
++static bool
+ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1284,6 +1708,7 @@ move2add_use_add3_insn (rtx reg, rtx sym
+   int min_regno;
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
+   int i;
++  bool changed = false;
+ 
+   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+     if (reg_set_luid[i] > move2add_last_label_luid
+@@ -1328,20 +1753,25 @@ move2add_use_add3_insn (rtx reg, rtx sym
+ 				      GET_MODE (reg));
+ 	  tem = gen_rtx_PLUS (GET_MODE (reg), tem, new_src);
+ 	}
+-      validate_change (insn, &SET_SRC (pat), tem, 0);
++      if (validate_change (insn, &SET_SRC (pat), tem, 0))
++	changed = true;
+     }
+   reg_set_luid[regno] = move2add_luid;
+   reg_base_reg[regno] = -1;
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
++  return changed;
+ }
+ 
+-static void
++/* Convert move insns with constant inputs to additions if they are cheaper.
++   Return true if any changes were made.  */
++static bool
+ reload_cse_move2add (rtx first)
+ {
+   int i;
+   rtx insn;
++  bool changed = false;
+ 
+   for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
+     {
+@@ -1402,7 +1832,7 @@ reload_cse_move2add (rtx first)
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] == NULL_RTX)
+ 		{
+-		  move2add_use_add2_insn (reg, NULL_RTX, src, insn);
++		  changed |= move2add_use_add2_insn (reg, NULL_RTX, src, insn);
+ 		  continue;
+ 		}
+ 
+@@ -1463,6 +1893,7 @@ reload_cse_move2add (rtx first)
+ 			}
+ 		      if (success)
+ 			delete_insn (insn);
++		      changed |= success;
+ 		      insn = next;
+ 		      reg_mode[regno] = GET_MODE (reg);
+ 		      reg_offset[regno] =
+@@ -1508,12 +1939,12 @@ reload_cse_move2add (rtx first)
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] != NULL_RTX
+ 		  && rtx_equal_p (sym, reg_symbol_ref[regno]))
+-		move2add_use_add2_insn (reg, sym, off, insn);
++		changed |= move2add_use_add2_insn (reg, sym, off, insn);
+ 
+ 	      /* Otherwise, we have to find a register whose value is sum
+ 		 of sym and some constant value.  */
+ 	      else
+-		move2add_use_add3_insn (reg, sym, off, insn);
++		changed |= move2add_use_add3_insn (reg, sym, off, insn);
+ 
+ 	      continue;
+ 	    }
+@@ -1568,6 +1999,7 @@ reload_cse_move2add (rtx first)
+ 	    }
+ 	}
+     }
++  return changed;
+ }
+ 
+ /* SET is a SET or CLOBBER that sets DST.  DATA is the insn which
+Index: gcc-4.5/testsuite/gcc.target/arm/pr42235.c
+===================================================================
+--- /dev/null
++++ gcc-4.5/testsuite/gcc.target/arm/pr42235.c
+@@ -0,0 +1,11 @@
++/* { dg-options "-mthumb -O2 -march=armv5te" }  */
++/* { dg-require-effective-target arm_thumb1_ok } */
++/* { dg-final { scan-assembler-not "add\[\\t \]*r.,\[\\t \]*r.,\[\\t \]*\#1" } } */
++/* { dg-final { scan-assembler-not "add\[\\t \]*r.,\[\\t \]*\#1" } } */
++
++#include <string.h>
++
++int foo (char *x)
++{
++  memset (x, 0, 6);
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99403.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99403.patch
new file mode 100644
index 0000000000..093dd1c570
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99403.patch
@@ -0,0 +1,176 @@
+2010-09-20  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #5256
+
+	libstdc++-v3/
+
+	Backport from mainline:
+
+	2010-05-21  Joseph Myers  <joseph@codesourcery.com>
+	* acinclude.m4 (GLIBCXX_ENABLE_CLOCALE): Use GNU locale model for
+	glibc 2.3 and later, but not uClibc, without an execution test.
+	* configure: Regenerate.
+	* doc/xml/manual/configure.xml, doc/xml/manual/prerequisites.xml,
+	doc/xml/faq.xml: Update.
+
+=== modified file 'libstdc++-v3/acinclude.m4'
+Index: gcc-4.5/libstdc++-v3/acinclude.m4
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/acinclude.m4
++++ gcc-4.5/libstdc++-v3/acinclude.m4
+@@ -1740,41 +1740,11 @@ AC_DEFUN([GLIBCXX_ENABLE_CLOCALE], [
+   if test $enable_clocale_flag = gnu; then
+     AC_EGREP_CPP([_GLIBCXX_ok], [
+     #include <features.h>
+-    #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 2)
++    #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(__UCLIBC__)
+       _GLIBCXX_ok
+     #endif
+     ], enable_clocale_flag=gnu, enable_clocale_flag=generic)
+ 
+-    if test $enable_clocale = auto; then
+-      # Test for bugs early in glibc-2.2.x series
+-      AC_TRY_RUN([
+-      #define _GNU_SOURCE 1
+-      #include <locale.h>
+-      #include <string.h>
+-      #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ > 2)
+-      extern __typeof(newlocale) __newlocale;
+-      extern __typeof(duplocale) __duplocale;
+-      extern __typeof(strcoll_l) __strcoll_l;
+-      #endif
+-      int main()
+-      {
+-	const char __one[] = "Äuglein Augmen";
+-        const char __two[] = "Äuglein";
+-       	int i;
+-        int j;
+-        __locale_t        loc;
+-        __locale_t        loc_dup;
+-        loc = __newlocale(1 << LC_ALL, "de_DE", 0);
+-        loc_dup = __duplocale(loc);
+-        i = __strcoll_l(__one, __two, loc);
+-        j = __strcoll_l(__one, __two, loc_dup);
+-        return 0;
+-      }
+-      ],
+-      [enable_clocale_flag=gnu],[enable_clocale_flag=generic],
+-      [enable_clocale_flag=generic])
+-    fi
+-
+     # Set it to scream when it hurts.
+     ac_save_CFLAGS="$CFLAGS"	
+     CFLAGS="-Wimplicit-function-declaration -Werror"
+Index: gcc-4.5/libstdc++-v3/configure
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/configure
++++ gcc-4.5/libstdc++-v3/configure
+@@ -15627,7 +15627,7 @@ fi
+ /* end confdefs.h.  */
+ 
+     #include <features.h>
+-    #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 2)
++    #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(__UCLIBC__)
+       _GLIBCXX_ok
+     #endif
+ 
+@@ -15641,49 +15641,6 @@ fi
+ rm -f conftest*
+ 
+ 
+-    if test $enable_clocale = auto; then
+-      # Test for bugs early in glibc-2.2.x series
+-      if test "$cross_compiling" = yes; then :
+-  enable_clocale_flag=generic
+-else
+-  cat confdefs.h - <<_ACEOF >conftest.$ac_ext
+-/* end confdefs.h.  */
+-
+-      #define _GNU_SOURCE 1
+-      #include <locale.h>
+-      #include <string.h>
+-      #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ > 2)
+-      extern __typeof(newlocale) __newlocale;
+-      extern __typeof(duplocale) __duplocale;
+-      extern __typeof(strcoll_l) __strcoll_l;
+-      #endif
+-      int main()
+-      {
+-	const char __one[] = "Äuglein Augmen";
+-        const char __two[] = "Äuglein";
+-       	int i;
+-        int j;
+-        __locale_t        loc;
+-        __locale_t        loc_dup;
+-        loc = __newlocale(1 << LC_ALL, "de_DE", 0);
+-        loc_dup = __duplocale(loc);
+-        i = __strcoll_l(__one, __two, loc);
+-        j = __strcoll_l(__one, __two, loc_dup);
+-        return 0;
+-      }
+-
+-_ACEOF
+-if ac_fn_c_try_run "$LINENO"; then :
+-  enable_clocale_flag=gnu
+-else
+-  enable_clocale_flag=generic
+-fi
+-rm -f core *.core core.conftest.* gmon.out bb.out conftest$ac_exeext \
+-  conftest.$ac_objext conftest.beam conftest.$ac_ext
+-fi
+-
+-    fi
+-
+     # Set it to scream when it hurts.
+     ac_save_CFLAGS="$CFLAGS"
+     CFLAGS="-Wimplicit-function-declaration -Werror"
+Index: gcc-4.5/libstdc++-v3/doc/xml/faq.xml
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/doc/xml/faq.xml
++++ gcc-4.5/libstdc++-v3/doc/xml/faq.xml
+@@ -636,6 +636,8 @@
+          C library (glibc) version 2.2.5.  That version of glibc is over a
+          year old and contains necessary bugfixes.  Many GNU/Linux distros make
+          glibc version 2.3.x available now.
++         libstdc++ 4.6.0 and later require glibc 2.3 or later for this
++         localization and formatting code.
+       </para>
+       <para>The guideline is simple:  the more recent the C++ library, the
+          more recent the C library.  (This is also documented in the main
+Index: gcc-4.5/libstdc++-v3/doc/xml/manual/configure.xml
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/doc/xml/manual/configure.xml
++++ gcc-4.5/libstdc++-v3/doc/xml/manual/configure.xml
+@@ -113,8 +113,7 @@
+      <para>If not explicitly specified, the configure proccess tries
+       to guess the most suitable package from the choices above. The
+       default is 'generic'. On glibc-based systems of sufficient
+-      vintage (2.2.5 and newer) and capability (with installed DE and
+-      FR locale data), 'gnu' is automatically selected. This option
++      vintage (2.3 and newer), 'gnu' is automatically selected. This option
+       can change the library ABI.
+      </para>
+  </listitem></varlistentry>
+Index: gcc-4.5/libstdc++-v3/doc/xml/manual/prerequisites.xml
+===================================================================
+--- gcc-4.5.orig/libstdc++-v3/doc/xml/manual/prerequisites.xml
++++ gcc-4.5/libstdc++-v3/doc/xml/manual/prerequisites.xml
+@@ -52,16 +52,8 @@
+ 	<para>
+ 	  If gcc 3.1.0 or later on is being used on linux, an attempt
+ 	  will be made to use "C" library functionality necessary for
+-	  C++ named locale support.  For gcc 3.2.1 and later, this
+-	  means that glibc 2.2.5 or later is required and the "C"
+-	  library de_DE locale information must be installed.
+-	</para>
+-
+-	<para>
+-	  Note however that the sanity checks involving the de_DE
+-	  locale are skipped when an explicit --enable-clocale=gnu
+-	  configure option is used: only the basic checks are carried
+-	  out, defending against misconfigurations.
++	  C++ named locale support.  For gcc 4.6.0 and later, this
++	  means that glibc 2.3 or later is required.
+ 	</para>
+ 
+ 	<para>
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99404.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99404.patch
new file mode 100644
index 0000000000..2753300925
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99404.patch
@@ -0,0 +1,386 @@
+2010-09-20  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #9019
+
+	Backport from mainline:
+
+	gcc/
+	2010-09-20  Jie Zhang  <jie@codesourcery.com>
+	* config/arm/arm.c (arm_address_offset_is_imm): New.
+	(arm_early_store_addr_dep): New.
+	(arm_early_load_addr_dep): New.
+	* config/arm/arm-protos.h (arm_early_store_addr_dep): Declare.
+	(arm_early_load_addr_dep): Declare.
+	(arm_address_offset_is_imm): Declare.
+	* config/arm/cortex-m4.md: New file.
+	* config/arm/cortex-m4-fpu.md: New file.
+	* config/arm/arm.md: Include cortex-m4.md and cortex-m4-fpu.md.
+	(attr generic_sched): Exclude cortexm4.
+	(attr generic_vfp): Exclude cortexm4.
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+Index: gcc-4.5/gcc/config/arm/arm-protos.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm-protos.h
++++ gcc-4.5/gcc/config/arm/arm-protos.h
+@@ -87,6 +87,8 @@ extern int arm_coproc_mem_operand (rtx, 
+ extern int neon_vector_mem_operand (rtx, int);
+ extern int neon_struct_mem_operand (rtx);
+ extern int arm_no_early_store_addr_dep (rtx, rtx);
++extern int arm_early_store_addr_dep (rtx, rtx);
++extern int arm_early_load_addr_dep (rtx, rtx);
+ extern int arm_no_early_alu_shift_dep (rtx, rtx);
+ extern int arm_no_early_alu_shift_value_dep (rtx, rtx);
+ extern int arm_no_early_mul_dep (rtx, rtx);
+@@ -131,6 +133,7 @@ extern const char *output_move_quad (rtx
+ extern const char *output_move_vfp (rtx *operands);
+ extern const char *output_move_neon (rtx *operands);
+ extern int arm_attr_length_move_neon (rtx);
++extern int arm_address_offset_is_imm (rtx);
+ extern const char *output_add_immediate (rtx *);
+ extern const char *arithmetic_instr (rtx, int);
+ extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
+Index: gcc-4.5/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.c
++++ gcc-4.5/gcc/config/arm/arm.c
+@@ -13542,6 +13542,34 @@ arm_attr_length_move_neon (rtx insn)
+     return 4;
+ }
+ 
++/* Return nonzero if the offset in the address is an immediate.  Otherwise,
++   return zero.  */
++
++int
++arm_address_offset_is_imm (rtx insn)
++{
++  rtx mem, addr;
++
++  extract_insn_cached (insn);
++
++  if (REG_P (recog_data.operand[0]))
++    return 0;
++
++  mem = recog_data.operand[0];
++
++  gcc_assert (MEM_P (mem));
++
++  addr = XEXP (mem, 0);
++
++  if (GET_CODE (addr) == REG
++      || (GET_CODE (addr) == PLUS
++	  && GET_CODE (XEXP (addr, 0)) == REG
++	  && GET_CODE (XEXP (addr, 1)) == CONST_INT))
++    return 1;
++  else
++    return 0;
++}
++
+ /* Output an ADD r, s, #n where n may be too big for one instruction.
+    If adding zero to one register, output nothing.  */
+ const char *
+@@ -21620,6 +21648,38 @@ arm_no_early_store_addr_dep (rtx produce
+   return !reg_overlap_mentioned_p (value, addr);
+ }
+ 
++/* Return nonzero if the CONSUMER instruction (a store) does need
++   PRODUCER's value to calculate the address.  */
++
++int
++arm_early_store_addr_dep (rtx producer, rtx consumer)
++{
++  return !arm_no_early_store_addr_dep (producer, consumer);
++}
++
++/* Return nonzero if the CONSUMER instruction (a load) does need
++   PRODUCER's value to calculate the address.  */
++
++int
++arm_early_load_addr_dep (rtx producer, rtx consumer)
++{
++  rtx value = PATTERN (producer);
++  rtx addr = PATTERN (consumer);
++
++  if (GET_CODE (value) == COND_EXEC)
++    value = COND_EXEC_CODE (value);
++  if (GET_CODE (value) == PARALLEL)
++    value = XVECEXP (value, 0, 0);
++  value = XEXP (value, 0);
++  if (GET_CODE (addr) == COND_EXEC)
++    addr = COND_EXEC_CODE (addr);
++  if (GET_CODE (addr) == PARALLEL)
++    addr = XVECEXP (addr, 0, 0);
++  addr = XEXP (addr, 1);
++
++  return reg_overlap_mentioned_p (value, addr);
++}
++
+ /* Return nonzero if the CONSUMER instruction (an ALU op) does not
+    have an early register shift value or amount dependency on the
+    result of PRODUCER.  */
+Index: gcc-4.5/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.md
++++ gcc-4.5/gcc/config/arm/arm.md
+@@ -434,16 +434,16 @@
+ ;; True if the generic scheduling description should be used.
+ 
+ (define_attr "generic_sched" "yes,no"
+-  (const (if_then_else 
+-          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9")
+-	      (eq_attr "tune_cortexr4" "yes"))
++  (const (if_then_else
++          (ior (eq_attr "tune" "arm926ejs,arm1020e,arm1026ejs,arm1136js,arm1136jfs,cortexa5,cortexa8,cortexa9,cortexm4")
++	       (eq_attr "tune_cortexr4" "yes"))
+           (const_string "no")
+           (const_string "yes"))))
+ 
+ (define_attr "generic_vfp" "yes,no"
+   (const (if_then_else
+ 	  (and (eq_attr "fpu" "vfp")
+-	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9")
++	       (eq_attr "tune" "!arm1020e,arm1022e,cortexa5,cortexa8,cortexa9,cortexm4")
+ 	       (eq_attr "tune_cortexr4" "no"))
+ 	  (const_string "yes")
+ 	  (const_string "no"))))
+@@ -472,6 +472,8 @@
+ (include "cortex-a9.md")
+ (include "cortex-r4.md")
+ (include "cortex-r4f.md")
++(include "cortex-m4.md")
++(include "cortex-m4-fpu.md")
+ (include "vfp11.md")
+ 
+ 
+Index: gcc-4.5/gcc/config/arm/cortex-m4-fpu.md
+===================================================================
+--- /dev/null
++++ gcc-4.5/gcc/config/arm/cortex-m4-fpu.md
+@@ -0,0 +1,111 @@
++;; ARM Cortex-M4 FPU pipeline description
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;; Contributed by CodeSourcery.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.
++
++;; Use an artifial unit to model FPU.
++(define_cpu_unit "cortex_m4_v" "cortex_m4")
++
++(define_reservation "cortex_m4_ex_v" "cortex_m4_ex+cortex_m4_v")
++
++;; Integer instructions following VDIV or VSQRT complete out-of-order.
++(define_insn_reservation "cortex_m4_fdivs" 15
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fdivs"))
++  "cortex_m4_ex_v,cortex_m4_v*13")
++
++(define_insn_reservation "cortex_m4_vmov_1" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fcpys,fconsts"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_vmov_2" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_2_r,r_2_f"))
++  "cortex_m4_ex_v*2")
++
++(define_insn_reservation "cortex_m4_fmuls" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fmuls"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_fmacs" 4
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fmacs"))
++  "cortex_m4_ex_v*3")
++
++(define_insn_reservation "cortex_m4_ffariths" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "ffariths"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_fadds" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fadds"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_fcmps" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "fcmps"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_f_flag" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_flag"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_f_cvt" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_cvt"))
++  "cortex_m4_ex_v")
++
++(define_insn_reservation "cortex_m4_f_load" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_load"))
++  "cortex_m4_ex_v*2")
++
++(define_insn_reservation "cortex_m4_f_store" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_store"))
++  "cortex_m4_ex_v*2")
++
++(define_insn_reservation "cortex_m4_f_loadd" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_loadd"))
++  "cortex_m4_ex_v*3")
++
++(define_insn_reservation "cortex_m4_f_stored" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "f_stored"))
++  "cortex_m4_ex_v*3")
++
++;; MAC instructions consume their addend one cycle later. If the result
++;; of an arithmetic instruction is consumed as the addend of the following
++;; MAC instruction, the latency can be decreased by one.
++
++(define_bypass 1 "cortex_m4_fadds,cortex_m4_fmuls,cortex_m4_f_cvt"
++		 "cortex_m4_fmacs"
++		 "arm_no_early_mul_dep")
++
++(define_bypass 3 "cortex_m4_fmacs"
++		 "cortex_m4_fmacs"
++		 "arm_no_early_mul_dep")
++
++(define_bypass 14 "cortex_m4_fdivs"
++		  "cortex_m4_fmacs"
++		  "arm_no_early_mul_dep")
+Index: gcc-4.5/gcc/config/arm/cortex-m4.md
+===================================================================
+--- /dev/null
++++ gcc-4.5/gcc/config/arm/cortex-m4.md
+@@ -0,0 +1,111 @@
++;; ARM Cortex-M4 pipeline description
++;; Copyright (C) 2010 Free Software Foundation, Inc.
++;; Contributed by CodeSourcery.
++;;
++;; This file is part of GCC.
++;;
++;; GCC is free software; you can redistribute it and/or modify it
++;; under the terms of the GNU General Public License as published by
++;; the Free Software Foundation; either version 3, or (at your option)
++;; any later version.
++;;
++;; GCC is distributed in the hope that it will be useful, but
++;; WITHOUT ANY WARRANTY; without even the implied warranty of
++;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
++;; General Public License for more details.
++;;
++;; You should have received a copy of the GNU General Public License
++;; along with GCC; see the file COPYING3.  If not see
++;; <http://www.gnu.org/licenses/>.
++
++(define_automaton "cortex_m4")
++
++;; We model the pipelining of LDR instructions by using two artificial units.
++
++(define_cpu_unit "cortex_m4_a" "cortex_m4")
++
++(define_cpu_unit "cortex_m4_b" "cortex_m4")
++
++(define_reservation "cortex_m4_ex" "cortex_m4_a+cortex_m4_b")
++
++;; ALU and multiply is one cycle.
++(define_insn_reservation "cortex_m4_alu" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "alu,alu_shift,alu_shift_reg,mult"))
++  "cortex_m4_ex")
++
++;; Byte, half-word and word load is two cycles.
++(define_insn_reservation "cortex_m4_load1" 2
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "load_byte,load1"))
++  "cortex_m4_a, cortex_m4_b")
++
++;; str rx, [ry, #imm] is always one cycle.
++(define_insn_reservation "cortex_m4_store1_1" 1
++  (and (and (eq_attr "tune" "cortexm4")
++	    (eq_attr "type" "store1"))
++       (ne (symbol_ref ("arm_address_offset_is_imm (insn)")) (const_int 0)))
++  "cortex_m4_a")
++
++;; Other byte, half-word and word load is two cycles.
++(define_insn_reservation "cortex_m4_store1_2" 2
++  (and (and (eq_attr "tune" "cortexm4")
++	    (eq_attr "type" "store1"))
++       (eq (symbol_ref ("arm_address_offset_is_imm (insn)")) (const_int 0)))
++  "cortex_m4_a*2")
++
++(define_insn_reservation "cortex_m4_load2" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "load2"))
++  "cortex_m4_ex*3")
++
++(define_insn_reservation "cortex_m4_store2" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "store2"))
++  "cortex_m4_ex*3")
++
++(define_insn_reservation "cortex_m4_load3" 4
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "load3"))
++  "cortex_m4_ex*4")
++
++(define_insn_reservation "cortex_m4_store3" 4
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "store3"))
++  "cortex_m4_ex*4")
++
++(define_insn_reservation "cortex_m4_load4" 5
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "load4"))
++  "cortex_m4_ex*5")
++
++(define_insn_reservation "cortex_m4_store4" 5
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "store4"))
++  "cortex_m4_ex*5")
++
++;; If the address of load or store depends on the result of the preceding
++;; instruction, the latency is increased by one.
++
++(define_bypass 2 "cortex_m4_alu"
++		 "cortex_m4_load1"
++		 "arm_early_load_addr_dep")
++
++(define_bypass 2 "cortex_m4_alu"
++		 "cortex_m4_store1_1,cortex_m4_store1_2"
++		 "arm_early_store_addr_dep")
++
++(define_insn_reservation "cortex_m4_branch" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "branch"))
++  "cortex_m4_ex*3")
++
++(define_insn_reservation "cortex_m4_call" 3
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "call"))
++  "cortex_m4_ex*3")
++
++(define_insn_reservation "cortex_m4_block" 1
++  (and (eq_attr "tune" "cortexm4")
++       (eq_attr "type" "block"))
++  "cortex_m4_ex")
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99405.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99405.patch
new file mode 100644
index 0000000000..7fc943f4bc
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99405.patch
@@ -0,0 +1,36 @@
+2010-09-22  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-09-22  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	gcc/
+	* postreload.c (move2add_note_store): Add reg_symbol_ref[] checks
+	to update conditions. Fix reg_mode[] check.
+
+=== modified file 'gcc/postreload.c'
+Index: gcc-4.5/gcc/postreload.c
+===================================================================
+--- gcc-4.5.orig/gcc/postreload.c
++++ gcc-4.5/gcc/postreload.c
+@@ -2103,15 +2103,17 @@ move2add_note_store (rtx dst, const_rtx 
+ 		       && (MODES_OK_FOR_MOVE2ADD
+ 			   (dst_mode, reg_mode[REGNO (XEXP (src, 1))])))
+ 		{
+-		  if (reg_base_reg[REGNO (XEXP (src, 1))] < 0)
++		  if (reg_base_reg[REGNO (XEXP (src, 1))] < 0
++		      && reg_symbol_ref[REGNO (XEXP (src, 1))] == NULL_RTX)
+ 		    offset = reg_offset[REGNO (XEXP (src, 1))];
+ 		  /* Maybe the first register is known to be a
+ 		     constant.  */
+ 		  else if (reg_set_luid[REGNO (base_reg)]
+ 			   > move2add_last_label_luid
+ 			   && (MODES_OK_FOR_MOVE2ADD
+-			       (dst_mode, reg_mode[REGNO (XEXP (src, 1))]))
+-			   && reg_base_reg[REGNO (base_reg)] < 0)
++			       (dst_mode, reg_mode[REGNO (base_reg)]))
++			   && reg_base_reg[REGNO (base_reg)] < 0
++			   && reg_symbol_ref[REGNO (base_reg)] == NULL_RTX)
+ 		    {
+ 		      offset = reg_offset[REGNO (base_reg)];
+ 		      base_reg = XEXP (src, 1);
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99406.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99406.patch
new file mode 100644
index 0000000000..54473fa234
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99406.patch
@@ -0,0 +1,20 @@
+2010-09-28  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/testsuite/
+	2010-09-28  Jie Zhang  <jie@codesourcery.com>
+	* gcc.dg/Wcxx-compat-12.c: Add -fno-short-enums.
+
+=== modified file 'gcc/testsuite/gcc.dg/Wcxx-compat-12.c'
+Index: gcc-4.5/gcc/testsuite/gcc.dg/Wcxx-compat-12.c
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/gcc.dg/Wcxx-compat-12.c
++++ gcc-4.5/gcc/testsuite/gcc.dg/Wcxx-compat-12.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-Wc++-compat" } */
++/* { dg-options "-fno-short-enums -Wc++-compat" } */
+ 
+ enum E { A };
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99407.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99407.patch
new file mode 100644
index 0000000000..80f4246ed2
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99407.patch
@@ -0,0 +1,33 @@
+2010-09-30  Jie Zhang  <jie@codesourcery.com>
+
+	gcc/testsuite/
+
+	* c-c++-common/uninit-17.c: Adjust warning message.
+
+	Backport from mainline:
+
+	2010-07-30  Xinliang David Li  <davidxl@google.com>
+	PR tree-optimization/45121
+	* c-c++-common/uninit-17.c: Add -fno-ivops option.
+
+=== modified file 'gcc/testsuite/c-c++-common/uninit-17.c'
+Index: gcc-4.5/gcc/testsuite/c-c++-common/uninit-17.c
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/c-c++-common/uninit-17.c
++++ gcc-4.5/gcc/testsuite/c-c++-common/uninit-17.c
+@@ -1,5 +1,5 @@
+ /* { dg-do compile } */
+-/* { dg-options "-O2 -Wuninitialized" } */
++/* { dg-options "-O2 -Wuninitialized -fno-ivopts" } */
+ 
+ inline int foo(int x)
+ {
+@@ -9,7 +9,7 @@ static void bar(int a, int *ptr)
+ {
+   do
+   {
+-    int b; /* { dg-warning "is used uninitialized" } */
++    int b; /* { dg-warning "may be used uninitialized" } */
+     if (b < 40) {
+       ptr[0] = b;
+     }
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99408.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99408.patch
new file mode 100644
index 0000000000..1d873ba653
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99408.patch
@@ -0,0 +1,603 @@
+2010-10-01  Julian Brown  <julian@codesourcery.com>
+
+	Revert:
+
+	Backport from FSF:
+
+	2010-08-07  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/
+	* config/arm/linux-atomic.c (SUBWORD_VAL_CAS): Instantiate with
+	'unsigned short' and 'unsigned char' instead of 'short' and
+	'char'. (SUBWORD_BOOL_CAS): Likewise.
+	(SUBWORD_SYNC_OP): Likewise.
+	(SUBWORD_TEST_AND_SET): Likewise.
+	(FETCH_AND_OP_WORD): Parenthesise INF_OP
+	(SUBWORD_SYNC_OP): Likewise.
+	(OP_AND_FETCH_WORD): Likewise.
+
+	gcc/testsuite/
+	* lib/target-supports.exp: (check_effective_target_sync_int_long):
+	Add arm*-*-linux-gnueabi.
+	(check_effective_target_sync_char_short): Likewise.
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+Index: gcc-4.5/gcc/config/arm/arm-protos.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm-protos.h
++++ gcc-4.5/gcc/config/arm/arm-protos.h
+@@ -151,11 +151,6 @@ extern const char *vfp_output_fstmd (rtx
+ extern void arm_set_return_address (rtx, rtx);
+ extern int arm_eliminable_register (rtx);
+ extern const char *arm_output_shift(rtx *, int);
+-extern void arm_expand_sync (enum machine_mode, struct arm_sync_generator *,
+- 			     rtx, rtx, rtx, rtx);
+-extern const char *arm_output_memory_barrier (rtx *);
+-extern const char *arm_output_sync_insn (rtx, rtx *);
+-extern unsigned int arm_sync_loop_insns (rtx , rtx *);
+ 
+ extern bool arm_output_addr_const_extra (FILE *, rtx);
+ 
+Index: gcc-4.5/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.c
++++ gcc-4.5/gcc/config/arm/arm.c
+@@ -605,7 +605,6 @@ static int thumb_call_reg_needed;
+ #define FL_NEON       (1 << 20)       /* Neon instructions.  */
+ #define FL_ARCH7EM    (1 << 21)	      /* Instructions present in the ARMv7E-M
+ 					 architecture.  */
+-#define FL_ARCH7      (1 << 22)       /* Architecture 7.  */
+ 
+ #define FL_IWMMXT     (1 << 29)	      /* XScale v2 or "Intel Wireless MMX technology".  */
+ 
+@@ -626,7 +625,7 @@ static int thumb_call_reg_needed;
+ #define FL_FOR_ARCH6ZK	FL_FOR_ARCH6K
+ #define FL_FOR_ARCH6T2	(FL_FOR_ARCH6 | FL_THUMB2)
+ #define FL_FOR_ARCH6M	(FL_FOR_ARCH6 & ~FL_NOTM)
+-#define FL_FOR_ARCH7	((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
++#define FL_FOR_ARCH7	(FL_FOR_ARCH6T2 &~ FL_NOTM)
+ #define FL_FOR_ARCH7A	(FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
+ #define FL_FOR_ARCH7R	(FL_FOR_ARCH7A | FL_DIV)
+ #define FL_FOR_ARCH7M	(FL_FOR_ARCH7 | FL_DIV)
+@@ -664,9 +663,6 @@ int arm_arch6 = 0;
+ /* Nonzero if this chip supports the ARM 6K extensions.  */
+ int arm_arch6k = 0;
+ 
+-/* Nonzero if this chip supports the ARM 7 extensions.  */
+-int arm_arch7 = 0;
+-
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ int arm_arch_notm = 0;
+ 
+@@ -1638,7 +1634,6 @@ arm_override_options (void)
+   arm_arch6 = (insn_flags & FL_ARCH6) != 0;
+   arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+   arm_arch_notm = (insn_flags & FL_NOTM) != 0;
+-  arm_arch7 = (insn_flags & FL_ARCH7) != 0;
+   arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
+   arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
+   arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
+@@ -16595,17 +16590,6 @@ arm_print_operand (FILE *stream, rtx x, 
+       }
+       return;
+ 
+-    case 'C':
+-      {
+-	rtx addr;
+-
+-	gcc_assert (GET_CODE (x) == MEM);
+-	addr = XEXP (x, 0);
+-	gcc_assert (GET_CODE (addr) == REG);
+-	asm_fprintf (stream, "[%r]", REGNO (addr));
+-      }
+-      return;
+-
+     /* Translate an S register number into a D register number and element index.  */
+     case 'y':
+       {
+@@ -22840,372 +22824,4 @@ arm_builtin_support_vector_misalignment 
+ 						      is_packed);
+ }
+ 
+-/* Legitimize a memory reference for sync primitive implemented using
+-   ldrex / strex.  We currently force the form of the reference to be
+-   indirect without offset.  We do not yet support the indirect offset
+-   addressing supported by some ARM targets for these
+-   instructions.  */
+-static rtx
+-arm_legitimize_sync_memory (rtx memory)
+-{
+-  rtx addr = force_reg (Pmode, XEXP (memory, 0));
+-  rtx legitimate_memory = gen_rtx_MEM (GET_MODE (memory), addr);
+-
+-  set_mem_alias_set (legitimate_memory, ALIAS_SET_MEMORY_BARRIER);
+-  MEM_VOLATILE_P (legitimate_memory) = MEM_VOLATILE_P (memory);
+-  return legitimate_memory;
+-}
+-
+-/* An instruction emitter. */
+-typedef void (* emit_f) (int label, const char *, rtx *);
+-
+-/* An instruction emitter that emits via the conventional
+-   output_asm_insn.  */
+-static void
+-arm_emit (int label ATTRIBUTE_UNUSED, const char *pattern, rtx *operands)
+-{
+-  output_asm_insn (pattern, operands);
+-}
+-
+-/* Count the number of emitted synchronization instructions.  */
+-static unsigned arm_insn_count;
+-
+-/* An emitter that counts emitted instructions but does not actually
+-   emit instruction into the the instruction stream.  */
+-static void
+-arm_count (int label,
+-	   const char *pattern ATTRIBUTE_UNUSED,
+-	   rtx *operands ATTRIBUTE_UNUSED)
+-{
+-  if (! label)
+-    ++ arm_insn_count;
+-}
+-
+-/* Construct a pattern using conventional output formatting and feed
+-   it to output_asm_insn.  Provides a mechanism to construct the
+-   output pattern on the fly.  Note the hard limit on the pattern
+-   buffer size.  */
+-static void
+-arm_output_asm_insn (emit_f emit, int label, rtx *operands,
+-		     const char *pattern, ...)
+-{
+-  va_list ap;
+-  char buffer[256];
+-
+-  va_start (ap, pattern);
+-  vsprintf (buffer, pattern, ap);
+-  va_end (ap);
+-  emit (label, buffer, operands);
+-}
+-
+-/* Emit the memory barrier instruction, if any, provided by this
+-   target to a specified emitter.  */
+-static void
+-arm_process_output_memory_barrier (emit_f emit, rtx *operands)
+-{
+-  if (TARGET_HAVE_DMB)
+-    {
+-      /* Note we issue a system level barrier. We should consider
+-         issuing a inner shareabilty zone barrier here instead, ie.
+-         "DMB ISH".  */
+-      emit (0, "dmb\tsy", operands);
+-      return;
+-    }
+-
+-  if (TARGET_HAVE_DMB_MCR)
+-    {
+-      emit (0, "mcr\tp15, 0, r0, c7, c10, 5", operands);
+-      return;
+-    }
+-
+-  gcc_unreachable ();
+-}
+-
+-/* Emit the memory barrier instruction, if any, provided by this
+-   target.  */
+-const char *
+-arm_output_memory_barrier (rtx *operands)
+-{
+-  arm_process_output_memory_barrier (arm_emit, operands);
+-  return "";
+-}
+-
+-/* Helper to figure out the instruction suffix required on ldrex/strex
+-   for operations on an object of the specified mode.  */
+-static const char *
+-arm_ldrex_suffix (enum machine_mode mode)
+-{
+-  switch (mode)
+-    {
+-    case QImode: return "b";
+-    case HImode: return "h";
+-    case SImode: return "";
+-    case DImode: return "d";
+-    default:
+-      gcc_unreachable ();
+-    }
+-  return "";
+-}
+-
+-/* Emit an ldrex{b,h,d, } instruction appropriate for the specified
+-   mode.  */
+-static void
+-arm_output_ldrex (emit_f emit,
+-		  enum machine_mode mode,
+-		  rtx target,
+-		  rtx memory)
+-{
+-  const char *suffix = arm_ldrex_suffix (mode);
+-  rtx operands[2];
+-
+-  operands[0] = target;
+-  operands[1] = memory;
+-  arm_output_asm_insn (emit, 0, operands, "ldrex%s\t%%0, %%C1", suffix);
+-}
+-
+-/* Emit a strex{b,h,d, } instruction appropriate for the specified
+-   mode.  */
+-static void
+-arm_output_strex (emit_f emit,
+-		  enum machine_mode mode,
+-		  const char *cc,
+-		  rtx result,
+-		  rtx value,
+-		  rtx memory)
+-{
+-  const char *suffix = arm_ldrex_suffix (mode);
+-  rtx operands[3];
+-
+-  operands[0] = result;
+-  operands[1] = value;
+-  operands[2] = memory;
+-  arm_output_asm_insn (emit, 0, operands, "strex%s%s\t%%0, %%1, %%C2", suffix,
+-		       cc);
+-}
+-
+-/* Helper to emit a two operand instruction.  */
+-static void
+-arm_output_op2 (emit_f emit, const char *mnemonic, rtx d, rtx s)
+-{
+-  rtx operands[2];
+-
+-  operands[0] = d;
+-  operands[1] = s;
+-  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1", mnemonic);
+-}
+-
+-/* Helper to emit a three operand instruction.  */
+-static void
+-arm_output_op3 (emit_f emit, const char *mnemonic, rtx d, rtx a, rtx b)
+-{
+-  rtx operands[3];
+-
+-  operands[0] = d;
+-  operands[1] = a;
+-  operands[2] = b;
+-  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1, %%2", mnemonic);
+-}
+-
+-/* Emit a load store exclusive synchronization loop.
+-
+-   do
+-     old_value = [mem]
+-     if old_value != required_value
+-       break;
+-     t1 = sync_op (old_value, new_value)
+-     [mem] = t1, t2 = [0|1]
+-   while ! t2
+-
+-   Note:
+-     t1 == t2 is not permitted
+-     t1 == old_value is permitted
+-
+-   required_value:
+-
+-   RTX register or const_int representing the required old_value for
+-   the modify to continue, if NULL no comparsion is performed.  */
+-static void
+-arm_output_sync_loop (emit_f emit,
+-		      enum machine_mode mode,
+-		      rtx old_value,
+-		      rtx memory,
+-		      rtx required_value,
+-		      rtx new_value,
+-		      rtx t1,
+-		      rtx t2,
+-		      enum attr_sync_op sync_op,
+-		      int early_barrier_required)
+-{
+-  rtx operands[1];
+-
+-  gcc_assert (t1 != t2);
+-
+-  if (early_barrier_required)
+-    arm_process_output_memory_barrier (emit, NULL);
+-
+-  arm_output_asm_insn (emit, 1, operands, "%sLSYT%%=:", LOCAL_LABEL_PREFIX);
+-
+-  arm_output_ldrex (emit, mode, old_value, memory);
+-
+-  if (required_value)
+-    {
+-      rtx operands[2];
+-
+-      operands[0] = old_value;
+-      operands[1] = required_value;
+-      arm_output_asm_insn (emit, 0, operands, "cmp\t%%0, %%1");
+-      arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYB%%=", LOCAL_LABEL_PREFIX);
+-    }
+-
+-  switch (sync_op)
+-    {
+-    case SYNC_OP_ADD:
+-      arm_output_op3 (emit, "add", t1, old_value, new_value);
+-      break;
+-
+-    case SYNC_OP_SUB:
+-      arm_output_op3 (emit, "sub", t1, old_value, new_value);
+-      break;
+-
+-    case SYNC_OP_IOR:
+-      arm_output_op3 (emit, "orr", t1, old_value, new_value);
+-      break;
+-
+-    case SYNC_OP_XOR:
+-      arm_output_op3 (emit, "eor", t1, old_value, new_value);
+-      break;
+-
+-    case SYNC_OP_AND:
+-      arm_output_op3 (emit,"and", t1, old_value, new_value);
+-      break;
+-
+-    case SYNC_OP_NAND:
+-      arm_output_op3 (emit, "and", t1, old_value, new_value);
+-      arm_output_op2 (emit, "mvn", t1, t1);
+-      break;
+-
+-    case SYNC_OP_NONE:
+-      t1 = new_value;
+-      break;
+-    }
+-
+-  arm_output_strex (emit, mode, "", t2, t1, memory);
+-  operands[0] = t2;
+-  arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
+-  arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
+-
+-  arm_process_output_memory_barrier (emit, NULL);
+-  arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
+-}
+-
+-static rtx
+-arm_get_sync_operand (rtx *operands, int index, rtx default_value)
+-{
+-  if (index > 0)
+-    default_value = operands[index - 1];
+-
+-  return default_value;
+-}
+-
+-#define FETCH_SYNC_OPERAND(NAME, DEFAULT) \
+-  arm_get_sync_operand (operands, (int) get_attr_sync_##NAME (insn), DEFAULT);
+-
+-/* Extract the operands for a synchroniztion instruction from the
+-   instructions attributes and emit the instruction.  */
+-static void
+-arm_process_output_sync_insn (emit_f emit, rtx insn, rtx *operands)
+-{
+-  rtx result, memory, required_value, new_value, t1, t2;
+-  int early_barrier;
+-  enum machine_mode mode;
+-  enum attr_sync_op sync_op;
+-
+-  result = FETCH_SYNC_OPERAND(result, 0);
+-  memory = FETCH_SYNC_OPERAND(memory, 0);
+-  required_value = FETCH_SYNC_OPERAND(required_value, 0);
+-  new_value = FETCH_SYNC_OPERAND(new_value, 0);
+-  t1 = FETCH_SYNC_OPERAND(t1, 0);
+-  t2 = FETCH_SYNC_OPERAND(t2, 0);
+-  early_barrier =
+-    get_attr_sync_release_barrier (insn) == SYNC_RELEASE_BARRIER_YES;
+-  sync_op = get_attr_sync_op (insn);
+-  mode = GET_MODE (memory);
+-
+-  arm_output_sync_loop (emit, mode, result, memory, required_value,
+-			new_value, t1, t2, sync_op, early_barrier);
+-}
+-
+-/* Emit a synchronization instruction loop.  */
+-const char *
+-arm_output_sync_insn (rtx insn, rtx *operands)
+-{
+-  arm_process_output_sync_insn (arm_emit, insn, operands);
+-  return "";
+-}
+-
+-/* Count the number of machine instruction that will be emitted for a
+-   synchronization instruction.  Note that the emitter used does not
+-   emit instructions, it just counts instructions being carefull not
+-   to count labels.  */
+-unsigned int
+-arm_sync_loop_insns (rtx insn, rtx *operands)
+-{
+-  arm_insn_count = 0;
+-  arm_process_output_sync_insn (arm_count, insn, operands);
+-  return arm_insn_count;
+-}
+-
+-/* Helper to call a target sync instruction generator, dealing with
+-   the variation in operands required by the different generators.  */
+-static rtx
+-arm_call_generator (struct arm_sync_generator *generator, rtx old_value,
+-  		    rtx memory, rtx required_value, rtx new_value)
+-{
+-  switch (generator->op)
+-    {
+-    case arm_sync_generator_omn:
+-      gcc_assert (! required_value);
+-      return generator->u.omn (old_value, memory, new_value);
+-
+-    case arm_sync_generator_omrn:
+-      gcc_assert (required_value);
+-      return generator->u.omrn (old_value, memory, required_value, new_value);
+-    }
+-
+-  return NULL;
+-}
+-
+-/* Expand a synchronization loop. The synchronization loop is expanded
+-   as an opaque block of instructions in order to ensure that we do
+-   not subsequently get extraneous memory accesses inserted within the
+-   critical region. The exclusive access property of ldrex/strex is
+-   only guaranteed in there are no intervening memory accesses. */
+-void
+-arm_expand_sync (enum machine_mode mode,
+-		 struct arm_sync_generator *generator,
+-		 rtx target, rtx memory, rtx required_value, rtx new_value)
+-{
+-  if (target == NULL)
+-    target = gen_reg_rtx (mode);
+-
+-  memory = arm_legitimize_sync_memory (memory);
+-  if (mode != SImode)
+-    {
+-      rtx load_temp = gen_reg_rtx (SImode);
+-
+-      if (required_value)
+-	required_value = convert_modes (SImode, mode, required_value, true);
+-
+-      new_value = convert_modes (SImode, mode, new_value, true);
+-      emit_insn (arm_call_generator (generator, load_temp, memory,
+-				     required_value, new_value));
+-      emit_move_insn (target, gen_lowpart (mode, load_temp));
+-    }
+-  else
+-    {
+-      emit_insn (arm_call_generator (generator, target, memory, required_value,
+-				     new_value));
+-    }
+-}
+-
+ #include "gt-arm.h"
+Index: gcc-4.5/gcc/config/arm/arm.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.h
++++ gcc-4.5/gcc/config/arm/arm.h
+@@ -128,24 +128,6 @@ enum target_cpus
+ /* The processor for which instructions should be scheduled.  */
+ extern enum processor_type arm_tune;
+ 
+-enum arm_sync_generator_tag
+-  {
+-    arm_sync_generator_omn,
+-    arm_sync_generator_omrn
+-  };
+-
+-/* Wrapper to pass around a polymorphic pointer to a sync instruction
+-   generator and.  */
+-struct arm_sync_generator
+-{
+-  enum arm_sync_generator_tag op;
+-  union
+-  {
+-    rtx (* omn) (rtx, rtx, rtx);
+-    rtx (* omrn) (rtx, rtx, rtx, rtx);
+-  } u;
+-};
+-
+ typedef enum arm_cond_code
+ {
+   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC,
+@@ -290,20 +272,6 @@ extern void (*arm_lang_output_object_att
+    for Thumb-2.  */
+ #define TARGET_UNIFIED_ASM TARGET_THUMB2
+ 
+-/* Nonzero if this chip provides the DMB instruction.  */
+-#define TARGET_HAVE_DMB		(arm_arch7)
+-
+-/* Nonzero if this chip implements a memory barrier via CP15.  */
+-#define TARGET_HAVE_DMB_MCR	(arm_arch6k && ! TARGET_HAVE_DMB)
+-
+-/* Nonzero if this chip implements a memory barrier instruction.  */
+-#define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)
+-
+-/* Nonzero if this chip supports ldrex and strex */
+-#define TARGET_HAVE_LDREX	((arm_arch6 && TARGET_ARM) || arm_arch7)
+-
+-/* Nonzero if this chip supports ldrex{bhd} and strex{bhd}.  */
+-#define TARGET_HAVE_LDREXBHD	((arm_arch6k && TARGET_ARM) || arm_arch7)
+ 
+ /* True iff the full BPABI is being used.  If TARGET_BPABI is true,
+    then TARGET_AAPCS_BASED must be true -- but the converse does not
+@@ -437,12 +405,6 @@ extern int arm_arch5e;
+ /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
+ extern int arm_arch6;
+ 
+-/* Nonzero if this chip supports the ARM Architecture 6k extensions.  */
+-extern int arm_arch6k;
+-
+-/* Nonzero if this chip supports the ARM Architecture 7 extensions.  */
+-extern int arm_arch7;
+-
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ extern int arm_arch_notm;
+ 
+Index: gcc-4.5/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.md
++++ gcc-4.5/gcc/config/arm/arm.md
+@@ -103,7 +103,6 @@
+    (UNSPEC_RBIT 26)       ; rbit operation.
+    (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from
+                              ; another symbolic address.
+-   (UNSPEC_MEMORY_BARRIER 28) ; Represent a memory barrier.
+   ]
+ )
+ 
+@@ -140,11 +139,6 @@
+    (VUNSPEC_ALIGN32  16) ; Used to force 32-byte alignment.
+    (VUNSPEC_EH_RETURN 20); Use to override the return address for exception
+ 			 ; handling.
+-   (VUNSPEC_SYNC_COMPARE_AND_SWAP 21)	; Represent an atomic compare swap.
+-   (VUNSPEC_SYNC_LOCK             22)	; Represent a sync_lock_test_and_set.
+-   (VUNSPEC_SYNC_OP               23)	; Represent a sync_<op>
+-   (VUNSPEC_SYNC_NEW_OP           24)	; Represent a sync_new_<op>
+-   (VUNSPEC_SYNC_OLD_OP           25)	; Represent a sync_old_<op>
+   ]
+ )
+ 
+@@ -169,21 +163,8 @@
+ (define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp"
+   (const (symbol_ref "arm_fpu_attr")))
+ 
+-(define_attr "sync_result"          "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_memory"          "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_required_value"  "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_new_value"       "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_t1"              "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_t2"              "none,0,1,2,3,4,5" (const_string "none"))
+-(define_attr "sync_release_barrier" "yes,no"           (const_string "yes"))
+-(define_attr "sync_op"              "none,add,sub,ior,xor,and,nand"
+-                                    (const_string "none"))
+-
+ ; LENGTH of an instruction (in bytes)
+-(define_attr "length" ""
+-  (cond [(not (eq_attr "sync_memory" "none"))
+- 	   (symbol_ref "arm_sync_loop_insns (insn, operands) * 4")
+-	] (const_int 4)))
++(define_attr "length" "" (const_int 4))
+ 
+ ; POOL_RANGE is how far away from a constant pool entry that this insn
+ ; can be placed.  If the distance is zero, then this insn will never
+@@ -11568,5 +11549,4 @@
+ (include "thumb2.md")
+ ;; Neon patterns
+ (include "neon.md")
+-;; Synchronization Primitives
+-(include "sync.md")
++
+Index: gcc-4.5/gcc/config/arm/predicates.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/predicates.md
++++ gcc-4.5/gcc/config/arm/predicates.md
+@@ -573,11 +573,6 @@
+ 		(and (match_test "TARGET_32BIT")
+ 		     (match_operand 0 "arm_di_operand"))))
+ 
+-;; True if the operand is memory reference suitable for a ldrex/strex.
+-(define_predicate "arm_sync_memory_operand"
+-  (and (match_operand 0 "memory_operand")
+-       (match_code "reg" "0")))
+-
+ ;; Predicates for parallel expanders based on mode.
+ (define_special_predicate "vect_par_constant_high" 
+   (match_code "parallel")
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99409.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99409.patch
new file mode 100644
index 0000000000..39c3ab0810
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99409.patch
@@ -0,0 +1,18 @@
+2010-09-30  Jie Zhang  <jie@codesourcery.com>
+
+	gcc/testsuite/
+	* gcc.target/arm/neon-thumb2-move.c: Add
+	dg-require-effective-target arm_thumb2_ok.
+
+=== modified file 'gcc/testsuite/gcc.target/arm/neon-thumb2-move.c'
+Index: gcc-4.5/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
++++ gcc-4.5/gcc/testsuite/gcc.target/arm/neon-thumb2-move.c
+@@ -1,5 +1,6 @@
+ /* { dg-do compile } */
+ /* { dg-require-effective-target arm_neon_ok } */
++/* { dg-require-effective-target arm_thumb2_ok } */
+ /* { dg-options "-O2 -mthumb -march=armv7-a" } */
+ /* { dg-add-options arm_neon } */
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99410.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99410.patch
new file mode 100644
index 0000000000..f2a1c95621
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99410.patch
@@ -0,0 +1,32 @@
+2010-10-06  Julian Brown  <julian@codesourcery.com>
+
+	gcc/testsuite/
+	* gcc.dg/Warray-bounds-3.c: Add -fno-unroll-loops for ARM.
+	* gcc.dg/vect/vect.exp: Likewise, for all vect tests.
+
+
+=== modified file 'gcc/testsuite/gcc.dg/Warray-bounds-3.c'
+Index: gcc-4.5/gcc/testsuite/gcc.dg/Warray-bounds-3.c
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/gcc.dg/Warray-bounds-3.c
++++ gcc-4.5/gcc/testsuite/gcc.dg/Warray-bounds-3.c
+@@ -1,5 +1,7 @@
+ /* { dg-do compile } */
+ /* { dg-options "-O2 -Warray-bounds" } */
++/* { dg-options "-O2 -Warray-bounds -fno-unroll-loops" { target arm*-*-* } } */
++
+ /* based on PR 31227 */
+ 
+ typedef __SIZE_TYPE__ size_t;
+Index: gcc-4.5/gcc/testsuite/gcc.dg/vect/vect.exp
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/gcc.dg/vect/vect.exp
++++ gcc-4.5/gcc/testsuite/gcc.dg/vect/vect.exp
+@@ -109,6 +109,7 @@ if  [istarget "powerpc-*paired*"]  {
+     # default to avoid loss of precision.  We must pass -ffast-math to test
+     # vectorization of float operations.
+     lappend DEFAULT_VECTCFLAGS "-ffast-math"
++    lappend DEFAULT_VECTCFLAGS "-fno-unroll-loops"
+     if [is-effective-target arm_neon_hw] {
+       set dg-do-what-default run
+     } else {
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99411.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99411.patch
new file mode 100644
index 0000000000..c9a9316861
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99411.patch
@@ -0,0 +1,21 @@
+2010-10-08  Jie Zhang  <jie@codesourcery.com>
+
+	* config/arm/arm.c (arm_override_options): Disable
+	-fsched-interblock for Cortex-M4.
+
+=== modified file 'gcc/config/arm/arm.c'
+Index: gcc-4.5/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.c
++++ gcc-4.5/gcc/config/arm/arm.c
+@@ -1913,6 +1913,10 @@ arm_override_options (void)
+ 	fix_cm3_ldrd = 0;
+     }
+ 
++  /* Disable -fsched-interblock for Cortex-M4.  */
++  if (arm_selected_tune->core == cortexm4)
++    flag_schedule_interblock = 0;
++
+   if (TARGET_THUMB1 && flag_schedule_insns)
+     {
+       /* Don't warn since it's on by default in -O2.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99412.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99412.patch
new file mode 100644
index 0000000000..c0aabbeb56
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99412.patch
@@ -0,0 +1,316 @@
+2010-10-09  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-06-03  Paul Brook  <paul@codesourcery.com>
+	* config/arm/arm.c (FL_TUNE): Define.
+	(arm_default_cpu, arm_cpu_select): Remove.
+	(all_cores): Populate core field.
+	(arm_selected_arch, arm_selected_cpu, arm_selected_tune): New.
+	(arm_find_cpu): New function.
+	(arm_handle_option): Lookup cpu/architecture names.
+	(arm_override_options): Cleanup mcpu/march/mtune handling.
+	(arm_file_start): Ditto.
+
+=== modified file 'gcc/config/arm/arm.c'
+Index: gcc-4.5/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.c
++++ gcc-4.5/gcc/config/arm/arm.c
+@@ -550,9 +550,6 @@ enum processor_type arm_tune = arm_none;
+ /* The current tuning set.  */
+ const struct tune_params *current_tune;
+ 
+-/* The default processor used if not overridden by commandline.  */
+-static enum processor_type arm_default_cpu = arm_none;
+-
+ /* Which floating point hardware to schedule for.  */
+ int arm_fpu_attr;
+ 
+@@ -608,6 +605,10 @@ static int thumb_call_reg_needed;
+ 
+ #define FL_IWMMXT     (1 << 29)	      /* XScale v2 or "Intel Wireless MMX technology".  */
+ 
++/* Flags that only effect tuning, not available instructions.  */
++#define FL_TUNE		(FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
++			 | FL_CO_PROC)
++
+ #define FL_FOR_ARCH2	FL_NOTM
+ #define FL_FOR_ARCH3	(FL_FOR_ARCH2 | FL_MODE32)
+ #define FL_FOR_ARCH3M	(FL_FOR_ARCH3 | FL_ARCH3M)
+@@ -808,7 +809,7 @@ static const struct processors all_cores
+ {
+   /* ARM Cores */
+ #define ARM_CORE(NAME, IDENT, ARCH, FLAGS, COSTS) \
+-  {NAME, arm_none, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, &arm_##COSTS##_tune},
++  {NAME, IDENT, #ARCH, FLAGS | FL_FOR_ARCH##ARCH, &arm_##COSTS##_tune},
+ #include "arm-cores.def"
+ #undef ARM_CORE
+   {NULL, arm_none, NULL, 0, NULL}
+@@ -850,29 +851,12 @@ static const struct processors all_archi
+   {NULL, arm_none, NULL, 0 , NULL}
+ };
+ 
+-struct arm_cpu_select
+-{
+-  const char *              string;
+-  const char *              name;
+-  const struct processors * processors;
+-};
+-
+-/* This is a magic structure.  The 'string' field is magically filled in
+-   with a pointer to the value specified by the user on the command line
+-   assuming that the user has specified such a value.  */
+-
+-static struct arm_cpu_select arm_select[] =
+-{
+-  /* string	  name            processors  */
+-  { NULL,	"-mcpu=",	all_cores  },
+-  { NULL,	"-march=",	all_architectures },
+-  { NULL,	"-mtune=",	all_cores }
+-};
+ 
+-/* Defines representing the indexes into the above table.  */
+-#define ARM_OPT_SET_CPU 0
+-#define ARM_OPT_SET_ARCH 1
+-#define ARM_OPT_SET_TUNE 2
++/* These are populated as commandline arguments are processed, or NULL
++   if not specified.  */
++static const struct processors *arm_selected_arch;
++static const struct processors *arm_selected_cpu;
++static const struct processors *arm_selected_tune;
+ 
+ /* The name of the preprocessor macro to define for this architecture.  */
+ 
+@@ -1234,6 +1218,24 @@ arm_gimplify_va_arg_expr (tree valist, t
+   return std_gimplify_va_arg_expr (valist, type, pre_p, post_p);
+ }
+ 
++/* Lookup NAME in SEL.  */
++
++static const struct processors *
++arm_find_cpu (const char *name, const struct processors *sel, const char *desc)
++{
++  if (!(name && *name))
++    return NULL;
++
++  for (; sel->name != NULL; sel++)
++    {
++      if (streq (name, sel->name))
++	return sel;
++    }
++
++  error ("bad value (%s) for %s switch", name, desc);
++  return NULL;
++}
++
+ /* Implement TARGET_HANDLE_OPTION.  */
+ 
+ static bool
+@@ -1242,11 +1244,11 @@ arm_handle_option (size_t code, const ch
+   switch (code)
+     {
+     case OPT_march_:
+-      arm_select[1].string = arg;
++      arm_selected_arch = arm_find_cpu(arg, all_architectures, "-march");
+       return true;
+ 
+     case OPT_mcpu_:
+-      arm_select[0].string = arg;
++      arm_selected_cpu = arm_find_cpu(arg, all_cores, "-mcpu");
+       return true;
+ 
+     case OPT_mhard_float:
+@@ -1258,7 +1260,7 @@ arm_handle_option (size_t code, const ch
+       return true;
+ 
+     case OPT_mtune_:
+-      arm_select[2].string = arg;
++      arm_selected_tune = arm_find_cpu(arg, all_cores, "-mtune");
+       return true;
+ 
+     default:
+@@ -1358,88 +1360,52 @@ void
+ arm_override_options (void)
+ {
+   unsigned i;
+-  enum processor_type target_arch_cpu = arm_none;
+-  enum processor_type selected_cpu = arm_none;
+ 
+-  /* Set up the flags based on the cpu/architecture selected by the user.  */
+-  for (i = ARRAY_SIZE (arm_select); i--;)
++  if (arm_selected_arch)
+     {
+-      struct arm_cpu_select * ptr = arm_select + i;
+-
+-      if (ptr->string != NULL && ptr->string[0] != '\0')
+-        {
+-	  const struct processors * sel;
+-
+-          for (sel = ptr->processors; sel->name != NULL; sel++)
+-            if (streq (ptr->string, sel->name))
+-              {
+-		/* Set the architecture define.  */
+-		if (i != ARM_OPT_SET_TUNE)
+-		  sprintf (arm_arch_name, "__ARM_ARCH_%s__", sel->arch);
+-
+-		/* Determine the processor core for which we should
+-		   tune code-generation.  */
+-		if (/* -mcpu= is a sensible default.  */
+-		    i == ARM_OPT_SET_CPU
+-		    /* -mtune= overrides -mcpu= and -march=.  */
+-		    || i == ARM_OPT_SET_TUNE)
+-		  arm_tune = (enum processor_type) (sel - ptr->processors);
+-
+-		/* Remember the CPU associated with this architecture.
+-		   If no other option is used to set the CPU type,
+-		   we'll use this to guess the most suitable tuning
+-		   options.  */
+-		if (i == ARM_OPT_SET_ARCH)
+-		  target_arch_cpu = sel->core;
+-
+-		if (i == ARM_OPT_SET_CPU)
+-		  selected_cpu = (enum processor_type) (sel - ptr->processors);
+-		  
+-		if (i != ARM_OPT_SET_TUNE)
+-		  {
+-		    /* If we have been given an architecture and a processor
+-		       make sure that they are compatible.  We only generate
+-		       a warning though, and we prefer the CPU over the
+-		       architecture.  */
+-		    if (insn_flags != 0 && (insn_flags ^ sel->flags))
+-		      warning (0, "switch -mcpu=%s conflicts with -march= switch",
+-			       ptr->string);
+-
+-		    insn_flags = sel->flags;
+-		  }
+-
+-                break;
+-              }
++      if (arm_selected_cpu)
++	{
++	  /* Check for conflict between mcpu and march */
++	  if ((arm_selected_cpu->flags ^ arm_selected_arch->flags) & ~FL_TUNE)
++	    {
++	      warning (0, "switch -mcpu=%s conflicts with -march=%s switch",
++		       arm_selected_cpu->name, arm_selected_arch->name);
++	      /* -march wins for code generation.
++	         -mcpu wins for default tuning.  */
++	      if (!arm_selected_tune)
++		arm_selected_tune = arm_selected_cpu;
+ 
+-          if (sel->name == NULL)
+-            error ("bad value (%s) for %s switch", ptr->string, ptr->name);
+-        }
++	      arm_selected_cpu = arm_selected_arch;
++	    }
++	  else
++	    /* -mcpu wins.  */
++	    arm_selected_arch = NULL;
++	}
++      else
++	/* Pick a CPU based on the architecture.  */
++	arm_selected_cpu = arm_selected_arch;
+     }
+ 
+-  /* Guess the tuning options from the architecture if necessary.  */
+-  if (arm_tune == arm_none)
+-    arm_tune = target_arch_cpu;
+-
+   /* If the user did not specify a processor, choose one for them.  */
+-  if (insn_flags == 0)
++  if (!arm_selected_cpu)
+     {
+       const struct processors * sel;
+       unsigned int        sought;
+ 
+-      selected_cpu = (enum processor_type) TARGET_CPU_DEFAULT;
+-      if (selected_cpu == arm_none)
++      arm_selected_cpu = &all_cores[TARGET_CPU_DEFAULT];
++      if (!arm_selected_cpu->name)
+ 	{
+ #ifdef SUBTARGET_CPU_DEFAULT
+ 	  /* Use the subtarget default CPU if none was specified by
+ 	     configure.  */
+-	  selected_cpu = (enum processor_type) SUBTARGET_CPU_DEFAULT;
++	  arm_selected_cpu = &all_cores[SUBTARGET_CPU_DEFAULT];
+ #endif
+ 	  /* Default to ARM6.  */
+-	  if (selected_cpu == arm_none)
+-	    selected_cpu = arm6;
++	  if (arm_selected_cpu->name)
++	    arm_selected_cpu = &all_cores[arm6];
+ 	}
+-      sel = &all_cores[selected_cpu];
+ 
++      sel = arm_selected_cpu;
+       insn_flags = sel->flags;
+ 
+       /* Now check to see if the user has specified some command line
+@@ -1500,17 +1466,21 @@ arm_override_options (void)
+ 	      sel = best_fit;
+ 	    }
+ 
+-	  insn_flags = sel->flags;
++	  arm_selected_cpu = sel;
+ 	}
+-      sprintf (arm_arch_name, "__ARM_ARCH_%s__", sel->arch);
+-      arm_default_cpu = (enum processor_type) (sel - all_cores);
+-      if (arm_tune == arm_none)
+-	arm_tune = arm_default_cpu;
+     }
+ 
+-  /* The processor for which we should tune should now have been
+-     chosen.  */
+-  gcc_assert (arm_tune != arm_none);
++  gcc_assert (arm_selected_cpu);
++  /* The selected cpu may be an architecture, so lookup tuning by core ID.  */
++  if (!arm_selected_tune)
++    arm_selected_tune = &all_cores[arm_selected_cpu->core];
++
++  sprintf (arm_arch_name, "__ARM_ARCH_%s__", arm_selected_cpu->arch);
++  insn_flags = arm_selected_cpu->flags;
++
++  arm_tune = arm_selected_tune->core;
++  tune_flags = arm_selected_tune->flags;
++  current_tune = arm_selected_tune->tune;
+ 
+   if (arm_tune == cortexa8 && optimize >= 3)
+     {
+@@ -1522,9 +1492,6 @@ arm_override_options (void)
+ 	align_jumps = 16;
+     }
+ 
+-  tune_flags = all_cores[(int)arm_tune].flags;
+-  current_tune = all_cores[(int)arm_tune].tune;
+-
+   if (target_fp16_format_name)
+     {
+       for (i = 0; i < ARRAY_SIZE (all_fp16_formats); i++)
+@@ -1907,7 +1874,7 @@ arm_override_options (void)
+   /* Enable -mfix-cortex-m3-ldrd by default for Cortex-M3 cores.  */
+   if (fix_cm3_ldrd == 2)
+     {
+-      if (selected_cpu == cortexm3)
++      if (arm_selected_cpu->core == cortexm3)
+ 	fix_cm3_ldrd = 1;
+       else
+ 	fix_cm3_ldrd = 0;
+@@ -21235,13 +21202,10 @@ arm_file_start (void)
+   if (TARGET_BPABI)
+     {
+       const char *fpu_name;
+-      if (arm_select[0].string)
+-	asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_select[0].string);
+-      else if (arm_select[1].string)
+-	asm_fprintf (asm_out_file, "\t.arch %s\n", arm_select[1].string);
++      if (arm_selected_arch)
++	asm_fprintf (asm_out_file, "\t.arch %s\n", arm_selected_arch->name);
+       else
+-	asm_fprintf (asm_out_file, "\t.cpu %s\n",
+-		     all_cores[arm_default_cpu].name);
++	asm_fprintf (asm_out_file, "\t.cpu %s\n", arm_selected_cpu->name);
+ 
+       if (TARGET_SOFT_FLOAT)
+ 	{
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch
new file mode 100644
index 0000000000..3f873e7fe6
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99413.patch
@@ -0,0 +1,26 @@
+2010-10-13  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-04-20  James E. Wilson  <wilson@codesourcery.com>
+
+	gcc/
+	PR rtl-optimization/43520
+	* ira-lives.c (ira_implicitly_set_insn_hard_regs): Exclude classes with
+	zero available registers.
+
+=== modified file 'gcc/ira-lives.c'
+Index: gcc-4.5/gcc/ira-lives.c
+===================================================================
+--- gcc-4.5.orig/gcc/ira-lives.c
++++ gcc-4.5/gcc/ira-lives.c
+@@ -805,6 +805,9 @@ ira_implicitly_set_insn_hard_regs (HARD_
+ 			? GENERAL_REGS
+ 			: REG_CLASS_FROM_CONSTRAINT (c, p));
+ 		  if (cl != NO_REGS
++		      /* There is no register pressure problem if all of the
++			 regs in this class are fixed.  */
++		      && ira_available_class_regs[cl] != 0
+ 		      && (ira_available_class_regs[cl]
+ 			  <= ira_reg_class_nregs[cl][mode]))
+ 		    IOR_HARD_REG_SET (*set, reg_class_contents[cl]);
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99415.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99415.patch
new file mode 100644
index 0000000000..3622ac4238
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99415.patch
@@ -0,0 +1,46 @@
+2010-10-13  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Issue #8615
+
+	Backport from mainline:
+
+	2010-10-12  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.h (ARM_EXPAND_ALIGNMENT): Rename from
+	DATA_ALIGNMENT and add COND parameter. Update comments above.
+	(DATA_ALIGNMENT): Use ARM_EXPAND_ALIGNMENT, with !optimize_size.
+	(LOCAL_ALIGNMENT): Use ARM_EXPAND_ALIGNMENT, with
+	!flag_conserve_stack.
+
+=== modified file 'gcc/config/arm/arm.h'
+Index: gcc-4.5/gcc/config/arm/arm.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.h
++++ gcc-4.5/gcc/config/arm/arm.h
+@@ -596,15 +596,21 @@ extern int low_irq_latency;
+ /* Align definitions of arrays, unions and structures so that
+    initializations and copies can be made more efficient.  This is not
+    ABI-changing, so it only affects places where we can see the
+-   definition.  */
+-#define DATA_ALIGNMENT(EXP, ALIGN)					\
+-  ((((ALIGN) < BITS_PER_WORD)                                           \
++   definition. Increasing the alignment tends to introduce padding,
++   so don't do this when optimizing for size/conserving stack space. */
++#define ARM_EXPAND_ALIGNMENT(COND, EXP, ALIGN)				\
++  (((COND) && ((ALIGN) < BITS_PER_WORD)					\
+     && (TREE_CODE (EXP) == ARRAY_TYPE					\
+ 	|| TREE_CODE (EXP) == UNION_TYPE				\
+ 	|| TREE_CODE (EXP) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
+ 
++/* Align global data. */
++#define DATA_ALIGNMENT(EXP, ALIGN)			\
++  ARM_EXPAND_ALIGNMENT(!optimize_size, EXP, ALIGN)
++
+ /* Similarly, make sure that objects on the stack are sensibly aligned.  */
+-#define LOCAL_ALIGNMENT(EXP, ALIGN) DATA_ALIGNMENT(EXP, ALIGN)
++#define LOCAL_ALIGNMENT(EXP, ALIGN)				\
++  ARM_EXPAND_ALIGNMENT(!flag_conserve_stack, EXP, ALIGN)
+ 
+ /* Setting STRUCTURE_SIZE_BOUNDARY to 32 produces more efficient code, but the
+    value set in previous versions of this toolchain was 8, which produces more
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99416.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99416.patch
new file mode 100644
index 0000000000..72a221b1d2
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99416.patch
@@ -0,0 +1,130 @@
+2010-10-15  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-10-15  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	gcc/
+	* ifcvt.c (find_active_insn_before): New function.
+	(find_active_insn_after): New function.
+	(cond_exec_process_if_block): Use new functions to replace
+	prev_active_insn() and next_active_insn().
+
+	gcc/testsuite/
+	* gcc.dg/20101010-1.c: New testcase.
+
+=== modified file 'gcc/ifcvt.c'
+Index: gcc-4.5/gcc/ifcvt.c
+===================================================================
+--- gcc-4.5.orig/gcc/ifcvt.c
++++ gcc-4.5/gcc/ifcvt.c
+@@ -88,6 +88,8 @@ static int count_bb_insns (const_basic_b
+ static bool cheap_bb_rtx_cost_p (const_basic_block, int);
+ static rtx first_active_insn (basic_block);
+ static rtx last_active_insn (basic_block, int);
++static rtx find_active_insn_before (basic_block, rtx);
++static rtx find_active_insn_after (basic_block, rtx);
+ static basic_block block_fallthru (basic_block);
+ static int cond_exec_process_insns (ce_if_block_t *, rtx, rtx, rtx, rtx, int);
+ static rtx cond_exec_get_condition (rtx);
+@@ -230,6 +232,48 @@ last_active_insn (basic_block bb, int sk
+   return insn;
+ }
+ 
++/* Return the active insn before INSN inside basic block CURR_BB. */
++
++static rtx
++find_active_insn_before (basic_block curr_bb, rtx insn)
++{
++  if (!insn || insn == BB_HEAD (curr_bb))
++    return NULL_RTX;
++
++  while ((insn = PREV_INSN (insn)) != NULL_RTX)
++    {
++      if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
++        break;
++
++      /* No other active insn all the way to the start of the basic block. */
++      if (insn == BB_HEAD (curr_bb))
++        return NULL_RTX;
++    }
++
++  return insn;
++}
++
++/* Return the active insn after INSN inside basic block CURR_BB. */
++
++static rtx
++find_active_insn_after (basic_block curr_bb, rtx insn)
++{
++  if (!insn || insn == BB_END (curr_bb))
++    return NULL_RTX;
++
++  while ((insn = NEXT_INSN (insn)) != NULL_RTX)
++    {
++      if (NONJUMP_INSN_P (insn) || JUMP_P (insn) || CALL_P (insn))
++        break;
++
++      /* No other active insn all the way to the end of the basic block. */
++      if (insn == BB_END (curr_bb))
++        return NULL_RTX;
++    }
++
++  return insn;
++}
++
+ /* Return the basic block reached by falling though the basic block BB.  */
+ 
+ static basic_block
+@@ -448,9 +492,9 @@ cond_exec_process_if_block (ce_if_block_
+       if (n_matching > 0)
+ 	{
+ 	  if (then_end)
+-	    then_end = prev_active_insn (then_first_tail);
++	    then_end = find_active_insn_before (then_bb, then_first_tail);
+ 	  if (else_end)
+-	    else_end = prev_active_insn (else_first_tail);
++	    else_end = find_active_insn_before (else_bb, else_first_tail);
+ 	  n_insns -= 2 * n_matching;
+ 	}
+ 
+@@ -488,9 +532,9 @@ cond_exec_process_if_block (ce_if_block_
+ 	  if (n_matching > 0)
+ 	    {
+ 	      if (then_start)
+-		then_start = next_active_insn (then_last_head);
++		then_start = find_active_insn_after (then_bb, then_last_head);
+ 	      if (else_start)
+-		else_start = next_active_insn (else_last_head);
++		else_start = find_active_insn_after (else_bb, else_last_head);
+ 	      n_insns -= 2 * n_matching;
+ 	    }
+ 	}
+@@ -646,7 +690,7 @@ cond_exec_process_if_block (ce_if_block_
+     {
+       rtx from = then_first_tail;
+       if (!INSN_P (from))
+-	from = next_active_insn (from);
++	from = find_active_insn_after (then_bb, from);
+       delete_insn_chain (from, BB_END (then_bb), false);
+     }
+   if (else_last_head)
+Index: gcc-4.5/gcc/testsuite/gcc.dg/20101010-1.c
+===================================================================
+--- /dev/null
++++ gcc-4.5/gcc/testsuite/gcc.dg/20101010-1.c
+@@ -0,0 +1,14 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fno-crossjumping" } */
++
++int foo (void)
++{
++  int len;
++  if (bar1 (&len))
++    {
++      char devpath [len];
++      if (bar2 (devpath) == len)
++        return len;
++    }
++  return -1;
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99417.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99417.patch
new file mode 100644
index 0000000000..2ad7e69681
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99417.patch
@@ -0,0 +1,53 @@
+2010-10-15  Jie Zhang  <jie@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/testsuite/
+	2010-10-15  Jie Zhang  <jie@codesourcery.com>
+
+	* lib/lto.exp (lto-link-and-maybe-run): Use the default linker
+	script when relocatable linking.
+
+=== modified file 'gcc/testsuite/lib/lto.exp'
+Index: gcc-4.5/gcc/testsuite/lib/lto.exp
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/lib/lto.exp
++++ gcc-4.5/gcc/testsuite/lib/lto.exp
+@@ -156,6 +156,7 @@ proc lto-link-and-maybe-run { testname o
+     global testcase
+     global tool
+     global compile_type
++    global board_info
+ 
+     # Check that all of the objects were built successfully.
+     foreach obj [split $objlist] {
+@@ -170,10 +171,29 @@ proc lto-link-and-maybe-run { testname o
+     set options ""
+     lappend options "additional_flags=$optall $optfile"
+ 
++    set target_board [target_info name]
++    set relocatable 0
++
++    # Some LTO tests do relocatable linking. Some target boards set
++    # a linker script which can't be used for relocatable linking.
++    # Use the default linker script instead.
++    if { [lsearch -exact [split "$optall $optfile"] "-r"] >= 0 } {
++	set relocatable 1
++    }
++
++    if { $relocatable } {
++	set saved_ldscript [board_info $target_board ldscript]
++	set board_info($target_board,ldscript) ""
++    }
++
+     # Link the objects into an executable.
+     set comp_output [${tool}_target_compile "$objlist" $dest executable \
+ 		     "$options"]
+ 
++    if { $relocatable } {
++	set board_info($target_board,ldscript) $saved_ldscript
++    }
++
+     # Prune unimportant visibility warnings before checking output.
+     set comp_output [lto_prune_warns $comp_output]
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99418.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99418.patch
new file mode 100644
index 0000000000..3ea7956f0f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99418.patch
@@ -0,0 +1,25 @@
+2010-10-20  Yao Qi  <yao@codesourcery.com>
+
+	Merge from Sourcery G++ to fix LP:660021
+	2010-10-18  Paul Brook  <paul@codesourcery.com>
+
+	* tree-vect-stmts.c (supportable_widening_operation): Check if wide
+	vector type exists.
+
+=== modified file 'gcc/tree-vect-stmts.c'
+Index: gcc-4.5/gcc/tree-vect-stmts.c
+===================================================================
+--- gcc-4.5.orig/gcc/tree-vect-stmts.c
++++ gcc-4.5/gcc/tree-vect-stmts.c
+@@ -4867,6 +4867,11 @@ supportable_widening_operation (enum tre
+   tree wide_vectype = get_vectype_for_scalar_type (type);
+   enum tree_code c1, c2;
+ 
++  /* Check we have a valid vector type for the result.  */
++  if (!wide_vectype)
++    return false;
++
++
+   /* The result of a vectorized widening operation usually requires two vectors
+      (because the widened results do not fit int one vector). The generated
+      vector results would normally be expected to be generated in the same
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99419.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99419.patch
new file mode 100644
index 0000000000..cb434082bf
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99419.patch
@@ -0,0 +1,734 @@
+2010-10-22  Julian Brown  <julian@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-10-18  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/testsuite/
+	* gcc.target/arm/synchronize.c: Permit dmb or mcr in assembler scan.
+
+2010-10-14  Julian Brown  <julian@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-08-18  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/
+	* config/arm/arm-protos.h (arm_expand_sync): New.
+	(arm_output_memory_barrier, arm_output_sync_insn): New.
+	(arm_sync_loop_insns): New.
+	* config/arm/arm.c (FL_ARCH7): New.
+	(FL_FOR_ARCH7): Include FL_ARCH7.
+	(arm_arch7): New.
+	(arm_print_operand): Support %C markup.
+	(arm_legitimize_sync_memory): New.
+	(arm_emit, arm_insn_count, arm_count, arm_output_asm_insn): New.
+	(arm_process_output_memory_barrier, arm_output_memory_barrier): New.
+	(arm_ldrex_suffix, arm_output_ldrex, arm_output_strex): New.
+	(arm_output_op2, arm_output_op3, arm_output_sync_loop): New.
+	(arm_get_sync_operand, FETCH_SYNC_OPERAND): New.
+	(arm_process_output_sync_insn, arm_output_sync_insn): New.
+	(arm_sync_loop_insns,arm_call_generator, arm_expand_sync): New.
+	* config/arm/arm.h (struct arm_sync_generator): New.
+	(TARGET_HAVE_DMB, TARGET_HAVE_DMB_MCR): New.
+	(TARGET_HAVE_MEMORY_BARRIER): New.
+	(TARGET_HAVE_LDREX, TARGET_HAVE_LDREXBHD): New.
+	* config/arm/arm.md: Include sync.md.
+	(UNSPEC_MEMORY_BARRIER): New.
+	(VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK): New.
+	(VUNSPEC_SYNC_OP):New.
+	(VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): New.
+	(sync_result, sync_memory, sync_required_value): New attributes.
+	(sync_new_value, sync_t1, sync_t2): Likewise.
+	(sync_release_barrier, sync_op): Likewise.
+	(length): Add logic to length attribute defintion to call
+	arm_sync_loop_insns when appropriate.
+	* config/arm/sync.md: New file.
+
+	2010-09-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/
+	* config/arm/predicates.md (arm_sync_memory_operand): New.
+	* config/arm/sync.md (arm_sync_compare_and_swapsi): Change predicate
+	to arm_sync_memory_operand and constraint to Q.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_lock_test_and_setsi): Likewise.
+	(arm_sync_lock_test_and_set<mode>): Likewise.
+	(arm_sync_new_<sync_optab>si): Likewise.
+	(arm_sync_new_nandsi): Likewise.
+	(arm_sync_new_<sync_optab><mode>): Likewise.
+	(arm_sync_new_nand<mode>): Likewise.
+	(arm_sync_old_<sync_optab>si): Likewise.
+	(arm_sync_old_nandsi): Likewise.
+	(arm_sync_old_<sync_optab><mode>): Likewise.
+	(arm_sync_old_nand<mode>): Likewise.
+
+	2010-09-13  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/
+	* config/arm/arm.md: (define_attr "conds"): Update comment.
+	* config/arm/sync.md (arm_sync_compare_and_swapsi): Change
+	conds attribute to clob.
+	(arm_sync_compare_and_swapsi): Likewise.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_lock_test_and_setsi): Likewise.
+	(arm_sync_lock_test_and_set<mode>): Likewise.
+	(arm_sync_new_<sync_optab>si): Likewise.
+	(arm_sync_new_nandsi): Likewise.
+	(arm_sync_new_<sync_optab><mode>): Likewise.
+	(arm_sync_new_nand<mode>): Likewise.
+	(arm_sync_old_<sync_optab>si): Likewise.
+	(arm_sync_old_nandsi): Likewise.
+	(arm_sync_old_<sync_optab><mode>): Likewise.
+	(arm_sync_old_nand<mode>): Likewise.
+
+	2010-09-13  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+
+	gcc/testsuite/
+	* gcc.target/arm/sync-1.c: New.
+
+ 
+ 	Backport from FSF:
+ 
+	gcc/
+	2010-08-18  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+	* config/arm/arm-protos.h (arm_expand_sync): New.
+	(arm_output_memory_barrier, arm_output_sync_insn): New.
+	(arm_sync_loop_insns): New.
+	* config/arm/arm.c (FL_ARCH7): New.
+	(FL_FOR_ARCH7): Include FL_ARCH7.
+	(arm_arch7): New.
+	(arm_print_operand): Support %C markup.
+	(arm_legitimize_sync_memory): New.
+	(arm_emit, arm_insn_count, arm_count, arm_output_asm_insn): New.
+	(arm_process_output_memory_barrier, arm_output_memory_barrier): New.
+	(arm_ldrex_suffix, arm_output_ldrex, arm_output_strex): New.
+	(arm_output_op2, arm_output_op3, arm_output_sync_loop): New.
+	(arm_get_sync_operand, FETCH_SYNC_OPERAND): New.
+	(arm_process_output_sync_insn, arm_output_sync_insn): New.
+	(arm_sync_loop_insns,arm_call_generator, arm_expand_sync): New.
+	* config/arm/arm.h (struct arm_sync_generator): New.
+	(TARGET_HAVE_DMB, TARGET_HAVE_DMB_MCR): New.
+	(TARGET_HAVE_MEMORY_BARRIER): New.
+	(TARGET_HAVE_LDREX, TARGET_HAVE_LDREXBHD): New.
+	* config/arm/arm.md: Include sync.md.
+	(UNSPEC_MEMORY_BARRIER): New.
+	(VUNSPEC_SYNC_COMPARE_AND_SWAP, VUNSPEC_SYNC_LOCK): New.
+	(VUNSPEC_SYNC_OP):New.
+	(VUNSPEC_SYNC_NEW_OP, VUNSPEC_SYNC_OLD_OP): New.
+	(sync_result, sync_memory, sync_required_value): New attributes.
+	(sync_new_value, sync_t1, sync_t2): Likewise.
+	(sync_release_barrier, sync_op): Likewise.
+	(length): Add logic to length attribute defintion to call
+	arm_sync_loop_insns when appropriate.
+	* config/arm/sync.md: New file.
+
+	gcc/
+	2010-09-02  Marcus Shawcroft  <marcus.shawcroft@arm.com>
+	* config/arm/predicates.md (arm_sync_memory_operand): New.
+	* config/arm/sync.md (arm_sync_compare_and_swapsi): Change predicate
+	to arm_sync_memory_operand and constraint to Q.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_compare_and_swap<mode>): Likewise.
+	(arm_sync_lock_test_and_setsi): Likewise.
+	(arm_sync_lock_test_and_set<mode>): Likewise.
+	(arm_sync_new_<sync_optab>si): Likewise.
+	(arm_sync_new_nandsi): Likewise.
+	(arm_sync_new_<sync_optab><mode>): Likewise.
+	(arm_sync_new_nand<mode>): Likewise.
+	(arm_sync_old_<sync_optab>si): Likewise.
+	(arm_sync_old_nandsi): Likewise.
+	(arm_sync_old_<sync_optab><mode>): Likewise.
+	(arm_sync_old_nand<mode>): Likewise.
+ 
+=== modified file 'gcc/config/arm/arm-protos.h'
+Index: gcc-4.5/gcc/config/arm/arm-protos.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm-protos.h
++++ gcc-4.5/gcc/config/arm/arm-protos.h
+@@ -151,6 +151,11 @@ extern const char *vfp_output_fstmd (rtx
+ extern void arm_set_return_address (rtx, rtx);
+ extern int arm_eliminable_register (rtx);
+ extern const char *arm_output_shift(rtx *, int);
++extern void arm_expand_sync (enum machine_mode, struct arm_sync_generator *,
++ 			     rtx, rtx, rtx, rtx);
++extern const char *arm_output_memory_barrier (rtx *);
++extern const char *arm_output_sync_insn (rtx, rtx *);
++extern unsigned int arm_sync_loop_insns (rtx , rtx *);
+ 
+ extern bool arm_output_addr_const_extra (FILE *, rtx);
+ 
+Index: gcc-4.5/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.c
++++ gcc-4.5/gcc/config/arm/arm.c
+@@ -602,6 +602,7 @@ static int thumb_call_reg_needed;
+ #define FL_NEON       (1 << 20)       /* Neon instructions.  */
+ #define FL_ARCH7EM    (1 << 21)	      /* Instructions present in the ARMv7E-M
+ 					 architecture.  */
++#define FL_ARCH7      (1 << 22)       /* Architecture 7.  */
+ 
+ #define FL_IWMMXT     (1 << 29)	      /* XScale v2 or "Intel Wireless MMX technology".  */
+ 
+@@ -626,7 +627,7 @@ static int thumb_call_reg_needed;
+ #define FL_FOR_ARCH6ZK	FL_FOR_ARCH6K
+ #define FL_FOR_ARCH6T2	(FL_FOR_ARCH6 | FL_THUMB2)
+ #define FL_FOR_ARCH6M	(FL_FOR_ARCH6 & ~FL_NOTM)
+-#define FL_FOR_ARCH7	(FL_FOR_ARCH6T2 &~ FL_NOTM)
++#define FL_FOR_ARCH7	((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
+ #define FL_FOR_ARCH7A	(FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
+ #define FL_FOR_ARCH7R	(FL_FOR_ARCH7A | FL_DIV)
+ #define FL_FOR_ARCH7M	(FL_FOR_ARCH7 | FL_DIV)
+@@ -664,6 +665,9 @@ int arm_arch6 = 0;
+ /* Nonzero if this chip supports the ARM 6K extensions.  */
+ int arm_arch6k = 0;
+ 
++/* Nonzero if this chip supports the ARM 7 extensions.  */
++int arm_arch7 = 0;
++
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ int arm_arch_notm = 0;
+ 
+@@ -1602,6 +1606,7 @@ arm_override_options (void)
+   arm_arch6 = (insn_flags & FL_ARCH6) != 0;
+   arm_arch6k = (insn_flags & FL_ARCH6K) != 0;
+   arm_arch_notm = (insn_flags & FL_NOTM) != 0;
++  arm_arch7 = (insn_flags & FL_ARCH7) != 0;
+   arm_arch7em = (insn_flags & FL_ARCH7EM) != 0;
+   arm_arch_thumb2 = (insn_flags & FL_THUMB2) != 0;
+   arm_arch_xscale = (insn_flags & FL_XSCALE) != 0;
+@@ -16562,6 +16567,17 @@ arm_print_operand (FILE *stream, rtx x,
+       }
+       return;
+ 
++    case 'C':
++      {
++	rtx addr;
++
++	gcc_assert (GET_CODE (x) == MEM);
++	addr = XEXP (x, 0);
++	gcc_assert (GET_CODE (addr) == REG);
++	asm_fprintf (stream, "[%r]", REGNO (addr));
++      }
++      return;
++
+     /* Translate an S register number into a D register number and element index.  */
+     case 'y':
+       {
+@@ -22793,4 +22809,372 @@ arm_builtin_support_vector_misalignment
+ 						      is_packed);
+ }
+ 
++/* Legitimize a memory reference for sync primitive implemented using
++   ldrex / strex.  We currently force the form of the reference to be
++   indirect without offset.  We do not yet support the indirect offset
++   addressing supported by some ARM targets for these
++   instructions.  */
++static rtx
++arm_legitimize_sync_memory (rtx memory)
++{
++  rtx addr = force_reg (Pmode, XEXP (memory, 0));
++  rtx legitimate_memory = gen_rtx_MEM (GET_MODE (memory), addr);
++
++  set_mem_alias_set (legitimate_memory, ALIAS_SET_MEMORY_BARRIER);
++  MEM_VOLATILE_P (legitimate_memory) = MEM_VOLATILE_P (memory);
++  return legitimate_memory;
++}
++
++/* An instruction emitter. */
++typedef void (* emit_f) (int label, const char *, rtx *);
++
++/* An instruction emitter that emits via the conventional
++   output_asm_insn.  */
++static void
++arm_emit (int label ATTRIBUTE_UNUSED, const char *pattern, rtx *operands)
++{
++  output_asm_insn (pattern, operands);
++}
++
++/* Count the number of emitted synchronization instructions.  */
++static unsigned arm_insn_count;
++
++/* An emitter that counts emitted instructions but does not actually
++   emit instruction into the the instruction stream.  */
++static void
++arm_count (int label,
++	   const char *pattern ATTRIBUTE_UNUSED,
++	   rtx *operands ATTRIBUTE_UNUSED)
++{
++  if (! label)
++    ++ arm_insn_count;
++}
++
++/* Construct a pattern using conventional output formatting and feed
++   it to output_asm_insn.  Provides a mechanism to construct the
++   output pattern on the fly.  Note the hard limit on the pattern
++   buffer size.  */
++static void
++arm_output_asm_insn (emit_f emit, int label, rtx *operands,
++		     const char *pattern, ...)
++{
++  va_list ap;
++  char buffer[256];
++
++  va_start (ap, pattern);
++  vsprintf (buffer, pattern, ap);
++  va_end (ap);
++  emit (label, buffer, operands);
++}
++
++/* Emit the memory barrier instruction, if any, provided by this
++   target to a specified emitter.  */
++static void
++arm_process_output_memory_barrier (emit_f emit, rtx *operands)
++{
++  if (TARGET_HAVE_DMB)
++    {
++      /* Note we issue a system level barrier. We should consider
++         issuing a inner shareabilty zone barrier here instead, ie.
++         "DMB ISH".  */
++      emit (0, "dmb\tsy", operands);
++      return;
++    }
++
++  if (TARGET_HAVE_DMB_MCR)
++    {
++      emit (0, "mcr\tp15, 0, r0, c7, c10, 5", operands);
++      return;
++    }
++
++  gcc_unreachable ();
++}
++
++/* Emit the memory barrier instruction, if any, provided by this
++   target.  */
++const char *
++arm_output_memory_barrier (rtx *operands)
++{
++  arm_process_output_memory_barrier (arm_emit, operands);
++  return "";
++}
++
++/* Helper to figure out the instruction suffix required on ldrex/strex
++   for operations on an object of the specified mode.  */
++static const char *
++arm_ldrex_suffix (enum machine_mode mode)
++{
++  switch (mode)
++    {
++    case QImode: return "b";
++    case HImode: return "h";
++    case SImode: return "";
++    case DImode: return "d";
++    default:
++      gcc_unreachable ();
++    }
++  return "";
++}
++
++/* Emit an ldrex{b,h,d, } instruction appropriate for the specified
++   mode.  */
++static void
++arm_output_ldrex (emit_f emit,
++		  enum machine_mode mode,
++		  rtx target,
++		  rtx memory)
++{
++  const char *suffix = arm_ldrex_suffix (mode);
++  rtx operands[2];
++
++  operands[0] = target;
++  operands[1] = memory;
++  arm_output_asm_insn (emit, 0, operands, "ldrex%s\t%%0, %%C1", suffix);
++}
++
++/* Emit a strex{b,h,d, } instruction appropriate for the specified
++   mode.  */
++static void
++arm_output_strex (emit_f emit,
++		  enum machine_mode mode,
++		  const char *cc,
++		  rtx result,
++		  rtx value,
++		  rtx memory)
++{
++  const char *suffix = arm_ldrex_suffix (mode);
++  rtx operands[3];
++
++  operands[0] = result;
++  operands[1] = value;
++  operands[2] = memory;
++  arm_output_asm_insn (emit, 0, operands, "strex%s%s\t%%0, %%1, %%C2", suffix,
++		       cc);
++}
++
++/* Helper to emit a two operand instruction.  */
++static void
++arm_output_op2 (emit_f emit, const char *mnemonic, rtx d, rtx s)
++{
++  rtx operands[2];
++
++  operands[0] = d;
++  operands[1] = s;
++  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1", mnemonic);
++}
++
++/* Helper to emit a three operand instruction.  */
++static void
++arm_output_op3 (emit_f emit, const char *mnemonic, rtx d, rtx a, rtx b)
++{
++  rtx operands[3];
++
++  operands[0] = d;
++  operands[1] = a;
++  operands[2] = b;
++  arm_output_asm_insn (emit, 0, operands, "%s\t%%0, %%1, %%2", mnemonic);
++}
++
++/* Emit a load store exclusive synchronization loop.
++
++   do
++     old_value = [mem]
++     if old_value != required_value
++       break;
++     t1 = sync_op (old_value, new_value)
++     [mem] = t1, t2 = [0|1]
++   while ! t2
++
++   Note:
++     t1 == t2 is not permitted
++     t1 == old_value is permitted
++
++   required_value:
++
++   RTX register or const_int representing the required old_value for
++   the modify to continue, if NULL no comparsion is performed.  */
++static void
++arm_output_sync_loop (emit_f emit,
++		      enum machine_mode mode,
++		      rtx old_value,
++		      rtx memory,
++		      rtx required_value,
++		      rtx new_value,
++		      rtx t1,
++		      rtx t2,
++		      enum attr_sync_op sync_op,
++		      int early_barrier_required)
++{
++  rtx operands[1];
++
++  gcc_assert (t1 != t2);
++
++  if (early_barrier_required)
++    arm_process_output_memory_barrier (emit, NULL);
++
++  arm_output_asm_insn (emit, 1, operands, "%sLSYT%%=:", LOCAL_LABEL_PREFIX);
++
++  arm_output_ldrex (emit, mode, old_value, memory);
++
++  if (required_value)
++    {
++      rtx operands[2];
++
++      operands[0] = old_value;
++      operands[1] = required_value;
++      arm_output_asm_insn (emit, 0, operands, "cmp\t%%0, %%1");
++      arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYB%%=", LOCAL_LABEL_PREFIX);
++    }
++
++  switch (sync_op)
++    {
++    case SYNC_OP_ADD:
++      arm_output_op3 (emit, "add", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_SUB:
++      arm_output_op3 (emit, "sub", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_IOR:
++      arm_output_op3 (emit, "orr", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_XOR:
++      arm_output_op3 (emit, "eor", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_AND:
++      arm_output_op3 (emit,"and", t1, old_value, new_value);
++      break;
++
++    case SYNC_OP_NAND:
++      arm_output_op3 (emit, "and", t1, old_value, new_value);
++      arm_output_op2 (emit, "mvn", t1, t1);
++      break;
++
++    case SYNC_OP_NONE:
++      t1 = new_value;
++      break;
++    }
++
++  arm_output_strex (emit, mode, "", t2, t1, memory);
++  operands[0] = t2;
++  arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
++  arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
++
++  arm_process_output_memory_barrier (emit, NULL);
++  arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
++}
++
++static rtx
++arm_get_sync_operand (rtx *operands, int index, rtx default_value)
++{
++  if (index > 0)
++    default_value = operands[index - 1];
++
++  return default_value;
++}
++
++#define FETCH_SYNC_OPERAND(NAME, DEFAULT) \
++  arm_get_sync_operand (operands, (int) get_attr_sync_##NAME (insn), DEFAULT);
++
++/* Extract the operands for a synchroniztion instruction from the
++   instructions attributes and emit the instruction.  */
++static void
++arm_process_output_sync_insn (emit_f emit, rtx insn, rtx *operands)
++{
++  rtx result, memory, required_value, new_value, t1, t2;
++  int early_barrier;
++  enum machine_mode mode;
++  enum attr_sync_op sync_op;
++
++  result = FETCH_SYNC_OPERAND(result, 0);
++  memory = FETCH_SYNC_OPERAND(memory, 0);
++  required_value = FETCH_SYNC_OPERAND(required_value, 0);
++  new_value = FETCH_SYNC_OPERAND(new_value, 0);
++  t1 = FETCH_SYNC_OPERAND(t1, 0);
++  t2 = FETCH_SYNC_OPERAND(t2, 0);
++  early_barrier =
++    get_attr_sync_release_barrier (insn) == SYNC_RELEASE_BARRIER_YES;
++  sync_op = get_attr_sync_op (insn);
++  mode = GET_MODE (memory);
++
++  arm_output_sync_loop (emit, mode, result, memory, required_value,
++			new_value, t1, t2, sync_op, early_barrier);
++}
++
++/* Emit a synchronization instruction loop.  */
++const char *
++arm_output_sync_insn (rtx insn, rtx *operands)
++{
++  arm_process_output_sync_insn (arm_emit, insn, operands);
++  return "";
++}
++
++/* Count the number of machine instruction that will be emitted for a
++   synchronization instruction.  Note that the emitter used does not
++   emit instructions, it just counts instructions being carefull not
++   to count labels.  */
++unsigned int
++arm_sync_loop_insns (rtx insn, rtx *operands)
++{
++  arm_insn_count = 0;
++  arm_process_output_sync_insn (arm_count, insn, operands);
++  return arm_insn_count;
++}
++
++/* Helper to call a target sync instruction generator, dealing with
++   the variation in operands required by the different generators.  */
++static rtx
++arm_call_generator (struct arm_sync_generator *generator, rtx old_value,
++  		    rtx memory, rtx required_value, rtx new_value)
++{
++  switch (generator->op)
++    {
++    case arm_sync_generator_omn:
++      gcc_assert (! required_value);
++      return generator->u.omn (old_value, memory, new_value);
++
++    case arm_sync_generator_omrn:
++      gcc_assert (required_value);
++      return generator->u.omrn (old_value, memory, required_value, new_value);
++    }
++
++  return NULL;
++}
++
++/* Expand a synchronization loop. The synchronization loop is expanded
++   as an opaque block of instructions in order to ensure that we do
++   not subsequently get extraneous memory accesses inserted within the
++   critical region. The exclusive access property of ldrex/strex is
++   only guaranteed in there are no intervening memory accesses. */
++void
++arm_expand_sync (enum machine_mode mode,
++		 struct arm_sync_generator *generator,
++		 rtx target, rtx memory, rtx required_value, rtx new_value)
++{
++  if (target == NULL)
++    target = gen_reg_rtx (mode);
++
++  memory = arm_legitimize_sync_memory (memory);
++  if (mode != SImode)
++    {
++      rtx load_temp = gen_reg_rtx (SImode);
++
++      if (required_value)
++	required_value = convert_modes (SImode, mode, required_value, true);
++
++      new_value = convert_modes (SImode, mode, new_value, true);
++      emit_insn (arm_call_generator (generator, load_temp, memory,
++				     required_value, new_value));
++      emit_move_insn (target, gen_lowpart (mode, load_temp));
++    }
++  else
++    {
++      emit_insn (arm_call_generator (generator, target, memory, required_value,
++				     new_value));
++    }
++}
++
+ #include "gt-arm.h"
+Index: gcc-4.5/gcc/config/arm/arm.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.h
++++ gcc-4.5/gcc/config/arm/arm.h
+@@ -128,6 +128,24 @@ enum target_cpus
+ /* The processor for which instructions should be scheduled.  */
+ extern enum processor_type arm_tune;
+ 
++enum arm_sync_generator_tag
++  {
++    arm_sync_generator_omn,
++    arm_sync_generator_omrn
++  };
++
++/* Wrapper to pass around a polymorphic pointer to a sync instruction
++   generator and.  */
++struct arm_sync_generator
++{
++  enum arm_sync_generator_tag op;
++  union
++  {
++    rtx (* omn) (rtx, rtx, rtx);
++    rtx (* omrn) (rtx, rtx, rtx, rtx);
++  } u;
++};
++
+ typedef enum arm_cond_code
+ {
+   ARM_EQ = 0, ARM_NE, ARM_CS, ARM_CC, ARM_MI, ARM_PL, ARM_VS, ARM_VC,
+@@ -272,6 +290,20 @@ extern void (*arm_lang_output_object_att
+    for Thumb-2.  */
+ #define TARGET_UNIFIED_ASM TARGET_THUMB2
+ 
++/* Nonzero if this chip provides the DMB instruction.  */
++#define TARGET_HAVE_DMB		(arm_arch7)
++
++/* Nonzero if this chip implements a memory barrier via CP15.  */
++#define TARGET_HAVE_DMB_MCR	(arm_arch6k && ! TARGET_HAVE_DMB)
++
++/* Nonzero if this chip implements a memory barrier instruction.  */
++#define TARGET_HAVE_MEMORY_BARRIER (TARGET_HAVE_DMB || TARGET_HAVE_DMB_MCR)
++
++/* Nonzero if this chip supports ldrex and strex */
++#define TARGET_HAVE_LDREX	((arm_arch6 && TARGET_ARM) || arm_arch7)
++
++/* Nonzero if this chip supports ldrex{bhd} and strex{bhd}.  */
++#define TARGET_HAVE_LDREXBHD	((arm_arch6k && TARGET_ARM) || arm_arch7)
+ 
+ /* True iff the full BPABI is being used.  If TARGET_BPABI is true,
+    then TARGET_AAPCS_BASED must be true -- but the converse does not
+@@ -405,6 +437,12 @@ extern int arm_arch5e;
+ /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
+ extern int arm_arch6;
+ 
++/* Nonzero if this chip supports the ARM Architecture 6k extensions.  */
++extern int arm_arch6k;
++
++/* Nonzero if this chip supports the ARM Architecture 7 extensions.  */
++extern int arm_arch7;
++
+ /* Nonzero if instructions not present in the 'M' profile can be used.  */
+ extern int arm_arch_notm;
+ 
+Index: gcc-4.5/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/arm.md
++++ gcc-4.5/gcc/config/arm/arm.md
+@@ -103,6 +103,7 @@
+    (UNSPEC_RBIT 26)       ; rbit operation.
+    (UNSPEC_SYMBOL_OFFSET 27) ; The offset of the start of the symbol from
+                              ; another symbolic address.
++   (UNSPEC_MEMORY_BARRIER 28) ; Represent a memory barrier.
+   ]
+ )
+ 
+@@ -139,6 +140,11 @@
+    (VUNSPEC_ALIGN32  16) ; Used to force 32-byte alignment.
+    (VUNSPEC_EH_RETURN 20); Use to override the return address for exception
+ 			 ; handling.
++   (VUNSPEC_SYNC_COMPARE_AND_SWAP 21)	; Represent an atomic compare swap.
++   (VUNSPEC_SYNC_LOCK             22)	; Represent a sync_lock_test_and_set.
++   (VUNSPEC_SYNC_OP               23)	; Represent a sync_<op>
++   (VUNSPEC_SYNC_NEW_OP           24)	; Represent a sync_new_<op>
++   (VUNSPEC_SYNC_OLD_OP           25)	; Represent a sync_old_<op>
+   ]
+ )
+ 
+@@ -163,8 +169,21 @@
+ (define_attr "fpu" "none,fpa,fpe2,fpe3,maverick,vfp"
+   (const (symbol_ref "arm_fpu_attr")))
+ 
++(define_attr "sync_result"          "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_memory"          "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_required_value"  "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_new_value"       "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_t1"              "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_t2"              "none,0,1,2,3,4,5" (const_string "none"))
++(define_attr "sync_release_barrier" "yes,no"           (const_string "yes"))
++(define_attr "sync_op"              "none,add,sub,ior,xor,and,nand"
++                                    (const_string "none"))
++
+ ; LENGTH of an instruction (in bytes)
+-(define_attr "length" "" (const_int 4))
++(define_attr "length" ""
++  (cond [(not (eq_attr "sync_memory" "none"))
++ 	   (symbol_ref "arm_sync_loop_insns (insn, operands) * 4")
++	] (const_int 4)))
+ 
+ ; POOL_RANGE is how far away from a constant pool entry that this insn
+ ; can be placed.  If the distance is zero, then this insn will never
+@@ -11549,4 +11568,5 @@
+ (include "thumb2.md")
+ ;; Neon patterns
+ (include "neon.md")
+-
++;; Synchronization Primitives
++(include "sync.md")
+Index: gcc-4.5/gcc/config/arm/predicates.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/predicates.md
++++ gcc-4.5/gcc/config/arm/predicates.md
+@@ -573,6 +573,11 @@
+ 		(and (match_test "TARGET_32BIT")
+ 		     (match_operand 0 "arm_di_operand"))))
+ 
++;; True if the operand is memory reference suitable for a ldrex/strex.
++(define_predicate "arm_sync_memory_operand"
++  (and (match_operand 0 "memory_operand")
++       (match_code "reg" "0")))
++
+ ;; Predicates for parallel expanders based on mode.
+ (define_special_predicate "vect_par_constant_high" 
+   (match_code "parallel")
+Index: gcc-4.5/gcc/testsuite/gcc.target/arm/synchronize.c
+===================================================================
+--- gcc-4.5.orig/gcc/testsuite/gcc.target/arm/synchronize.c
++++ gcc-4.5/gcc/testsuite/gcc.target/arm/synchronize.c
+@@ -1,4 +1,4 @@
+-/* { dg-final { scan-assembler "__sync_synchronize" { target arm*-*-linux-*eabi } } } */
++/* { dg-final { scan-assembler "__sync_synchronize|dmb|mcr" { target arm*-*-linux-*eabi } } } */
+ 
+ void *foo (void)
+ {
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99420.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99420.patch
new file mode 100644
index 0000000000..4e63a81890
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99420.patch
@@ -0,0 +1,38 @@
+2010-10-18  Kazu Hirata  <kazu@codesourcery.com>
+
+	Issue #9720
+	Backport from mainline:
+	gcc/
+	2010-10-07  Tejas Belagod  <tejas.belagod@arm.com>
+	* config/arm/neon.md (neon_unpack<US>_<mode>): Add 'w' to
+	constraint, add register specifier in instruction template.
+	(neon_vec_pack_trunc_<mode>): Likewise.
+	(neon_vec_<US>mult_<mode>): Add register specifier to
+	instruction template.
+
+=== modified file 'gcc/config/arm/neon.md'
+Index: gcc-4.5/gcc/config/arm/neon.md
+===================================================================
+--- gcc-4.5.orig/gcc/config/arm/neon.md
++++ gcc-4.5/gcc/config/arm/neon.md
+@@ -5682,9 +5682,9 @@
+ ;; Vectorize for non-neon-quad case
+ (define_insn "neon_unpack<US>_<mode>"
+  [(set (match_operand:<V_widen> 0 "register_operand" "=w")
+-       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "")))]
++       (SE:<V_widen> (match_operand:VDI 1 "register_operand" "w")))]
+  "TARGET_NEON"
+- "vmovl.<US><V_sz_elem> %q0, %1"
++ "vmovl.<US><V_sz_elem> %q0, %P1"
+   [(set_attr "neon_type" "neon_shift_1")]
+ )
+ 
+@@ -5721,7 +5721,7 @@
+  		       (SE:<V_widen> 
+ 			   (match_operand:VDI 2 "register_operand" "w"))))]
+   "TARGET_NEON"
+-  "vmull.<US><V_sz_elem> %q0, %1, %2"
++  "vmull.<US><V_sz_elem> %q0, %P1, %P2"
+   [(set_attr "neon_type" "neon_shift_1")]
+ )
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99421.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99421.patch
new file mode 100644
index 0000000000..3a45ee5026
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99421.patch
@@ -0,0 +1,94 @@
+2010-10-20  Nathan Froyd  <froydnj@codesourcery.com>
+
+	Issue #9781
+
+	Backport from mainline:
+
+	gcc/
+	2010-10-20  Nathan Froyd  <froydnj@codesourcery.com>
+
+	* ifcvt.c (noce_emit_cmove): If both of the values are SUBREGs, try
+	emitting the conditional move in the inner mode of the SUBREG.
+
+
+=== modified file 'gcc/ifcvt.c'
+--- old/gcc/ifcvt.c	2010-10-15 10:01:07 +0000
++++ new/gcc/ifcvt.c	2010-11-04 12:11:15 +0000
+@@ -1338,6 +1338,9 @@
+ noce_emit_cmove (struct noce_if_info *if_info, rtx x, enum rtx_code code,
+ 		 rtx cmp_a, rtx cmp_b, rtx vfalse, rtx vtrue)
+ {
++  rtx target;
++  int unsignedp;
++
+   /* If earliest == jump, try to build the cmove insn directly.
+      This is helpful when combine has created some complex condition
+      (like for alpha's cmovlbs) that we can't hope to regenerate
+@@ -1372,10 +1375,62 @@
+     return NULL_RTX;
+ 
+ #if HAVE_conditional_move
+-  return emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode,
+-				vtrue, vfalse, GET_MODE (x),
+-			        (code == LTU || code == GEU
+-				 || code == LEU || code == GTU));
++  unsignedp = (code == LTU || code == GEU
++	       || code == LEU || code == GTU);
++
++  target = emit_conditional_move (x, code, cmp_a, cmp_b, VOIDmode,
++				  vtrue, vfalse, GET_MODE (x),
++				  unsignedp);
++  if (target)
++    return target;
++
++  /* We might be faced with a situation like:
++
++     x = (reg:M TARGET)
++     vtrue = (subreg:M (reg:N VTRUE) BYTE)
++     vfalse = (subreg:M (reg:N VFALSE) BYTE)
++
++     We can't do a conditional move in mode M, but it's possible that we
++     could do a conditional move in mode N instead and take a subreg of
++     the result.
++
++     If we can't create new pseudos, though, don't bother.  */
++  if (reload_completed)
++    return NULL_RTX;
++
++  if (GET_CODE (vtrue) == SUBREG && GET_CODE (vfalse) == SUBREG)
++    {
++      rtx reg_vtrue = SUBREG_REG (vtrue);
++      rtx reg_vfalse = SUBREG_REG (vfalse);
++      unsigned int byte_vtrue = SUBREG_BYTE (vtrue);
++      unsigned int byte_vfalse = SUBREG_BYTE (vfalse);
++      rtx promoted_target;
++
++      if (GET_MODE (reg_vtrue) != GET_MODE (reg_vfalse)
++	  || byte_vtrue != byte_vfalse
++	  || (SUBREG_PROMOTED_VAR_P (vtrue)
++	      != SUBREG_PROMOTED_VAR_P (vfalse))
++	  || (SUBREG_PROMOTED_UNSIGNED_P (vtrue)
++	      != SUBREG_PROMOTED_UNSIGNED_P (vfalse)))
++	return NULL_RTX;
++
++      promoted_target = gen_reg_rtx (GET_MODE (reg_vtrue));
++
++      target = emit_conditional_move (promoted_target, code, cmp_a, cmp_b,
++				      VOIDmode, reg_vtrue, reg_vfalse,
++				      GET_MODE (reg_vtrue), unsignedp);
++      /* Nope, couldn't do it in that mode either.  */
++      if (!target)
++	return NULL_RTX;
++
++      target = gen_rtx_SUBREG (GET_MODE (vtrue), promoted_target, byte_vtrue);
++      SUBREG_PROMOTED_VAR_P (target) = SUBREG_PROMOTED_VAR_P (vtrue);
++      SUBREG_PROMOTED_UNSIGNED_SET (target, SUBREG_PROMOTED_UNSIGNED_P (vtrue));
++      emit_move_insn (x, target);
++      return x;
++    }
++  else
++    return NULL_RTX;
+ #else
+   /* We'll never get here, as noce_process_if_block doesn't call the
+      functions involved.  Ifdef code, however, should be discouraged
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99423.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99423.patch
new file mode 100644
index 0000000000..80dbe3f71a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99423.patch
@@ -0,0 +1,114 @@
+2010-10-25  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #9812
+
+	Backport from mainline:
+
+	gcc/
+	2010-10-25  Jie Zhang  <jie@codesourcery.com>
+	* combine.c (try_combine): If insns need to be kept around,
+	check that they can be copied in the merged instruction.
+
+	gcc/testsuite/
+	2010-10-25  Jie Zhang  <jie@codesourcery.com>
+	* g++.dg/opt/combine.c: New test.
+
+=== modified file 'gcc/combine.c'
+--- old/gcc/combine.c	2010-09-20 22:37:32 +0000
++++ new/gcc/combine.c	2010-11-04 12:39:28 +0000
+@@ -2809,6 +2809,17 @@
+     = i1 && ! (i1_feeds_i3 ? dead_or_set_p (i3, i1dest)
+ 	       : (dead_or_set_p (i3, i1dest) || dead_or_set_p (i2, i1dest)));
+ 
++  /* We are about to copy insns for the case where they need to be kept
++     around.  Check that they can be copied in the merged instruction.  */
++
++  if (targetm.cannot_copy_insn_p
++      && ((added_sets_2 && targetm.cannot_copy_insn_p (i2))
++	  || (i1 && added_sets_1 && targetm.cannot_copy_insn_p (i1))))
++    {
++      undo_all ();
++      return 0;
++    }
++
+   /* If the set in I2 needs to be kept around, we must make a copy of
+      PATTERN (I2), so that when we substitute I1SRC for I1DEST in
+      PATTERN (I2), we are only substituting for the original I1DEST, not into
+
+=== added file 'gcc/testsuite/g++.dg/opt/combine.C'
+--- old/gcc/testsuite/g++.dg/opt/combine.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/opt/combine.C	2010-11-04 12:39:28 +0000
+@@ -0,0 +1,72 @@
++// { dg-do assemble { target fpic } }
++// { dg-options "-O2 -fweb -fPIC -fvisibility=hidden" }
++
++class QBasicAtomicInt
++{
++public:
++  volatile int _q_value;
++  inline operator int () const {return _q_value;}
++};
++class QVariant;
++class QScriptContext;
++class QScriptEngine;
++class QScriptValue
++{
++public:
++  QVariant toVariant () const;
++};
++class QScriptDebuggerBackendPrivate
++{
++  static QScriptValue trace (QScriptContext *context);
++};
++template <typename T> struct QMetaTypeId { };
++template <typename T> struct QMetaTypeId2
++{
++  static inline int qt_metatype_id ()
++  {
++    return QMetaTypeId<T>::qt_metatype_id () ;
++  }
++};
++template <typename T> inline int qMetaTypeId (T * = 0)
++{
++  return QMetaTypeId2<T>::qt_metatype_id () ;
++}
++class QVariant { };
++template<typename T> inline T qvariant_cast (const QVariant &v)
++{
++  const int vid = qMetaTypeId<T> ((0)) ;
++};
++class QScriptContext
++{
++public: 
++  QScriptValue callee () const;
++};
++class QScriptEngine  
++{
++public:
++  static bool convertV2 (const QScriptValue &value , int type , void *ptr) ;
++};
++inline bool qscriptvalue_cast_helper (const QScriptValue &value , int type , void *ptr)
++{
++  return QScriptEngine::convertV2 (value, type, ptr) ;
++}
++template<typename T> T qscriptvalue_cast (const QScriptValue &value)
++{
++  T t;
++  const int id = qMetaTypeId<T> () ;
++  if ( qscriptvalue_cast_helper (value, id, &t))
++    return qvariant_cast<T> (value.toVariant ()) ;
++}
++template <> struct QMetaTypeId< QScriptDebuggerBackendPrivate* >
++{
++  static int qt_metatype_id ()
++  {
++    static QBasicAtomicInt metatype_id = { (0) };
++    return metatype_id;
++  }
++};
++QScriptValue QScriptDebuggerBackendPrivate::trace (QScriptContext *context)
++{
++  QScriptValue data = context->callee () ;
++  QScriptDebuggerBackendPrivate *self = qscriptvalue_cast<QScriptDebuggerBackendPrivate*> (data) ;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99424.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99424.patch
new file mode 100644
index 0000000000..b6c6532661
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99424.patch
@@ -0,0 +1,687 @@
+	Issue #1259
+
+	Backport from mainline:
+
+	gcc/
+	2010-10-22  Jie Zhang  <jie@codesourcery.com>
+
+	* expr.c (emit_group_load_1): Update calls to extract_bit_field.
+	(copy_blkmode_from_reg): Likewise.
+	(read_complex_part): Likewise.
+	(expand_expr_real_1): Calculate packedp and pass it to
+	extract_bit_field.
+	* expr.h (extract_bit_field): Update declaration.
+	* calls.c (store_unaligned_arguments_into_pseudos): Update call
+	to extract_bit_field.
+	* expmed.c (extract_fixed_bit_field): Update calls to
+	extract_fixed_bit_field.
+	(store_split_bit_field): Likewise.
+	(extract_bit_field_1): Add new argument packedp.
+	(extract_bit_field): Add new argument packedp.
+	(extract_fixed_bit_field): Add new argument packedp and let
+	packed attribute override volatile.
+	* stmt.c (expand_return): Update call to extract_bit_field.
+
+	2010-10-15  Jie Zhang  <jie@codesourcery.com>
+
+	* doc/invoke.texi: Add -fstrict-volatile-bitfields to
+	Option Summary and Index.
+
+	2010-07-13  DJ Delorie  <dj@redhat.com>
+
+	* config/h8300/h8300.c (h8300_init_once): Default to
+	-fstrict_volatile_bitfields.
+
+	* config/sh/sh.c (sh_override_options): Default to
+	-fstrict_volatile_bitfields.
+
+	* config/rx/rx.c (rx_option_override): New.
+
+	* config/m32c/m32c.c (m32c_override_options): Default to
+	-fstrict_volatile_bitfields.
+
+	2010-06-16  DJ Delorie  <dj@redhat.com>
+
+	* common.opt (-fstrict-volatile-bitfields): new.
+	* doc/invoke.texi: Document it.
+	* fold-const.c (optimize_bit_field_compare): For volatile
+	bitfields, use the field's type to determine the mode, not the
+	field's size.
+	* expr.c (expand_assignment): Likewise.
+	(get_inner_reference): Likewise.
+	(expand_expr_real_1): Likewise.
+	* expmed.c (store_fixed_bit_field): Likewise.
+	(extract_bit_field_1): Likewise.
+	(extract_fixed_bit_field): Likewise.
+
+	gcc/testsuite/
+	2010-08-19  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR testsuite/45324
+	* gcc.target/i386/volatile-bitfields-1.c: Also scan movb.
+
+	2010-06-16  DJ Delorie  <dj@redhat.com>
+
+	* gcc.target/i386/volatile-bitfields-1.c: New.
+	* gcc.target/i386/volatile-bitfields-2.c: New.
+
+=== modified file 'gcc/calls.c'
+--- old/gcc/calls.c	2010-10-04 00:50:43 +0000
++++ new/gcc/calls.c	2010-11-04 12:43:52 +0000
+@@ -878,7 +878,7 @@
+ 	    int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
+ 
+ 	    args[i].aligned_regs[j] = reg;
+-	    word = extract_bit_field (word, bitsize, 0, 1, NULL_RTX,
++	    word = extract_bit_field (word, bitsize, 0, 1, false, NULL_RTX,
+ 				      word_mode, word_mode);
+ 
+ 	    /* There is no need to restrict this code to loading items
+
+=== modified file 'gcc/common.opt'
+--- old/gcc/common.opt	2010-07-29 14:59:35 +0000
++++ new/gcc/common.opt	2010-11-04 12:43:52 +0000
+@@ -613,6 +613,10 @@
+ Common Report Var(flag_loop_block) Optimization
+ Enable Loop Blocking transformation
+ 
++fstrict-volatile-bitfields
++Common Report Var(flag_strict_volatile_bitfields) Init(-1)
++Force bitfield accesses to match their type width
++
+ fguess-branch-probability
+ Common Report Var(flag_guess_branch_prob) Optimization
+ Enable guessing of branch probabilities
+
+=== modified file 'gcc/config/h8300/h8300.c'
+--- old/gcc/config/h8300/h8300.c	2010-04-02 18:54:46 +0000
++++ new/gcc/config/h8300/h8300.c	2010-11-04 12:43:52 +0000
+@@ -403,6 +403,10 @@
+ 	 restore er6 though, so bump up the cost.  */
+       h8300_move_ratio = 6;
+     }
++
++  /* This target defaults to strict volatile bitfields.  */
++  if (flag_strict_volatile_bitfields < 0)
++    flag_strict_volatile_bitfields = 1;
+ }
+ 
+ /* Implement REG_CLASS_FROM_LETTER.
+
+=== modified file 'gcc/config/m32c/m32c.c'
+--- old/gcc/config/m32c/m32c.c	2009-10-22 18:46:26 +0000
++++ new/gcc/config/m32c/m32c.c	2010-11-04 12:43:52 +0000
+@@ -428,6 +428,10 @@
+ 
+   if (TARGET_A24)
+     flag_ivopts = 0;
++
++  /* This target defaults to strict volatile bitfields.  */
++  if (flag_strict_volatile_bitfields < 0)
++    flag_strict_volatile_bitfields = 1;
+ }
+ 
+ /* Defining data structures for per-function information */
+
+=== modified file 'gcc/config/rx/rx.c'
+--- old/gcc/config/rx/rx.c	2010-07-27 14:39:53 +0000
++++ new/gcc/config/rx/rx.c	2010-11-04 12:43:52 +0000
+@@ -2187,6 +2187,14 @@
+     }
+ }
+ 
++static void
++rx_option_override (void)
++{
++  /* This target defaults to strict volatile bitfields.  */
++  if (flag_strict_volatile_bitfields < 0)
++    flag_strict_volatile_bitfields = 1;
++}
++
+ 
+ static bool
+ rx_allocate_stack_slots_for_args (void)
+@@ -2759,6 +2767,9 @@
+ #undef  TARGET_CC_MODES_COMPATIBLE
+ #define TARGET_CC_MODES_COMPATIBLE		rx_cc_modes_compatible
+ 
++#undef  TARGET_OPTION_OVERRIDE
++#define TARGET_OPTION_OVERRIDE			rx_option_override
++
+ struct gcc_target targetm = TARGET_INITIALIZER;
+ 
+ /* #include "gt-rx.h" */
+
+=== modified file 'gcc/config/sh/sh.c'
+--- old/gcc/config/sh/sh.c	2010-05-05 21:12:17 +0000
++++ new/gcc/config/sh/sh.c	2010-11-04 12:43:52 +0000
+@@ -950,6 +950,10 @@
+ 
+   if (sh_fixed_range_str)
+     sh_fix_range (sh_fixed_range_str);
++
++  /* This target defaults to strict volatile bitfields.  */
++  if (flag_strict_volatile_bitfields < 0)
++    flag_strict_volatile_bitfields = 1;
+ }
+ 
+ /* Print the operand address in x to the stream.  */
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-10-04 00:50:43 +0000
++++ new/gcc/doc/invoke.texi	2010-11-04 12:43:52 +0000
+@@ -922,7 +922,7 @@
+ -fargument-noalias-global  -fargument-noalias-anything @gol
+ -fleading-underscore  -ftls-model=@var{model} @gol
+ -ftrapv  -fwrapv  -fbounds-check @gol
+--fvisibility}
++-fvisibility -fstrict-volatile-bitfields}
+ @end table
+ 
+ @menu
+@@ -17629,6 +17629,33 @@
+ An overview of these techniques, their benefits and how to use them
+ is at @w{@uref{http://gcc.gnu.org/wiki/Visibility}}.
+ 
++@item -fstrict-volatile-bitfields
++@opindex fstrict-volatile-bitfields
++This option should be used if accesses to volatile bitfields (or other
++structure fields, although the compiler usually honors those types
++anyway) should use a single access in a mode of the same size as the
++container's type, aligned to a natural alignment if possible.  For
++example, targets with memory-mapped peripheral registers might require
++all such accesses to be 16 bits wide; with this flag the user could
++declare all peripheral bitfields as ``unsigned short'' (assuming short
++is 16 bits on these targets) to force GCC to use 16 bit accesses
++instead of, perhaps, a more efficient 32 bit access.
++
++If this option is disabled, the compiler will use the most efficient
++instruction.  In the previous example, that might be a 32-bit load
++instruction, even though that will access bytes that do not contain
++any portion of the bitfield, or memory-mapped registers unrelated to
++the one being updated.
++
++If the target requires strict alignment, and honoring the container
++type would require violating this alignment, a warning is issued.
++However, the access happens as the user requested, under the
++assumption that the user knows something about the target hardware
++that GCC is unaware of.
++
++The default value of this option is determined by the application binary
++interface for the target processor.
++
+ @end table
+ 
+ @c man end
+
+=== modified file 'gcc/expmed.c'
+--- old/gcc/expmed.c	2010-10-04 00:50:43 +0000
++++ new/gcc/expmed.c	2010-11-04 12:43:52 +0000
+@@ -47,7 +47,7 @@
+ static rtx extract_fixed_bit_field (enum machine_mode, rtx,
+ 				    unsigned HOST_WIDE_INT,
+ 				    unsigned HOST_WIDE_INT,
+-				    unsigned HOST_WIDE_INT, rtx, int);
++				    unsigned HOST_WIDE_INT, rtx, int, bool);
+ static rtx mask_rtx (enum machine_mode, int, int, int);
+ static rtx lshift_value (enum machine_mode, rtx, int, int);
+ static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
+@@ -904,8 +904,14 @@
+       if (GET_MODE_BITSIZE (mode) == 0
+ 	  || GET_MODE_BITSIZE (mode) > GET_MODE_BITSIZE (word_mode))
+ 	mode = word_mode;
+-      mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
+-			    MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));
++
++      if (MEM_VOLATILE_P (op0)
++          && GET_MODE_BITSIZE (GET_MODE (op0)) > 0
++	  && flag_strict_volatile_bitfields > 0)
++	mode = GET_MODE (op0);
++      else
++	mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
++			      MEM_ALIGN (op0), mode, MEM_VOLATILE_P (op0));
+ 
+       if (mode == VOIDmode)
+ 	{
+@@ -1099,7 +1105,7 @@
+ 	       endianness compensation) to fetch the piece we want.  */
+ 	    part = extract_fixed_bit_field (word_mode, value, 0, thissize,
+ 					    total_bits - bitsize + bitsdone,
+-					    NULL_RTX, 1);
++					    NULL_RTX, 1, false);
+ 	}
+       else
+ 	{
+@@ -1110,7 +1116,7 @@
+ 			    & (((HOST_WIDE_INT) 1 << thissize) - 1));
+ 	  else
+ 	    part = extract_fixed_bit_field (word_mode, value, 0, thissize,
+-					    bitsdone, NULL_RTX, 1);
++					    bitsdone, NULL_RTX, 1, false);
+ 	}
+ 
+       /* If OP0 is a register, then handle OFFSET here.
+@@ -1176,7 +1182,8 @@
+ 
+ static rtx
+ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
+-		     unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
++		     unsigned HOST_WIDE_INT bitnum,
++		     int unsignedp, bool packedp, rtx target,
+ 		     enum machine_mode mode, enum machine_mode tmode,
+ 		     bool fallback_p)
+ {
+@@ -1378,6 +1385,14 @@
+ 	    ? mode_for_size (bitsize, GET_MODE_CLASS (tmode), 0)
+ 	    : mode);
+ 
++  /* If the bitfield is volatile, we need to make sure the access
++     remains on a type-aligned boundary.  */
++  if (GET_CODE (op0) == MEM
++      && MEM_VOLATILE_P (op0)
++      && GET_MODE_BITSIZE (GET_MODE (op0)) > 0
++      && flag_strict_volatile_bitfields > 0)
++    goto no_subreg_mode_swap;
++
+   if (((bitsize >= BITS_PER_WORD && bitsize == GET_MODE_BITSIZE (mode)
+ 	&& bitpos % BITS_PER_WORD == 0)
+        || (mode1 != BLKmode
+@@ -1450,7 +1465,7 @@
+ 	  rtx result_part
+ 	    = extract_bit_field (op0, MIN (BITS_PER_WORD,
+ 					   bitsize - i * BITS_PER_WORD),
+-				 bitnum + bit_offset, 1, target_part, mode,
++				 bitnum + bit_offset, 1, false, target_part, mode,
+ 				 word_mode);
+ 
+ 	  gcc_assert (target_part);
+@@ -1649,7 +1664,7 @@
+ 	      xop0 = adjust_address (op0, bestmode, xoffset);
+ 	      xop0 = force_reg (bestmode, xop0);
+ 	      result = extract_bit_field_1 (xop0, bitsize, xbitpos,
+-					    unsignedp, target,
++					    unsignedp, packedp, target,
+ 					    mode, tmode, false);
+ 	      if (result)
+ 		return result;
+@@ -1663,7 +1678,7 @@
+     return NULL;
+ 
+   target = extract_fixed_bit_field (int_mode, op0, offset, bitsize,
+-				    bitpos, target, unsignedp);
++				    bitpos, target, unsignedp, packedp);
+   return convert_extracted_bit_field (target, mode, tmode, unsignedp);
+ }
+ 
+@@ -1674,6 +1689,7 @@
+ 
+    STR_RTX is the structure containing the byte (a REG or MEM).
+    UNSIGNEDP is nonzero if this is an unsigned bit field.
++   PACKEDP is nonzero if the field has the packed attribute.
+    MODE is the natural mode of the field value once extracted.
+    TMODE is the mode the caller would like the value to have;
+    but the value may be returned with type MODE instead.
+@@ -1685,10 +1701,10 @@
+ 
+ rtx
+ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
+-		   unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
+-		   enum machine_mode mode, enum machine_mode tmode)
++		   unsigned HOST_WIDE_INT bitnum, int unsignedp, bool packedp,
++		   rtx target, enum machine_mode mode, enum machine_mode tmode)
+ {
+-  return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp,
++  return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, packedp,
+ 			      target, mode, tmode, true);
+ }
+ 
+@@ -1704,6 +1720,8 @@
+      which is significant on bigendian machines.)
+ 
+    UNSIGNEDP is nonzero for an unsigned bit field (don't sign-extend value).
++   PACKEDP is true if the field has the packed attribute.
++
+    If TARGET is nonzero, attempts to store the value there
+    and return TARGET, but this is not guaranteed.
+    If TARGET is not used, create a pseudo-reg of mode TMODE for the value.  */
+@@ -1713,7 +1731,7 @@
+ 			 unsigned HOST_WIDE_INT offset,
+ 			 unsigned HOST_WIDE_INT bitsize,
+ 			 unsigned HOST_WIDE_INT bitpos, rtx target,
+-			 int unsignedp)
++			 int unsignedp, bool packedp)
+ {
+   unsigned int total_bits = BITS_PER_WORD;
+   enum machine_mode mode;
+@@ -1730,8 +1748,19 @@
+ 	 includes the entire field.  If such a mode would be larger than
+ 	 a word, we won't be doing the extraction the normal way.  */
+ 
+-      mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
+-			    MEM_ALIGN (op0), word_mode, MEM_VOLATILE_P (op0));
++      if (MEM_VOLATILE_P (op0)
++	  && flag_strict_volatile_bitfields > 0)
++	{
++	  if (GET_MODE_BITSIZE (GET_MODE (op0)) > 0)
++	    mode = GET_MODE (op0);
++	  else if (target && GET_MODE_BITSIZE (GET_MODE (target)) > 0)
++	    mode = GET_MODE (target);
++	  else
++	    mode = tmode;
++	}
++      else
++	mode = get_best_mode (bitsize, bitpos + offset * BITS_PER_UNIT,
++			      MEM_ALIGN (op0), word_mode, MEM_VOLATILE_P (op0));
+ 
+       if (mode == VOIDmode)
+ 	/* The only way this should occur is if the field spans word
+@@ -1752,12 +1781,67 @@
+ 		     * BITS_PER_UNIT);
+ 	}
+ 
+-      /* Get ref to an aligned byte, halfword, or word containing the field.
+-	 Adjust BITPOS to be position within a word,
+-	 and OFFSET to be the offset of that word.
+-	 Then alter OP0 to refer to that word.  */
+-      bitpos += (offset % (total_bits / BITS_PER_UNIT)) * BITS_PER_UNIT;
+-      offset -= (offset % (total_bits / BITS_PER_UNIT));
++      /* If we're accessing a volatile MEM, we can't do the next
++	 alignment step if it results in a multi-word access where we
++	 otherwise wouldn't have one.  So, check for that case
++	 here.  */
++      if (MEM_P (op0)
++	  && MEM_VOLATILE_P (op0)
++	  && flag_strict_volatile_bitfields > 0
++	  && bitpos + bitsize <= total_bits
++	  && bitpos + bitsize + (offset % (total_bits / BITS_PER_UNIT)) * BITS_PER_UNIT > total_bits)
++	{
++	  if (STRICT_ALIGNMENT)
++	    {
++	      static bool informed_about_misalignment = false;
++	      bool warned;
++
++	      if (packedp)
++		{
++		  if (bitsize == total_bits)
++		    warned = warning_at (input_location, OPT_fstrict_volatile_bitfields,
++					 "multiple accesses to volatile structure member"
++					 " because of packed attribute");
++		  else
++		    warned = warning_at (input_location, OPT_fstrict_volatile_bitfields,
++					 "multiple accesses to volatile structure bitfield"
++					 " because of packed attribute");
++
++		  return extract_split_bit_field (op0, bitsize,
++						  bitpos + offset * BITS_PER_UNIT,
++						  unsignedp);
++		}
++
++	      if (bitsize == total_bits)
++		warned = warning_at (input_location, OPT_fstrict_volatile_bitfields,
++				     "mis-aligned access used for structure member");
++	      else
++		warned = warning_at (input_location, OPT_fstrict_volatile_bitfields,
++				     "mis-aligned access used for structure bitfield");
++
++	      if (! informed_about_misalignment && warned)
++		{
++		  informed_about_misalignment = true;
++		  inform (input_location,
++			  "When a volatile object spans multiple type-sized locations,"
++			  " the compiler must choose between using a single mis-aligned access to"
++			  " preserve the volatility, or using multiple aligned accesses to avoid"
++			  " runtime faults.  This code may fail at runtime if the hardware does"
++			  " not allow this access.");
++		}
++	    }
++	}
++      else
++	{
++
++	  /* Get ref to an aligned byte, halfword, or word containing the field.
++	     Adjust BITPOS to be position within a word,
++	     and OFFSET to be the offset of that word.
++	     Then alter OP0 to refer to that word.  */
++	  bitpos += (offset % (total_bits / BITS_PER_UNIT)) * BITS_PER_UNIT;
++	  offset -= (offset % (total_bits / BITS_PER_UNIT));
++	}
++
+       op0 = adjust_address (op0, mode, offset);
+     }
+ 
+@@ -1966,7 +2050,7 @@
+ 	 extract_fixed_bit_field wants offset in bytes.  */
+       part = extract_fixed_bit_field (word_mode, word,
+ 				      offset * unit / BITS_PER_UNIT,
+-				      thissize, thispos, 0, 1);
++				      thissize, thispos, 0, 1, false);
+       bitsdone += thissize;
+ 
+       /* Shift this part into place for the result.  */
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-10-04 00:50:43 +0000
++++ new/gcc/expr.c	2010-11-04 12:43:52 +0000
+@@ -1749,7 +1749,7 @@
+ 		  && (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
+ 		tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
+ 					     (bytepos % slen0) * BITS_PER_UNIT,
+-					     1, NULL_RTX, mode, mode);
++					     1, false, NULL_RTX, mode, mode);
+ 	    }
+ 	  else
+ 	    {
+@@ -1759,7 +1759,7 @@
+ 	      mem = assign_stack_temp (GET_MODE (src), slen, 0);
+ 	      emit_move_insn (mem, src);
+ 	      tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
+-					   0, 1, NULL_RTX, mode, mode);
++					   0, 1, false, NULL_RTX, mode, mode);
+ 	    }
+ 	}
+       /* FIXME: A SIMD parallel will eventually lead to a subreg of a
+@@ -1800,7 +1800,7 @@
+ 	tmps[i] = src;
+       else
+ 	tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
+-				     bytepos * BITS_PER_UNIT, 1, NULL_RTX,
++				     bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
+ 				     mode, mode);
+ 
+       if (shift)
+@@ -2213,7 +2213,7 @@
+ 	 bitpos for the destination store (left justified).  */
+       store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, copy_mode,
+ 		       extract_bit_field (src, bitsize,
+-					  xbitpos % BITS_PER_WORD, 1,
++					  xbitpos % BITS_PER_WORD, 1, false,
+ 					  NULL_RTX, copy_mode, copy_mode));
+     }
+ 
+@@ -2970,7 +2970,7 @@
+     }
+ 
+   return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
+-			    true, NULL_RTX, imode, imode);
++			    true, false, NULL_RTX, imode, imode);
+ }
+ 
+ /* A subroutine of emit_move_insn_1.  Yet another lowpart generator.
+@@ -4233,6 +4233,13 @@
+ 
+       to_rtx = expand_normal (tem);
+ 
++      /* If the bitfield is volatile, we want to access it in the
++	 field's mode, not the computed mode.  */
++      if (volatilep
++	  && GET_CODE (to_rtx) == MEM
++	  && flag_strict_volatile_bitfields > 0)
++	to_rtx = adjust_address (to_rtx, mode1, 0);
++ 
+       if (offset != 0)
+ 	{
+ 	  enum machine_mode address_mode;
+@@ -5993,6 +6000,12 @@
+ 	mode = DECL_MODE (field);
+       else if (DECL_MODE (field) == BLKmode)
+ 	blkmode_bitfield = true;
++      else if (TREE_THIS_VOLATILE (exp)
++	       && flag_strict_volatile_bitfields > 0)
++	/* Volatile bitfields should be accessed in the mode of the
++	     field's type, not the mode computed based on the bit
++	     size.  */
++	mode = TYPE_MODE (DECL_BIT_FIELD_TYPE (field));
+ 
+       *punsignedp = DECL_UNSIGNED (field);
+     }
+@@ -8848,6 +8861,7 @@
+ 	HOST_WIDE_INT bitsize, bitpos;
+ 	tree offset;
+ 	int volatilep = 0, must_force_mem;
++	bool packedp = false;
+ 	tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
+ 					&mode1, &unsignedp, &volatilep, true);
+ 	rtx orig_op0, memloc;
+@@ -8857,6 +8871,11 @@
+ 	   infinitely recurse.  */
+ 	gcc_assert (tem != exp);
+ 
++	if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
++	    || (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
++		&& DECL_PACKED (TREE_OPERAND (exp, 1))))
++	  packedp = true;
++
+ 	/* If TEM's type is a union of variable size, pass TARGET to the inner
+ 	   computation, since it will need a temporary and TARGET is known
+ 	   to have to do.  This occurs in unchecked conversion in Ada.  */
+@@ -8873,6 +8892,14 @@
+ 			  || modifier == EXPAND_STACK_PARM)
+ 			 ? modifier : EXPAND_NORMAL);
+ 
++
++	/* If the bitfield is volatile, we want to access it in the
++	   field's mode, not the computed mode.  */
++	if (volatilep
++	    && GET_CODE (op0) == MEM
++	    && flag_strict_volatile_bitfields > 0)
++	  op0 = adjust_address (op0, mode1, 0);
++
+ 	mode2
+ 	  = CONSTANT_P (op0) ? TYPE_MODE (TREE_TYPE (tem)) : GET_MODE (op0);
+ 
+@@ -8998,6 +9025,9 @@
+ 		&& GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT
+ 		&& modifier != EXPAND_CONST_ADDRESS
+ 		&& modifier != EXPAND_INITIALIZER)
++	    /* If the field is volatile, we always want an aligned
++	       access.  */
++	    || (volatilep && flag_strict_volatile_bitfields > 0)
+ 	    /* If the field isn't aligned enough to fetch as a memref,
+ 	       fetch it as a bit field.  */
+ 	    || (mode1 != BLKmode
+@@ -9058,7 +9088,7 @@
+ 	    if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
+ 	      mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
+ 
+-	    op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
++	    op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
+ 				     (modifier == EXPAND_STACK_PARM
+ 				      ? NULL_RTX : target),
+ 				     ext_mode, ext_mode);
+
+=== modified file 'gcc/expr.h'
+--- old/gcc/expr.h	2010-02-19 09:53:51 +0000
++++ new/gcc/expr.h	2010-11-04 12:43:52 +0000
+@@ -802,7 +802,7 @@
+ extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
+ 			     unsigned HOST_WIDE_INT, enum machine_mode, rtx);
+ extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
+-			      unsigned HOST_WIDE_INT, int, rtx,
++			      unsigned HOST_WIDE_INT, int, bool, rtx,
+ 			      enum machine_mode, enum machine_mode);
+ extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
+ extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
+
+=== modified file 'gcc/fold-const.c'
+--- old/gcc/fold-const.c	2010-10-04 00:50:43 +0000
++++ new/gcc/fold-const.c	2010-11-04 12:43:52 +0000
+@@ -4208,11 +4208,16 @@
+ 
+   /* See if we can find a mode to refer to this field.  We should be able to,
+      but fail if we can't.  */
+-  nmode = get_best_mode (lbitsize, lbitpos,
+-			 const_p ? TYPE_ALIGN (TREE_TYPE (linner))
+-			 : MIN (TYPE_ALIGN (TREE_TYPE (linner)),
+-				TYPE_ALIGN (TREE_TYPE (rinner))),
+-			 word_mode, lvolatilep || rvolatilep);
++  if (lvolatilep
++      && GET_MODE_BITSIZE (lmode) > 0
++      && flag_strict_volatile_bitfields > 0)
++    nmode = lmode;
++  else
++    nmode = get_best_mode (lbitsize, lbitpos,
++			   const_p ? TYPE_ALIGN (TREE_TYPE (linner))
++			   : MIN (TYPE_ALIGN (TREE_TYPE (linner)),
++				  TYPE_ALIGN (TREE_TYPE (rinner))),
++			   word_mode, lvolatilep || rvolatilep);
+   if (nmode == VOIDmode)
+     return 0;
+ 
+
+=== modified file 'gcc/stmt.c'
+--- old/gcc/stmt.c	2010-08-13 11:53:46 +0000
++++ new/gcc/stmt.c	2010-11-04 12:43:52 +0000
+@@ -1751,7 +1751,7 @@
+ 	     xbitpos for the destination store (right justified).  */
+ 	  store_bit_field (dst, bitsize, xbitpos % BITS_PER_WORD, word_mode,
+ 			   extract_bit_field (src, bitsize,
+-					      bitpos % BITS_PER_WORD, 1,
++					      bitpos % BITS_PER_WORD, 1, false,
+ 					      NULL_RTX, word_mode, word_mode));
+ 	}
+ 
+
+=== added file 'gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c'
+--- old/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/i386/volatile-bitfields-1.c	2010-11-04 12:43:52 +0000
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fstrict-volatile-bitfields" } */
++
++typedef struct {
++  char a:1;
++  char b:7;
++  int c;
++} BitStruct;
++
++volatile BitStruct bits;
++
++int foo ()
++{
++  return bits.b;
++}
++
++/* { dg-final { scan-assembler "mov(b|zbl).*bits" } } */
+
+=== added file 'gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c'
+--- old/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/i386/volatile-bitfields-2.c	2010-11-04 12:43:52 +0000
+@@ -0,0 +1,17 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fno-strict-volatile-bitfields" } */
++
++typedef struct {
++  char a:1;
++  char b:7;
++  int c;
++} BitStruct;
++
++volatile BitStruct bits;
++
++int foo ()
++{
++  return bits.b;
++}
++
++/* { dg-final { scan-assembler "movl.*bits" } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99425.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99425.patch
new file mode 100644
index 0000000000..17839c03dc
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99425.patch
@@ -0,0 +1,128 @@
+2010-10-26  Jie Zhang  <jie@codesourcery.com>
+
+	Issue #1259
+
+	Backport from mainline:
+
+	gcc/
+	2010-10-26  Jie Zhang  <jie@codesourcery.com>
+
+	* stor-layout.c (layout_decl): Use the field's type to
+	determine the mode and keep DECL_BIT_FIELD for a volatile
+	bit-field.
+	* config/arm/arm.c (arm_override_options): Default to
+	-fstrict-volatile-bitfields.
+
+	gcc/testsuite/
+	2010-10-26  Jie Zhang  <jie@codesourcery.com>
+
+	* gcc.target/arm/volatile-bitfields-1.c: New test.
+	* gcc.target/arm/volatile-bitfields-2.c: New test.
+	* gcc.target/arm/volatile-bitfields-3.c: New test.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm.c	2010-11-04 12:49:37 +0000
+@@ -1933,6 +1933,10 @@
+        calculation, which is 2 instructions.  */
+     set_param_value ("gcse-unrestricted-cost", 2);
+ 
++  /* ARM EABI defaults to strict volatile bitfields.  */
++  if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0)
++    flag_strict_volatile_bitfields = 1;
++
+   /* Register global variables with the garbage collector.  */
+   arm_add_gc_roots ();
+ 
+
+=== modified file 'gcc/stor-layout.c'
+--- old/gcc/stor-layout.c	2010-04-02 18:54:46 +0000
++++ new/gcc/stor-layout.c	2010-11-04 12:49:37 +0000
+@@ -593,11 +593,14 @@
+ 	    }
+ 
+ 	  /* See if we can use an ordinary integer mode for a bit-field.
+-	     Conditions are: a fixed size that is correct for another mode
+-	     and occupying a complete byte or bytes on proper boundary.  */
++	     Conditions are: a fixed size that is correct for another mode,
++	     occupying a complete byte or bytes on proper boundary,
++	     and not volatile or not -fstrict-volatile-bitfields.  */
+ 	  if (TYPE_SIZE (type) != 0
+ 	      && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
+-	      && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT)
++	      && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
++	      && !(TREE_THIS_VOLATILE (decl)
++		   && flag_strict_volatile_bitfields > 0))
+ 	    {
+ 	      enum machine_mode xmode
+ 		= mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1);
+
+=== added file 'gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c'
+--- old/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/volatile-bitfields-1.c	2010-11-04 12:49:37 +0000
+@@ -0,0 +1,18 @@
++/* { dg-require-effective-target arm_eabi } */
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef struct {
++  char a:1;
++  char b:7;
++  int c;
++} BitStruct;
++
++volatile BitStruct bits;
++
++int foo ()
++{
++  return bits.b;
++}
++
++/* { dg-final { scan-assembler "ldrb\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c'
+--- old/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/volatile-bitfields-2.c	2010-11-04 12:49:37 +0000
+@@ -0,0 +1,18 @@
++/* { dg-require-effective-target arm_eabi } */
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef struct {
++  volatile unsigned long a:8;
++  volatile unsigned long b:8;
++  volatile unsigned long c:16;
++} BitStruct;
++
++BitStruct bits;
++
++unsigned long foo ()
++{
++  return bits.b;
++}
++
++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c'
+--- old/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/volatile-bitfields-3.c	2010-11-04 12:49:37 +0000
+@@ -0,0 +1,18 @@
++/* { dg-require-effective-target arm_eabi } */
++/* { dg-do compile } */
++/* { dg-options "-O2" } */
++
++typedef struct {
++  volatile unsigned long a:8;
++  volatile unsigned long b:8;
++  volatile unsigned long c:16;
++} BitStruct;
++
++BitStruct bits;
++
++unsigned long foo ()
++{
++  return bits.c;
++}
++
++/* { dg-final { scan-assembler "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" } } */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch
new file mode 100644
index 0000000000..cf06e1ff74
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99426.patch
@@ -0,0 +1,41 @@
+	Backport from mainline:
+
+	gcc/
+	2010-10-26  Jie Zhang  <jie@codesourcery.com>
+
+	* doc/invoke.texi: Improve documentation of
+	-fstrict-volatile-bitfields.
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-11-04 12:43:52 +0000
++++ new/gcc/doc/invoke.texi	2010-11-04 14:29:09 +0000
+@@ -17633,8 +17633,8 @@
+ @opindex fstrict-volatile-bitfields
+ This option should be used if accesses to volatile bitfields (or other
+ structure fields, although the compiler usually honors those types
+-anyway) should use a single access in a mode of the same size as the
+-container's type, aligned to a natural alignment if possible.  For
++anyway) should use a single access of the width of the
++field's type, aligned to a natural alignment if possible.  For
+ example, targets with memory-mapped peripheral registers might require
+ all such accesses to be 16 bits wide; with this flag the user could
+ declare all peripheral bitfields as ``unsigned short'' (assuming short
+@@ -17647,11 +17647,13 @@
+ any portion of the bitfield, or memory-mapped registers unrelated to
+ the one being updated.
+ 
+-If the target requires strict alignment, and honoring the container
++If the target requires strict alignment, and honoring the field
+ type would require violating this alignment, a warning is issued.
+-However, the access happens as the user requested, under the
+-assumption that the user knows something about the target hardware
+-that GCC is unaware of.
++If the field has @code{packed} attribute, the access is done without
++honoring the field type.  If the field doesn't have @code{packed}
++attribute, the access is done honoring the field type.  In both cases,
++GCC assumes that the user knows something about the target hardware
++that it is unaware of.
+ 
+ The default value of this option is determined by the application binary
+ interface for the target processor.
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99429.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99429.patch
new file mode 100644
index 0000000000..63ba95e0e3
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99429.patch
@@ -0,0 +1,1257 @@
+2010-11-09  Michael Hope  <michael.hope@linaro.org>
+
+	Revert:
+
+	Backport from mainline:
+
+	2010-07-15  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (last_label_ruid, first_index_reg, last_index_reg):
+	New static variables.
+	(reload_combine_recognize_pattern): New static function, broken out
+	of reload_combine.
+	(reload_combine): Use it.  Only initialize first_index_reg and
+	last_index_reg once.
+
+	2010-07-17  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/42235
+	gcc/
+	* postreload.c (reload_cse_move2add): Return bool, true if anything.
+	changed.  All callers changed.
+	(move2add_use_add2_insn): Likewise.
+	(move2add_use_add3_insn): Likewise.
+	(reload_cse_regs): If reload_cse_move2add changed anything, rerun
+	reload_combine.
+	(RELOAD_COMBINE_MAX_USES): Bump to 16.
+	(last_jump_ruid): New static variable.
+	(struct reg_use): New members CONTAINING_MEM and RUID.
+	(reg_state): New members ALL_OFFSETS_MATCH and REAL_STORE_RUID.
+	(reload_combine_split_one_ruid, reload_combine_split_ruids,
+	reload_combine_purge_insn_uses, reload_combine_closest_single_use
+	reload_combine_purge_reg_uses_after_ruid,
+	reload_combine_recognize_const_pattern): New static functions.
+	(reload_combine_recognize_pattern): Verify that ALL_OFFSETS_MATCH
+	is true for our reg and that we have available index regs.
+	(reload_combine_note_use): New args RUID and CONTAINING_MEM.  All
+	callers changed.  Use them to initialize fields in struct reg_use.
+	(reload_combine): Initialize last_jump_ruid.  Be careful when to
+	take PREV_INSN of the scanned insn.  Update REAL_STORE_RUID fields.
+	Call reload_combine_recognize_const_pattern.
+	(reload_combine_note_store): Update REAL_STORE_RUID field.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42235.c: New test.
+
+	2010-07-19  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_closest_single_use): Ignore the
+	number of uses for DEBUG_INSNs.
+	(fixup_debug_insns): New static function.
+	(reload_combine_recognize_const_pattern): Use it.  Don't let the
+	main loop be affected by DEBUG_INSNs.
+	Really disallow moving adds past a jump insn.
+	(reload_combine_recognize_pattern): Don't update use_ruid here.
+	(reload_combine_note_use): Do it here.
+	(reload_combine): Use control_flow_insn_p rather than JUMP_P.
+
+	2010-07-20  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (fixup_debug_insns): Remove arg REGNO.  New args
+	FROM and TO.  All callers changed.  Don't look for tracked uses,
+	just scan the RTL for DEBUG_INSNs and substitute.
+	(reload_combine_recognize_pattern): Call fixup_debug_insns.
+	(reload_combine): Ignore DEBUG_INSNs.
+
+	2010-07-22  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR bootstrap/44970
+	PR middle-end/45009
+	gcc/
+	* postreload.c: Include "target.h".
+	(reload_combine_closest_single_use): Don't take DEBUG_INSNs
+	into account.
+	(fixup_debug_insns): Don't copy the rtx.
+	(reload_combine_recognize_const_pattern): DEBUG_INSNs can't have uses.
+	Don't copy when replacing.  Call fixup_debug_insns in the case where
+	we merged one add with another.
+	(reload_combine_recognize_pattern): Fail if there aren't any uses.
+	Try harder to determine whether we're picking a valid index register.
+	Don't set store_ruid for an insn we're going to scan in the
+	next iteration.
+	(reload_combine): Remove unused code.
+	(reload_combine_note_use): When updating use information for
+	an old insn, ignore a use that occurs after store_ruid.
+	* Makefile.in (postreload.o): Update dependencies.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_recognize_const_pattern): Move test
+	for limiting the insn movement to the right scope.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (try_replace_in_use): New static function.
+	(reload_combine_recognize_const_pattern): Use it here.  Allow
+	substituting into a final add insn, and substituting into a memory
+	reference in an insn that sets the reg.
+
+=== modified file 'gcc/Makefile.in'
+--- old/gcc/Makefile.in	2010-10-14 11:25:44 +0000
++++ new/gcc/Makefile.in	2010-11-08 22:08:43 +0000
+@@ -3155,7 +3155,7 @@
+    $(RTL_H) $(REAL_H) $(FLAGS_H) $(EXPR_H) $(OPTABS_H) reload.h $(REGS_H) \
+    hard-reg-set.h insn-config.h $(BASIC_BLOCK_H) $(RECOG_H) output.h \
+    $(FUNCTION_H) $(TOPLEV_H) cselib.h $(TM_P_H) $(EXCEPT_H) $(TREE_H) $(MACHMODE_H) \
+-   $(OBSTACK_H) $(TARGET_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
++   $(OBSTACK_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
+ postreload-gcse.o : postreload-gcse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+    $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h \
+    $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \
+
+=== modified file 'gcc/postreload.c'
+--- old/gcc/postreload.c	2010-10-14 11:32:02 +0000
++++ new/gcc/postreload.c	2010-11-08 22:08:43 +0000
+@@ -44,7 +44,6 @@
+ #include "toplev.h"
+ #include "except.h"
+ #include "tree.h"
+-#include "target.h"
+ #include "timevar.h"
+ #include "tree-pass.h"
+ #include "df.h"
+@@ -57,10 +56,10 @@
+ static int reload_cse_simplify_operands (rtx, rtx);
+ 
+ static void reload_combine (void);
+-static void reload_combine_note_use (rtx *, rtx, int, rtx);
++static void reload_combine_note_use (rtx *, rtx);
+ static void reload_combine_note_store (rtx, const_rtx, void *);
+ 
+-static bool reload_cse_move2add (rtx);
++static void reload_cse_move2add (rtx);
+ static void move2add_note_store (rtx, const_rtx, void *);
+ 
+ /* Call cse / combine like post-reload optimization phases.
+@@ -68,16 +67,11 @@
+ void
+ reload_cse_regs (rtx first ATTRIBUTE_UNUSED)
+ {
+-  bool moves_converted;
+   reload_cse_regs_1 (first);
+   reload_combine ();
+-  moves_converted = reload_cse_move2add (first);
++  reload_cse_move2add (first);
+   if (flag_expensive_optimizations)
+-    {
+-      if (moves_converted)
+-	reload_combine ();
+-      reload_cse_regs_1 (first);
+-    }
++    reload_cse_regs_1 (first);
+ }
+ 
+ /* See whether a single set SET is a noop.  */
+@@ -666,43 +660,30 @@
+ 
+ /* The maximum number of uses of a register we can keep track of to
+    replace them with reg+reg addressing.  */
+-#define RELOAD_COMBINE_MAX_USES 16
++#define RELOAD_COMBINE_MAX_USES 6
+ 
+-/* Describes a recorded use of a register.  */
+-struct reg_use
+-{
+-  /* The insn where a register has been used.  */
+-  rtx insn;
+-  /* Points to the memory reference enclosing the use, if any, NULL_RTX
+-     otherwise.  */
+-  rtx containing_mem;
+-  /* Location of the register withing INSN.  */
+-  rtx *usep;
+-  /* The reverse uid of the insn.  */
+-  int ruid;
+-};
++/* INSN is the insn where a register has been used, and USEP points to the
++   location of the register within the rtl.  */
++struct reg_use { rtx insn, *usep; };
+ 
+ /* If the register is used in some unknown fashion, USE_INDEX is negative.
+    If it is dead, USE_INDEX is RELOAD_COMBINE_MAX_USES, and STORE_RUID
+-   indicates where it is first set or clobbered.
++   indicates where it becomes live again.
+    Otherwise, USE_INDEX is the index of the last encountered use of the
+-   register (which is first among these we have seen since we scan backwards).
+-   USE_RUID indicates the first encountered, i.e. last, of these uses.
+-   If ALL_OFFSETS_MATCH is true, all encountered uses were inside a PLUS
+-   with a constant offset; OFFSET contains this constant in that case.
++   register (which is first among these we have seen since we scan backwards),
++   OFFSET contains the constant offset that is added to the register in
++   all encountered uses, and USE_RUID indicates the first encountered, i.e.
++   last, of these uses.
+    STORE_RUID is always meaningful if we only want to use a value in a
+    register in a different place: it denotes the next insn in the insn
+-   stream (i.e. the last encountered) that sets or clobbers the register.
+-   REAL_STORE_RUID is similar, but clobbers are ignored when updating it.  */
++   stream (i.e. the last encountered) that sets or clobbers the register.  */
+ static struct
+   {
+     struct reg_use reg_use[RELOAD_COMBINE_MAX_USES];
++    int use_index;
+     rtx offset;
+-    int use_index;
+     int store_ruid;
+-    int real_store_ruid;
+     int use_ruid;
+-    bool all_offsets_match;
+   } reg_state[FIRST_PSEUDO_REGISTER];
+ 
+ /* Reverse linear uid.  This is increased in reload_combine while scanning
+@@ -710,548 +691,42 @@
+    and the store_ruid / use_ruid fields in reg_state.  */
+ static int reload_combine_ruid;
+ 
+-/* The RUID of the last label we encountered in reload_combine.  */
+-static int last_label_ruid;
+-
+-/* The RUID of the last jump we encountered in reload_combine.  */
+-static int last_jump_ruid;
+-
+-/* The register numbers of the first and last index register.  A value of
+-   -1 in LAST_INDEX_REG indicates that we've previously computed these
+-   values and found no suitable index registers.  */
+-static int first_index_reg = -1;
+-static int last_index_reg;
+-
+ #define LABEL_LIVE(LABEL) \
+   (label_live[CODE_LABEL_NUMBER (LABEL) - min_labelno])
+ 
+-/* Subroutine of reload_combine_split_ruids, called to fix up a single
+-   ruid pointed to by *PRUID if it is higher than SPLIT_RUID.  */
+-
+-static inline void
+-reload_combine_split_one_ruid (int *pruid, int split_ruid)
+-{
+-  if (*pruid > split_ruid)
+-    (*pruid)++;
+-}
+-
+-/* Called when we insert a new insn in a position we've already passed in
+-   the scan.  Examine all our state, increasing all ruids that are higher
+-   than SPLIT_RUID by one in order to make room for a new insn.  */
+-
+-static void
+-reload_combine_split_ruids (int split_ruid)
+-{
+-  unsigned i;
+-
+-  reload_combine_split_one_ruid (&reload_combine_ruid, split_ruid);
+-  reload_combine_split_one_ruid (&last_label_ruid, split_ruid);
+-  reload_combine_split_one_ruid (&last_jump_ruid, split_ruid);
+-
+-  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+-    {
+-      int j, idx = reg_state[i].use_index;
+-      reload_combine_split_one_ruid (&reg_state[i].use_ruid, split_ruid);
+-      reload_combine_split_one_ruid (&reg_state[i].store_ruid, split_ruid);
+-      reload_combine_split_one_ruid (&reg_state[i].real_store_ruid,
+-				     split_ruid);
+-      if (idx < 0)
+-	continue;
+-      for (j = idx; j < RELOAD_COMBINE_MAX_USES; j++)
+-	{
+-	  reload_combine_split_one_ruid (&reg_state[i].reg_use[j].ruid,
+-					 split_ruid);
+-	}
+-    }
+-}
+-
+-/* Called when we are about to rescan a previously encountered insn with
+-   reload_combine_note_use after modifying some part of it.  This clears all
+-   information about uses in that particular insn.  */
+-
+-static void
+-reload_combine_purge_insn_uses (rtx insn)
+-{
+-  unsigned i;
+-
+-  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+-    {
+-      int j, k, idx = reg_state[i].use_index;
+-      if (idx < 0)
+-	continue;
+-      j = k = RELOAD_COMBINE_MAX_USES;
+-      while (j-- > idx)
+-	{
+-	  if (reg_state[i].reg_use[j].insn != insn)
+-	    {
+-	      k--;
+-	      if (k != j)
+-		reg_state[i].reg_use[k] = reg_state[i].reg_use[j];
+-	    }
+-	}
+-      reg_state[i].use_index = k;
+-    }
+-}
+-
+-/* Called when we need to forget about all uses of REGNO after an insn
+-   which is identified by RUID.  */
+-
+-static void
+-reload_combine_purge_reg_uses_after_ruid (unsigned regno, int ruid)
+-{
+-  int j, k, idx = reg_state[regno].use_index;
+-  if (idx < 0)
+-    return;
+-  j = k = RELOAD_COMBINE_MAX_USES;
+-  while (j-- > idx)
+-    {
+-      if (reg_state[regno].reg_use[j].ruid >= ruid)
+-	{
+-	  k--;
+-	  if (k != j)
+-	    reg_state[regno].reg_use[k] = reg_state[regno].reg_use[j];
+-	}
+-    }
+-  reg_state[regno].use_index = k;
+-}
+-
+-/* Find the use of REGNO with the ruid that is highest among those
+-   lower than RUID_LIMIT, and return it if it is the only use of this
+-   reg in the insn.  Return NULL otherwise.  */
+-
+-static struct reg_use *
+-reload_combine_closest_single_use (unsigned regno, int ruid_limit)
+-{
+-  int i, best_ruid = 0;
+-  int use_idx = reg_state[regno].use_index;
+-  struct reg_use *retval;
+-
+-  if (use_idx < 0)
+-    return NULL;
+-  retval = NULL;
+-  for (i = use_idx; i < RELOAD_COMBINE_MAX_USES; i++)
+-    {
+-      struct reg_use *use = reg_state[regno].reg_use + i; 
+-      int this_ruid = use->ruid;
+-      if (this_ruid >= ruid_limit)
+-	continue;
+-      if (this_ruid > best_ruid)
+-	{
+-	  best_ruid = this_ruid;
+-	  retval = use;
+-	}
+-      else if (this_ruid == best_ruid)
+-	retval = NULL;
+-    }
+-  if (last_label_ruid >= best_ruid)
+-    return NULL;
+-  return retval;
+-}
+-
+-/* After we've moved an add insn, fix up any debug insns that occur
+-   between the old location of the add and the new location.  REG is
+-   the destination register of the add insn; REPLACEMENT is the
+-   SET_SRC of the add.  FROM and TO specify the range in which we
+-   should make this change on debug insns.  */
+-
+-static void
+-fixup_debug_insns (rtx reg, rtx replacement, rtx from, rtx to)
+-{
+-  rtx insn;
+-  for (insn = from; insn != to; insn = NEXT_INSN (insn))
+-    {
+-      rtx t;
+-
+-      if (!DEBUG_INSN_P (insn))
+-	continue;
+-      
+-      t = INSN_VAR_LOCATION_LOC (insn);
+-      t = simplify_replace_rtx (t, reg, replacement);
+-      validate_change (insn, &INSN_VAR_LOCATION_LOC (insn), t, 0);
+-    }
+-}
+-
+-/* Subroutine of reload_combine_recognize_const_pattern.  Try to replace REG
+-   with SRC in the insn described by USE, taking costs into account.  Return
+-   true if we made the replacement.  */
+-
+-static bool
+-try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
+-{
+-  rtx use_insn = use->insn;
+-  rtx mem = use->containing_mem;
+-  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn));
+-
+-  if (mem != NULL_RTX)
+-    {
+-      addr_space_t as = MEM_ADDR_SPACE (mem);
+-      rtx oldaddr = XEXP (mem, 0);
+-      rtx newaddr = NULL_RTX;
+-      int old_cost = address_cost (oldaddr, GET_MODE (mem), as, speed);
+-      int new_cost;
+-
+-      newaddr = simplify_replace_rtx (oldaddr, reg, src);
+-      if (memory_address_addr_space_p (GET_MODE (mem), newaddr, as))
+-	{
+-	  XEXP (mem, 0) = newaddr;
+-	  new_cost = address_cost (newaddr, GET_MODE (mem), as, speed);
+-	  XEXP (mem, 0) = oldaddr;
+-	  if (new_cost <= old_cost
+-	      && validate_change (use_insn,
+-				  &XEXP (mem, 0), newaddr, 0))
+-	    return true;
+-	}
+-    }
+-  else
+-    {
+-      rtx new_set = single_set (use_insn);
+-      if (new_set
+-	  && REG_P (SET_DEST (new_set))
+-	  && GET_CODE (SET_SRC (new_set)) == PLUS
+-	  && REG_P (XEXP (SET_SRC (new_set), 0))
+-	  && CONSTANT_P (XEXP (SET_SRC (new_set), 1)))
+-	{
+-	  rtx new_src;
+-	  int old_cost = rtx_cost (SET_SRC (new_set), SET, speed);
+-
+-	  gcc_assert (rtx_equal_p (XEXP (SET_SRC (new_set), 0), reg));
+-	  new_src = simplify_replace_rtx (SET_SRC (new_set), reg, src);
+-
+-	  if (rtx_cost (new_src, SET, speed) <= old_cost
+-	      && validate_change (use_insn, &SET_SRC (new_set),
+-				  new_src, 0))
+-	    return true;
+-	}
+-    }
+-  return false;
+-}
+-
+-/* Called by reload_combine when scanning INSN.  This function tries to detect
+-   patterns where a constant is added to a register, and the result is used
+-   in an address.
+-   Return true if no further processing is needed on INSN; false if it wasn't
+-   recognized and should be handled normally.  */
+-
+-static bool
+-reload_combine_recognize_const_pattern (rtx insn)
+-{
+-  int from_ruid = reload_combine_ruid;
+-  rtx set, pat, reg, src, addreg;
+-  unsigned int regno;
+-  struct reg_use *use;
+-  bool must_move_add;
+-  rtx add_moved_after_insn = NULL_RTX;
+-  int add_moved_after_ruid = 0;
+-  int clobbered_regno = -1;
+-
+-  set = single_set (insn);
+-  if (set == NULL_RTX)
+-    return false;
+-
+-  reg = SET_DEST (set);
+-  src = SET_SRC (set);
+-  if (!REG_P (reg)
+-      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1
+-      || GET_MODE (reg) != Pmode
+-      || reg == stack_pointer_rtx)
+-    return false;
+-
+-  regno = REGNO (reg);
+-
+-  /* We look for a REG1 = REG2 + CONSTANT insn, followed by either
+-     uses of REG1 inside an address, or inside another add insn.  If
+-     possible and profitable, merge the addition into subsequent
+-     uses.  */
+-  if (GET_CODE (src) != PLUS
+-      || !REG_P (XEXP (src, 0))
+-      || !CONSTANT_P (XEXP (src, 1)))
+-    return false;
+-
+-  addreg = XEXP (src, 0);
+-  must_move_add = rtx_equal_p (reg, addreg);
+-
+-  pat = PATTERN (insn);
+-  if (must_move_add && set != pat)
+-    {
+-      /* We have to be careful when moving the add; apart from the
+-	 single_set there may also be clobbers.  Recognize one special
+-	 case, that of one clobber alongside the set (likely a clobber
+-	 of the CC register).  */
+-      gcc_assert (GET_CODE (PATTERN (insn)) == PARALLEL);
+-      if (XVECLEN (pat, 0) != 2 || XVECEXP (pat, 0, 0) != set
+-	  || GET_CODE (XVECEXP (pat, 0, 1)) != CLOBBER
+-	  || !REG_P (XEXP (XVECEXP (pat, 0, 1), 0)))
+-	return false;
+-      clobbered_regno = REGNO (XEXP (XVECEXP (pat, 0, 1), 0));
+-    }
+-
+-  do
+-    {
+-      use = reload_combine_closest_single_use (regno, from_ruid);
+-
+-      if (use)
+-	/* Start the search for the next use from here.  */
+-	from_ruid = use->ruid;
+-
+-      if (use && GET_MODE (*use->usep) == Pmode)
+-	{
+-	  bool delete_add = false;
+-	  rtx use_insn = use->insn;
+-	  int use_ruid = use->ruid;
+-
+-	  /* Avoid moving the add insn past a jump.  */
+-	  if (must_move_add && use_ruid <= last_jump_ruid)
+-	    break;
+-
+-	  /* If the add clobbers another hard reg in parallel, don't move
+-	     it past a real set of this hard reg.  */
+-	  if (must_move_add && clobbered_regno >= 0
+-	      && reg_state[clobbered_regno].real_store_ruid >= use_ruid)
+-	    break;
+-
+-	  gcc_assert (reg_state[regno].store_ruid <= use_ruid);
+-	  /* Avoid moving a use of ADDREG past a point where it is stored.  */
+-	  if (reg_state[REGNO (addreg)].store_ruid > use_ruid)
+-	    break;
+-
+-	  /* We also must not move the addition past an insn that sets
+-	     the same register, unless we can combine two add insns.  */
+-	  if (must_move_add && reg_state[regno].store_ruid == use_ruid)
+-	    {
+-	      if (use->containing_mem == NULL_RTX)
+-		delete_add = true;
+-	      else
+-		break;
+-	    }
+-
+-	  if (try_replace_in_use (use, reg, src))
+-	    {
+-	      reload_combine_purge_insn_uses (use_insn);
+-	      reload_combine_note_use (&PATTERN (use_insn), use_insn,
+-				       use_ruid, NULL_RTX);
+-
+-	      if (delete_add)
+-		{
+-		  fixup_debug_insns (reg, src, insn, use_insn);
+-		  delete_insn (insn);
+-		  return true;
+-		}
+-	      if (must_move_add)
+-		{
+-		  add_moved_after_insn = use_insn;
+-		  add_moved_after_ruid = use_ruid;
+-		}
+-	      continue;
+-	    }
+-	}
+-      /* If we get here, we couldn't handle this use.  */
+-      if (must_move_add)
+-	break;
+-    }
+-  while (use);
+-
+-  if (!must_move_add || add_moved_after_insn == NULL_RTX)
+-    /* Process the add normally.  */
+-    return false;
+-
+-  fixup_debug_insns (reg, src, insn, add_moved_after_insn);
+-
+-  reorder_insns (insn, insn, add_moved_after_insn);
+-  reload_combine_purge_reg_uses_after_ruid (regno, add_moved_after_ruid);
+-  reload_combine_split_ruids (add_moved_after_ruid - 1);
+-  reload_combine_note_use (&PATTERN (insn), insn,
+-			   add_moved_after_ruid, NULL_RTX);
+-  reg_state[regno].store_ruid = add_moved_after_ruid;
+-
+-  return true;
+-}
+-
+-/* Called by reload_combine when scanning INSN.  Try to detect a pattern we
+-   can handle and improve.  Return true if no further processing is needed on
+-   INSN; false if it wasn't recognized and should be handled normally.  */
+-
+-static bool
+-reload_combine_recognize_pattern (rtx insn)
+-{
+-  rtx set, reg, src;
+-  unsigned int regno;
+-
+-  set = single_set (insn);
+-  if (set == NULL_RTX)
+-    return false;
+-
+-  reg = SET_DEST (set);
+-  src = SET_SRC (set);
+-  if (!REG_P (reg)
+-      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1)
+-    return false;
+-
+-  regno = REGNO (reg);
+-
+-  /* Look for (set (REGX) (CONST_INT))
+-     (set (REGX) (PLUS (REGX) (REGY)))
+-     ...
+-     ... (MEM (REGX)) ...
+-     and convert it to
+-     (set (REGZ) (CONST_INT))
+-     ...
+-     ... (MEM (PLUS (REGZ) (REGY)))... .
+-
+-     First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
+-     and that we know all uses of REGX before it dies.
+-     Also, explicitly check that REGX != REGY; our life information
+-     does not yet show whether REGY changes in this insn.  */
+-
+-  if (GET_CODE (src) == PLUS
+-      && reg_state[regno].all_offsets_match
+-      && last_index_reg != -1
+-      && REG_P (XEXP (src, 1))
+-      && rtx_equal_p (XEXP (src, 0), reg)
+-      && !rtx_equal_p (XEXP (src, 1), reg)
+-      && reg_state[regno].use_index >= 0
+-      && reg_state[regno].use_index < RELOAD_COMBINE_MAX_USES
+-      && last_label_ruid < reg_state[regno].use_ruid)
+-    {
+-      rtx base = XEXP (src, 1);
+-      rtx prev = prev_nonnote_insn (insn);
+-      rtx prev_set = prev ? single_set (prev) : NULL_RTX;
+-      rtx index_reg = NULL_RTX;
+-      rtx reg_sum = NULL_RTX;
+-      int i;
+-
+-      /* Now we need to set INDEX_REG to an index register (denoted as
+-	 REGZ in the illustration above) and REG_SUM to the expression
+-	 register+register that we want to use to substitute uses of REG
+-	 (typically in MEMs) with.  First check REG and BASE for being
+-	 index registers; we can use them even if they are not dead.  */
+-      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
+-	  || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
+-				REGNO (base)))
+-	{
+-	  index_reg = reg;
+-	  reg_sum = src;
+-	}
+-      else
+-	{
+-	  /* Otherwise, look for a free index register.  Since we have
+-	     checked above that neither REG nor BASE are index registers,
+-	     if we find anything at all, it will be different from these
+-	     two registers.  */
+-	  for (i = first_index_reg; i <= last_index_reg; i++)
+-	    {
+-	      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], i)
+-		  && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
+-		  && reg_state[i].store_ruid <= reg_state[regno].use_ruid
+-		  && (call_used_regs[i] || df_regs_ever_live_p (i))
+-		  && (!frame_pointer_needed || i != HARD_FRAME_POINTER_REGNUM)
+-		  && !fixed_regs[i] && !global_regs[i]
+-		  && hard_regno_nregs[i][GET_MODE (reg)] == 1
+-		  && targetm.hard_regno_scratch_ok (i))
+-		{
+-		  index_reg = gen_rtx_REG (GET_MODE (reg), i);
+-		  reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
+-		  break;
+-		}
+-	    }
+-	}
+-
+-      /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
+-	 (REGY), i.e. BASE, is not clobbered before the last use we'll
+-	 create.  */
+-      if (reg_sum
+-	  && prev_set
+-	  && CONST_INT_P (SET_SRC (prev_set))
+-	  && rtx_equal_p (SET_DEST (prev_set), reg)
+-	  && (reg_state[REGNO (base)].store_ruid
+-	      <= reg_state[regno].use_ruid))
+-	{
+-	  /* Change destination register and, if necessary, the constant
+-	     value in PREV, the constant loading instruction.  */
+-	  validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
+-	  if (reg_state[regno].offset != const0_rtx)
+-	    validate_change (prev,
+-			     &SET_SRC (prev_set),
+-			     GEN_INT (INTVAL (SET_SRC (prev_set))
+-				      + INTVAL (reg_state[regno].offset)),
+-			     1);
+-
+-	  /* Now for every use of REG that we have recorded, replace REG
+-	     with REG_SUM.  */
+-	  for (i = reg_state[regno].use_index;
+-	       i < RELOAD_COMBINE_MAX_USES; i++)
+-	    validate_unshare_change (reg_state[regno].reg_use[i].insn,
+-				     reg_state[regno].reg_use[i].usep,
+-				     /* Each change must have its own
+-					replacement.  */
+-				     reg_sum, 1);
+-
+-	  if (apply_change_group ())
+-	    {
+-	      struct reg_use *lowest_ruid = NULL;
+-
+-	      /* For every new use of REG_SUM, we have to record the use
+-		 of BASE therein, i.e. operand 1.  */
+-	      for (i = reg_state[regno].use_index;
+-		   i < RELOAD_COMBINE_MAX_USES; i++)
+-		{
+-		  struct reg_use *use = reg_state[regno].reg_use + i;
+-		  reload_combine_note_use (&XEXP (*use->usep, 1), use->insn,
+-					   use->ruid, use->containing_mem);
+-		  if (lowest_ruid == NULL || use->ruid < lowest_ruid->ruid)
+-		    lowest_ruid = use;
+-		}
+-
+-	      fixup_debug_insns (reg, reg_sum, insn, lowest_ruid->insn);
+-
+-	      /* Delete the reg-reg addition.  */
+-	      delete_insn (insn);
+-
+-	      if (reg_state[regno].offset != const0_rtx)
+-		/* Previous REG_EQUIV / REG_EQUAL notes for PREV
+-		   are now invalid.  */
+-		remove_reg_equal_equiv_notes (prev);
+-
+-	      reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
+-	      return true;
+-	    }
+-	}
+-    }
+-  return false;
+-}
+-
+ static void
+ reload_combine (void)
+ {
+-  rtx insn, prev;
++  rtx insn, set;
++  int first_index_reg = -1;
++  int last_index_reg = 0;
+   int i;
+   basic_block bb;
+   unsigned int r;
++  int last_label_ruid;
+   int min_labelno, n_labels;
+   HARD_REG_SET ever_live_at_start, *label_live;
+ 
++  /* If reg+reg can be used in offsetable memory addresses, the main chunk of
++     reload has already used it where appropriate, so there is no use in
++     trying to generate it now.  */
++  if (double_reg_address_ok && INDEX_REG_CLASS != NO_REGS)
++    return;
++
+   /* To avoid wasting too much time later searching for an index register,
+      determine the minimum and maximum index register numbers.  */
+-  if (INDEX_REG_CLASS == NO_REGS)
+-    last_index_reg = -1;
+-  else if (first_index_reg == -1 && last_index_reg == 0)
+-    {
+-      for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+-	if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
+-	  {
+-	    if (first_index_reg == -1)
+-	      first_index_reg = r;
+-
+-	    last_index_reg = r;
+-	  }
+-
+-      /* If no index register is available, we can quit now.  Set LAST_INDEX_REG
+-	 to -1 so we'll know to quit early the next time we get here.  */
+-      if (first_index_reg == -1)
+-	{
+-	  last_index_reg = -1;
+-	  return;
+-	}
+-    }
++  for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
++    if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
++      {
++	if (first_index_reg == -1)
++	  first_index_reg = r;
++
++	last_index_reg = r;
++      }
++
++  /* If no index register is available, we can quit now.  */
++  if (first_index_reg == -1)
++    return;
+ 
+   /* Set up LABEL_LIVE and EVER_LIVE_AT_START.  The register lifetime
+      information is a bit fuzzy immediately after reload, but it's
+@@ -1278,23 +753,20 @@
+     }
+ 
+   /* Initialize last_label_ruid, reload_combine_ruid and reg_state.  */
+-  last_label_ruid = last_jump_ruid = reload_combine_ruid = 0;
++  last_label_ruid = reload_combine_ruid = 0;
+   for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+     {
+-      reg_state[r].store_ruid = 0;
+-      reg_state[r].real_store_ruid = 0;
++      reg_state[r].store_ruid = reload_combine_ruid;
+       if (fixed_regs[r])
+ 	reg_state[r].use_index = -1;
+       else
+ 	reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+     }
+ 
+-  for (insn = get_last_insn (); insn; insn = prev)
++  for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
+     {
+       rtx note;
+ 
+-      prev = PREV_INSN (insn);
+-
+       /* We cannot do our optimization across labels.  Invalidating all the use
+ 	 information we have would be costly, so we just note where the label
+ 	 is and then later disable any optimization that would cross it.  */
+@@ -1305,17 +777,141 @@
+ 	  if (! fixed_regs[r])
+ 	      reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+ 
+-      if (! NONDEBUG_INSN_P (insn))
++      if (! INSN_P (insn))
+ 	continue;
+ 
+       reload_combine_ruid++;
+ 
+-      if (control_flow_insn_p (insn))
+-	last_jump_ruid = reload_combine_ruid;
+-
+-      if (reload_combine_recognize_const_pattern (insn)
+-	  || reload_combine_recognize_pattern (insn))
+-	continue;
++      /* Look for (set (REGX) (CONST_INT))
++	 (set (REGX) (PLUS (REGX) (REGY)))
++	 ...
++	 ... (MEM (REGX)) ...
++	 and convert it to
++	 (set (REGZ) (CONST_INT))
++	 ...
++	 ... (MEM (PLUS (REGZ) (REGY)))... .
++
++	 First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
++	 and that we know all uses of REGX before it dies.
++	 Also, explicitly check that REGX != REGY; our life information
++	 does not yet show whether REGY changes in this insn.  */
++      set = single_set (insn);
++      if (set != NULL_RTX
++	  && REG_P (SET_DEST (set))
++	  && (hard_regno_nregs[REGNO (SET_DEST (set))]
++			      [GET_MODE (SET_DEST (set))]
++	      == 1)
++	  && GET_CODE (SET_SRC (set)) == PLUS
++	  && REG_P (XEXP (SET_SRC (set), 1))
++	  && rtx_equal_p (XEXP (SET_SRC (set), 0), SET_DEST (set))
++	  && !rtx_equal_p (XEXP (SET_SRC (set), 1), SET_DEST (set))
++	  && last_label_ruid < reg_state[REGNO (SET_DEST (set))].use_ruid)
++	{
++	  rtx reg = SET_DEST (set);
++	  rtx plus = SET_SRC (set);
++	  rtx base = XEXP (plus, 1);
++	  rtx prev = prev_nonnote_nondebug_insn (insn);
++	  rtx prev_set = prev ? single_set (prev) : NULL_RTX;
++	  unsigned int regno = REGNO (reg);
++	  rtx index_reg = NULL_RTX;
++	  rtx reg_sum = NULL_RTX;
++
++	  /* Now we need to set INDEX_REG to an index register (denoted as
++	     REGZ in the illustration above) and REG_SUM to the expression
++	     register+register that we want to use to substitute uses of REG
++	     (typically in MEMs) with.  First check REG and BASE for being
++	     index registers; we can use them even if they are not dead.  */
++	  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
++	      || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
++				    REGNO (base)))
++	    {
++	      index_reg = reg;
++	      reg_sum = plus;
++	    }
++	  else
++	    {
++	      /* Otherwise, look for a free index register.  Since we have
++		 checked above that neither REG nor BASE are index registers,
++		 if we find anything at all, it will be different from these
++		 two registers.  */
++	      for (i = first_index_reg; i <= last_index_reg; i++)
++		{
++		  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
++					 i)
++		      && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
++		      && reg_state[i].store_ruid <= reg_state[regno].use_ruid
++		      && hard_regno_nregs[i][GET_MODE (reg)] == 1)
++		    {
++		      index_reg = gen_rtx_REG (GET_MODE (reg), i);
++		      reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
++		      break;
++		    }
++		}
++	    }
++
++	  /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
++	     (REGY), i.e. BASE, is not clobbered before the last use we'll
++	     create.  */
++	  if (reg_sum
++	      && prev_set
++	      && CONST_INT_P (SET_SRC (prev_set))
++	      && rtx_equal_p (SET_DEST (prev_set), reg)
++	      && reg_state[regno].use_index >= 0
++	      && (reg_state[REGNO (base)].store_ruid
++		  <= reg_state[regno].use_ruid))
++	    {
++	      int i;
++
++	      /* Change destination register and, if necessary, the constant
++		 value in PREV, the constant loading instruction.  */
++	      validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
++	      if (reg_state[regno].offset != const0_rtx)
++		validate_change (prev,
++				 &SET_SRC (prev_set),
++				 GEN_INT (INTVAL (SET_SRC (prev_set))
++					  + INTVAL (reg_state[regno].offset)),
++				 1);
++
++	      /* Now for every use of REG that we have recorded, replace REG
++		 with REG_SUM.  */
++	      for (i = reg_state[regno].use_index;
++		   i < RELOAD_COMBINE_MAX_USES; i++)
++		validate_unshare_change (reg_state[regno].reg_use[i].insn,
++				 	 reg_state[regno].reg_use[i].usep,
++				 	 /* Each change must have its own
++				    	    replacement.  */
++				 	 reg_sum, 1);
++
++	      if (apply_change_group ())
++		{
++		  /* For every new use of REG_SUM, we have to record the use
++		     of BASE therein, i.e. operand 1.  */
++		  for (i = reg_state[regno].use_index;
++		       i < RELOAD_COMBINE_MAX_USES; i++)
++		    reload_combine_note_use
++		      (&XEXP (*reg_state[regno].reg_use[i].usep, 1),
++		       reg_state[regno].reg_use[i].insn);
++
++		  if (reg_state[REGNO (base)].use_ruid
++		      > reg_state[regno].use_ruid)
++		    reg_state[REGNO (base)].use_ruid
++		      = reg_state[regno].use_ruid;
++
++		  /* Delete the reg-reg addition.  */
++		  delete_insn (insn);
++
++		  if (reg_state[regno].offset != const0_rtx)
++		    /* Previous REG_EQUIV / REG_EQUAL notes for PREV
++		       are now invalid.  */
++		    remove_reg_equal_equiv_notes (prev);
++
++		  reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
++		  reg_state[REGNO (index_reg)].store_ruid
++		    = reload_combine_ruid;
++		  continue;
++		}
++	    }
++	}
+ 
+       note_stores (PATTERN (insn), reload_combine_note_store, NULL);
+ 
+@@ -1371,8 +967,7 @@
+ 	      reg_state[i].use_index = -1;
+ 	}
+ 
+-      reload_combine_note_use (&PATTERN (insn), insn,
+-			       reload_combine_ruid, NULL_RTX);
++      reload_combine_note_use (&PATTERN (insn), insn);
+       for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ 	{
+ 	  if (REG_NOTE_KIND (note) == REG_INC
+@@ -1381,7 +976,6 @@
+ 	      int regno = REGNO (XEXP (note, 0));
+ 
+ 	      reg_state[regno].store_ruid = reload_combine_ruid;
+-	      reg_state[regno].real_store_ruid = reload_combine_ruid;
+ 	      reg_state[regno].use_index = -1;
+ 	    }
+ 	}
+@@ -1391,8 +985,8 @@
+ }
+ 
+ /* Check if DST is a register or a subreg of a register; if it is,
+-   update store_ruid, real_store_ruid and use_index in the reg_state
+-   structure accordingly.  Called via note_stores from reload_combine.  */
++   update reg_state[regno].store_ruid and reg_state[regno].use_index
++   accordingly.  Called via note_stores from reload_combine.  */
+ 
+ static void
+ reload_combine_note_store (rtx dst, const_rtx set, void *data ATTRIBUTE_UNUSED)
+@@ -1416,14 +1010,14 @@
+   /* note_stores might have stripped a STRICT_LOW_PART, so we have to be
+      careful with registers / register parts that are not full words.
+      Similarly for ZERO_EXTRACT.  */
+-  if (GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
++  if (GET_CODE (set) != SET
++      || GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
+       || GET_CODE (SET_DEST (set)) == STRICT_LOW_PART)
+     {
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].use_index = -1;
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
+-	  reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	}
+     }
+   else
+@@ -1431,8 +1025,6 @@
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
+-	  if (GET_CODE (set) == SET)
+-	    reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	  reg_state[i].use_index = RELOAD_COMBINE_MAX_USES;
+ 	}
+     }
+@@ -1443,7 +1035,7 @@
+    *XP is the pattern of INSN, or a part of it.
+    Called from reload_combine, and recursively by itself.  */
+ static void
+-reload_combine_note_use (rtx *xp, rtx insn, int ruid, rtx containing_mem)
++reload_combine_note_use (rtx *xp, rtx insn)
+ {
+   rtx x = *xp;
+   enum rtx_code code = x->code;
+@@ -1456,7 +1048,7 @@
+     case SET:
+       if (REG_P (SET_DEST (x)))
+ 	{
+-	  reload_combine_note_use (&SET_SRC (x), insn, ruid, NULL_RTX);
++	  reload_combine_note_use (&SET_SRC (x), insn);
+ 	  return;
+ 	}
+       break;
+@@ -1512,11 +1104,6 @@
+ 	    return;
+ 	  }
+ 
+-	/* We may be called to update uses in previously seen insns.
+-	   Don't add uses beyond the last store we saw.  */
+-	if (ruid < reg_state[regno].store_ruid)
+-	  return;
+-
+ 	/* If this register is already used in some unknown fashion, we
+ 	   can't do anything.
+ 	   If we decrement the index from zero to -1, we can't store more
+@@ -1525,34 +1112,29 @@
+ 	if (use_index < 0)
+ 	  return;
+ 
+-	if (use_index == RELOAD_COMBINE_MAX_USES - 1)
++	if (use_index != RELOAD_COMBINE_MAX_USES - 1)
++	  {
++	    /* We have found another use for a register that is already
++	       used later.  Check if the offsets match; if not, mark the
++	       register as used in an unknown fashion.  */
++	    if (! rtx_equal_p (offset, reg_state[regno].offset))
++	      {
++		reg_state[regno].use_index = -1;
++		return;
++	      }
++	  }
++	else
+ 	  {
+ 	    /* This is the first use of this register we have seen since we
+ 	       marked it as dead.  */
+ 	    reg_state[regno].offset = offset;
+-	    reg_state[regno].all_offsets_match = true;
+-	    reg_state[regno].use_ruid = ruid;
+-	  }
+-	else
+-	  {
+-	    if (reg_state[regno].use_ruid > ruid)
+-	      reg_state[regno].use_ruid = ruid;
+-
+-	    if (! rtx_equal_p (offset, reg_state[regno].offset))
+-	      reg_state[regno].all_offsets_match = false;
+-	  }
+-
++	    reg_state[regno].use_ruid = reload_combine_ruid;
++	  }
+ 	reg_state[regno].reg_use[use_index].insn = insn;
+-	reg_state[regno].reg_use[use_index].ruid = ruid;
+-	reg_state[regno].reg_use[use_index].containing_mem = containing_mem;
+ 	reg_state[regno].reg_use[use_index].usep = xp;
+ 	return;
+       }
+ 
+-    case MEM:
+-      containing_mem = x;
+-      break;
+-
+     default:
+       break;
+     }
+@@ -1562,12 +1144,11 @@
+   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+     {
+       if (fmt[i] == 'e')
+-	reload_combine_note_use (&XEXP (x, i), insn, ruid, containing_mem);
++	reload_combine_note_use (&XEXP (x, i), insn);
+       else if (fmt[i] == 'E')
+ 	{
+ 	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+-	    reload_combine_note_use (&XVECEXP (x, i, j), insn, ruid,
+-				     containing_mem);
++	    reload_combine_note_use (&XVECEXP (x, i, j), insn);
+ 	}
+     }
+ }
+@@ -1615,10 +1196,9 @@
+    while REG is known to already have value (SYM + offset).
+    This function tries to change INSN into an add instruction
+    (set (REG) (plus (REG) (OFF - offset))) using the known value.
+-   It also updates the information about REG's known value.
+-   Return true if we made a change.  */
++   It also updates the information about REG's known value.  */
+ 
+-static bool
++static void
+ move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1627,7 +1207,6 @@
+   rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[regno],
+ 			      GET_MODE (reg));
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
+-  bool changed = false;
+ 
+   /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
+      use (set (reg) (reg)) instead.
+@@ -1642,13 +1221,13 @@
+ 	 (reg)), would be discarded.  Maybe we should
+ 	 try a truncMN pattern?  */
+       if (INTVAL (off) == reg_offset [regno])
+-	changed = validate_change (insn, &SET_SRC (pat), reg, 0);
++	validate_change (insn, &SET_SRC (pat), reg, 0);
+     }
+   else if (rtx_cost (new_src, PLUS, speed) < rtx_cost (src, SET, speed)
+ 	   && have_add2_insn (reg, new_src))
+     {
+       rtx tem = gen_rtx_PLUS (GET_MODE (reg), reg, new_src);
+-      changed = validate_change (insn, &SET_SRC (pat), tem, 0);
++      validate_change (insn, &SET_SRC (pat), tem, 0);
+     }
+   else if (sym == NULL_RTX && GET_MODE (reg) != BImode)
+     {
+@@ -1673,9 +1252,8 @@
+ 			     gen_rtx_STRICT_LOW_PART (VOIDmode,
+ 						      narrow_reg),
+ 			     narrow_src);
+-	      changed = validate_change (insn, &PATTERN (insn),
+-					 new_set, 0);
+-	      if (changed)
++	      if (validate_change (insn, &PATTERN (insn),
++				   new_set, 0))
+ 		break;
+ 	    }
+ 	}
+@@ -1685,7 +1263,6 @@
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
+-  return changed;
+ }
+ 
+ 
+@@ -1695,10 +1272,9 @@
+    value (SYM + offset) and change INSN into an add instruction
+    (set (REG) (plus (the found register) (OFF - offset))) if such
+    a register is found.  It also updates the information about
+-   REG's known value.
+-   Return true iff we made a change.  */
++   REG's known value.  */
+ 
+-static bool
++static void
+ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1708,7 +1284,6 @@
+   int min_regno;
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
+   int i;
+-  bool changed = false;
+ 
+   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+     if (reg_set_luid[i] > move2add_last_label_luid
+@@ -1753,25 +1328,20 @@
+ 				      GET_MODE (reg));
+ 	  tem = gen_rtx_PLUS (GET_MODE (reg), tem, new_src);
+ 	}
+-      if (validate_change (insn, &SET_SRC (pat), tem, 0))
+-	changed = true;
++      validate_change (insn, &SET_SRC (pat), tem, 0);
+     }
+   reg_set_luid[regno] = move2add_luid;
+   reg_base_reg[regno] = -1;
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
+-  return changed;
+ }
+ 
+-/* Convert move insns with constant inputs to additions if they are cheaper.
+-   Return true if any changes were made.  */
+-static bool
++static void
+ reload_cse_move2add (rtx first)
+ {
+   int i;
+   rtx insn;
+-  bool changed = false;
+ 
+   for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
+     {
+@@ -1832,7 +1402,7 @@
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] == NULL_RTX)
+ 		{
+-		  changed |= move2add_use_add2_insn (reg, NULL_RTX, src, insn);
++		  move2add_use_add2_insn (reg, NULL_RTX, src, insn);
+ 		  continue;
+ 		}
+ 
+@@ -1893,7 +1463,6 @@
+ 			}
+ 		      if (success)
+ 			delete_insn (insn);
+-		      changed |= success;
+ 		      insn = next;
+ 		      reg_mode[regno] = GET_MODE (reg);
+ 		      reg_offset[regno] =
+@@ -1939,12 +1508,12 @@
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] != NULL_RTX
+ 		  && rtx_equal_p (sym, reg_symbol_ref[regno]))
+-		changed |= move2add_use_add2_insn (reg, sym, off, insn);
++		move2add_use_add2_insn (reg, sym, off, insn);
+ 
+ 	      /* Otherwise, we have to find a register whose value is sum
+ 		 of sym and some constant value.  */
+ 	      else
+-		changed |= move2add_use_add3_insn (reg, sym, off, insn);
++		move2add_use_add3_insn (reg, sym, off, insn);
+ 
+ 	      continue;
+ 	    }
+@@ -1999,7 +1568,6 @@
+ 	    }
+ 	}
+     }
+-  return changed;
+ }
+ 
+ /* SET is a SET or CLOBBER that sets DST.  DATA is the insn which
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99432.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99432.patch
new file mode 100644
index 0000000000..b63c9b35e7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99432.patch
@@ -0,0 +1,70 @@
+2010-11-03  Nathan Froyd  <froydnj@codesourcery.com>
+
+	Issue #10002
+
+	gcc/
+	* config/arm/arm.c (arm_legitimate_index_p): Split
+	VALID_NEON_QREG_MODE and VALID_NEON_DREG_MODE cases.  Permit
+	slightly larger constants in the latter case.
+	(thumb2_legitimate_index_p): Likewise.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-11-04 12:49:37 +0000
++++ new/gcc/config/arm/arm.c	2010-11-11 11:00:53 +0000
+@@ -5611,13 +5611,25 @@
+ 	    && INTVAL (index) > -1024
+ 	    && (INTVAL (index) & 3) == 0);
+ 
+-  if (TARGET_NEON
+-      && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)))
++  /* For quad modes, we restrict the constant offset to be slightly less
++     than what the instruction format permits.  We do this because for
++     quad mode moves, we will actually decompose them into two separate
++     double-mode reads or writes.  INDEX must therefore be a valid
++     (double-mode) offset and so should INDEX+8.  */
++  if (TARGET_NEON && VALID_NEON_QREG_MODE (mode))
+     return (code == CONST_INT
+ 	    && INTVAL (index) < 1016
+ 	    && INTVAL (index) > -1024
+ 	    && (INTVAL (index) & 3) == 0);
+ 
++  /* We have no such constraint on double mode offsets, so we permit the
++     full range of the instruction format.  */
++  if (TARGET_NEON && VALID_NEON_DREG_MODE (mode))
++    return (code == CONST_INT
++	    && INTVAL (index) < 1024
++	    && INTVAL (index) > -1024
++	    && (INTVAL (index) & 3) == 0);
++
+   if (TARGET_REALLY_IWMMXT && VALID_IWMMXT_REG_MODE (mode))
+     return (code == CONST_INT
+ 	    && INTVAL (index) < 1024
+@@ -5731,13 +5743,25 @@
+ 		&& (INTVAL (index) & 3) == 0);
+     }
+ 
+-  if (TARGET_NEON
+-      && (VALID_NEON_DREG_MODE (mode) || VALID_NEON_QREG_MODE (mode)))
++  /* For quad modes, we restrict the constant offset to be slightly less
++     than what the instruction format permits.  We do this because for
++     quad mode moves, we will actually decompose them into two separate
++     double-mode reads or writes.  INDEX must therefore be a valid
++     (double-mode) offset and so should INDEX+8.  */
++  if (TARGET_NEON && VALID_NEON_QREG_MODE (mode))
+     return (code == CONST_INT
+ 	    && INTVAL (index) < 1016
+ 	    && INTVAL (index) > -1024
+ 	    && (INTVAL (index) & 3) == 0);
+ 
++  /* We have no such constraint on double mode offsets, so we permit the
++     full range of the instruction format.  */
++  if (TARGET_NEON && VALID_NEON_DREG_MODE (mode))
++    return (code == CONST_INT
++	    && INTVAL (index) < 1024
++	    && INTVAL (index) > -1024
++	    && (INTVAL (index) & 3) == 0);
++
+   if (arm_address_register_rtx_p (index, strict_p)
+       && (GET_MODE_SIZE (mode) <= 4))
+     return 1;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch
new file mode 100644
index 0000000000..6bc33f2be2
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99433.patch
@@ -0,0 +1,40 @@
+2010-10-29  Julian Brown  <julian@codesourcery.com>
+
+	Launchpad #629671
+
+	gcc/
+	* config/arm/arm.h (REG_CLASS_CONTENTS): Remove soft frame pointer
+	from CORE_REGS and GENERAL_REGS classes.
+	* config/arm/arm.md (*thumb1_movsi_insn): Ignore all parts of final
+	constraint for register preferencing.
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm.h	2010-11-11 11:12:14 +0000
+@@ -1262,8 +1262,8 @@
+   { 0x0000DF00, 0x00000000, 0x00000000, 0x00000000 }, /* HI_REGS */	\
+   { 0x01000000, 0x00000000, 0x00000000, 0x00000000 }, /* CC_REG */	\
+   { 0x00000000, 0x00000000, 0x00000000, 0x80000000 }, /* VFPCC_REG */	\
+-  { 0x0200DFFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
+-  { 0x0200FFFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */	\
++  { 0x0000DFFF, 0x00000000, 0x00000000, 0x00000000 }, /* GENERAL_REGS */ \
++  { 0x0000FFFF, 0x00000000, 0x00000000, 0x00000000 }, /* CORE_REGS */	\
+   { 0xFAFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x7FFFFFFF }  /* ALL_REGS */	\
+ }
+ 
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm.md	2010-11-11 11:12:14 +0000
+@@ -5160,8 +5160,8 @@
+ })
+ 
+ (define_insn "*thumb1_movsi_insn"
+-  [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*lhk")
+-	(match_operand:SI 1 "general_operand"      "l, I,J,K,>,l,mi,l,*lhk"))]
++  [(set (match_operand:SI 0 "nonimmediate_operand" "=l,l,l,l,l,>,l, m,*l*h*k")
++	(match_operand:SI 1 "general_operand"      "l, I,J,K,>,l,mi,l,*l*h*k"))]
+   "TARGET_THUMB1
+    && (   register_operand (operands[0], SImode) 
+        || register_operand (operands[1], SImode))"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99434.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99434.patch
new file mode 100644
index 0000000000..adda68c62e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99434.patch
@@ -0,0 +1,30 @@
+2010-11-3  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-11-02  Chung-Lin Tang <cltang@codesourcery.com>
+
+	gcc/
+	* Makefile.in (LIBGCC2_CFLAGS): Add -fno-stack-protector, to
+	explicitly disable stack protection when building libgcc.
+	(CRTSTUFF_CFLAGS): Same, for crtbegin/end.
+
+--- old/gcc/Makefile.in	2010-11-08 22:08:43 +0000
++++ new/gcc/Makefile.in	2010-11-11 11:34:59 +0000
+@@ -646,6 +646,7 @@
+ LIBGCC2_CFLAGS = -O2 $(LIBGCC2_INCLUDES) $(GCC_CFLAGS) $(TARGET_LIBGCC2_CFLAGS) \
+ 		 $(LIBGCC2_DEBUG_CFLAGS) $(GTHREAD_FLAGS) \
+ 		 -DIN_LIBGCC2 -D__GCC_FLOAT_NOT_NEEDED \
++		 -fno-stack-protector \
+ 		 $(INHIBIT_LIBC_CFLAGS)
+ 
+ # Additional options to use when compiling libgcc2.a.
+@@ -659,6 +660,7 @@
+ CRTSTUFF_CFLAGS = -O2 $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -g0 \
+   -finhibit-size-directive -fno-inline -fno-exceptions \
+   -fno-zero-initialized-in-bss -fno-toplevel-reorder -fno-tree-vectorize \
++  -fno-stack-protector \
+   $(INHIBIT_LIBC_CFLAGS)
+ 
+ # Additional sources to handle exceptions; overridden by targets as needed.
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99435.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99435.patch
new file mode 100644
index 0000000000..d66df137fa
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99435.patch
@@ -0,0 +1,32 @@
+2010-11-08  Yao Qi  <yao@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-08-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/arm/arm.c (arm_rtx_costs_1): Remove second clause from the
+	if statement which adds extra costs to frame-related
+	expressions.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-11-11 11:00:53 +0000
++++ new/gcc/config/arm/arm.c	2010-11-11 11:50:33 +0000
+@@ -6805,12 +6805,10 @@
+ 	 since then they might not be moved outside of loops.  As a compromise
+ 	 we allow integration with ops that have a constant as their second
+ 	 operand.  */
+-      if ((REG_OR_SUBREG_REG (XEXP (x, 0))
+-	   && ARM_FRAME_RTX (REG_OR_SUBREG_RTX (XEXP (x, 0)))
+-	   && GET_CODE (XEXP (x, 1)) != CONST_INT)
+-	  || (REG_OR_SUBREG_REG (XEXP (x, 0))
+-	      && ARM_FRAME_RTX (REG_OR_SUBREG_RTX (XEXP (x, 0)))))
+-	*total = 4;
++      if (REG_OR_SUBREG_REG (XEXP (x, 0))
++	  && ARM_FRAME_RTX (REG_OR_SUBREG_RTX (XEXP (x, 0)))
++	  && GET_CODE (XEXP (x, 1)) != CONST_INT)
++	*total = COSTS_N_INSNS (1);
+ 
+       if (mode == DImode)
+ 	{
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99436.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99436.patch
new file mode 100644
index 0000000000..deb749efcb
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99436.patch
@@ -0,0 +1,209 @@
+2010-11-24  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+	gcc/
+	* combine.c (subst, combine_simlify_rtx): Add new argument, use it
+	to track processing of conditionals.  Update all callers.
+	(try_combine, simplify_if_then_else): Update.
+
+=== modified file 'gcc/combine.c'
+--- old/gcc/combine.c	2010-11-04 12:39:28 +0000
++++ new/gcc/combine.c	2010-11-25 11:11:45 +0000
+@@ -392,8 +392,8 @@
+ static void undo_all (void);
+ static void undo_commit (void);
+ static rtx *find_split_point (rtx *, rtx);
+-static rtx subst (rtx, rtx, rtx, int, int);
+-static rtx combine_simplify_rtx (rtx, enum machine_mode, int);
++static rtx subst (rtx, rtx, rtx, int, int, int);
++static rtx combine_simplify_rtx (rtx, enum machine_mode, int, int);
+ static rtx simplify_if_then_else (rtx);
+ static rtx simplify_set (rtx);
+ static rtx simplify_logical (rtx);
+@@ -2944,12 +2944,12 @@
+ 	  if (i1)
+ 	    {
+ 	      subst_low_luid = DF_INSN_LUID (i1);
+-	      i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0);
++	      i1src = subst (i1src, pc_rtx, pc_rtx, 0, 0, 0);
+ 	    }
+ 	  else
+ 	    {
+ 	      subst_low_luid = DF_INSN_LUID (i2);
+-	      i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0);
++	      i2src = subst (i2src, pc_rtx, pc_rtx, 0, 0, 0);
+ 	    }
+ 	}
+ 
+@@ -2960,7 +2960,7 @@
+ 	 to avoid self-referential rtl.  */
+ 
+       subst_low_luid = DF_INSN_LUID (i2);
+-      newpat = subst (PATTERN (i3), i2dest, i2src, 0,
++      newpat = subst (PATTERN (i3), i2dest, i2src, 0, 0,
+ 		      ! i1_feeds_i3 && i1dest_in_i1src);
+       substed_i2 = 1;
+ 
+@@ -2991,7 +2991,7 @@
+ 
+       n_occurrences = 0;
+       subst_low_luid = DF_INSN_LUID (i1);
+-      newpat = subst (newpat, i1dest, i1src, 0, 0);
++      newpat = subst (newpat, i1dest, i1src, 0, 0, 0);
+       substed_i1 = 1;
+     }
+ 
+@@ -3053,7 +3053,7 @@
+ 	  else
+ 	    /* See comment where i2pat is assigned.  */
+ 	    XVECEXP (newpat, 0, --total_sets)
+-	      = subst (i2pat, i1dest, i1src, 0, 0);
++	      = subst (i2pat, i1dest, i1src, 0, 0, 0);
+ 	}
+     }
+ 
+@@ -4605,11 +4605,13 @@
+ 
+    IN_DEST is nonzero if we are processing the SET_DEST of a SET.
+ 
++   IN_COND is nonzero if we are on top level of the condition.
++
+    UNIQUE_COPY is nonzero if each substitution must be unique.  We do this
+    by copying if `n_occurrences' is nonzero.  */
+ 
+ static rtx
+-subst (rtx x, rtx from, rtx to, int in_dest, int unique_copy)
++subst (rtx x, rtx from, rtx to, int in_dest, int in_cond, int unique_copy)
+ {
+   enum rtx_code code = GET_CODE (x);
+   enum machine_mode op0_mode = VOIDmode;
+@@ -4670,7 +4672,7 @@
+       && GET_CODE (XVECEXP (x, 0, 0)) == SET
+       && GET_CODE (SET_SRC (XVECEXP (x, 0, 0))) == ASM_OPERANDS)
+     {
+-      new_rtx = subst (XVECEXP (x, 0, 0), from, to, 0, unique_copy);
++      new_rtx = subst (XVECEXP (x, 0, 0), from, to, 0, 0, unique_copy);
+ 
+       /* If this substitution failed, this whole thing fails.  */
+       if (GET_CODE (new_rtx) == CLOBBER
+@@ -4687,7 +4689,7 @@
+ 	      && GET_CODE (dest) != CC0
+ 	      && GET_CODE (dest) != PC)
+ 	    {
+-	      new_rtx = subst (dest, from, to, 0, unique_copy);
++	      new_rtx = subst (dest, from, to, 0, 0, unique_copy);
+ 
+ 	      /* If this substitution failed, this whole thing fails.  */
+ 	      if (GET_CODE (new_rtx) == CLOBBER
+@@ -4733,8 +4735,8 @@
+ 		    }
+ 		  else
+ 		    {
+-		      new_rtx = subst (XVECEXP (x, i, j), from, to, 0,
+-				   unique_copy);
++		      new_rtx = subst (XVECEXP (x, i, j), from, to, 0, 0,
++				       unique_copy);
+ 
+ 		      /* If this substitution failed, this whole thing
+ 			 fails.  */
+@@ -4811,7 +4813,9 @@
+ 				&& (code == SUBREG || code == STRICT_LOW_PART
+ 				    || code == ZERO_EXTRACT))
+ 			       || code == SET)
+-			      && i == 0), unique_copy);
++			      && i == 0),
++				 code == IF_THEN_ELSE && i == 0,
++				 unique_copy);
+ 
+ 	      /* If we found that we will have to reject this combination,
+ 		 indicate that by returning the CLOBBER ourselves, rather than
+@@ -4868,7 +4872,7 @@
+       /* If X is sufficiently simple, don't bother trying to do anything
+ 	 with it.  */
+       if (code != CONST_INT && code != REG && code != CLOBBER)
+-	x = combine_simplify_rtx (x, op0_mode, in_dest);
++	x = combine_simplify_rtx (x, op0_mode, in_dest, in_cond);
+ 
+       if (GET_CODE (x) == code)
+ 	break;
+@@ -4888,10 +4892,12 @@
+    expression.
+ 
+    OP0_MODE is the original mode of XEXP (x, 0).  IN_DEST is nonzero
+-   if we are inside a SET_DEST.  */
++   if we are inside a SET_DEST.  IN_COND is nonzero if we are on the top level
++   of a condition.  */
+ 
+ static rtx
+-combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest)
++combine_simplify_rtx (rtx x, enum machine_mode op0_mode, int in_dest,
++		      int in_cond)
+ {
+   enum rtx_code code = GET_CODE (x);
+   enum machine_mode mode = GET_MODE (x);
+@@ -4946,8 +4952,8 @@
+ 	     false arms to store-flag values.  Be careful to use copy_rtx
+ 	     here since true_rtx or false_rtx might share RTL with x as a
+ 	     result of the if_then_else_cond call above.  */
+-	  true_rtx = subst (copy_rtx (true_rtx), pc_rtx, pc_rtx, 0, 0);
+-	  false_rtx = subst (copy_rtx (false_rtx), pc_rtx, pc_rtx, 0, 0);
++	  true_rtx = subst (copy_rtx (true_rtx), pc_rtx, pc_rtx, 0, 0, 0);
++	  false_rtx = subst (copy_rtx (false_rtx), pc_rtx, pc_rtx, 0, 0, 0);
+ 
+ 	  /* If true_rtx and false_rtx are not general_operands, an if_then_else
+ 	     is unlikely to be simpler.  */
+@@ -5291,7 +5297,7 @@
+ 	{
+ 	  /* Try to simplify the expression further.  */
+ 	  rtx tor = simplify_gen_binary (IOR, mode, XEXP (x, 0), XEXP (x, 1));
+-	  temp = combine_simplify_rtx (tor, mode, in_dest);
++	  temp = combine_simplify_rtx (tor, mode, in_dest, 0);
+ 
+ 	  /* If we could, great.  If not, do not go ahead with the IOR
+ 	     replacement, since PLUS appears in many special purpose
+@@ -5384,7 +5390,16 @@
+ 	     ZERO_EXTRACT is indeed appropriate, it will be placed back by
+ 	     the call to make_compound_operation in the SET case.  */
+ 
+-	  if (STORE_FLAG_VALUE == 1
++	  if (in_cond)
++	    /* Don't apply below optimizations if the caller would
++	       prefer a comparison rather than a value.
++	       E.g., for the condition in an IF_THEN_ELSE most targets need
++	       an explicit comparison.  */
++	    {
++	      ;
++	    }
++
++	  else if (STORE_FLAG_VALUE == 1
+ 	      && new_code == NE && GET_MODE_CLASS (mode) == MODE_INT
+ 	      && op1 == const0_rtx
+ 	      && mode == GET_MODE (op0)
+@@ -5628,11 +5643,11 @@
+       if (reg_mentioned_p (from, true_rtx))
+ 	true_rtx = subst (known_cond (copy_rtx (true_rtx), true_code,
+ 				      from, true_val),
+-		      pc_rtx, pc_rtx, 0, 0);
++			  pc_rtx, pc_rtx, 0, 0, 0);
+       if (reg_mentioned_p (from, false_rtx))
+ 	false_rtx = subst (known_cond (copy_rtx (false_rtx), false_code,
+ 				   from, false_val),
+-		       pc_rtx, pc_rtx, 0, 0);
++			   pc_rtx, pc_rtx, 0, 0, 0);
+ 
+       SUBST (XEXP (x, 1), swapped ? false_rtx : true_rtx);
+       SUBST (XEXP (x, 2), swapped ? true_rtx : false_rtx);
+@@ -5849,11 +5864,11 @@
+ 	{
+ 	  temp = subst (simplify_gen_relational (true_code, m, VOIDmode,
+ 						 cond_op0, cond_op1),
+-			pc_rtx, pc_rtx, 0, 0);
++			pc_rtx, pc_rtx, 0, 0, 0);
+ 	  temp = simplify_gen_binary (MULT, m, temp,
+ 				      simplify_gen_binary (MULT, m, c1,
+ 							   const_true_rtx));
+-	  temp = subst (temp, pc_rtx, pc_rtx, 0, 0);
++	  temp = subst (temp, pc_rtx, pc_rtx, 0, 0, 0);
+ 	  temp = simplify_gen_binary (op, m, gen_lowpart (m, z), temp);
+ 
+ 	  if (extend_op != UNKNOWN)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99437.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99437.patch
new file mode 100644
index 0000000000..94d9666084
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99437.patch
@@ -0,0 +1,27 @@
+2010-11-24  Richard Sandiford  <richard.sandiford@linaro.org>
+
+	Launchpad #618684
+
+	Backport from mainline:
+
+	2010-04-10  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* reload1.c (eliminate_regs_in_insn): Don't restore an operand
+	if doing so would replace the entire pattern.
+
+=== modified file 'gcc/reload1.c'
+--- old/gcc/reload1.c	2010-10-04 00:50:43 +0000
++++ new/gcc/reload1.c	2010-11-24 13:40:23 +0000
+@@ -3567,7 +3567,10 @@
+     {
+       /* Restore the old body.  */
+       for (i = 0; i < recog_data.n_operands; i++)
+-	*recog_data.operand_loc[i] = orig_operand[i];
++	/* Restoring a top-level match_parallel would clobber the new_body
++	   we installed in the insn.  */
++	if (recog_data.operand_loc[i] != &PATTERN (insn))
++	  *recog_data.operand_loc[i] = orig_operand[i];
+       for (i = 0; i < recog_data.n_dups; i++)
+ 	*recog_data.dup_loc[i] = orig_operand[(int) recog_data.dup_num[i]];
+     }
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99439.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99439.patch
new file mode 100644
index 0000000000..cec7f57d47
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99439.patch
@@ -0,0 +1,1500 @@
+2010-11-16  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	2010-07-21  Richard Henderson  <rth@redhat.com>
+
+	gcc/
+	* config/i386/i386.c (setup_incoming_varargs_64): Emit a simple
+	comparison for avoiding xmm register saves.  Emit the xmm register
+	saves explicitly.
+	* config/i386/i386.md (UNSPEC_SSE_PROLOGUE_SAVE): Remove.
+	(UNSPEC_SSE_PROLOGUE_SAVE_LOW): Remove.
+	(sse_prologue_save, sse_prologue_save_insn1, sse_prologue_save_insn):
+	Remove patterns and the associated splitters.
+
+	2010-07-22  Richard Henderson  <rth@redhat.com>
+
+	gcc/
+	PR target/45027
+	* config/i386/i386.c (setup_incoming_varargs_64): Force the use
+	of V4SFmode for the SSE saves; increase stack alignment if needed.
+
+2010-11-16  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Re-merge, backport from mainline:
+
+	2010-07-15  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (last_label_ruid, first_index_reg, last_index_reg):
+	New static variables.
+	(reload_combine_recognize_pattern): New static function, broken out
+	of reload_combine.
+	(reload_combine): Use it.  Only initialize first_index_reg and
+	last_index_reg once.
+
+	2010-07-17  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/42235
+	gcc/
+	* postreload.c (reload_cse_move2add): Return bool, true if anything.
+	changed.  All callers changed.
+	(move2add_use_add2_insn): Likewise.
+	(move2add_use_add3_insn): Likewise.
+	(reload_cse_regs): If reload_cse_move2add changed anything, rerun
+	reload_combine.
+	(RELOAD_COMBINE_MAX_USES): Bump to 16.
+	(last_jump_ruid): New static variable.
+	(struct reg_use): New members CONTAINING_MEM and RUID.
+	(reg_state): New members ALL_OFFSETS_MATCH and REAL_STORE_RUID.
+	(reload_combine_split_one_ruid, reload_combine_split_ruids,
+	reload_combine_purge_insn_uses, reload_combine_closest_single_use
+	reload_combine_purge_reg_uses_after_ruid,
+	reload_combine_recognize_const_pattern): New static functions.
+	(reload_combine_recognize_pattern): Verify that ALL_OFFSETS_MATCH
+	is true for our reg and that we have available index regs.
+	(reload_combine_note_use): New args RUID and CONTAINING_MEM.  All
+	callers changed.  Use them to initialize fields in struct reg_use.
+	(reload_combine): Initialize last_jump_ruid.  Be careful when to
+	take PREV_INSN of the scanned insn.  Update REAL_STORE_RUID fields.
+	Call reload_combine_recognize_const_pattern.
+	(reload_combine_note_store): Update REAL_STORE_RUID field.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr42235.c: New test.
+
+	2010-07-19  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_closest_single_use): Ignore the
+	number of uses for DEBUG_INSNs.
+	(fixup_debug_insns): New static function.
+	(reload_combine_recognize_const_pattern): Use it.  Don't let the
+	main loop be affected by DEBUG_INSNs.
+	Really disallow moving adds past a jump insn.
+	(reload_combine_recognize_pattern): Don't update use_ruid here.
+	(reload_combine_note_use): Do it here.
+	(reload_combine): Use control_flow_insn_p rather than JUMP_P.
+
+	2010-07-20  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (fixup_debug_insns): Remove arg REGNO.  New args
+	FROM and TO.  All callers changed.  Don't look for tracked uses,
+	just scan the RTL for DEBUG_INSNs and substitute.
+	(reload_combine_recognize_pattern): Call fixup_debug_insns.
+	(reload_combine): Ignore DEBUG_INSNs.
+
+	2010-07-22  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR bootstrap/44970
+	PR middle-end/45009
+	gcc/
+	* postreload.c: Include "target.h".
+	(reload_combine_closest_single_use): Don't take DEBUG_INSNs
+	into account.
+	(fixup_debug_insns): Don't copy the rtx.
+	(reload_combine_recognize_const_pattern): DEBUG_INSNs can't have uses.
+	Don't copy when replacing.  Call fixup_debug_insns in the case where
+	we merged one add with another.
+	(reload_combine_recognize_pattern): Fail if there aren't any uses.
+	Try harder to determine whether we're picking a valid index register.
+	Don't set store_ruid for an insn we're going to scan in the
+	next iteration.
+	(reload_combine): Remove unused code.
+	(reload_combine_note_use): When updating use information for
+	an old insn, ignore a use that occurs after store_ruid.
+	* Makefile.in (postreload.o): Update dependencies.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (reload_combine_recognize_const_pattern): Move test
+	for limiting the insn movement to the right scope.
+
+	2010-07-27  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* postreload.c (try_replace_in_use): New static function.
+	(reload_combine_recognize_const_pattern): Use it here.  Allow
+	substituting into a final add insn, and substituting into a memory
+	reference in an insn that sets the reg.
+
+=== modified file 'gcc/Makefile.in'
+--- old/gcc/Makefile.in	2010-11-11 11:34:59 +0000
++++ new/gcc/Makefile.in	2010-11-16 18:05:53 +0000
+@@ -3157,7 +3157,7 @@
+    $(RTL_H) $(REAL_H) $(FLAGS_H) $(EXPR_H) $(OPTABS_H) reload.h $(REGS_H) \
+    hard-reg-set.h insn-config.h $(BASIC_BLOCK_H) $(RECOG_H) output.h \
+    $(FUNCTION_H) $(TOPLEV_H) cselib.h $(TM_P_H) $(EXCEPT_H) $(TREE_H) $(MACHMODE_H) \
+-   $(OBSTACK_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
++   $(OBSTACK_H) $(TARGET_H) $(TIMEVAR_H) $(TREE_PASS_H) $(DF_H) $(DBGCNT_H)
+ postreload-gcse.o : postreload-gcse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
+    $(TM_H) $(RTL_H) $(REGS_H) hard-reg-set.h $(FLAGS_H) insn-config.h \
+    $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \
+
+=== modified file 'gcc/config/i386/i386.c'
+--- old/gcc/config/i386/i386.c	2010-09-30 20:24:54 +0000
++++ new/gcc/config/i386/i386.c	2010-11-16 18:05:53 +0000
+@@ -6737,12 +6737,8 @@
+ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum)
+ {
+   rtx save_area, mem;
+-  rtx label;
+-  rtx label_ref;
+-  rtx tmp_reg;
+-  rtx nsse_reg;
+   alias_set_type set;
+-  int i;
++  int i, max;
+ 
+   /* GPR size of varargs save area.  */
+   if (cfun->va_list_gpr_size)
+@@ -6752,7 +6748,7 @@
+ 
+   /* FPR size of varargs save area.  We don't need it if we don't pass
+      anything in SSE registers.  */
+-  if (cum->sse_nregs && cfun->va_list_fpr_size)
++  if (TARGET_SSE && cfun->va_list_fpr_size)
+     ix86_varargs_fpr_size = X86_64_SSE_REGPARM_MAX * 16;
+   else
+     ix86_varargs_fpr_size = 0;
+@@ -6763,10 +6759,11 @@
+   save_area = frame_pointer_rtx;
+   set = get_varargs_alias_set ();
+ 
+-  for (i = cum->regno;
+-       i < X86_64_REGPARM_MAX
+-       && i < cum->regno + cfun->va_list_gpr_size / UNITS_PER_WORD;
+-       i++)
++  max = cum->regno + cfun->va_list_gpr_size / UNITS_PER_WORD;
++  if (max > X86_64_REGPARM_MAX)
++    max = X86_64_REGPARM_MAX;
++
++  for (i = cum->regno; i < max; i++)
+     {
+       mem = gen_rtx_MEM (Pmode,
+ 			 plus_constant (save_area, i * UNITS_PER_WORD));
+@@ -6778,62 +6775,42 @@
+ 
+   if (ix86_varargs_fpr_size)
+     {
+-      /* Stack must be aligned to 16byte for FP register save area.  */
+-      if (crtl->stack_alignment_needed < 128)
+-	crtl->stack_alignment_needed = 128;
++      enum machine_mode smode;
++      rtx label, test;
+ 
+       /* Now emit code to save SSE registers.  The AX parameter contains number
+-	 of SSE parameter registers used to call this function.  We use
+-	 sse_prologue_save insn template that produces computed jump across
+-	 SSE saves.  We need some preparation work to get this working.  */
++	 of SSE parameter registers used to call this function, though all we
++	 actually check here is the zero/non-zero status.  */
+ 
+       label = gen_label_rtx ();
+-      label_ref = gen_rtx_LABEL_REF (Pmode, label);
+-
+-      /* Compute address to jump to :
+-         label - eax*4 + nnamed_sse_arguments*4 Or
+-         label - eax*5 + nnamed_sse_arguments*5 for AVX.  */
+-      tmp_reg = gen_reg_rtx (Pmode);
+-      nsse_reg = gen_reg_rtx (Pmode);
+-      emit_insn (gen_zero_extendqidi2 (nsse_reg, gen_rtx_REG (QImode, AX_REG)));
+-      emit_insn (gen_rtx_SET (VOIDmode, tmp_reg,
+-			      gen_rtx_MULT (Pmode, nsse_reg,
+-					    GEN_INT (4))));
+-
+-      /* vmovaps is one byte longer than movaps.  */
+-      if (TARGET_AVX)
+-	emit_insn (gen_rtx_SET (VOIDmode, tmp_reg,
+-				gen_rtx_PLUS (Pmode, tmp_reg,
+-					      nsse_reg)));
+-
+-      if (cum->sse_regno)
+-	emit_move_insn
+-	  (nsse_reg,
+-	   gen_rtx_CONST (DImode,
+-			  gen_rtx_PLUS (DImode,
+-					label_ref,
+-					GEN_INT (cum->sse_regno
+-						 * (TARGET_AVX ? 5 : 4)))));
+-      else
+-	emit_move_insn (nsse_reg, label_ref);
+-      emit_insn (gen_subdi3 (nsse_reg, nsse_reg, tmp_reg));
+-
+-      /* Compute address of memory block we save into.  We always use pointer
+-	 pointing 127 bytes after first byte to store - this is needed to keep
+-	 instruction size limited by 4 bytes (5 bytes for AVX) with one
+-	 byte displacement.  */
+-      tmp_reg = gen_reg_rtx (Pmode);
+-      emit_insn (gen_rtx_SET (VOIDmode, tmp_reg,
+-			      plus_constant (save_area,
+-					     ix86_varargs_gpr_size + 127)));
+-      mem = gen_rtx_MEM (BLKmode, plus_constant (tmp_reg, -127));
+-      MEM_NOTRAP_P (mem) = 1;
+-      set_mem_alias_set (mem, set);
+-      set_mem_align (mem, BITS_PER_WORD);
+-
+-      /* And finally do the dirty job!  */
+-      emit_insn (gen_sse_prologue_save (mem, nsse_reg,
+-					GEN_INT (cum->sse_regno), label));
++      test = gen_rtx_EQ (VOIDmode, gen_rtx_REG (QImode, AX_REG), const0_rtx);
++      emit_jump_insn (gen_cbranchqi4 (test, XEXP (test, 0), XEXP (test, 1),
++				      label));
++
++      /* ??? If !TARGET_SSE_TYPELESS_STORES, would we perform better if
++	 we used movdqa (i.e. TImode) instead?  Perhaps even better would
++	 be if we could determine the real mode of the data, via a hook
++	 into pass_stdarg.  Ignore all that for now.  */
++      smode = V4SFmode;
++      if (crtl->stack_alignment_needed < GET_MODE_ALIGNMENT (smode))
++	crtl->stack_alignment_needed = GET_MODE_ALIGNMENT (smode);
++
++      max = cum->sse_regno + cfun->va_list_fpr_size / 16;
++      if (max > X86_64_SSE_REGPARM_MAX)
++	max = X86_64_SSE_REGPARM_MAX;
++
++      for (i = cum->sse_regno; i < max; ++i)
++	{
++	  mem = plus_constant (save_area, i * 16 + ix86_varargs_gpr_size);
++	  mem = gen_rtx_MEM (smode, mem);
++	  MEM_NOTRAP_P (mem) = 1;
++	  set_mem_alias_set (mem, set);
++	  set_mem_align (mem, GET_MODE_ALIGNMENT (smode));
++
++	  emit_move_insn (mem, gen_rtx_REG (smode, SSE_REGNO (i)));
++	}
++
++      emit_label (label);
+     }
+ }
+ 
+
+=== modified file 'gcc/config/i386/i386.md'
+--- old/gcc/config/i386/i386.md	2010-10-22 04:56:41 +0000
++++ new/gcc/config/i386/i386.md	2010-11-27 15:24:12 +0000
+@@ -80,7 +80,6 @@
+    ; Prologue support
+    (UNSPEC_STACK_ALLOC		11)
+    (UNSPEC_SET_GOT		12)
+-   (UNSPEC_SSE_PROLOGUE_SAVE	13)
+    (UNSPEC_REG_SAVE		14)
+    (UNSPEC_DEF_CFA		15)
+    (UNSPEC_SET_RIP		16)
+@@ -20252,74 +20251,6 @@
+   { return ASM_SHORT "0x0b0f"; }
+   [(set_attr "length" "2")])
+ 
+-(define_expand "sse_prologue_save"
+-  [(parallel [(set (match_operand:BLK 0 "" "")
+-		   (unspec:BLK [(reg:DI XMM0_REG)
+-				(reg:DI XMM1_REG)
+-				(reg:DI XMM2_REG)
+-				(reg:DI XMM3_REG)
+-				(reg:DI XMM4_REG)
+-				(reg:DI XMM5_REG)
+-				(reg:DI XMM6_REG)
+-				(reg:DI XMM7_REG)] UNSPEC_SSE_PROLOGUE_SAVE))
+-	      (use (match_operand:DI 1 "register_operand" ""))
+-	      (use (match_operand:DI 2 "immediate_operand" ""))
+-	      (use (label_ref:DI (match_operand 3 "" "")))])]
+-  "TARGET_64BIT"
+-  "")
+-
+-(define_insn "*sse_prologue_save_insn"
+-  [(set (mem:BLK (plus:DI (match_operand:DI 0 "register_operand" "R")
+-			  (match_operand:DI 4 "const_int_operand" "n")))
+-	(unspec:BLK [(reg:DI XMM0_REG)
+-		     (reg:DI XMM1_REG)
+-		     (reg:DI XMM2_REG)
+-		     (reg:DI XMM3_REG)
+-		     (reg:DI XMM4_REG)
+-		     (reg:DI XMM5_REG)
+-		     (reg:DI XMM6_REG)
+-		     (reg:DI XMM7_REG)] UNSPEC_SSE_PROLOGUE_SAVE))
+-   (use (match_operand:DI 1 "register_operand" "r"))
+-   (use (match_operand:DI 2 "const_int_operand" "i"))
+-   (use (label_ref:DI (match_operand 3 "" "X")))]
+-  "TARGET_64BIT
+-   && INTVAL (operands[4]) + X86_64_SSE_REGPARM_MAX * 16 - 16 < 128
+-   && INTVAL (operands[4]) + INTVAL (operands[2]) * 16 >= -128"
+-{
+-  int i;
+-  operands[0] = gen_rtx_MEM (Pmode,
+-			     gen_rtx_PLUS (Pmode, operands[0], operands[4]));
+-  /* VEX instruction with a REX prefix will #UD.  */
+-  if (TARGET_AVX && GET_CODE (XEXP (operands[0], 0)) != PLUS)
+-    gcc_unreachable ();
+-
+-  output_asm_insn ("jmp\t%A1", operands);
+-  for (i = X86_64_SSE_REGPARM_MAX - 1; i >= INTVAL (operands[2]); i--)
+-    {
+-      operands[4] = adjust_address (operands[0], DImode, i*16);
+-      operands[5] = gen_rtx_REG (TImode, SSE_REGNO (i));
+-      PUT_MODE (operands[4], TImode);
+-      if (GET_CODE (XEXP (operands[0], 0)) != PLUS)
+-        output_asm_insn ("rex", operands);
+-      output_asm_insn ("%vmovaps\t{%5, %4|%4, %5}", operands);
+-    }
+-  (*targetm.asm_out.internal_label) (asm_out_file, "L",
+-				     CODE_LABEL_NUMBER (operands[3]));
+-  return "";
+-}
+-  [(set_attr "type" "other")
+-   (set_attr "length_immediate" "0")
+-   (set_attr "length_address" "0")
+-   (set (attr "length")
+-     (if_then_else
+-       (eq (symbol_ref "TARGET_AVX") (const_int 0))
+-       (const_string "34")
+-       (const_string "42")))
+-   (set_attr "memory" "store")
+-   (set_attr "modrm" "0")
+-   (set_attr "prefix" "maybe_vex")
+-   (set_attr "mode" "DI")])
+-
+ (define_expand "prefetch"
+   [(prefetch (match_operand 0 "address_operand" "")
+ 	     (match_operand:SI 1 "const_int_operand" "")
+
+=== modified file 'gcc/postreload.c'
+--- old/gcc/postreload.c	2010-11-08 22:08:43 +0000
++++ new/gcc/postreload.c	2010-11-16 18:05:53 +0000
+@@ -44,6 +44,7 @@
+ #include "toplev.h"
+ #include "except.h"
+ #include "tree.h"
++#include "target.h"
+ #include "timevar.h"
+ #include "tree-pass.h"
+ #include "df.h"
+@@ -56,10 +57,10 @@
+ static int reload_cse_simplify_operands (rtx, rtx);
+ 
+ static void reload_combine (void);
+-static void reload_combine_note_use (rtx *, rtx);
++static void reload_combine_note_use (rtx *, rtx, int, rtx);
+ static void reload_combine_note_store (rtx, const_rtx, void *);
+ 
+-static void reload_cse_move2add (rtx);
++static bool reload_cse_move2add (rtx);
+ static void move2add_note_store (rtx, const_rtx, void *);
+ 
+ /* Call cse / combine like post-reload optimization phases.
+@@ -67,11 +68,16 @@
+ void
+ reload_cse_regs (rtx first ATTRIBUTE_UNUSED)
+ {
++  bool moves_converted;
+   reload_cse_regs_1 (first);
+   reload_combine ();
+-  reload_cse_move2add (first);
++  moves_converted = reload_cse_move2add (first);
+   if (flag_expensive_optimizations)
+-    reload_cse_regs_1 (first);
++    {
++      if (moves_converted)
++	reload_combine ();
++      reload_cse_regs_1 (first);
++    }
+ }
+ 
+ /* See whether a single set SET is a noop.  */
+@@ -660,30 +666,43 @@
+ 
+ /* The maximum number of uses of a register we can keep track of to
+    replace them with reg+reg addressing.  */
+-#define RELOAD_COMBINE_MAX_USES 6
++#define RELOAD_COMBINE_MAX_USES 16
+ 
+-/* INSN is the insn where a register has been used, and USEP points to the
+-   location of the register within the rtl.  */
+-struct reg_use { rtx insn, *usep; };
++/* Describes a recorded use of a register.  */
++struct reg_use
++{
++  /* The insn where a register has been used.  */
++  rtx insn;
++  /* Points to the memory reference enclosing the use, if any, NULL_RTX
++     otherwise.  */
++  rtx containing_mem;
++  /* Location of the register withing INSN.  */
++  rtx *usep;
++  /* The reverse uid of the insn.  */
++  int ruid;
++};
+ 
+ /* If the register is used in some unknown fashion, USE_INDEX is negative.
+    If it is dead, USE_INDEX is RELOAD_COMBINE_MAX_USES, and STORE_RUID
+-   indicates where it becomes live again.
++   indicates where it is first set or clobbered.
+    Otherwise, USE_INDEX is the index of the last encountered use of the
+-   register (which is first among these we have seen since we scan backwards),
+-   OFFSET contains the constant offset that is added to the register in
+-   all encountered uses, and USE_RUID indicates the first encountered, i.e.
+-   last, of these uses.
++   register (which is first among these we have seen since we scan backwards).
++   USE_RUID indicates the first encountered, i.e. last, of these uses.
++   If ALL_OFFSETS_MATCH is true, all encountered uses were inside a PLUS
++   with a constant offset; OFFSET contains this constant in that case.
+    STORE_RUID is always meaningful if we only want to use a value in a
+    register in a different place: it denotes the next insn in the insn
+-   stream (i.e. the last encountered) that sets or clobbers the register.  */
++   stream (i.e. the last encountered) that sets or clobbers the register.
++   REAL_STORE_RUID is similar, but clobbers are ignored when updating it.  */
+ static struct
+   {
+     struct reg_use reg_use[RELOAD_COMBINE_MAX_USES];
++    rtx offset;
+     int use_index;
+-    rtx offset;
+     int store_ruid;
++    int real_store_ruid;
+     int use_ruid;
++    bool all_offsets_match;
+   } reg_state[FIRST_PSEUDO_REGISTER];
+ 
+ /* Reverse linear uid.  This is increased in reload_combine while scanning
+@@ -691,42 +710,548 @@
+    and the store_ruid / use_ruid fields in reg_state.  */
+ static int reload_combine_ruid;
+ 
++/* The RUID of the last label we encountered in reload_combine.  */
++static int last_label_ruid;
++
++/* The RUID of the last jump we encountered in reload_combine.  */
++static int last_jump_ruid;
++
++/* The register numbers of the first and last index register.  A value of
++   -1 in LAST_INDEX_REG indicates that we've previously computed these
++   values and found no suitable index registers.  */
++static int first_index_reg = -1;
++static int last_index_reg;
++
+ #define LABEL_LIVE(LABEL) \
+   (label_live[CODE_LABEL_NUMBER (LABEL) - min_labelno])
+ 
++/* Subroutine of reload_combine_split_ruids, called to fix up a single
++   ruid pointed to by *PRUID if it is higher than SPLIT_RUID.  */
++
++static inline void
++reload_combine_split_one_ruid (int *pruid, int split_ruid)
++{
++  if (*pruid > split_ruid)
++    (*pruid)++;
++}
++
++/* Called when we insert a new insn in a position we've already passed in
++   the scan.  Examine all our state, increasing all ruids that are higher
++   than SPLIT_RUID by one in order to make room for a new insn.  */
++
++static void
++reload_combine_split_ruids (int split_ruid)
++{
++  unsigned i;
++
++  reload_combine_split_one_ruid (&reload_combine_ruid, split_ruid);
++  reload_combine_split_one_ruid (&last_label_ruid, split_ruid);
++  reload_combine_split_one_ruid (&last_jump_ruid, split_ruid);
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    {
++      int j, idx = reg_state[i].use_index;
++      reload_combine_split_one_ruid (&reg_state[i].use_ruid, split_ruid);
++      reload_combine_split_one_ruid (&reg_state[i].store_ruid, split_ruid);
++      reload_combine_split_one_ruid (&reg_state[i].real_store_ruid,
++				     split_ruid);
++      if (idx < 0)
++	continue;
++      for (j = idx; j < RELOAD_COMBINE_MAX_USES; j++)
++	{
++	  reload_combine_split_one_ruid (&reg_state[i].reg_use[j].ruid,
++					 split_ruid);
++	}
++    }
++}
++
++/* Called when we are about to rescan a previously encountered insn with
++   reload_combine_note_use after modifying some part of it.  This clears all
++   information about uses in that particular insn.  */
++
++static void
++reload_combine_purge_insn_uses (rtx insn)
++{
++  unsigned i;
++
++  for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
++    {
++      int j, k, idx = reg_state[i].use_index;
++      if (idx < 0)
++	continue;
++      j = k = RELOAD_COMBINE_MAX_USES;
++      while (j-- > idx)
++	{
++	  if (reg_state[i].reg_use[j].insn != insn)
++	    {
++	      k--;
++	      if (k != j)
++		reg_state[i].reg_use[k] = reg_state[i].reg_use[j];
++	    }
++	}
++      reg_state[i].use_index = k;
++    }
++}
++
++/* Called when we need to forget about all uses of REGNO after an insn
++   which is identified by RUID.  */
++
++static void
++reload_combine_purge_reg_uses_after_ruid (unsigned regno, int ruid)
++{
++  int j, k, idx = reg_state[regno].use_index;
++  if (idx < 0)
++    return;
++  j = k = RELOAD_COMBINE_MAX_USES;
++  while (j-- > idx)
++    {
++      if (reg_state[regno].reg_use[j].ruid >= ruid)
++	{
++	  k--;
++	  if (k != j)
++	    reg_state[regno].reg_use[k] = reg_state[regno].reg_use[j];
++	}
++    }
++  reg_state[regno].use_index = k;
++}
++
++/* Find the use of REGNO with the ruid that is highest among those
++   lower than RUID_LIMIT, and return it if it is the only use of this
++   reg in the insn.  Return NULL otherwise.  */
++
++static struct reg_use *
++reload_combine_closest_single_use (unsigned regno, int ruid_limit)
++{
++  int i, best_ruid = 0;
++  int use_idx = reg_state[regno].use_index;
++  struct reg_use *retval;
++
++  if (use_idx < 0)
++    return NULL;
++  retval = NULL;
++  for (i = use_idx; i < RELOAD_COMBINE_MAX_USES; i++)
++    {
++      struct reg_use *use = reg_state[regno].reg_use + i; 
++      int this_ruid = use->ruid;
++      if (this_ruid >= ruid_limit)
++	continue;
++      if (this_ruid > best_ruid)
++	{
++	  best_ruid = this_ruid;
++	  retval = use;
++	}
++      else if (this_ruid == best_ruid)
++	retval = NULL;
++    }
++  if (last_label_ruid >= best_ruid)
++    return NULL;
++  return retval;
++}
++
++/* After we've moved an add insn, fix up any debug insns that occur
++   between the old location of the add and the new location.  REG is
++   the destination register of the add insn; REPLACEMENT is the
++   SET_SRC of the add.  FROM and TO specify the range in which we
++   should make this change on debug insns.  */
++
++static void
++fixup_debug_insns (rtx reg, rtx replacement, rtx from, rtx to)
++{
++  rtx insn;
++  for (insn = from; insn != to; insn = NEXT_INSN (insn))
++    {
++      rtx t;
++
++      if (!DEBUG_INSN_P (insn))
++	continue;
++      
++      t = INSN_VAR_LOCATION_LOC (insn);
++      t = simplify_replace_rtx (t, reg, replacement);
++      validate_change (insn, &INSN_VAR_LOCATION_LOC (insn), t, 0);
++    }
++}
++
++/* Subroutine of reload_combine_recognize_const_pattern.  Try to replace REG
++   with SRC in the insn described by USE, taking costs into account.  Return
++   true if we made the replacement.  */
++
++static bool
++try_replace_in_use (struct reg_use *use, rtx reg, rtx src)
++{
++  rtx use_insn = use->insn;
++  rtx mem = use->containing_mem;
++  bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (use_insn));
++
++  if (mem != NULL_RTX)
++    {
++      addr_space_t as = MEM_ADDR_SPACE (mem);
++      rtx oldaddr = XEXP (mem, 0);
++      rtx newaddr = NULL_RTX;
++      int old_cost = address_cost (oldaddr, GET_MODE (mem), as, speed);
++      int new_cost;
++
++      newaddr = simplify_replace_rtx (oldaddr, reg, src);
++      if (memory_address_addr_space_p (GET_MODE (mem), newaddr, as))
++	{
++	  XEXP (mem, 0) = newaddr;
++	  new_cost = address_cost (newaddr, GET_MODE (mem), as, speed);
++	  XEXP (mem, 0) = oldaddr;
++	  if (new_cost <= old_cost
++	      && validate_change (use_insn,
++				  &XEXP (mem, 0), newaddr, 0))
++	    return true;
++	}
++    }
++  else
++    {
++      rtx new_set = single_set (use_insn);
++      if (new_set
++	  && REG_P (SET_DEST (new_set))
++	  && GET_CODE (SET_SRC (new_set)) == PLUS
++	  && REG_P (XEXP (SET_SRC (new_set), 0))
++	  && CONSTANT_P (XEXP (SET_SRC (new_set), 1)))
++	{
++	  rtx new_src;
++	  int old_cost = rtx_cost (SET_SRC (new_set), SET, speed);
++
++	  gcc_assert (rtx_equal_p (XEXP (SET_SRC (new_set), 0), reg));
++	  new_src = simplify_replace_rtx (SET_SRC (new_set), reg, src);
++
++	  if (rtx_cost (new_src, SET, speed) <= old_cost
++	      && validate_change (use_insn, &SET_SRC (new_set),
++				  new_src, 0))
++	    return true;
++	}
++    }
++  return false;
++}
++
++/* Called by reload_combine when scanning INSN.  This function tries to detect
++   patterns where a constant is added to a register, and the result is used
++   in an address.
++   Return true if no further processing is needed on INSN; false if it wasn't
++   recognized and should be handled normally.  */
++
++static bool
++reload_combine_recognize_const_pattern (rtx insn)
++{
++  int from_ruid = reload_combine_ruid;
++  rtx set, pat, reg, src, addreg;
++  unsigned int regno;
++  struct reg_use *use;
++  bool must_move_add;
++  rtx add_moved_after_insn = NULL_RTX;
++  int add_moved_after_ruid = 0;
++  int clobbered_regno = -1;
++
++  set = single_set (insn);
++  if (set == NULL_RTX)
++    return false;
++
++  reg = SET_DEST (set);
++  src = SET_SRC (set);
++  if (!REG_P (reg)
++      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1
++      || GET_MODE (reg) != Pmode
++      || reg == stack_pointer_rtx)
++    return false;
++
++  regno = REGNO (reg);
++
++  /* We look for a REG1 = REG2 + CONSTANT insn, followed by either
++     uses of REG1 inside an address, or inside another add insn.  If
++     possible and profitable, merge the addition into subsequent
++     uses.  */
++  if (GET_CODE (src) != PLUS
++      || !REG_P (XEXP (src, 0))
++      || !CONSTANT_P (XEXP (src, 1)))
++    return false;
++
++  addreg = XEXP (src, 0);
++  must_move_add = rtx_equal_p (reg, addreg);
++
++  pat = PATTERN (insn);
++  if (must_move_add && set != pat)
++    {
++      /* We have to be careful when moving the add; apart from the
++	 single_set there may also be clobbers.  Recognize one special
++	 case, that of one clobber alongside the set (likely a clobber
++	 of the CC register).  */
++      gcc_assert (GET_CODE (PATTERN (insn)) == PARALLEL);
++      if (XVECLEN (pat, 0) != 2 || XVECEXP (pat, 0, 0) != set
++	  || GET_CODE (XVECEXP (pat, 0, 1)) != CLOBBER
++	  || !REG_P (XEXP (XVECEXP (pat, 0, 1), 0)))
++	return false;
++      clobbered_regno = REGNO (XEXP (XVECEXP (pat, 0, 1), 0));
++    }
++
++  do
++    {
++      use = reload_combine_closest_single_use (regno, from_ruid);
++
++      if (use)
++	/* Start the search for the next use from here.  */
++	from_ruid = use->ruid;
++
++      if (use && GET_MODE (*use->usep) == Pmode)
++	{
++	  bool delete_add = false;
++	  rtx use_insn = use->insn;
++	  int use_ruid = use->ruid;
++
++	  /* Avoid moving the add insn past a jump.  */
++	  if (must_move_add && use_ruid <= last_jump_ruid)
++	    break;
++
++	  /* If the add clobbers another hard reg in parallel, don't move
++	     it past a real set of this hard reg.  */
++	  if (must_move_add && clobbered_regno >= 0
++	      && reg_state[clobbered_regno].real_store_ruid >= use_ruid)
++	    break;
++
++	  gcc_assert (reg_state[regno].store_ruid <= use_ruid);
++	  /* Avoid moving a use of ADDREG past a point where it is stored.  */
++	  if (reg_state[REGNO (addreg)].store_ruid > use_ruid)
++	    break;
++
++	  /* We also must not move the addition past an insn that sets
++	     the same register, unless we can combine two add insns.  */
++	  if (must_move_add && reg_state[regno].store_ruid == use_ruid)
++	    {
++	      if (use->containing_mem == NULL_RTX)
++		delete_add = true;
++	      else
++		break;
++	    }
++
++	  if (try_replace_in_use (use, reg, src))
++	    {
++	      reload_combine_purge_insn_uses (use_insn);
++	      reload_combine_note_use (&PATTERN (use_insn), use_insn,
++				       use_ruid, NULL_RTX);
++
++	      if (delete_add)
++		{
++		  fixup_debug_insns (reg, src, insn, use_insn);
++		  delete_insn (insn);
++		  return true;
++		}
++	      if (must_move_add)
++		{
++		  add_moved_after_insn = use_insn;
++		  add_moved_after_ruid = use_ruid;
++		}
++	      continue;
++	    }
++	}
++      /* If we get here, we couldn't handle this use.  */
++      if (must_move_add)
++	break;
++    }
++  while (use);
++
++  if (!must_move_add || add_moved_after_insn == NULL_RTX)
++    /* Process the add normally.  */
++    return false;
++
++  fixup_debug_insns (reg, src, insn, add_moved_after_insn);
++
++  reorder_insns (insn, insn, add_moved_after_insn);
++  reload_combine_purge_reg_uses_after_ruid (regno, add_moved_after_ruid);
++  reload_combine_split_ruids (add_moved_after_ruid - 1);
++  reload_combine_note_use (&PATTERN (insn), insn,
++			   add_moved_after_ruid, NULL_RTX);
++  reg_state[regno].store_ruid = add_moved_after_ruid;
++
++  return true;
++}
++
++/* Called by reload_combine when scanning INSN.  Try to detect a pattern we
++   can handle and improve.  Return true if no further processing is needed on
++   INSN; false if it wasn't recognized and should be handled normally.  */
++
++static bool
++reload_combine_recognize_pattern (rtx insn)
++{
++  rtx set, reg, src;
++  unsigned int regno;
++
++  set = single_set (insn);
++  if (set == NULL_RTX)
++    return false;
++
++  reg = SET_DEST (set);
++  src = SET_SRC (set);
++  if (!REG_P (reg)
++      || hard_regno_nregs[REGNO (reg)][GET_MODE (reg)] != 1)
++    return false;
++
++  regno = REGNO (reg);
++
++  /* Look for (set (REGX) (CONST_INT))
++     (set (REGX) (PLUS (REGX) (REGY)))
++     ...
++     ... (MEM (REGX)) ...
++     and convert it to
++     (set (REGZ) (CONST_INT))
++     ...
++     ... (MEM (PLUS (REGZ) (REGY)))... .
++
++     First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
++     and that we know all uses of REGX before it dies.
++     Also, explicitly check that REGX != REGY; our life information
++     does not yet show whether REGY changes in this insn.  */
++
++  if (GET_CODE (src) == PLUS
++      && reg_state[regno].all_offsets_match
++      && last_index_reg != -1
++      && REG_P (XEXP (src, 1))
++      && rtx_equal_p (XEXP (src, 0), reg)
++      && !rtx_equal_p (XEXP (src, 1), reg)
++      && reg_state[regno].use_index >= 0
++      && reg_state[regno].use_index < RELOAD_COMBINE_MAX_USES
++      && last_label_ruid < reg_state[regno].use_ruid)
++    {
++      rtx base = XEXP (src, 1);
++      rtx prev = prev_nonnote_insn (insn);
++      rtx prev_set = prev ? single_set (prev) : NULL_RTX;
++      rtx index_reg = NULL_RTX;
++      rtx reg_sum = NULL_RTX;
++      int i;
++
++      /* Now we need to set INDEX_REG to an index register (denoted as
++	 REGZ in the illustration above) and REG_SUM to the expression
++	 register+register that we want to use to substitute uses of REG
++	 (typically in MEMs) with.  First check REG and BASE for being
++	 index registers; we can use them even if they are not dead.  */
++      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
++	  || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
++				REGNO (base)))
++	{
++	  index_reg = reg;
++	  reg_sum = src;
++	}
++      else
++	{
++	  /* Otherwise, look for a free index register.  Since we have
++	     checked above that neither REG nor BASE are index registers,
++	     if we find anything at all, it will be different from these
++	     two registers.  */
++	  for (i = first_index_reg; i <= last_index_reg; i++)
++	    {
++	      if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], i)
++		  && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
++		  && reg_state[i].store_ruid <= reg_state[regno].use_ruid
++		  && (call_used_regs[i] || df_regs_ever_live_p (i))
++		  && (!frame_pointer_needed || i != HARD_FRAME_POINTER_REGNUM)
++		  && !fixed_regs[i] && !global_regs[i]
++		  && hard_regno_nregs[i][GET_MODE (reg)] == 1
++		  && targetm.hard_regno_scratch_ok (i))
++		{
++		  index_reg = gen_rtx_REG (GET_MODE (reg), i);
++		  reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
++		  break;
++		}
++	    }
++	}
++
++      /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
++	 (REGY), i.e. BASE, is not clobbered before the last use we'll
++	 create.  */
++      if (reg_sum
++	  && prev_set
++	  && CONST_INT_P (SET_SRC (prev_set))
++	  && rtx_equal_p (SET_DEST (prev_set), reg)
++	  && (reg_state[REGNO (base)].store_ruid
++	      <= reg_state[regno].use_ruid))
++	{
++	  /* Change destination register and, if necessary, the constant
++	     value in PREV, the constant loading instruction.  */
++	  validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
++	  if (reg_state[regno].offset != const0_rtx)
++	    validate_change (prev,
++			     &SET_SRC (prev_set),
++			     GEN_INT (INTVAL (SET_SRC (prev_set))
++				      + INTVAL (reg_state[regno].offset)),
++			     1);
++
++	  /* Now for every use of REG that we have recorded, replace REG
++	     with REG_SUM.  */
++	  for (i = reg_state[regno].use_index;
++	       i < RELOAD_COMBINE_MAX_USES; i++)
++	    validate_unshare_change (reg_state[regno].reg_use[i].insn,
++				     reg_state[regno].reg_use[i].usep,
++				     /* Each change must have its own
++					replacement.  */
++				     reg_sum, 1);
++
++	  if (apply_change_group ())
++	    {
++	      struct reg_use *lowest_ruid = NULL;
++
++	      /* For every new use of REG_SUM, we have to record the use
++		 of BASE therein, i.e. operand 1.  */
++	      for (i = reg_state[regno].use_index;
++		   i < RELOAD_COMBINE_MAX_USES; i++)
++		{
++		  struct reg_use *use = reg_state[regno].reg_use + i;
++		  reload_combine_note_use (&XEXP (*use->usep, 1), use->insn,
++					   use->ruid, use->containing_mem);
++		  if (lowest_ruid == NULL || use->ruid < lowest_ruid->ruid)
++		    lowest_ruid = use;
++		}
++
++	      fixup_debug_insns (reg, reg_sum, insn, lowest_ruid->insn);
++
++	      /* Delete the reg-reg addition.  */
++	      delete_insn (insn);
++
++	      if (reg_state[regno].offset != const0_rtx)
++		/* Previous REG_EQUIV / REG_EQUAL notes for PREV
++		   are now invalid.  */
++		remove_reg_equal_equiv_notes (prev);
++
++	      reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
++	      return true;
++	    }
++	}
++    }
++  return false;
++}
++
+ static void
+ reload_combine (void)
+ {
+-  rtx insn, set;
+-  int first_index_reg = -1;
+-  int last_index_reg = 0;
++  rtx insn, prev;
+   int i;
+   basic_block bb;
+   unsigned int r;
+-  int last_label_ruid;
+   int min_labelno, n_labels;
+   HARD_REG_SET ever_live_at_start, *label_live;
+ 
+-  /* If reg+reg can be used in offsetable memory addresses, the main chunk of
+-     reload has already used it where appropriate, so there is no use in
+-     trying to generate it now.  */
+-  if (double_reg_address_ok && INDEX_REG_CLASS != NO_REGS)
+-    return;
+-
+   /* To avoid wasting too much time later searching for an index register,
+      determine the minimum and maximum index register numbers.  */
+-  for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+-    if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
+-      {
+-	if (first_index_reg == -1)
+-	  first_index_reg = r;
+-
+-	last_index_reg = r;
+-      }
+-
+-  /* If no index register is available, we can quit now.  */
+-  if (first_index_reg == -1)
+-    return;
++  if (INDEX_REG_CLASS == NO_REGS)
++    last_index_reg = -1;
++  else if (first_index_reg == -1 && last_index_reg == 0)
++    {
++      for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
++	if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], r))
++	  {
++	    if (first_index_reg == -1)
++	      first_index_reg = r;
++
++	    last_index_reg = r;
++	  }
++
++      /* If no index register is available, we can quit now.  Set LAST_INDEX_REG
++	 to -1 so we'll know to quit early the next time we get here.  */
++      if (first_index_reg == -1)
++	{
++	  last_index_reg = -1;
++	  return;
++	}
++    }
+ 
+   /* Set up LABEL_LIVE and EVER_LIVE_AT_START.  The register lifetime
+      information is a bit fuzzy immediately after reload, but it's
+@@ -753,20 +1278,23 @@
+     }
+ 
+   /* Initialize last_label_ruid, reload_combine_ruid and reg_state.  */
+-  last_label_ruid = reload_combine_ruid = 0;
++  last_label_ruid = last_jump_ruid = reload_combine_ruid = 0;
+   for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
+     {
+-      reg_state[r].store_ruid = reload_combine_ruid;
++      reg_state[r].store_ruid = 0;
++      reg_state[r].real_store_ruid = 0;
+       if (fixed_regs[r])
+ 	reg_state[r].use_index = -1;
+       else
+ 	reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+     }
+ 
+-  for (insn = get_last_insn (); insn; insn = PREV_INSN (insn))
++  for (insn = get_last_insn (); insn; insn = prev)
+     {
+       rtx note;
+ 
++      prev = PREV_INSN (insn);
++
+       /* We cannot do our optimization across labels.  Invalidating all the use
+ 	 information we have would be costly, so we just note where the label
+ 	 is and then later disable any optimization that would cross it.  */
+@@ -777,141 +1305,17 @@
+ 	  if (! fixed_regs[r])
+ 	      reg_state[r].use_index = RELOAD_COMBINE_MAX_USES;
+ 
+-      if (! INSN_P (insn))
++      if (! NONDEBUG_INSN_P (insn))
+ 	continue;
+ 
+       reload_combine_ruid++;
+ 
+-      /* Look for (set (REGX) (CONST_INT))
+-	 (set (REGX) (PLUS (REGX) (REGY)))
+-	 ...
+-	 ... (MEM (REGX)) ...
+-	 and convert it to
+-	 (set (REGZ) (CONST_INT))
+-	 ...
+-	 ... (MEM (PLUS (REGZ) (REGY)))... .
+-
+-	 First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
+-	 and that we know all uses of REGX before it dies.
+-	 Also, explicitly check that REGX != REGY; our life information
+-	 does not yet show whether REGY changes in this insn.  */
+-      set = single_set (insn);
+-      if (set != NULL_RTX
+-	  && REG_P (SET_DEST (set))
+-	  && (hard_regno_nregs[REGNO (SET_DEST (set))]
+-			      [GET_MODE (SET_DEST (set))]
+-	      == 1)
+-	  && GET_CODE (SET_SRC (set)) == PLUS
+-	  && REG_P (XEXP (SET_SRC (set), 1))
+-	  && rtx_equal_p (XEXP (SET_SRC (set), 0), SET_DEST (set))
+-	  && !rtx_equal_p (XEXP (SET_SRC (set), 1), SET_DEST (set))
+-	  && last_label_ruid < reg_state[REGNO (SET_DEST (set))].use_ruid)
+-	{
+-	  rtx reg = SET_DEST (set);
+-	  rtx plus = SET_SRC (set);
+-	  rtx base = XEXP (plus, 1);
+-	  rtx prev = prev_nonnote_nondebug_insn (insn);
+-	  rtx prev_set = prev ? single_set (prev) : NULL_RTX;
+-	  unsigned int regno = REGNO (reg);
+-	  rtx index_reg = NULL_RTX;
+-	  rtx reg_sum = NULL_RTX;
+-
+-	  /* Now we need to set INDEX_REG to an index register (denoted as
+-	     REGZ in the illustration above) and REG_SUM to the expression
+-	     register+register that we want to use to substitute uses of REG
+-	     (typically in MEMs) with.  First check REG and BASE for being
+-	     index registers; we can use them even if they are not dead.  */
+-	  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS], regno)
+-	      || TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
+-				    REGNO (base)))
+-	    {
+-	      index_reg = reg;
+-	      reg_sum = plus;
+-	    }
+-	  else
+-	    {
+-	      /* Otherwise, look for a free index register.  Since we have
+-		 checked above that neither REG nor BASE are index registers,
+-		 if we find anything at all, it will be different from these
+-		 two registers.  */
+-	      for (i = first_index_reg; i <= last_index_reg; i++)
+-		{
+-		  if (TEST_HARD_REG_BIT (reg_class_contents[INDEX_REG_CLASS],
+-					 i)
+-		      && reg_state[i].use_index == RELOAD_COMBINE_MAX_USES
+-		      && reg_state[i].store_ruid <= reg_state[regno].use_ruid
+-		      && hard_regno_nregs[i][GET_MODE (reg)] == 1)
+-		    {
+-		      index_reg = gen_rtx_REG (GET_MODE (reg), i);
+-		      reg_sum = gen_rtx_PLUS (GET_MODE (reg), index_reg, base);
+-		      break;
+-		    }
+-		}
+-	    }
+-
+-	  /* Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
+-	     (REGY), i.e. BASE, is not clobbered before the last use we'll
+-	     create.  */
+-	  if (reg_sum
+-	      && prev_set
+-	      && CONST_INT_P (SET_SRC (prev_set))
+-	      && rtx_equal_p (SET_DEST (prev_set), reg)
+-	      && reg_state[regno].use_index >= 0
+-	      && (reg_state[REGNO (base)].store_ruid
+-		  <= reg_state[regno].use_ruid))
+-	    {
+-	      int i;
+-
+-	      /* Change destination register and, if necessary, the constant
+-		 value in PREV, the constant loading instruction.  */
+-	      validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
+-	      if (reg_state[regno].offset != const0_rtx)
+-		validate_change (prev,
+-				 &SET_SRC (prev_set),
+-				 GEN_INT (INTVAL (SET_SRC (prev_set))
+-					  + INTVAL (reg_state[regno].offset)),
+-				 1);
+-
+-	      /* Now for every use of REG that we have recorded, replace REG
+-		 with REG_SUM.  */
+-	      for (i = reg_state[regno].use_index;
+-		   i < RELOAD_COMBINE_MAX_USES; i++)
+-		validate_unshare_change (reg_state[regno].reg_use[i].insn,
+-				 	 reg_state[regno].reg_use[i].usep,
+-				 	 /* Each change must have its own
+-				    	    replacement.  */
+-				 	 reg_sum, 1);
+-
+-	      if (apply_change_group ())
+-		{
+-		  /* For every new use of REG_SUM, we have to record the use
+-		     of BASE therein, i.e. operand 1.  */
+-		  for (i = reg_state[regno].use_index;
+-		       i < RELOAD_COMBINE_MAX_USES; i++)
+-		    reload_combine_note_use
+-		      (&XEXP (*reg_state[regno].reg_use[i].usep, 1),
+-		       reg_state[regno].reg_use[i].insn);
+-
+-		  if (reg_state[REGNO (base)].use_ruid
+-		      > reg_state[regno].use_ruid)
+-		    reg_state[REGNO (base)].use_ruid
+-		      = reg_state[regno].use_ruid;
+-
+-		  /* Delete the reg-reg addition.  */
+-		  delete_insn (insn);
+-
+-		  if (reg_state[regno].offset != const0_rtx)
+-		    /* Previous REG_EQUIV / REG_EQUAL notes for PREV
+-		       are now invalid.  */
+-		    remove_reg_equal_equiv_notes (prev);
+-
+-		  reg_state[regno].use_index = RELOAD_COMBINE_MAX_USES;
+-		  reg_state[REGNO (index_reg)].store_ruid
+-		    = reload_combine_ruid;
+-		  continue;
+-		}
+-	    }
+-	}
++      if (control_flow_insn_p (insn))
++	last_jump_ruid = reload_combine_ruid;
++
++      if (reload_combine_recognize_const_pattern (insn)
++	  || reload_combine_recognize_pattern (insn))
++	continue;
+ 
+       note_stores (PATTERN (insn), reload_combine_note_store, NULL);
+ 
+@@ -967,7 +1371,8 @@
+ 	      reg_state[i].use_index = -1;
+ 	}
+ 
+-      reload_combine_note_use (&PATTERN (insn), insn);
++      reload_combine_note_use (&PATTERN (insn), insn,
++			       reload_combine_ruid, NULL_RTX);
+       for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
+ 	{
+ 	  if (REG_NOTE_KIND (note) == REG_INC
+@@ -976,6 +1381,7 @@
+ 	      int regno = REGNO (XEXP (note, 0));
+ 
+ 	      reg_state[regno].store_ruid = reload_combine_ruid;
++	      reg_state[regno].real_store_ruid = reload_combine_ruid;
+ 	      reg_state[regno].use_index = -1;
+ 	    }
+ 	}
+@@ -985,8 +1391,8 @@
+ }
+ 
+ /* Check if DST is a register or a subreg of a register; if it is,
+-   update reg_state[regno].store_ruid and reg_state[regno].use_index
+-   accordingly.  Called via note_stores from reload_combine.  */
++   update store_ruid, real_store_ruid and use_index in the reg_state
++   structure accordingly.  Called via note_stores from reload_combine.  */
+ 
+ static void
+ reload_combine_note_store (rtx dst, const_rtx set, void *data ATTRIBUTE_UNUSED)
+@@ -1010,14 +1416,14 @@
+   /* note_stores might have stripped a STRICT_LOW_PART, so we have to be
+      careful with registers / register parts that are not full words.
+      Similarly for ZERO_EXTRACT.  */
+-  if (GET_CODE (set) != SET
+-      || GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
++  if (GET_CODE (SET_DEST (set)) == ZERO_EXTRACT
+       || GET_CODE (SET_DEST (set)) == STRICT_LOW_PART)
+     {
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].use_index = -1;
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
++	  reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	}
+     }
+   else
+@@ -1025,6 +1431,8 @@
+       for (i = hard_regno_nregs[regno][mode] - 1 + regno; i >= regno; i--)
+ 	{
+ 	  reg_state[i].store_ruid = reload_combine_ruid;
++	  if (GET_CODE (set) == SET)
++	    reg_state[i].real_store_ruid = reload_combine_ruid;
+ 	  reg_state[i].use_index = RELOAD_COMBINE_MAX_USES;
+ 	}
+     }
+@@ -1035,7 +1443,7 @@
+    *XP is the pattern of INSN, or a part of it.
+    Called from reload_combine, and recursively by itself.  */
+ static void
+-reload_combine_note_use (rtx *xp, rtx insn)
++reload_combine_note_use (rtx *xp, rtx insn, int ruid, rtx containing_mem)
+ {
+   rtx x = *xp;
+   enum rtx_code code = x->code;
+@@ -1048,7 +1456,7 @@
+     case SET:
+       if (REG_P (SET_DEST (x)))
+ 	{
+-	  reload_combine_note_use (&SET_SRC (x), insn);
++	  reload_combine_note_use (&SET_SRC (x), insn, ruid, NULL_RTX);
+ 	  return;
+ 	}
+       break;
+@@ -1104,6 +1512,11 @@
+ 	    return;
+ 	  }
+ 
++	/* We may be called to update uses in previously seen insns.
++	   Don't add uses beyond the last store we saw.  */
++	if (ruid < reg_state[regno].store_ruid)
++	  return;
++
+ 	/* If this register is already used in some unknown fashion, we
+ 	   can't do anything.
+ 	   If we decrement the index from zero to -1, we can't store more
+@@ -1112,29 +1525,34 @@
+ 	if (use_index < 0)
+ 	  return;
+ 
+-	if (use_index != RELOAD_COMBINE_MAX_USES - 1)
+-	  {
+-	    /* We have found another use for a register that is already
+-	       used later.  Check if the offsets match; if not, mark the
+-	       register as used in an unknown fashion.  */
+-	    if (! rtx_equal_p (offset, reg_state[regno].offset))
+-	      {
+-		reg_state[regno].use_index = -1;
+-		return;
+-	      }
+-	  }
+-	else
++	if (use_index == RELOAD_COMBINE_MAX_USES - 1)
+ 	  {
+ 	    /* This is the first use of this register we have seen since we
+ 	       marked it as dead.  */
+ 	    reg_state[regno].offset = offset;
+-	    reg_state[regno].use_ruid = reload_combine_ruid;
+-	  }
++	    reg_state[regno].all_offsets_match = true;
++	    reg_state[regno].use_ruid = ruid;
++	  }
++	else
++	  {
++	    if (reg_state[regno].use_ruid > ruid)
++	      reg_state[regno].use_ruid = ruid;
++
++	    if (! rtx_equal_p (offset, reg_state[regno].offset))
++	      reg_state[regno].all_offsets_match = false;
++	  }
++
+ 	reg_state[regno].reg_use[use_index].insn = insn;
++	reg_state[regno].reg_use[use_index].ruid = ruid;
++	reg_state[regno].reg_use[use_index].containing_mem = containing_mem;
+ 	reg_state[regno].reg_use[use_index].usep = xp;
+ 	return;
+       }
+ 
++    case MEM:
++      containing_mem = x;
++      break;
++
+     default:
+       break;
+     }
+@@ -1144,11 +1562,12 @@
+   for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
+     {
+       if (fmt[i] == 'e')
+-	reload_combine_note_use (&XEXP (x, i), insn);
++	reload_combine_note_use (&XEXP (x, i), insn, ruid, containing_mem);
+       else if (fmt[i] == 'E')
+ 	{
+ 	  for (j = XVECLEN (x, i) - 1; j >= 0; j--)
+-	    reload_combine_note_use (&XVECEXP (x, i, j), insn);
++	    reload_combine_note_use (&XVECEXP (x, i, j), insn, ruid,
++				     containing_mem);
+ 	}
+     }
+ }
+@@ -1196,9 +1615,10 @@
+    while REG is known to already have value (SYM + offset).
+    This function tries to change INSN into an add instruction
+    (set (REG) (plus (REG) (OFF - offset))) using the known value.
+-   It also updates the information about REG's known value.  */
++   It also updates the information about REG's known value.
++   Return true if we made a change.  */
+ 
+-static void
++static bool
+ move2add_use_add2_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1207,6 +1627,7 @@
+   rtx new_src = gen_int_mode (INTVAL (off) - reg_offset[regno],
+ 			      GET_MODE (reg));
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
++  bool changed = false;
+ 
+   /* (set (reg) (plus (reg) (const_int 0))) is not canonical;
+      use (set (reg) (reg)) instead.
+@@ -1221,13 +1642,13 @@
+ 	 (reg)), would be discarded.  Maybe we should
+ 	 try a truncMN pattern?  */
+       if (INTVAL (off) == reg_offset [regno])
+-	validate_change (insn, &SET_SRC (pat), reg, 0);
++	changed = validate_change (insn, &SET_SRC (pat), reg, 0);
+     }
+   else if (rtx_cost (new_src, PLUS, speed) < rtx_cost (src, SET, speed)
+ 	   && have_add2_insn (reg, new_src))
+     {
+       rtx tem = gen_rtx_PLUS (GET_MODE (reg), reg, new_src);
+-      validate_change (insn, &SET_SRC (pat), tem, 0);
++      changed = validate_change (insn, &SET_SRC (pat), tem, 0);
+     }
+   else if (sym == NULL_RTX && GET_MODE (reg) != BImode)
+     {
+@@ -1252,8 +1673,9 @@
+ 			     gen_rtx_STRICT_LOW_PART (VOIDmode,
+ 						      narrow_reg),
+ 			     narrow_src);
+-	      if (validate_change (insn, &PATTERN (insn),
+-				   new_set, 0))
++	      changed = validate_change (insn, &PATTERN (insn),
++					 new_set, 0);
++	      if (changed)
+ 		break;
+ 	    }
+ 	}
+@@ -1263,6 +1685,7 @@
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
++  return changed;
+ }
+ 
+ 
+@@ -1272,9 +1695,10 @@
+    value (SYM + offset) and change INSN into an add instruction
+    (set (REG) (plus (the found register) (OFF - offset))) if such
+    a register is found.  It also updates the information about
+-   REG's known value.  */
++   REG's known value.
++   Return true iff we made a change.  */
+ 
+-static void
++static bool
+ move2add_use_add3_insn (rtx reg, rtx sym, rtx off, rtx insn)
+ {
+   rtx pat = PATTERN (insn);
+@@ -1284,6 +1708,7 @@
+   int min_regno;
+   bool speed = optimize_bb_for_speed_p (BLOCK_FOR_INSN (insn));
+   int i;
++  bool changed = false;
+ 
+   for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
+     if (reg_set_luid[i] > move2add_last_label_luid
+@@ -1328,20 +1753,25 @@
+ 				      GET_MODE (reg));
+ 	  tem = gen_rtx_PLUS (GET_MODE (reg), tem, new_src);
+ 	}
+-      validate_change (insn, &SET_SRC (pat), tem, 0);
++      if (validate_change (insn, &SET_SRC (pat), tem, 0))
++	changed = true;
+     }
+   reg_set_luid[regno] = move2add_luid;
+   reg_base_reg[regno] = -1;
+   reg_mode[regno] = GET_MODE (reg);
+   reg_symbol_ref[regno] = sym;
+   reg_offset[regno] = INTVAL (off);
++  return changed;
+ }
+ 
+-static void
++/* Convert move insns with constant inputs to additions if they are cheaper.
++   Return true if any changes were made.  */
++static bool
+ reload_cse_move2add (rtx first)
+ {
+   int i;
+   rtx insn;
++  bool changed = false;
+ 
+   for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--)
+     {
+@@ -1402,7 +1832,7 @@
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] == NULL_RTX)
+ 		{
+-		  move2add_use_add2_insn (reg, NULL_RTX, src, insn);
++		  changed |= move2add_use_add2_insn (reg, NULL_RTX, src, insn);
+ 		  continue;
+ 		}
+ 
+@@ -1463,6 +1893,7 @@
+ 			}
+ 		      if (success)
+ 			delete_insn (insn);
++		      changed |= success;
+ 		      insn = next;
+ 		      reg_mode[regno] = GET_MODE (reg);
+ 		      reg_offset[regno] =
+@@ -1508,12 +1939,12 @@
+ 		  && reg_base_reg[regno] < 0
+ 		  && reg_symbol_ref[regno] != NULL_RTX
+ 		  && rtx_equal_p (sym, reg_symbol_ref[regno]))
+-		move2add_use_add2_insn (reg, sym, off, insn);
++		changed |= move2add_use_add2_insn (reg, sym, off, insn);
+ 
+ 	      /* Otherwise, we have to find a register whose value is sum
+ 		 of sym and some constant value.  */
+ 	      else
+-		move2add_use_add3_insn (reg, sym, off, insn);
++		changed |= move2add_use_add3_insn (reg, sym, off, insn);
+ 
+ 	      continue;
+ 	    }
+@@ -1568,6 +1999,7 @@
+ 	    }
+ 	}
+     }
++  return changed;
+ }
+ 
+ /* SET is a SET or CLOBBER that sets DST.  DATA is the insn which
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99440.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99440.patch
new file mode 100644
index 0000000000..b7a28de658
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99440.patch
@@ -0,0 +1,78 @@
+2010-11-24  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	2010-07-08  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	PR bootstrap/44768
+
+	* cfgexpand.c (estimated_stack_frame_size): Make self-contained
+	with respect to current_function_decl. Pass decl of the function.
+	* tree-inline.h (estimated_stack_frame_size): Adjust prototype.
+	* ipa-inline.c (compute_inline_parameters): Pass decl to
+	estimated_stack_frame_size.
+
+=== modified file 'gcc/cfgexpand.c'
+--- old/gcc/cfgexpand.c	2010-10-04 00:50:43 +0000
++++ new/gcc/cfgexpand.c	2010-11-24 08:43:48 +0000
+@@ -1248,8 +1248,8 @@
+   stack_vars_alloc = stack_vars_num = 0;
+ }
+ 
+-/* Make a fair guess for the size of the stack frame of the current
+-   function.  This doesn't have to be exact, the result is only used
++/* Make a fair guess for the size of the stack frame of the decl
++   passed.  This doesn't have to be exact, the result is only used
+    in the inline heuristics.  So we don't want to run the full stack
+    var packing algorithm (which is quadratic in the number of stack
+    vars).  Instead, we calculate the total size of all stack vars.
+@@ -1257,11 +1257,14 @@
+    vars doesn't happen very often.  */
+ 
+ HOST_WIDE_INT
+-estimated_stack_frame_size (void)
++estimated_stack_frame_size (tree decl)
+ {
+   HOST_WIDE_INT size = 0;
+   size_t i;
+   tree t, outer_block = DECL_INITIAL (current_function_decl);
++  tree old_cur_fun_decl = current_function_decl;
++  current_function_decl = decl;
++  push_cfun (DECL_STRUCT_FUNCTION (decl));
+ 
+   init_vars_expansion ();
+ 
+@@ -1284,7 +1287,8 @@
+       size += account_stack_vars ();
+       fini_vars_expansion ();
+     }
+-
++  pop_cfun ();
++  current_function_decl = old_cur_fun_decl;
+   return size;
+ }
+ 
+
+=== modified file 'gcc/ipa-inline.c'
+--- old/gcc/ipa-inline.c	2010-06-30 21:30:12 +0000
++++ new/gcc/ipa-inline.c	2010-11-24 08:43:48 +0000
+@@ -1967,7 +1967,7 @@
+ 
+   /* Estimate the stack size for the function.  But not at -O0
+      because estimated_stack_frame_size is a quadratic problem.  */
+-  self_stack_size = optimize ? estimated_stack_frame_size () : 0;
++  self_stack_size = optimize ? estimated_stack_frame_size (node->decl) : 0;
+   inline_summary (node)->estimated_self_stack_size = self_stack_size;
+   node->global.estimated_stack_size = self_stack_size;
+   node->global.stack_frame_offset = 0;
+
+=== modified file 'gcc/tree-inline.h'
+--- old/gcc/tree-inline.h	2009-09-14 18:18:58 +0000
++++ new/gcc/tree-inline.h	2010-11-24 08:43:48 +0000
+@@ -187,6 +187,6 @@
+ extern tree remap_type (tree type, copy_body_data *id);
+ extern gimple_seq copy_gimple_seq_and_replace_locals (gimple_seq seq);
+ 
+-extern HOST_WIDE_INT estimated_stack_frame_size (void);
++extern HOST_WIDE_INT estimated_stack_frame_size (tree);
+ 
+ #endif /* GCC_TREE_INLINE_H */
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99441.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99441.patch
new file mode 100644
index 0000000000..5495b8d80a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99441.patch
@@ -0,0 +1,33 @@
+2010-11-25  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-10-28  Andrew Stubbs  <ams@codesourcery.com>
+
+	gcc/
+	* config/arm/arm.c (const_ok_for_arm): Support 0xXY00XY00 pattern
+	constants in thumb2.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-11-11 11:50:33 +0000
++++ new/gcc/config/arm/arm.c	2010-12-10 15:30:47 +0000
+@@ -2340,11 +2340,17 @@
+     {
+       HOST_WIDE_INT v;
+ 
+-      /* Allow repeated pattern.  */
++      /* Allow repeated patterns 0x00XY00XY or 0xXYXYXYXY.  */
+       v = i & 0xff;
+       v |= v << 16;
+       if (i == v || i == (v | (v << 8)))
+ 	return TRUE;
++
++      /* Allow repeated pattern 0xXY00XY00.  */
++      v = i & 0xff00;
++      v |= v << 16;
++      if (i == v)
++	return TRUE;
+     }
+ 
+   return FALSE;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99442.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99442.patch
new file mode 100644
index 0000000000..62c44784b6
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99442.patch
@@ -0,0 +1,23 @@
+2010-11-24  Maxim Kuvyrkov  <maxim@codesourcery.com>
+
+	gcc/
+	* loop-iv.c (get_biv_step): Workaround loop analysis ICE.
+
+=== modified file 'gcc/loop-iv.c'
+--- old/gcc/loop-iv.c	2009-11-25 10:55:54 +0000
++++ new/gcc/loop-iv.c	2010-12-10 15:32:04 +0000
+@@ -796,6 +796,13 @@
+ 		       outer_step))
+     return false;
+ 
++  /* CSL local: workaround get_biv_step_1() inability to handle DU
++     chains originating at sets of subregs.  Such subregs are introduced
++     by Tom's extension elimination pass.  For upstream duscussion see
++     http://gcc.gnu.org/ml/gcc/2010-11/msg00552.html .  */
++  if (!((*inner_mode == *outer_mode) != (*extend != UNKNOWN)))
++    return false;
++
+   gcc_assert ((*inner_mode == *outer_mode) != (*extend != UNKNOWN));
+   gcc_assert (*inner_mode != *outer_mode || *outer_step == const0_rtx);
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99443.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99443.patch
new file mode 100644
index 0000000000..802c3816f1
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99443.patch
@@ -0,0 +1,873 @@
+2010-11-26  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	* gcc/ee.c: New file.
+	* gcc/tree-pass.h (pass_ee): Declare.
+	* gcc/opts.c (decode_options): Set flag_ee at -O2.
+	* gcc/timevar.def (TV_EE): New timevar.
+	* gcc/common.opt (fextension-elimination): New option.
+	* gcc/Makefile.in (ee.o): New rule.
+	* gcc/passes.c (pass_ee): Add it.
+	* gcc/testsuite/gcc.dg/extend-4.c: New test.
+	* gcc/testsuite/gcc.dg/extend-1.c: New test.
+	* gcc/testsuite/gcc.dg/extend-2.c: New test.
+	* gcc/testsuite/gcc.dg/extend-2-64.c: New test.
+	* gcc/testsuite/gcc.dg/extend-3.c: New test.
+
+=== modified file 'gcc/Makefile.in'
+--- old/gcc/Makefile.in	2010-11-16 18:05:53 +0000
++++ new/gcc/Makefile.in	2010-12-10 15:33:37 +0000
+@@ -1194,6 +1194,7 @@
+ 	dse.o \
+ 	dwarf2asm.o \
+ 	dwarf2out.o \
++	ee.o \
+ 	ebitmap.o \
+ 	emit-rtl.o \
+ 	et-forest.o \
+@@ -2965,6 +2966,11 @@
+ web.o : web.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
+    hard-reg-set.h $(FLAGS_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \
+    $(DF_H) $(OBSTACK_H) $(TIMEVAR_H) $(TREE_PASS_H)
++ee.o : ee.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
++   hard-reg-set.h $(FLAGS_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h \
++   $(DF_H) $(TIMEVAR_H) tree-pass.h $(RECOG_H) $(EXPR_H) \
++   $(REGS_H) $(TREE_H) $(TM_P_H) insn-config.h $(INSN_ATTR_H) $(TOPLEV_H) $(DIAGNOSTIC_CORE_H) \
++   $(TARGET_H) $(OPTABS_H) insn-codes.h rtlhooks-def.h $(PARAMS_H) $(CGRAPH_H)
+ gcse.o : gcse.c $(CONFIG_H) $(SYSTEM_H) coretypes.h $(TM_H) $(RTL_H) \
+    $(REGS_H) hard-reg-set.h $(FLAGS_H) $(REAL_H) insn-config.h $(GGC_H) \
+    $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) $(FUNCTION_H) output.h $(TOPLEV_H) \
+
+=== modified file 'gcc/common.opt'
+--- old/gcc/common.opt	2010-11-04 12:43:52 +0000
++++ new/gcc/common.opt	2010-12-10 15:33:37 +0000
+@@ -496,6 +496,10 @@
+ Common Report Var(flag_early_inlining) Init(1) Optimization
+ Perform early inlining
+ 
++fextension-elimination
++Common Report Var(flag_ee) Init(0) Optimization
++Perform extension elimination
++
+ feliminate-dwarf2-dups
+ Common Report Var(flag_eliminate_dwarf2_dups)
+ Perform DWARF2 duplicate elimination
+
+=== added file 'gcc/ee.c'
+--- old/gcc/ee.c	1970-01-01 00:00:00 +0000
++++ new/gcc/ee.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,662 @@
++/* Redundant extension elimination 
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by Tom de Vries (tom@codesourcery.com)
++
++This file is part of GCC.
++
++GCC is free software; you can redistribute it and/or modify it under
++the terms of the GNU General Public License as published by the Free
++Software Foundation; either version 3, or (at your option) any later
++version.
++
++GCC is distributed in the hope that it will be useful, but WITHOUT ANY
++WARRANTY; without even the implied warranty of MERCHANTABILITY or
++FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++for more details.
++
++You should have received a copy of the GNU General Public License
++along with GCC; see the file COPYING3.  If not see
++<http://www.gnu.org/licenses/>.  */
++
++/*
++
++  MOTIVATING EXAMPLE
++
++  The motivating example for this pass is:
++
++    void f(unsigned char *p, short s, int c, int *z)
++    {
++      if (c)
++        *z = 0;
++      *p ^= (unsigned char)s;
++    }
++
++  For MIPS, compilation results in the following insns.
++
++    (set (reg/v:SI 199)
++         (sign_extend:SI (subreg:HI (reg:SI 200) 2)))
++
++    ...
++
++    (set (reg:QI 203)
++         (subreg:QI (reg/v:SI 199) 3))
++
++  These insns are the only def and the only use of reg 199, each located in a
++  different bb.
++
++  The sign-extension preserves the lower half of reg 200 and copies them to 
++  reg 199, and the subreg use of reg 199 only reads the least significant byte.
++  The sign extension is therefore redundant (the extension part, not the copy 
++  part), and can safely be replaced with a regcopy from reg 200 to reg 199.
++
++
++  OTHER SIGN/ZERO EXTENSION ELIMINATION PASSES
++
++  There are other passes which eliminate sign/zero-extension: combine and
++  implicit_zee. Both attempt to eliminate extensions by combining them with
++  other instructions. The combine pass does this at bb level,
++  implicit_zee works at inter-bb level.
++
++  The combine pass combine an extension with either:
++  - all uses of the extension, or 
++  - all defs of the operand of the extension.
++  The implicit_zee pass only implements the latter.
++
++  For our motivating example, combine doesn't work since the def and the use of
++  reg 199 are in a different bb.
++
++  Implicit_zee does not work since it only combines an extension with the defs
++  of its operand.
++
++
++  INTENDED EFFECT
++
++  This pass works by removing sign/zero-extensions, or replacing them with
++  regcopies. The idea there is that the regcopy might be eliminated by a later
++  pass. In case the regcopy cannot be eliminated, it might at least be cheaper
++  than the extension.
++
++
++  IMPLEMENTATION
++
++  The pass scans twice over all instructions.
++
++  The first scan registers all uses of a reg in the biggest_use array. After
++  that first scan, the biggest_use array contains the size in bits of the
++  biggest use of each reg.
++
++  The second scan finds extensions, determines whether they are redundant based
++  on the biggest use, and deletes or replaces them.
++
++  In case that the src and dest reg of the replacement are not of the same size,
++  we do not replace with a normal regcopy, but with a truncate or with the copy
++  of a paradoxical subreg instead.
++
++
++  LIMITATIONS
++
++  The scope of the analysis is limited to an extension and its uses. The other
++  type of analysis (related to the defs of the operand of an extension) is not
++  done.
++
++  Furthermore, we do the analysis of biggest use per reg. So when determining
++  whether an extension is redundant, we take all uses of a the dest reg into
++  account, also the ones that are not uses of the extension. This could be
++  overcome by calculating the def-use chains and using those for analysis
++  instead.
++
++  Finally, during the analysis each insn is looked at in isolation. There is no
++  propagation of information during the analysis.  To overcome this limitation,
++  a backward iterative bit-level liveness analysis is needed.  */
++
++
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++#include "rtl.h"
++#include "tree.h"
++#include "tm_p.h"
++#include "flags.h"
++#include "regs.h"
++#include "hard-reg-set.h"
++#include "basic-block.h"
++#include "insn-config.h"
++#include "function.h"
++#include "expr.h"
++#include "insn-attr.h"
++#include "recog.h"
++#include "toplev.h"
++#include "target.h"
++#include "timevar.h"
++#include "optabs.h"
++#include "insn-codes.h"
++#include "rtlhooks-def.h"
++#include "output.h"
++#include "params.h"
++#include "timevar.h"
++#include "tree-pass.h"
++#include "cgraph.h"
++
++#define SKIP_REG (-1)
++
++/* Array to register the biggest use of a reg, in bits.  */
++
++static int *biggest_use;
++
++/* Forward declaration.  */
++
++static void note_use (rtx *x, void *data);
++
++/* The following two functions are borrowed from trunk/gcc/toplev.c. They can be
++   removed for a check-in into gcc trunk.  */
++
++/* Given X, an unsigned number, return the number of least significant bits
++   that are zero.  When X == 0, the result is the word size.  */
++
++static int
++ctz_hwi (unsigned HOST_WIDE_INT x)
++{
++  return x ? floor_log2 (x & -x) : HOST_BITS_PER_WIDE_INT;
++}
++
++/* Similarly for most significant bits.  */
++
++static int
++clz_hwi (unsigned HOST_WIDE_INT x)
++{
++  return HOST_BITS_PER_WIDE_INT - 1 - floor_log2(x);
++}
++
++/* Check whether this is a paradoxical subreg. */
++
++static bool
++paradoxical_subreg_p (rtx subreg)
++{
++  enum machine_mode subreg_mode, reg_mode;
++
++  if (GET_CODE (subreg) != SUBREG)
++    return false;
++
++  subreg_mode = GET_MODE (subreg);
++  reg_mode = GET_MODE (SUBREG_REG (subreg));
++
++  if (GET_MODE_SIZE (subreg_mode) > GET_MODE_SIZE (reg_mode))
++    return true;
++
++  return false;
++}
++
++/* Get the size and reg number of a REG or SUBREG use.  */
++
++static bool
++reg_use_p (rtx use, int *size, unsigned int *regno)
++{
++  rtx reg;
++      
++  if (REG_P (use))
++    {
++      *regno = REGNO (use);
++      *size = GET_MODE_BITSIZE (GET_MODE (use));
++      return true;
++    }
++  else if (GET_CODE (use) == SUBREG)
++    {
++      reg = SUBREG_REG (use);
++
++      if (!REG_P (reg))
++        return false;
++
++      *regno = REGNO (reg);
++
++      if (paradoxical_subreg_p (use))
++        *size = GET_MODE_BITSIZE (GET_MODE (reg));
++      else
++        *size = subreg_lsb (use) + GET_MODE_BITSIZE (GET_MODE (use));
++
++      return true;
++    }
++
++  return false;
++}
++
++/* Register the use of a reg.  */
++
++static void
++register_use (int size, unsigned int regno)
++{
++  int *current = &biggest_use[regno];
++
++  if (*current == SKIP_REG)
++    return;
++  
++  *current = MAX (*current, size);
++}
++
++/* Handle embedded uses.  */
++
++static void
++note_embedded_uses (rtx use, rtx pattern)
++{
++  const char *format_ptr;
++  int i, j;
++
++  format_ptr = GET_RTX_FORMAT (GET_CODE (use));
++  for (i = 0; i < GET_RTX_LENGTH (GET_CODE (use)); i++)
++    if (format_ptr[i] == 'e')
++      note_use (&XEXP (use, i), pattern);
++    else if (format_ptr[i] == 'E')
++      for (j = 0; j < XVECLEN (use, i); j++)
++        note_use (&XVECEXP (use, i, j), pattern);
++}
++
++/* Get the set that has use as its SRC operand.  */
++
++static rtx
++get_set (rtx use, rtx pattern)
++{
++  rtx sub;
++  int i;
++
++  if (GET_CODE (pattern) == SET && SET_SRC (pattern) == use)
++    return pattern;
++
++  if (GET_CODE (pattern) == PARALLEL)
++    for (i = 0; i < XVECLEN (pattern, 0); ++i)
++      {
++        sub = XVECEXP (pattern, 0, i);
++        if (GET_CODE (sub) == SET && SET_SRC (sub) == use)
++          return sub;
++      }
++  
++  return NULL_RTX;
++}
++
++/* Handle a restricted op use. In this context restricted means that a bit in an
++   operand influences only the same bit or more significant bits in the result.
++   The bitwise ops are a subclass, but PLUS is one as well.  */
++
++static void
++note_restricted_op_use (rtx use, unsigned int nr_operands, rtx pattern)
++{
++  unsigned int i, smallest;
++  int operand_size[2];
++  int used_size;
++  unsigned int operand_regno[2];
++  bool operand_reg[2];
++  bool operand_ignore[2];
++  rtx set;
++
++  /* Init operand_reg, operand_size, operand_regno and operand_ignore.  */
++  for (i = 0; i < nr_operands; ++i)
++    {
++      operand_reg[i] = reg_use_p (XEXP (use, i), &operand_size[i],
++                                  &operand_regno[i]);
++      operand_ignore[i] = false;
++    }
++
++  /* Handle case of reg and-masked with const.  */
++  if (GET_CODE (use) == AND && CONST_INT_P (XEXP (use, 1)) && operand_reg[0])
++    {
++      used_size =
++        HOST_BITS_PER_WIDE_INT - clz_hwi (UINTVAL (XEXP (use, 1)));
++      operand_size[0] = MIN (operand_size[0], used_size);
++    }
++
++  /* Handle case of reg or-masked with const.  */
++  if (GET_CODE (use) == IOR && CONST_INT_P (XEXP (use, 1)) && operand_reg[0])
++    {
++      used_size =
++        HOST_BITS_PER_WIDE_INT - clz_hwi (~UINTVAL (XEXP (use, 1)));
++      operand_size[0] = MIN (operand_size[0], used_size);
++    }
++
++  /* Ignore the use of a in 'a = a + b'.  */
++  set = get_set (use, pattern);
++  if (set != NULL_RTX && REG_P (SET_DEST (set)))
++    for (i = 0; i < nr_operands; ++i)
++      operand_ignore[i] = (operand_reg[i]
++                           && (REGNO (SET_DEST (set)) == operand_regno[i]));
++
++  /* Handle the case a reg is combined with don't care bits.  */
++  if (nr_operands == 2 && operand_reg[0] && operand_reg[1]
++      && operand_size[0] != operand_size[1])
++    {
++      smallest = operand_size[0] > operand_size[1];
++
++      if (paradoxical_subreg_p (XEXP (use, smallest))
++          && !SUBREG_PROMOTED_VAR_P (XEXP (use, smallest)))
++        operand_size[1 - smallest] = operand_size[smallest];
++    }
++
++  /* Register the operand use, if necessary.  */
++  for (i = 0; i < nr_operands; ++i)
++    if (!operand_reg[i])
++      note_use (&XEXP (use, i), pattern);
++    else if (!operand_ignore[i])
++      register_use (operand_size[i], operand_regno[i]);
++}
++
++/* Handle all uses noted by note_uses.  */
++
++static void
++note_use (rtx *x, void *data)
++{
++  rtx use = *x;
++  rtx pattern = (rtx)data;
++  int use_size;
++  unsigned int use_regno;
++
++  switch (GET_CODE (use))
++    {
++    case REG:
++    case SUBREG:
++      if (!reg_use_p (use, &use_size, &use_regno))
++        {
++          note_embedded_uses (use, pattern);
++          return;
++        }
++      register_use (use_size, use_regno);
++      return;
++    case IOR:
++    case AND:
++    case XOR:
++    case PLUS:
++    case MINUS:
++      note_restricted_op_use (use, 2, pattern);
++      return;
++    case NOT:
++    case NEG:
++      note_restricted_op_use (use, 1, pattern);
++      return;
++    case ASHIFT:
++      if (!reg_use_p (XEXP (use, 0), &use_size, &use_regno)
++	  || !CONST_INT_P (XEXP (use, 1))
++          || INTVAL (XEXP (use, 1)) <= 0
++          || paradoxical_subreg_p (XEXP (use, 0)))
++        {
++          note_embedded_uses (use, pattern);
++          return;
++        }
++      register_use (use_size - INTVAL (XEXP (use, 1)), use_regno);
++      return;
++    default:
++      note_embedded_uses (use, pattern);
++      return;
++    }
++}
++
++/* Check whether reg is implicitly used.  */
++
++static bool
++implicit_use_p (int regno)
++{
++#ifdef EPILOGUE_USES
++  if (EPILOGUE_USES (regno))
++    return true;
++#endif
++
++#ifdef EH_USES
++  if (EH_USES (regno))
++    return true;
++#endif
++
++  return false;
++}
++
++/* Note the uses of argument registers in a call.  */
++
++static void
++note_call_uses (rtx insn)
++{
++  rtx link, link_expr;
++
++  if (!CALL_P (insn))
++    return;
++
++  for (link = CALL_INSN_FUNCTION_USAGE (insn); link; link = XEXP (link, 1))
++    {
++      link_expr = XEXP (link, 0);
++
++      if (GET_CODE (link_expr) == USE)
++        note_use (&XEXP (link_expr, 0), link);
++    }
++}
++
++/* Calculate the biggest use mode for all regs. */
++
++static void
++calculate_biggest_use (void)
++{
++  int i;
++  basic_block bb;
++  rtx insn;
++
++  /* Initialize biggest_use for all regs to 0. If a reg is used implicitly, we
++     handle that reg conservatively and set it to SKIP_REG instead.  */
++  for (i = 0; i < max_reg_num (); i++)
++    biggest_use[i] = ((implicit_use_p (i) || HARD_REGISTER_NUM_P (i))
++                      ? SKIP_REG : 0);
++
++  /* For all insns, call note_use for each use in insn.  */
++  FOR_EACH_BB (bb)
++    FOR_BB_INSNS (bb, insn)
++      {
++        if (!NONDEBUG_INSN_P (insn))
++          continue;
++
++        note_uses (&PATTERN (insn), note_use, PATTERN (insn));
++
++        if (CALL_P (insn))
++          note_call_uses (insn);
++      }
++
++  /* Dump the biggest uses found.  */
++  if (dump_file)
++    for (i = 0; i < max_reg_num (); i++)
++      if (biggest_use[i] > 0)
++        fprintf (dump_file, "reg %d: size %d\n", i, biggest_use[i]);
++}
++
++/* Check whether this is a sign/zero extension.  */
++
++static bool
++extension_p (rtx insn, rtx *dest, rtx *inner, int *preserved_size)
++{
++  rtx src, op0;
++
++  /* Detect set of reg.  */
++  if (GET_CODE (PATTERN (insn)) != SET)
++    return false;
++
++  src = SET_SRC (PATTERN (insn));
++  *dest = SET_DEST (PATTERN (insn));
++          
++  if (!REG_P (*dest))
++    return false;
++
++  /* Detect sign or zero extension.  */
++  if (GET_CODE (src) == ZERO_EXTEND || GET_CODE (src) == SIGN_EXTEND
++      || (GET_CODE (src) == AND && CONST_INT_P (XEXP (src, 1))))
++    {
++      op0 = XEXP (src, 0);
++
++      /* Determine amount of least significant bits preserved by operation.  */
++      if (GET_CODE (src) == AND)
++        *preserved_size = ctz_hwi (~UINTVAL (XEXP (src, 1)));
++      else
++        *preserved_size = GET_MODE_BITSIZE (GET_MODE (op0));
++
++      if (GET_CODE (op0) == SUBREG)
++        {
++          if (subreg_lsb (op0) != 0)
++            return false;
++      
++          *inner = SUBREG_REG (op0);
++          return true;
++        }
++      else if (REG_P (op0))
++        {
++          *inner = op0;
++          return true;
++        }
++    }
++
++  return false;
++}
++
++/* Check whether this is a redundant sign/zero extension.  */
++
++static bool
++redundant_extension_p (rtx insn, rtx *dest, rtx *inner)
++{
++  int biggest_dest_use;
++  int preserved_size;
++
++  if (!extension_p (insn, dest, inner, &preserved_size))
++    return false;
++
++  if (dump_file)
++    fprintf (dump_file, "considering extension %u with preserved size %d\n", 
++             INSN_UID (insn), preserved_size);
++
++  biggest_dest_use = biggest_use[REGNO (*dest)];
++      
++  if (biggest_dest_use == SKIP_REG)
++    return false;
++
++  if (preserved_size < biggest_dest_use)
++    return false;
++
++  if (dump_file)
++    fprintf (dump_file, "found superfluous extension %u\n", INSN_UID (insn));
++
++  return true;
++}
++
++/* Try to remove or replace the redundant extension.  */
++
++static void
++try_remove_or_replace_extension (rtx insn, rtx dest, rtx inner)
++{
++  rtx cp_src, cp_dest, seq, one;
++
++  if (GET_MODE_CLASS (GET_MODE (dest)) != GET_MODE_CLASS (GET_MODE (inner)))
++    return;
++
++  /* Check whether replacement is needed.  */
++  if (dest != inner)
++    {
++      start_sequence ();
++
++      /* Determine the proper replacement operation.  */
++      if (GET_MODE (dest) == GET_MODE (inner))
++        {
++          cp_src = inner;
++          cp_dest = dest;
++        }
++      else if (GET_MODE_SIZE (GET_MODE (dest))
++               > GET_MODE_SIZE (GET_MODE (inner)))
++        {
++          emit_clobber (dest);
++          cp_src = inner;
++          cp_dest = gen_lowpart_SUBREG (GET_MODE (inner), dest);
++        }
++      else 
++        {
++          cp_src = gen_rtx_TRUNCATE (GET_MODE (dest), inner);
++          cp_dest = dest;
++        }
++
++      emit_move_insn (cp_dest, cp_src);
++
++      seq = get_insns ();
++      end_sequence ();
++
++      /* If the replacement is not supported, bail out.  */
++      for (one = seq; one != NULL_RTX; one = NEXT_INSN (one))
++        if (recog_memoized (one) < 0 && GET_CODE (PATTERN (one)) != CLOBBER)
++          return;
++
++      /* Insert the replacement.  */
++      emit_insn_before (seq, insn);
++    }
++
++  /* Note replacement/removal in the dump.  */
++  if (dump_file)
++    {
++      fprintf (dump_file, "superfluous extension %u ", INSN_UID (insn));
++      if (dest != inner)
++        fprintf (dump_file, "replaced by %u\n", INSN_UID (seq));
++      else
++        fprintf (dump_file, "removed\n");
++    }
++
++  /* Remove the extension.  */
++  delete_insn (insn);  
++}
++
++/* Find redundant extensions and remove or replace them if possible.  */
++
++static void
++remove_redundant_extensions (void)
++{
++  basic_block bb;
++  rtx insn, next, dest, inner;
++
++  biggest_use = XNEWVEC (int, max_reg_num ());
++  calculate_biggest_use ();
++
++  /* Remove redundant extensions.  */
++  FOR_EACH_BB (bb)
++    FOR_BB_INSNS_SAFE (bb, insn, next)
++      {
++        if (!NONDEBUG_INSN_P (insn))
++          continue;
++
++        if (!redundant_extension_p (insn, &dest, &inner))
++          continue;
++
++        try_remove_or_replace_extension (insn, dest, inner);
++      }
++
++  free (biggest_use);
++}
++
++/* Remove redundant extensions.  */
++
++static unsigned int
++rest_of_handle_ee (void)
++{
++  remove_redundant_extensions ();
++  return 0;
++}
++
++/* Run ee pass when flag_ee is set at optimization level > 0.  */
++
++static bool
++gate_handle_ee (void)
++{
++  return (optimize > 0 && flag_ee);
++}
++
++struct rtl_opt_pass pass_ee =
++{
++ {
++  RTL_PASS,
++  "ee",                                 /* name */
++  gate_handle_ee,                       /* gate */
++  rest_of_handle_ee,                    /* execute */
++  NULL,                                 /* sub */
++  NULL,                                 /* next */
++  0,                                    /* static_pass_number */
++  TV_EE,                                /* tv_id */
++  0,                                    /* properties_required */
++  0,                                    /* properties_provided */
++  0,                                    /* properties_destroyed */
++  0,                                    /* todo_flags_start */
++  TODO_ggc_collect |
++  TODO_dump_func |
++  TODO_verify_rtl_sharing,              /* todo_flags_finish */
++ }
++};
+
+=== modified file 'gcc/opts.c'
+--- old/gcc/opts.c	2010-05-17 09:13:28 +0000
++++ new/gcc/opts.c	2010-12-10 15:33:37 +0000
+@@ -907,6 +907,7 @@
+   flag_tree_switch_conversion = opt2;
+   flag_ipa_cp = opt2;
+   flag_ipa_sra = opt2;
++  flag_ee = opt2;
+ 
+   /* Track fields in field-sensitive alias analysis.  */
+   set_param_value ("max-fields-for-field-sensitive",
+
+=== modified file 'gcc/passes.c'
+--- old/gcc/passes.c	2010-09-01 13:29:58 +0000
++++ new/gcc/passes.c	2010-12-10 15:33:37 +0000
+@@ -974,6 +974,7 @@
+       NEXT_PASS (pass_lower_subreg);
+       NEXT_PASS (pass_df_initialize_opt);
+       NEXT_PASS (pass_cse);
++      NEXT_PASS (pass_ee);
+       NEXT_PASS (pass_rtl_fwprop);
+       NEXT_PASS (pass_rtl_cprop);
+       NEXT_PASS (pass_rtl_pre);
+
+=== added file 'gcc/testsuite/gcc.dg/extend-1.c'
+--- old/gcc/testsuite/gcc.dg/extend-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/extend-1.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-ee" } */
++
++void f(unsigned char * p, short s, int c, int *z)
++{
++  if (c)
++    *z = 0;
++  *p ^= (unsigned char)s;
++}
++
++/* { dg-final { scan-rtl-dump-times "sign_extend:" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "superfluous extension \[0-9\]+ replaced" 1 "ee" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "ee" } } */
+
+=== added file 'gcc/testsuite/gcc.dg/extend-2-64.c'
+--- old/gcc/testsuite/gcc.dg/extend-2-64.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/extend-2-64.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-ee" } */
++/* { dg-require-effective-target mips64 } */
++
++void f(unsigned char * p, short *s, int c)
++{
++  short or = 0;
++  while (c)
++    {
++      or = or | s[c];
++      c --;
++    }
++  *p = (unsigned char)or;
++}
++
++/* { dg-final { scan-rtl-dump-times "zero_extend:" 1 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "sign_extend:" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "superfluous extension \[0-9\]+ replaced" 3 "ee" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "ee" } } */
++
+
+=== added file 'gcc/testsuite/gcc.dg/extend-2.c'
+--- old/gcc/testsuite/gcc.dg/extend-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/extend-2.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,20 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-ee" } */
++/* { dg-require-effective-target ilp32 } */
++
++void f(unsigned char * p, short *s, int c)
++{
++  short or = 0;
++  while (c)
++    {
++      or = or | s[c];
++      c --;
++    }
++  *p = (unsigned char)or;
++}
++
++/* { dg-final { scan-rtl-dump-times "zero_extend" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "sign_extend" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "superfluous extension \[0-9\]+ replaced" 2 "ee" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "ee" } } */
++
+
+=== added file 'gcc/testsuite/gcc.dg/extend-3.c'
+--- old/gcc/testsuite/gcc.dg/extend-3.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/extend-3.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,12 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-ee" } */
++
++unsigned int f(unsigned char byte)
++{
++  return byte << 25;
++}
++
++/* { dg-final { scan-rtl-dump-times "zero_extend:" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump "superfluous extension \[0-9\]+ replaced" "ee" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "ee" } } */
++
+
+=== added file 'gcc/testsuite/gcc.dg/extend-4.c'
+--- old/gcc/testsuite/gcc.dg/extend-4.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/extend-4.c	2010-12-10 15:33:37 +0000
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-ee" } */
++
++unsigned char f(unsigned int a)
++{
++  unsigned int b = a & 0x10ff;
++  return b;
++}
++
++/* { dg-final { scan-rtl-dump-times "and:" 0 "ee" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "superfluous extension \[0-9\]+ replaced" 1 "ee" { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "ee" } } */
++
+
+=== modified file 'gcc/timevar.def'
+--- old/gcc/timevar.def	2009-11-27 12:43:08 +0000
++++ new/gcc/timevar.def	2010-12-10 15:33:37 +0000
+@@ -162,6 +162,7 @@
+ DEFTIMEVAR (TV_VARCONST              , "varconst")
+ DEFTIMEVAR (TV_LOWER_SUBREG	     , "lower subreg")
+ DEFTIMEVAR (TV_JUMP                  , "jump")
++DEFTIMEVAR (TV_EE                    , "extension elimination")
+ DEFTIMEVAR (TV_FWPROP                , "forward prop")
+ DEFTIMEVAR (TV_CSE                   , "CSE")
+ DEFTIMEVAR (TV_DCE                   , "dead code elimination")
+
+=== modified file 'gcc/tree-pass.h'
+--- old/gcc/tree-pass.h	2010-09-01 13:29:58 +0000
++++ new/gcc/tree-pass.h	2010-12-10 15:33:37 +0000
+@@ -468,6 +468,7 @@
+ extern struct rtl_opt_pass pass_initial_value_sets;
+ extern struct rtl_opt_pass pass_unshare_all_rtl;
+ extern struct rtl_opt_pass pass_instantiate_virtual_regs;
++extern struct rtl_opt_pass pass_ee;
+ extern struct rtl_opt_pass pass_rtl_fwprop;
+ extern struct rtl_opt_pass pass_rtl_fwprop_addr;
+ extern struct rtl_opt_pass pass_jump2;
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99444.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99444.patch
new file mode 100644
index 0000000000..80eebeec0c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99444.patch
@@ -0,0 +1,183 @@
+2010-12-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	Issue #10089
+
+	gcc/
+	* expr.c (store_field): Avoid a direct store if the mode is larger
+	than the size of the bit field.
+	* stor-layout.c (layout_decl): If flag_strict_volatile_bitfields,
+	treat non-volatile bit fields like volatile ones.
+	* toplev.c (process_options): Disallow combination of
+	-fstrict-volatile-bitfields and ABI versions less than 2.
+	* config/arm/arm.c (arm_option_override): Don't enable
+	flag_strict_volatile_bitfields if the ABI version is less than 2.
+	* config/h8300/h8300.c (h8300_option_override): Likewise.
+	* config/rx/rx.c (rx_option_override): Likewise.
+	* config/m32c/m32c.c (m32c_option_override): Likewise.
+	* config/sh/sh.c (sh_option_override): Likewise.
+
+	gcc/testsuite/
+	* gcc.target/arm/volatile-bitfields-4.c: New test.
+	* c-c++-common/abi-bf.c: New test.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-12-10 15:30:47 +0000
++++ new/gcc/config/arm/arm.c	2010-12-10 15:34:19 +0000
+@@ -1934,7 +1934,8 @@
+     set_param_value ("gcse-unrestricted-cost", 2);
+ 
+   /* ARM EABI defaults to strict volatile bitfields.  */
+-  if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0)
++  if (TARGET_AAPCS_BASED && flag_strict_volatile_bitfields < 0
++      && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ 
+   /* Register global variables with the garbage collector.  */
+
+=== modified file 'gcc/config/h8300/h8300.c'
+--- old/gcc/config/h8300/h8300.c	2010-11-04 12:43:52 +0000
++++ new/gcc/config/h8300/h8300.c	2010-12-10 15:34:19 +0000
+@@ -405,7 +405,7 @@
+     }
+ 
+   /* This target defaults to strict volatile bitfields.  */
+-  if (flag_strict_volatile_bitfields < 0)
++  if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ }
+ 
+
+=== modified file 'gcc/config/m32c/m32c.c'
+--- old/gcc/config/m32c/m32c.c	2010-11-04 12:43:52 +0000
++++ new/gcc/config/m32c/m32c.c	2010-12-10 15:34:19 +0000
+@@ -430,7 +430,7 @@
+     flag_ivopts = 0;
+ 
+   /* This target defaults to strict volatile bitfields.  */
+-  if (flag_strict_volatile_bitfields < 0)
++  if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ }
+ 
+
+=== modified file 'gcc/config/rx/rx.c'
+--- old/gcc/config/rx/rx.c	2010-11-04 12:43:52 +0000
++++ new/gcc/config/rx/rx.c	2010-12-10 15:34:19 +0000
+@@ -2191,7 +2191,7 @@
+ rx_option_override (void)
+ {
+   /* This target defaults to strict volatile bitfields.  */
+-  if (flag_strict_volatile_bitfields < 0)
++  if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ }
+ 
+
+=== modified file 'gcc/config/sh/sh.c'
+--- old/gcc/config/sh/sh.c	2010-11-04 12:43:52 +0000
++++ new/gcc/config/sh/sh.c	2010-12-10 15:34:19 +0000
+@@ -952,7 +952,7 @@
+     sh_fix_range (sh_fixed_range_str);
+ 
+   /* This target defaults to strict volatile bitfields.  */
+-  if (flag_strict_volatile_bitfields < 0)
++  if (flag_strict_volatile_bitfields < 0 && abi_version_at_least(2))
+     flag_strict_volatile_bitfields = 1;
+ }
+ 
+
+=== modified file 'gcc/expr.c'
+--- old/gcc/expr.c	2010-11-04 12:43:52 +0000
++++ new/gcc/expr.c	2010-12-10 15:34:19 +0000
+@@ -5848,6 +5848,8 @@
+ 		|| bitpos % GET_MODE_ALIGNMENT (mode))
+ 	       && SLOW_UNALIGNED_ACCESS (mode, MEM_ALIGN (target)))
+ 	      || (bitpos % BITS_PER_UNIT != 0)))
++      || (bitsize >= 0 && mode != BLKmode
++	  && GET_MODE_BITSIZE (mode) > bitsize)
+       /* If the RHS and field are a constant size and the size of the
+ 	 RHS isn't the same size as the bitfield, we must use bitfield
+ 	 operations.  */
+
+=== modified file 'gcc/stor-layout.c'
+--- old/gcc/stor-layout.c	2010-11-26 12:03:32 +0000
++++ new/gcc/stor-layout.c	2010-12-10 15:34:19 +0000
+@@ -621,12 +621,13 @@
+ 	  /* See if we can use an ordinary integer mode for a bit-field.
+ 	     Conditions are: a fixed size that is correct for another mode,
+ 	     occupying a complete byte or bytes on proper boundary,
+-	     and not volatile or not -fstrict-volatile-bitfields.  */
++	     and not -fstrict-volatile-bitfields.  If the latter is set,
++	     we unfortunately can't check TREE_THIS_VOLATILE, as a cast
++	     may make a volatile object later.  */
+ 	  if (TYPE_SIZE (type) != 0
+ 	      && TREE_CODE (TYPE_SIZE (type)) == INTEGER_CST
+ 	      && GET_MODE_CLASS (TYPE_MODE (type)) == MODE_INT
+-	      && !(TREE_THIS_VOLATILE (decl)
+-		   && flag_strict_volatile_bitfields > 0))
++	      && flag_strict_volatile_bitfields <= 0)
+ 	    {
+ 	      enum machine_mode xmode
+ 		= mode_for_size_tree (DECL_SIZE (decl), MODE_INT, 1);
+
+=== added file 'gcc/testsuite/c-c++-common/abi-bf.c'
+--- old/gcc/testsuite/c-c++-common/abi-bf.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/c-c++-common/abi-bf.c	2010-12-10 15:34:19 +0000
+@@ -0,0 +1,3 @@
++/* { dg-warning "incompatible" } */
++/* { dg-do compile } */
++/* { dg-options "-fstrict-volatile-bitfields -fabi-version=1" } */
+
+=== added file 'gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c'
+--- old/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/volatile-bitfields-4.c	2010-12-10 15:34:19 +0000
+@@ -0,0 +1,30 @@
++/* { dg-require-effective-target arm_eabi } */

++/* { dg-do compile } */

++/* { dg-options "-O2" } */

++/* { dg-final { scan-assembler-times "ldr\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */

++/* { dg-final { scan-assembler-times "str\[\\t \]+\[^\n\]*,\[\\t \]*\\\[\[^\n\]*\\\]" 2 } } */

++/* { dg-final { scan-assembler-not "strb" } } */

++

++struct thing {

++  unsigned a: 8;

++  unsigned b: 8;

++  unsigned c: 8;

++  unsigned d: 8;

++};

++

++struct thing2 {

++  volatile unsigned a: 8;

++  volatile unsigned b: 8;

++  volatile unsigned c: 8;

++  volatile unsigned d: 8;

++};

++

++void test1(volatile struct thing *t)

++{

++  t->a = 5;

++}

++

++void test2(struct thing2 *t)

++{

++  t->a = 5;

++}

+
+=== modified file 'gcc/toplev.c'
+--- old/gcc/toplev.c	2010-03-31 01:44:10 +0000
++++ new/gcc/toplev.c	2010-12-10 15:34:19 +0000
+@@ -1851,6 +1851,13 @@
+     sorry ("Graphite loop optimizations cannot be used");
+ #endif
+ 
++  if (flag_strict_volatile_bitfields > 0 && !abi_version_at_least (2))
++    {
++      warning (0, "-fstrict-volatile-bitfield disabled; "
++	       "it is incompatible with ABI versions < 2");
++      flag_strict_volatile_bitfields = 0;
++    }
++
+   /* Unrolling all loops implies that standard loop unrolling must also
+      be done.  */
+   if (flag_unroll_all_loops)
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99449.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99449.patch
new file mode 100644
index 0000000000..e6b0fad08f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99449.patch
@@ -0,0 +1,34 @@
+2010-12-21  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	LP: #617384
+	Backport from mainline:
+
+	gcc/
+	* config/arm/arm.c (require_pic_register): Set INSN_LOCATOR for all
+	instructions injected into the prologue to prologue_locator.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-12-10 15:34:19 +0000
++++ new/gcc/config/arm/arm.c	2010-12-21 14:13:38 +0000
+@@ -5080,7 +5080,7 @@
+ 	}
+       else
+ 	{
+-	  rtx seq;
++	  rtx seq, insn;
+ 
+ 	  if (!cfun->machine->pic_reg)
+ 	    cfun->machine->pic_reg = gen_reg_rtx (Pmode);
+@@ -5097,6 +5097,11 @@
+ 
+ 	      seq = get_insns ();
+ 	      end_sequence ();
++
++	      for (insn = seq; insn; insn = NEXT_INSN (insn))
++		if (INSN_P (insn))
++		  INSN_LOCATOR (insn) = prologue_locator;
++
+ 	      /* We can be called during expansion of PHI nodes, where
+ 	         we can't yet emit instructions directly in the final
+ 		 insn stream.  Queue the insns on the entry edge, they will
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99450.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99450.patch
new file mode 100644
index 0000000000..49fa07fca2
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99450.patch
@@ -0,0 +1,104 @@
+ 2010-12-21  Ulrich Weigand  <uweigand@de.ibm.com>
+ 
+	LP: #662324
+	Backport from mainline:
+
+	2010-12-17  Dodji Seketeli  <dodji@redhat.com>
+
+	gcc/
+	* dwarf2out.c (gen_type_die_with_usage): Do not try to emit debug
+	info for a redundant typedef that has DECL_ORIGINAL_TYPE set. Use
+	that underlying type instead.
+
+	gcc/testsuite/
+	* g++.dg/debug/dwarf2/self-ref-1.C: New test.
+	* g++.dg/debug/dwarf2/self-ref-2.C: Likewise.
+
+=== modified file 'gcc/dwarf2out.c'
+--- old/gcc/dwarf2out.c	2010-10-04 00:50:43 +0000
++++ new/gcc/dwarf2out.c	2010-12-21 18:46:10 +0000
+@@ -18993,6 +18993,16 @@
+   if (type == NULL_TREE || type == error_mark_node)
+     return;
+ 
++  if (TYPE_NAME (type) != NULL_TREE
++      && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL
++      && is_redundant_typedef (TYPE_NAME (type))
++      && DECL_ORIGINAL_TYPE (TYPE_NAME (type)))
++    /* The DECL of this type is a typedef we don't want to emit debug
++       info for but we want debug info for its underlying typedef.
++       This can happen for e.g, the injected-class-name of a C++
++       type.  */
++    type = DECL_ORIGINAL_TYPE (TYPE_NAME (type));
++
+   /* If TYPE is a typedef type variant, let's generate debug info
+      for the parent typedef which TYPE is a type of.  */
+   if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL
+
+=== added file 'gcc/testsuite/g++.dg/debug/dwarf2/self-ref-1.C'
+--- old/gcc/testsuite/g++.dg/debug/dwarf2/self-ref-1.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/debug/dwarf2/self-ref-1.C	2010-12-21 18:46:10 +0000
+@@ -0,0 +1,28 @@
++// Origin: PR debug/45088
++// { dg-do compile }
++// { dg-options "-g -dA" }
++// { dg-final { scan-assembler-times "\[^\n\r\]*\\(DIE\[^\n\r\]*DW_TAG_pointer_type\\)\[\n\r\]{1,2}\[^\n\r\]*DW_AT_byte_size\[\n\r\]{1,2}\[^\n\r\]*DW_AT_type" 4 } }
++
++struct A
++{
++    virtual ~A();
++};
++
++struct B : public A
++{
++    virtual ~B(){}
++};
++
++struct C : public B
++{
++    A* a1;
++};
++
++int
++main()
++{
++    C c;
++    c.a1 = 0;
++    return 0;
++}
++
+
+=== added file 'gcc/testsuite/g++.dg/debug/dwarf2/self-ref-2.C'
+--- old/gcc/testsuite/g++.dg/debug/dwarf2/self-ref-2.C	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/g++.dg/debug/dwarf2/self-ref-2.C	2010-12-21 18:46:10 +0000
+@@ -0,0 +1,29 @@
++// Origin: PR debug/45088
++// { dg-do compile }
++// { dg-options "-g -dA" }
++// { dg-final { scan-assembler-times "\[^\n\r\]*\\(DIE\[^\n\r\]*DW_TAG_pointer_type\\)\[\n\r\]{1,2}\[^\n\r\]*DW_AT_byte_size\[\n\r\]{1,2}\[^\n\r\]*DW_AT_type" 4 } }
++
++template<class T>
++struct A
++{
++    virtual ~A();
++};
++
++struct B : public A<int>
++{
++    virtual ~B(){}
++};
++
++struct C : public B
++{
++    A<int>* a1;
++};
++
++int
++main()
++{
++    C c;
++    c.a1 = 0;
++    return 0;
++}
++
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99451.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99451.patch
new file mode 100644
index 0000000000..d87c312d07
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99451.patch
@@ -0,0 +1,45 @@
+2010-12-22  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	LP: #693425
+	Backport from mainline:
+
+	gcc/
+	* config/spu/spu.md ("mov<mode>"): Use nonimmediate_operand
+	predicate for destination operand.
+	* config/spu/spu.c (spu_expand_mov): If move destination is an
+	invalid subreg, perform move in the subreg's inner mode instead.
+
+=== modified file 'gcc/config/spu/spu.c'
+--- old/gcc/config/spu/spu.c	2010-08-04 09:53:04 +0000
++++ new/gcc/config/spu/spu.c	2010-12-22 15:20:44 +0000
+@@ -4572,7 +4572,13 @@
+ spu_expand_mov (rtx * ops, enum machine_mode mode)
+ {
+   if (GET_CODE (ops[0]) == SUBREG && !valid_subreg (ops[0]))
+-    abort ();
++    {
++      /* Perform the move in the destination SUBREG's inner mode.  */
++      ops[0] = SUBREG_REG (ops[0]);
++      mode = GET_MODE (ops[0]);
++      ops[1] = gen_lowpart_common (mode, ops[1]);
++      gcc_assert (ops[1]);
++    }
+ 
+   if (GET_CODE (ops[1]) == SUBREG && !valid_subreg (ops[1]))
+     {
+
+=== modified file 'gcc/config/spu/spu.md'
+--- old/gcc/config/spu/spu.md	2009-05-23 01:28:14 +0000
++++ new/gcc/config/spu/spu.md	2010-12-22 15:20:44 +0000
+@@ -269,8 +269,8 @@
+ ;; mov
+ 
+ (define_expand "mov<mode>"
+-  [(set (match_operand:ALL 0 "spu_nonimm_operand" "=r,r,r,m")
+-	(match_operand:ALL 1 "general_operand" "r,i,m,r"))]
++  [(set (match_operand:ALL 0 "nonimmediate_operand" "")
++	(match_operand:ALL 1 "general_operand" ""))]
+   ""
+   {
+     if (spu_expand_mov(operands, <MODE>mode))
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99452.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99452.patch
new file mode 100644
index 0000000000..6cfc01feff
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99452.patch
@@ -0,0 +1,201 @@
+2010-12-14  Sandra Loosemore  <sandra@codesourcery.com>
+
+	Backport from mainline:
+
+	2010-12-14  Jakub Jelinek  <jakub@redhat.com>
+
+	PR tree-optimization/46909
+
+	gcc/
+	* tree-ssa-ccp.c (and_var_with_comparison_1): Save partial
+	result even in the is_and case, if both partial results
+	are the same, return it.
+	(or_var_with_comparison_1): Use is_or predicate instead of
+	innercode == TRUTH_OR_EXPR test.  Save partial result
+	even in the is_or case, if both partial results are the
+	same, return it.  In the !is_or case when both partial
+	results are the same, return the partial result instead
+	of boolean_true_node.
+
+	gcc/testsuite/
+	* gcc.c-torture/execute/pr46909-1.c: New test.
+	* gcc.c-torture/execute/pr46909-2.c: New test.
+	* gcc.dg/pr46909.c: New test.
+
+=== added file 'gcc/testsuite/gcc.c-torture/execute/pr46909-1.c'
+--- old/gcc/testsuite/gcc.c-torture/execute/pr46909-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/execute/pr46909-1.c	2011-01-05 11:27:00 +0000
+@@ -0,0 +1,22 @@
++/* PR tree-optimization/46909 */
++
++extern void abort ();
++
++int
++__attribute__ ((__noinline__))
++foo (unsigned int x)
++{
++  if (! (x == 4 || x == 6) || (x == 2 || x == 6))
++    return 1;
++  return -1;
++}
++
++int
++main ()
++{
++  int i;
++  for (i = -10; i < 10; i++)
++    if (foo (i) != 1 - 2 * (i == 4))
++      abort ();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.c-torture/execute/pr46909-2.c'
+--- old/gcc/testsuite/gcc.c-torture/execute/pr46909-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/execute/pr46909-2.c	2011-01-05 11:27:00 +0000
+@@ -0,0 +1,22 @@
++/* PR tree-optimization/46909 */
++
++extern void abort (void);
++
++int
++__attribute__((noinline))
++foo (int x)
++{
++  if ((x != 0 && x != 13) || x == 5 || x == 20)
++    return 1;
++  return -1;
++}
++
++int
++main (void)
++{
++  int i;
++  for (i = -10; i < 30; i++)
++    if (foo (i) != 1 - 2 * (i == 0) - 2 * (i == 13))
++      abort ();
++  return 0;
++}
+
+=== added file 'gcc/testsuite/gcc.dg/pr46909.c'
+--- old/gcc/testsuite/gcc.dg/pr46909.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/pr46909.c	2011-01-05 11:27:00 +0000
+@@ -0,0 +1,17 @@
++/* PR tree-optimization/46909 */
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-tree-ifcombine" } */
++
++extern void abort ();
++
++int
++__attribute__ ((__noinline__))
++foo (unsigned int x)
++{
++  if (! (x == 4 || x == 6) || (x == 2 || x == 6))
++    return 1;
++  return -1;
++}
++
++/* { dg-final { scan-tree-dump "optimizing two comparisons to x_\[0-9\]+\\(D\\) != 4" "ifcombine" } } */
++/* { dg-final { cleanup-tree-dump "ifcombine" } } */
+
+=== modified file 'gcc/tree-ssa-ccp.c'
+--- old/gcc/tree-ssa-ccp.c	2010-09-16 09:15:46 +0000
++++ new/gcc/tree-ssa-ccp.c	2011-01-05 11:27:00 +0000
+@@ -3508,14 +3508,11 @@
+ 	  /* Handle the OR case, where we are redistributing:
+ 	     (inner1 OR inner2) AND (op2a code2 op2b)
+ 	     => (t OR (inner2 AND (op2a code2 op2b)))  */
+-	  else
+-	    {
+-	      if (integer_onep (t))
+-		return boolean_true_node;
+-	      else
+-		/* Save partial result for later.  */
+-		partial = t;
+-	    }
++	  else if (integer_onep (t))
++	    return boolean_true_node;
++
++	  /* Save partial result for later.  */
++	  partial = t;
+ 	}
+       
+       /* Compute the second partial result, (inner2 AND (op2a code op2b)) */
+@@ -3536,6 +3533,10 @@
+ 		return inner1;
+ 	      else if (integer_zerop (t))
+ 		return boolean_false_node;
++	      /* If both are the same, we can apply the identity
++		 (x AND x) == x.  */
++	      else if (partial && same_bool_result_p (t, partial))
++		return t;
+ 	    }
+ 
+ 	  /* Handle the OR case. where we are redistributing:
+@@ -3945,7 +3946,7 @@
+ 	     => (t OR inner2)
+ 	     If the partial result t is a constant, we win.  Otherwise
+ 	     continue on to try reassociating with the other inner test.  */
+-	  if (innercode == TRUTH_OR_EXPR)
++	  if (is_or)
+ 	    {
+ 	      if (integer_onep (t))
+ 		return boolean_true_node;
+@@ -3956,14 +3957,11 @@
+ 	  /* Handle the AND case, where we are redistributing:
+ 	     (inner1 AND inner2) OR (op2a code2 op2b)
+ 	     => (t AND (inner2 OR (op2a code op2b)))  */
+-	  else
+-	    {
+-	      if (integer_zerop (t))
+-		return boolean_false_node;
+-	      else
+-		/* Save partial result for later.  */
+-		partial = t;
+-	    }
++	  else if (integer_zerop (t))
++	    return boolean_false_node;
++
++	  /* Save partial result for later.  */
++	  partial = t;
+ 	}
+       
+       /* Compute the second partial result, (inner2 OR (op2a code op2b)) */
+@@ -3977,13 +3975,18 @@
+ 	{
+ 	  /* Handle the OR case, where we are reassociating:
+ 	     (inner1 OR inner2) OR (op2a code2 op2b)
+-	     => (inner1 OR t)  */
+-	  if (innercode == TRUTH_OR_EXPR)
++	     => (inner1 OR t)
++	     => (t OR partial)  */
++	  if (is_or)
+ 	    {
+ 	      if (integer_zerop (t))
+ 		return inner1;
+ 	      else if (integer_onep (t))
+ 		return boolean_true_node;
++	      /* If both are the same, we can apply the identity
++		 (x OR x) == x.  */
++	      else if (partial && same_bool_result_p (t, partial))
++		return t;
+ 	    }
+ 	  
+ 	  /* Handle the AND case, where we are redistributing:
+@@ -4000,13 +4003,13 @@
+ 		     operand to the redistributed AND expression.  The
+ 		     interesting case is when at least one is true.
+ 		     Or, if both are the same, we can apply the identity
+-		     (x AND x) == true.  */
++		     (x AND x) == x.  */
+ 		  if (integer_onep (partial))
+ 		    return t;
+ 		  else if (integer_onep (t))
+ 		    return partial;
+ 		  else if (same_bool_result_p (t, partial))
+-		    return boolean_true_node;
++		    return t;
+ 		}
+ 	    }
+ 	}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99453.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99453.patch
new file mode 100644
index 0000000000..8eb35325ee
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99453.patch
@@ -0,0 +1,72 @@
+2010-12-17  Bernd Schmidt  <bernds@codesourcery.com>
+
+	Issue #10208
+
+	gcc/
+	* config/arm/arm.c (arm_select_cc_mode): Before calling
+	arm_select_dominance_cc_mode for AND or IOR operations, ensure
+	that op is NE or EQ.
+
+	gcc/testsuite/
+	* gcc.c-torture/compile/20101217-1.c: New test.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2010-12-21 14:13:38 +0000
++++ new/gcc/config/arm/arm.c	2011-01-05 11:32:50 +0000
+@@ -10609,12 +10609,14 @@
+ 
+   /* Alternate canonicalizations of the above.  These are somewhat cleaner.  */
+   if (GET_CODE (x) == AND
++      && (op == EQ || op == NE)
+       && COMPARISON_P (XEXP (x, 0))
+       && COMPARISON_P (XEXP (x, 1)))
+     return arm_select_dominance_cc_mode (XEXP (x, 0), XEXP (x, 1),
+ 					 DOM_CC_X_AND_Y);
+ 
+   if (GET_CODE (x) == IOR
++      && (op == EQ || op == NE)
+       && COMPARISON_P (XEXP (x, 0))
+       && COMPARISON_P (XEXP (x, 1)))
+     return arm_select_dominance_cc_mode (XEXP (x, 0), XEXP (x, 1),
+
+=== added file 'gcc/testsuite/gcc.c-torture/compile/20101217-1.c'
+--- old/gcc/testsuite/gcc.c-torture/compile/20101217-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/compile/20101217-1.c	2011-01-05 11:32:50 +0000
+@@ -0,0 +1,36 @@
++/* Testcase provided by HUAWEI.  */
++#include <stdio.h>
++int main()
++{
++        int cur_k;
++        int cur_j=0;
++        int cur_i=28;
++        unsigned char temp_data[8];
++        unsigned int Data_Size=20;
++
++        for (cur_k=0;cur_j<7;cur_j++,cur_i++) {
++                if (cur_j%2==0) {
++                        temp_data[cur_k++]=0;
++                }
++                if (cur_k==7) {
++                        for (;cur_k>0;cur_k--) {
++                                if (cur_k>2) {
++                                        if ((temp_data[7-cur_k]=='n' || temp_data[7-cur_k]=='N' ) && (temp_data[7-cur_k+1]=='a' || temp_data[7-cur_k+1]=='A' )) {
++                                                break;
++                                        }
++                                }
++                                if (cur_k==1) {
++                                        if (temp_data[7-cur_k]=='n' || temp_data[7-cur_k]=='N' ) {
++                                                break;
++                                        }
++                                }
++                        }
++                        if (cur_k==7) {
++                        } else {
++                                if (cur_k>0)
++                                        printf("dfjk");
++                        }
++                }
++        }
++return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch
new file mode 100644
index 0000000000..8aa06cc510
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch
@@ -0,0 +1,46 @@
+2010-12-18  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from mainline:
+
+	gcc/
+	2010-12-17  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/arm/arm.md (maddhisi4, *maddhidi4): Use the canonical
+	operand order for plus.
+	Drop redundant % from constraints.
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2010-11-11 11:12:14 +0000
++++ new/gcc/config/arm/arm.md	2011-01-05 11:42:19 +0000
+@@ -1791,11 +1791,11 @@
+ 
+ (define_insn "maddhisi4"
+   [(set (match_operand:SI 0 "s_register_operand" "=r")
+-	(plus:SI (match_operand:SI 3 "s_register_operand" "r")
+-		 (mult:SI (sign_extend:SI
+-			   (match_operand:HI 1 "s_register_operand" "%r"))
++	(plus:SI (mult:SI (sign_extend:SI
++			   (match_operand:HI 1 "s_register_operand" "r"))
+ 			  (sign_extend:SI
+-			   (match_operand:HI 2 "s_register_operand" "r")))))]
++			   (match_operand:HI 2 "s_register_operand" "r")))
++		 (match_operand:SI 3 "s_register_operand" "r")))]
+   "TARGET_DSP_MULTIPLY"
+   "smlabb%?\\t%0, %1, %2, %3"
+   [(set_attr "insn" "smlaxy")
+@@ -1805,11 +1805,11 @@
+ (define_insn "*maddhidi4"
+   [(set (match_operand:DI 0 "s_register_operand" "=r")
+ 	(plus:DI
+-	  (match_operand:DI 3 "s_register_operand" "0")
+ 	  (mult:DI (sign_extend:DI
+-	 	    (match_operand:HI 1 "s_register_operand" "%r"))
++	 	    (match_operand:HI 1 "s_register_operand" "r"))
+ 		   (sign_extend:DI
+-		    (match_operand:HI 2 "s_register_operand" "r")))))]
++		    (match_operand:HI 2 "s_register_operand" "r")))
++	  (match_operand:DI 3 "s_register_operand" "0")))]
+   "TARGET_DSP_MULTIPLY"
+   "smlalbb%?\\t%Q0, %R0, %1, %2"
+   [(set_attr "insn" "smlalxy")
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99455.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99455.patch
new file mode 100644
index 0000000000..5e8383a7d9
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99455.patch
@@ -0,0 +1,65 @@
+2010-12-21  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Issue #10201
+
+	Backport from mainline:
+
+	2010-12-16  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	PR target/46883
+	gcc/
+	* config/arm/arm.md
+	(zero_extendhisi2 for register input splitter): Change
+	"register_operand" to "s_register_operand".
+	(zero_extendqisi2 for register input splitter): Same.
+
+	gcc/testsuite/
+	* gcc.target/arm/pr46883.c: New testcase.
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2011-01-05 11:42:19 +0000
++++ new/gcc/config/arm/arm.md	2011-01-05 11:52:16 +0000
+@@ -4114,8 +4114,8 @@
+ })
+ 
+ (define_split
+-  [(set (match_operand:SI 0 "register_operand" "")
+-	(zero_extend:SI (match_operand:HI 1 "register_operand" "")))]
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(zero_extend:SI (match_operand:HI 1 "s_register_operand" "")))]
+   "!TARGET_THUMB2 && !arm_arch6"
+   [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 16)))
+    (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 16)))]
+@@ -4234,8 +4234,8 @@
+ })
+ 
+ (define_split
+-  [(set (match_operand:SI 0 "register_operand" "")
+-	(zero_extend:SI (match_operand:QI 1 "register_operand" "")))]
++  [(set (match_operand:SI 0 "s_register_operand" "")
++	(zero_extend:SI (match_operand:QI 1 "s_register_operand" "")))]
+   "!arm_arch6"
+   [(set (match_dup 0) (ashift:SI (match_dup 2) (const_int 24)))
+    (set (match_dup 0) (lshiftrt:SI (match_dup 0) (const_int 24)))]
+
+=== added file 'gcc/testsuite/gcc.target/arm/pr46883.c'
+--- old/gcc/testsuite/gcc.target/arm/pr46883.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/pr46883.c	2011-01-05 11:52:16 +0000
+@@ -0,0 +1,16 @@
++/* { dg-do compile } */
++/* { dg-options "-O1 -march=armv5te" } */
++
++void bar (unsigned char *q, unsigned short *data16s, int len)
++{
++  int i;
++
++  for (i = 0; i < len; i++)
++    {
++      q[2 * i] =
++        (((data16s[i] & 0xFF) << 8) | ((data16s[i] >> 8) & 0xFF)) & 0xFF;
++      q[2 * i + 1] =
++        ((unsigned short)
++         (((data16s[i] & 0xFF) << 8) | ((data16s[i] >> 8) & 0xFF))) >> 8;
++    }
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99456.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99456.patch
new file mode 100644
index 0000000000..35f98d24ab
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99456.patch
@@ -0,0 +1,3163 @@
+2011-01-03  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* doc/tm.texi (RETURN_ADDR_REGNUM): Document.
+	* doc/md.texi (simple_return): Document pattern.
+	(return): Add a sentence to clarify.
+	* doc/rtl.texi (simple_return): Document.
+	* doc/invoke.texi (Optimize Options): Document -fshrink-wrap.
+	* common.opt (fshrink-wrap): New.
+	* opts.c (decode_options): Set it for -O2 and above.
+	* gengenrtl.c (special_rtx): PC, CC0, RETURN and SIMPLE_RETURN
+	are special.
+	* rtl.h (ANY_RETURN_P): New macro.
+	(global_rtl_index): Add GR_RETURN and GR_SIMPLE_RETURN.
+	(ret_rtx, simple_return_rtx): New macros.
+	* genemit.c (gen_exp): RETURN and SIMPLE_RETURN have unique rtxs.
+	(gen_expand, gen_split): Use ANY_RETURN_P.
+	* rtl.c (copy_rtx): RETURN and SIMPLE_RETURN are shared.
+	* emit-rtl.c (verify_rtx_sharing): Likewise.
+	(skip_consecutive_labels): Return the argument if it is a return rtx.
+	(classify_insn): Handle both kinds of return.
+	(init_emit_regs): Create global rtl for ret_rtx and simple_return_rtx.
+	* df-scan.c (df_uses_record): Handle SIMPLE_RETURN.
+	* rtl.def (SIMPLE_RETURN): New.
+	* rtlanal.c (tablejump_p): Check JUMP_LABEL for returns.
+	* final.c (final_scan_insn): Recognize both kinds of return.
+	* reorg.c (function_return_label, function_simple_return_label): New
+	static variables.
+	(end_of_function_label): Remove.
+	(simplejump_or_return_p): New static function.
+	(find_end_label): Add a new arg, KIND.  All callers changed.
+	Depending on KIND, look for a label suitable for return or
+	simple_return.
+	(make_return_insns): Make corresponding changes.
+	(get_jump_flags): Check JUMP_LABELs for returns.
+	(follow_jumps): Likewise.
+	(get_branch_condition): Check target for return patterns rather
+	than NULL.
+	(own_thread_p): Likewise for thread.
+	(steal_delay_list_from_target): Check JUMP_LABELs for returns.
+	Use simplejump_or_return_p.
+	(fill_simple_delay_slots): Likewise.
+	(optimize_skip): Likewise.
+	(fill_slots_from_thread): Likewise.
+	(relax_delay_slots): Likewise.
+	(dbr_schedule): Adjust handling of end_of_function_label for the
+	two new variables.
+	* ifcvt.c (find_if_case_1): Take care when redirecting jumps to the
+	exit block.
+	(dead_or_predicable): Change NEW_DEST arg to DEST_EDGE.  All callers
+	changed.  Ensure that the right label is passed to redirect_jump.
+	* jump.c (condjump_p, condjump_in_parallel_p, any_condjump_p,
+	returnjump_p): Handle SIMPLE_RETURNs.
+	(delete_related_insns): Check JUMP_LABEL for returns.
+	(redirect_target): New static function.
+	(redirect_exp_1): Use it.  Handle any kind of return rtx as a label
+	rather than interpreting NULL as a return.
+	(redirect_jump_1): Assert that nlabel is not NULL.
+	(redirect_jump): Likewise.
+	(redirect_jump_2): Handle any kind of return rtx as a label rather
+	than interpreting NULL as a return.
+	* dwarf2out.c (compute_barrier_args_size_1): Check JUMP_LABEL for
+	returns.
+	* function.c (emit_return_into_block): Remove useless declaration.
+	(record_hard_reg_sets, frame_required_for_rtx, gen_return_pattern,
+	requires_stack_frame_p): New static functions.
+	(emit_return_into_block): New arg SIMPLE_P.  All callers changed.
+	Generate either kind of return pattern and update the JUMP_LABEL.
+	(thread_prologue_and_epilogue_insns): Implement a form of
+	shrink-wrapping.  Ensure JUMP_LABELs for return insns are set.
+	* print-rtl.c (print_rtx): Handle returns in JUMP_LABELs.
+	* cfglayout.c (fixup_reorder_chain): Ensure JUMP_LABELs for returns
+	remain correct.
+	* resource.c (find_dead_or_set_registers): Check JUMP_LABELs for
+	returns.
+	(mark_target_live_regs): Don't pass a return rtx to next_active_insn.
+	* basic-block.h (force_nonfallthru_and_redirect): Declare.
+	* sched-vis.c (print_pattern): Add case for SIMPLE_RETURN.
+	* cfgrtl.c (force_nonfallthru_and_redirect): No longer static.  New arg
+	JUMP_LABEL.  All callers changed.  Use the label when generating
+	return insns.
+
+	* config/i386/i386.md (returns, return_str, return_cond): New
+	code_iterator and corresponding code_attrs.
+	(<return_str>return): Renamed from return and adapted.
+	(<return_str>return_internal): Likewise for return_internal.
+	(<return_str>return_internal_long): Likewise for return_internal_long.
+	(<return_str>return_pop_internal): Likewise for return_pop_internal.
+	(<return_str>return_indirect_internal): Likewise for
+	return_indirect_internal.
+	* config/i386/i386.c (ix86_expand_epilogue): Expand a simple_return as
+	the last insn.
+	(ix86_pad_returns): Handle both kinds of return rtx.
+	* config/arm/arm.c (use_simple_return_p): new function.
+	(is_jump_table): Handle returns in JUMP_LABELs.
+	(output_return_instruction): New arg SIMPLE.  All callers changed.
+	Use it to determine which kind of return to generate.
+	(arm_final_prescan_insn): Handle both kinds of return.
+	* config/arm/arm.md (returns, return_str, return_simple_p,
+	return_cond): New code_iterator and corresponding code_attrs.
+	(<return_str>return): Renamed from return and adapted.
+	(arm_<return_str>return): Renamed from arm_return and adapted.
+	(cond_<return_str>return): Renamed from cond_return and adapted.
+	(cond_<return_str>return_inverted): Renamed from cond_return_inverted
+	and adapted.
+	(epilogue): Use ret_rtx instead of gen_rtx_RETURN.
+	* config/arm/thumb2.md (thumb2_<return_str>return): Renamed from
+	thumb2_return and adapted.
+	* config/arm/arm.h (RETURN_ADDR_REGNUM): Define.
+	* config/arm/arm-protos.h (use_simple_return_p): Declare.
+	(output_return_instruction): Adjust declaration.
+	* config/mips/mips.c (mips_expand_epilogue): Generate a simple_return
+	as final insn.
+	* config/mips/mips.md (simple_return): New expander.
+	(*simple_return, simple_return_internal): New patterns.
+	* config/sh/sh.c (barrier_align): Handle return in a JUMP_LABEL.
+	(split_branches): Don't pass a null label to redirect_jump.
+
+	From mainline:
+	* vec.h (FOR_EACH_VEC_ELT, FOR_EACH_VEC_ELT_REVERSE): New macros.
+	* haifa-sched.c (find_fallthru_edge_from): Rename from
+	find_fallthru_edge.  All callers changed.
+	* sched-int.h (find_fallthru_edge_from): Rename declaration as well.
+	* basic-block.h (find_fallthru_edge): New inline function.
+
+=== modified file 'gcc/basic-block.h'
+--- old/gcc/basic-block.h	2010-09-01 13:29:58 +0000
++++ new/gcc/basic-block.h	2011-01-05 12:12:18 +0000
+@@ -884,6 +884,7 @@
+ 
+ /* In cfgrtl.c  */
+ extern basic_block force_nonfallthru (edge);
++extern basic_block force_nonfallthru_and_redirect (edge, basic_block, rtx);
+ extern rtx block_label (basic_block);
+ extern bool purge_all_dead_edges (void);
+ extern bool purge_dead_edges (basic_block);
+@@ -1004,6 +1005,20 @@
+   return false;
+ }
+ 
++/* Return the fallthru edge in EDGES if it exists, NULL otherwise.  */
++static inline edge
++find_fallthru_edge (VEC(edge,gc) *edges)
++{
++  edge e;
++  edge_iterator ei;
++
++  FOR_EACH_EDGE (e, ei, edges)
++    if (e->flags & EDGE_FALLTHRU)
++      break;
++
++  return e;
++}
++
+ /* In cfgloopmanip.c.  */
+ extern edge mfb_kj_edge;
+ extern bool mfb_keep_just (edge);
+
+=== modified file 'gcc/cfganal.c'
+--- old/gcc/cfganal.c	2009-11-25 10:55:54 +0000
++++ new/gcc/cfganal.c	2011-01-05 12:12:18 +0000
+@@ -271,6 +271,37 @@
+       EDGE_SUCC (bb, 0)->flags |= EDGE_CAN_FALLTHRU;
+       EDGE_SUCC (bb, 1)->flags |= EDGE_CAN_FALLTHRU;
+     }
++  /* dwarf2out expects that a NOTE_INSN_EPILOGUE_BEGIN is always paired
++     with a return or a sibcall.  Ensure that this remains the case if
++     they are in different basic blocks.  */
++  FOR_EACH_BB (bb)
++    {
++      edge e;
++      edge_iterator ei;
++      rtx insn, end;
++
++      end = BB_END (bb);
++      FOR_BB_INSNS (bb, insn)
++	if (GET_CODE (insn) == NOTE
++	    && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG
++	    && !(CALL_P (end) && SIBLING_CALL_P (end))
++	    && !returnjump_p (end))
++	  {
++	    basic_block other_bb = NULL;
++	    FOR_EACH_EDGE (e, ei, bb->succs)
++	      {
++		if (e->flags & EDGE_FALLTHRU)
++		  other_bb = e->dest;
++		else
++		  e->flags &= ~EDGE_CAN_FALLTHRU;
++	      }
++	    FOR_EACH_EDGE (e, ei, other_bb->preds)
++	      {
++		if (!(e->flags & EDGE_FALLTHRU))
++		  e->flags &= ~EDGE_CAN_FALLTHRU;
++	      }	    
++	  }
++    }
+ }
+ 
+ /* Find unreachable blocks.  An unreachable block will have 0 in
+
+=== modified file 'gcc/cfglayout.c'
+--- old/gcc/cfglayout.c	2010-05-17 16:30:54 +0000
++++ new/gcc/cfglayout.c	2011-01-05 12:12:18 +0000
+@@ -766,6 +766,7 @@
+     {
+       edge e_fall, e_taken, e;
+       rtx bb_end_insn;
++      rtx ret_label = NULL_RTX;
+       basic_block nb;
+       edge_iterator ei;
+ 
+@@ -785,6 +786,7 @@
+       bb_end_insn = BB_END (bb);
+       if (JUMP_P (bb_end_insn))
+ 	{
++	  ret_label = JUMP_LABEL (bb_end_insn);
+ 	  if (any_condjump_p (bb_end_insn))
+ 	    {
+ 	      /* This might happen if the conditional jump has side
+@@ -899,7 +901,7 @@
+ 	}
+ 
+       /* We got here if we need to add a new jump insn.  */
+-      nb = force_nonfallthru (e_fall);
++      nb = force_nonfallthru_and_redirect (e_fall, e_fall->dest, ret_label);
+       if (nb)
+ 	{
+ 	  nb->il.rtl->visited = 1;
+@@ -1118,24 +1120,30 @@
+ bool
+ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
+ {
++  rtx insn;
++
+   /* Do not attempt to duplicate tablejumps, as we need to unshare
+      the dispatch table.  This is difficult to do, as the instructions
+      computing jump destination may be hoisted outside the basic block.  */
+   if (tablejump_p (BB_END (bb), NULL, NULL))
+     return false;
+ 
+-  /* Do not duplicate blocks containing insns that can't be copied.  */
+-  if (targetm.cannot_copy_insn_p)
++  insn = BB_HEAD (bb);
++  while (1)
+     {
+-      rtx insn = BB_HEAD (bb);
+-      while (1)
+-	{
+-	  if (INSN_P (insn) && targetm.cannot_copy_insn_p (insn))
+-	    return false;
+-	  if (insn == BB_END (bb))
+-	    break;
+-	  insn = NEXT_INSN (insn);
+-	}
++      /* Do not duplicate blocks containing insns that can't be copied.  */
++      if (INSN_P (insn) && targetm.cannot_copy_insn_p
++	  && targetm.cannot_copy_insn_p (insn))
++	return false;
++      /* dwarf2out expects that these notes are always paired with a
++	 returnjump or sibling call.  */
++      if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG
++	  && !returnjump_p (BB_END (bb))
++	  && (!CALL_P (BB_END (bb)) || !SIBLING_CALL_P (BB_END (bb))))
++	return false;
++      if (insn == BB_END (bb))
++	break;
++      insn = NEXT_INSN (insn);
+     }
+ 
+   return true;
+@@ -1167,6 +1175,9 @@
+ 	      || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
+ 	    break;
+ 	  copy = emit_copy_of_insn_after (insn, get_last_insn ());
++	  if (JUMP_P (insn) && JUMP_LABEL (insn) != NULL_RTX
++	      && ANY_RETURN_P (JUMP_LABEL (insn)))
++	    JUMP_LABEL (copy) = JUMP_LABEL (insn);
+           maybe_copy_epilogue_insn (insn, copy);
+ 	  break;
+ 
+
+=== modified file 'gcc/cfgrtl.c'
+--- old/gcc/cfgrtl.c	2010-09-20 21:30:35 +0000
++++ new/gcc/cfgrtl.c	2011-01-05 12:12:18 +0000
+@@ -1107,10 +1107,13 @@
+ }
+ 
+ /* Like force_nonfallthru below, but additionally performs redirection
+-   Used by redirect_edge_and_branch_force.  */
++   Used by redirect_edge_and_branch_force.  JUMP_LABEL is used only
++   when redirecting to the EXIT_BLOCK, it is either a return or a
++   simple_return rtx indicating which kind of returnjump to create.
++   It should be NULL otherwise.  */
+ 
+-static basic_block
+-force_nonfallthru_and_redirect (edge e, basic_block target)
++basic_block
++force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
+ {
+   basic_block jump_block, new_bb = NULL, src = e->src;
+   rtx note;
+@@ -1242,11 +1245,25 @@
+   e->flags &= ~EDGE_FALLTHRU;
+   if (target == EXIT_BLOCK_PTR)
+     {
++      if (jump_label == ret_rtx)
++	{
+ #ifdef HAVE_return
+-	emit_jump_insn_after_setloc (gen_return (), BB_END (jump_block), loc);
+-#else
+-	gcc_unreachable ();
+-#endif
++	  emit_jump_insn_after_setloc (gen_return (), BB_END (jump_block),
++				       loc);
++#else
++	  gcc_unreachable ();
++#endif
++	}
++      else
++	{
++	  gcc_assert (jump_label == simple_return_rtx);
++#ifdef HAVE_simple_return
++	  emit_jump_insn_after_setloc (gen_simple_return (),
++				       BB_END (jump_block), loc);
++#else
++	  gcc_unreachable ();
++#endif
++	}
+     }
+   else
+     {
+@@ -1273,7 +1290,7 @@
+ basic_block
+ force_nonfallthru (edge e)
+ {
+-  return force_nonfallthru_and_redirect (e, e->dest);
++  return force_nonfallthru_and_redirect (e, e->dest, NULL_RTX);
+ }
+ 
+ /* Redirect edge even at the expense of creating new jump insn or
+@@ -1290,7 +1307,7 @@
+   /* In case the edge redirection failed, try to force it to be non-fallthru
+      and redirect newly created simplejump.  */
+   df_set_bb_dirty (e->src);
+-  return force_nonfallthru_and_redirect (e, target);
++  return force_nonfallthru_and_redirect (e, target, NULL_RTX);
+ }
+ 
+ /* The given edge should potentially be a fallthru edge.  If that is in
+
+=== modified file 'gcc/common.opt'
+--- old/gcc/common.opt	2010-12-10 15:33:37 +0000
++++ new/gcc/common.opt	2011-01-05 12:12:18 +0000
+@@ -1147,6 +1147,11 @@
+ Common C ObjC C++ ObjC++ Report Var(flag_show_column) Init(1)
+ Show column numbers in diagnostics, when available.  Default on
+ 
++fshrink-wrap
++Common Report Var(flag_shrink_wrap) Optimization
++Emit function prologues only before parts of the function that need it,
++rather than at the top of the function.
++
+ fsignaling-nans
+ Common Report Var(flag_signaling_nans) Optimization
+ Disable optimizations observable by IEEE signaling NaNs
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+--- old/gcc/config/arm/arm-protos.h	2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/arm-protos.h	2011-01-05 12:12:18 +0000
+@@ -26,6 +26,7 @@
+ extern void arm_override_options (void);
+ extern void arm_optimization_options (int, int);
+ extern int use_return_insn (int, rtx);
++extern bool use_simple_return_p (void);
+ extern enum reg_class arm_regno_class (int);
+ extern void arm_load_pic_register (unsigned long);
+ extern int arm_volatile_func (void);
+@@ -137,7 +138,7 @@
+ extern const char *output_add_immediate (rtx *);
+ extern const char *arithmetic_instr (rtx, int);
+ extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
+-extern const char *output_return_instruction (rtx, int, int);
++extern const char *output_return_instruction (rtx, bool, bool, bool);
+ extern void arm_poke_function_name (FILE *, const char *);
+ extern void arm_print_operand (FILE *, rtx, int);
+ extern void arm_print_operand_address (FILE *, rtx);
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2011-01-05 11:32:50 +0000
++++ new/gcc/config/arm/arm.c	2011-01-05 12:12:18 +0000
+@@ -2163,6 +2163,18 @@
+   return addr;
+ }
+ 
++/* Return true if we should try to use a simple_return insn, i.e. perform
++   shrink-wrapping if possible.  This is the case if we need to emit a
++   prologue, which we can test by looking at the offsets.  */
++bool
++use_simple_return_p (void)
++{
++  arm_stack_offsets *offsets;
++
++  offsets = arm_get_frame_offsets ();
++  return offsets->outgoing_args != 0;
++}
++
+ /* Return 1 if it is possible to return using a single instruction.
+    If SIBLING is non-null, this is a test for a return before a sibling
+    call.  SIBLING is the call insn, so we can examine its register usage.  */
+@@ -11284,6 +11296,7 @@
+ 
+   if (GET_CODE (insn) == JUMP_INSN
+       && JUMP_LABEL (insn) != NULL
++      && !ANY_RETURN_P (JUMP_LABEL (insn))
+       && ((table = next_real_insn (JUMP_LABEL (insn)))
+ 	  == next_real_insn (insn))
+       && table != NULL
+@@ -14168,7 +14181,7 @@
+ /* Generate a function exit sequence.  If REALLY_RETURN is false, then do
+    everything bar the final return instruction.  */
+ const char *
+-output_return_instruction (rtx operand, int really_return, int reverse)
++output_return_instruction (rtx operand, bool really_return, bool reverse, bool simple)
+ {
+   char conditional[10];
+   char instr[100];
+@@ -14206,10 +14219,15 @@
+ 
+   sprintf (conditional, "%%?%%%c0", reverse ? 'D' : 'd');
+ 
+-  cfun->machine->return_used_this_function = 1;
++  if (simple)
++    live_regs_mask = 0;
++  else
++    {
++      cfun->machine->return_used_this_function = 1;
+ 
+-  offsets = arm_get_frame_offsets ();
+-  live_regs_mask = offsets->saved_regs_mask;
++      offsets = arm_get_frame_offsets ();
++      live_regs_mask = offsets->saved_regs_mask;
++    }
+ 
+   if (live_regs_mask)
+     {
+@@ -17108,6 +17126,7 @@
+ 
+   /* If we start with a return insn, we only succeed if we find another one.  */
+   int seeking_return = 0;
++  enum rtx_code return_code = UNKNOWN;
+ 
+   /* START_INSN will hold the insn from where we start looking.  This is the
+      first insn after the following code_label if REVERSE is true.  */
+@@ -17146,7 +17165,7 @@
+ 	  else
+ 	    return;
+ 	}
+-      else if (GET_CODE (body) == RETURN)
++      else if (ANY_RETURN_P (body))
+         {
+ 	  start_insn = next_nonnote_insn (start_insn);
+ 	  if (GET_CODE (start_insn) == BARRIER)
+@@ -17157,6 +17176,7 @@
+ 	    {
+ 	      reverse = TRUE;
+ 	      seeking_return = 1;
++	      return_code = GET_CODE (body);
+ 	    }
+ 	  else
+ 	    return;
+@@ -17197,11 +17217,15 @@
+ 	  label = XEXP (XEXP (SET_SRC (body), 2), 0);
+ 	  then_not_else = FALSE;
+ 	}
+-      else if (GET_CODE (XEXP (SET_SRC (body), 1)) == RETURN)
+-	seeking_return = 1;
+-      else if (GET_CODE (XEXP (SET_SRC (body), 2)) == RETURN)
++      else if (ANY_RETURN_P (XEXP (SET_SRC (body), 1)))
++	{
++	  seeking_return = 1;
++	  return_code = GET_CODE (XEXP (SET_SRC (body), 1));
++	}
++      else if (ANY_RETURN_P (XEXP (SET_SRC (body), 2)))
+         {
+ 	  seeking_return = 1;
++	  return_code = GET_CODE (XEXP (SET_SRC (body), 2));
+ 	  then_not_else = FALSE;
+         }
+       else
+@@ -17302,8 +17326,7 @@
+ 		       && !use_return_insn (TRUE, NULL)
+ 		       && !optimize_size)
+ 		fail = TRUE;
+-	      else if (GET_CODE (scanbody) == RETURN
+-		       && seeking_return)
++	      else if (GET_CODE (scanbody) == return_code)
+ 	        {
+ 		  arm_ccfsm_state = 2;
+ 		  succeed = TRUE;
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2010-11-11 11:12:14 +0000
++++ new/gcc/config/arm/arm.h	2011-01-05 12:12:18 +0000
+@@ -2622,6 +2622,8 @@
+ #define RETURN_ADDR_RTX(COUNT, FRAME) \
+   arm_return_addr (COUNT, FRAME)
+ 
++#define RETURN_ADDR_REGNUM LR_REGNUM
++
+ /* Mask of the bits in the PC that contain the real return address
+    when running in 26-bit mode.  */
+ #define RETURN_ADDR_MASK26 (0x03fffffc)
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2011-01-05 11:52:16 +0000
++++ new/gcc/config/arm/arm.md	2011-01-05 12:12:18 +0000
+@@ -8882,66 +8882,72 @@
+   [(set_attr "type" "call")]
+ )
+ 
+-(define_expand "return"
+-  [(return)]
+-  "TARGET_32BIT && USE_RETURN_INSN (FALSE)"
++;; Both kinds of return insn.
++(define_code_iterator returns [return simple_return])
++(define_code_attr return_str [(return "") (simple_return "simple_")])
++(define_code_attr return_simple_p [(return "false") (simple_return "true")])
++(define_code_attr return_cond [(return " && USE_RETURN_INSN (FALSE)")
++			       (simple_return " && use_simple_return_p ()")])
++
++(define_expand "<return_str>return"
++  [(returns)]
++  "TARGET_32BIT<return_cond>"
+   "")
+ 
+-;; Often the return insn will be the same as loading from memory, so set attr
+-(define_insn "*arm_return"
+-  [(return)]
+-  "TARGET_ARM && USE_RETURN_INSN (FALSE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (const_true_rtx, TRUE, FALSE);
+-  }"
++(define_insn "*arm_<return_str>return"
++  [(returns)]
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (const_true_rtx, true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "type" "load1")
+    (set_attr "length" "12")
+    (set_attr "predicable" "yes")]
+ )
+ 
+-(define_insn "*cond_return"
++(define_insn "*cond_<return_str>return"
+   [(set (pc)
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+-                      (return)
++                      (returns)
+                       (pc)))]
+-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (operands[0], TRUE, FALSE);
+-  }"
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (operands[0], true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "conds" "use")
+    (set_attr "length" "12")
+    (set_attr "type" "load1")]
+ )
+ 
+-(define_insn "*cond_return_inverted"
++(define_insn "*cond_<return_str>return_inverted"
+   [(set (pc)
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+                       (pc)
+-		      (return)))]
+-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (operands[0], TRUE, TRUE);
+-  }"
++		      (returns)))]
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (operands[0], true, true,
++				    <return_simple_p>);
++}
+   [(set_attr "conds" "use")
+    (set_attr "length" "12")
+    (set_attr "type" "load1")]
+@@ -10809,8 +10815,7 @@
+       DONE;
+     }
+   emit_jump_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
+-	gen_rtvec (1,
+-		gen_rtx_RETURN (VOIDmode)),
++	gen_rtvec (1, ret_rtx),
+ 	VUNSPEC_EPILOGUE));
+   DONE;
+   "
+@@ -10827,7 +10832,7 @@
+   "TARGET_32BIT"
+   "*
+   if (use_return_insn (FALSE, next_nonnote_insn (insn)))
+-    return output_return_instruction (const_true_rtx, FALSE, FALSE);
++    return output_return_instruction (const_true_rtx, false, false, false);
+   return arm_output_epilogue (next_nonnote_insn (insn));
+   "
+ ;; Length is absolute worst case
+
+=== modified file 'gcc/config/arm/thumb2.md'
+--- old/gcc/config/arm/thumb2.md	2010-09-22 05:54:42 +0000
++++ new/gcc/config/arm/thumb2.md	2011-01-05 12:12:18 +0000
+@@ -1020,16 +1020,15 @@
+ 
+ ;; Note: this is not predicable, to avoid issues with linker-generated
+ ;; interworking stubs.
+-(define_insn "*thumb2_return"
+-  [(return)]
+-  "TARGET_THUMB2 && USE_RETURN_INSN (FALSE)"
+-  "*
+-  {
+-    return output_return_instruction (const_true_rtx, TRUE, FALSE);
+-  }"
++(define_insn "*thumb2_<return_str>return"
++  [(returns)]
++  "TARGET_THUMB2<return_cond>"
++{
++  return output_return_instruction (const_true_rtx, true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "type" "load1")
+-   (set_attr "length" "12")]
+-)
++   (set_attr "length" "12")])
+ 
+ (define_insn_and_split "thumb2_eh_return"
+   [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "r")]
+
+=== modified file 'gcc/config/i386/i386.c'
+--- old/gcc/config/i386/i386.c	2010-11-16 18:05:53 +0000
++++ new/gcc/config/i386/i386.c	2011-01-05 12:12:18 +0000
+@@ -9308,13 +9308,13 @@
+ 
+ 	  pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
+ 				     popc, -1, true);
+-	  emit_jump_insn (gen_return_indirect_internal (ecx));
++	  emit_jump_insn (gen_simple_return_indirect_internal (ecx));
+ 	}
+       else
+-	emit_jump_insn (gen_return_pop_internal (popc));
++	emit_jump_insn (gen_simple_return_pop_internal (popc));
+     }
+   else
+-    emit_jump_insn (gen_return_internal ());
++    emit_jump_insn (gen_simple_return_internal ());
+ 
+   /* Restore the state back to the state from the prologue,
+      so that it's correct for the next epilogue.  */
+@@ -26596,7 +26596,7 @@
+       rtx prev;
+       bool replace = false;
+ 
+-      if (!JUMP_P (ret) || GET_CODE (PATTERN (ret)) != RETURN
++      if (!JUMP_P (ret) || !ANY_RETURN_P (PATTERN (ret))
+ 	  || optimize_bb_for_size_p (bb))
+ 	continue;
+       for (prev = PREV_INSN (ret); prev; prev = PREV_INSN (prev))
+@@ -26626,7 +26626,10 @@
+ 	}
+       if (replace)
+ 	{
+-	  emit_jump_insn_before (gen_return_internal_long (), ret);
++	  if (PATTERN (ret) == ret_rtx)
++	    emit_jump_insn_before (gen_return_internal_long (), ret);
++	  else
++	    emit_jump_insn_before (gen_simple_return_internal_long (), ret);
+ 	  delete_insn (ret);
+ 	}
+     }
+
+=== modified file 'gcc/config/i386/i386.md'
+--- old/gcc/config/i386/i386.md	2010-11-27 15:24:12 +0000
++++ new/gcc/config/i386/i386.md	2011-01-05 12:12:18 +0000
+@@ -13797,24 +13797,29 @@
+   ""
+   [(set_attr "length" "0")])
+ 
++(define_code_iterator returns [return simple_return])
++(define_code_attr return_str [(return "") (simple_return "simple_")])
++(define_code_attr return_cond [(return "ix86_can_use_return_insn_p ()")
++			       (simple_return "")])
++
+ ;; Insn emitted into the body of a function to return from a function.
+ ;; This is only done if the function's epilogue is known to be simple.
+ ;; See comments for ix86_can_use_return_insn_p in i386.c.
+ 
+-(define_expand "return"
+-  [(return)]
+-  "ix86_can_use_return_insn_p ()"
++(define_expand "<return_str>return"
++  [(returns)]
++  "<return_cond>"
+ {
+   if (crtl->args.pops_args)
+     {
+       rtx popc = GEN_INT (crtl->args.pops_args);
+-      emit_jump_insn (gen_return_pop_internal (popc));
++      emit_jump_insn (gen_<return_str>return_pop_internal (popc));
+       DONE;
+     }
+ })
+ 
+-(define_insn "return_internal"
+-  [(return)]
++(define_insn "<return_str>return_internal"
++  [(returns)]
+   "reload_completed"
+   "ret"
+   [(set_attr "length" "1")
+@@ -13825,8 +13830,8 @@
+ ;; Used by x86_machine_dependent_reorg to avoid penalty on single byte RET
+ ;; instruction Athlon and K8 have.
+ 
+-(define_insn "return_internal_long"
+-  [(return)
++(define_insn "<return_str>return_internal_long"
++  [(returns)
+    (unspec [(const_int 0)] UNSPEC_REP)]
+   "reload_completed"
+   "rep\;ret"
+@@ -13836,8 +13841,8 @@
+    (set_attr "prefix_rep" "1")
+    (set_attr "modrm" "0")])
+ 
+-(define_insn "return_pop_internal"
+-  [(return)
++(define_insn "<return_str>return_pop_internal"
++  [(returns)
+    (use (match_operand:SI 0 "const_int_operand" ""))]
+   "reload_completed"
+   "ret\t%0"
+@@ -13846,8 +13851,8 @@
+    (set_attr "length_immediate" "2")
+    (set_attr "modrm" "0")])
+ 
+-(define_insn "return_indirect_internal"
+-  [(return)
++(define_insn "<return_str>return_indirect_internal"
++  [(returns)
+    (use (match_operand:SI 0 "register_operand" "r"))]
+   "reload_completed"
+   "jmp\t%A0"
+
+=== modified file 'gcc/config/mips/mips.c'
+--- old/gcc/config/mips/mips.c	2010-11-21 10:38:43 +0000
++++ new/gcc/config/mips/mips.c	2011-01-05 12:12:18 +0000
+@@ -10497,7 +10497,8 @@
+ 	    regno = GP_REG_FIRST + 7;
+ 	  else
+ 	    regno = RETURN_ADDR_REGNUM;
+-	  emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, regno)));
++	  emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
++								   regno)));
+ 	}
+     }
+ 
+
+=== modified file 'gcc/config/mips/mips.md'
+--- old/gcc/config/mips/mips.md	2010-04-02 18:54:46 +0000
++++ new/gcc/config/mips/mips.md	2011-01-05 12:12:18 +0000
+@@ -5815,6 +5815,18 @@
+   [(set_attr "type"	"jump")
+    (set_attr "mode"	"none")])
+ 
++(define_expand "simple_return"
++  [(simple_return)]
++  "!mips_can_use_return_insn ()"
++  { mips_expand_before_return (); })
++
++(define_insn "*simple_return"
++  [(simple_return)]
++  "!mips_can_use_return_insn ()"
++  "%*j\t$31%/"
++  [(set_attr "type"	"jump")
++   (set_attr "mode"	"none")])
++
+ ;; Normal return.
+ 
+ (define_insn "return_internal"
+@@ -5825,6 +5837,14 @@
+   [(set_attr "type"	"jump")
+    (set_attr "mode"	"none")])
+ 
++(define_insn "simple_return_internal"
++  [(simple_return)
++   (use (match_operand 0 "pmode_register_operand" ""))]
++  ""
++  "%*j\t%0%/"
++  [(set_attr "type"	"jump")
++   (set_attr "mode"	"none")])
++
+ ;; Exception return.
+ (define_insn "mips_eret"
+   [(return)
+
+=== modified file 'gcc/config/sh/sh.c'
+--- old/gcc/config/sh/sh.c	2010-12-10 15:34:19 +0000
++++ new/gcc/config/sh/sh.c	2011-01-05 12:12:18 +0000
+@@ -5252,7 +5252,8 @@
+ 	}
+       if (prev
+ 	  && JUMP_P (prev)
+-	  && JUMP_LABEL (prev))
++	  && JUMP_LABEL (prev)
++	  && !ANY_RETURN_P (JUMP_LABEL (prev)))
+ 	{
+ 	  rtx x;
+ 	  if (jump_to_next
+@@ -5951,7 +5952,7 @@
+ 			JUMP_LABEL (insn) = far_label;
+ 			LABEL_NUSES (far_label)++;
+ 		      }
+-		    redirect_jump (insn, NULL_RTX, 1);
++		    redirect_jump (insn, ret_rtx, 1);
+ 		    far_label = 0;
+ 		  }
+ 	      }
+
+=== modified file 'gcc/df-scan.c'
+--- old/gcc/df-scan.c	2010-11-16 22:17:17 +0000
++++ new/gcc/df-scan.c	2011-01-05 12:12:18 +0000
+@@ -3296,6 +3296,7 @@
+       }
+ 
+     case RETURN:
++    case SIMPLE_RETURN:
+       break;
+ 
+     case ASM_OPERANDS:
+
+=== modified file 'gcc/doc/invoke.texi'
+--- old/gcc/doc/invoke.texi	2010-11-04 14:29:09 +0000
++++ new/gcc/doc/invoke.texi	2011-01-05 12:12:18 +0000
+@@ -5750,6 +5750,7 @@
+ -fipa-pure-const @gol
+ -fipa-reference @gol
+ -fmerge-constants
++-fshrink-wrap @gol
+ -fsplit-wide-types @gol
+ -ftree-builtin-call-dce @gol
+ -ftree-ccp @gol
+@@ -6504,6 +6505,12 @@
+ When pipelining loops during selective scheduling, also pipeline outer loops.
+ This option has no effect until @option{-fsel-sched-pipelining} is turned on.
+ 
++@item -fshrink-wrap
++@opindex fshrink-wrap
++Emit function prologues only before parts of the function that need it,
++rather than at the top of the function.  This flag is enabled by default at
++@option{-O} and higher.
++
+ @item -fcaller-saves
+ @opindex fcaller-saves
+ Enable values to be allocated in registers that will be clobbered by
+
+=== modified file 'gcc/doc/md.texi'
+--- old/gcc/doc/md.texi	2009-12-15 18:36:44 +0000
++++ new/gcc/doc/md.texi	2011-01-05 12:12:18 +0000
+@@ -4801,7 +4801,19 @@
+ multiple instructions are usually needed to return from a function, but
+ some class of functions only requires one instruction to implement a
+ return.  Normally, the applicable functions are those which do not need
+-to save any registers or allocate stack space.
++to save any registers or allocate stack space, although some targets
++have instructions that can perform both the epilogue and function return
++in one instruction.
++
++@cindex @code{simple_return} instruction pattern
++@item @samp{simple_return}
++Subroutine return instruction.  This instruction pattern name should be
++defined only if a single instruction can do all the work of returning
++from a function on a path where no epilogue is required.  This pattern
++is very similar to the @code{return} instruction pattern, but it is emitted
++only by the shrink-wrapping optimization on paths where the function
++prologue has not been executed, and a function return should occur without
++any of the effects of the epilogue.
+ 
+ @findex reload_completed
+ @findex leaf_function_p
+
+=== modified file 'gcc/doc/rtl.texi'
+--- old/gcc/doc/rtl.texi	2010-07-06 19:23:53 +0000
++++ new/gcc/doc/rtl.texi	2011-01-05 12:12:18 +0000
+@@ -2888,6 +2888,13 @@
+ Note that an insn pattern of @code{(return)} is logically equivalent to
+ @code{(set (pc) (return))}, but the latter form is never used.
+ 
++@findex simple_return
++@item (simple_return)
++Like @code{(return)}, but truly represents only a function return, while
++@code{(return)} may represent an insn that also performs other functions
++of the function epilogue.  Like @code{(return)}, this may also occur in
++conditional jumps.
++
+ @findex call
+ @item (call @var{function} @var{nargs})
+ Represents a function call.  @var{function} is a @code{mem} expression
+@@ -3017,7 +3024,7 @@
+ brackets stand for a vector; the operand of @code{parallel} is a
+ vector of expressions.  @var{x0}, @var{x1} and so on are individual
+ side effect expressions---expressions of code @code{set}, @code{call},
+-@code{return}, @code{clobber} or @code{use}.
++@code{return}, @code{simple_return}, @code{clobber} or @code{use}.
+ 
+ ``In parallel'' means that first all the values used in the individual
+ side-effects are computed, and second all the actual side-effects are
+@@ -3656,14 +3663,16 @@
+ @table @code
+ @findex PATTERN
+ @item PATTERN (@var{i})
+-An expression for the side effect performed by this insn.  This must be
+-one of the following codes: @code{set}, @code{call}, @code{use},
+-@code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
+-@code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
+-@code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a @code{parallel},
+-each element of the @code{parallel} must be one these codes, except that
+-@code{parallel} expressions cannot be nested and @code{addr_vec} and
+-@code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
++An expression for the side effect performed by this insn.  This must
++be one of the following codes: @code{set}, @code{call}, @code{use},
++@code{clobber}, @code{return}, @code{simple_return}, @code{asm_input},
++@code{asm_output}, @code{addr_vec}, @code{addr_diff_vec},
++@code{trap_if}, @code{unspec}, @code{unspec_volatile},
++@code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a
++@code{parallel}, each element of the @code{parallel} must be one these
++codes, except that @code{parallel} expressions cannot be nested and
++@code{addr_vec} and @code{addr_diff_vec} are not permitted inside a
++@code{parallel} expression.
+ 
+ @findex INSN_CODE
+ @item INSN_CODE (@var{i})
+
+=== modified file 'gcc/doc/tm.texi'
+--- old/gcc/doc/tm.texi	2010-09-01 13:29:58 +0000
++++ new/gcc/doc/tm.texi	2011-01-05 12:12:18 +0000
+@@ -3287,6 +3287,12 @@
+ from the frame pointer of the previous stack frame.
+ @end defmac
+ 
++@defmac RETURN_ADDR_REGNUM
++If defined, a C expression whose value is the register number of the return
++address for the current function.  Targets that pass the return address on
++the stack should not define this macro.
++@end defmac
++
+ @defmac INCOMING_RETURN_ADDR_RTX
+ A C expression whose value is RTL representing the location of the
+ incoming return address at the beginning of any function, before the
+
+=== modified file 'gcc/dwarf2out.c'
+--- old/gcc/dwarf2out.c	2010-12-21 18:46:10 +0000
++++ new/gcc/dwarf2out.c	2011-01-05 12:12:18 +0000
+@@ -1396,7 +1396,7 @@
+     {
+       rtx dest = JUMP_LABEL (insn);
+ 
+-      if (dest)
++      if (dest && !ANY_RETURN_P (dest))
+ 	{
+ 	  if (barrier_args_size [INSN_UID (dest)] < 0)
+ 	    {
+
+=== modified file 'gcc/emit-rtl.c'
+--- old/gcc/emit-rtl.c	2010-10-04 00:50:43 +0000
++++ new/gcc/emit-rtl.c	2011-01-05 12:12:18 +0000
+@@ -2432,6 +2432,8 @@
+     case CODE_LABEL:
+     case PC:
+     case CC0:
++    case RETURN:
++    case SIMPLE_RETURN:
+     case SCRATCH:
+       return;
+       /* SCRATCH must be shared because they represent distinct values.  */
+@@ -3323,14 +3325,17 @@
+   return insn;
+ }
+ 
+-/* Return the last label to mark the same position as LABEL.  Return null
+-   if LABEL itself is null.  */
++/* Return the last label to mark the same position as LABEL.  Return LABEL
++   itself if it is null or any return rtx.  */
+ 
+ rtx
+ skip_consecutive_labels (rtx label)
+ {
+   rtx insn;
+ 
++  if (label && ANY_RETURN_P (label))
++    return label;
++
+   for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
+     if (LABEL_P (insn))
+       label = insn;
+@@ -5209,7 +5214,7 @@
+     return CODE_LABEL;
+   if (GET_CODE (x) == CALL)
+     return CALL_INSN;
+-  if (GET_CODE (x) == RETURN)
++  if (GET_CODE (x) == RETURN || GET_CODE (x) == SIMPLE_RETURN)
+     return JUMP_INSN;
+   if (GET_CODE (x) == SET)
+     {
+@@ -5715,8 +5720,10 @@
+   init_reg_modes_target ();
+ 
+   /* Assign register numbers to the globally defined register rtx.  */
+-  pc_rtx = gen_rtx_PC (VOIDmode);
+-  cc0_rtx = gen_rtx_CC0 (VOIDmode);
++  pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
++  ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
++  simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
++  cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
+   stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
+   frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
+   hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
+
+=== modified file 'gcc/final.c'
+--- old/gcc/final.c	2010-03-26 16:18:51 +0000
++++ new/gcc/final.c	2011-01-05 12:12:18 +0000
+@@ -2428,7 +2428,7 @@
+ 	        delete_insn (insn);
+ 		break;
+ 	      }
+-	    else if (GET_CODE (SET_SRC (body)) == RETURN)
++	    else if (ANY_RETURN_P (SET_SRC (body)))
+ 	      /* Replace (set (pc) (return)) with (return).  */
+ 	      PATTERN (insn) = body = SET_SRC (body);
+ 
+
+=== modified file 'gcc/function.c'
+--- old/gcc/function.c	2010-08-16 19:18:08 +0000
++++ new/gcc/function.c	2011-01-05 12:12:18 +0000
+@@ -147,9 +147,6 @@
+    can always export `prologue_epilogue_contains'.  */
+ static void record_insns (rtx, rtx, htab_t *) ATTRIBUTE_UNUSED;
+ static bool contains (const_rtx, htab_t);
+-#ifdef HAVE_return
+-static void emit_return_into_block (basic_block);
+-#endif
+ static void prepare_function_start (void);
+ static void do_clobber_return_reg (rtx, void *);
+ static void do_use_return_reg (rtx, void *);
+@@ -4987,35 +4984,189 @@
+   return 0;
+ }
+ 
++#ifdef HAVE_simple_return
++/* This collects sets and clobbers of hard registers in a HARD_REG_SET,
++   which is pointed to by DATA.  */
++static void
++record_hard_reg_sets (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
++{
++  HARD_REG_SET *pset = (HARD_REG_SET *)data;
++  if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
++    {
++      int nregs = hard_regno_nregs[REGNO (x)][GET_MODE (x)];
++      while (nregs-- > 0)
++	SET_HARD_REG_BIT (*pset, REGNO (x) + nregs);
++    }
++}
++
++/* A subroutine of requires_stack_frame_p, called via for_each_rtx.
++   If any change is made, set CHANGED
++   to true.  */
++
++static int
++frame_required_for_rtx (rtx *loc, void *data ATTRIBUTE_UNUSED)
++{
++  rtx x = *loc;
++  if (x == stack_pointer_rtx || x == hard_frame_pointer_rtx
++      || x == arg_pointer_rtx || x == pic_offset_table_rtx
++#ifdef RETURN_ADDR_REGNUM
++      || (REG_P (x) && REGNO (x) == RETURN_ADDR_REGNUM)
++#endif
++      )
++    return 1;
++  return 0;
++}
++
++static bool
++requires_stack_frame_p (rtx insn)
++{
++  HARD_REG_SET hardregs;
++  unsigned regno;
++
++  if (!INSN_P (insn) || DEBUG_INSN_P (insn))
++    return false;
++  if (CALL_P (insn))
++    return !SIBLING_CALL_P (insn);
++  if (for_each_rtx (&PATTERN (insn), frame_required_for_rtx, NULL))
++    return true;
++  CLEAR_HARD_REG_SET (hardregs);
++  note_stores (PATTERN (insn), record_hard_reg_sets, &hardregs);
++  AND_COMPL_HARD_REG_SET (hardregs, call_used_reg_set);
++  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
++    if (TEST_HARD_REG_BIT (hardregs, regno)
++	&& df_regs_ever_live_p (regno))
++      return true;
++  return false;
++}
++#endif
++
+ #ifdef HAVE_return
+-/* Insert gen_return at the end of block BB.  This also means updating
+-   block_for_insn appropriately.  */
++
++static rtx
++gen_return_pattern (bool simple_p)
++{
++#ifdef HAVE_simple_return
++  return simple_p ? gen_simple_return () : gen_return ();
++#else
++  gcc_assert (!simple_p);
++  return gen_return ();
++#endif
++}
++
++/* Insert an appropriate return pattern at the end of block BB.  This
++   also means updating block_for_insn appropriately.  */
+ 
+ static void
+-emit_return_into_block (basic_block bb)
++emit_return_into_block (bool simple_p, basic_block bb)
+ {
+-  emit_jump_insn_after (gen_return (), BB_END (bb));
++  rtx jump;
++  jump = emit_jump_insn_after (gen_return_pattern (simple_p), BB_END (bb));
++  JUMP_LABEL (jump) = simple_p ? simple_return_rtx : ret_rtx;
+ }
+-#endif /* HAVE_return */
++#endif
+ 
+ /* Generate the prologue and epilogue RTL if the machine supports it.  Thread
+    this into place with notes indicating where the prologue ends and where
+-   the epilogue begins.  Update the basic block information when possible.  */
++   the epilogue begins.  Update the basic block information when possible.
++
++   Notes on epilogue placement:
++   There are several kinds of edges to the exit block:
++   * a single fallthru edge from LAST_BB
++   * possibly, edges from blocks containing sibcalls
++   * possibly, fake edges from infinite loops
++
++   The epilogue is always emitted on the fallthru edge from the last basic
++   block in the function, LAST_BB, into the exit block.
++
++   If LAST_BB is empty except for a label, it is the target of every
++   other basic block in the function that ends in a return.  If a
++   target has a return or simple_return pattern (possibly with
++   conditional variants), these basic blocks can be changed so that a
++   return insn is emitted into them, and their target is adjusted to
++   the real exit block.
++
++   Notes on shrink wrapping: We implement a fairly conservative
++   version of shrink-wrapping rather than the textbook one.  We only
++   generate a single prologue and a single epilogue.  This is
++   sufficient to catch a number of interesting cases involving early
++   exits.
++
++   First, we identify the blocks that require the prologue to occur before
++   them.  These are the ones that modify a call-saved register, or reference
++   any of the stack or frame pointer registers.  To simplify things, we then
++   mark everything reachable from these blocks as also requiring a prologue.
++   This takes care of loops automatically, and avoids the need to examine
++   whether MEMs reference the frame, since it is sufficient to check for
++   occurrences of the stack or frame pointer.
++
++   We then compute the set of blocks for which the need for a prologue
++   is anticipatable (borrowing terminology from the shrink-wrapping
++   description in Muchnick's book).  These are the blocks which either
++   require a prologue themselves, or those that have only successors
++   where the prologue is anticipatable.  The prologue needs to be
++   inserted on all edges from BB1->BB2 where BB2 is in ANTIC and BB1
++   is not.  For the moment, we ensure that only one such edge exists.
++
++   The epilogue is placed as described above, but we make a
++   distinction between inserting return and simple_return patterns
++   when modifying other blocks that end in a return.  Blocks that end
++   in a sibcall omit the sibcall_epilogue if the block is not in
++   ANTIC.  */
+ 
+ static void
+ thread_prologue_and_epilogue_insns (void)
+ {
+   int inserted = 0;
++  basic_block last_bb;
++  bool last_bb_active;
++#ifdef HAVE_simple_return
++  bool unconverted_simple_returns = false;
++  basic_block simple_return_block = NULL;
++#endif
++  rtx returnjump ATTRIBUTE_UNUSED;
++  rtx seq ATTRIBUTE_UNUSED, epilogue_end ATTRIBUTE_UNUSED;
++  rtx prologue_seq ATTRIBUTE_UNUSED, split_prologue_seq ATTRIBUTE_UNUSED;
++  edge entry_edge, orig_entry_edge, exit_fallthru_edge;
+   edge e;
+-#if defined (HAVE_sibcall_epilogue) || defined (HAVE_epilogue) || defined (HAVE_return) || defined (HAVE_prologue)
+-  rtx seq;
+-#endif
+-#if defined (HAVE_epilogue) || defined(HAVE_return)
+-  rtx epilogue_end = NULL_RTX;
+-#endif
+   edge_iterator ei;
++  bitmap_head bb_flags;
++
++  df_analyze ();
+ 
+   rtl_profile_for_bb (ENTRY_BLOCK_PTR);
++
++  epilogue_end = NULL_RTX;
++
++  /* Can't deal with multiple successors of the entry block at the
++     moment.  Function should always have at least one entry
++     point.  */
++  gcc_assert (single_succ_p (ENTRY_BLOCK_PTR));
++  entry_edge = single_succ_edge (ENTRY_BLOCK_PTR);
++  orig_entry_edge = entry_edge;
++
++  exit_fallthru_edge = find_fallthru_edge (EXIT_BLOCK_PTR->preds);
++  if (exit_fallthru_edge != NULL)
++    {
++      rtx label;
++
++      last_bb = exit_fallthru_edge->src;
++      /* Test whether there are active instructions in the last block.  */
++      label = BB_END (last_bb);
++      while (label && !LABEL_P (label))
++	{
++	  if (active_insn_p (label))
++	    break;
++	  label = PREV_INSN (label);
++	}
++
++      last_bb_active = BB_HEAD (last_bb) != label || !LABEL_P (label);
++    }
++  else
++    {
++      last_bb = NULL;
++      last_bb_active = false;
++    }
++
+ #ifdef HAVE_prologue
+   if (HAVE_prologue)
+     {
+@@ -5040,19 +5191,168 @@
+         emit_insn (gen_blockage ());
+ #endif
+ 
+-      seq = get_insns ();
++      prologue_seq = get_insns ();
+       end_sequence ();
+       set_insn_locators (seq, prologue_locator);
+-
+-      /* Can't deal with multiple successors of the entry block
+-         at the moment.  Function should always have at least one
+-         entry point.  */
+-      gcc_assert (single_succ_p (ENTRY_BLOCK_PTR));
+-
+-      insert_insn_on_edge (seq, single_succ_edge (ENTRY_BLOCK_PTR));
+-      inserted = 1;
+-    }
+-#endif
++    }
++#endif
++
++  bitmap_initialize (&bb_flags, &bitmap_default_obstack);
++
++#ifdef HAVE_simple_return
++  /* Try to perform a kind of shrink-wrapping, making sure the
++     prologue/epilogue is emitted only around those parts of the
++     function that require it.  */
++
++  if (flag_shrink_wrap && HAVE_simple_return && !flag_non_call_exceptions
++      && HAVE_prologue && !crtl->calls_eh_return)
++    {
++      HARD_REG_SET prologue_clobbered, live_on_edge;
++      rtx p_insn;
++      VEC(basic_block, heap) *vec;
++      basic_block bb;
++      bitmap_head bb_antic_flags;
++      bitmap_head bb_on_list;
++
++      bitmap_initialize (&bb_antic_flags, &bitmap_default_obstack);
++      bitmap_initialize (&bb_on_list, &bitmap_default_obstack);
++
++      vec = VEC_alloc (basic_block, heap, n_basic_blocks);
++
++      FOR_EACH_BB (bb)
++	{
++	  rtx insn;
++	  FOR_BB_INSNS (bb, insn)
++	    {
++	      if (requires_stack_frame_p (insn))
++		{
++		  bitmap_set_bit (&bb_flags, bb->index);
++		  VEC_quick_push (basic_block, vec, bb);
++		  break;
++		}
++	    }
++	}
++
++      /* For every basic block that needs a prologue, mark all blocks
++	 reachable from it, so as to ensure they are also seen as
++	 requiring a prologue.  */
++      while (!VEC_empty (basic_block, vec))
++	{
++	  basic_block tmp_bb = VEC_pop (basic_block, vec);
++	  edge e;
++	  edge_iterator ei;
++	  FOR_EACH_EDGE (e, ei, tmp_bb->succs)
++	    {
++	      if (e->dest == EXIT_BLOCK_PTR
++		  || bitmap_bit_p (&bb_flags, e->dest->index))
++		continue;
++	      bitmap_set_bit (&bb_flags, e->dest->index);
++	      VEC_quick_push (basic_block, vec, e->dest);
++	    }
++	}
++      /* If the last basic block contains only a label, we'll be able
++	 to convert jumps to it to (potentially conditional) return
++	 insns later.  This means we don't necessarily need a prologue
++	 for paths reaching it.  */
++      if (last_bb)
++	{
++	  if (!last_bb_active)
++	    bitmap_clear_bit (&bb_flags, last_bb->index);
++	  else if (!bitmap_bit_p (&bb_flags, last_bb->index))
++	    goto fail_shrinkwrap;
++	}
++
++      /* Now walk backwards from every block that is marked as needing
++	 a prologue to compute the bb_antic_flags bitmap.  */
++      bitmap_copy (&bb_antic_flags, &bb_flags);
++      FOR_EACH_BB (bb)
++	{
++	  edge e;
++	  edge_iterator ei;
++	  if (!bitmap_bit_p (&bb_flags, bb->index))
++	    continue;
++	  FOR_EACH_EDGE (e, ei, bb->preds)
++	    if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++	      {
++		VEC_quick_push (basic_block, vec, e->src);
++		bitmap_set_bit (&bb_on_list, e->src->index);
++	      }
++	}
++      while (!VEC_empty (basic_block, vec))
++	{
++	  basic_block tmp_bb = VEC_pop (basic_block, vec);
++	  edge e;
++	  edge_iterator ei;
++	  bool all_set = true;
++	  
++	  bitmap_clear_bit (&bb_on_list, tmp_bb->index);
++	  FOR_EACH_EDGE (e, ei, tmp_bb->succs)
++	    {
++	      if (!bitmap_bit_p (&bb_antic_flags, e->dest->index))
++		{
++		  all_set = false;
++		  break;
++		}
++	    }
++	  if (all_set)
++	    {
++	      bitmap_set_bit (&bb_antic_flags, tmp_bb->index);
++	      FOR_EACH_EDGE (e, ei, tmp_bb->preds)
++		if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++		  {
++		    VEC_quick_push (basic_block, vec, e->src);
++		    bitmap_set_bit (&bb_on_list, e->src->index);
++		  }
++	    }
++	}
++      /* Find exactly one edge that leads to a block in ANTIC from
++	 a block that isn't.  */
++      if (!bitmap_bit_p (&bb_antic_flags, entry_edge->dest->index))
++	FOR_EACH_BB (bb)
++	  {
++	    if (!bitmap_bit_p (&bb_antic_flags, bb->index))
++	      continue;
++	    FOR_EACH_EDGE (e, ei, bb->preds)
++	      if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++		{
++		  if (entry_edge != orig_entry_edge)
++		    {
++		      entry_edge = orig_entry_edge;
++		      goto fail_shrinkwrap;
++		    }
++		  entry_edge = e;
++		}
++	  }
++
++      /* Test whether the prologue is known to clobber any register
++	 (other than FP or SP) which are live on the edge.  */
++      CLEAR_HARD_REG_SET (prologue_clobbered);
++      for (p_insn = prologue_seq; p_insn; p_insn = NEXT_INSN (p_insn))
++	if (NONDEBUG_INSN_P (p_insn))
++	  note_stores (PATTERN (p_insn), record_hard_reg_sets,
++		       &prologue_clobbered);
++      CLEAR_HARD_REG_BIT (prologue_clobbered, STACK_POINTER_REGNUM);
++      if (frame_pointer_needed)
++	CLEAR_HARD_REG_BIT (prologue_clobbered, HARD_FRAME_POINTER_REGNUM);
++
++      CLEAR_HARD_REG_SET (live_on_edge);
++      reg_set_to_hard_reg_set (&live_on_edge,
++			       df_get_live_in (entry_edge->dest));
++      if (hard_reg_set_intersect_p (live_on_edge, prologue_clobbered))
++	entry_edge = orig_entry_edge;
++
++    fail_shrinkwrap:
++      bitmap_clear (&bb_antic_flags);
++      bitmap_clear (&bb_on_list);
++      VEC_free (basic_block, heap, vec);
++    }
++#endif
++
++  if (prologue_seq != NULL_RTX)
++    {
++      insert_insn_on_edge (prologue_seq, entry_edge);
++      inserted = true;
++    }
+ 
+   /* If the exit block has no non-fake predecessors, we don't need
+      an epilogue.  */
+@@ -5063,100 +5363,130 @@
+     goto epilogue_done;
+ 
+   rtl_profile_for_bb (EXIT_BLOCK_PTR);
++
+ #ifdef HAVE_return
+-  if (optimize && HAVE_return)
++  /* If we're allowed to generate a simple return instruction, then by
++     definition we don't need a full epilogue.  If the last basic
++     block before the exit block does not contain active instructions,
++     examine its predecessors and try to emit (conditional) return
++     instructions.  */
++  if (optimize && !last_bb_active
++      && (HAVE_return || entry_edge != orig_entry_edge))
+     {
+-      /* If we're allowed to generate a simple return instruction,
+-	 then by definition we don't need a full epilogue.  Examine
+-	 the block that falls through to EXIT.   If it does not
+-	 contain any code, examine its predecessors and try to
+-	 emit (conditional) return instructions.  */
+-
+-      basic_block last;
++      edge_iterator ei2;
++      int i;
++      basic_block bb;
+       rtx label;
++      VEC(basic_block,heap) *src_bbs;
+ 
+-      FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
+-	if (e->flags & EDGE_FALLTHRU)
+-	  break;
+-      if (e == NULL)
++      if (exit_fallthru_edge == NULL)
+ 	goto epilogue_done;
+-      last = e->src;
+-
+-      /* Verify that there are no active instructions in the last block.  */
+-      label = BB_END (last);
+-      while (label && !LABEL_P (label))
++      label = BB_HEAD (last_bb);
++
++      src_bbs = VEC_alloc (basic_block, heap, EDGE_COUNT (last_bb->preds));
++      FOR_EACH_EDGE (e, ei2, last_bb->preds)
++	if (e->src != ENTRY_BLOCK_PTR)
++	  VEC_quick_push (basic_block, src_bbs, e->src);
++
++      FOR_EACH_VEC_ELT (basic_block, src_bbs, i, bb)
+ 	{
+-	  if (active_insn_p (label))
+-	    break;
+-	  label = PREV_INSN (label);
++	  bool simple_p;
++	  rtx jump;
++	  e = find_edge (bb, last_bb);
++
++	  jump = BB_END (bb);
++
++#ifdef HAVE_simple_return
++	  simple_p = (entry_edge != orig_entry_edge
++		      ? !bitmap_bit_p (&bb_flags, bb->index) : false);
++#else
++	  simple_p = false;
++#endif
++
++	  if (!simple_p
++	      && (!HAVE_return || !JUMP_P (jump)
++		  || JUMP_LABEL (jump) != label))
++	    continue;
++
++	  /* If we have an unconditional jump, we can replace that
++	     with a simple return instruction.  */
++	  if (!JUMP_P (jump))
++	    {
++	      emit_barrier_after (BB_END (bb));
++	      emit_return_into_block (simple_p, bb);
++	    }
++	  else if (simplejump_p (jump))
++	    {
++	      emit_return_into_block (simple_p, bb);
++	      delete_insn (jump);
++	    }
++	  else if (condjump_p (jump) && JUMP_LABEL (jump) != label)
++	    {
++	      basic_block new_bb;
++	      edge new_e;
++
++	      gcc_assert (simple_p);
++	      new_bb = split_edge (e);
++	      emit_barrier_after (BB_END (new_bb));
++	      emit_return_into_block (simple_p, new_bb);
++#ifdef HAVE_simple_return
++	      simple_return_block = new_bb;
++#endif
++	      new_e = single_succ_edge (new_bb);
++	      redirect_edge_succ (new_e, EXIT_BLOCK_PTR);
++
++	      continue;
++	    }
++	  /* If we have a conditional jump branching to the last
++	     block, we can try to replace that with a conditional
++	     return instruction.  */
++	  else if (condjump_p (jump))
++	    {
++	      rtx dest;
++	      if (simple_p)
++		dest = simple_return_rtx;
++	      else
++		dest = ret_rtx;
++	      if (! redirect_jump (jump, dest, 0))
++		{
++#ifdef HAVE_simple_return
++		  if (simple_p)
++		    unconverted_simple_returns = true;
++#endif
++		  continue;
++		}
++
++	      /* If this block has only one successor, it both jumps
++		 and falls through to the fallthru block, so we can't
++		 delete the edge.  */
++	      if (single_succ_p (bb))
++		continue;
++	    }
++	  else
++	    {
++#ifdef HAVE_simple_return
++	      if (simple_p)
++		unconverted_simple_returns = true;
++#endif
++	      continue;
++	    }
++
++	  /* Fix up the CFG for the successful change we just made.  */
++	  redirect_edge_succ (e, EXIT_BLOCK_PTR);
+ 	}
++      VEC_free (basic_block, heap, src_bbs);
+ 
+-      if (BB_HEAD (last) == label && LABEL_P (label))
++      if (HAVE_return)
+ 	{
+-	  edge_iterator ei2;
+-
+-	  for (ei2 = ei_start (last->preds); (e = ei_safe_edge (ei2)); )
+-	    {
+-	      basic_block bb = e->src;
+-	      rtx jump;
+-
+-	      if (bb == ENTRY_BLOCK_PTR)
+-		{
+-		  ei_next (&ei2);
+-		  continue;
+-		}
+-
+-	      jump = BB_END (bb);
+-	      if (!JUMP_P (jump) || JUMP_LABEL (jump) != label)
+-		{
+-		  ei_next (&ei2);
+-		  continue;
+-		}
+-
+-	      /* If we have an unconditional jump, we can replace that
+-		 with a simple return instruction.  */
+-	      if (simplejump_p (jump))
+-		{
+-		  emit_return_into_block (bb);
+-		  delete_insn (jump);
+-		}
+-
+-	      /* If we have a conditional jump, we can try to replace
+-		 that with a conditional return instruction.  */
+-	      else if (condjump_p (jump))
+-		{
+-		  if (! redirect_jump (jump, 0, 0))
+-		    {
+-		      ei_next (&ei2);
+-		      continue;
+-		    }
+-
+-		  /* If this block has only one successor, it both jumps
+-		     and falls through to the fallthru block, so we can't
+-		     delete the edge.  */
+-		  if (single_succ_p (bb))
+-		    {
+-		      ei_next (&ei2);
+-		      continue;
+-		    }
+-		}
+-	      else
+-		{
+-		  ei_next (&ei2);
+-		  continue;
+-		}
+-
+-	      /* Fix up the CFG for the successful change we just made.  */
+-	      redirect_edge_succ (e, EXIT_BLOCK_PTR);
+-	    }
+-
+ 	  /* Emit a return insn for the exit fallthru block.  Whether
+ 	     this is still reachable will be determined later.  */
+ 
+-	  emit_barrier_after (BB_END (last));
+-	  emit_return_into_block (last);
+-	  epilogue_end = BB_END (last);
+-	  single_succ_edge (last)->flags &= ~EDGE_FALLTHRU;
++	  emit_barrier_after (BB_END (last_bb));
++	  emit_return_into_block (false, last_bb);
++	  epilogue_end = BB_END (last_bb);
++	  if (JUMP_P (epilogue_end))
++	    JUMP_LABEL (epilogue_end) = ret_rtx;
++	  single_succ_edge (last_bb)->flags &= ~EDGE_FALLTHRU;
+ 	  goto epilogue_done;
+ 	}
+     }
+@@ -5193,15 +5523,10 @@
+     }
+ #endif
+ 
+-  /* Find the edge that falls through to EXIT.  Other edges may exist
+-     due to RETURN instructions, but those don't need epilogues.
+-     There really shouldn't be a mixture -- either all should have
+-     been converted or none, however...  */
++  /* If nothing falls through into the exit block, we don't need an
++     epilogue.  */
+ 
+-  FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
+-    if (e->flags & EDGE_FALLTHRU)
+-      break;
+-  if (e == NULL)
++  if (exit_fallthru_edge == NULL)
+     goto epilogue_done;
+ 
+ #ifdef HAVE_epilogue
+@@ -5217,25 +5542,38 @@
+       set_insn_locators (seq, epilogue_locator);
+ 
+       seq = get_insns ();
++      returnjump = get_last_insn ();
+       end_sequence ();
+ 
+-      insert_insn_on_edge (seq, e);
++      insert_insn_on_edge (seq, exit_fallthru_edge);
+       inserted = 1;
++      if (JUMP_P (returnjump))
++	{
++ 	  rtx pat = PATTERN (returnjump);
++ 	  if (GET_CODE (pat) == PARALLEL)
++	    pat = XVECEXP (pat, 0, 0);
++	  if (ANY_RETURN_P (pat))
++	    JUMP_LABEL (returnjump) = pat;
++	  else
++	    JUMP_LABEL (returnjump) = ret_rtx;
++	}
++      else
++	returnjump = NULL_RTX;
+     }
+   else
+ #endif
+     {
+       basic_block cur_bb;
+ 
+-      if (! next_active_insn (BB_END (e->src)))
++      if (! next_active_insn (BB_END (exit_fallthru_edge->src)))
+ 	goto epilogue_done;
+       /* We have a fall-through edge to the exit block, the source is not
+-         at the end of the function, and there will be an assembler epilogue
+-         at the end of the function.
+-         We can't use force_nonfallthru here, because that would try to
+-         use return.  Inserting a jump 'by hand' is extremely messy, so
++	 at the end of the function, and there will be an assembler epilogue
++	 at the end of the function.
++	 We can't use force_nonfallthru here, because that would try to
++	 use return.  Inserting a jump 'by hand' is extremely messy, so
+ 	 we take advantage of cfg_layout_finalize using
+-	fixup_fallthru_exit_predecessor.  */
++	 fixup_fallthru_exit_predecessor.  */
+       cfg_layout_initialize (0);
+       FOR_EACH_BB (cur_bb)
+ 	if (cur_bb->index >= NUM_FIXED_BLOCKS
+@@ -5244,6 +5582,7 @@
+       cfg_layout_finalize ();
+     }
+ epilogue_done:
++
+   default_rtl_profile ();
+ 
+   if (inserted)
+@@ -5260,33 +5599,93 @@
+ 	}
+     }
+ 
++#ifdef HAVE_simple_return
++  /* If there were branches to an empty LAST_BB which we tried to
++     convert to conditional simple_returns, but couldn't for some
++     reason, create a block to hold a simple_return insn and redirect
++     those remaining edges.  */
++  if (unconverted_simple_returns)
++    {
++      edge_iterator ei2;
++      basic_block exit_pred = EXIT_BLOCK_PTR->prev_bb;
++
++      gcc_assert (entry_edge != orig_entry_edge);
++
++#ifdef HAVE_epilogue
++      if (simple_return_block == NULL && returnjump != NULL_RTX
++	  && JUMP_LABEL (returnjump) == simple_return_rtx)
++	{
++	  edge e = split_block (exit_fallthru_edge->src,
++				PREV_INSN (returnjump));
++	  simple_return_block = e->dest;
++	}
++#endif
++      if (simple_return_block == NULL)
++	{
++	  basic_block bb;
++	  rtx start;
++
++	  bb = create_basic_block (NULL, NULL, exit_pred);
++	  start = emit_jump_insn_after (gen_simple_return (),
++					BB_END (bb));
++	  JUMP_LABEL (start) = simple_return_rtx;
++	  emit_barrier_after (start);
++
++	  simple_return_block = bb;
++	  make_edge (bb, EXIT_BLOCK_PTR, 0);
++	}
++
++    restart_scan:
++      for (ei2 = ei_start (last_bb->preds); (e = ei_safe_edge (ei2)); )
++	{
++	  basic_block bb = e->src;
++
++	  if (bb != ENTRY_BLOCK_PTR
++	      && !bitmap_bit_p (&bb_flags, bb->index))
++	    {
++	      redirect_edge_and_branch_force (e, simple_return_block);
++	      goto restart_scan;
++	    }
++	  ei_next (&ei2);
++
++	}
++    }
++#endif
++
+ #ifdef HAVE_sibcall_epilogue
+   /* Emit sibling epilogues before any sibling call sites.  */
+   for (ei = ei_start (EXIT_BLOCK_PTR->preds); (e = ei_safe_edge (ei)); )
+     {
+       basic_block bb = e->src;
+       rtx insn = BB_END (bb);
++      rtx ep_seq;
+ 
+       if (!CALL_P (insn)
+-	  || ! SIBLING_CALL_P (insn))
++	  || ! SIBLING_CALL_P (insn)
++	  || (entry_edge != orig_entry_edge
++	      && !bitmap_bit_p (&bb_flags, bb->index)))
+ 	{
+ 	  ei_next (&ei);
+ 	  continue;
+ 	}
+ 
+-      start_sequence ();
+-      emit_note (NOTE_INSN_EPILOGUE_BEG);
+-      emit_insn (gen_sibcall_epilogue ());
+-      seq = get_insns ();
+-      end_sequence ();
+-
+-      /* Retain a map of the epilogue insns.  Used in life analysis to
+-	 avoid getting rid of sibcall epilogue insns.  Do this before we
+-	 actually emit the sequence.  */
+-      record_insns (seq, NULL, &epilogue_insn_hash);
+-      set_insn_locators (seq, epilogue_locator);
+-
+-      emit_insn_before (seq, insn);
++      ep_seq = gen_sibcall_epilogue ();
++      if (ep_seq)
++	{
++	  start_sequence ();
++	  emit_note (NOTE_INSN_EPILOGUE_BEG);
++	  emit_insn (ep_seq);
++	  seq = get_insns ();
++	  end_sequence ();
++
++	  /* Retain a map of the epilogue insns.  Used in life analysis to
++	     avoid getting rid of sibcall epilogue insns.  Do this before we
++	     actually emit the sequence.  */
++	  record_insns (seq, NULL, &epilogue_insn_hash);
++	  set_insn_locators (seq, epilogue_locator);
++
++	  emit_insn_before (seq, insn);
++	}
+       ei_next (&ei);
+     }
+ #endif
+@@ -5311,6 +5710,8 @@
+     }
+ #endif
+ 
++  bitmap_clear (&bb_flags);
++
+   /* Threading the prologue and epilogue changes the artificial refs
+      in the entry and exit blocks.  */
+   epilogue_completed = 1;
+
+=== modified file 'gcc/genemit.c'
+--- old/gcc/genemit.c	2009-11-27 11:37:06 +0000
++++ new/gcc/genemit.c	2011-01-05 12:12:18 +0000
+@@ -222,6 +222,12 @@
+     case PC:
+       printf ("pc_rtx");
+       return;
++    case RETURN:
++      printf ("ret_rtx");
++      return;
++    case SIMPLE_RETURN:
++      printf ("simple_return_rtx");
++      return;
+     case CLOBBER:
+       if (REG_P (XEXP (x, 0)))
+ 	{
+@@ -544,8 +550,8 @@
+ 	  || (GET_CODE (next) == PARALLEL
+ 	      && ((GET_CODE (XVECEXP (next, 0, 0)) == SET
+ 		   && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
+-		  || GET_CODE (XVECEXP (next, 0, 0)) == RETURN))
+-	  || GET_CODE (next) == RETURN)
++		  || ANY_RETURN_P (XVECEXP (next, 0, 0))))
++	  || ANY_RETURN_P (next))
+ 	printf ("  emit_jump_insn (");
+       else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
+ 	       || GET_CODE (next) == CALL
+@@ -660,7 +666,7 @@
+ 	  || (GET_CODE (next) == PARALLEL
+ 	      && GET_CODE (XVECEXP (next, 0, 0)) == SET
+ 	      && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
+-	  || GET_CODE (next) == RETURN)
++	  || ANY_RETURN_P (next))
+ 	printf ("  emit_jump_insn (");
+       else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
+ 	       || GET_CODE (next) == CALL
+
+=== modified file 'gcc/gengenrtl.c'
+--- old/gcc/gengenrtl.c	2007-08-22 23:30:39 +0000
++++ new/gcc/gengenrtl.c	2011-01-05 12:12:18 +0000
+@@ -146,6 +146,10 @@
+ 	  || strcmp (defs[idx].enumname, "REG") == 0
+ 	  || strcmp (defs[idx].enumname, "SUBREG") == 0
+ 	  || strcmp (defs[idx].enumname, "MEM") == 0
++	  || strcmp (defs[idx].enumname, "PC") == 0
++	  || strcmp (defs[idx].enumname, "CC0") == 0
++	  || strcmp (defs[idx].enumname, "RETURN") == 0
++	  || strcmp (defs[idx].enumname, "SIMPLE_RETURN") == 0
+ 	  || strcmp (defs[idx].enumname, "CONST_VECTOR") == 0);
+ }
+ 
+
+=== modified file 'gcc/haifa-sched.c'
+--- old/gcc/haifa-sched.c	2010-08-12 08:14:47 +0000
++++ new/gcc/haifa-sched.c	2011-01-05 12:12:18 +0000
+@@ -4231,7 +4231,7 @@
+ /* Helper function.
+    Find fallthru edge from PRED.  */
+ edge
+-find_fallthru_edge (basic_block pred)
++find_fallthru_edge_from (basic_block pred)
+ {
+   edge e;
+   edge_iterator ei;
+@@ -4298,7 +4298,7 @@
+   edge e;
+ 
+   last = EXIT_BLOCK_PTR->prev_bb;
+-  e = find_fallthru_edge (last);
++  e = find_fallthru_edge_from (last);
+ 
+   if (e)
+     {
+@@ -5234,6 +5234,11 @@
+ 		    gcc_assert (/* Usual case.  */
+                                 (EDGE_COUNT (bb->succs) > 1
+                                  && !BARRIER_P (NEXT_INSN (head)))
++				/* Special cases, see cfglayout.c:
++				   fixup_reorder_chain.  */
++				|| (EDGE_COUNT (bb->succs) == 1
++				    && (!onlyjump_p (head)
++					|| returnjump_p (head)))
+                                 /* Or jump to the next instruction.  */
+                                 || (EDGE_COUNT (bb->succs) == 1
+                                     && (BB_HEAD (EDGE_I (bb->succs, 0)->dest)
+
+=== modified file 'gcc/ifcvt.c'
+--- old/gcc/ifcvt.c	2010-11-26 12:03:32 +0000
++++ new/gcc/ifcvt.c	2011-01-05 12:12:18 +0000
+@@ -105,7 +105,7 @@
+ static int find_if_case_2 (basic_block, edge, edge);
+ static int find_memory (rtx *, void *);
+ static int dead_or_predicable (basic_block, basic_block, basic_block,
+-			       basic_block, int);
++			       edge, int);
+ static void noce_emit_move_insn (rtx, rtx);
+ static rtx block_has_only_trap (basic_block);
+ 
+@@ -3791,6 +3791,7 @@
+   basic_block then_bb = then_edge->dest;
+   basic_block else_bb = else_edge->dest;
+   basic_block new_bb;
++  rtx else_target = NULL_RTX;
+   int then_bb_index;
+ 
+   /* If we are partitioning hot/cold basic blocks, we don't want to
+@@ -3840,9 +3841,16 @@
+ 				    predictable_edge_p (then_edge)))))
+     return FALSE;
+ 
++  if (else_bb == EXIT_BLOCK_PTR)
++    {
++      rtx jump = BB_END (else_edge->src);
++      gcc_assert (JUMP_P (jump));
++      else_target = JUMP_LABEL (jump);
++    }
++
+   /* Registers set are dead, or are predicable.  */
+   if (! dead_or_predicable (test_bb, then_bb, else_bb,
+-			    single_succ (then_bb), 1))
++			    single_succ_edge (then_bb), 1))
+     return FALSE;
+ 
+   /* Conversion went ok, including moving the insns and fixing up the
+@@ -3859,6 +3867,9 @@
+       redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb);
+       new_bb = 0;
+     }
++  else if (else_bb == EXIT_BLOCK_PTR)
++    new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb),
++					     else_bb, else_target);
+   else
+     new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb),
+ 					     else_bb);
+@@ -3957,7 +3968,7 @@
+     return FALSE;
+ 
+   /* Registers set are dead, or are predicable.  */
+-  if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ->dest, 0))
++  if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0))
+     return FALSE;
+ 
+   /* Conversion went ok, including moving the insns and fixing up the
+@@ -3995,12 +4006,34 @@
+ 
+ static int
+ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
+-		    basic_block other_bb, basic_block new_dest, int reversep)
++		    basic_block other_bb, edge dest_edge, int reversep)
+ {
+-  rtx head, end, jump, earliest = NULL_RTX, old_dest, new_label = NULL_RTX;
++  basic_block new_dest = dest_edge->dest;
++  rtx head, end, jump, earliest = NULL_RTX, old_dest;
+   bitmap merge_set = NULL;
+   /* Number of pending changes.  */
+   int n_validated_changes = 0;
++  rtx new_dest_label;
++
++  jump = BB_END (dest_edge->src);
++  if (JUMP_P (jump))
++    {
++      new_dest_label = JUMP_LABEL (jump);
++      if (new_dest_label == NULL_RTX)
++	{
++	  new_dest_label = PATTERN (jump);
++	  gcc_assert (ANY_RETURN_P (new_dest_label));
++	}
++    }
++  else if (other_bb != new_dest)
++    {
++      if (new_dest == EXIT_BLOCK_PTR)
++	new_dest_label = ret_rtx;
++      else
++	new_dest_label = block_label (new_dest);
++    }
++  else
++    new_dest_label = NULL_RTX;
+ 
+   jump = BB_END (test_bb);
+ 
+@@ -4220,10 +4253,9 @@
+   old_dest = JUMP_LABEL (jump);
+   if (other_bb != new_dest)
+     {
+-      new_label = block_label (new_dest);
+       if (reversep
+-	  ? ! invert_jump_1 (jump, new_label)
+-	  : ! redirect_jump_1 (jump, new_label))
++	  ? ! invert_jump_1 (jump, new_dest_label)
++	  : ! redirect_jump_1 (jump, new_dest_label))
+ 	goto cancel;
+     }
+ 
+@@ -4234,7 +4266,7 @@
+ 
+   if (other_bb != new_dest)
+     {
+-      redirect_jump_2 (jump, old_dest, new_label, 0, reversep);
++      redirect_jump_2 (jump, old_dest, new_dest_label, 0, reversep);
+ 
+       redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
+       if (reversep)
+
+=== modified file 'gcc/jump.c'
+--- old/gcc/jump.c	2010-12-13 10:05:52 +0000
++++ new/gcc/jump.c	2011-01-05 12:12:18 +0000
+@@ -29,7 +29,8 @@
+    JUMP_LABEL internal field.  With this we can detect labels that
+    become unused because of the deletion of all the jumps that
+    formerly used them.  The JUMP_LABEL info is sometimes looked
+-   at by later passes.
++   at by later passes.  For return insns, it contains either a
++   RETURN or a SIMPLE_RETURN rtx.
+ 
+    The subroutines redirect_jump and invert_jump are used
+    from other passes as well.  */
+@@ -742,10 +743,10 @@
+     return (GET_CODE (x) == IF_THEN_ELSE
+ 	    && ((GET_CODE (XEXP (x, 2)) == PC
+ 		 && (GET_CODE (XEXP (x, 1)) == LABEL_REF
+-		     || GET_CODE (XEXP (x, 1)) == RETURN))
++		     || ANY_RETURN_P (XEXP (x, 1))))
+ 		|| (GET_CODE (XEXP (x, 1)) == PC
+ 		    && (GET_CODE (XEXP (x, 2)) == LABEL_REF
+-			|| GET_CODE (XEXP (x, 2)) == RETURN))));
++			|| ANY_RETURN_P (XEXP (x, 2))))));
+ }
+ 
+ /* Return nonzero if INSN is a (possibly) conditional jump inside a
+@@ -774,11 +775,11 @@
+     return 0;
+   if (XEXP (SET_SRC (x), 2) == pc_rtx
+       && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
+-	  || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
++	  || ANY_RETURN_P (XEXP (SET_SRC (x), 1)) == RETURN))
+     return 1;
+   if (XEXP (SET_SRC (x), 1) == pc_rtx
+       && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
+-	  || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
++	  || ANY_RETURN_P (XEXP (SET_SRC (x), 2))))
+     return 1;
+   return 0;
+ }
+@@ -840,8 +841,9 @@
+   a = GET_CODE (XEXP (SET_SRC (x), 1));
+   b = GET_CODE (XEXP (SET_SRC (x), 2));
+ 
+-  return ((b == PC && (a == LABEL_REF || a == RETURN))
+-	  || (a == PC && (b == LABEL_REF || b == RETURN)));
++  return ((b == PC && (a == LABEL_REF || a == RETURN || a == SIMPLE_RETURN))
++	  || (a == PC
++	      && (b == LABEL_REF || b == RETURN || b == SIMPLE_RETURN)));
+ }
+ 
+ /* Return the label of a conditional jump.  */
+@@ -878,6 +880,7 @@
+   switch (GET_CODE (x))
+     {
+     case RETURN:
++    case SIMPLE_RETURN:
+     case EH_RETURN:
+       return true;
+ 
+@@ -1200,7 +1203,7 @@
+   /* If deleting a jump, decrement the count of the label,
+      and delete the label if it is now unused.  */
+ 
+-  if (JUMP_P (insn) && JUMP_LABEL (insn))
++  if (JUMP_P (insn) && JUMP_LABEL (insn) && !ANY_RETURN_P (JUMP_LABEL (insn)))
+     {
+       rtx lab = JUMP_LABEL (insn), lab_next;
+ 
+@@ -1331,6 +1334,18 @@
+      is also an unconditional jump in that case.  */
+ }
+ 
++/* A helper function for redirect_exp_1; examines its input X and returns
++   either a LABEL_REF around a label, or a RETURN if X was NULL.  */
++static rtx
++redirect_target (rtx x)
++{
++  if (x == NULL_RTX)
++    return ret_rtx;
++  if (!ANY_RETURN_P (x))
++    return gen_rtx_LABEL_REF (Pmode, x);
++  return x;
++}
++
+ /* Throughout LOC, redirect OLABEL to NLABEL.  Treat null OLABEL or
+    NLABEL as a return.  Accrue modifications into the change group.  */
+ 
+@@ -1342,37 +1357,19 @@
+   int i;
+   const char *fmt;
+ 
+-  if (code == LABEL_REF)
+-    {
+-      if (XEXP (x, 0) == olabel)
+-	{
+-	  rtx n;
+-	  if (nlabel)
+-	    n = gen_rtx_LABEL_REF (Pmode, nlabel);
+-	  else
+-	    n = gen_rtx_RETURN (VOIDmode);
+-
+-	  validate_change (insn, loc, n, 1);
+-	  return;
+-	}
+-    }
+-  else if (code == RETURN && olabel == 0)
+-    {
+-      if (nlabel)
+-	x = gen_rtx_LABEL_REF (Pmode, nlabel);
+-      else
+-	x = gen_rtx_RETURN (VOIDmode);
+-      if (loc == &PATTERN (insn))
+-	x = gen_rtx_SET (VOIDmode, pc_rtx, x);
+-      validate_change (insn, loc, x, 1);
++  if ((code == LABEL_REF && XEXP (x, 0) == olabel)
++      || x == olabel)
++    {
++      validate_change (insn, loc, redirect_target (nlabel), 1);
+       return;
+     }
+ 
+-  if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
++  if (code == SET && SET_DEST (x) == pc_rtx
++      && ANY_RETURN_P (nlabel)
+       && GET_CODE (SET_SRC (x)) == LABEL_REF
+       && XEXP (SET_SRC (x), 0) == olabel)
+     {
+-      validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 1);
++      validate_change (insn, loc, nlabel, 1);
+       return;
+     }
+ 
+@@ -1409,6 +1406,7 @@
+   int ochanges = num_validated_changes ();
+   rtx *loc, asmop;
+ 
++  gcc_assert (nlabel);
+   asmop = extract_asm_operands (PATTERN (jump));
+   if (asmop)
+     {
+@@ -1430,17 +1428,20 @@
+    jump target label is unused as a result, it and the code following
+    it may be deleted.
+ 
+-   If NLABEL is zero, we are to turn the jump into a (possibly conditional)
+-   RETURN insn.
++   Normally, NLABEL will be a label, but it may also be a RETURN or
++   SIMPLE_RETURN rtx; in that case we are to turn the jump into a
++   (possibly conditional) return insn.
+ 
+    The return value will be 1 if the change was made, 0 if it wasn't
+-   (this can only occur for NLABEL == 0).  */
++   (this can only occur when trying to produce return insns).  */
+ 
+ int
+ redirect_jump (rtx jump, rtx nlabel, int delete_unused)
+ {
+   rtx olabel = JUMP_LABEL (jump);
+ 
++  gcc_assert (nlabel != NULL_RTX);
++
+   if (nlabel == olabel)
+     return 1;
+ 
+@@ -1452,7 +1453,7 @@
+ }
+ 
+ /* Fix up JUMP_LABEL and label ref counts after OLABEL has been replaced with
+-   NLABEL in JUMP.
++   NEW_DEST in JUMP.
+    If DELETE_UNUSED is positive, delete related insn to OLABEL if its ref
+    count has dropped to zero.  */
+ void
+@@ -1468,13 +1469,14 @@
+      about this.  */
+   gcc_assert (delete_unused >= 0);
+   JUMP_LABEL (jump) = nlabel;
+-  if (nlabel)
++  if (nlabel && !ANY_RETURN_P (nlabel))
+     ++LABEL_NUSES (nlabel);
+ 
+   /* Update labels in any REG_EQUAL note.  */
+   if ((note = find_reg_note (jump, REG_EQUAL, NULL_RTX)) != NULL_RTX)
+     {
+-      if (!nlabel || (invert && !invert_exp_1 (XEXP (note, 0), jump)))
++      if (ANY_RETURN_P (nlabel)
++	  || (invert && !invert_exp_1 (XEXP (note, 0), jump)))
+ 	remove_note (jump, note);
+       else
+ 	{
+@@ -1483,7 +1485,8 @@
+ 	}
+     }
+ 
+-  if (olabel && --LABEL_NUSES (olabel) == 0 && delete_unused > 0
++  if (olabel && !ANY_RETURN_P (olabel)
++      && --LABEL_NUSES (olabel) == 0 && delete_unused > 0
+       /* Undefined labels will remain outside the insn stream.  */
+       && INSN_UID (olabel))
+     delete_related_insns (olabel);
+
+=== modified file 'gcc/opts.c'
+--- old/gcc/opts.c	2010-12-10 15:33:37 +0000
++++ new/gcc/opts.c	2011-01-05 12:12:18 +0000
+@@ -908,6 +908,7 @@
+   flag_ipa_cp = opt2;
+   flag_ipa_sra = opt2;
+   flag_ee = opt2;
++  flag_shrink_wrap = opt2;
+ 
+   /* Track fields in field-sensitive alias analysis.  */
+   set_param_value ("max-fields-for-field-sensitive",
+
+=== modified file 'gcc/print-rtl.c'
+--- old/gcc/print-rtl.c	2010-03-26 16:18:51 +0000
++++ new/gcc/print-rtl.c	2011-01-05 12:12:18 +0000
+@@ -308,9 +308,16 @@
+ 	      }
+ 	  }
+ 	else if (i == 8 && JUMP_P (in_rtx) && JUMP_LABEL (in_rtx) != NULL)
+-	  /* Output the JUMP_LABEL reference.  */
+-	  fprintf (outfile, "\n%s%*s -> %d", print_rtx_head, indent * 2, "",
+-		   INSN_UID (JUMP_LABEL (in_rtx)));
++	  {
++	    /* Output the JUMP_LABEL reference.  */
++	    fprintf (outfile, "\n%s%*s -> ", print_rtx_head, indent * 2, "");
++	    if (GET_CODE (JUMP_LABEL (in_rtx)) == RETURN)
++	      fprintf (outfile, "return");
++	    else if (GET_CODE (JUMP_LABEL (in_rtx)) == SIMPLE_RETURN)
++	      fprintf (outfile, "simple_return");
++	    else
++	      fprintf (outfile, "%d", INSN_UID (JUMP_LABEL (in_rtx)));
++	  }
+ 	else if (i == 0 && GET_CODE (in_rtx) == VALUE)
+ 	  {
+ #ifndef GENERATOR_FILE
+
+=== modified file 'gcc/reorg.c'
+--- old/gcc/reorg.c	2010-09-15 22:51:44 +0000
++++ new/gcc/reorg.c	2011-01-05 12:12:18 +0000
+@@ -161,8 +161,11 @@
+ #define unfilled_slots_next	\
+   ((rtx *) obstack_next_free (&unfilled_slots_obstack))
+ 
+-/* Points to the label before the end of the function.  */
+-static rtx end_of_function_label;
++/* Points to the label before the end of the function, or before a
++   return insn.  */
++static rtx function_return_label;
++/* Likewise for a simple_return.  */
++static rtx function_simple_return_label;
+ 
+ /* Mapping between INSN_UID's and position in the code since INSN_UID's do
+    not always monotonically increase.  */
+@@ -175,7 +178,7 @@
+ static int resource_conflicts_p (struct resources *, struct resources *);
+ static int insn_references_resource_p (rtx, struct resources *, bool);
+ static int insn_sets_resource_p (rtx, struct resources *, bool);
+-static rtx find_end_label (void);
++static rtx find_end_label (rtx);
+ static rtx emit_delay_sequence (rtx, rtx, int);
+ static rtx add_to_delay_list (rtx, rtx);
+ static rtx delete_from_delay_slot (rtx);
+@@ -220,6 +223,15 @@
+ static void make_return_insns (rtx);
+ #endif
+ 
++/* Return true iff INSN is a simplejump, or any kind of return insn.  */
++
++static bool
++simplejump_or_return_p (rtx insn)
++{
++  return (JUMP_P (insn)
++	  && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
++}
++
+ /* Return TRUE if this insn should stop the search for insn to fill delay
+    slots.  LABELS_P indicates that labels should terminate the search.
+    In all cases, jumps terminate the search.  */
+@@ -335,23 +347,29 @@
+ 
+    ??? There may be a problem with the current implementation.  Suppose
+    we start with a bare RETURN insn and call find_end_label.  It may set
+-   end_of_function_label just before the RETURN.  Suppose the machinery
++   function_return_label just before the RETURN.  Suppose the machinery
+    is able to fill the delay slot of the RETURN insn afterwards.  Then
+-   end_of_function_label is no longer valid according to the property
++   function_return_label is no longer valid according to the property
+    described above and find_end_label will still return it unmodified.
+    Note that this is probably mitigated by the following observation:
+-   once end_of_function_label is made, it is very likely the target of
++   once function_return_label is made, it is very likely the target of
+    a jump, so filling the delay slot of the RETURN will be much more
+    difficult.  */
+ 
+ static rtx
+-find_end_label (void)
++find_end_label (rtx kind)
+ {
+   rtx insn;
++  rtx *plabel;
++
++  if (kind == ret_rtx)
++    plabel = &function_return_label;
++  else
++    plabel = &function_simple_return_label;
+ 
+   /* If we found one previously, return it.  */
+-  if (end_of_function_label)
+-    return end_of_function_label;
++  if (*plabel)
++    return *plabel;
+ 
+   /* Otherwise, see if there is a label at the end of the function.  If there
+      is, it must be that RETURN insns aren't needed, so that is our return
+@@ -366,44 +384,44 @@
+ 
+   /* When a target threads its epilogue we might already have a
+      suitable return insn.  If so put a label before it for the
+-     end_of_function_label.  */
++     function_return_label.  */
+   if (BARRIER_P (insn)
+       && JUMP_P (PREV_INSN (insn))
+-      && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
++      && PATTERN (PREV_INSN (insn)) == kind)
+     {
+       rtx temp = PREV_INSN (PREV_INSN (insn));
+-      end_of_function_label = gen_label_rtx ();
+-      LABEL_NUSES (end_of_function_label) = 0;
++      rtx label = gen_label_rtx ();
++      LABEL_NUSES (label) = 0;
+ 
+       /* Put the label before an USE insns that may precede the RETURN insn.  */
+       while (GET_CODE (temp) == USE)
+ 	temp = PREV_INSN (temp);
+ 
+-      emit_label_after (end_of_function_label, temp);
++      emit_label_after (label, temp);
++      *plabel = label;
+     }
+ 
+   else if (LABEL_P (insn))
+-    end_of_function_label = insn;
++    *plabel = insn;
+   else
+     {
+-      end_of_function_label = gen_label_rtx ();
+-      LABEL_NUSES (end_of_function_label) = 0;
++      rtx label = gen_label_rtx ();
++      LABEL_NUSES (label) = 0;
+       /* If the basic block reorder pass moves the return insn to
+ 	 some other place try to locate it again and put our
+-	 end_of_function_label there.  */
+-      while (insn && ! (JUMP_P (insn)
+-		        && (GET_CODE (PATTERN (insn)) == RETURN)))
++	 function_return_label there.  */
++      while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
+ 	insn = PREV_INSN (insn);
+       if (insn)
+ 	{
+ 	  insn = PREV_INSN (insn);
+ 
+-	  /* Put the label before an USE insns that may proceed the
++	  /* Put the label before an USE insns that may precede the
+ 	     RETURN insn.  */
+ 	  while (GET_CODE (insn) == USE)
+ 	    insn = PREV_INSN (insn);
+ 
+-	  emit_label_after (end_of_function_label, insn);
++	  emit_label_after (label, insn);
+ 	}
+       else
+ 	{
+@@ -413,19 +431,16 @@
+ 	      && ! HAVE_return
+ #endif
+ 	      )
+-	    {
+-	      /* The RETURN insn has its delay slot filled so we cannot
+-		 emit the label just before it.  Since we already have
+-		 an epilogue and cannot emit a new RETURN, we cannot
+-		 emit the label at all.  */
+-	      end_of_function_label = NULL_RTX;
+-	      return end_of_function_label;
+-	    }
++	    /* The RETURN insn has its delay slot filled so we cannot
++	       emit the label just before it.  Since we already have
++	       an epilogue and cannot emit a new RETURN, we cannot
++	       emit the label at all.  */
++	    return NULL_RTX;
+ #endif /* HAVE_epilogue */
+ 
+ 	  /* Otherwise, make a new label and emit a RETURN and BARRIER,
+ 	     if needed.  */
+-	  emit_label (end_of_function_label);
++	  emit_label (label);
+ #ifdef HAVE_return
+ 	  /* We don't bother trying to create a return insn if the
+ 	     epilogue has filled delay-slots; we would have to try and
+@@ -437,19 +452,21 @@
+ 	      /* The return we make may have delay slots too.  */
+ 	      rtx insn = gen_return ();
+ 	      insn = emit_jump_insn (insn);
++	      JUMP_LABEL (insn) = ret_rtx;
+ 	      emit_barrier ();
+ 	      if (num_delay_slots (insn) > 0)
+ 		obstack_ptr_grow (&unfilled_slots_obstack, insn);
+ 	    }
+ #endif
+ 	}
++      *plabel = label;
+     }
+ 
+   /* Show one additional use for this label so it won't go away until
+      we are done.  */
+-  ++LABEL_NUSES (end_of_function_label);
++  ++LABEL_NUSES (*plabel);
+ 
+-  return end_of_function_label;
++  return *plabel;
+ }
+ 
+ /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
+@@ -797,10 +814,8 @@
+   if ((next_trial == next_active_insn (JUMP_LABEL (insn))
+        && ! (next_trial == 0 && crtl->epilogue_delay_list != 0))
+       || (next_trial != 0
+-	  && JUMP_P (next_trial)
+-	  && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
+-	  && (simplejump_p (next_trial)
+-	      || GET_CODE (PATTERN (next_trial)) == RETURN)))
++	  && simplejump_or_return_p (next_trial)
++	  && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
+     {
+       if (eligible_for_annul_false (insn, 0, trial, flags))
+ 	{
+@@ -819,13 +834,11 @@
+ 	 branch, thread our jump to the target of that branch.  Don't
+ 	 change this into a RETURN here, because it may not accept what
+ 	 we have in the delay slot.  We'll fix this up later.  */
+-      if (next_trial && JUMP_P (next_trial)
+-	  && (simplejump_p (next_trial)
+-	      || GET_CODE (PATTERN (next_trial)) == RETURN))
++      if (next_trial && simplejump_or_return_p (next_trial))
+ 	{
+ 	  rtx target_label = JUMP_LABEL (next_trial);
+-	  if (target_label == 0)
+-	    target_label = find_end_label ();
++	  if (ANY_RETURN_P (target_label))
++	    target_label = find_end_label (target_label);
+ 
+ 	  if (target_label)
+ 	    {
+@@ -866,7 +879,7 @@
+   if (JUMP_P (insn)
+       && (condjump_p (insn) || condjump_in_parallel_p (insn))
+       && INSN_UID (insn) <= max_uid
+-      && label != 0
++      && label != 0 && !ANY_RETURN_P (label)
+       && INSN_UID (label) <= max_uid)
+     flags
+       = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
+@@ -1038,7 +1051,7 @@
+     pat = XVECEXP (pat, 0, 0);
+ 
+   if (GET_CODE (pat) == RETURN)
+-    return target == 0 ? const_true_rtx : 0;
++    return ANY_RETURN_P (target) ? const_true_rtx : 0;
+ 
+   else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
+     return 0;
+@@ -1318,7 +1331,11 @@
+     }
+ 
+   /* Show the place to which we will be branching.  */
+-  *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
++  temp = JUMP_LABEL (XVECEXP (seq, 0, 0));
++  if (ANY_RETURN_P (temp))
++    *pnew_thread = temp;
++  else
++    *pnew_thread = next_active_insn (temp);
+ 
+   /* Add any new insns to the delay list and update the count of the
+      number of slots filled.  */
+@@ -1358,8 +1375,7 @@
+   /* We can't do anything if SEQ's delay insn isn't an
+      unconditional branch.  */
+ 
+-  if (! simplejump_p (XVECEXP (seq, 0, 0))
+-      && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
++  if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
+     return delay_list;
+ 
+   for (i = 1; i < XVECLEN (seq, 0); i++)
+@@ -1827,7 +1843,7 @@
+   rtx insn;
+ 
+   /* We don't own the function end.  */
+-  if (thread == 0)
++  if (ANY_RETURN_P (thread))
+     return 0;
+ 
+   /* Get the first active insn, or THREAD, if it is an active insn.  */
+@@ -2245,7 +2261,8 @@
+ 	  && (!JUMP_P (insn)
+ 	      || ((condjump_p (insn) || condjump_in_parallel_p (insn))
+ 		  && ! simplejump_p (insn)
+-		  && JUMP_LABEL (insn) != 0)))
++		  && JUMP_LABEL (insn) != 0
++		  && !ANY_RETURN_P (JUMP_LABEL (insn)))))
+ 	{
+ 	  /* Invariant: If insn is a JUMP_INSN, the insn's jump
+ 	     label.  Otherwise, zero.  */
+@@ -2270,7 +2287,7 @@
+ 		target = JUMP_LABEL (insn);
+ 	    }
+ 
+-	  if (target == 0)
++	  if (target == 0 || ANY_RETURN_P (target))
+ 	    for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
+ 	      {
+ 		next_trial = next_nonnote_insn (trial);
+@@ -2349,6 +2366,7 @@
+ 	      && JUMP_P (trial)
+ 	      && simplejump_p (trial)
+ 	      && (target == 0 || JUMP_LABEL (trial) == target)
++	      && !ANY_RETURN_P (JUMP_LABEL (trial))
+ 	      && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
+ 	      && ! (NONJUMP_INSN_P (next_trial)
+ 		    && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
+@@ -2371,7 +2389,7 @@
+ 	      if (new_label != 0)
+ 		new_label = get_label_before (new_label);
+ 	      else
+-		new_label = find_end_label ();
++		new_label = find_end_label (simple_return_rtx);
+ 
+ 	      if (new_label)
+ 	        {
+@@ -2503,7 +2521,8 @@
+ 
+ /* Follow any unconditional jump at LABEL;
+    return the ultimate label reached by any such chain of jumps.
+-   Return null if the chain ultimately leads to a return instruction.
++   Return a suitable return rtx if the chain ultimately leads to a
++   return instruction.
+    If LABEL is not followed by a jump, return LABEL.
+    If the chain loops or we can't find end, return LABEL,
+    since that tells caller to avoid changing the insn.  */
+@@ -2518,6 +2537,7 @@
+ 
+   for (depth = 0;
+        (depth < 10
++	&& !ANY_RETURN_P (value)
+ 	&& (insn = next_active_insn (value)) != 0
+ 	&& JUMP_P (insn)
+ 	&& ((JUMP_LABEL (insn) != 0 && any_uncondjump_p (insn)
+@@ -2527,18 +2547,22 @@
+ 	&& BARRIER_P (next));
+        depth++)
+     {
+-      rtx tem;
++      rtx this_label = JUMP_LABEL (insn);
+ 
+       /* If we have found a cycle, make the insn jump to itself.  */
+-      if (JUMP_LABEL (insn) == label)
++      if (this_label == label)
+ 	return label;
+ 
+-      tem = next_active_insn (JUMP_LABEL (insn));
+-      if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
++      if (!ANY_RETURN_P (this_label))
++	{
++	  rtx tem = next_active_insn (this_label);
++	  if (tem
++	      && (GET_CODE (PATTERN (tem)) == ADDR_VEC
+ 		  || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
+-	break;
++	    break;
++	}
+ 
+-      value = JUMP_LABEL (insn);
++      value = this_label;
+     }
+   if (depth == 10)
+     return label;
+@@ -2901,6 +2925,7 @@
+      arithmetic insn after the jump insn and put the arithmetic insn in the
+      delay slot.  If we can't do this, return.  */
+   if (delay_list == 0 && likely && new_thread
++      && !ANY_RETURN_P (new_thread)
+       && NONJUMP_INSN_P (new_thread)
+       && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
+       && asm_noperands (PATTERN (new_thread)) < 0)
+@@ -2985,16 +3010,14 @@
+ 
+       gcc_assert (thread_if_true);
+ 
+-      if (new_thread && JUMP_P (new_thread)
+-	  && (simplejump_p (new_thread)
+-	      || GET_CODE (PATTERN (new_thread)) == RETURN)
++      if (new_thread && simplejump_or_return_p (new_thread)
+ 	  && redirect_with_delay_list_safe_p (insn,
+ 					      JUMP_LABEL (new_thread),
+ 					      delay_list))
+ 	new_thread = follow_jumps (JUMP_LABEL (new_thread));
+ 
+-      if (new_thread == 0)
+-	label = find_end_label ();
++      if (ANY_RETURN_P (new_thread))
++	label = find_end_label (new_thread);
+       else if (LABEL_P (new_thread))
+ 	label = new_thread;
+       else
+@@ -3340,11 +3363,12 @@
+ 	 group of consecutive labels.  */
+       if (JUMP_P (insn)
+ 	  && (condjump_p (insn) || condjump_in_parallel_p (insn))
+-	  && (target_label = JUMP_LABEL (insn)) != 0)
++	  && (target_label = JUMP_LABEL (insn)) != 0
++	  && !ANY_RETURN_P (target_label))
+ 	{
+ 	  target_label = skip_consecutive_labels (follow_jumps (target_label));
+-	  if (target_label == 0)
+-	    target_label = find_end_label ();
++	  if (ANY_RETURN_P (target_label))
++	    target_label = find_end_label (target_label);
+ 
+ 	  if (target_label && next_active_insn (target_label) == next
+ 	      && ! condjump_in_parallel_p (insn))
+@@ -3359,9 +3383,8 @@
+ 	  /* See if this jump conditionally branches around an unconditional
+ 	     jump.  If so, invert this jump and point it to the target of the
+ 	     second jump.  */
+-	  if (next && JUMP_P (next)
++	  if (next && simplejump_or_return_p (next)
+ 	      && any_condjump_p (insn)
+-	      && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
+ 	      && target_label
+ 	      && next_active_insn (target_label) == next_active_insn (next)
+ 	      && no_labels_between_p (insn, next))
+@@ -3403,8 +3426,7 @@
+ 	 Don't do this if we expect the conditional branch to be true, because
+ 	 we would then be making the more common case longer.  */
+ 
+-      if (JUMP_P (insn)
+-	  && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
++      if (simplejump_or_return_p (insn)
+ 	  && (other = prev_active_insn (insn)) != 0
+ 	  && any_condjump_p (other)
+ 	  && no_labels_between_p (other, insn)
+@@ -3445,10 +3467,10 @@
+ 	 Only do so if optimizing for size since this results in slower, but
+ 	 smaller code.  */
+       if (optimize_function_for_size_p (cfun)
+-	  && GET_CODE (PATTERN (delay_insn)) == RETURN
++	  && ANY_RETURN_P (PATTERN (delay_insn))
+ 	  && next
+ 	  && JUMP_P (next)
+-	  && GET_CODE (PATTERN (next)) == RETURN)
++	  && PATTERN (next) == PATTERN (delay_insn))
+ 	{
+ 	  rtx after;
+ 	  int i;
+@@ -3487,14 +3509,16 @@
+ 	continue;
+ 
+       target_label = JUMP_LABEL (delay_insn);
++      if (target_label && ANY_RETURN_P (target_label))
++	continue;
+ 
+       if (target_label)
+ 	{
+ 	  /* If this jump goes to another unconditional jump, thread it, but
+ 	     don't convert a jump into a RETURN here.  */
+ 	  trial = skip_consecutive_labels (follow_jumps (target_label));
+-	  if (trial == 0)
+-	    trial = find_end_label ();
++	  if (ANY_RETURN_P (trial))
++	    trial = find_end_label (trial);
+ 
+ 	  if (trial && trial != target_label
+ 	      && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
+@@ -3517,7 +3541,7 @@
+ 		 later incorrectly compute register live/death info.  */
+ 	      rtx tmp = next_active_insn (trial);
+ 	      if (tmp == 0)
+-		tmp = find_end_label ();
++		tmp = find_end_label (simple_return_rtx);
+ 
+ 	      if (tmp)
+ 	        {
+@@ -3537,14 +3561,12 @@
+ 	     delay list and that insn is redundant, thread the jump.  */
+ 	  if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
+ 	      && XVECLEN (PATTERN (trial), 0) == 2
+-	      && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
+-	      && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
+-		  || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
++	      && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
+ 	      && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
+ 	    {
+ 	      target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
+-	      if (target_label == 0)
+-		target_label = find_end_label ();
++	      if (ANY_RETURN_P (target_label))
++		target_label = find_end_label (target_label);
+ 
+ 	      if (target_label
+ 	          && redirect_with_delay_slots_safe_p (delay_insn, target_label,
+@@ -3622,16 +3644,15 @@
+ 	 a RETURN here.  */
+       if (! INSN_ANNULLED_BRANCH_P (delay_insn)
+ 	  && any_condjump_p (delay_insn)
+-	  && next && JUMP_P (next)
+-	  && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
++	  && next && simplejump_or_return_p (next)
+ 	  && next_active_insn (target_label) == next_active_insn (next)
+ 	  && no_labels_between_p (insn, next))
+ 	{
+ 	  rtx label = JUMP_LABEL (next);
+ 	  rtx old_label = JUMP_LABEL (delay_insn);
+ 
+-	  if (label == 0)
+-	    label = find_end_label ();
++	  if (ANY_RETURN_P (label))
++	    label = find_end_label (label);
+ 
+ 	  /* find_end_label can generate a new label. Check this first.  */
+ 	  if (label
+@@ -3692,7 +3713,8 @@
+ make_return_insns (rtx first)
+ {
+   rtx insn, jump_insn, pat;
+-  rtx real_return_label = end_of_function_label;
++  rtx real_return_label = function_return_label;
++  rtx real_simple_return_label = function_simple_return_label;
+   int slots, i;
+ 
+ #ifdef DELAY_SLOTS_FOR_EPILOGUE
+@@ -3707,18 +3729,25 @@
+ #endif
+ 
+   /* See if there is a RETURN insn in the function other than the one we
+-     made for END_OF_FUNCTION_LABEL.  If so, set up anything we can't change
++     made for FUNCTION_RETURN_LABEL.  If so, set up anything we can't change
+      into a RETURN to jump to it.  */
+   for (insn = first; insn; insn = NEXT_INSN (insn))
+-    if (JUMP_P (insn) && GET_CODE (PATTERN (insn)) == RETURN)
++    if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
+       {
+-	real_return_label = get_label_before (insn);
++	rtx t = get_label_before (insn);
++	if (PATTERN (insn) == ret_rtx)
++	  real_return_label = t;
++	else
++	  real_simple_return_label = t;
+ 	break;
+       }
+ 
+   /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
+-     was equal to END_OF_FUNCTION_LABEL.  */
+-  LABEL_NUSES (real_return_label)++;
++     was equal to FUNCTION_RETURN_LABEL.  */
++  if (real_return_label)
++    LABEL_NUSES (real_return_label)++;
++  if (real_simple_return_label)
++    LABEL_NUSES (real_simple_return_label)++;
+ 
+   /* Clear the list of insns to fill so we can use it.  */
+   obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
+@@ -3726,13 +3755,27 @@
+   for (insn = first; insn; insn = NEXT_INSN (insn))
+     {
+       int flags;
++      rtx kind, real_label;
+ 
+       /* Only look at filled JUMP_INSNs that go to the end of function
+ 	 label.  */
+       if (!NONJUMP_INSN_P (insn)
+ 	  || GET_CODE (PATTERN (insn)) != SEQUENCE
+-	  || !JUMP_P (XVECEXP (PATTERN (insn), 0, 0))
+-	  || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
++	  || !JUMP_P (XVECEXP (PATTERN (insn), 0, 0)))
++	continue;
++
++      if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
++	{
++	  kind = ret_rtx;
++	  real_label = real_return_label;
++	}
++      else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
++	       == function_simple_return_label)
++	{
++	  kind = simple_return_rtx;
++	  real_label = real_simple_return_label;
++	}
++      else
+ 	continue;
+ 
+       pat = PATTERN (insn);
+@@ -3740,14 +3783,12 @@
+ 
+       /* If we can't make the jump into a RETURN, try to redirect it to the best
+ 	 RETURN and go on to the next insn.  */
+-      if (! reorg_redirect_jump (jump_insn, NULL_RTX))
++      if (! reorg_redirect_jump (jump_insn, kind))
+ 	{
+ 	  /* Make sure redirecting the jump will not invalidate the delay
+ 	     slot insns.  */
+-	  if (redirect_with_delay_slots_safe_p (jump_insn,
+-						real_return_label,
+-						insn))
+-	    reorg_redirect_jump (jump_insn, real_return_label);
++	  if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
++	    reorg_redirect_jump (jump_insn, real_label);
+ 	  continue;
+ 	}
+ 
+@@ -3787,7 +3828,7 @@
+ 	 RETURN, delete the SEQUENCE and output the individual insns,
+ 	 followed by the RETURN.  Then set things up so we try to find
+ 	 insns for its delay slots, if it needs some.  */
+-      if (GET_CODE (PATTERN (jump_insn)) == RETURN)
++      if (ANY_RETURN_P (PATTERN (jump_insn)))
+ 	{
+ 	  rtx prev = PREV_INSN (insn);
+ 
+@@ -3804,13 +3845,16 @@
+       else
+ 	/* It is probably more efficient to keep this with its current
+ 	   delay slot as a branch to a RETURN.  */
+-	reorg_redirect_jump (jump_insn, real_return_label);
++	reorg_redirect_jump (jump_insn, real_label);
+     }
+ 
+   /* Now delete REAL_RETURN_LABEL if we never used it.  Then try to fill any
+      new delay slots we have created.  */
+-  if (--LABEL_NUSES (real_return_label) == 0)
++  if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
+     delete_related_insns (real_return_label);
++  if (real_simple_return_label != NULL_RTX
++      && --LABEL_NUSES (real_simple_return_label) == 0)
++    delete_related_insns (real_simple_return_label);
+ 
+   fill_simple_delay_slots (1);
+   fill_simple_delay_slots (0);
+@@ -3878,7 +3922,7 @@
+   init_resource_info (epilogue_insn);
+ 
+   /* Show we haven't computed an end-of-function label yet.  */
+-  end_of_function_label = 0;
++  function_return_label = function_simple_return_label = NULL_RTX;
+ 
+   /* Initialize the statistics for this function.  */
+   memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
+@@ -3900,11 +3944,23 @@
+   /* If we made an end of function label, indicate that it is now
+      safe to delete it by undoing our prior adjustment to LABEL_NUSES.
+      If it is now unused, delete it.  */
+-  if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
+-    delete_related_insns (end_of_function_label);
++  if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
++    delete_related_insns (function_return_label);
++  if (function_simple_return_label
++      && --LABEL_NUSES (function_simple_return_label) == 0)
++    delete_related_insns (function_simple_return_label);
+ 
++#if defined HAVE_return || defined HAVE_simple_return
++  if (
+ #ifdef HAVE_return
+-  if (HAVE_return && end_of_function_label != 0)
++      (HAVE_return && function_return_label != 0)
++#else
++      0
++#endif
++#ifdef HAVE_simple_return
++      || (HAVE_simple_return && function_simple_return_label != 0)
++#endif
++      )
+     make_return_insns (first);
+ #endif
+ 
+
+=== modified file 'gcc/resource.c'
+--- old/gcc/resource.c	2009-11-25 10:55:54 +0000
++++ new/gcc/resource.c	2011-01-05 12:12:18 +0000
+@@ -495,6 +495,8 @@
+ 		  || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
+ 		{
+ 		  next = JUMP_LABEL (this_jump_insn);
++		  if (next && ANY_RETURN_P (next))
++		    next = NULL_RTX;
+ 		  if (jump_insn == 0)
+ 		    {
+ 		      jump_insn = insn;
+@@ -562,9 +564,10 @@
+ 		  AND_COMPL_HARD_REG_SET (scratch, needed.regs);
+ 		  AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
+ 
+-		  find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
+-					      &target_res, 0, jump_count,
+-					      target_set, needed);
++		  if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
++		    find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
++						&target_res, 0, jump_count,
++						target_set, needed);
+ 		  find_dead_or_set_registers (next,
+ 					      &fallthrough_res, 0, jump_count,
+ 					      set, needed);
+@@ -1097,6 +1100,8 @@
+       struct resources new_resources;
+       rtx stop_insn = next_active_insn (jump_insn);
+ 
++      if (jump_target && ANY_RETURN_P (jump_target))
++	jump_target = NULL_RTX;
+       mark_target_live_regs (insns, next_active_insn (jump_target),
+ 			     &new_resources);
+       CLEAR_RESOURCE (&set);
+
+=== modified file 'gcc/rtl.c'
+--- old/gcc/rtl.c	2010-12-13 10:05:52 +0000
++++ new/gcc/rtl.c	2011-01-05 12:12:18 +0000
+@@ -256,6 +256,8 @@
+     case CODE_LABEL:
+     case PC:
+     case CC0:
++    case RETURN:
++    case SIMPLE_RETURN:
+     case SCRATCH:
+       /* SCRATCH must be shared because they represent distinct values.  */
+       return orig;
+
+=== modified file 'gcc/rtl.def'
+--- old/gcc/rtl.def	2010-04-02 18:54:46 +0000
++++ new/gcc/rtl.def	2011-01-05 12:12:18 +0000
+@@ -296,6 +296,10 @@
+ 
+ DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+ 
++/* A plain return, to be used on paths that are reached without going
++   through the function prologue.  */
++DEF_RTL_EXPR(SIMPLE_RETURN, "simple_return", "", RTX_EXTRA)
++
+ /* Special for EH return from subroutine.  */
+ 
+ DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
+
+=== modified file 'gcc/rtl.h'
+--- old/gcc/rtl.h	2010-11-16 22:17:17 +0000
++++ new/gcc/rtl.h	2011-01-05 12:12:18 +0000
+@@ -411,6 +411,10 @@
+   (JUMP_P (INSN) && (GET_CODE (PATTERN (INSN)) == ADDR_VEC || \
+ 		     GET_CODE (PATTERN (INSN)) == ADDR_DIFF_VEC))
+ 
++/* Predicate yielding nonzero iff X is a return or simple_preturn.  */
++#define ANY_RETURN_P(X) \
++  (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
++
+ /* 1 if X is a unary operator.  */
+ 
+ #define UNARY_P(X)   \
+@@ -1998,6 +2002,8 @@
+ {
+   GR_PC,
+   GR_CC0,
++  GR_RETURN,
++  GR_SIMPLE_RETURN,
+   GR_STACK_POINTER,
+   GR_FRAME_POINTER,
+ /* For register elimination to work properly these hard_frame_pointer_rtx,
+@@ -2032,6 +2038,8 @@
+ 
+ /* Standard pieces of rtx, to be substituted directly into things.  */
+ #define pc_rtx                  (global_rtl[GR_PC])
++#define ret_rtx                 (global_rtl[GR_RETURN])
++#define simple_return_rtx       (global_rtl[GR_SIMPLE_RETURN])
+ #define cc0_rtx                 (global_rtl[GR_CC0])
+ 
+ /* All references to certain hard regs, except those created
+
+=== modified file 'gcc/rtlanal.c'
+--- old/gcc/rtlanal.c	2010-11-16 22:17:17 +0000
++++ new/gcc/rtlanal.c	2011-01-05 12:12:18 +0000
+@@ -2673,6 +2673,7 @@
+ 
+   if (JUMP_P (insn)
+       && (label = JUMP_LABEL (insn)) != NULL_RTX
++      && !ANY_RETURN_P (label)
+       && (table = next_active_insn (label)) != NULL_RTX
+       && JUMP_TABLE_DATA_P (table))
+     {
+
+=== modified file 'gcc/sched-int.h'
+--- old/gcc/sched-int.h	2010-06-02 16:31:39 +0000
++++ new/gcc/sched-int.h	2011-01-05 12:12:18 +0000
+@@ -199,7 +199,7 @@
+ 
+ extern void ebb_compute_jump_reg_dependencies (rtx, regset, regset, regset);
+ 
+-extern edge find_fallthru_edge (basic_block);
++extern edge find_fallthru_edge_from (basic_block);
+ 
+ extern void (* sched_init_only_bb) (basic_block, basic_block);
+ extern basic_block (* sched_split_block) (basic_block, rtx);
+
+=== modified file 'gcc/sched-vis.c'
+--- old/gcc/sched-vis.c	2009-11-25 10:55:54 +0000
++++ new/gcc/sched-vis.c	2011-01-05 12:12:18 +0000
+@@ -549,6 +549,9 @@
+     case RETURN:
+       sprintf (buf, "return");
+       break;
++    case SIMPLE_RETURN:
++      sprintf (buf, "simple_return");
++      break;
+     case CALL:
+       print_exp (buf, x, verbose);
+       break;
+
+=== modified file 'gcc/sel-sched-ir.c'
+--- old/gcc/sel-sched-ir.c	2010-08-31 11:52:01 +0000
++++ new/gcc/sel-sched-ir.c	2011-01-05 12:12:18 +0000
+@@ -686,7 +686,7 @@
+ 
+       /* Find fallthrough edge.  */
+       gcc_assert (BLOCK_FOR_INSN (insn)->prev_bb);
+-      candidate = find_fallthru_edge (BLOCK_FOR_INSN (insn)->prev_bb);
++      candidate = find_fallthru_edge_from (BLOCK_FOR_INSN (insn)->prev_bb);
+ 
+       if (!candidate
+           || (candidate->src != BLOCK_FOR_INSN (last_scheduled_insn)
+
+=== modified file 'gcc/sel-sched.c'
+--- old/gcc/sel-sched.c	2010-11-12 15:47:38 +0000
++++ new/gcc/sel-sched.c	2011-01-05 12:12:18 +0000
+@@ -617,8 +617,8 @@
+   if (bb == BLOCK_FOR_INSN (succ))
+     return true;
+ 
+-  if (find_fallthru_edge (bb))
+-    bb = find_fallthru_edge (bb)->dest;
++  if (find_fallthru_edge_from (bb))
++    bb = find_fallthru_edge_from (bb)->dest;
+   else
+     return false;
+ 
+@@ -4911,7 +4911,7 @@
+   next = PREV_INSN (insn);
+   BND_TO (bnd) = insn;
+ 
+-  ft_edge = find_fallthru_edge (block_from);
++  ft_edge = find_fallthru_edge_from (block_from);
+   block_next = ft_edge->dest;
+   /* There must be a fallthrough block (or where should go
+   control flow in case of false jump predicate otherwise?).  */
+
+=== modified file 'gcc/vec.h'
+--- old/gcc/vec.h	2010-01-09 14:46:25 +0000
++++ new/gcc/vec.h	2011-01-05 12:12:18 +0000
+@@ -188,6 +188,18 @@
+ 
+ #define VEC_iterate(T,V,I,P)	(VEC_OP(T,base,iterate)(VEC_BASE(V),I,&(P)))
+ 
++/* Convenience macro for forward iteration.  */
++
++#define FOR_EACH_VEC_ELT(T, V, I, P)		\
++  for (I = 0; VEC_iterate (T, (V), (I), (P)); ++(I))
++
++/* Convenience macro for reverse iteration.  */
++
++#define FOR_EACH_VEC_ELT_REVERSE(T,V,I,P) \
++  for (I = VEC_length (T, (V)) - 1;           \
++       VEC_iterate (T, (V), (I), (P));	  \
++       (I)--)
++
+ /* Allocate new vector.
+    VEC(T,A) *VEC_T_A_alloc(int reserve);
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99457.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99457.patch
new file mode 100644
index 0000000000..47b897d5e7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99457.patch
@@ -0,0 +1,4236 @@
+2010-12-03  Yao Qi  <yao@codesourcery.com>
+
+	* config/arm/arm-ldmstm.ml: Rewrite ldm/stm RTL patterns to fix
+	regressions.
+	* config/arm/ldmstm.md: Regenreate.
+
+2010-12-03  Yao Qi  <yao@codesourcery.com>
+
+	Backport from FSF mainline:
+
+	2010-08-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/40457
+	* config/arm/arm.h (arm_regs_in_sequence): Declare.
+	* config/arm/arm-protos.h (emit_ldm_seq, emit_stm_seq,
+	load_multiple_sequence, store_multiple_sequence): Delete
+	declarations.
+	(arm_gen_load_multiple, arm_gen_store_multiple): Adjust
+	declarations.
+	* config/arm/ldmstm.md: New file.
+	* config/arm/arm.c (arm_regs_in_sequence): New array.
+	(load_multiple_sequence): Now static.  New args SAVED_ORDER,
+	CHECK_REGS.  All callers changed.
+	If SAVED_ORDER is nonnull, copy the computed order into it.
+	If CHECK_REGS is false, don't sort REGS.  Handle Thumb mode.
+	(store_multiple_sequence): Now static.  New args NOPS_TOTAL,
+	SAVED_ORDER, REG_RTXS and CHECK_REGS.  All callers changed.
+	If SAVED_ORDER is nonnull, copy the computed order into it.
+	If CHECK_REGS is false, don't sort REGS.  Set up REG_RTXS just
+	like REGS.  Handle Thumb mode.
+	(arm_gen_load_multiple_1): New function, broken out of
+	arm_gen_load_multiple.
+	(arm_gen_store_multiple_1): New function, broken out of
+	arm_gen_store_multiple.
+	(arm_gen_multiple_op): New function, with code from
+	arm_gen_load_multiple and arm_gen_store_multiple moved here.
+	(arm_gen_load_multiple, arm_gen_store_multiple): Now just
+	wrappers around arm_gen_multiple_op.  Remove argument UP, all callers
+	changed.
+	(gen_ldm_seq, gen_stm_seq, gen_const_stm_seq): New functions.
+	* config/arm/predicates.md (commutative_binary_operator): New.
+	(load_multiple_operation, store_multiple_operation): Handle more
+	variants of these patterns with different starting offsets.  Handle
+	Thumb-1.
+	* config/arm/arm.md: Include "ldmstm.md".
+	(ldmsi_postinc4, ldmsi_postinc4_thumb1, ldmsi_postinc3, ldmsi_postinc2,
+	ldmsi4, ldmsi3, ldmsi2, stmsi_postinc4, stmsi_postinc4_thumb1,
+	stmsi_postinc3, stmsi_postinc2, stmsi4, stmsi3, stmsi2 and related
+	peepholes): Delete.
+	* config/arm/ldmstm.md: New file.
+	* config/arm/arm-ldmstm.ml: New file.
+
+	* config/arm/arm.c (arm_rtx_costs_1): Remove second clause from the
+	if statement which adds extra costs to frame-related expressions.
+
+	2010-05-06  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/arm/arm.h (MAX_LDM_STM_OPS): New macro.
+	* config/arm/arm.c (multiple_operation_profitable_p,
+	compute_offset_order): New static functions.
+	(load_multiple_sequence, store_multiple_sequence): Use them.
+	Replace constant 4 with MAX_LDM_STM_OPS.  Compute order[0] from
+	memory offsets, not register numbers.
+	(emit_ldm_seq, emit_stm_seq): Replace constant 4 with MAX_LDM_STM_OPS.
+
+	2010-04-16  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* recog.h (struct recog_data): New field is_operator.
+	(struct insn_operand_data): New field is_operator.
+	* recog.c (extract_insn): Set recog_data.is_operator.
+	* genoutput.c (output_operand_data): Emit code to set the
+	is_operator field.
+	* reload.c (find_reloads): Use it rather than testing for an
+	empty constraint string.
+
+=== added file 'gcc/config/arm/arm-ldmstm.ml'
+--- old/gcc/config/arm/arm-ldmstm.ml	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/arm-ldmstm.ml	2010-11-16 13:08:47 +0000
+@@ -0,0 +1,333 @@
++(* Auto-generate ARM ldm/stm patterns
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by CodeSourcery.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it under
++   the terms of the GNU General Public License as published by the Free
++   Software Foundation; either version 3, or (at your option) any later
++   version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or
++   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++   for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.
++
++   This is an O'Caml program.  The O'Caml compiler is available from:
++
++     http://caml.inria.fr/
++
++   Or from your favourite OS's friendly packaging system. Tested with version
++   3.09.2, though other versions will probably work too.
++
++   Run with:
++     ocaml arm-ldmstm.ml >/path/to/gcc/config/arm/ldmstm.ml
++*)
++
++type amode = IA | IB | DA | DB
++
++type optype = IN | OUT | INOUT
++
++let rec string_of_addrmode addrmode =
++  match addrmode with
++    IA -> "ia" | IB -> "ib" | DA -> "da" | DB -> "db"
++
++let rec initial_offset addrmode nregs =
++  match addrmode with
++    IA -> 0
++  | IB -> 4
++  | DA -> -4 * nregs + 4
++  | DB -> -4 * nregs
++
++let rec final_offset addrmode nregs =
++  match addrmode with
++    IA -> nregs * 4
++  | IB -> nregs * 4
++  | DA -> -4 * nregs
++  | DB -> -4 * nregs
++
++let constr thumb =
++  if thumb then "l" else "rk"
++
++let inout_constr op_type =
++  match op_type with
++  OUT -> "="
++  | INOUT -> "+&"
++  | IN -> ""
++
++let destreg nregs first op_type thumb =
++  if not first then
++    Printf.sprintf "(match_dup %d)" (nregs)
++  else
++    Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")")
++    (nregs) (inout_constr op_type) (constr thumb)
++
++let write_ldm_set thumb nregs offset opnr first =
++  let indent = "     " in
++  Printf.printf "%s" (if first then "    [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (mem:SI " indent;
++  begin if offset != 0 then Printf.printf "(plus:SI " end;
++  Printf.printf "%s" (destreg nregs first IN thumb);
++  begin if offset != 0 then Printf.printf "\n%s             (const_int %d))" indent offset end;
++  Printf.printf "))"
++
++let write_stm_set thumb nregs offset opnr first =
++  let indent = "     " in
++  Printf.printf "%s" (if first then "    [" else indent);
++  Printf.printf "(set (mem:SI ";
++  begin if offset != 0 then Printf.printf "(plus:SI " end;
++  Printf.printf "%s" (destreg nregs first IN thumb);
++  begin if offset != 0 then Printf.printf " (const_int %d))" offset end;
++  Printf.printf ")\n%s     (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr 
++
++let write_ldm_peep_set extra_indent nregs opnr first =
++  let indent = "   " ^ extra_indent in
++  Printf.printf "%s" (if first then extra_indent ^ "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"s_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (match_operand:SI %d \"memory_operand\" \"\"))" indent (nregs + opnr)
++
++let write_stm_peep_set extra_indent nregs opnr first =
++  let indent = "   " ^ extra_indent in
++  Printf.printf "%s" (if first then extra_indent ^ "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"memory_operand\" \"\")\n" (nregs + opnr);
++  Printf.printf "%s     (match_operand:SI %d \"s_register_operand\" \"\"))" indent opnr
++
++let write_any_load optype nregs opnr first =
++  let indent = "   " in
++  Printf.printf "%s" (if first then "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"s_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (match_operand:SI %d \"%s\" \"\"))" indent (nregs * 2 + opnr) optype
++
++let write_const_store nregs opnr first =
++  let indent = "   " in
++  Printf.printf "%s(set (match_operand:SI %d \"memory_operand\" \"\")\n" indent (nregs + opnr);
++  Printf.printf "%s     (match_dup %d))" indent opnr
++
++let write_const_stm_peep_set nregs opnr first =
++  write_any_load "const_int_operand" nregs opnr first;
++  Printf.printf "\n";
++  write_const_store nregs opnr false
++
++  
++let rec write_pat_sets func opnr offset first n_left =
++  func offset opnr first;
++  begin
++    if n_left > 1 then begin
++      Printf.printf "\n";
++      write_pat_sets func (opnr + 1) (offset + 4) false (n_left - 1);
++    end else
++      Printf.printf "]"
++  end
++
++let rec write_peep_sets func opnr first n_left =
++  func opnr first;
++  begin
++    if n_left > 1 then begin
++      Printf.printf "\n";
++      write_peep_sets func (opnr + 1) false (n_left - 1);
++    end
++  end
++    
++let can_thumb addrmode update is_store =
++  match addrmode, update, is_store with
++    (* Thumb1 mode only supports IA with update.  However, for LDMIA,
++       if the address register also appears in the list of loaded
++       registers, the loaded value is stored, hence the RTL pattern
++       to describe such an insn does not have an update.  We check
++       in the match_parallel predicate that the condition described
++       above is met.  *)
++    IA, _, false -> true
++  | IA, true, true -> true
++  | _ -> false
++
++let target addrmode thumb =
++  match addrmode, thumb with
++    IA, true -> "TARGET_THUMB1"
++  | IA, false -> "TARGET_32BIT"
++  | DB, false -> "TARGET_32BIT"
++  | _, false -> "TARGET_ARM"
++
++let write_pattern_1 name ls addrmode nregs write_set_fn update thumb =
++  let astr = string_of_addrmode addrmode in
++  Printf.printf "(define_insn \"*%s%s%d_%s%s\"\n"
++    (if thumb then "thumb_" else "") name nregs astr
++    (if update then "_update" else "");
++  Printf.printf "  [(match_parallel 0 \"%s_multiple_operation\"\n" ls;
++  begin
++    if update then begin
++      Printf.printf "    [(set %s\n          (plus:SI "
++	(destreg 1 true OUT thumb); (*destreg 2 true IN thumb*)
++      Printf.printf "(match_operand:SI 2 \"s_register_operand\" \"1\")";
++      Printf.printf " (const_int %d)))\n"
++	(final_offset addrmode nregs)
++    end
++  end;
++  write_pat_sets
++    (write_set_fn thumb (if update then 2 else 1)) (if update then 3 else 2)
++    (initial_offset addrmode nregs)
++    (not update) nregs;
++  Printf.printf ")]\n  \"%s && XVECLEN (operands[0], 0) == %d\"\n"
++    (target addrmode thumb)
++    (if update then nregs + 1 else nregs);
++  Printf.printf "  \"%s%%(%s%%)\\t%%%d%s, {"
++    name astr (1) (if update then "!" else "");
++  for n = 1 to nregs; do
++    Printf.printf "%%%d%s" (n+(if update then 2 else 1)) (if n < nregs then ", " else "")
++  done;
++  Printf.printf "}\"\n";
++  Printf.printf "  [(set_attr \"type\" \"%s%d\")" ls nregs;
++  begin if not thumb then
++    Printf.printf "\n   (set_attr \"predicable\" \"yes\")";
++  end;
++  Printf.printf "])\n\n"
++
++let write_ldm_pattern addrmode nregs update =
++  write_pattern_1 "ldm" "load" addrmode nregs write_ldm_set update false;
++  begin if can_thumb addrmode update false then
++    write_pattern_1 "ldm" "load" addrmode nregs write_ldm_set update true;
++  end
++
++let write_stm_pattern addrmode nregs update =
++  write_pattern_1 "stm" "store" addrmode nregs write_stm_set update false;
++  begin if can_thumb addrmode update true then
++    write_pattern_1 "stm" "store" addrmode nregs write_stm_set update true;
++  end
++
++let write_ldm_commutative_peephole thumb =
++  let nregs = 2 in
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_ldm_peep_set "" nregs) 0 true nregs;
++  let indent = "   " in
++  if thumb then begin
++    Printf.printf "\n%s(set (match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2);
++    Printf.printf "%s     (match_operator:SI %d \"commutative_binary_operator\"\n" indent (nregs * 2 + 1);
++    Printf.printf "%s      [(match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2 + 2);
++    Printf.printf "%s       (match_operand:SI %d \"s_register_operand\" \"\")]))]\n" indent (nregs * 2 + 3)
++  end else begin
++    Printf.printf "\n%s(parallel\n" indent;
++    Printf.printf "%s  [(set (match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2);
++    Printf.printf "%s        (match_operator:SI %d \"commutative_binary_operator\"\n" indent (nregs * 2 + 1);
++    Printf.printf "%s         [(match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2 + 2);
++    Printf.printf "%s          (match_operand:SI %d \"s_register_operand\" \"\")]))\n" indent (nregs * 2 + 3);
++    Printf.printf "%s   (clobber (reg:CC CC_REGNUM))])]\n" indent
++  end;
++  Printf.printf "  \"(((operands[%d] == operands[0] && operands[%d] == operands[1])\n" (nregs * 2 + 2) (nregs * 2 + 3);
++  Printf.printf "     || (operands[%d] == operands[0] && operands[%d] == operands[1]))\n" (nregs * 2 + 3) (nregs * 2 + 2);
++  Printf.printf "    && peep2_reg_dead_p (%d, operands[0]) && peep2_reg_dead_p (%d, operands[1]))\"\n" (nregs + 1) (nregs + 1);
++  begin
++    if thumb then
++      Printf.printf "  [(set (match_dup %d) (match_op_dup %d [(match_dup %d) (match_dup %d)]))]\n"
++	(nregs * 2) (nregs * 2 + 1) (nregs * 2 + 2) (nregs * 2 + 3)
++    else begin
++      Printf.printf "  [(parallel\n";
++      Printf.printf "    [(set (match_dup %d) (match_op_dup %d [(match_dup %d) (match_dup %d)]))\n"
++	(nregs * 2) (nregs * 2 + 1) (nregs * 2 + 2) (nregs * 2 + 3);
++      Printf.printf "     (clobber (reg:CC CC_REGNUM))])]\n"
++    end
++  end;
++  Printf.printf "{\n  if (!gen_ldm_seq (operands, %d, true))\n    FAIL;\n" nregs;
++  Printf.printf "})\n\n"
++
++let write_ldm_peephole nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_ldm_peep_set "" nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_ldm_seq (operands, %d, false))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_ldm_peephole_b nregs =
++  if nregs > 2 then begin
++    Printf.printf "(define_peephole2\n";
++    write_ldm_peep_set "" nregs 0 true;
++    Printf.printf "\n   (parallel\n";
++    write_peep_sets (write_ldm_peep_set "  " nregs) 1 true (nregs - 1);
++    Printf.printf "])]\n  \"\"\n  [(const_int 0)]\n{\n";
++    Printf.printf "  if (gen_ldm_seq (operands, %d, false))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++  end
++
++let write_stm_peephole nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_stm_peep_set "" nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_stm_peephole_b nregs =
++  if nregs > 2 then begin
++    Printf.printf "(define_peephole2\n";
++    write_stm_peep_set "" nregs 0 true;
++    Printf.printf "\n   (parallel\n";
++    write_peep_sets (write_stm_peep_set "" nregs) 1 true (nregs - 1);
++    Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++    Printf.printf "  if (gen_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++  end
++
++let write_const_stm_peephole_a nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_const_stm_peep_set nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_const_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_const_stm_peephole_b nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_any_load "const_int_operand" nregs) 0 true nregs;
++  Printf.printf "\n";
++  write_peep_sets (write_const_store nregs) 0 false nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_const_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let patterns () =
++  let addrmodes = [ IA; IB; DA; DB ]  in
++  let sizes = [ 4; 3; 2] in
++  List.iter
++    (fun n ->
++      List.iter
++	(fun addrmode ->
++	  write_ldm_pattern addrmode n false;
++	  write_ldm_pattern addrmode n true;
++	  write_stm_pattern addrmode n false;
++	  write_stm_pattern addrmode n true)
++	addrmodes;
++      write_ldm_peephole n;
++      write_ldm_peephole_b n;
++      write_const_stm_peephole_a n;
++      write_const_stm_peephole_b n;
++      write_stm_peephole n;)
++    sizes;
++  write_ldm_commutative_peephole false;
++  write_ldm_commutative_peephole true
++
++let print_lines = List.iter (fun s -> Format.printf "%s@\n" s)
++
++(* Do it.  *)
++
++let _ = 
++  print_lines [
++"/* ARM ldm/stm instruction patterns.  This file was automatically generated";
++"   using arm-ldmstm.ml.  Please do not edit manually.";
++"";
++"   Copyright (C) 2010 Free Software Foundation, Inc.";
++"   Contributed by CodeSourcery.";
++"";
++"   This file is part of GCC.";
++"";
++"   GCC is free software; you can redistribute it and/or modify it";
++"   under the terms of the GNU General Public License as published";
++"   by the Free Software Foundation; either version 3, or (at your";
++"   option) any later version.";
++"";
++"   GCC is distributed in the hope that it will be useful, but WITHOUT";
++"   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY";
++"   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public";
++"   License for more details.";
++"";
++"   You should have received a copy of the GNU General Public License and";
++"   a copy of the GCC Runtime Library Exception along with this program;";
++"   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see";
++"   <http://www.gnu.org/licenses/>.  */";
++""];
++  patterns ();
+
+=== modified file 'gcc/config/arm/arm-protos.h'
+--- old/gcc/config/arm/arm-protos.h	2011-01-05 12:12:18 +0000
++++ new/gcc/config/arm/arm-protos.h	2011-01-05 18:20:37 +0000
+@@ -100,14 +100,11 @@
+ extern int label_mentioned_p (rtx);
+ extern RTX_CODE minmax_code (rtx);
+ extern int adjacent_mem_locations (rtx, rtx);
+-extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+-extern const char *emit_ldm_seq (rtx *, int);
+-extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+-extern const char * emit_stm_seq (rtx *, int);
+-extern rtx arm_gen_load_multiple (int, int, rtx, int, int,
+-				  rtx, HOST_WIDE_INT *);
+-extern rtx arm_gen_store_multiple (int, int, rtx, int, int,
+-				   rtx, HOST_WIDE_INT *);
++extern bool gen_ldm_seq (rtx *, int, bool);
++extern bool gen_stm_seq (rtx *, int);
++extern bool gen_const_stm_seq (rtx *, int);
++extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
++extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
+ extern int arm_gen_movmemqi (rtx *);
+ extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
+ extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2011-01-05 12:12:18 +0000
++++ new/gcc/config/arm/arm.c	2011-01-05 18:20:37 +0000
+@@ -753,6 +753,12 @@
+   "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
+ };
+ 
++/* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
++int arm_regs_in_sequence[] =
++{
++  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
++};
++
+ #define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl")
+ #define streq(string1, string2) (strcmp (string1, string2) == 0)
+ 
+@@ -9680,142 +9686,16 @@
+   return 0;
+ }
+ 
+-int
+-load_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+-			HOST_WIDE_INT *load_offset)
+-{
+-  int unsorted_regs[4];
+-  HOST_WIDE_INT unsorted_offsets[4];
+-  int order[4];
+-  int base_reg = -1;
+-  int i;
+-
+-  if (low_irq_latency)
+-    return 0;
+-
+-  /* Can only handle 2, 3, or 4 insns at present,
+-     though could be easily extended if required.  */
+-  gcc_assert (nops >= 2 && nops <= 4);
+-
+-  memset (order, 0, 4 * sizeof (int));
+-
+-  /* Loop over the operands and check that the memory references are
+-     suitable (i.e. immediate offsets from the same base register).  At
+-     the same time, extract the target register, and the memory
+-     offsets.  */
+-  for (i = 0; i < nops; i++)
+-    {
+-      rtx reg;
+-      rtx offset;
+-
+-      /* Convert a subreg of a mem into the mem itself.  */
+-      if (GET_CODE (operands[nops + i]) == SUBREG)
+-	operands[nops + i] = alter_subreg (operands + (nops + i));
+-
+-      gcc_assert (GET_CODE (operands[nops + i]) == MEM);
+-
+-      /* Don't reorder volatile memory references; it doesn't seem worth
+-	 looking for the case where the order is ok anyway.  */
+-      if (MEM_VOLATILE_P (operands[nops + i]))
+-	return 0;
+-
+-      offset = const0_rtx;
+-
+-      if ((GET_CODE (reg = XEXP (operands[nops + i], 0)) == REG
+-	   || (GET_CODE (reg) == SUBREG
+-	       && GET_CODE (reg = SUBREG_REG (reg)) == REG))
+-	  || (GET_CODE (XEXP (operands[nops + i], 0)) == PLUS
+-	      && ((GET_CODE (reg = XEXP (XEXP (operands[nops + i], 0), 0))
+-		   == REG)
+-		  || (GET_CODE (reg) == SUBREG
+-		      && GET_CODE (reg = SUBREG_REG (reg)) == REG))
+-	      && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
+-		  == CONST_INT)))
+-	{
+-	  if (i == 0)
+-	    {
+-	      base_reg = REGNO (reg);
+-	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      order[0] = 0;
+-	    }
+-	  else
+-	    {
+-	      if (base_reg != (int) REGNO (reg))
+-		/* Not addressed from the same base register.  */
+-		return 0;
+-
+-	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      if (unsorted_regs[i] < unsorted_regs[order[0]])
+-		order[0] = i;
+-	    }
+-
+-	  /* If it isn't an integer register, or if it overwrites the
+-	     base register but isn't the last insn in the list, then
+-	     we can't do this.  */
+-	  if (unsorted_regs[i] < 0 || unsorted_regs[i] > 14
+-	      || (i != nops - 1 && unsorted_regs[i] == base_reg))
+-	    return 0;
+-
+-	  unsorted_offsets[i] = INTVAL (offset);
+-	}
+-      else
+-	/* Not a suitable memory address.  */
+-	return 0;
+-    }
+-
+-  /* All the useful information has now been extracted from the
+-     operands into unsorted_regs and unsorted_offsets; additionally,
+-     order[0] has been set to the lowest numbered register in the
+-     list.  Sort the registers into order, and check that the memory
+-     offsets are ascending and adjacent.  */
+-
+-  for (i = 1; i < nops; i++)
+-    {
+-      int j;
+-
+-      order[i] = order[i - 1];
+-      for (j = 0; j < nops; j++)
+-	if (unsorted_regs[j] > unsorted_regs[order[i - 1]]
+-	    && (order[i] == order[i - 1]
+-		|| unsorted_regs[j] < unsorted_regs[order[i]]))
+-	  order[i] = j;
+-
+-      /* Have we found a suitable register? if not, one must be used more
+-	 than once.  */
+-      if (order[i] == order[i - 1])
+-	return 0;
+-
+-      /* Is the memory address adjacent and ascending? */
+-      if (unsorted_offsets[order[i]] != unsorted_offsets[order[i - 1]] + 4)
+-	return 0;
+-    }
+-
+-  if (base)
+-    {
+-      *base = base_reg;
+-
+-      for (i = 0; i < nops; i++)
+-	regs[i] = unsorted_regs[order[i]];
+-
+-      *load_offset = unsorted_offsets[order[0]];
+-    }
+-
+-  if (unsorted_offsets[order[0]] == 0)
+-    return 1; /* ldmia */
+-
+-  if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
+-    return 2; /* ldmib */
+-
+-  if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
+-    return 3; /* ldmda */
+-
+-  if (unsorted_offsets[order[nops - 1]] == -4)
+-    return 4; /* ldmdb */
+-
++
++/* Return true iff it would be profitable to turn a sequence of NOPS loads
++   or stores (depending on IS_STORE) into a load-multiple or store-multiple
++   instruction.  ADD_OFFSET is nonzero if the base address register needs
++   to be modified with an add instruction before we can use it.  */
++
++static bool
++multiple_operation_profitable_p (bool is_store ATTRIBUTE_UNUSED,
++				 int nops, HOST_WIDE_INT add_offset)
++ {
+   /* For ARM8,9 & StrongARM, 2 ldr instructions are faster than an ldm
+      if the offset isn't small enough.  The reason 2 ldrs are faster
+      is because these ARMs are able to do more than one cache access
+@@ -9845,91 +9725,239 @@
+      We cheat here and test 'arm_ld_sched' which we currently know to
+      only be true for the ARM8, ARM9 and StrongARM.  If this ever
+      changes, then the test below needs to be reworked.  */
+-  if (nops == 2 && arm_ld_sched)
++  if (nops == 2 && arm_ld_sched && add_offset != 0)
++    return false;
++
++  return true;
++}
++
++/* Subroutine of load_multiple_sequence and store_multiple_sequence.
++   Given an array of UNSORTED_OFFSETS, of which there are NOPS, compute
++   an array ORDER which describes the sequence to use when accessing the
++   offsets that produces an ascending order.  In this sequence, each
++   offset must be larger by exactly 4 than the previous one.  ORDER[0]
++   must have been filled in with the lowest offset by the caller.
++   If UNSORTED_REGS is nonnull, it is an array of register numbers that
++   we use to verify that ORDER produces an ascending order of registers.
++   Return true if it was possible to construct such an order, false if
++   not.  */
++
++static bool
++compute_offset_order (int nops, HOST_WIDE_INT *unsorted_offsets, int *order,
++		      int *unsorted_regs)
++{
++  int i;
++  for (i = 1; i < nops; i++)
++    {
++      int j;
++
++      order[i] = order[i - 1];
++      for (j = 0; j < nops; j++)
++	if (unsorted_offsets[j] == unsorted_offsets[order[i - 1]] + 4)
++	  {
++	    /* We must find exactly one offset that is higher than the
++	       previous one by 4.  */
++	    if (order[i] != order[i - 1])
++	      return false;
++	    order[i] = j;
++	  }
++      if (order[i] == order[i - 1])
++	return false;
++      /* The register numbers must be ascending.  */
++      if (unsorted_regs != NULL
++	  && unsorted_regs[order[i]] <= unsorted_regs[order[i - 1]])
++	return false;
++    }
++  return true;
++}
++
++/* Used to determine in a peephole whether a sequence of load
++   instructions can be changed into a load-multiple instruction.
++   NOPS is the number of separate load instructions we are examining.  The
++   first NOPS entries in OPERANDS are the destination registers, the
++   next NOPS entries are memory operands.  If this function is
++   successful, *BASE is set to the common base register of the memory
++   accesses; *LOAD_OFFSET is set to the first memory location's offset
++   from that base register.
++   REGS is an array filled in with the destination register numbers.
++   SAVED_ORDER (if nonnull), is an array filled in with an order that maps
++   insn numbers to to an ascending order of stores.  If CHECK_REGS is true,
++   the sequence of registers in REGS matches the loads from ascending memory
++   locations, and the function verifies that the register numbers are
++   themselves ascending.  If CHECK_REGS is false, the register numbers
++   are stored in the order they are found in the operands.  */
++static int
++load_multiple_sequence (rtx *operands, int nops, int *regs, int *saved_order,
++			int *base, HOST_WIDE_INT *load_offset, bool check_regs)
++{
++  int unsorted_regs[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT unsorted_offsets[MAX_LDM_STM_OPS];
++  int order[MAX_LDM_STM_OPS];
++  rtx base_reg_rtx = NULL;
++  int base_reg = -1;
++  int i, ldm_case;
++
++  if (low_irq_latency)
+     return 0;
+ 
+-  /* Can't do it without setting up the offset, only do this if it takes
+-     no more than one insn.  */
+-  return (const_ok_for_arm (unsorted_offsets[order[0]])
+-	  || const_ok_for_arm (-unsorted_offsets[order[0]])) ? 5 : 0;
+-}
+-
+-const char *
+-emit_ldm_seq (rtx *operands, int nops)
+-{
+-  int regs[4];
+-  int base_reg;
+-  HOST_WIDE_INT offset;
+-  char buf[100];
+-  int i;
+-
+-  switch (load_multiple_sequence (operands, nops, regs, &base_reg, &offset))
++  /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be
++     easily extended if required.  */
++  gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS);
++
++  memset (order, 0, MAX_LDM_STM_OPS * sizeof (int));
++
++  /* Loop over the operands and check that the memory references are
++     suitable (i.e. immediate offsets from the same base register).  At
++     the same time, extract the target register, and the memory
++     offsets.  */
++  for (i = 0; i < nops; i++)
+     {
+-    case 1:
+-      strcpy (buf, "ldm%(ia%)\t");
+-      break;
+-
+-    case 2:
+-      strcpy (buf, "ldm%(ib%)\t");
+-      break;
+-
+-    case 3:
+-      strcpy (buf, "ldm%(da%)\t");
+-      break;
+-
+-    case 4:
+-      strcpy (buf, "ldm%(db%)\t");
+-      break;
+-
+-    case 5:
+-      if (offset >= 0)
+-	sprintf (buf, "add%%?\t%s%s, %s%s, #%ld", REGISTER_PREFIX,
+-		 reg_names[regs[0]], REGISTER_PREFIX, reg_names[base_reg],
+-		 (long) offset);
++      rtx reg;
++      rtx offset;
++
++      /* Convert a subreg of a mem into the mem itself.  */
++      if (GET_CODE (operands[nops + i]) == SUBREG)
++	operands[nops + i] = alter_subreg (operands + (nops + i));
++
++      gcc_assert (GET_CODE (operands[nops + i]) == MEM);
++
++      /* Don't reorder volatile memory references; it doesn't seem worth
++	 looking for the case where the order is ok anyway.  */
++      if (MEM_VOLATILE_P (operands[nops + i]))
++	return 0;
++
++      offset = const0_rtx;
++
++      if ((GET_CODE (reg = XEXP (operands[nops + i], 0)) == REG
++	   || (GET_CODE (reg) == SUBREG
++	       && GET_CODE (reg = SUBREG_REG (reg)) == REG))
++	  || (GET_CODE (XEXP (operands[nops + i], 0)) == PLUS
++	      && ((GET_CODE (reg = XEXP (XEXP (operands[nops + i], 0), 0))
++		   == REG)
++		  || (GET_CODE (reg) == SUBREG
++		      && GET_CODE (reg = SUBREG_REG (reg)) == REG))
++	      && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
++		  == CONST_INT)))
++	{
++	  if (i == 0)
++	    {
++	      base_reg = REGNO (reg);
++	      base_reg_rtx = reg;
++	      if (TARGET_THUMB1 && base_reg > LAST_LO_REGNUM)
++		return 0;
++	    }
++	  else if (base_reg != (int) REGNO (reg))
++	    /* Not addressed from the same base register.  */
++	    return 0;
++
++	  unsorted_regs[i] = (GET_CODE (operands[i]) == REG
++			      ? REGNO (operands[i])
++			      : REGNO (SUBREG_REG (operands[i])));
++
++	  /* If it isn't an integer register, or if it overwrites the
++	     base register but isn't the last insn in the list, then
++	     we can't do this.  */
++	  if (unsorted_regs[i] < 0
++	      || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM)
++	      || unsorted_regs[i] > 14
++	      || (i != nops - 1 && unsorted_regs[i] == base_reg))
++	    return 0;
++
++	  unsorted_offsets[i] = INTVAL (offset);
++	  if (i == 0 || unsorted_offsets[i] < unsorted_offsets[order[0]])
++	    order[0] = i;
++	}
+       else
+-	sprintf (buf, "sub%%?\t%s%s, %s%s, #%ld", REGISTER_PREFIX,
+-		 reg_names[regs[0]], REGISTER_PREFIX, reg_names[base_reg],
+-		 (long) -offset);
+-      output_asm_insn (buf, operands);
+-      base_reg = regs[0];
+-      strcpy (buf, "ldm%(ia%)\t");
+-      break;
+-
+-    default:
+-      gcc_unreachable ();
+-    }
+-
+-  sprintf (buf + strlen (buf), "%s%s, {%s%s", REGISTER_PREFIX,
+-	   reg_names[base_reg], REGISTER_PREFIX, reg_names[regs[0]]);
+-
+-  for (i = 1; i < nops; i++)
+-    sprintf (buf + strlen (buf), ", %s%s", REGISTER_PREFIX,
+-	     reg_names[regs[i]]);
+-
+-  strcat (buf, "}\t%@ phole ldm");
+-
+-  output_asm_insn (buf, operands);
+-  return "";
++	/* Not a suitable memory address.  */
++	return 0;
++    }
++
++  /* All the useful information has now been extracted from the
++     operands into unsorted_regs and unsorted_offsets; additionally,
++     order[0] has been set to the lowest offset in the list.  Sort
++     the offsets into order, verifying that they are adjacent, and
++     check that the register numbers are ascending.  */
++  if (!compute_offset_order (nops, unsorted_offsets, order,
++			     check_regs ? unsorted_regs : NULL))
++    return 0;
++
++  if (saved_order)
++    memcpy (saved_order, order, sizeof order);
++
++  if (base)
++    {
++      *base = base_reg;
++
++      for (i = 0; i < nops; i++)
++	regs[i] = unsorted_regs[check_regs ? order[i] : i];
++
++      *load_offset = unsorted_offsets[order[0]];
++    }
++
++  if (TARGET_THUMB1
++      && !peep2_reg_dead_p (nops, base_reg_rtx))
++    return 0;
++
++  if (unsorted_offsets[order[0]] == 0)
++    ldm_case = 1; /* ldmia */
++  else if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
++    ldm_case = 2; /* ldmib */
++  else if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
++    ldm_case = 3; /* ldmda */
++  else if (TARGET_32BIT && unsorted_offsets[order[nops - 1]] == -4)
++    ldm_case = 4; /* ldmdb */
++  else if (const_ok_for_arm (unsorted_offsets[order[0]])
++	   || const_ok_for_arm (-unsorted_offsets[order[0]]))
++    ldm_case = 5;
++  else
++    return 0;
++
++  if (!multiple_operation_profitable_p (false, nops,
++					ldm_case == 5
++					? unsorted_offsets[order[0]] : 0))
++    return 0;
++
++  return ldm_case;
+ }
+ 
+-int
+-store_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+-			 HOST_WIDE_INT * load_offset)
++/* Used to determine in a peephole whether a sequence of store instructions can
++   be changed into a store-multiple instruction.
++   NOPS is the number of separate store instructions we are examining.
++   NOPS_TOTAL is the total number of instructions recognized by the peephole
++   pattern.
++   The first NOPS entries in OPERANDS are the source registers, the next
++   NOPS entries are memory operands.  If this function is successful, *BASE is
++   set to the common base register of the memory accesses; *LOAD_OFFSET is set
++   to the first memory location's offset from that base register.  REGS is an
++   array filled in with the source register numbers, REG_RTXS (if nonnull) is
++   likewise filled with the corresponding rtx's.
++   SAVED_ORDER (if nonnull), is an array filled in with an order that maps insn
++   numbers to to an ascending order of stores.
++   If CHECK_REGS is true, the sequence of registers in *REGS matches the stores
++   from ascending memory locations, and the function verifies that the register
++   numbers are themselves ascending.  If CHECK_REGS is false, the register
++   numbers are stored in the order they are found in the operands.  */
++static int
++store_multiple_sequence (rtx *operands, int nops, int nops_total,
++			 int *regs, rtx *reg_rtxs, int *saved_order, int *base,
++			 HOST_WIDE_INT *load_offset, bool check_regs)
+ {
+-  int unsorted_regs[4];
+-  HOST_WIDE_INT unsorted_offsets[4];
+-  int order[4];
++  int unsorted_regs[MAX_LDM_STM_OPS];
++  rtx unsorted_reg_rtxs[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT unsorted_offsets[MAX_LDM_STM_OPS];
++  int order[MAX_LDM_STM_OPS];
+   int base_reg = -1;
+-  int i;
++  rtx base_reg_rtx = NULL;
++  int i, stm_case;
+ 
+   if (low_irq_latency)
+     return 0;
+ 
+-  /* Can only handle 2, 3, or 4 insns at present, though could be easily
+-     extended if required.  */
+-  gcc_assert (nops >= 2 && nops <= 4);
++  /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be
++     easily extended if required.  */
++  gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS);
+ 
+-  memset (order, 0, 4 * sizeof (int));
++  memset (order, 0, MAX_LDM_STM_OPS * sizeof (int));
+ 
+   /* Loop over the operands and check that the memory references are
+      suitable (i.e. immediate offsets from the same base register).  At
+@@ -9964,32 +9992,32 @@
+ 	      && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
+ 		  == CONST_INT)))
+ 	{
++	  unsorted_reg_rtxs[i] = (GET_CODE (operands[i]) == REG
++				  ? operands[i] : SUBREG_REG (operands[i]));
++	  unsorted_regs[i] = REGNO (unsorted_reg_rtxs[i]);
++
+ 	  if (i == 0)
+ 	    {
+ 	      base_reg = REGNO (reg);
+-	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      order[0] = 0;
+-	    }
+-	  else
+-	    {
+-	      if (base_reg != (int) REGNO (reg))
+-		/* Not addressed from the same base register.  */
++	      base_reg_rtx = reg;
++	      if (TARGET_THUMB1 && base_reg > LAST_LO_REGNUM)
+ 		return 0;
+-
+-	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      if (unsorted_regs[i] < unsorted_regs[order[0]])
+-		order[0] = i;
+ 	    }
++	  else if (base_reg != (int) REGNO (reg))
++	    /* Not addressed from the same base register.  */
++	    return 0;
+ 
+ 	  /* If it isn't an integer register, then we can't do this.  */
+-	  if (unsorted_regs[i] < 0 || unsorted_regs[i] > 14)
++	  if (unsorted_regs[i] < 0
++	      || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM)
++	      || (TARGET_THUMB2 && unsorted_regs[i] == base_reg)
++	      || (TARGET_THUMB2 && unsorted_regs[i] == SP_REGNUM)
++	      || unsorted_regs[i] > 14)
+ 	    return 0;
+ 
+ 	  unsorted_offsets[i] = INTVAL (offset);
++	  if (i == 0 || unsorted_offsets[i] < unsorted_offsets[order[0]])
++	    order[0] = i;
+ 	}
+       else
+ 	/* Not a suitable memory address.  */
+@@ -9998,111 +10026,65 @@
+ 
+   /* All the useful information has now been extracted from the
+      operands into unsorted_regs and unsorted_offsets; additionally,
+-     order[0] has been set to the lowest numbered register in the
+-     list.  Sort the registers into order, and check that the memory
+-     offsets are ascending and adjacent.  */
+-
+-  for (i = 1; i < nops; i++)
+-    {
+-      int j;
+-
+-      order[i] = order[i - 1];
+-      for (j = 0; j < nops; j++)
+-	if (unsorted_regs[j] > unsorted_regs[order[i - 1]]
+-	    && (order[i] == order[i - 1]
+-		|| unsorted_regs[j] < unsorted_regs[order[i]]))
+-	  order[i] = j;
+-
+-      /* Have we found a suitable register? if not, one must be used more
+-	 than once.  */
+-      if (order[i] == order[i - 1])
+-	return 0;
+-
+-      /* Is the memory address adjacent and ascending? */
+-      if (unsorted_offsets[order[i]] != unsorted_offsets[order[i - 1]] + 4)
+-	return 0;
+-    }
++     order[0] has been set to the lowest offset in the list.  Sort
++     the offsets into order, verifying that they are adjacent, and
++     check that the register numbers are ascending.  */
++  if (!compute_offset_order (nops, unsorted_offsets, order,
++			     check_regs ? unsorted_regs : NULL))
++    return 0;
++
++  if (saved_order)
++    memcpy (saved_order, order, sizeof order);
+ 
+   if (base)
+     {
+       *base = base_reg;
+ 
+       for (i = 0; i < nops; i++)
+-	regs[i] = unsorted_regs[order[i]];
++	{
++	  regs[i] = unsorted_regs[check_regs ? order[i] : i];
++	  if (reg_rtxs)
++	    reg_rtxs[i] = unsorted_reg_rtxs[check_regs ? order[i] : i];
++	}
+ 
+       *load_offset = unsorted_offsets[order[0]];
+     }
+ 
++  if (TARGET_THUMB1
++      && !peep2_reg_dead_p (nops_total, base_reg_rtx))
++    return 0;
++
+   if (unsorted_offsets[order[0]] == 0)
+-    return 1; /* stmia */
+-
+-  if (unsorted_offsets[order[0]] == 4)
+-    return 2; /* stmib */
+-
+-  if (unsorted_offsets[order[nops - 1]] == 0)
+-    return 3; /* stmda */
+-
+-  if (unsorted_offsets[order[nops - 1]] == -4)
+-    return 4; /* stmdb */
+-
+-  return 0;
+-}
+-
+-const char *
+-emit_stm_seq (rtx *operands, int nops)
+-{
+-  int regs[4];
+-  int base_reg;
+-  HOST_WIDE_INT offset;
+-  char buf[100];
+-  int i;
+-
+-  switch (store_multiple_sequence (operands, nops, regs, &base_reg, &offset))
+-    {
+-    case 1:
+-      strcpy (buf, "stm%(ia%)\t");
+-      break;
+-
+-    case 2:
+-      strcpy (buf, "stm%(ib%)\t");
+-      break;
+-
+-    case 3:
+-      strcpy (buf, "stm%(da%)\t");
+-      break;
+-
+-    case 4:
+-      strcpy (buf, "stm%(db%)\t");
+-      break;
+-
+-    default:
+-      gcc_unreachable ();
+-    }
+-
+-  sprintf (buf + strlen (buf), "%s%s, {%s%s", REGISTER_PREFIX,
+-	   reg_names[base_reg], REGISTER_PREFIX, reg_names[regs[0]]);
+-
+-  for (i = 1; i < nops; i++)
+-    sprintf (buf + strlen (buf), ", %s%s", REGISTER_PREFIX,
+-	     reg_names[regs[i]]);
+-
+-  strcat (buf, "}\t%@ phole stm");
+-
+-  output_asm_insn (buf, operands);
+-  return "";
++    stm_case = 1; /* stmia */
++  else if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
++    stm_case = 2; /* stmib */
++  else if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
++    stm_case = 3; /* stmda */
++  else if (TARGET_32BIT && unsorted_offsets[order[nops - 1]] == -4)
++    stm_case = 4; /* stmdb */
++  else
++    return 0;
++
++  if (!multiple_operation_profitable_p (false, nops, 0))
++    return 0;
++
++  return stm_case;
+ }
+ 
+ /* Routines for use in generating RTL.  */
+ 
+-rtx
+-arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
+-		       int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++/* Generate a load-multiple instruction.  COUNT is the number of loads in
++   the instruction; REGS and MEMS are arrays containing the operands.
++   BASEREG is the base register to be used in addressing the memory operands.
++   WBACK_OFFSET is nonzero if the instruction should update the base
++   register.  */
++
++static rtx
++arm_gen_load_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
++			 HOST_WIDE_INT wback_offset)
+ {
+-  HOST_WIDE_INT offset = *offsetp;
+   int i = 0, j;
+   rtx result;
+-  int sign = up ? 1 : -1;
+-  rtx mem, addr;
+ 
+   /* XScale has load-store double instructions, but they have stricter
+      alignment requirements than load-store multiple, so we cannot
+@@ -10139,18 +10121,10 @@
+       start_sequence ();
+ 
+       for (i = 0; i < count; i++)
+-	{
+-	  addr = plus_constant (from, i * 4 * sign);
+-	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
+-	  emit_move_insn (gen_rtx_REG (SImode, base_regno + i), mem);
+-	  offset += 4 * sign;
+-	}
++	emit_move_insn (gen_rtx_REG (SImode, regs[i]), mems[i]);
+ 
+-      if (write_back)
+-	{
+-	  emit_move_insn (from, plus_constant (from, count * 4 * sign));
+-	  *offsetp = offset;
+-	}
++      if (wback_offset != 0)
++	emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ 
+       seq = get_insns ();
+       end_sequence ();
+@@ -10159,41 +10133,40 @@
+     }
+ 
+   result = gen_rtx_PARALLEL (VOIDmode,
+-			     rtvec_alloc (count + (write_back ? 1 : 0)));
+-  if (write_back)
++			     rtvec_alloc (count + (wback_offset != 0 ? 1 : 0)));
++  if (wback_offset != 0)
+     {
+       XVECEXP (result, 0, 0)
+-	= gen_rtx_SET (VOIDmode, from, plus_constant (from, count * 4 * sign));
++	= gen_rtx_SET (VOIDmode, basereg,
++		       plus_constant (basereg, wback_offset));
+       i = 1;
+       count++;
+     }
+ 
+   for (j = 0; i < count; i++, j++)
+-    {
+-      addr = plus_constant (from, j * 4 * sign);
+-      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
+-      XVECEXP (result, 0, i)
+-	= gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, base_regno + j), mem);
+-      offset += 4 * sign;
+-    }
+-
+-  if (write_back)
+-    *offsetp = offset;
++    XVECEXP (result, 0, i)
++      = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regs[j]), mems[j]);
+ 
+   return result;
+ }
+ 
+-rtx
+-arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
+-			int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++/* Generate a store-multiple instruction.  COUNT is the number of stores in
++   the instruction; REGS and MEMS are arrays containing the operands.
++   BASEREG is the base register to be used in addressing the memory operands.
++   WBACK_OFFSET is nonzero if the instruction should update the base
++   register.  */
++
++static rtx
++arm_gen_store_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
++			  HOST_WIDE_INT wback_offset)
+ {
+-  HOST_WIDE_INT offset = *offsetp;
+   int i = 0, j;
+   rtx result;
+-  int sign = up ? 1 : -1;
+-  rtx mem, addr;
+-
+-  /* See arm_gen_load_multiple for discussion of
++
++  if (GET_CODE (basereg) == PLUS)
++    basereg = XEXP (basereg, 0);
++
++  /* See arm_gen_load_multiple_1 for discussion of
+      the pros/cons of ldm/stm usage for XScale.  */
+   if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
+     {
+@@ -10202,18 +10175,10 @@
+       start_sequence ();
+ 
+       for (i = 0; i < count; i++)
+-	{
+-	  addr = plus_constant (to, i * 4 * sign);
+-	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
+-	  emit_move_insn (mem, gen_rtx_REG (SImode, base_regno + i));
+-	  offset += 4 * sign;
+-	}
++	emit_move_insn (mems[i], gen_rtx_REG (SImode, regs[i]));
+ 
+-      if (write_back)
+-	{
+-	  emit_move_insn (to, plus_constant (to, count * 4 * sign));
+-	  *offsetp = offset;
+-	}
++      if (wback_offset != 0)
++	emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ 
+       seq = get_insns ();
+       end_sequence ();
+@@ -10222,29 +10187,319 @@
+     }
+ 
+   result = gen_rtx_PARALLEL (VOIDmode,
+-			     rtvec_alloc (count + (write_back ? 1 : 0)));
+-  if (write_back)
++			     rtvec_alloc (count + (wback_offset != 0 ? 1 : 0)));
++  if (wback_offset != 0)
+     {
+       XVECEXP (result, 0, 0)
+-	= gen_rtx_SET (VOIDmode, to,
+-		       plus_constant (to, count * 4 * sign));
++	= gen_rtx_SET (VOIDmode, basereg,
++		       plus_constant (basereg, wback_offset));
+       i = 1;
+       count++;
+     }
+ 
+   for (j = 0; i < count; i++, j++)
++    XVECEXP (result, 0, i)
++      = gen_rtx_SET (VOIDmode, mems[j], gen_rtx_REG (SImode, regs[j]));
++
++  return result;
++}
++
++/* Generate either a load-multiple or a store-multiple instruction.  This
++   function can be used in situations where we can start with a single MEM
++   rtx and adjust its address upwards.
++   COUNT is the number of operations in the instruction, not counting a
++   possible update of the base register.  REGS is an array containing the
++   register operands.
++   BASEREG is the base register to be used in addressing the memory operands,
++   which are constructed from BASEMEM.
++   WRITE_BACK specifies whether the generated instruction should include an
++   update of the base register.
++   OFFSETP is used to pass an offset to and from this function; this offset
++   is not used when constructing the address (instead BASEMEM should have an
++   appropriate offset in its address), it is used only for setting
++   MEM_OFFSET.  It is updated only if WRITE_BACK is true.*/
++
++static rtx
++arm_gen_multiple_op (bool is_load, int *regs, int count, rtx basereg,
++		     bool write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  rtx mems[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT offset = *offsetp;
++  int i;
++
++  gcc_assert (count <= MAX_LDM_STM_OPS);
++
++  if (GET_CODE (basereg) == PLUS)
++    basereg = XEXP (basereg, 0);
++
++  for (i = 0; i < count; i++)
+     {
+-      addr = plus_constant (to, j * 4 * sign);
+-      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
+-      XVECEXP (result, 0, i)
+-	= gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, base_regno + j));
+-      offset += 4 * sign;
++      rtx addr = plus_constant (basereg, i * 4);
++      mems[i] = adjust_automodify_address_nv (basemem, SImode, addr, offset);
++      offset += 4;
+     }
+ 
+   if (write_back)
+     *offsetp = offset;
+ 
+-  return result;
++  if (is_load)
++    return arm_gen_load_multiple_1 (count, regs, mems, basereg,
++				    write_back ? 4 * count : 0);
++  else
++    return arm_gen_store_multiple_1 (count, regs, mems, basereg,
++				     write_back ? 4 * count : 0);
++}
++
++rtx
++arm_gen_load_multiple (int *regs, int count, rtx basereg, int write_back,
++		       rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  return arm_gen_multiple_op (TRUE, regs, count, basereg, write_back, basemem,
++			      offsetp);
++}
++
++rtx
++arm_gen_store_multiple (int *regs, int count, rtx basereg, int write_back,
++			rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  return arm_gen_multiple_op (FALSE, regs, count, basereg, write_back, basemem,
++			      offsetp);
++}
++
++/* Called from a peephole2 expander to turn a sequence of loads into an
++   LDM instruction.  OPERANDS are the operands found by the peephole matcher;
++   NOPS indicates how many separate loads we are trying to combine.  SORT_REGS
++   is true if we can reorder the registers because they are used commutatively
++   subsequently.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_ldm_seq (rtx *operands, int nops, bool sort_regs)
++{
++  int regs[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int i, j, base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int ldm_case;
++  rtx addr;
++
++  ldm_case = load_multiple_sequence (operands, nops, regs, mem_order,
++				     &base_reg, &offset, !sort_regs);
++
++  if (ldm_case == 0)
++    return false;
++
++  if (sort_regs)
++    for (i = 0; i < nops - 1; i++)
++      for (j = i + 1; j < nops; j++)
++	if (regs[i] > regs[j])
++	  {
++	    int t = regs[i];
++	    regs[i] = regs[j];
++	    regs[j] = t;
++	  }
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (peep2_reg_dead_p (nops, base_reg_rtx));
++      gcc_assert (ldm_case == 1 || ldm_case == 5);
++      write_back = TRUE;
++    }
++
++  if (ldm_case == 5)
++    {
++      rtx newbase = TARGET_THUMB1 ? base_reg_rtx : gen_rtx_REG (SImode, regs[0]);
++      emit_insn (gen_addsi3 (newbase, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++      if (!TARGET_THUMB1)
++	{
++	  base_reg = regs[0];
++	  base_reg_rtx = newbase;
++	}
++    }
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_load_multiple_1 (nops, regs, mems, base_reg_rtx,
++				      write_back ? offset + i * 4 : 0));
++  return true;
++}
++
++/* Called from a peephole2 expander to turn a sequence of stores into an
++   STM instruction.  OPERANDS are the operands found by the peephole matcher;
++   NOPS indicates how many separate stores we are trying to combine.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_stm_seq (rtx *operands, int nops)
++{
++  int i;
++  int regs[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int stm_case;
++  rtx addr;
++  bool base_reg_dies;
++
++  stm_case = store_multiple_sequence (operands, nops, nops, regs, NULL,
++				      mem_order, &base_reg, &offset, true);
++
++  if (stm_case == 0)
++    return false;
++
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  base_reg_dies = peep2_reg_dead_p (nops, base_reg_rtx);
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (base_reg_dies);
++      write_back = TRUE;
++    }
++
++  if (stm_case == 5)
++    {
++      gcc_assert (base_reg_dies);
++      emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++    }
++
++  addr = plus_constant (base_reg_rtx, offset);
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_store_multiple_1 (nops, regs, mems, base_reg_rtx,
++				       write_back ? offset + i * 4 : 0));
++  return true;
++}
++
++/* Called from a peephole2 expander to turn a sequence of stores that are
++   preceded by constant loads into an STM instruction.  OPERANDS are the
++   operands found by the peephole matcher; NOPS indicates how many
++   separate stores we are trying to combine; there are 2 * NOPS
++   instructions in the peephole.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_const_stm_seq (rtx *operands, int nops)
++{
++  int regs[MAX_LDM_STM_OPS], sorted_regs[MAX_LDM_STM_OPS];
++  int reg_order[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx reg_rtxs[MAX_LDM_STM_OPS], orig_reg_rtxs[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int stm_case;
++  rtx addr;
++  bool base_reg_dies;
++  int i, j;
++  HARD_REG_SET allocated;
++
++  stm_case = store_multiple_sequence (operands, nops, 2 * nops, regs, reg_rtxs,
++				      mem_order, &base_reg, &offset, false);
++
++  if (stm_case == 0)
++    return false;
++
++  memcpy (orig_reg_rtxs, reg_rtxs, sizeof orig_reg_rtxs);
++
++  /* If the same register is used more than once, try to find a free
++     register.  */
++  CLEAR_HARD_REG_SET (allocated);
++  for (i = 0; i < nops; i++)
++    {
++      for (j = i + 1; j < nops; j++)
++	if (regs[i] == regs[j])
++	  {
++	    rtx t = peep2_find_free_register (0, nops * 2,
++					      TARGET_THUMB1 ? "l" : "r",
++					      SImode, &allocated);
++	    if (t == NULL_RTX)
++	      return false;
++	    reg_rtxs[i] = t;
++	    regs[i] = REGNO (t);
++	  }
++    }
++
++  /* Compute an ordering that maps the register numbers to an ascending
++     sequence.  */
++  reg_order[0] = 0;
++  for (i = 0; i < nops; i++)
++    if (regs[i] < regs[reg_order[0]])
++      reg_order[0] = i;
++
++  for (i = 1; i < nops; i++)
++    {
++      int this_order = reg_order[i - 1];
++      for (j = 0; j < nops; j++)
++	if (regs[j] > regs[reg_order[i - 1]]
++	    && (this_order == reg_order[i - 1]
++		|| regs[j] < regs[this_order]))
++	  this_order = j;
++      reg_order[i] = this_order;
++    }
++
++  /* Ensure that registers that must be live after the instruction end
++     up with the correct value.  */
++  for (i = 0; i < nops; i++)
++    {
++      int this_order = reg_order[i];
++      if ((this_order != mem_order[i]
++	   || orig_reg_rtxs[this_order] != reg_rtxs[this_order])
++	  && !peep2_reg_dead_p (nops * 2, orig_reg_rtxs[this_order]))
++	return false;
++    }
++
++  /* Load the constants.  */
++  for (i = 0; i < nops; i++)
++    {
++      rtx op = operands[2 * nops + mem_order[i]];
++      sorted_regs[i] = regs[reg_order[i]];
++      emit_move_insn (reg_rtxs[reg_order[i]], op);
++    }
++
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  base_reg_dies = peep2_reg_dead_p (nops * 2, base_reg_rtx);
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (base_reg_dies);
++      write_back = TRUE;
++    }
++
++  if (stm_case == 5)
++    {
++      gcc_assert (base_reg_dies);
++      emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++    }
++
++  addr = plus_constant (base_reg_rtx, offset);
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_store_multiple_1 (nops, sorted_regs, mems, base_reg_rtx,
++				       write_back ? offset + i * 4 : 0));
++  return true;
+ }
+ 
+ int
+@@ -10280,20 +10535,21 @@
+   for (i = 0; in_words_to_go >= 2; i+=4)
+     {
+       if (in_words_to_go > 4)
+-	emit_insn (arm_gen_load_multiple (0, 4, src, TRUE, TRUE,
+-					  srcbase, &srcoffset));
++	emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, 4, src,
++					  TRUE, srcbase, &srcoffset));
+       else
+-	emit_insn (arm_gen_load_multiple (0, in_words_to_go, src, TRUE,
+-					  FALSE, srcbase, &srcoffset));
++	emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, in_words_to_go,
++					  src, FALSE, srcbase,
++					  &srcoffset));
+ 
+       if (out_words_to_go)
+ 	{
+ 	  if (out_words_to_go > 4)
+-	    emit_insn (arm_gen_store_multiple (0, 4, dst, TRUE, TRUE,
+-					       dstbase, &dstoffset));
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence, 4, dst,
++					       TRUE, dstbase, &dstoffset));
+ 	  else if (out_words_to_go != 1)
+-	    emit_insn (arm_gen_store_multiple (0, out_words_to_go,
+-					       dst, TRUE,
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence,
++					       out_words_to_go, dst,
+ 					       (last_bytes == 0
+ 						? FALSE : TRUE),
+ 					       dstbase, &dstoffset));
+
+=== modified file 'gcc/config/arm/arm.h'
+--- old/gcc/config/arm/arm.h	2011-01-05 12:12:18 +0000
++++ new/gcc/config/arm/arm.h	2011-01-05 18:20:37 +0000
+@@ -1143,6 +1143,9 @@
+   ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
+    || (MODE) == CImode || (MODE) == XImode)
+ 
++/* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
++extern int arm_regs_in_sequence[];
++
+ /* The order in which register should be allocated.  It is good to use ip
+    since no saving is required (though calls clobber it) and it never contains
+    function parameters.  It is quite good to use lr since other calls may
+@@ -2823,4 +2826,8 @@
+ #define NEED_INDICATE_EXEC_STACK	0
+ #endif
+ 
++/* The maximum number of parallel loads or stores we support in an ldm/stm
++   instruction.  */
++#define MAX_LDM_STM_OPS 4
++
+ #endif /* ! GCC_ARM_H */
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2011-01-05 12:12:18 +0000
++++ new/gcc/config/arm/arm.md	2011-01-05 18:20:37 +0000
+@@ -6282,7 +6282,7 @@
+ 
+ ;; load- and store-multiple insns
+ ;; The arm can load/store any set of registers, provided that they are in
+-;; ascending order; but that is beyond GCC so stick with what it knows.
++;; ascending order, but these expanders assume a contiguous set.
+ 
+ (define_expand "load_multiple"
+   [(match_par_dup 3 [(set (match_operand:SI 0 "" "")
+@@ -6303,126 +6303,12 @@
+     FAIL;
+ 
+   operands[3]
+-    = arm_gen_load_multiple (REGNO (operands[0]), INTVAL (operands[2]),
++    = arm_gen_load_multiple (arm_regs_in_sequence + REGNO (operands[0]),
++			     INTVAL (operands[2]),
+ 			     force_reg (SImode, XEXP (operands[1], 0)),
+-			     TRUE, FALSE, operands[1], &offset);
++			     FALSE, operands[1], &offset);
+ })
+ 
+-;; Load multiple with write-back
+-
+-(define_insn "*ldmsi_postinc4"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))
+-     (set (match_operand:SI 6 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 12))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(ia%)\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "load4")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi_postinc4_thumb1"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=l")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))
+-     (set (match_operand:SI 6 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 12))))])]
+-  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "ldmia\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "load4")]
+-)
+-
+-(define_insn "*ldmsi_postinc3"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 12)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\\t%1!, {%3, %4, %5}"
+-  [(set_attr "type" "load3")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi_postinc2"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 8)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\\t%1!, {%3, %4}"
+-  [(set_attr "type" "load2")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-;; Ordinary load multiple
+-
+-(define_insn "*ldmsi4"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 8))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 12))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\\t%1, {%2, %3, %4, %5}"
+-  [(set_attr "type" "load4")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi3"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 8))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\\t%1, {%2, %3, %4}"
+-  [(set_attr "type" "load3")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi2"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(ia%)\\t%1, {%2, %3}"
+-  [(set_attr "type" "load2")
+-   (set_attr "predicable" "yes")]
+-)
+-
+ (define_expand "store_multiple"
+   [(match_par_dup 3 [(set (match_operand:SI 0 "" "")
+                           (match_operand:SI 1 "" ""))
+@@ -6442,125 +6328,12 @@
+     FAIL;
+ 
+   operands[3]
+-    = arm_gen_store_multiple (REGNO (operands[1]), INTVAL (operands[2]),
++    = arm_gen_store_multiple (arm_regs_in_sequence + REGNO (operands[1]),
++			      INTVAL (operands[2]),
+ 			      force_reg (SImode, XEXP (operands[0], 0)),
+-			      TRUE, FALSE, operands[0], &offset);
++			      FALSE, operands[0], &offset);
+ })
+ 
+-;; Store multiple with write-back
+-
+-(define_insn "*stmsi_postinc4"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
+-	  (match_operand:SI 6 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "stm%(ia%)\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi_postinc4_thumb1"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=l")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
+-	  (match_operand:SI 6 "arm_hard_register_operand" ""))])]
+-  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "stmia\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi_postinc3"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 12)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\\t%1!, {%3, %4, %5}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store3")]
+-)
+-
+-(define_insn "*stmsi_postinc2"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 8)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\\t%1!, {%3, %4}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store2")]
+-)
+-
+-;; Ordinary store multiple
+-
+-(define_insn "*stmsi4"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\\t%1, {%2, %3, %4, %5}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi3"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\\t%1, {%2, %3, %4}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store3")]
+-)
+-
+-(define_insn "*stmsi2"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "stm%(ia%)\\t%1, {%2, %3}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store2")]
+-)
+ 
+ ;; Move a block of memory if it is word aligned and MORE than 2 words long.
+ ;; We could let this apply for blocks of less than this, but it clobbers so
+@@ -9031,8 +8804,8 @@
+ 	if (REGNO (reg) == R0_REGNUM)
+ 	  {
+ 	    /* On thumb we have to use a write-back instruction.  */
+-	    emit_insn (arm_gen_store_multiple (R0_REGNUM, 4, addr, TRUE,
+-			TARGET_THUMB ? TRUE : FALSE, mem, &offset));
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence, 4, addr,
++ 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
+ 	    size = TARGET_ARM ? 16 : 0;
+ 	  }
+ 	else
+@@ -9078,8 +8851,8 @@
+ 	if (REGNO (reg) == R0_REGNUM)
+ 	  {
+ 	    /* On thumb we have to use a write-back instruction.  */
+-	    emit_insn (arm_gen_load_multiple (R0_REGNUM, 4, addr, TRUE,
+-			TARGET_THUMB ? TRUE : FALSE, mem, &offset));
++	    emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, 4, addr,
++ 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
+ 	    size = TARGET_ARM ? 16 : 0;
+ 	  }
+ 	else
+@@ -10672,87 +10445,6 @@
+   ""
+ )
+ 
+-; Peepholes to spot possible load- and store-multiples, if the ordering is
+-; reversed, check that the memory references aren't volatile.
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 4 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 5 "memory_operand" "m"))
+-   (set (match_operand:SI 2 "s_register_operand" "=rk")
+-        (match_operand:SI 6 "memory_operand" "m"))
+-   (set (match_operand:SI 3 "s_register_operand" "=rk")
+-        (match_operand:SI 7 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 4, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 4);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 3 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 4 "memory_operand" "m"))
+-   (set (match_operand:SI 2 "s_register_operand" "=rk")
+-        (match_operand:SI 5 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 3, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 3);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 2 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 3 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 2, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 2);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 4 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 5 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))
+-   (set (match_operand:SI 6 "memory_operand" "=m")
+-        (match_operand:SI 2 "s_register_operand" "rk"))
+-   (set (match_operand:SI 7 "memory_operand" "=m")
+-        (match_operand:SI 3 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 4, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 4);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 3 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 4 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))
+-   (set (match_operand:SI 5 "memory_operand" "=m")
+-        (match_operand:SI 2 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 3, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 3);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 2 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 3 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 2, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 2);
+-  "
+-)
+-
+ (define_split
+   [(set (match_operand:SI 0 "s_register_operand" "")
+ 	(and:SI (ge:SI (match_operand:SI 1 "s_register_operand" "")
+@@ -11559,6 +11251,8 @@
+   "
+ )
+ 
++;; Load the load/store multiple patterns
++(include "ldmstm.md")
+ ;; Load the FPA co-processor patterns
+ (include "fpa.md")
+ ;; Load the Maverick co-processor patterns
+
+=== added file 'gcc/config/arm/ldmstm.md'
+--- old/gcc/config/arm/ldmstm.md	1970-01-01 00:00:00 +0000
++++ new/gcc/config/arm/ldmstm.md	2010-11-16 13:08:47 +0000
+@@ -0,0 +1,1191 @@
++/* ARM ldm/stm instruction patterns.  This file was automatically generated
++   using arm-ldmstm.ml.  Please do not edit manually.
++
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by CodeSourcery.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   You should have received a copy of the GNU General Public License and
++   a copy of the GCC Runtime Library Exception along with this program;
++   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++(define_insn "*ldm4_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm4_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")])
++
++(define_insn "*ldm4_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm4_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")])
++
++(define_insn "*stm4_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "stm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm4_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
++  "stm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")])
++
++(define_insn "*ldm4_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 16))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ib%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 16))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ib%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(ib%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 16)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "stm%(ib%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -12))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(da%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "ldm%(da%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -12)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(da%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "stm%(da%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -16))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(db%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -16))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "ldm%(db%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -16)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(db%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -16)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "stm%(db%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "memory_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 6 "memory_operand" ""))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 7 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 4, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (parallel
++    [(set (match_operand:SI 1 "s_register_operand" "")
++          (match_operand:SI 5 "memory_operand" ""))
++     (set (match_operand:SI 2 "s_register_operand" "")
++          (match_operand:SI 6 "memory_operand" ""))
++     (set (match_operand:SI 3 "s_register_operand" "")
++          (match_operand:SI 7 "memory_operand" ""))])]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 4, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 9 "const_int_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 10 "const_int_operand" ""))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_dup 2))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 11 "const_int_operand" ""))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_dup 3))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 9 "const_int_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 10 "const_int_operand" ""))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 11 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_dup 2))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_dup 3))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 4 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_operand:SI 2 "s_register_operand" ""))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_operand:SI 3 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_insn "*ldm3_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm3_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")])
++
++(define_insn "*ldm3_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm3_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")])
++
++(define_insn "*stm3_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm3_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")])
++
++(define_insn "*ldm3_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ib%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ib%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(ib%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(ib%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -8))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(da%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(da%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -8)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(da%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(da%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -12))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(db%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(db%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -12)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(db%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(db%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 5 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 3, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (parallel
++    [(set (match_operand:SI 1 "s_register_operand" "")
++          (match_operand:SI 4 "memory_operand" ""))
++     (set (match_operand:SI 2 "s_register_operand" "")
++          (match_operand:SI 5 "memory_operand" ""))])]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 3, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 6 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 7 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 2))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 6 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 7 "const_int_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 2))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 3 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_operand:SI 2 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_insn "*ldm2_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm2_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")])
++
++(define_insn "*ldm2_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm2_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")])
++
++(define_insn "*stm2_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "stm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm2_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")])
++
++(define_insn "*ldm2_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ib%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ib%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "stm%(ib%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(ib%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "ldm%(da%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(da%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "stm%(da%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(da%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -8))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "ldm%(db%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(db%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -8)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "stm%(db%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(db%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 2, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "const_int_operand" ""))
++   (set (match_operand:SI 2 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 1))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "const_int_operand" ""))
++   (set (match_operand:SI 2 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 1))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 2 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (parallel
++     [(set (match_operand:SI 4 "s_register_operand" "")
++           (match_operator:SI 5 "commutative_binary_operator"
++            [(match_operand:SI 6 "s_register_operand" "")
++             (match_operand:SI 7 "s_register_operand" "")]))
++      (clobber (reg:CC CC_REGNUM))])]
++  "(((operands[6] == operands[0] && operands[7] == operands[1])
++     || (operands[7] == operands[0] && operands[6] == operands[1]))
++    && peep2_reg_dead_p (3, operands[0]) && peep2_reg_dead_p (3, operands[1]))"
++  [(parallel
++    [(set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)]))
++     (clobber (reg:CC CC_REGNUM))])]
++{
++  if (!gen_ldm_seq (operands, 2, true))
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (set (match_operand:SI 4 "s_register_operand" "")
++        (match_operator:SI 5 "commutative_binary_operator"
++         [(match_operand:SI 6 "s_register_operand" "")
++          (match_operand:SI 7 "s_register_operand" "")]))]
++  "(((operands[6] == operands[0] && operands[7] == operands[1])
++     || (operands[7] == operands[0] && operands[6] == operands[1]))
++    && peep2_reg_dead_p (3, operands[0]) && peep2_reg_dead_p (3, operands[1]))"
++  [(set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)]))]
++{
++  if (!gen_ldm_seq (operands, 2, true))
++    FAIL;
++})
++
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2010-11-04 10:45:05 +0000
++++ new/gcc/config/arm/predicates.md	2010-11-16 12:32:34 +0000
+@@ -211,6 +211,11 @@
+   (and (match_code "ior,xor,and")
+        (match_test "mode == GET_MODE (op)")))
+ 
++;; True for commutative operators
++(define_special_predicate "commutative_binary_operator"
++  (and (match_code "ior,xor,and,plus")
++       (match_test "mode == GET_MODE (op)")))
++
+ ;; True for shift operators.
+ (define_special_predicate "shift_operator"
+   (and (ior (ior (and (match_code "mult")
+@@ -334,16 +339,20 @@
+   (match_code "parallel")
+ {
+   HOST_WIDE_INT count = XVECLEN (op, 0);
+-  int dest_regno;
++  unsigned dest_regno;
+   rtx src_addr;
+   HOST_WIDE_INT i = 1, base = 0;
++  HOST_WIDE_INT offset = 0;
+   rtx elt;
++  bool addr_reg_loaded = false;
++  bool update = false;
+ 
+   if (low_irq_latency)
+     return false;
+ 
+   if (count <= 1
+-      || GET_CODE (XVECEXP (op, 0, 0)) != SET)
++      || GET_CODE (XVECEXP (op, 0, 0)) != SET
++      || !REG_P (SET_DEST (XVECEXP (op, 0, 0))))
+     return false;
+ 
+   /* Check to see if this might be a write-back.  */
+@@ -351,6 +360,7 @@
+     {
+       i++;
+       base = 1;
++      update = true;
+ 
+       /* Now check it more carefully.  */
+       if (GET_CODE (SET_DEST (elt)) != REG
+@@ -369,6 +379,15 @@
+ 
+   dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, i - 1)));
+   src_addr = XEXP (SET_SRC (XVECEXP (op, 0, i - 1)), 0);
++  if (GET_CODE (src_addr) == PLUS)
++    {
++      if (GET_CODE (XEXP (src_addr, 1)) != CONST_INT)
++	return false;
++      offset = INTVAL (XEXP (src_addr, 1));
++      src_addr = XEXP (src_addr, 0);
++    }
++  if (!REG_P (src_addr))
++    return false;
+ 
+   for (; i < count; i++)
+     {
+@@ -377,16 +396,28 @@
+       if (GET_CODE (elt) != SET
+           || GET_CODE (SET_DEST (elt)) != REG
+           || GET_MODE (SET_DEST (elt)) != SImode
+-          || REGNO (SET_DEST (elt)) != (unsigned int)(dest_regno + i - base)
++          || REGNO (SET_DEST (elt)) <= dest_regno
+           || GET_CODE (SET_SRC (elt)) != MEM
+           || GET_MODE (SET_SRC (elt)) != SImode
+-          || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
+-          || !rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
+-          || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
+-          || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != (i - base) * 4)
++          || ((GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
++	       || !rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
++	       || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
++	       || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != offset + (i - base) * 4)
++	      && (!REG_P (XEXP (SET_SRC (elt), 0))
++		  || offset + (i - base) * 4 != 0)))
+         return false;
++      dest_regno = REGNO (SET_DEST (elt));
++      if (dest_regno == REGNO (src_addr))
++        addr_reg_loaded = true;
+     }
+-
++  /* For Thumb, we only have updating instructions.  If the pattern does
++     not describe an update, it must be because the address register is
++     in the list of loaded registers - on the hardware, this has the effect
++     of overriding the update.  */
++  if (update && addr_reg_loaded)
++    return false;
++  if (TARGET_THUMB1)
++    return update || addr_reg_loaded;
+   return true;
+ })
+ 
+@@ -394,9 +425,9 @@
+   (match_code "parallel")
+ {
+   HOST_WIDE_INT count = XVECLEN (op, 0);
+-  int src_regno;
++  unsigned src_regno;
+   rtx dest_addr;
+-  HOST_WIDE_INT i = 1, base = 0;
++  HOST_WIDE_INT i = 1, base = 0, offset = 0;
+   rtx elt;
+ 
+   if (low_irq_latency)
+@@ -430,6 +461,16 @@
+   src_regno = REGNO (SET_SRC (XVECEXP (op, 0, i - 1)));
+   dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, i - 1)), 0);
+ 
++  if (GET_CODE (dest_addr) == PLUS)
++    {
++      if (GET_CODE (XEXP (dest_addr, 1)) != CONST_INT)
++	return false;
++      offset = INTVAL (XEXP (dest_addr, 1));
++      dest_addr = XEXP (dest_addr, 0);
++    }
++  if (!REG_P (dest_addr))
++    return false;
++
+   for (; i < count; i++)
+     {
+       elt = XVECEXP (op, 0, i);
+@@ -437,14 +478,17 @@
+       if (GET_CODE (elt) != SET
+           || GET_CODE (SET_SRC (elt)) != REG
+           || GET_MODE (SET_SRC (elt)) != SImode
+-          || REGNO (SET_SRC (elt)) != (unsigned int)(src_regno + i - base)
++          || REGNO (SET_SRC (elt)) <= src_regno
+           || GET_CODE (SET_DEST (elt)) != MEM
+           || GET_MODE (SET_DEST (elt)) != SImode
+-          || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
+-          || !rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
+-          || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
+-          || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != (i - base) * 4)
++          || ((GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
++	       || !rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
++	       || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
++               || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != offset + (i - base) * 4)
++	      && (!REG_P (XEXP (SET_DEST (elt), 0))
++		  || offset + (i - base) * 4 != 0)))
+         return false;
++      src_regno = REGNO (SET_SRC (elt));
+     }
+ 
+   return true;
+
+=== modified file 'gcc/config/i386/i386.md'
+--- old/gcc/config/i386/i386.md	2011-01-05 12:12:18 +0000
++++ new/gcc/config/i386/i386.md	2011-01-05 18:20:37 +0000
+@@ -20023,15 +20023,14 @@
+ ;;  leal    (%edx,%eax,4), %eax
+ 
+ (define_peephole2
+-  [(parallel [(set (match_operand 0 "register_operand" "")
++  [(match_scratch:SI 5 "r")
++   (parallel [(set (match_operand 0 "register_operand" "")
+ 		   (ashift (match_operand 1 "register_operand" "")
+ 			   (match_operand 2 "const_int_operand" "")))
+ 	       (clobber (reg:CC FLAGS_REG))])
+-   (set (match_operand 3 "register_operand")
+-        (match_operand 4 "x86_64_general_operand" ""))
+-   (parallel [(set (match_operand 5 "register_operand" "")
+-		   (plus (match_operand 6 "register_operand" "")
+-			 (match_operand 7 "register_operand" "")))
++   (parallel [(set (match_operand 3 "register_operand" "")
++		   (plus (match_dup 0)
++			 (match_operand 4 "x86_64_general_operand" "")))
+ 		   (clobber (reg:CC FLAGS_REG))])]
+   "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3
+    /* Validate MODE for lea.  */
+@@ -20041,30 +20040,21 @@
+        || GET_MODE (operands[0]) == SImode
+        || (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
+    /* We reorder load and the shift.  */
+-   && !rtx_equal_p (operands[1], operands[3])
+-   && !reg_overlap_mentioned_p (operands[0], operands[4])
+-   /* Last PLUS must consist of operand 0 and 3.  */
+-   && !rtx_equal_p (operands[0], operands[3])
+-   && (rtx_equal_p (operands[3], operands[6])
+-       || rtx_equal_p (operands[3], operands[7]))
+-   && (rtx_equal_p (operands[0], operands[6])
+-       || rtx_equal_p (operands[0], operands[7]))
+-   /* The intermediate operand 0 must die or be same as output.  */
+-   && (rtx_equal_p (operands[0], operands[5])
+-       || peep2_reg_dead_p (3, operands[0]))"
+-  [(set (match_dup 3) (match_dup 4))
++   && !reg_overlap_mentioned_p (operands[0], operands[4])"
++  [(set (match_dup 5) (match_dup 4))
+    (set (match_dup 0) (match_dup 1))]
+ {
+-  enum machine_mode mode = GET_MODE (operands[5]) == DImode ? DImode : SImode;
++  enum machine_mode mode = GET_MODE (operands[1]) == DImode ? DImode : SImode;
+   int scale = 1 << INTVAL (operands[2]);
+   rtx index = gen_lowpart (Pmode, operands[1]);
+-  rtx base = gen_lowpart (Pmode, operands[3]);
+-  rtx dest = gen_lowpart (mode, operands[5]);
++  rtx base = gen_lowpart (Pmode, operands[5]);
++  rtx dest = gen_lowpart (mode, operands[3]);
+ 
+   operands[1] = gen_rtx_PLUS (Pmode, base,
+   			      gen_rtx_MULT (Pmode, index, GEN_INT (scale)));
+   if (mode != Pmode)
+     operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
++  operands[5] = base;
+   operands[0] = dest;
+ })
+ 
+
+=== modified file 'gcc/df-problems.c'
+--- old/gcc/df-problems.c	2010-11-16 22:17:17 +0000
++++ new/gcc/df-problems.c	2010-12-02 13:42:47 +0000
+@@ -3748,9 +3748,22 @@
+   for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
+     {
+       df_ref def = *def_rec;
+-      /* If the def is to only part of the reg, it does
+-	 not kill the other defs that reach here.  */
+-      if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
++      bitmap_set_bit (defs, DF_REF_REGNO (def));
++    }
++}
++
++/* Find the set of real DEFs, which are not clobbers, for INSN.  */
++
++void
++df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
++{
++  df_ref *def_rec;
++  unsigned int uid = INSN_UID (insn);
++
++  for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
++    {
++      df_ref def = *def_rec;
++      if (!(DF_REF_FLAGS (def) & (DF_REF_MUST_CLOBBER | DF_REF_MAY_CLOBBER)))
+ 	bitmap_set_bit (defs, DF_REF_REGNO (def));
+     }
+ }
+@@ -3921,7 +3934,7 @@
+     {
+       df_ref def = *def_rec;
+       if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
+-	bitmap_clear_bit (live, DF_REF_REGNO (def));
++	bitmap_set_bit (live, DF_REF_REGNO (def));
+     }
+ }
+ 
+@@ -3942,7 +3955,7 @@
+      while here the scan is performed forwards!  So, first assume that the
+      def is live, and if this is not true REG_UNUSED notes will rectify the
+      situation.  */
+-  df_simulate_find_defs (insn, live);
++  df_simulate_find_noclobber_defs (insn, live);
+ 
+   /* Clear all of the registers that go dead.  */
+   for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
+
+=== modified file 'gcc/df.h'
+--- old/gcc/df.h	2010-01-29 12:14:47 +0000
++++ new/gcc/df.h	2010-12-02 13:42:47 +0000
+@@ -978,6 +978,7 @@
+ extern void df_md_add_problem (void);
+ extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);
+ extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);
++extern void df_simulate_find_noclobber_defs (rtx, bitmap);
+ extern void df_simulate_find_defs (rtx, bitmap);
+ extern void df_simulate_defs (rtx, bitmap);
+ extern void df_simulate_uses (rtx, bitmap);
+
+=== modified file 'gcc/fwprop.c'
+--- old/gcc/fwprop.c	2010-04-02 18:54:46 +0000
++++ new/gcc/fwprop.c	2010-11-16 12:32:34 +0000
+@@ -228,7 +228,10 @@
+ 
+   process_uses (df_get_artificial_uses (bb_index), DF_REF_AT_TOP);
+   process_defs (df_get_artificial_defs (bb_index), DF_REF_AT_TOP);
+-  df_simulate_initialize_forwards (bb, local_lr);
++
++  /* We don't call df_simulate_initialize_forwards, as it may overestimate
++     the live registers if there are unused artificial defs.  We prefer
++     liveness to be underestimated.  */
+ 
+   FOR_BB_INSNS (bb, insn)
+     if (INSN_P (insn))
+
+=== modified file 'gcc/genoutput.c'
+--- old/gcc/genoutput.c	2009-04-08 14:00:34 +0000
++++ new/gcc/genoutput.c	2010-11-16 12:32:34 +0000
+@@ -266,6 +266,8 @@
+ 
+       printf ("    %d,\n", d->strict_low);
+ 
++      printf ("    %d,\n", d->constraint == NULL ? 1 : 0);
++
+       printf ("    %d\n", d->eliminable);
+ 
+       printf("  },\n");
+
+=== modified file 'gcc/genrecog.c'
+--- old/gcc/genrecog.c	2009-06-22 09:29:13 +0000
++++ new/gcc/genrecog.c	2010-11-16 12:32:34 +0000
+@@ -1782,20 +1782,11 @@
+   int odepth = strlen (oldpos);
+   int ndepth = strlen (newpos);
+   int depth;
+-  int old_has_insn, new_has_insn;
+ 
+   /* Pop up as many levels as necessary.  */
+   for (depth = odepth; strncmp (oldpos, newpos, depth) != 0; --depth)
+     continue;
+ 
+-  /* Hunt for the last [A-Z] in both strings.  */
+-  for (old_has_insn = odepth - 1; old_has_insn >= 0; --old_has_insn)
+-    if (ISUPPER (oldpos[old_has_insn]))
+-      break;
+-  for (new_has_insn = ndepth - 1; new_has_insn >= 0; --new_has_insn)
+-    if (ISUPPER (newpos[new_has_insn]))
+-      break;
+-
+   /* Go down to desired level.  */
+   while (depth < ndepth)
+     {
+
+=== modified file 'gcc/ifcvt.c'
+--- old/gcc/ifcvt.c	2011-01-05 12:12:18 +0000
++++ new/gcc/ifcvt.c	2011-01-05 18:20:37 +0000
+@@ -4011,6 +4011,7 @@
+   basic_block new_dest = dest_edge->dest;
+   rtx head, end, jump, earliest = NULL_RTX, old_dest;
+   bitmap merge_set = NULL;
++  bitmap merge_set_noclobber  = NULL;
+   /* Number of pending changes.  */
+   int n_validated_changes = 0;
+   rtx new_dest_label;
+@@ -4169,6 +4170,7 @@
+ 		       end of the block.  */
+ 
+       merge_set = BITMAP_ALLOC (&reg_obstack);
++      merge_set_noclobber = BITMAP_ALLOC (&reg_obstack);
+ 
+       /* If we allocated new pseudos (e.g. in the conditional move
+ 	 expander called from noce_emit_cmove), we must resize the
+@@ -4187,6 +4189,7 @@
+ 		  df_ref def = *def_rec;
+ 		  bitmap_set_bit (merge_set, DF_REF_REGNO (def));
+ 		}
++              df_simulate_find_noclobber_defs (insn, merge_set_noclobber);
+ 	    }
+ 	}
+ 
+@@ -4197,7 +4200,7 @@
+ 	  unsigned i;
+ 	  bitmap_iterator bi;
+ 
+-          EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
++          EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)
+ 	    {
+ 	      if (i < FIRST_PSEUDO_REGISTER
+ 		  && ! fixed_regs[i]
+@@ -4233,7 +4236,7 @@
+ 	   TEST_SET & DF_LIVE_IN (merge_bb)
+ 	 are empty.  */
+ 
+-      if (bitmap_intersect_p (merge_set, test_set)
++      if (bitmap_intersect_p (merge_set_noclobber, test_set)
+ 	  || bitmap_intersect_p (merge_set, test_live)
+ 	  || bitmap_intersect_p (test_set, df_get_live_in (merge_bb)))
+ 	intersect = true;
+@@ -4320,6 +4323,7 @@
+ 	    remove_reg_equal_equiv_notes_for_regno (i);
+ 
+ 	  BITMAP_FREE (merge_set);
++          BITMAP_FREE (merge_set_noclobber);
+ 	}
+ 
+       reorder_insns (head, end, PREV_INSN (earliest));
+@@ -4340,7 +4344,10 @@
+   cancel_changes (0);
+  fail:
+   if (merge_set)
+-    BITMAP_FREE (merge_set);
++    {
++      BITMAP_FREE (merge_set);
++      BITMAP_FREE (merge_set_noclobber);
++    }
+   return FALSE;
+ }
+ 
+
+=== modified file 'gcc/recog.c'
+--- old/gcc/recog.c	2010-08-05 15:28:47 +0000
++++ new/gcc/recog.c	2010-11-16 12:32:34 +0000
+@@ -2082,6 +2082,7 @@
+ 			       recog_data.operand_loc,
+ 			       recog_data.constraints,
+ 			       recog_data.operand_mode, NULL);
++	  memset (recog_data.is_operator, 0, sizeof recog_data.is_operator);
+ 	  if (noperands > 0)
+ 	    {
+ 	      const char *p =  recog_data.constraints[0];
+@@ -2111,6 +2112,7 @@
+       for (i = 0; i < noperands; i++)
+ 	{
+ 	  recog_data.constraints[i] = insn_data[icode].operand[i].constraint;
++	  recog_data.is_operator[i] = insn_data[icode].operand[i].is_operator;
+ 	  recog_data.operand_mode[i] = insn_data[icode].operand[i].mode;
+ 	  /* VOIDmode match_operands gets mode from their real operand.  */
+ 	  if (recog_data.operand_mode[i] == VOIDmode)
+@@ -2909,6 +2911,10 @@
+ 
+ static struct peep2_insn_data peep2_insn_data[MAX_INSNS_PER_PEEP2 + 1];
+ static int peep2_current;
++
++static bool peep2_do_rebuild_jump_labels;
++static bool peep2_do_cleanup_cfg;
++
+ /* The number of instructions available to match a peep2.  */
+ int peep2_current_count;
+ 
+@@ -2917,6 +2923,16 @@
+    DF_LIVE_OUT for the block.  */
+ #define PEEP2_EOB	pc_rtx
+ 
++/* Wrap N to fit into the peep2_insn_data buffer.  */
++
++static int
++peep2_buf_position (int n)
++{
++  if (n >= MAX_INSNS_PER_PEEP2 + 1)
++    n -= MAX_INSNS_PER_PEEP2 + 1;
++  return n;
++}
++
+ /* Return the Nth non-note insn after `current', or return NULL_RTX if it
+    does not exist.  Used by the recognizer to find the next insn to match
+    in a multi-insn pattern.  */
+@@ -2926,9 +2942,7 @@
+ {
+   gcc_assert (n <= peep2_current_count);
+ 
+-  n += peep2_current;
+-  if (n >= MAX_INSNS_PER_PEEP2 + 1)
+-    n -= MAX_INSNS_PER_PEEP2 + 1;
++  n = peep2_buf_position (peep2_current + n);
+ 
+   return peep2_insn_data[n].insn;
+ }
+@@ -2941,9 +2955,7 @@
+ {
+   gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  ofs += peep2_current;
+-  if (ofs >= MAX_INSNS_PER_PEEP2 + 1)
+-    ofs -= MAX_INSNS_PER_PEEP2 + 1;
++  ofs = peep2_buf_position (peep2_current + ofs);
+ 
+   gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
+ 
+@@ -2959,9 +2971,7 @@
+ 
+   gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  ofs += peep2_current;
+-  if (ofs >= MAX_INSNS_PER_PEEP2 + 1)
+-    ofs -= MAX_INSNS_PER_PEEP2 + 1;
++  ofs = peep2_buf_position (peep2_current + ofs);
+ 
+   gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
+ 
+@@ -2996,12 +3006,8 @@
+   gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1);
+   gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  from += peep2_current;
+-  if (from >= MAX_INSNS_PER_PEEP2 + 1)
+-    from -= MAX_INSNS_PER_PEEP2 + 1;
+-  to += peep2_current;
+-  if (to >= MAX_INSNS_PER_PEEP2 + 1)
+-    to -= MAX_INSNS_PER_PEEP2 + 1;
++  from = peep2_buf_position (peep2_current + from);
++  to = peep2_buf_position (peep2_current + to);
+ 
+   gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
+   REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before);
+@@ -3010,8 +3016,7 @@
+     {
+       HARD_REG_SET this_live;
+ 
+-      if (++from >= MAX_INSNS_PER_PEEP2 + 1)
+-	from = 0;
++      from = peep2_buf_position (from + 1);
+       gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
+       REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
+       IOR_HARD_REG_SET (live, this_live);
+@@ -3104,19 +3109,234 @@
+   COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live);
+ }
+ 
++/* While scanning basic block BB, we found a match of length MATCH_LEN,
++   starting at INSN.  Perform the replacement, removing the old insns and
++   replacing them with ATTEMPT.  Returns the last insn emitted.  */
++
++static rtx
++peep2_attempt (basic_block bb, rtx insn, int match_len, rtx attempt)
++{
++  int i;
++  rtx last, note, before_try, x;
++  bool was_call = false;
++
++  /* If we are splitting a CALL_INSN, look for the CALL_INSN
++     in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
++     cfg-related call notes.  */
++  for (i = 0; i <= match_len; ++i)
++    {
++      int j;
++      rtx old_insn, new_insn, note;
++
++      j = peep2_buf_position (peep2_current + i);
++      old_insn = peep2_insn_data[j].insn;
++      if (!CALL_P (old_insn))
++	continue;
++      was_call = true;
++
++      new_insn = attempt;
++      while (new_insn != NULL_RTX)
++	{
++	  if (CALL_P (new_insn))
++	    break;
++	  new_insn = NEXT_INSN (new_insn);
++	}
++
++      gcc_assert (new_insn != NULL_RTX);
++
++      CALL_INSN_FUNCTION_USAGE (new_insn)
++	= CALL_INSN_FUNCTION_USAGE (old_insn);
++
++      for (note = REG_NOTES (old_insn);
++	   note;
++	   note = XEXP (note, 1))
++	switch (REG_NOTE_KIND (note))
++	  {
++	  case REG_NORETURN:
++	  case REG_SETJMP:
++	    add_reg_note (new_insn, REG_NOTE_KIND (note),
++			  XEXP (note, 0));
++	    break;
++	  default:
++	    /* Discard all other reg notes.  */
++	    break;
++	  }
++
++      /* Croak if there is another call in the sequence.  */
++      while (++i <= match_len)
++	{
++	  j = peep2_buf_position (peep2_current + i);
++	  old_insn = peep2_insn_data[j].insn;
++	  gcc_assert (!CALL_P (old_insn));
++	}
++      break;
++    }
++
++  i = peep2_buf_position (peep2_current + match_len);
++
++  note = find_reg_note (peep2_insn_data[i].insn, REG_EH_REGION, NULL_RTX);
++
++  /* Replace the old sequence with the new.  */
++  last = emit_insn_after_setloc (attempt,
++				 peep2_insn_data[i].insn,
++				 INSN_LOCATOR (peep2_insn_data[i].insn));
++  before_try = PREV_INSN (insn);
++  delete_insn_chain (insn, peep2_insn_data[i].insn, false);
++
++  /* Re-insert the EH_REGION notes.  */
++  if (note || (was_call && nonlocal_goto_handler_labels))
++    {
++      edge eh_edge;
++      edge_iterator ei;
++
++      FOR_EACH_EDGE (eh_edge, ei, bb->succs)
++	if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
++	  break;
++
++      if (note)
++	copy_reg_eh_region_note_backward (note, last, before_try);
++
++      if (eh_edge)
++	for (x = last; x != before_try; x = PREV_INSN (x))
++	  if (x != BB_END (bb)
++	      && (can_throw_internal (x)
++		  || can_nonlocal_goto (x)))
++	    {
++	      edge nfte, nehe;
++	      int flags;
++
++	      nfte = split_block (bb, x);
++	      flags = (eh_edge->flags
++		       & (EDGE_EH | EDGE_ABNORMAL));
++	      if (CALL_P (x))
++		flags |= EDGE_ABNORMAL_CALL;
++	      nehe = make_edge (nfte->src, eh_edge->dest,
++				flags);
++
++	      nehe->probability = eh_edge->probability;
++	      nfte->probability
++		= REG_BR_PROB_BASE - nehe->probability;
++
++	      peep2_do_cleanup_cfg |= purge_dead_edges (nfte->dest);
++	      bb = nfte->src;
++	      eh_edge = nehe;
++	    }
++
++      /* Converting possibly trapping insn to non-trapping is
++	 possible.  Zap dummy outgoing edges.  */
++      peep2_do_cleanup_cfg |= purge_dead_edges (bb);
++    }
++
++  /* If we generated a jump instruction, it won't have
++     JUMP_LABEL set.  Recompute after we're done.  */
++  for (x = last; x != before_try; x = PREV_INSN (x))
++    if (JUMP_P (x))
++      {
++	peep2_do_rebuild_jump_labels = true;
++	break;
++      }
++
++  return last;
++}
++
++/* After performing a replacement in basic block BB, fix up the life
++   information in our buffer.  LAST is the last of the insns that we
++   emitted as a replacement.  PREV is the insn before the start of
++   the replacement.  MATCH_LEN is the number of instructions that were
++   matched, and which now need to be replaced in the buffer.  */
++
++static void
++peep2_update_life (basic_block bb, int match_len, rtx last, rtx prev)
++{
++  int i = peep2_buf_position (peep2_current + match_len + 1);
++  rtx x;
++  regset_head live;
++
++  INIT_REG_SET (&live);
++  COPY_REG_SET (&live, peep2_insn_data[i].live_before);
++
++  gcc_assert (peep2_current_count >= match_len + 1);
++  peep2_current_count -= match_len + 1;
++
++  x = last;
++  do
++    {
++      if (INSN_P (x))
++	{
++	  df_insn_rescan (x);
++	  if (peep2_current_count < MAX_INSNS_PER_PEEP2)
++	    {
++	      peep2_current_count++;
++	      if (--i < 0)
++		i = MAX_INSNS_PER_PEEP2;
++	      peep2_insn_data[i].insn = x;
++	      df_simulate_one_insn_backwards (bb, x, &live);
++	      COPY_REG_SET (peep2_insn_data[i].live_before, &live);
++	    }
++	}
++      x = PREV_INSN (x);
++    }
++  while (x != prev);
++  CLEAR_REG_SET (&live);
++
++  peep2_current = i;
++}
++
++/* Add INSN, which is in BB, at the end of the peep2 insn buffer if possible.
++   Return true if we added it, false otherwise.  The caller will try to match
++   peepholes against the buffer if we return false; otherwise it will try to
++   add more instructions to the buffer.  */
++
++static bool
++peep2_fill_buffer (basic_block bb, rtx insn, regset live)
++{
++  int pos;
++
++  /* Once we have filled the maximum number of insns the buffer can hold,
++     allow the caller to match the insns against peepholes.  We wait until
++     the buffer is full in case the target has similar peepholes of different
++     length; we always want to match the longest if possible.  */
++  if (peep2_current_count == MAX_INSNS_PER_PEEP2)
++    return false;
++
++  /* If an insn has RTX_FRAME_RELATED_P set, peephole substitution would lose
++     the REG_FRAME_RELATED_EXPR that is attached.  */
++  if (RTX_FRAME_RELATED_P (insn))
++    {
++      /* Let the buffer drain first.  */
++      if (peep2_current_count > 0)
++	return false;
++      /* Step over the insn then return true without adding the insn
++	 to the buffer; this will cause us to process the next
++	 insn.  */
++      df_simulate_one_insn_forwards (bb, insn, live);
++      return true;
++    }
++
++  pos = peep2_buf_position (peep2_current + peep2_current_count);
++  peep2_insn_data[pos].insn = insn;
++  COPY_REG_SET (peep2_insn_data[pos].live_before, live);
++  peep2_current_count++;
++
++  df_simulate_one_insn_forwards (bb, insn, live);
++  return true;
++}
++
+ /* Perform the peephole2 optimization pass.  */
+ 
+ static void
+ peephole2_optimize (void)
+ {
+-  rtx insn, prev;
++  rtx insn;
+   bitmap live;
+   int i;
+   basic_block bb;
+-  bool do_cleanup_cfg = false;
+-  bool do_rebuild_jump_labels = false;
++
++  peep2_do_cleanup_cfg = false;
++  peep2_do_rebuild_jump_labels = false;
+ 
+   df_set_flags (DF_LR_RUN_DCE);
++  df_note_add_problem ();
+   df_analyze ();
+ 
+   /* Initialize the regsets we're going to use.  */
+@@ -3126,214 +3346,59 @@
+ 
+   FOR_EACH_BB_REVERSE (bb)
+     {
++      bool past_end = false;
++      int pos;
++
+       rtl_profile_for_bb (bb);
+ 
+       /* Start up propagation.  */
+-      bitmap_copy (live, DF_LR_OUT (bb));
+-      df_simulate_initialize_backwards (bb, live);
++      bitmap_copy (live, DF_LR_IN (bb));
++      df_simulate_initialize_forwards (bb, live);
+       peep2_reinit_state (live);
+ 
+-      for (insn = BB_END (bb); ; insn = prev)
++      insn = BB_HEAD (bb);
++      for (;;)
+ 	{
+-	  prev = PREV_INSN (insn);
+-	  if (NONDEBUG_INSN_P (insn))
++	  rtx attempt, head;
++	  int match_len;
++
++	  if (!past_end && !NONDEBUG_INSN_P (insn))
+ 	    {
+-	      rtx attempt, before_try, x;
+-	      int match_len;
+-	      rtx note;
+-	      bool was_call = false;
+-
+-	      /* Record this insn.  */
+-	      if (--peep2_current < 0)
+-		peep2_current = MAX_INSNS_PER_PEEP2;
+-	      if (peep2_current_count < MAX_INSNS_PER_PEEP2
+-		  && peep2_insn_data[peep2_current].insn == NULL_RTX)
+-		peep2_current_count++;
+-	      peep2_insn_data[peep2_current].insn = insn;
+-	      df_simulate_one_insn_backwards (bb, insn, live);
+-	      COPY_REG_SET (peep2_insn_data[peep2_current].live_before, live);
+-
+-	      if (RTX_FRAME_RELATED_P (insn))
+-		{
+-		  /* If an insn has RTX_FRAME_RELATED_P set, peephole
+-		     substitution would lose the
+-		     REG_FRAME_RELATED_EXPR that is attached.  */
+-		  peep2_reinit_state (live);
+-		  attempt = NULL;
+-		}
+-	      else
+-		/* Match the peephole.  */
+-		attempt = peephole2_insns (PATTERN (insn), insn, &match_len);
+-
+-	      if (attempt != NULL)
+-		{
+-		  /* If we are splitting a CALL_INSN, look for the CALL_INSN
+-		     in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
+-		     cfg-related call notes.  */
+-		  for (i = 0; i <= match_len; ++i)
+-		    {
+-		      int j;
+-		      rtx old_insn, new_insn, note;
+-
+-		      j = i + peep2_current;
+-		      if (j >= MAX_INSNS_PER_PEEP2 + 1)
+-			j -= MAX_INSNS_PER_PEEP2 + 1;
+-		      old_insn = peep2_insn_data[j].insn;
+-		      if (!CALL_P (old_insn))
+-			continue;
+-		      was_call = true;
+-
+-		      new_insn = attempt;
+-		      while (new_insn != NULL_RTX)
+-			{
+-			  if (CALL_P (new_insn))
+-			    break;
+-			  new_insn = NEXT_INSN (new_insn);
+-			}
+-
+-		      gcc_assert (new_insn != NULL_RTX);
+-
+-		      CALL_INSN_FUNCTION_USAGE (new_insn)
+-			= CALL_INSN_FUNCTION_USAGE (old_insn);
+-
+-		      for (note = REG_NOTES (old_insn);
+-			   note;
+-			   note = XEXP (note, 1))
+-			switch (REG_NOTE_KIND (note))
+-			  {
+-			  case REG_NORETURN:
+-			  case REG_SETJMP:
+-			    add_reg_note (new_insn, REG_NOTE_KIND (note),
+-					  XEXP (note, 0));
+-			    break;
+-			  default:
+-			    /* Discard all other reg notes.  */
+-			    break;
+-			  }
+-
+-		      /* Croak if there is another call in the sequence.  */
+-		      while (++i <= match_len)
+-			{
+-			  j = i + peep2_current;
+-			  if (j >= MAX_INSNS_PER_PEEP2 + 1)
+-			    j -= MAX_INSNS_PER_PEEP2 + 1;
+-			  old_insn = peep2_insn_data[j].insn;
+-			  gcc_assert (!CALL_P (old_insn));
+-			}
+-		      break;
+-		    }
+-
+-		  i = match_len + peep2_current;
+-		  if (i >= MAX_INSNS_PER_PEEP2 + 1)
+-		    i -= MAX_INSNS_PER_PEEP2 + 1;
+-
+-		  note = find_reg_note (peep2_insn_data[i].insn,
+-					REG_EH_REGION, NULL_RTX);
+-
+-		  /* Replace the old sequence with the new.  */
+-		  attempt = emit_insn_after_setloc (attempt,
+-						    peep2_insn_data[i].insn,
+-				       INSN_LOCATOR (peep2_insn_data[i].insn));
+-		  before_try = PREV_INSN (insn);
+-		  delete_insn_chain (insn, peep2_insn_data[i].insn, false);
+-
+-		  /* Re-insert the EH_REGION notes.  */
+-		  if (note || (was_call && nonlocal_goto_handler_labels))
+-		    {
+-		      edge eh_edge;
+-		      edge_iterator ei;
+-
+-		      FOR_EACH_EDGE (eh_edge, ei, bb->succs)
+-			if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
+-			  break;
+-
+-		      if (note)
+-			copy_reg_eh_region_note_backward (note, attempt,
+-							  before_try);
+-
+-		      if (eh_edge)
+-			for (x = attempt ; x != before_try ; x = PREV_INSN (x))
+-			  if (x != BB_END (bb)
+-			      && (can_throw_internal (x)
+-				  || can_nonlocal_goto (x)))
+-			    {
+-			      edge nfte, nehe;
+-			      int flags;
+-
+-			      nfte = split_block (bb, x);
+-			      flags = (eh_edge->flags
+-				       & (EDGE_EH | EDGE_ABNORMAL));
+-			      if (CALL_P (x))
+-				flags |= EDGE_ABNORMAL_CALL;
+-			      nehe = make_edge (nfte->src, eh_edge->dest,
+-						flags);
+-
+-			      nehe->probability = eh_edge->probability;
+-			      nfte->probability
+-				= REG_BR_PROB_BASE - nehe->probability;
+-
+-			      do_cleanup_cfg |= purge_dead_edges (nfte->dest);
+-			      bb = nfte->src;
+-			      eh_edge = nehe;
+-			    }
+-
+-		      /* Converting possibly trapping insn to non-trapping is
+-			 possible.  Zap dummy outgoing edges.  */
+-		      do_cleanup_cfg |= purge_dead_edges (bb);
+-		    }
+-
+-		  if (targetm.have_conditional_execution ())
+-		    {
+-		      for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
+-			peep2_insn_data[i].insn = NULL_RTX;
+-		      peep2_insn_data[peep2_current].insn = PEEP2_EOB;
+-		      peep2_current_count = 0;
+-		    }
+-		  else
+-		    {
+-		      /* Back up lifetime information past the end of the
+-			 newly created sequence.  */
+-		      if (++i >= MAX_INSNS_PER_PEEP2 + 1)
+-			i = 0;
+-		      bitmap_copy (live, peep2_insn_data[i].live_before);
+-
+-		      /* Update life information for the new sequence.  */
+-		      x = attempt;
+-		      do
+-			{
+-			  if (INSN_P (x))
+-			    {
+-			      if (--i < 0)
+-				i = MAX_INSNS_PER_PEEP2;
+-			      if (peep2_current_count < MAX_INSNS_PER_PEEP2
+-				  && peep2_insn_data[i].insn == NULL_RTX)
+-				peep2_current_count++;
+-			      peep2_insn_data[i].insn = x;
+-			      df_insn_rescan (x);
+-			      df_simulate_one_insn_backwards (bb, x, live);
+-			      bitmap_copy (peep2_insn_data[i].live_before,
+-					   live);
+-			    }
+-			  x = PREV_INSN (x);
+-			}
+-		      while (x != prev);
+-
+-		      peep2_current = i;
+-		    }
+-
+-		  /* If we generated a jump instruction, it won't have
+-		     JUMP_LABEL set.  Recompute after we're done.  */
+-		  for (x = attempt; x != before_try; x = PREV_INSN (x))
+-		    if (JUMP_P (x))
+-		      {
+-		        do_rebuild_jump_labels = true;
+-			break;
+-		      }
+-		}
++	    next_insn:
++	      insn = NEXT_INSN (insn);
++	      if (insn == NEXT_INSN (BB_END (bb)))
++		past_end = true;
++	      continue;
+ 	    }
++	  if (!past_end && peep2_fill_buffer (bb, insn, live))
++	    goto next_insn;
+ 
+-	  if (insn == BB_HEAD (bb))
++	  /* If we did not fill an empty buffer, it signals the end of the
++	     block.  */
++	  if (peep2_current_count == 0)
+ 	    break;
++
++	  /* The buffer filled to the current maximum, so try to match.  */
++
++	  pos = peep2_buf_position (peep2_current + peep2_current_count);
++	  peep2_insn_data[pos].insn = PEEP2_EOB;
++	  COPY_REG_SET (peep2_insn_data[pos].live_before, live);
++
++	  /* Match the peephole.  */
++	  head = peep2_insn_data[peep2_current].insn;
++	  attempt = peephole2_insns (PATTERN (head), head, &match_len);
++	  if (attempt != NULL)
++	    {
++	      rtx last;
++	      last = peep2_attempt (bb, head, match_len, attempt);
++	      peep2_update_life (bb, match_len, last, PREV_INSN (attempt));
++	    }
++	  else
++	    {
++	      /* If no match, advance the buffer by one insn.  */
++	      peep2_current = peep2_buf_position (peep2_current + 1);
++	      peep2_current_count--;
++	    }
+ 	}
+     }
+ 
+@@ -3341,7 +3406,7 @@
+   for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
+     BITMAP_FREE (peep2_insn_data[i].live_before);
+   BITMAP_FREE (live);
+-  if (do_rebuild_jump_labels)
++  if (peep2_do_rebuild_jump_labels)
+     rebuild_jump_labels (get_insns ());
+ }
+ #endif /* HAVE_peephole2 */
+
+=== modified file 'gcc/recog.h'
+--- old/gcc/recog.h	2009-10-26 21:55:59 +0000
++++ new/gcc/recog.h	2010-11-16 12:32:34 +0000
+@@ -194,6 +194,9 @@
+   /* Gives the constraint string for operand N.  */
+   const char *constraints[MAX_RECOG_OPERANDS];
+ 
++  /* Nonzero if operand N is a match_operator or a match_parallel.  */
++  char is_operator[MAX_RECOG_OPERANDS];
++
+   /* Gives the mode of operand N.  */
+   enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
+ 
+@@ -260,6 +263,8 @@
+ 
+   const char strict_low;
+ 
++  const char is_operator;
++
+   const char eliminable;
+ };
+ 
+
+=== modified file 'gcc/reload.c'
+--- old/gcc/reload.c	2009-12-21 16:32:44 +0000
++++ new/gcc/reload.c	2010-11-16 12:32:34 +0000
+@@ -3631,7 +3631,7 @@
+ 		   || modified[j] != RELOAD_WRITE)
+ 		  && j != i
+ 		  /* Ignore things like match_operator operands.  */
+-		  && *recog_data.constraints[j] != 0
++		  && !recog_data.is_operator[j]
+ 		  /* Don't count an input operand that is constrained to match
+ 		     the early clobber operand.  */
+ 		  && ! (this_alternative_matches[j] == i
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch
new file mode 100644
index 0000000000..e8c8e63883
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99464.patch
@@ -0,0 +1,157 @@
+	LP: #681138
+	Backport from mainline:
+
+	gcc/
+	* config/arm/sync.md (sync_clobber, sync_t2_reqd): New code attribute.
+	(arm_sync_old_<sync_optab>si, arm_sync_old_<sync_optab><mode>): Use
+	the sync_clobber and sync_t2_reqd code attributes.
+	* config/arm/arm.c (arm_output_sync_loop): Reverse the operation if
+	the t2 argument is NULL.
+
+=== modified file 'gcc/config/arm/arm.c'
+Index: gcc-4_5-branch/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.c
++++ gcc-4_5-branch/gcc/config/arm/arm.c
+@@ -23098,10 +23098,46 @@ arm_output_sync_loop (emit_f emit,
+       break;
+     }
+ 
+-  arm_output_strex (emit, mode, "", t2, t1, memory);
+-  operands[0] = t2;
+-  arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
+-  arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=", LOCAL_LABEL_PREFIX);
++  if (t2)
++    {
++       arm_output_strex (emit, mode, "", t2, t1, memory);
++       operands[0] = t2;
++       arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
++       arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
++			    LOCAL_LABEL_PREFIX);
++    }
++  else
++    {
++      /* Use old_value for the return value because for some operations
++	 the old_value can easily be restored.  This saves one register.  */
++      arm_output_strex (emit, mode, "", old_value, t1, memory);
++      operands[0] = old_value;
++      arm_output_asm_insn (emit, 0, operands, "teq\t%%0, #0");
++      arm_output_asm_insn (emit, 0, operands, "bne\t%sLSYT%%=",
++			   LOCAL_LABEL_PREFIX);
++
++      switch (sync_op)
++	{
++	case SYNC_OP_ADD:
++	  arm_output_op3 (emit, "sub", old_value, t1, new_value);
++	  break;
++
++	case SYNC_OP_SUB:
++	  arm_output_op3 (emit, "add", old_value, t1, new_value);
++	  break;
++
++	case SYNC_OP_XOR:
++	  arm_output_op3 (emit, "eor", old_value, t1, new_value);
++	  break;
++
++	case SYNC_OP_NONE:
++	  arm_output_op2 (emit, "mov", old_value, required_value);
++	  break;
++
++	default:
++	  gcc_unreachable ();
++	}
++    }
+ 
+   arm_process_output_memory_barrier (emit, NULL);
+   arm_output_asm_insn (emit, 1, operands, "%sLSYB%%=:", LOCAL_LABEL_PREFIX);
+Index: gcc-4_5-branch/gcc/config/arm/sync.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/sync.md
++++ gcc-4_5-branch/gcc/config/arm/sync.md
+@@ -103,6 +103,18 @@
+ 			      (plus "add")
+ 			      (minus "sub")])
+ 
++(define_code_attr sync_clobber [(ior "=&r")
++				(and "=&r")
++				(xor "X")
++				(plus "X")
++				(minus "X")])
++
++(define_code_attr sync_t2_reqd [(ior "4")
++				(and "4")
++				(xor "*")
++				(plus "*")
++				(minus "*")])
++
+ (define_expand "sync_<sync_optab>si"
+   [(match_operand:SI 0 "memory_operand")
+    (match_operand:SI 1 "s_register_operand")
+@@ -286,7 +298,6 @@
+ 	  VUNSPEC_SYNC_COMPARE_AND_SWAP))
+    (set (match_dup 1) (unspec_volatile:SI [(match_dup 2)]
+                                           VUNSPEC_SYNC_COMPARE_AND_SWAP))
+-   (clobber:SI (match_scratch:SI 4 "=&r"))
+    (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
+                                                 VUNSPEC_SYNC_COMPARE_AND_SWAP))
+    ]
+@@ -299,7 +310,6 @@
+    (set_attr "sync_required_value"  "2")
+    (set_attr "sync_new_value"       "3")
+    (set_attr "sync_t1"              "0")
+-   (set_attr "sync_t2"              "4")
+    (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+@@ -313,7 +323,6 @@
+ 	    VUNSPEC_SYNC_COMPARE_AND_SWAP)))
+    (set (match_dup 1) (unspec_volatile:NARROW [(match_dup 2)]
+                                           VUNSPEC_SYNC_COMPARE_AND_SWAP))
+-   (clobber:SI (match_scratch:SI 4 "=&r"))
+    (set (reg:CC CC_REGNUM) (unspec_volatile:CC [(match_dup 1)]
+                                                 VUNSPEC_SYNC_COMPARE_AND_SWAP))
+    ]
+@@ -326,7 +335,6 @@
+    (set_attr "sync_required_value"  "2")
+    (set_attr "sync_new_value"       "3")
+    (set_attr "sync_t1"              "0")
+-   (set_attr "sync_t2"              "4")
+    (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+ 
+@@ -487,7 +495,7 @@
+ 	                    VUNSPEC_SYNC_OLD_OP))
+    (clobber (reg:CC CC_REGNUM))
+    (clobber (match_scratch:SI 3 "=&r"))
+-   (clobber (match_scratch:SI 4 "=&r"))]
++   (clobber (match_scratch:SI 4 "<sync_clobber>"))]
+   "TARGET_HAVE_LDREX && TARGET_HAVE_MEMORY_BARRIER"
+   {
+     return arm_output_sync_insn (insn, operands);
+@@ -496,7 +504,7 @@
+    (set_attr "sync_memory"          "1")
+    (set_attr "sync_new_value"       "2")
+    (set_attr "sync_t1"              "3")
+-   (set_attr "sync_t2"              "4")
++   (set_attr "sync_t2"              "<sync_t2_reqd>")
+    (set_attr "sync_op"              "<sync_optab>")
+    (set_attr "conds" "clob")
+    (set_attr "predicable" "no")])
+@@ -540,7 +548,7 @@
+ 	                    VUNSPEC_SYNC_OLD_OP))
+    (clobber (reg:CC CC_REGNUM))
+    (clobber (match_scratch:SI 3 "=&r"))
+-   (clobber (match_scratch:SI 4 "=&r"))]
++   (clobber (match_scratch:SI 4 "<sync_clobber>"))]
+   "TARGET_HAVE_LDREXBHD && TARGET_HAVE_MEMORY_BARRIER"
+   {
+     return arm_output_sync_insn (insn, operands);
+@@ -549,7 +557,7 @@
+    (set_attr "sync_memory"          "1")
+    (set_attr "sync_new_value"       "2")
+    (set_attr "sync_t1"              "3")
+-   (set_attr "sync_t2"              "4")
++   (set_attr "sync_t2"              "<sync_t2_reqd>")
+    (set_attr "sync_op"              "<sync_optab>")
+    (set_attr "conds" 		    "clob")
+    (set_attr "predicable" "no")])
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99465.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99465.patch
new file mode 100644
index 0000000000..32c2999a7c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99465.patch
@@ -0,0 +1,94 @@
+2011-01-18  Ulrich Weigand  <uweigand@de.ibm.com>
+
+	LP: #685352
+	Backport from mainline:
+
+	2011-01-18  Jakub Jelinek  <jakub@redhat.com>
+
+	gcc/
+	PR rtl-optimization/47299
+	* expr.c (expand_expr_real_2) <case WIDEN_MULT_EXPR>: Don't use
+	subtarget.  Use normal multiplication if both operands are
+	constants.
+	* expmed.c (expand_widening_mult): Don't try to optimize constant
+	multiplication if op0 has VOIDmode.  Convert op1 constant to mode
+	before using it.
+
+	gcc/testsuite/
+	PR rtl-optimization/47299
+	* gcc.c-torture/execute/pr47299.c: New test.
+
+=== modified file 'gcc/expmed.c'
+Index: gcc-4_5-branch/gcc/expmed.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/expmed.c
++++ gcc-4_5-branch/gcc/expmed.c
+@@ -3355,12 +3355,17 @@ expand_widening_mult (enum machine_mode 
+ 		      int unsignedp, optab this_optab)
+ {
+   bool speed = optimize_insn_for_speed_p ();
++  rtx cop1;
+ 
+   if (CONST_INT_P (op1)
+-      && (INTVAL (op1) >= 0
++      && GET_MODE (op0) != VOIDmode
++      && (cop1 = convert_modes (mode, GET_MODE (op0), op1,
++				this_optab == umul_widen_optab))
++      && CONST_INT_P (cop1)
++      && (INTVAL (cop1) >= 0
+ 	  || GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT))
+     {
+-      HOST_WIDE_INT coeff = INTVAL (op1);
++      HOST_WIDE_INT coeff = INTVAL (cop1);
+       int max_cost;
+       enum mult_variant variant;
+       struct algorithm algorithm;
+Index: gcc-4_5-branch/gcc/expr.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/expr.c
++++ gcc-4_5-branch/gcc/expr.c
+@@ -7624,10 +7624,10 @@ expand_expr_real_2 (sepops ops, rtx targ
+ 	      if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
+ 		{
+ 		  if (TYPE_UNSIGNED (TREE_TYPE (treeop0)))
+-		    expand_operands (treeop0, treeop1, subtarget, &op0, &op1,
++		    expand_operands (treeop0, treeop1, NULL_RTX, &op0, &op1,
+ 				     EXPAND_NORMAL);
+ 		  else
+-		    expand_operands (treeop0, treeop1, subtarget, &op1, &op0,
++		    expand_operands (treeop0, treeop1, NULL_RTX, &op1, &op0,
+ 				     EXPAND_NORMAL);
+ 		  goto binop3;
+ 		}
+@@ -7645,7 +7645,8 @@ expand_expr_real_2 (sepops ops, rtx targ
+ 	  optab other_optab = zextend_p ? smul_widen_optab : umul_widen_optab;
+ 	  this_optab = zextend_p ? umul_widen_optab : smul_widen_optab;
+ 
+-	  if (mode == GET_MODE_2XWIDER_MODE (innermode))
++	  if (mode == GET_MODE_2XWIDER_MODE (innermode)
++	      && TREE_CODE (treeop0) != INTEGER_CST)
+ 	    {
+ 	      if (optab_handler (this_optab, mode)->insn_code != CODE_FOR_nothing)
+ 		{
+Index: gcc-4_5-branch/gcc/testsuite/gcc.c-torture/execute/pr47299.c
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/testsuite/gcc.c-torture/execute/pr47299.c
+@@ -0,0 +1,17 @@
++/* PR rtl-optimization/47299 */
++
++extern void abort (void);
++
++__attribute__ ((noinline, noclone)) unsigned short
++foo (unsigned char x)
++{
++  return x * 255;
++}
++
++int
++main ()
++{
++  if (foo (0x40) != 0x3fc0)
++    abort ();
++  return 0;
++}
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch
new file mode 100644
index 0000000000..580d4f4724
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99466.patch
@@ -0,0 +1,38 @@
+2011-01-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	Backport from FSF mainline
+
+	2011-01-18  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        * config/arm/cortex-a9.md (cortex-a9-neon.md): Actually
+        include.
+        (cortex_a9_dp): Handle neon types correctly.
+
+=== modified file 'gcc/config/arm/cortex-a9.md'
+Index: gcc-4_5-branch/gcc/config/arm/cortex-a9.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/cortex-a9.md
++++ gcc-4_5-branch/gcc/config/arm/cortex-a9.md
+@@ -79,10 +79,11 @@ cortex_a9_p1_e2 + cortex_a9_p0_e1 + cort
+ ;; which can go down E2 without any problem.
+ (define_insn_reservation "cortex_a9_dp" 2
+   (and (eq_attr "tune" "cortexa9")
+-       (ior (eq_attr "type" "alu")
+-	    (ior (and (eq_attr "type" "alu_shift_reg, alu_shift")
+-		 (eq_attr "insn" "mov"))
+-		 (eq_attr "neon_type" "none"))))
++         (ior (and (eq_attr "type" "alu")
++                        (eq_attr "neon_type" "none"))
++	      (and (and (eq_attr "type" "alu_shift_reg, alu_shift")
++			(eq_attr "insn" "mov"))
++                 (eq_attr "neon_type" "none"))))
+   "cortex_a9_p0_default|cortex_a9_p1_default")
+ 
+ ;; An instruction using the shifter will go down E1.
+@@ -263,3 +264,6 @@ cortex_a9_store3_4, cortex_a9_store1_2, 
+   (and (eq_attr "tune" "cortexa9")
+        (eq_attr "type" "fdivd"))
+   "ca9fp_ds1 + ca9_issue_vfp_neon, nothing*24")
++
++;; Include Neon pipeline description
++(include "cortex-a9-neon.md")
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99468.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99468.patch
new file mode 100644
index 0000000000..cf22aaf16f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99468.patch
@@ -0,0 +1,811 @@
+2010-12-13  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	* tree-if-switch-conversion.c: New pass.
+	* tree-pass.h (pass_if_to_switch): Declare.
+	* common.opt (ftree-if-to-switch-conversion): New switch.
+	* opts.c (decode_options): Set flag_tree_if_to_switch_conversion at -O2
+	and higher.
+	* passes.c (init_optimization_passes): Use new pass.
+	* params.def (PARAM_IF_TO_SWITCH_THRESHOLD): New param.
+	* doc/invoke.texi (-ftree-if-to-switch-conversion)
+	(if-to-switch-threshold): New item.
+	* doc/invoke.texi (Optimization Options, option -O2): Add
+	-ftree-if-to-switch-conversion.
+	* Makefile.in (OBJS-common): Add tree-if-switch-conversion.o.
+	* Makefile.in (tree-if-switch-conversion.o): New rule.
+
+=== modified file 'gcc/Makefile.in'
+Index: gcc-4_5-branch/gcc/Makefile.in
+===================================================================
+--- gcc-4_5-branch.orig/gcc/Makefile.in
++++ gcc-4_5-branch/gcc/Makefile.in
+@@ -1354,6 +1354,7 @@ OBJS-common = \
+ 	tree-profile.o \
+ 	tree-scalar-evolution.o \
+ 	tree-sra.o \
++	tree-if-switch-conversion.o \
+ 	tree-switch-conversion.o \
+ 	tree-ssa-address.o \
+ 	tree-ssa-alias.o \
+@@ -3013,6 +3014,11 @@ tree-sra.o : tree-sra.c $(CONFIG_H) $(SY
+    $(TM_H) $(TREE_H) $(GIMPLE_H) $(CGRAPH_H) $(TREE_FLOW_H) $(IPA_PROP_H) \
+    $(DIAGNOSTIC_H) statistics.h $(TREE_DUMP_H) $(TIMEVAR_H) $(PARAMS_H) \
+    $(TARGET_H) $(FLAGS_H) $(EXPR_H) $(TREE_INLINE_H)
++tree-if-switch-conversion.o : tree-if-switch-conversion.c $(CONFIG_H) \
++    $(SYSTEM_H) $(TREE_H) $(TM_P_H) $(TREE_FLOW_H) $(DIAGNOSTIC_H) \
++    $(TREE_INLINE_H) $(TIMEVAR_H) $(TM_H) coretypes.h $(TREE_DUMP_H) \
++    $(GIMPLE_H) $(TREE_PASS_H) $(FLAGS_H) $(EXPR_H) $(BASIC_BLOCK_H) output.h \
++    $(GGC_H) $(OBSTACK_H) $(PARAMS_H) $(CPPLIB_H) $(PARAMS_H)
+ tree-switch-conversion.o : tree-switch-conversion.c $(CONFIG_H) $(SYSTEM_H) \
+     $(TREE_H) $(TM_P_H) $(TREE_FLOW_H) $(DIAGNOSTIC_H) $(TREE_INLINE_H) \
+     $(TIMEVAR_H) $(TM_H) coretypes.h $(TREE_DUMP_H) $(GIMPLE_H) \
+Index: gcc-4_5-branch/gcc/common.opt
+===================================================================
+--- gcc-4_5-branch.orig/gcc/common.opt
++++ gcc-4_5-branch/gcc/common.opt
+@@ -1285,6 +1285,10 @@ ftree-switch-conversion
+ Common Report Var(flag_tree_switch_conversion) Optimization
+ Perform conversions of switch initializations.
+ 
++ftree-if-to-switch-conversion
++Common Report Var(flag_tree_if_to_switch_conversion) Optimization
++Perform conversions of chains of ifs into switches.
++
+ ftree-dce
+ Common Report Var(flag_tree_dce) Optimization
+ Enable SSA dead code elimination optimization on trees
+Index: gcc-4_5-branch/gcc/doc/invoke.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/invoke.texi
++++ gcc-4_5-branch/gcc/doc/invoke.texi
+@@ -382,7 +382,8 @@ Objective-C and Objective-C++ Dialects}.
+ -fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer @gol
+ -ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop @gol
+ -ftree-copyrename -ftree-dce @gol
+--ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre -ftree-loop-im @gol
++-ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre @gol
++-ftree-if-to-switch-conversion -ftree-loop-im @gol
+ -ftree-phiprop -ftree-loop-distribution @gol
+ -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize @gol
+ -ftree-parallelize-loops=@var{n} -ftree-pre -ftree-pta -ftree-reassoc @gol
+@@ -5798,6 +5799,7 @@ also turns on the following optimization
+ -fsched-interblock  -fsched-spec @gol
+ -fschedule-insns  -fschedule-insns2 @gol
+ -fstrict-aliasing -fstrict-overflow @gol
++-ftree-if-to-switch-conversion @gol
+ -ftree-switch-conversion @gol
+ -ftree-pre @gol
+ -ftree-vrp}
+@@ -6634,6 +6636,10 @@ Perform conversion of simple initializat
+ initializations from a scalar array.  This flag is enabled by default
+ at @option{-O2} and higher.
+ 
++@item -ftree-if-to-switch-conversion
++Perform conversion of chains of ifs into switches.  This flag is enabled by
++default at @option{-O2} and higher.
++
+ @item -ftree-dce
+ @opindex ftree-dce
+ Perform dead code elimination (DCE) on trees.  This flag is enabled by
+@@ -8577,6 +8583,12 @@ loop in the loop nest by a given number 
+ length can be changed using the @option{loop-block-tile-size}
+ parameter.  The default value is 51 iterations.
+ 
++@item if-to-switch-threshold
++If-chain to switch conversion, enabled by
++@option{-ftree-if-to-switch-conversion} convert chains of ifs of sufficient
++length into switches.  The parameter @option{if-to-switch-threshold} can be
++used to set the minimal required length.  The default value is 3.
++
+ @end table
+ @end table
+ 
+Index: gcc-4_5-branch/gcc/opts.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/opts.c
++++ gcc-4_5-branch/gcc/opts.c
+@@ -905,6 +905,7 @@ decode_options (unsigned int argc, const
+   flag_tree_builtin_call_dce = opt2;
+   flag_tree_pre = opt2;
+   flag_tree_switch_conversion = opt2;
++  flag_tree_if_to_switch_conversion = opt2;
+   flag_ipa_cp = opt2;
+   flag_ipa_sra = opt2;
+   flag_ee = opt2;
+Index: gcc-4_5-branch/gcc/params.def
+===================================================================
+--- gcc-4_5-branch.orig/gcc/params.def
++++ gcc-4_5-branch/gcc/params.def
+@@ -826,6 +826,11 @@ DEFPARAM (PARAM_IPA_SRA_PTR_GROWTH_FACTO
+ 	  "a pointer to an aggregate with",
+ 	  2, 0, 0)
+ 
++DEFPARAM (PARAM_IF_TO_SWITCH_THRESHOLD,
++	  "if-to-switch-threshold",
++	  "Threshold for converting an if-chain into a switch",
++	  3, 0, 0)
++
+ /*
+ Local variables:
+ mode:c
+Index: gcc-4_5-branch/gcc/passes.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/passes.c
++++ gcc-4_5-branch/gcc/passes.c
+@@ -788,6 +788,7 @@ init_optimization_passes (void)
+ 	  NEXT_PASS (pass_cd_dce);
+ 	  NEXT_PASS (pass_early_ipa_sra);
+ 	  NEXT_PASS (pass_tail_recursion);
++	  NEXT_PASS (pass_if_to_switch);
+ 	  NEXT_PASS (pass_convert_switch);
+           NEXT_PASS (pass_cleanup_eh);
+           NEXT_PASS (pass_profile);
+@@ -844,6 +845,7 @@ init_optimization_passes (void)
+       NEXT_PASS (pass_phiprop);
+       NEXT_PASS (pass_fre);
+       NEXT_PASS (pass_copy_prop);
++      NEXT_PASS (pass_if_to_switch);
+       NEXT_PASS (pass_merge_phi);
+       NEXT_PASS (pass_vrp);
+       NEXT_PASS (pass_dce);
+Index: gcc-4_5-branch/gcc/tree-if-switch-conversion.c
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/tree-if-switch-conversion.c
+@@ -0,0 +1,643 @@
++/* Convert a chain of ifs into a switch.
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by Tom de Vries <tom@codesourcery.com>
++
++This file is part of GCC.
++
++GCC is free software; you can redistribute it and/or modify it
++under the terms of the GNU General Public License as published by the
++Free Software Foundation; either version 3, or (at your option) any
++later version.
++
++GCC is distributed in the hope that it will be useful, but WITHOUT
++ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
++FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++for more details.
++
++You should have received a copy of the GNU General Public License
++along with GCC; see the file COPYING3.  If not, write to the Free
++Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
++02110-1301, USA.  */
++
++
++/* The following pass converts a chain of ifs into a switch.
++
++   The if-chain has the following properties:
++   - all bbs end in a GIMPLE_COND.
++   - all but the first bb are empty, apart from the GIMPLE_COND.
++   - the GIMPLE_CONDs compare the same variable against integer constants.
++   - the true gotos all target the same bb.
++   - the false gotos target the next in the if-chain.
++
++   F.i., consider the following if-chain:
++   ...
++   <bb 4>:
++   ...
++   if (D.1993_3 == 32)
++     goto <bb 3>;
++   else
++     goto <bb 5>;
++
++   <bb 5>:
++   if (D.1993_3 == 13)
++     goto <bb 3>;
++   else
++     goto <bb 6>;
++
++   <bb 6>:
++   if (D.1993_3 == 10)
++     goto <bb 3>;
++   else
++     goto <bb 7>;
++
++   <bb 7>:
++   if (D.1993_3 == 9)
++     goto <bb 3>;
++   else
++     goto <bb 8>;
++   ...
++
++   The pass will report this if-chain like this:
++   ...
++   var: D.1993_3
++   first: <bb 4>
++   true: <bb 3>
++   last: <bb 7>
++   constants: 9 10 13 32
++   ...
++
++   and then convert the if-chain into a switch:
++   ...
++   <bb 4>:
++   ...
++   switch (D.1993_3) <default: <L8>,
++                      case 9: <L7>,
++                      case 10: <L7>,
++                      case 13: <L7>,
++                      case 32: <L7>>
++   ...
++
++   The conversion does not happen if the chain is too short.  The threshold is
++   determined by the parameter PARAM_IF_TO_SWITCH_THRESHOLD.
++
++   The pass will try to construct a chain for each bb, unless the bb it is
++   already contained in a chain.  This ensures that all chains will be found,
++   and that no chain will be constructed twice.  The pass constructs and
++   converts the chains one-by-one, rather than first calculating all the chains
++   and then doing the conversions.
++
++   The pass could detect range-checks in analyze_bb as well, and handle them.
++   Simple ones, like 'c <= 5', and more complex ones, like
++   '(unsigned char) c + 247 <= 1', which is generated by the C front-end from
++   code like '(c == 9 || c == 10)' or '(9 <= c && c <= 10)'.  */
++
++#include "config.h"
++#include "system.h"
++#include "coretypes.h"
++#include "tm.h"
++
++#include "params.h"
++#include "flags.h"
++#include "tree.h"
++#include "basic-block.h"
++#include "tree-flow.h"
++#include "tree-flow-inline.h"
++#include "tree-ssa-operands.h"
++#include "diagnostic.h"
++#include "tree-pass.h"
++#include "tree-dump.h"
++#include "timevar.h"
++
++/* Information we've collected about a single bb.  */
++
++struct ifsc_info
++{
++  /* The variable of the bb's ending GIMPLE_COND, NULL_TREE if not present.  */
++  tree var;
++  /* The cond_code of the bb's ending GIMPLE_COND.  */
++  enum tree_code cond_code;
++  /* The constant of the bb's ending GIMPLE_COND.  */
++  tree constant;
++  /* Successor edge of the bb if its GIMPLE_COND is true.  */
++  edge true_edge;
++  /* Successor edge of the bb if its GIMPLE_COND is false.  */
++  edge false_edge;
++  /* Set if the bb has valid ifsc_info.  */
++   bool valid;
++  /* Set if the bb is part of a chain.  */
++  bool chained;
++};
++
++/* Macros to access the fields of struct ifsc_info.  */
++
++#define BB_IFSC_VAR(bb) (((struct ifsc_info *)bb->aux)->var)
++#define BB_IFSC_COND_CODE(bb) (((struct ifsc_info *)bb->aux)->cond_code)
++#define BB_IFSC_CONSTANT(bb) (((struct ifsc_info *)bb->aux)->constant)
++#define BB_IFSC_TRUE_EDGE(bb) (((struct ifsc_info *)bb->aux)->true_edge)
++#define BB_IFSC_FALSE_EDGE(bb) (((struct ifsc_info *)bb->aux)->false_edge)
++#define BB_IFSC_VALID(bb) (((struct ifsc_info *)bb->aux)->valid)
++#define BB_IFSC_CHAINED(bb) (((struct ifsc_info *)bb->aux)->chained)
++
++/* Data-type describing an if-chain.  */
++
++struct if_chain
++{
++  /* First bb in the chain.  */
++  basic_block first;
++  /* Last bb in the chain.  */
++  basic_block last;
++  /* Variable that GIMPLE_CONDs of all bbs in chain compare against.  */
++  tree var;
++  /* bb that all GIMPLE_CONDs jump to if comparison succeeds.  */
++  basic_block true_dest;
++  /* Constants that GIMPLE_CONDs of all bbs in chain compare var against.  */
++  VEC (tree, heap) *constants;
++  /* Same as previous, but sorted and with duplicates removed.  */
++  VEC (tree, heap) *unique_constants;
++};
++
++/* Utility macro.  */
++
++#define SWAP(T, X, Y) do { T tmp = (X); (X) = (Y); (Y) = tmp; } while (0)
++
++/* Helper function for sort_constants.  */
++
++static int
++compare_constants (const void *p1, const void *p2)
++{
++  const_tree const c1 = *(const_tree const*)p1;
++  const_tree const c2 = *(const_tree const*)p2;
++
++  return tree_int_cst_compare (c1, c2);
++}
++
++/* Sort constants in constants and copy to unique_constants, while skipping
++   duplicates.  */
++
++static void
++sort_constants (VEC (tree,heap) *constants, VEC (tree,heap) **unique_constants)
++{
++  size_t len = VEC_length (tree, constants);
++  unsigned int ix;
++  tree prev = NULL_TREE, constant;
++
++  /* Sort constants.  */
++  qsort (VEC_address (tree, constants), len, sizeof (tree),
++         compare_constants);
++
++  /* Copy to unique_constants, while skipping duplicates.  */
++  for (ix = 0; VEC_iterate (tree, constants, ix, constant); ix++)
++    {
++      if (prev != NULL_TREE && tree_int_cst_compare (prev, constant) == 0)
++        continue;
++      prev = constant;
++
++      VEC_safe_push (tree, heap, *unique_constants, constant);
++    }
++}
++
++/* Get true_edge and false_edge of a bb ending in a conditional jump.  */
++
++static void
++get_edges (basic_block bb, edge *true_edge, edge *false_edge)
++{
++  edge e0, e1;
++  int e0_true;
++  int n = EDGE_COUNT (bb->succs);
++  gcc_assert (n == 2);
++
++  e0 = EDGE_SUCC (bb, 0);
++  e1 = EDGE_SUCC (bb, 1);
++
++  e0_true = e0->flags & EDGE_TRUE_VALUE;
++
++  *true_edge = e0_true ? e0 : e1;
++  *false_edge = e0_true ? e1 : e0;
++
++  gcc_assert ((*true_edge)->flags & EDGE_TRUE_VALUE);
++  gcc_assert ((*false_edge)->flags & EDGE_FALSE_VALUE);
++
++  gcc_assert (((*true_edge)->flags & EDGE_FALLTHRU) == 0);
++  gcc_assert (((*false_edge)->flags & EDGE_FALLTHRU) == 0);
++}
++
++/* Analyze bb and store results in ifsc_info struct.  */
++
++static void
++analyze_bb (basic_block bb)
++{
++  gimple stmt = last_stmt (bb);
++  tree lhs, rhs, var, constant;
++  edge true_edge, false_edge;
++  enum tree_code cond_code;
++
++  /* Don't redo analysis.  */
++  if (BB_IFSC_VALID (bb))
++    return;
++  BB_IFSC_VALID (bb) = true;
++
++
++  /* bb needs to end in GIMPLE_COND.  */
++  if (!stmt || gimple_code (stmt) != GIMPLE_COND)
++    return;
++
++  /* bb needs to end in EQ_EXPR or NE_EXPR.  */
++  cond_code = gimple_cond_code (stmt);
++  if (cond_code != EQ_EXPR && cond_code != NE_EXPR)
++    return;
++
++  lhs = gimple_cond_lhs (stmt);
++  rhs = gimple_cond_rhs (stmt);
++
++  /* GIMPLE_COND needs to compare variable to constant.  */
++  if ((TREE_CONSTANT (lhs) == 0)
++      == (TREE_CONSTANT (rhs) == 0))
++    return;
++
++  var = TREE_CONSTANT (lhs) ? rhs : lhs;
++  constant = TREE_CONSTANT (lhs)? lhs : rhs;
++
++  /* Switches cannot handle non-integral types.  */
++  if (!INTEGRAL_TYPE_P(TREE_TYPE (var)))
++    return;
++
++  get_edges (bb, &true_edge, &false_edge);
++
++  if (cond_code == NE_EXPR)
++    SWAP (edge, true_edge, false_edge);
++
++  /* TODO: loosen this constraint.  In principle it's ok if true_edge->dest has
++     phis, as long as for each phi all the edges coming from the chain have the
++     same value.  */
++  if (!gimple_seq_empty_p (phi_nodes (true_edge->dest)))
++    return;
++
++  /* Store analysis in ifsc_info struct.  */
++  BB_IFSC_VAR (bb) = var;
++  BB_IFSC_COND_CODE (bb) = cond_code;
++  BB_IFSC_CONSTANT (bb) = constant;
++  BB_IFSC_TRUE_EDGE (bb) = true_edge;
++  BB_IFSC_FALSE_EDGE (bb) = false_edge;
++}
++
++/* Grow if-chain forward.  */
++
++static void
++grow_if_chain_forward (struct if_chain *chain)
++{
++  basic_block next_bb;
++
++  while (1)
++    {
++      next_bb = BB_IFSC_FALSE_EDGE (chain->last)->dest;
++
++      /* next_bb is already part of another chain.  */
++      if (BB_IFSC_CHAINED (next_bb))
++        break;
++
++      /* next_bb needs to be dominated by the last bb.  */
++      if (!single_pred_p (next_bb))
++        break;
++
++      analyze_bb (next_bb);
++
++      /* Does next_bb fit in chain?  */
++      if (BB_IFSC_VAR (next_bb) != chain->var
++          || BB_IFSC_TRUE_EDGE (next_bb)->dest != chain->true_dest)
++        break;
++
++      /* We can only add empty bbs at the end of the chain.  */
++      if (first_stmt (next_bb) != last_stmt (next_bb))
++        break;
++
++      /* Add next_bb at end of chain.  */
++      VEC_safe_push (tree, heap, chain->constants, BB_IFSC_CONSTANT (next_bb));
++      BB_IFSC_CHAINED (next_bb) = true;
++      chain->last = next_bb;
++    }
++}
++
++/* Grow if-chain backward.  */
++
++static void
++grow_if_chain_backward (struct if_chain *chain)
++{
++  basic_block prev_bb;
++
++  while (1)
++    {
++      /* First bb is not empty, cannot grow backwards.  */
++      if (first_stmt (chain->first) != last_stmt (chain->first))
++        break;
++
++      /* First bb has no single predecessor, cannot grow backwards.  */
++      if (!single_pred_p (chain->first))
++        break;
++
++      prev_bb = single_pred (chain->first);
++
++      /* prev_bb is already part of another chain.  */
++      if (BB_IFSC_CHAINED (prev_bb))
++        break;
++
++      analyze_bb (prev_bb);
++
++      /* Does prev_bb fit in chain?  */
++      if (BB_IFSC_VAR (prev_bb) != chain->var
++          || BB_IFSC_TRUE_EDGE (prev_bb)->dest != chain->true_dest)
++        break;
++
++      /* Add prev_bb at beginning of chain.  */
++      VEC_safe_push (tree, heap, chain->constants, BB_IFSC_CONSTANT (prev_bb));
++      BB_IFSC_CHAINED (prev_bb) = true;
++      chain->first = prev_bb;
++    }
++}
++
++/* Grow if-chain containing bb.  */
++
++static void
++grow_if_chain (basic_block bb, struct if_chain *chain)
++{
++  /* Initialize chain to empty.  */
++  VEC_truncate (tree, chain->constants, 0);
++  VEC_truncate (tree, chain->unique_constants, 0);
++
++  /* bb is already part of another chain.  */
++  if (BB_IFSC_CHAINED (bb))
++    return;
++
++  analyze_bb (bb);
++
++  /* bb is not fit to be part of a chain.  */
++  if (BB_IFSC_VAR (bb) == NULL_TREE)
++    return;
++
++  /* Set bb as initial part of the chain.  */
++  VEC_safe_push (tree, heap, chain->constants, BB_IFSC_CONSTANT (bb));
++  chain->first = chain->last = bb;
++  chain->var = BB_IFSC_VAR (bb);
++  chain->true_dest = BB_IFSC_TRUE_EDGE (bb)->dest;
++
++  /* bb is part of a chain now.  */
++  BB_IFSC_CHAINED (bb) = true;
++
++  /* Grow chain to its maximum size.  */
++  grow_if_chain_forward (chain);
++  grow_if_chain_backward (chain);
++
++  /* Sort constants and skip duplicates.  */
++  sort_constants (chain->constants, &chain->unique_constants);
++}
++
++static void
++dump_tree_vector (VEC (tree, heap) *vec)
++{
++  unsigned int ix;
++  tree constant;
++
++  for (ix = 0; VEC_iterate (tree, vec, ix, constant); ix++)
++    {
++      if (ix != 0)
++        fprintf (dump_file, " ");
++      print_generic_expr (dump_file, constant, 0);
++    }
++  fprintf (dump_file, "\n");
++}
++
++/* Dump if-chain to dump_file.  */
++
++static void
++dump_if_chain (struct if_chain *chain)
++{
++  if (!dump_file)
++    return;
++
++  fprintf (dump_file, "var: ");
++  print_generic_expr (dump_file, chain->var, 0);
++  fprintf (dump_file, "\n");
++  fprintf (dump_file, "first: <bb %d>\n", chain->first->index);
++  fprintf (dump_file, "true: <bb %d>\n", chain->true_dest->index);
++  fprintf (dump_file, "last: <bb %d>\n",chain->last->index);
++
++  fprintf (dump_file, "constants: ");
++  dump_tree_vector (chain->constants);
++
++  if (VEC_length (tree, chain->unique_constants)
++      != VEC_length (tree, chain->constants))
++    {
++      fprintf (dump_file, "unique_constants: ");
++      dump_tree_vector (chain->unique_constants);
++    }
++}
++
++/* Remove redundant bbs and edges.  */
++
++static void
++remove_redundant_bbs_and_edges (struct if_chain *chain, int *false_prob)
++{
++  basic_block bb, next;
++  edge true_edge, false_edge;
++
++  for (bb = chain->first;; bb = next)
++    {
++      true_edge = BB_IFSC_TRUE_EDGE (bb);
++      false_edge = BB_IFSC_FALSE_EDGE (bb);
++
++      /* Determine next, before we delete false_edge.  */
++      next = false_edge->dest;
++
++      /* Accumulate probability.  */
++      *false_prob = (*false_prob * false_edge->probability) / REG_BR_PROB_BASE;
++
++      /* Don't remove the new true_edge.  */
++      if (bb != chain->first)
++        remove_edge (true_edge);
++
++      /* Don't remove the new false_edge.  */
++      if (bb != chain->last)
++        remove_edge (false_edge);
++
++      /* Don't remove the first bb.  */
++      if (bb != chain->first)
++        delete_basic_block (bb);
++
++      /* Stop after last.  */
++      if (bb == chain->last)
++        break;
++    }
++}
++
++/* Update control flow graph.  */
++
++static void
++update_cfg (struct if_chain *chain)
++{
++  edge true_edge, false_edge;
++  int false_prob;
++  int flags_mask = ~(EDGE_FALLTHRU|EDGE_TRUE_VALUE|EDGE_FALSE_VALUE);
++
++  /* We keep these 2 edges, and remove the rest.  We need this specific
++     false_edge, because a phi in chain->last->dest might reference (the index
++     of) this edge.  For true_edge, we could pick any of them.  */
++  true_edge = BB_IFSC_TRUE_EDGE (chain->first);
++  false_edge = BB_IFSC_FALSE_EDGE (chain->last);
++
++  /* Update true edge.  */
++  true_edge->flags &= flags_mask;
++
++  /* Update false edge.  */
++  redirect_edge_pred (false_edge, chain->first);
++  false_edge->flags &= flags_mask;
++
++  false_prob = REG_BR_PROB_BASE;
++  remove_redundant_bbs_and_edges (chain, &false_prob);
++
++  /* Repair probabilities.  */
++  true_edge->probability = REG_BR_PROB_BASE - false_prob;
++  false_edge->probability = false_prob;
++
++  /* Force recalculation of dominance info.  */
++  free_dominance_info (CDI_DOMINATORS);
++  free_dominance_info (CDI_POST_DOMINATORS);
++}
++
++/* Create switch statement.  Borrows from gimplify_switch_expr.  */
++
++static void
++convert_if_chain_to_switch (struct if_chain *chain)
++{
++  tree label_decl_true, label_decl_false;
++  gimple label_true, label_false, gimple_switch;
++  gimple_stmt_iterator gsi;
++  tree default_case, other_case, constant;
++  unsigned int ix;
++  VEC (tree, heap) *labels;
++
++  labels = VEC_alloc (tree, heap, 8);
++
++  /* Create and insert true jump label.  */
++  label_decl_true = create_artificial_label (UNKNOWN_LOCATION);
++  label_true = gimple_build_label (label_decl_true);
++  gsi = gsi_start_bb (chain->true_dest);
++  gsi_insert_before (&gsi, label_true, GSI_SAME_STMT);
++
++  /* Create and insert false jump label.  */
++  label_decl_false = create_artificial_label (UNKNOWN_LOCATION);
++  label_false = gimple_build_label (label_decl_false);
++  gsi = gsi_start_bb (BB_IFSC_FALSE_EDGE (chain->last)->dest);
++  gsi_insert_before (&gsi, label_false, GSI_SAME_STMT);
++
++  /* Create default case label.  */
++  default_case = build3 (CASE_LABEL_EXPR, void_type_node,
++                         NULL_TREE, NULL_TREE,
++                         label_decl_false);
++
++  /* Create case labels.  */
++  for (ix = 0; VEC_iterate (tree, chain->unique_constants, ix, constant); ix++)
++    {
++      /* TODO: use ranges, as in gimplify_switch_expr.  */
++      other_case = build3 (CASE_LABEL_EXPR, void_type_node,
++                           constant, NULL_TREE,
++                           label_decl_true);
++      VEC_safe_push (tree, heap, labels, other_case);
++    }
++
++  /* Create and insert switch.  */
++  gimple_switch = gimple_build_switch_vec (chain->var, default_case, labels);
++  gsi = gsi_for_stmt (last_stmt (chain->first));
++  gsi_insert_before (&gsi, gimple_switch, GSI_SAME_STMT);
++
++  /* Remove now obsolete if.  */
++  gsi_remove (&gsi, true);
++
++  VEC_free (tree, heap, labels);
++}
++
++/* Allocation and initialization.  */
++
++static void
++init_pass (struct if_chain *chain)
++{
++  alloc_aux_for_blocks (sizeof (struct ifsc_info));
++
++  chain->constants = VEC_alloc (tree, heap, 8);
++  chain->unique_constants = VEC_alloc (tree, heap, 8);
++}
++
++/* Deallocation.  */
++
++static void
++finish_pass (struct if_chain *chain)
++{
++  free_aux_for_blocks ();
++
++  VEC_free (tree, heap, chain->constants);
++  VEC_free (tree, heap, chain->unique_constants);
++}
++
++/* Find if-chains and convert them to switches.  */
++
++static unsigned int
++do_if_to_switch (void)
++{
++  basic_block bb;
++  struct if_chain chain;
++  unsigned int convert_threshold = PARAM_VALUE (PARAM_IF_TO_SWITCH_THRESHOLD);
++
++  init_pass (&chain);
++
++  for (bb = cfun->cfg->x_entry_block_ptr->next_bb;
++       bb != cfun->cfg->x_exit_block_ptr;)
++    {
++      grow_if_chain (bb, &chain);
++
++      do
++        bb = bb->next_bb;
++      while (BB_IFSC_CHAINED (bb));
++
++      /* Determine if the chain is long enough.  */
++      if (VEC_length (tree, chain.unique_constants) < convert_threshold)
++        continue;
++
++      dump_if_chain (&chain);
++
++      convert_if_chain_to_switch (&chain);
++
++      update_cfg (&chain);
++    }
++
++  finish_pass (&chain);
++
++  return 0;
++}
++
++/* The pass gate.  */
++
++static bool
++if_to_switch_gate (void)
++{
++  return flag_tree_if_to_switch_conversion;
++}
++
++/* The pass definition.  */
++
++struct gimple_opt_pass pass_if_to_switch =
++{
++ {
++  GIMPLE_PASS,
++  "iftoswitch",                         /* name */
++  if_to_switch_gate,                    /* gate */
++  do_if_to_switch,                      /* execute */
++  NULL,                                 /* sub */
++  NULL,                                 /* next */
++  0,                                    /* static_pass_number */
++  TV_TREE_SWITCH_CONVERSION,            /* tv_id */
++  PROP_cfg | PROP_ssa,                  /* properties_required */
++  0,                                    /* properties_provided */
++  0,                                    /* properties_destroyed */
++  0,                                    /* todo_flags_start */
++  TODO_update_ssa | TODO_dump_func
++  | TODO_ggc_collect | TODO_verify_ssa  /* todo_flags_finish */
++ }
++};
+Index: gcc-4_5-branch/gcc/tree-pass.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/tree-pass.h
++++ gcc-4_5-branch/gcc/tree-pass.h
+@@ -560,6 +560,7 @@ extern struct gimple_opt_pass pass_inlin
+ extern struct gimple_opt_pass pass_all_early_optimizations;
+ extern struct gimple_opt_pass pass_update_address_taken;
+ extern struct gimple_opt_pass pass_convert_switch;
++extern struct gimple_opt_pass pass_if_to_switch;
+ 
+ /* The root of the compilation pass tree, once constructed.  */
+ extern struct opt_pass *all_passes, *all_small_ipa_passes, *all_lowering_passes,
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99473.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99473.patch
new file mode 100644
index 0000000000..3ac7f7f6fd
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99473.patch
@@ -0,0 +1,409 @@
+2010-02-04  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	stmt.c (set_jump_prob): Fix assert condition.
+
+2010-01-27  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	stmt.c (rtx_seq_cost): Use insn_rtx_cost instead of rtx_cost.
+
+2010-01-26  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	* stmt.c (struct  case_bit_test): Add rev_hi and rev_lo field.
+	* stmt.c (emit_case_bit_test_jump): New function.
+	* stmt.c (rtx_seq_cost): New function.
+	* stmt.c (choose_case_bit_test_expand_method): New function.
+	* stmt.c (set_bit): New function.
+	* stmt.c (emit_case_bit_test): Adjust comment.
+	* stmt.c (emit_case_bit_test): Set and update rev_hi and rev_lo fields.
+	* stmt.c (emit_case_bit_test): Use set_bit.
+	* stmt.c (emit_case_bit_test): Use choose_case_bit_test_expand_method.
+	* stmt.c (emit_case_bit_test): Use emit_case_bit_test_jump.
+	* testsuite/gcc.dg/switch-bittest.c: New test.
+
+2010-01-25  Tom de Vries  <tom@codesourcery.com>
+
+	gcc/
+	* stmt.c (emit_case_bit_tests): Change prototype.
+	* stmt.c (struct case_bit_test): Add prob field.
+	* stmt.c (get_label_prob): New function.
+	* stmt.c (set_jump_prob): New function.
+	* stmt.c (emit_case_bit_tests): Use get_label_prob.
+	* stmt.c (emit_case_bit_tests): Set prob field.
+	* stmt.c (emit_case_bit_tests): Use set_jump_prob.
+	* stmt.c (expand_case): Add new args to emit_case_bit_tests invocation.
+	* testsuite/gcc.dg/switch-prob.c: Add test.
+
+=== modified file 'gcc/stmt.c'
+Index: gcc-4_5-branch/gcc/stmt.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/stmt.c
++++ gcc-4_5-branch/gcc/stmt.c
+@@ -117,7 +117,8 @@ static void expand_value_return (rtx);
+ static int estimate_case_costs (case_node_ptr);
+ static bool lshift_cheap_p (void);
+ static int case_bit_test_cmp (const void *, const void *);
+-static void emit_case_bit_tests (tree, tree, tree, tree, case_node_ptr, rtx);
++static void emit_case_bit_tests (tree, tree, tree, tree, case_node_ptr, tree,
++                                 rtx, basic_block);
+ static void balance_case_nodes (case_node_ptr *, case_node_ptr);
+ static int node_has_low_bound (case_node_ptr, tree);
+ static int node_has_high_bound (case_node_ptr, tree);
+@@ -2107,8 +2108,11 @@ struct case_bit_test
+ {
+   HOST_WIDE_INT hi;
+   HOST_WIDE_INT lo;
++  HOST_WIDE_INT rev_hi;
++  HOST_WIDE_INT rev_lo;
+   rtx label;
+   int bits;
++  int prob;
+ };
+ 
+ /* Determine whether "1 << x" is relatively cheap in word_mode.  */
+@@ -2148,10 +2152,193 @@ case_bit_test_cmp (const void *p1, const
+   return CODE_LABEL_NUMBER (d2->label) - CODE_LABEL_NUMBER (d1->label);
+ }
+ 
++/* Emit a bit test and a conditional jump.  */
++
++static void
++emit_case_bit_test_jump (unsigned int count, rtx index, rtx label,
++                         unsigned int method, HOST_WIDE_INT hi,
++                         HOST_WIDE_INT lo, HOST_WIDE_INT rev_hi,
++                         HOST_WIDE_INT rev_lo)
++{
++  rtx expr;
++
++  if (method == 1)
++    {
++      /* (1 << index). */
++      if (count == 0)
++        index = expand_binop (word_mode, ashl_optab, const1_rtx,
++                              index, NULL_RTX, 1, OPTAB_WIDEN);
++      /* CST.  */
++      expr = immed_double_const (lo, hi, word_mode);
++      /* ((1 << index) & CST).  */
++      expr = expand_binop (word_mode, and_optab, index, expr,
++                           NULL_RTX, 1, OPTAB_WIDEN);
++      /* if (((1 << index) & CST)).   */
++      emit_cmp_and_jump_insns (expr, const0_rtx, NE, NULL_RTX,
++                               word_mode, 1, label);
++    }
++  else if (method == 2)
++    {
++      /* (bit_reverse (CST)) */
++      expr = immed_double_const (rev_lo, rev_hi, word_mode);
++      /* ((bit_reverse (CST)) << index) */
++      expr = expand_binop (word_mode, ashl_optab, expr,
++                           index, NULL_RTX, 1, OPTAB_WIDEN);
++      /* if (((bit_reverse (CST)) << index) < 0).  */
++      emit_cmp_and_jump_insns (expr, const0_rtx, LT, NULL_RTX,
++                               word_mode, 0, label);
++    }
++  else
++    gcc_unreachable ();
++}
++
++/* Return the cost of rtx sequence SEQ.  The sequence is supposed to contain one
++   jump, which has no effect in the cost.  */
++
++static unsigned int
++rtx_seq_cost (rtx seq)
++{
++  rtx one;
++  unsigned int nr_branches = 0;
++  unsigned int sum = 0, cost;
++
++  for (one = seq; one != NULL_RTX; one = NEXT_INSN (one))
++    if (JUMP_P (one))
++      nr_branches++;
++    else
++      {
++        cost = insn_rtx_cost (PATTERN (one), optimize_insn_for_speed_p ());
++        if (dump_file)
++          {
++            print_rtl_single (dump_file, one);
++            fprintf (dump_file, "cost: %u\n", cost);
++          }
++        sum += cost;
++      }
++
++  gcc_assert (nr_branches == 1);
++
++  if (dump_file)
++    fprintf (dump_file, "total cost: %u\n", sum);
++  return sum;
++}
++
++/* Generate the rtx sequences for 2 bit test expansion methods, measure the cost
++   and choose the cheapest.  */
++
++static unsigned int
++choose_case_bit_test_expand_method (rtx label)
++{
++  rtx seq, index;
++  unsigned int cost[2];
++  static bool method_known = false;
++  static unsigned int method;
++
++  /* If already known, return the method.  */
++  if (method_known)
++    return method;
++
++  index = gen_rtx_REG (word_mode, 10000);
++
++  for (method = 1; method <= 2; ++method)
++    {
++      start_sequence ();
++      emit_case_bit_test_jump (0, index, label, method, 0, 0x0f0f0f0f, 0,
++                               0x0f0f0f0f);
++      seq = get_insns ();
++      end_sequence ();
++      cost[method - 1] = rtx_seq_cost (seq);
++    }
++
++  /* Determine method based on heuristic.  */
++  method = ((cost[1] < cost[0]) ? 1 : 0) + 1;
++
++  /* Save and return method.  */
++  method_known = true;
++  return method;
++}
++
++/* Get the edge probability of the edge from SRC to LABEL_DECL.  */
++
++static int
++get_label_prob (basic_block src, tree label_decl)
++{
++  basic_block dest;
++  int prob = 0, nr_prob = 0;
++  unsigned int i;
++  edge e;
++
++  if (label_decl == NULL_TREE)
++    return 0;
++
++  dest = VEC_index (basic_block, label_to_block_map,
++                    LABEL_DECL_UID (label_decl));
++
++  for (i = 0; i < EDGE_COUNT (src->succs); ++i)
++    {
++      e = EDGE_SUCC (src, i);
++
++      if (e->dest != dest)
++        continue;
++
++      prob += e->probability;
++      nr_prob++;
++    }
++
++  gcc_assert (nr_prob == 1);
++
++  return prob;
++}
++
++/* Add probability note with scaled PROB to JUMP and update INV_SCALE.  This
++   function is intended to be used with a series of conditional jumps to L[i]
++   where the probabilities p[i] to get to L[i] are known, and the jump
++   probabilities j[i] need to be computed.
++
++   The algorithm to calculate the probabilities is
++
++   scale = REG_BR_PROB_BASE;
++   for (i = 0; i < n; ++i)
++     {
++       j[i] = p[i] * scale / REG_BR_PROB_BASE;
++       f[i] = REG_BR_PROB_BASE - j[i];
++       scale = scale / (f[i] / REG_BR_PROB_BASE);
++     }
++
++   The implementation uses inv_scale (REG_BR_PROB_BASE / scale) instead of
++   scale, because scale tends to grow bigger than REG_BR_PROB_BASE.  */
++
++static void
++set_jump_prob (rtx jump, int prob, int *inv_scale)
++{
++  /* j[i] = p[i] * scale / REG_BR_PROB_BASE.  */
++  int jump_prob = prob * REG_BR_PROB_BASE / *inv_scale;
++  /* f[i] = REG_BR_PROB_BASE - j[i].  */
++  int fallthrough_prob = REG_BR_PROB_BASE - jump_prob;
++
++  gcc_assert (jump_prob <= REG_BR_PROB_BASE);
++  add_reg_note (jump, REG_BR_PROB, GEN_INT (jump_prob));
++
++  /* scale = scale / (f[i] / REG_BR_PROB_BASE).  */
++  *inv_scale = *inv_scale * fallthrough_prob / REG_BR_PROB_BASE;
++}
++
++/* Set bit in hwi hi/lo pair.  */
++
++static void
++set_bit (HOST_WIDE_INT *hi, HOST_WIDE_INT *lo, unsigned int j)
++{
++  if (j >= HOST_BITS_PER_WIDE_INT)
++    *hi |= (HOST_WIDE_INT) 1 << (j - HOST_BITS_PER_INT);
++  else
++    *lo |= (HOST_WIDE_INT) 1 << j;
++}
++
+ /*  Expand a switch statement by a short sequence of bit-wise
+     comparisons.  "switch(x)" is effectively converted into
+-    "if ((1 << (x-MINVAL)) & CST)" where CST and MINVAL are
+-    integer constants.
++    "if ((1 << (x-MINVAL)) & CST)" or
++    "if (((bit_reverse (CST)) << (x-MINVAL)) < 0)", where CST
++    and MINVAL are integer constants.
+ 
+     INDEX_EXPR is the value being switched on, which is of
+     type INDEX_TYPE.  MINVAL is the lowest case value of in
+@@ -2165,14 +2352,17 @@ case_bit_test_cmp (const void *p1, const
+ 
+ static void
+ emit_case_bit_tests (tree index_type, tree index_expr, tree minval,
+-		     tree range, case_node_ptr nodes, rtx default_label)
++		     tree range, case_node_ptr nodes, tree default_label_decl,
++		     rtx default_label, basic_block bb)
+ {
+   struct case_bit_test test[MAX_CASE_BIT_TESTS];
+   enum machine_mode mode;
+   rtx expr, index, label;
+   unsigned int i,j,lo,hi;
+   struct case_node *n;
+-  unsigned int count;
++  unsigned int count, method;
++  int inv_scale = REG_BR_PROB_BASE;
++  int default_prob = get_label_prob (bb, default_label_decl);
+ 
+   count = 0;
+   for (n = nodes; n; n = n->right)
+@@ -2187,8 +2377,11 @@ emit_case_bit_tests (tree index_type, tr
+ 	  gcc_assert (count < MAX_CASE_BIT_TESTS);
+ 	  test[i].hi = 0;
+ 	  test[i].lo = 0;
++	  test[i].rev_hi = 0;
++	  test[i].rev_lo = 0;
+ 	  test[i].label = label;
+ 	  test[i].bits = 1;
++	  test[i].prob = get_label_prob (bb, n->code_label);
+ 	  count++;
+ 	}
+       else
+@@ -2199,10 +2392,11 @@ emit_case_bit_tests (tree index_type, tr
+       hi = tree_low_cst (fold_build2 (MINUS_EXPR, index_type,
+ 				      n->high, minval), 1);
+       for (j = lo; j <= hi; j++)
+-        if (j >= HOST_BITS_PER_WIDE_INT)
+-	  test[i].hi |= (HOST_WIDE_INT) 1 << (j - HOST_BITS_PER_INT);
+-	else
+-	  test[i].lo |= (HOST_WIDE_INT) 1 << j;
++        {
++          set_bit (&test[i].hi, &test[i].lo, j);
++          set_bit (&test[i].rev_hi, &test[i].rev_lo,
++                   GET_MODE_BITSIZE (word_mode) - j - 1);
++        }
+     }
+ 
+   qsort (test, count, sizeof(*test), case_bit_test_cmp);
+@@ -2216,20 +2410,20 @@ emit_case_bit_tests (tree index_type, tr
+   mode = TYPE_MODE (index_type);
+   expr = expand_normal (range);
+   if (default_label)
+-    emit_cmp_and_jump_insns (index, expr, GTU, NULL_RTX, mode, 1,
+-			     default_label);
++    {
++      emit_cmp_and_jump_insns (index, expr, GTU, NULL_RTX, mode, 1,
++                               default_label);
++      set_jump_prob (get_last_insn (), default_prob / 2, &inv_scale);
++    }
+ 
+   index = convert_to_mode (word_mode, index, 0);
+-  index = expand_binop (word_mode, ashl_optab, const1_rtx,
+-			index, NULL_RTX, 1, OPTAB_WIDEN);
+ 
++  method = choose_case_bit_test_expand_method (test[0].label);
+   for (i = 0; i < count; i++)
+     {
+-      expr = immed_double_const (test[i].lo, test[i].hi, word_mode);
+-      expr = expand_binop (word_mode, and_optab, index, expr,
+-			   NULL_RTX, 1, OPTAB_WIDEN);
+-      emit_cmp_and_jump_insns (expr, const0_rtx, NE, NULL_RTX,
+-			       word_mode, 1, test[i].label);
++      emit_case_bit_test_jump (i, index, test[i].label, method, test[i].hi,
++                               test[i].lo, test[i].rev_hi, test[i].rev_lo);
++      set_jump_prob (get_last_insn (), test[i].prob, &inv_scale);
+     }
+ 
+   if (default_label)
+@@ -2400,7 +2594,8 @@ expand_case (gimple stmt)
+ 	      range = maxval;
+ 	    }
+ 	  emit_case_bit_tests (index_type, index_expr, minval, range,
+-			       case_list, default_label);
++			       case_list, default_label_decl, default_label,
++			       gimple_bb (stmt));
+ 	}
+ 
+       /* If range of values is much bigger than number of values,
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/switch-bittest.c
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/switch-bittest.c
+@@ -0,0 +1,25 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-expand" } */
++
++const char *
++f (const char *p)
++{
++  while (1)
++    {
++      switch (*p)
++        {
++        case 9:
++        case 10:
++        case 13:
++        case 32:
++          break;
++        default:
++          return p;
++        }
++    }
++}
++
++/* { dg-final { scan-rtl-dump-times "jump_insn" 4 "expand" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "REG_BR_PROB" 2 "expand" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "lt " 1 "expand"  { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "expand" } } */
+Index: gcc-4_5-branch/gcc/testsuite/gcc.dg/switch-prob.c
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/testsuite/gcc.dg/switch-prob.c
+@@ -0,0 +1,25 @@
++/* { dg-do compile } */
++/* { dg-options "-O2 -fdump-rtl-expand" } */
++
++const char *
++f (const char *p)
++{
++  while (1)
++    {
++      switch (*p)
++        {
++        case 9:
++        case 10:
++        case 13:
++        case 32:
++          break;
++        default:
++          return p;
++        }
++    }
++}
++
++/* { dg-final { scan-rtl-dump-times "jump_insn" 4 "expand" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "REG_BR_PROB" 2 "expand" { target mips*-*-* } } } */
++/* { dg-final { scan-rtl-dump-times "heuristics" 0 "expand"  { target mips*-*-* } } } */
++/* { dg-final { cleanup-rtl-dump "expand" } } */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99474.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99474.patch
new file mode 100644
index 0000000000..9b0fb0b488
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99474.patch
@@ -0,0 +1,3346 @@
+2011-01-14  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* function.c (thread_prologue_and_epilogue_insns): Avoid uninitialized
+	variable.
+
+2011-01-12  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* config/s390/s390.c (s390_emit_epilogue): Don't use gen_rtx_RETURN.
+	* config/rx/rx.c (gen_rx_rtsd_vector): Likewise.
+	* config/m68hc11/m68hc11.md (return): Likewise.
+	* config/cris/cris.c (cris_expand_return): Likewise.
+	* config/m68k/m68k.c (m68k_expand_epilogue): Likewise.
+	* config/picochip/picochip.c (picochip_expand_epilogue): Likewise.
+	* config/h8300/h8300.c (h8300_push_pop, h8300_expand_epilogue):
+	Likewise.
+	* config/v850/v850.c (expand_epilogue): Likewise.
+	* config/bfin/bfin.c (bfin_expand_call): Likewise.
+
+2011-01-04  Catherine Moore  <clm@codesourcery.com>
+
+	gcc/
+	* config/rs6000/rs6000.c (rs6000_make_savres_rtx): Change
+	gen_rtx_RETURN to ret_rtx.
+	(rs6000_emit_epilogue): Likewise.
+	(rs6000_output_mi_thunk): Likewise.
+
+2011-01-03  Bernd Schmidt  <bernds@codesourcery.com>
+
+	gcc/
+	* doc/tm.texi (RETURN_ADDR_REGNUM): Document.
+	* doc/md.texi (simple_return): Document pattern.
+	(return): Add a sentence to clarify.
+	* doc/rtl.texi (simple_return): Document.
+	* doc/invoke.texi (Optimize Options): Document -fshrink-wrap.
+	* common.opt (fshrink-wrap): New.
+	* opts.c (decode_options): Set it for -O2 and above.
+	* gengenrtl.c (special_rtx): PC, CC0, RETURN and SIMPLE_RETURN
+	are special.
+	* rtl.h (ANY_RETURN_P): New macro.
+	(global_rtl_index): Add GR_RETURN and GR_SIMPLE_RETURN.
+	(ret_rtx, simple_return_rtx): New macros.
+	* genemit.c (gen_exp): RETURN and SIMPLE_RETURN have unique rtxs.
+	(gen_expand, gen_split): Use ANY_RETURN_P.
+	* rtl.c (copy_rtx): RETURN and SIMPLE_RETURN are shared.
+	* emit-rtl.c (verify_rtx_sharing): Likewise.
+	(skip_consecutive_labels): Return the argument if it is a return rtx.
+	(classify_insn): Handle both kinds of return.
+	(init_emit_regs): Create global rtl for ret_rtx and simple_return_rtx.
+	* df-scan.c (df_uses_record): Handle SIMPLE_RETURN.
+	* rtl.def (SIMPLE_RETURN): New.
+	* rtlanal.c (tablejump_p): Check JUMP_LABEL for returns.
+	* final.c (final_scan_insn): Recognize both kinds of return.
+	* reorg.c (function_return_label, function_simple_return_label): New
+	static variables.
+	(end_of_function_label): Remove.
+	(simplejump_or_return_p): New static function.
+	(find_end_label): Add a new arg, KIND.  All callers changed.
+	Depending on KIND, look for a label suitable for return or
+	simple_return.
+	(make_return_insns): Make corresponding changes.
+	(get_jump_flags): Check JUMP_LABELs for returns.
+	(follow_jumps): Likewise.
+	(get_branch_condition): Check target for return patterns rather
+	than NULL.
+	(own_thread_p): Likewise for thread.
+	(steal_delay_list_from_target): Check JUMP_LABELs for returns.
+	Use simplejump_or_return_p.
+	(fill_simple_delay_slots): Likewise.
+	(optimize_skip): Likewise.
+	(fill_slots_from_thread): Likewise.
+	(relax_delay_slots): Likewise.
+	(dbr_schedule): Adjust handling of end_of_function_label for the
+	two new variables.
+	* ifcvt.c (find_if_case_1): Take care when redirecting jumps to the
+	exit block.
+	(dead_or_predicable): Change NEW_DEST arg to DEST_EDGE.  All callers
+	changed.  Ensure that the right label is passed to redirect_jump.
+	* jump.c (condjump_p, condjump_in_parallel_p, any_condjump_p,
+	returnjump_p): Handle SIMPLE_RETURNs.
+	(delete_related_insns): Check JUMP_LABEL for returns.
+	(redirect_target): New static function.
+	(redirect_exp_1): Use it.  Handle any kind of return rtx as a label
+	rather than interpreting NULL as a return.
+	(redirect_jump_1): Assert that nlabel is not NULL.
+	(redirect_jump): Likewise.
+	(redirect_jump_2): Handle any kind of return rtx as a label rather
+	than interpreting NULL as a return.
+	* dwarf2out.c (compute_barrier_args_size_1): Check JUMP_LABEL for
+	returns.
+	* function.c (emit_return_into_block): Remove useless declaration.
+	(record_hard_reg_sets, frame_required_for_rtx, gen_return_pattern,
+	requires_stack_frame_p): New static functions.
+	(emit_return_into_block): New arg SIMPLE_P.  All callers changed.
+	Generate either kind of return pattern and update the JUMP_LABEL.
+	(thread_prologue_and_epilogue_insns): Implement a form of
+	shrink-wrapping.  Ensure JUMP_LABELs for return insns are set.
+	* print-rtl.c (print_rtx): Handle returns in JUMP_LABELs.
+	* cfglayout.c (fixup_reorder_chain): Ensure JUMP_LABELs for returns
+	remain correct.
+	* resource.c (find_dead_or_set_registers): Check JUMP_LABELs for
+	returns.
+	(mark_target_live_regs): Don't pass a return rtx to next_active_insn.
+	* basic-block.h (force_nonfallthru_and_redirect): Declare.
+	* sched-vis.c (print_pattern): Add case for SIMPLE_RETURN.
+	* cfgrtl.c (force_nonfallthru_and_redirect): No longer static.  New arg
+	JUMP_LABEL.  All callers changed.  Use the label when generating
+	return insns.
+
+	* config/i386/i386.md (returns, return_str, return_cond): New
+	code_iterator and corresponding code_attrs.
+	(<return_str>return): Renamed from return and adapted.
+	(<return_str>return_internal): Likewise for return_internal.
+	(<return_str>return_internal_long): Likewise for return_internal_long.
+	(<return_str>return_pop_internal): Likewise for return_pop_internal.
+	(<return_str>return_indirect_internal): Likewise for
+	return_indirect_internal.
+	* config/i386/i386.c (ix86_expand_epilogue): Expand a simple_return as
+	the last insn.
+	(ix86_pad_returns): Handle both kinds of return rtx.
+	* config/arm/arm.c (use_simple_return_p): new function.
+	(is_jump_table): Handle returns in JUMP_LABELs.
+	(output_return_instruction): New arg SIMPLE.  All callers changed.
+	Use it to determine which kind of return to generate.
+	(arm_final_prescan_insn): Handle both kinds of return.
+	* config/arm/arm.md (returns, return_str, return_simple_p,
+	return_cond): New code_iterator and corresponding code_attrs.
+	(<return_str>return): Renamed from return and adapted.
+	(arm_<return_str>return): Renamed from arm_return and adapted.
+	(cond_<return_str>return): Renamed from cond_return and adapted.
+	(cond_<return_str>return_inverted): Renamed from cond_return_inverted
+	and adapted.
+	(epilogue): Use ret_rtx instead of gen_rtx_RETURN.
+	* config/arm/thumb2.md (thumb2_<return_str>return): Renamed from
+	thumb2_return and adapted.
+	* config/arm/arm.h (RETURN_ADDR_REGNUM): Define.
+	* config/arm/arm-protos.h (use_simple_return_p): Declare.
+	(output_return_instruction): Adjust declaration.
+	* config/mips/mips.c (mips_expand_epilogue): Generate a simple_return
+	as final insn.
+	* config/mips/mips.md (simple_return): New expander.
+	(*simple_return, simple_return_internal): New patterns.
+	* config/sh/sh.c (barrier_align): Handle return in a JUMP_LABEL.
+	(split_branches): Don't pass a null label to redirect_jump.
+
+	From mainline:
+	* vec.h (FOR_EACH_VEC_ELT, FOR_EACH_VEC_ELT_REVERSE): New macros.
+	* haifa-sched.c (find_fallthru_edge_from): Rename from
+	find_fallthru_edge.  All callers changed.
+	* sched-int.h (find_fallthru_edge_from): Rename declaration as well.
+	* basic-block.h (find_fallthru_edge): New inline function.
+
+=== modified file 'gcc/basic-block.h'
+Index: gcc-4_5-branch/gcc/basic-block.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/basic-block.h
++++ gcc-4_5-branch/gcc/basic-block.h
+@@ -884,6 +884,7 @@ extern void flow_edge_list_print (const 
+ 
+ /* In cfgrtl.c  */
+ extern basic_block force_nonfallthru (edge);
++extern basic_block force_nonfallthru_and_redirect (edge, basic_block, rtx);
+ extern rtx block_label (basic_block);
+ extern bool purge_all_dead_edges (void);
+ extern bool purge_dead_edges (basic_block);
+@@ -1004,6 +1005,20 @@ bb_has_abnormal_pred (basic_block bb)
+   return false;
+ }
+ 
++/* Return the fallthru edge in EDGES if it exists, NULL otherwise.  */
++static inline edge
++find_fallthru_edge (VEC(edge,gc) *edges)
++{
++  edge e;
++  edge_iterator ei;
++
++  FOR_EACH_EDGE (e, ei, edges)
++    if (e->flags & EDGE_FALLTHRU)
++      break;
++
++  return e;
++}
++
+ /* In cfgloopmanip.c.  */
+ extern edge mfb_kj_edge;
+ extern bool mfb_keep_just (edge);
+Index: gcc-4_5-branch/gcc/cfganal.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/cfganal.c
++++ gcc-4_5-branch/gcc/cfganal.c
+@@ -271,6 +271,37 @@ set_edge_can_fallthru_flag (void)
+       EDGE_SUCC (bb, 0)->flags |= EDGE_CAN_FALLTHRU;
+       EDGE_SUCC (bb, 1)->flags |= EDGE_CAN_FALLTHRU;
+     }
++  /* dwarf2out expects that a NOTE_INSN_EPILOGUE_BEGIN is always paired
++     with a return or a sibcall.  Ensure that this remains the case if
++     they are in different basic blocks.  */
++  FOR_EACH_BB (bb)
++    {
++      edge e;
++      edge_iterator ei;
++      rtx insn, end;
++
++      end = BB_END (bb);
++      FOR_BB_INSNS (bb, insn)
++	if (GET_CODE (insn) == NOTE
++	    && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG
++	    && !(CALL_P (end) && SIBLING_CALL_P (end))
++	    && !returnjump_p (end))
++	  {
++	    basic_block other_bb = NULL;
++	    FOR_EACH_EDGE (e, ei, bb->succs)
++	      {
++		if (e->flags & EDGE_FALLTHRU)
++		  other_bb = e->dest;
++		else
++		  e->flags &= ~EDGE_CAN_FALLTHRU;
++	      }
++	    FOR_EACH_EDGE (e, ei, other_bb->preds)
++	      {
++		if (!(e->flags & EDGE_FALLTHRU))
++		  e->flags &= ~EDGE_CAN_FALLTHRU;
++	      }	    
++	  }
++    }
+ }
+ 
+ /* Find unreachable blocks.  An unreachable block will have 0 in
+Index: gcc-4_5-branch/gcc/cfglayout.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/cfglayout.c
++++ gcc-4_5-branch/gcc/cfglayout.c
+@@ -766,6 +766,7 @@ fixup_reorder_chain (void)
+     {
+       edge e_fall, e_taken, e;
+       rtx bb_end_insn;
++      rtx ret_label = NULL_RTX;
+       basic_block nb;
+       edge_iterator ei;
+ 
+@@ -785,6 +786,7 @@ fixup_reorder_chain (void)
+       bb_end_insn = BB_END (bb);
+       if (JUMP_P (bb_end_insn))
+ 	{
++	  ret_label = JUMP_LABEL (bb_end_insn);
+ 	  if (any_condjump_p (bb_end_insn))
+ 	    {
+ 	      /* This might happen if the conditional jump has side
+@@ -899,7 +901,7 @@ fixup_reorder_chain (void)
+ 	}
+ 
+       /* We got here if we need to add a new jump insn.  */
+-      nb = force_nonfallthru (e_fall);
++      nb = force_nonfallthru_and_redirect (e_fall, e_fall->dest, ret_label);
+       if (nb)
+ 	{
+ 	  nb->il.rtl->visited = 1;
+@@ -1118,24 +1120,30 @@ extern bool cfg_layout_can_duplicate_bb_
+ bool
+ cfg_layout_can_duplicate_bb_p (const_basic_block bb)
+ {
++  rtx insn;
++
+   /* Do not attempt to duplicate tablejumps, as we need to unshare
+      the dispatch table.  This is difficult to do, as the instructions
+      computing jump destination may be hoisted outside the basic block.  */
+   if (tablejump_p (BB_END (bb), NULL, NULL))
+     return false;
+ 
+-  /* Do not duplicate blocks containing insns that can't be copied.  */
+-  if (targetm.cannot_copy_insn_p)
++  insn = BB_HEAD (bb);
++  while (1)
+     {
+-      rtx insn = BB_HEAD (bb);
+-      while (1)
+-	{
+-	  if (INSN_P (insn) && targetm.cannot_copy_insn_p (insn))
+-	    return false;
+-	  if (insn == BB_END (bb))
+-	    break;
+-	  insn = NEXT_INSN (insn);
+-	}
++      /* Do not duplicate blocks containing insns that can't be copied.  */
++      if (INSN_P (insn) && targetm.cannot_copy_insn_p
++	  && targetm.cannot_copy_insn_p (insn))
++	return false;
++      /* dwarf2out expects that these notes are always paired with a
++	 returnjump or sibling call.  */
++      if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG
++	  && !returnjump_p (BB_END (bb))
++	  && (!CALL_P (BB_END (bb)) || !SIBLING_CALL_P (BB_END (bb))))
++	return false;
++      if (insn == BB_END (bb))
++	break;
++      insn = NEXT_INSN (insn);
+     }
+ 
+   return true;
+@@ -1180,6 +1188,9 @@ duplicate_insn_chain (rtx from, rtx to)
+ 	      break;
+ 	    }
+ 	  copy = emit_copy_of_insn_after (insn, get_last_insn ());
++	  if (JUMP_P (insn) && JUMP_LABEL (insn) != NULL_RTX
++	      && ANY_RETURN_P (JUMP_LABEL (insn)))
++	    JUMP_LABEL (copy) = JUMP_LABEL (insn);
+           maybe_copy_epilogue_insn (insn, copy);
+ 	  break;
+ 
+Index: gcc-4_5-branch/gcc/cfgrtl.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/cfgrtl.c
++++ gcc-4_5-branch/gcc/cfgrtl.c
+@@ -1107,10 +1107,13 @@ rtl_redirect_edge_and_branch (edge e, ba
+ }
+ 
+ /* Like force_nonfallthru below, but additionally performs redirection
+-   Used by redirect_edge_and_branch_force.  */
++   Used by redirect_edge_and_branch_force.  JUMP_LABEL is used only
++   when redirecting to the EXIT_BLOCK, it is either a return or a
++   simple_return rtx indicating which kind of returnjump to create.
++   It should be NULL otherwise.  */
+ 
+-static basic_block
+-force_nonfallthru_and_redirect (edge e, basic_block target)
++basic_block
++force_nonfallthru_and_redirect (edge e, basic_block target, rtx jump_label)
+ {
+   basic_block jump_block, new_bb = NULL, src = e->src;
+   rtx note;
+@@ -1242,11 +1245,25 @@ force_nonfallthru_and_redirect (edge e, 
+   e->flags &= ~EDGE_FALLTHRU;
+   if (target == EXIT_BLOCK_PTR)
+     {
++      if (jump_label == ret_rtx)
++	{
+ #ifdef HAVE_return
+-	emit_jump_insn_after_setloc (gen_return (), BB_END (jump_block), loc);
++	  emit_jump_insn_after_setloc (gen_return (), BB_END (jump_block),
++				       loc);
+ #else
+-	gcc_unreachable ();
++	  gcc_unreachable ();
+ #endif
++	}
++      else
++	{
++	  gcc_assert (jump_label == simple_return_rtx);
++#ifdef HAVE_simple_return
++	  emit_jump_insn_after_setloc (gen_simple_return (),
++				       BB_END (jump_block), loc);
++#else
++	  gcc_unreachable ();
++#endif
++	}
+     }
+   else
+     {
+@@ -1273,7 +1290,7 @@ force_nonfallthru_and_redirect (edge e, 
+ basic_block
+ force_nonfallthru (edge e)
+ {
+-  return force_nonfallthru_and_redirect (e, e->dest);
++  return force_nonfallthru_and_redirect (e, e->dest, NULL_RTX);
+ }
+ 
+ /* Redirect edge even at the expense of creating new jump insn or
+@@ -1290,7 +1307,7 @@ rtl_redirect_edge_and_branch_force (edge
+   /* In case the edge redirection failed, try to force it to be non-fallthru
+      and redirect newly created simplejump.  */
+   df_set_bb_dirty (e->src);
+-  return force_nonfallthru_and_redirect (e, target);
++  return force_nonfallthru_and_redirect (e, target, NULL_RTX);
+ }
+ 
+ /* The given edge should potentially be a fallthru edge.  If that is in
+Index: gcc-4_5-branch/gcc/common.opt
+===================================================================
+--- gcc-4_5-branch.orig/gcc/common.opt
++++ gcc-4_5-branch/gcc/common.opt
+@@ -1147,6 +1147,11 @@ fshow-column
+ Common C ObjC C++ ObjC++ Report Var(flag_show_column) Init(1)
+ Show column numbers in diagnostics, when available.  Default on
+ 
++fshrink-wrap
++Common Report Var(flag_shrink_wrap) Optimization
++Emit function prologues only before parts of the function that need it,
++rather than at the top of the function.
++
+ fsignaling-nans
+ Common Report Var(flag_signaling_nans) Optimization
+ Disable optimizations observable by IEEE signaling NaNs
+Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h
++++ gcc-4_5-branch/gcc/config/arm/arm-protos.h
+@@ -26,6 +26,7 @@
+ extern void arm_override_options (void);
+ extern void arm_optimization_options (int, int);
+ extern int use_return_insn (int, rtx);
++extern bool use_simple_return_p (void);
+ extern enum reg_class arm_regno_class (int);
+ extern void arm_load_pic_register (unsigned long);
+ extern int arm_volatile_func (void);
+@@ -137,7 +138,7 @@ extern int arm_address_offset_is_imm (rt
+ extern const char *output_add_immediate (rtx *);
+ extern const char *arithmetic_instr (rtx, int);
+ extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
+-extern const char *output_return_instruction (rtx, int, int);
++extern const char *output_return_instruction (rtx, bool, bool, bool);
+ extern void arm_poke_function_name (FILE *, const char *);
+ extern void arm_print_operand (FILE *, rtx, int);
+ extern void arm_print_operand_address (FILE *, rtx);
+Index: gcc-4_5-branch/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.c
++++ gcc-4_5-branch/gcc/config/arm/arm.c
+@@ -2163,6 +2163,18 @@ arm_trampoline_adjust_address (rtx addr)
+   return addr;
+ }
+ 
++/* Return true if we should try to use a simple_return insn, i.e. perform
++   shrink-wrapping if possible.  This is the case if we need to emit a
++   prologue, which we can test by looking at the offsets.  */
++bool
++use_simple_return_p (void)
++{
++  arm_stack_offsets *offsets;
++
++  offsets = arm_get_frame_offsets ();
++  return offsets->outgoing_args != 0;
++}
++
+ /* Return 1 if it is possible to return using a single instruction.
+    If SIBLING is non-null, this is a test for a return before a sibling
+    call.  SIBLING is the call insn, so we can examine its register usage.  */
+@@ -11284,6 +11296,7 @@ is_jump_table (rtx insn)
+ 
+   if (GET_CODE (insn) == JUMP_INSN
+       && JUMP_LABEL (insn) != NULL
++      && !ANY_RETURN_P (JUMP_LABEL (insn))
+       && ((table = next_real_insn (JUMP_LABEL (insn)))
+ 	  == next_real_insn (insn))
+       && table != NULL
+@@ -14168,7 +14181,7 @@ arm_get_vfp_saved_size (void)
+ /* Generate a function exit sequence.  If REALLY_RETURN is false, then do
+    everything bar the final return instruction.  */
+ const char *
+-output_return_instruction (rtx operand, int really_return, int reverse)
++output_return_instruction (rtx operand, bool really_return, bool reverse, bool simple)
+ {
+   char conditional[10];
+   char instr[100];
+@@ -14206,10 +14219,15 @@ output_return_instruction (rtx operand, 
+ 
+   sprintf (conditional, "%%?%%%c0", reverse ? 'D' : 'd');
+ 
+-  cfun->machine->return_used_this_function = 1;
++  if (simple)
++    live_regs_mask = 0;
++  else
++    {
++      cfun->machine->return_used_this_function = 1;
+ 
+-  offsets = arm_get_frame_offsets ();
+-  live_regs_mask = offsets->saved_regs_mask;
++      offsets = arm_get_frame_offsets ();
++      live_regs_mask = offsets->saved_regs_mask;
++    }
+ 
+   if (live_regs_mask)
+     {
+@@ -17108,6 +17126,7 @@ arm_final_prescan_insn (rtx insn)
+ 
+   /* If we start with a return insn, we only succeed if we find another one.  */
+   int seeking_return = 0;
++  enum rtx_code return_code = UNKNOWN;
+ 
+   /* START_INSN will hold the insn from where we start looking.  This is the
+      first insn after the following code_label if REVERSE is true.  */
+@@ -17146,7 +17165,7 @@ arm_final_prescan_insn (rtx insn)
+ 	  else
+ 	    return;
+ 	}
+-      else if (GET_CODE (body) == RETURN)
++      else if (ANY_RETURN_P (body))
+         {
+ 	  start_insn = next_nonnote_insn (start_insn);
+ 	  if (GET_CODE (start_insn) == BARRIER)
+@@ -17157,6 +17176,7 @@ arm_final_prescan_insn (rtx insn)
+ 	    {
+ 	      reverse = TRUE;
+ 	      seeking_return = 1;
++	      return_code = GET_CODE (body);
+ 	    }
+ 	  else
+ 	    return;
+@@ -17197,11 +17217,15 @@ arm_final_prescan_insn (rtx insn)
+ 	  label = XEXP (XEXP (SET_SRC (body), 2), 0);
+ 	  then_not_else = FALSE;
+ 	}
+-      else if (GET_CODE (XEXP (SET_SRC (body), 1)) == RETURN)
+-	seeking_return = 1;
+-      else if (GET_CODE (XEXP (SET_SRC (body), 2)) == RETURN)
++      else if (ANY_RETURN_P (XEXP (SET_SRC (body), 1)))
++	{
++	  seeking_return = 1;
++	  return_code = GET_CODE (XEXP (SET_SRC (body), 1));
++	}
++      else if (ANY_RETURN_P (XEXP (SET_SRC (body), 2)))
+         {
+ 	  seeking_return = 1;
++	  return_code = GET_CODE (XEXP (SET_SRC (body), 2));
+ 	  then_not_else = FALSE;
+         }
+       else
+@@ -17302,8 +17326,7 @@ arm_final_prescan_insn (rtx insn)
+ 		       && !use_return_insn (TRUE, NULL)
+ 		       && !optimize_size)
+ 		fail = TRUE;
+-	      else if (GET_CODE (scanbody) == RETURN
+-		       && seeking_return)
++	      else if (GET_CODE (scanbody) == return_code)
+ 	        {
+ 		  arm_ccfsm_state = 2;
+ 		  succeed = TRUE;
+Index: gcc-4_5-branch/gcc/config/arm/arm.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.h
++++ gcc-4_5-branch/gcc/config/arm/arm.h
+@@ -2622,6 +2622,8 @@ extern int making_const_table;
+ #define RETURN_ADDR_RTX(COUNT, FRAME) \
+   arm_return_addr (COUNT, FRAME)
+ 
++#define RETURN_ADDR_REGNUM LR_REGNUM
++
+ /* Mask of the bits in the PC that contain the real return address
+    when running in 26-bit mode.  */
+ #define RETURN_ADDR_MASK26 (0x03fffffc)
+Index: gcc-4_5-branch/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.md
++++ gcc-4_5-branch/gcc/config/arm/arm.md
+@@ -8882,66 +8882,72 @@
+   [(set_attr "type" "call")]
+ )
+ 
+-(define_expand "return"
+-  [(return)]
+-  "TARGET_32BIT && USE_RETURN_INSN (FALSE)"
++;; Both kinds of return insn.
++(define_code_iterator returns [return simple_return])
++(define_code_attr return_str [(return "") (simple_return "simple_")])
++(define_code_attr return_simple_p [(return "false") (simple_return "true")])
++(define_code_attr return_cond [(return " && USE_RETURN_INSN (FALSE)")
++			       (simple_return " && use_simple_return_p ()")])
++
++(define_expand "<return_str>return"
++  [(returns)]
++  "TARGET_32BIT<return_cond>"
+   "")
+ 
+-;; Often the return insn will be the same as loading from memory, so set attr
+-(define_insn "*arm_return"
+-  [(return)]
+-  "TARGET_ARM && USE_RETURN_INSN (FALSE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (const_true_rtx, TRUE, FALSE);
+-  }"
++(define_insn "*arm_<return_str>return"
++  [(returns)]
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (const_true_rtx, true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "type" "load1")
+    (set_attr "length" "12")
+    (set_attr "predicable" "yes")]
+ )
+ 
+-(define_insn "*cond_return"
++(define_insn "*cond_<return_str>return"
+   [(set (pc)
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+-                      (return)
++                      (returns)
+                       (pc)))]
+-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (operands[0], TRUE, FALSE);
+-  }"
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (operands[0], true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "conds" "use")
+    (set_attr "length" "12")
+    (set_attr "type" "load1")]
+ )
+ 
+-(define_insn "*cond_return_inverted"
++(define_insn "*cond_<return_str>return_inverted"
+   [(set (pc)
+         (if_then_else (match_operator 0 "arm_comparison_operator"
+ 		       [(match_operand 1 "cc_register" "") (const_int 0)])
+                       (pc)
+-		      (return)))]
+-  "TARGET_ARM && USE_RETURN_INSN (TRUE)"
+-  "*
+-  {
+-    if (arm_ccfsm_state == 2)
+-      {
+-        arm_ccfsm_state += 2;
+-        return \"\";
+-      }
+-    return output_return_instruction (operands[0], TRUE, TRUE);
+-  }"
++		      (returns)))]
++  "TARGET_ARM<return_cond>"
++{
++  if (arm_ccfsm_state == 2)
++    {
++      arm_ccfsm_state += 2;
++      return "";
++    }
++  return output_return_instruction (operands[0], true, true,
++				    <return_simple_p>);
++}
+   [(set_attr "conds" "use")
+    (set_attr "length" "12")
+    (set_attr "type" "load1")]
+@@ -10809,8 +10815,7 @@
+       DONE;
+     }
+   emit_jump_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode,
+-	gen_rtvec (1,
+-		gen_rtx_RETURN (VOIDmode)),
++	gen_rtvec (1, ret_rtx),
+ 	VUNSPEC_EPILOGUE));
+   DONE;
+   "
+@@ -10827,7 +10832,7 @@
+   "TARGET_32BIT"
+   "*
+   if (use_return_insn (FALSE, next_nonnote_insn (insn)))
+-    return output_return_instruction (const_true_rtx, FALSE, FALSE);
++    return output_return_instruction (const_true_rtx, false, false, false);
+   return arm_output_epilogue (next_nonnote_insn (insn));
+   "
+ ;; Length is absolute worst case
+Index: gcc-4_5-branch/gcc/config/arm/thumb2.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/thumb2.md
++++ gcc-4_5-branch/gcc/config/arm/thumb2.md
+@@ -1020,16 +1020,15 @@
+ 
+ ;; Note: this is not predicable, to avoid issues with linker-generated
+ ;; interworking stubs.
+-(define_insn "*thumb2_return"
+-  [(return)]
+-  "TARGET_THUMB2 && USE_RETURN_INSN (FALSE)"
+-  "*
+-  {
+-    return output_return_instruction (const_true_rtx, TRUE, FALSE);
+-  }"
++(define_insn "*thumb2_<return_str>return"
++  [(returns)]
++  "TARGET_THUMB2<return_cond>"
++{
++  return output_return_instruction (const_true_rtx, true, false,
++				    <return_simple_p>);
++}
+   [(set_attr "type" "load1")
+-   (set_attr "length" "12")]
+-)
++   (set_attr "length" "12")])
+ 
+ (define_insn_and_split "thumb2_eh_return"
+   [(unspec_volatile [(match_operand:SI 0 "s_register_operand" "r")]
+Index: gcc-4_5-branch/gcc/config/bfin/bfin.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/bfin/bfin.c
++++ gcc-4_5-branch/gcc/config/bfin/bfin.c
+@@ -2359,7 +2359,7 @@ bfin_expand_call (rtx retval, rtx fnaddr
+     XVECEXP (pat, 0, n++) = gen_rtx_USE (VOIDmode, picreg);
+   XVECEXP (pat, 0, n++) = gen_rtx_USE (VOIDmode, cookie);
+   if (sibcall)
+-    XVECEXP (pat, 0, n++) = gen_rtx_RETURN (VOIDmode);
++    XVECEXP (pat, 0, n++) = ret_rtx;
+   else
+     XVECEXP (pat, 0, n++) = gen_rtx_CLOBBER (VOIDmode, retsreg);
+   call = emit_call_insn (pat);
+Index: gcc-4_5-branch/gcc/config/cris/cris.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/cris/cris.c
++++ gcc-4_5-branch/gcc/config/cris/cris.c
+@@ -1771,7 +1771,7 @@ cris_expand_return (bool on_stack)
+      we do that until they're fixed.  Currently, all return insns in a
+      function must be the same (not really a limiting factor) so we need
+      to check that it doesn't change half-way through.  */
+-  emit_jump_insn (gen_rtx_RETURN (VOIDmode));
++  emit_jump_insn (ret_rtx);
+ 
+   CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_RET || !on_stack);
+   CRIS_ASSERT (cfun->machine->return_type != CRIS_RETINSN_JUMP || on_stack);
+Index: gcc-4_5-branch/gcc/config/h8300/h8300.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/h8300/h8300.c
++++ gcc-4_5-branch/gcc/config/h8300/h8300.c
+@@ -691,7 +691,7 @@ h8300_push_pop (int regno, int nregs, bo
+   /* Add the return instruction.  */
+   if (return_p)
+     {
+-      RTVEC_ELT (vec, i) = gen_rtx_RETURN (VOIDmode);
++      RTVEC_ELT (vec, i) = ret_rtx;
+       i++;
+     }
+ 
+@@ -975,7 +975,7 @@ h8300_expand_epilogue (void)
+     }
+ 
+   if (!returned_p)
+-    emit_jump_insn (gen_rtx_RETURN (VOIDmode));
++    emit_jump_insn (ret_rtx);
+ }
+ 
+ /* Return nonzero if the current function is an interrupt
+Index: gcc-4_5-branch/gcc/config/i386/i386.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/i386/i386.c
++++ gcc-4_5-branch/gcc/config/i386/i386.c
+@@ -9308,13 +9308,13 @@ ix86_expand_epilogue (int style)
+ 
+ 	  pro_epilogue_adjust_stack (stack_pointer_rtx, stack_pointer_rtx,
+ 				     popc, -1, true);
+-	  emit_jump_insn (gen_return_indirect_internal (ecx));
++	  emit_jump_insn (gen_simple_return_indirect_internal (ecx));
+ 	}
+       else
+-	emit_jump_insn (gen_return_pop_internal (popc));
++	emit_jump_insn (gen_simple_return_pop_internal (popc));
+     }
+   else
+-    emit_jump_insn (gen_return_internal ());
++    emit_jump_insn (gen_simple_return_internal ());
+ 
+   /* Restore the state back to the state from the prologue,
+      so that it's correct for the next epilogue.  */
+@@ -26615,7 +26615,7 @@ ix86_pad_returns (void)
+       rtx prev;
+       bool replace = false;
+ 
+-      if (!JUMP_P (ret) || GET_CODE (PATTERN (ret)) != RETURN
++      if (!JUMP_P (ret) || !ANY_RETURN_P (PATTERN (ret))
+ 	  || optimize_bb_for_size_p (bb))
+ 	continue;
+       for (prev = PREV_INSN (ret); prev; prev = PREV_INSN (prev))
+@@ -26645,7 +26645,10 @@ ix86_pad_returns (void)
+ 	}
+       if (replace)
+ 	{
+-	  emit_jump_insn_before (gen_return_internal_long (), ret);
++	  if (PATTERN (ret) == ret_rtx)
++	    emit_jump_insn_before (gen_return_internal_long (), ret);
++	  else
++	    emit_jump_insn_before (gen_simple_return_internal_long (), ret);
+ 	  delete_insn (ret);
+ 	}
+     }
+Index: gcc-4_5-branch/gcc/config/i386/i386.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/i386/i386.md
++++ gcc-4_5-branch/gcc/config/i386/i386.md
+@@ -13798,24 +13798,29 @@
+   ""
+   [(set_attr "length" "0")])
+ 
++(define_code_iterator returns [return simple_return])
++(define_code_attr return_str [(return "") (simple_return "simple_")])
++(define_code_attr return_cond [(return "ix86_can_use_return_insn_p ()")
++			       (simple_return "")])
++
+ ;; Insn emitted into the body of a function to return from a function.
+ ;; This is only done if the function's epilogue is known to be simple.
+ ;; See comments for ix86_can_use_return_insn_p in i386.c.
+ 
+-(define_expand "return"
+-  [(return)]
+-  "ix86_can_use_return_insn_p ()"
++(define_expand "<return_str>return"
++  [(returns)]
++  "<return_cond>"
+ {
+   if (crtl->args.pops_args)
+     {
+       rtx popc = GEN_INT (crtl->args.pops_args);
+-      emit_jump_insn (gen_return_pop_internal (popc));
++      emit_jump_insn (gen_<return_str>return_pop_internal (popc));
+       DONE;
+     }
+ })
+ 
+-(define_insn "return_internal"
+-  [(return)]
++(define_insn "<return_str>return_internal"
++  [(returns)]
+   "reload_completed"
+   "ret"
+   [(set_attr "length" "1")
+@@ -13826,8 +13831,8 @@
+ ;; Used by x86_machine_dependent_reorg to avoid penalty on single byte RET
+ ;; instruction Athlon and K8 have.
+ 
+-(define_insn "return_internal_long"
+-  [(return)
++(define_insn "<return_str>return_internal_long"
++  [(returns)
+    (unspec [(const_int 0)] UNSPEC_REP)]
+   "reload_completed"
+   "rep\;ret"
+@@ -13837,8 +13842,8 @@
+    (set_attr "prefix_rep" "1")
+    (set_attr "modrm" "0")])
+ 
+-(define_insn "return_pop_internal"
+-  [(return)
++(define_insn "<return_str>return_pop_internal"
++  [(returns)
+    (use (match_operand:SI 0 "const_int_operand" ""))]
+   "reload_completed"
+   "ret\t%0"
+@@ -13847,8 +13852,8 @@
+    (set_attr "length_immediate" "2")
+    (set_attr "modrm" "0")])
+ 
+-(define_insn "return_indirect_internal"
+-  [(return)
++(define_insn "<return_str>return_indirect_internal"
++  [(returns)
+    (use (match_operand:SI 0 "register_operand" "r"))]
+   "reload_completed"
+   "jmp\t%A0"
+Index: gcc-4_5-branch/gcc/config/m68hc11/m68hc11.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/m68hc11/m68hc11.md
++++ gcc-4_5-branch/gcc/config/m68hc11/m68hc11.md
+@@ -6576,7 +6576,7 @@
+   if (ret_size && ret_size <= 2)
+     {
+       emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
+-		      gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
++		      gen_rtvec (2, ret_rtx,
+ 			         gen_rtx_USE (VOIDmode,
+ 					      gen_rtx_REG (HImode, 1)))));
+       DONE;
+@@ -6584,7 +6584,7 @@
+   if (ret_size)
+     {
+       emit_jump_insn (gen_rtx_PARALLEL (VOIDmode,
+-		      gen_rtvec (2, gen_rtx_RETURN (VOIDmode),
++		      gen_rtvec (2, ret_rtx,
+ 			         gen_rtx_USE (VOIDmode,
+ 					      gen_rtx_REG (SImode, 0)))));
+       DONE;
+Index: gcc-4_5-branch/gcc/config/m68k/m68k.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/m68k/m68k.c
++++ gcc-4_5-branch/gcc/config/m68k/m68k.c
+@@ -1366,7 +1366,7 @@ m68k_expand_epilogue (bool sibcall_p)
+ 			   EH_RETURN_STACKADJ_RTX));
+ 
+   if (!sibcall_p)
+-    emit_jump_insn (gen_rtx_RETURN (VOIDmode));
++    emit_jump_insn (ret_rtx);
+ }
+ 
+ /* Return true if X is a valid comparison operator for the dbcc 
+Index: gcc-4_5-branch/gcc/config/mips/mips.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/mips/mips.c
++++ gcc-4_5-branch/gcc/config/mips/mips.c
+@@ -10497,7 +10497,8 @@ mips_expand_epilogue (bool sibcall_p)
+ 	    regno = GP_REG_FIRST + 7;
+ 	  else
+ 	    regno = RETURN_ADDR_REGNUM;
+-	  emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, regno)));
++	  emit_jump_insn (gen_simple_return_internal (gen_rtx_REG (Pmode,
++								   regno)));
+ 	}
+     }
+ 
+Index: gcc-4_5-branch/gcc/config/mips/mips.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/mips/mips.md
++++ gcc-4_5-branch/gcc/config/mips/mips.md
+@@ -5815,6 +5815,18 @@
+   [(set_attr "type"	"jump")
+    (set_attr "mode"	"none")])
+ 
++(define_expand "simple_return"
++  [(simple_return)]
++  "!mips_can_use_return_insn ()"
++  { mips_expand_before_return (); })
++
++(define_insn "*simple_return"
++  [(simple_return)]
++  "!mips_can_use_return_insn ()"
++  "%*j\t$31%/"
++  [(set_attr "type"	"jump")
++   (set_attr "mode"	"none")])
++
+ ;; Normal return.
+ 
+ (define_insn "return_internal"
+@@ -5825,6 +5837,14 @@
+   [(set_attr "type"	"jump")
+    (set_attr "mode"	"none")])
+ 
++(define_insn "simple_return_internal"
++  [(simple_return)
++   (use (match_operand 0 "pmode_register_operand" ""))]
++  ""
++  "%*j\t%0%/"
++  [(set_attr "type"	"jump")
++   (set_attr "mode"	"none")])
++
+ ;; Exception return.
+ (define_insn "mips_eret"
+   [(return)
+Index: gcc-4_5-branch/gcc/config/picochip/picochip.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/picochip/picochip.c
++++ gcc-4_5-branch/gcc/config/picochip/picochip.c
+@@ -1996,7 +1996,7 @@ picochip_expand_epilogue (int is_sibling
+     rtvec p;
+     p = rtvec_alloc (2);
+ 
+-    RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
++    RTVEC_ELT (p, 0) = ret_rtx;
+     RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode,
+ 				    gen_rtx_REG (Pmode, LINK_REGNUM));
+     emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
+Index: gcc-4_5-branch/gcc/config/rs6000/rs6000.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/rs6000/rs6000.c
++++ gcc-4_5-branch/gcc/config/rs6000/rs6000.c
+@@ -18563,7 +18563,7 @@ rs6000_make_savres_rtx (rs6000_stack_t *
+   p = rtvec_alloc ((lr ? 4 : 3) + n_regs);
+ 
+   if (!savep && lr)
+-    RTVEC_ELT (p, offset++) = gen_rtx_RETURN (VOIDmode);
++    RTVEC_ELT (p, offset++) = ret_rtx;
+ 
+   RTVEC_ELT (p, offset++)
+     = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (Pmode, 65));
+@@ -19638,7 +19638,7 @@ rs6000_emit_epilogue (int sibcall)
+       alloc_rname = ggc_strdup (rname);
+ 
+       j = 0;
+-      RTVEC_ELT (p, j++) = gen_rtx_RETURN (VOIDmode);
++      RTVEC_ELT (p, j++) = ret_rtx;
+       RTVEC_ELT (p, j++) = gen_rtx_USE (VOIDmode,
+ 					gen_rtx_REG (Pmode,
+ 						     LR_REGNO));
+@@ -20254,7 +20254,7 @@ rs6000_emit_epilogue (int sibcall)
+       else
+ 	p = rtvec_alloc (2);
+ 
+-      RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
++      RTVEC_ELT (p, 0) = ret_rtx;
+       RTVEC_ELT (p, 1) = ((restoring_FPRs_inline || !lr)
+ 			  ? gen_rtx_USE (VOIDmode, gen_rtx_REG (Pmode, 65))
+ 			  : gen_rtx_CLOBBER (VOIDmode,
+@@ -20695,7 +20695,7 @@ rs6000_output_mi_thunk (FILE *file, tree
+ 			gen_rtx_USE (VOIDmode,
+ 				     gen_rtx_REG (SImode,
+ 						  LR_REGNO)),
+-			gen_rtx_RETURN (VOIDmode))));
++			ret_rtx)));
+   SIBLING_CALL_P (insn) = 1;
+   emit_barrier ();
+ 
+Index: gcc-4_5-branch/gcc/config/rx/rx.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/rx/rx.c
++++ gcc-4_5-branch/gcc/config/rx/rx.c
+@@ -1562,7 +1562,7 @@ gen_rx_rtsd_vector (unsigned int adjust,
+ 				: plus_constant (stack_pointer_rtx,
+ 						 i * UNITS_PER_WORD)));
+ 
+-  XVECEXP (vector, 0, count - 1) = gen_rtx_RETURN (VOIDmode);
++  XVECEXP (vector, 0, count - 1) = ret_rtx;
+ 
+   return vector;
+ }
+Index: gcc-4_5-branch/gcc/config/s390/s390.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/s390/s390.c
++++ gcc-4_5-branch/gcc/config/s390/s390.c
+@@ -8170,7 +8170,7 @@ s390_emit_epilogue (bool sibcall)
+ 
+       p = rtvec_alloc (2);
+ 
+-      RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
++      RTVEC_ELT (p, 0) = ret_rtx;
+       RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
+       emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
+     }
+Index: gcc-4_5-branch/gcc/config/sh/sh.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/sh/sh.c
++++ gcc-4_5-branch/gcc/config/sh/sh.c
+@@ -5252,7 +5252,8 @@ barrier_align (rtx barrier_or_label)
+ 	}
+       if (prev
+ 	  && JUMP_P (prev)
+-	  && JUMP_LABEL (prev))
++	  && JUMP_LABEL (prev)
++	  && !ANY_RETURN_P (JUMP_LABEL (prev)))
+ 	{
+ 	  rtx x;
+ 	  if (jump_to_next
+@@ -5951,7 +5952,7 @@ split_branches (rtx first)
+ 			JUMP_LABEL (insn) = far_label;
+ 			LABEL_NUSES (far_label)++;
+ 		      }
+-		    redirect_jump (insn, NULL_RTX, 1);
++		    redirect_jump (insn, ret_rtx, 1);
+ 		    far_label = 0;
+ 		  }
+ 	      }
+Index: gcc-4_5-branch/gcc/config/v850/v850.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/v850/v850.c
++++ gcc-4_5-branch/gcc/config/v850/v850.c
+@@ -1832,7 +1832,7 @@ expand_epilogue (void)
+ 	{
+ 	  restore_all = gen_rtx_PARALLEL (VOIDmode,
+ 					  rtvec_alloc (num_restore + 2));
+-	  XVECEXP (restore_all, 0, 0) = gen_rtx_RETURN (VOIDmode);
++	  XVECEXP (restore_all, 0, 0) = ret_rtx;
+ 	  XVECEXP (restore_all, 0, 1)
+ 	    = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
+ 			    gen_rtx_PLUS (Pmode,
+Index: gcc-4_5-branch/gcc/df-scan.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/df-scan.c
++++ gcc-4_5-branch/gcc/df-scan.c
+@@ -3296,6 +3296,7 @@ df_uses_record (enum df_ref_class cl, st
+       }
+ 
+     case RETURN:
++    case SIMPLE_RETURN:
+       break;
+ 
+     case ASM_OPERANDS:
+Index: gcc-4_5-branch/gcc/doc/invoke.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/invoke.texi
++++ gcc-4_5-branch/gcc/doc/invoke.texi
+@@ -5751,6 +5751,7 @@ compilation time.
+ -fipa-pure-const @gol
+ -fipa-reference @gol
+ -fmerge-constants
++-fshrink-wrap @gol
+ -fsplit-wide-types @gol
+ -ftree-builtin-call-dce @gol
+ -ftree-ccp @gol
+@@ -6506,6 +6507,12 @@ This option has no effect until one of @
+ When pipelining loops during selective scheduling, also pipeline outer loops.
+ This option has no effect until @option{-fsel-sched-pipelining} is turned on.
+ 
++@item -fshrink-wrap
++@opindex fshrink-wrap
++Emit function prologues only before parts of the function that need it,
++rather than at the top of the function.  This flag is enabled by default at
++@option{-O} and higher.
++
+ @item -fcaller-saves
+ @opindex fcaller-saves
+ Enable values to be allocated in registers that will be clobbered by
+Index: gcc-4_5-branch/gcc/doc/md.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/md.texi
++++ gcc-4_5-branch/gcc/doc/md.texi
+@@ -4801,7 +4801,19 @@ RTL generation phase.  In this case it i
+ multiple instructions are usually needed to return from a function, but
+ some class of functions only requires one instruction to implement a
+ return.  Normally, the applicable functions are those which do not need
+-to save any registers or allocate stack space.
++to save any registers or allocate stack space, although some targets
++have instructions that can perform both the epilogue and function return
++in one instruction.
++
++@cindex @code{simple_return} instruction pattern
++@item @samp{simple_return}
++Subroutine return instruction.  This instruction pattern name should be
++defined only if a single instruction can do all the work of returning
++from a function on a path where no epilogue is required.  This pattern
++is very similar to the @code{return} instruction pattern, but it is emitted
++only by the shrink-wrapping optimization on paths where the function
++prologue has not been executed, and a function return should occur without
++any of the effects of the epilogue.
+ 
+ @findex reload_completed
+ @findex leaf_function_p
+Index: gcc-4_5-branch/gcc/doc/rtl.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/rtl.texi
++++ gcc-4_5-branch/gcc/doc/rtl.texi
+@@ -2888,6 +2888,13 @@ placed in @code{pc} to return to the cal
+ Note that an insn pattern of @code{(return)} is logically equivalent to
+ @code{(set (pc) (return))}, but the latter form is never used.
+ 
++@findex simple_return
++@item (simple_return)
++Like @code{(return)}, but truly represents only a function return, while
++@code{(return)} may represent an insn that also performs other functions
++of the function epilogue.  Like @code{(return)}, this may also occur in
++conditional jumps.
++
+ @findex call
+ @item (call @var{function} @var{nargs})
+ Represents a function call.  @var{function} is a @code{mem} expression
+@@ -3017,7 +3024,7 @@ Represents several side effects performe
+ brackets stand for a vector; the operand of @code{parallel} is a
+ vector of expressions.  @var{x0}, @var{x1} and so on are individual
+ side effect expressions---expressions of code @code{set}, @code{call},
+-@code{return}, @code{clobber} or @code{use}.
++@code{return}, @code{simple_return}, @code{clobber} or @code{use}.
+ 
+ ``In parallel'' means that first all the values used in the individual
+ side-effects are computed, and second all the actual side-effects are
+@@ -3656,14 +3663,16 @@ and @code{call_insn} insns:
+ @table @code
+ @findex PATTERN
+ @item PATTERN (@var{i})
+-An expression for the side effect performed by this insn.  This must be
+-one of the following codes: @code{set}, @code{call}, @code{use},
+-@code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
+-@code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
+-@code{unspec_volatile}, @code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a @code{parallel},
+-each element of the @code{parallel} must be one these codes, except that
+-@code{parallel} expressions cannot be nested and @code{addr_vec} and
+-@code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
++An expression for the side effect performed by this insn.  This must
++be one of the following codes: @code{set}, @code{call}, @code{use},
++@code{clobber}, @code{return}, @code{simple_return}, @code{asm_input},
++@code{asm_output}, @code{addr_vec}, @code{addr_diff_vec},
++@code{trap_if}, @code{unspec}, @code{unspec_volatile},
++@code{parallel}, @code{cond_exec}, or @code{sequence}.  If it is a
++@code{parallel}, each element of the @code{parallel} must be one these
++codes, except that @code{parallel} expressions cannot be nested and
++@code{addr_vec} and @code{addr_diff_vec} are not permitted inside a
++@code{parallel} expression.
+ 
+ @findex INSN_CODE
+ @item INSN_CODE (@var{i})
+Index: gcc-4_5-branch/gcc/doc/tm.texi
+===================================================================
+--- gcc-4_5-branch.orig/gcc/doc/tm.texi
++++ gcc-4_5-branch/gcc/doc/tm.texi
+@@ -3287,6 +3287,12 @@ Define this if the return address of a p
+ from the frame pointer of the previous stack frame.
+ @end defmac
+ 
++@defmac RETURN_ADDR_REGNUM
++If defined, a C expression whose value is the register number of the return
++address for the current function.  Targets that pass the return address on
++the stack should not define this macro.
++@end defmac
++
+ @defmac INCOMING_RETURN_ADDR_RTX
+ A C expression whose value is RTL representing the location of the
+ incoming return address at the beginning of any function, before the
+Index: gcc-4_5-branch/gcc/dwarf2out.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/dwarf2out.c
++++ gcc-4_5-branch/gcc/dwarf2out.c
+@@ -1396,7 +1396,7 @@ compute_barrier_args_size_1 (rtx insn, H
+     {
+       rtx dest = JUMP_LABEL (insn);
+ 
+-      if (dest)
++      if (dest && !ANY_RETURN_P (dest))
+ 	{
+ 	  if (barrier_args_size [INSN_UID (dest)] < 0)
+ 	    {
+Index: gcc-4_5-branch/gcc/emit-rtl.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/emit-rtl.c
++++ gcc-4_5-branch/gcc/emit-rtl.c
+@@ -2432,6 +2432,8 @@ verify_rtx_sharing (rtx orig, rtx insn)
+     case CODE_LABEL:
+     case PC:
+     case CC0:
++    case RETURN:
++    case SIMPLE_RETURN:
+     case SCRATCH:
+       return;
+       /* SCRATCH must be shared because they represent distinct values.  */
+@@ -3323,14 +3325,17 @@ prev_label (rtx insn)
+   return insn;
+ }
+ 
+-/* Return the last label to mark the same position as LABEL.  Return null
+-   if LABEL itself is null.  */
++/* Return the last label to mark the same position as LABEL.  Return LABEL
++   itself if it is null or any return rtx.  */
+ 
+ rtx
+ skip_consecutive_labels (rtx label)
+ {
+   rtx insn;
+ 
++  if (label && ANY_RETURN_P (label))
++    return label;
++
+   for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
+     if (LABEL_P (insn))
+       label = insn;
+@@ -5209,7 +5214,7 @@ classify_insn (rtx x)
+     return CODE_LABEL;
+   if (GET_CODE (x) == CALL)
+     return CALL_INSN;
+-  if (GET_CODE (x) == RETURN)
++  if (GET_CODE (x) == RETURN || GET_CODE (x) == SIMPLE_RETURN)
+     return JUMP_INSN;
+   if (GET_CODE (x) == SET)
+     {
+@@ -5715,8 +5720,10 @@ init_emit_regs (void)
+   init_reg_modes_target ();
+ 
+   /* Assign register numbers to the globally defined register rtx.  */
+-  pc_rtx = gen_rtx_PC (VOIDmode);
+-  cc0_rtx = gen_rtx_CC0 (VOIDmode);
++  pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
++  ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
++  simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
++  cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
+   stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
+   frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
+   hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
+Index: gcc-4_5-branch/gcc/final.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/final.c
++++ gcc-4_5-branch/gcc/final.c
+@@ -2428,7 +2428,7 @@ final_scan_insn (rtx insn, FILE *file, i
+ 	        delete_insn (insn);
+ 		break;
+ 	      }
+-	    else if (GET_CODE (SET_SRC (body)) == RETURN)
++	    else if (ANY_RETURN_P (SET_SRC (body)))
+ 	      /* Replace (set (pc) (return)) with (return).  */
+ 	      PATTERN (insn) = body = SET_SRC (body);
+ 
+Index: gcc-4_5-branch/gcc/function.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/function.c
++++ gcc-4_5-branch/gcc/function.c
+@@ -147,9 +147,6 @@ extern tree debug_find_var_in_block_tree
+    can always export `prologue_epilogue_contains'.  */
+ static void record_insns (rtx, rtx, htab_t *) ATTRIBUTE_UNUSED;
+ static bool contains (const_rtx, htab_t);
+-#ifdef HAVE_return
+-static void emit_return_into_block (basic_block);
+-#endif
+ static void prepare_function_start (void);
+ static void do_clobber_return_reg (rtx, void *);
+ static void do_use_return_reg (rtx, void *);
+@@ -4987,35 +4984,190 @@ prologue_epilogue_contains (const_rtx in
+   return 0;
+ }
+ 
++#ifdef HAVE_simple_return
++/* This collects sets and clobbers of hard registers in a HARD_REG_SET,
++   which is pointed to by DATA.  */
++static void
++record_hard_reg_sets (rtx x, const_rtx pat ATTRIBUTE_UNUSED, void *data)
++{
++  HARD_REG_SET *pset = (HARD_REG_SET *)data;
++  if (REG_P (x) && REGNO (x) < FIRST_PSEUDO_REGISTER)
++    {
++      int nregs = hard_regno_nregs[REGNO (x)][GET_MODE (x)];
++      while (nregs-- > 0)
++	SET_HARD_REG_BIT (*pset, REGNO (x) + nregs);
++    }
++}
++
++/* A subroutine of requires_stack_frame_p, called via for_each_rtx.
++   If any change is made, set CHANGED
++   to true.  */
++
++static int
++frame_required_for_rtx (rtx *loc, void *data ATTRIBUTE_UNUSED)
++{
++  rtx x = *loc;
++  if (x == stack_pointer_rtx || x == hard_frame_pointer_rtx
++      || x == arg_pointer_rtx || x == pic_offset_table_rtx
++#ifdef RETURN_ADDR_REGNUM
++      || (REG_P (x) && REGNO (x) == RETURN_ADDR_REGNUM)
++#endif
++      )
++    return 1;
++  return 0;
++}
++
++static bool
++requires_stack_frame_p (rtx insn)
++{
++  HARD_REG_SET hardregs;
++  unsigned regno;
++
++  if (!INSN_P (insn) || DEBUG_INSN_P (insn))
++    return false;
++  if (CALL_P (insn))
++    return !SIBLING_CALL_P (insn);
++  if (for_each_rtx (&PATTERN (insn), frame_required_for_rtx, NULL))
++    return true;
++  CLEAR_HARD_REG_SET (hardregs);
++  note_stores (PATTERN (insn), record_hard_reg_sets, &hardregs);
++  AND_COMPL_HARD_REG_SET (hardregs, call_used_reg_set);
++  for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
++    if (TEST_HARD_REG_BIT (hardregs, regno)
++	&& df_regs_ever_live_p (regno))
++      return true;
++  return false;
++}
++#endif
++
+ #ifdef HAVE_return
+-/* Insert gen_return at the end of block BB.  This also means updating
+-   block_for_insn appropriately.  */
++
++static rtx
++gen_return_pattern (bool simple_p)
++{
++#ifdef HAVE_simple_return
++  return simple_p ? gen_simple_return () : gen_return ();
++#else
++  gcc_assert (!simple_p);
++  return gen_return ();
++#endif
++}
++
++/* Insert an appropriate return pattern at the end of block BB.  This
++   also means updating block_for_insn appropriately.  */
+ 
+ static void
+-emit_return_into_block (basic_block bb)
++emit_return_into_block (bool simple_p, basic_block bb)
+ {
+-  emit_jump_insn_after (gen_return (), BB_END (bb));
++  rtx jump;
++  jump = emit_jump_insn_after (gen_return_pattern (simple_p), BB_END (bb));
++  JUMP_LABEL (jump) = simple_p ? simple_return_rtx : ret_rtx;
+ }
+-#endif /* HAVE_return */
++#endif
+ 
+ /* Generate the prologue and epilogue RTL if the machine supports it.  Thread
+    this into place with notes indicating where the prologue ends and where
+-   the epilogue begins.  Update the basic block information when possible.  */
++   the epilogue begins.  Update the basic block information when possible.
++
++   Notes on epilogue placement:
++   There are several kinds of edges to the exit block:
++   * a single fallthru edge from LAST_BB
++   * possibly, edges from blocks containing sibcalls
++   * possibly, fake edges from infinite loops
++
++   The epilogue is always emitted on the fallthru edge from the last basic
++   block in the function, LAST_BB, into the exit block.
++
++   If LAST_BB is empty except for a label, it is the target of every
++   other basic block in the function that ends in a return.  If a
++   target has a return or simple_return pattern (possibly with
++   conditional variants), these basic blocks can be changed so that a
++   return insn is emitted into them, and their target is adjusted to
++   the real exit block.
++
++   Notes on shrink wrapping: We implement a fairly conservative
++   version of shrink-wrapping rather than the textbook one.  We only
++   generate a single prologue and a single epilogue.  This is
++   sufficient to catch a number of interesting cases involving early
++   exits.
++
++   First, we identify the blocks that require the prologue to occur before
++   them.  These are the ones that modify a call-saved register, or reference
++   any of the stack or frame pointer registers.  To simplify things, we then
++   mark everything reachable from these blocks as also requiring a prologue.
++   This takes care of loops automatically, and avoids the need to examine
++   whether MEMs reference the frame, since it is sufficient to check for
++   occurrences of the stack or frame pointer.
++
++   We then compute the set of blocks for which the need for a prologue
++   is anticipatable (borrowing terminology from the shrink-wrapping
++   description in Muchnick's book).  These are the blocks which either
++   require a prologue themselves, or those that have only successors
++   where the prologue is anticipatable.  The prologue needs to be
++   inserted on all edges from BB1->BB2 where BB2 is in ANTIC and BB1
++   is not.  For the moment, we ensure that only one such edge exists.
++
++   The epilogue is placed as described above, but we make a
++   distinction between inserting return and simple_return patterns
++   when modifying other blocks that end in a return.  Blocks that end
++   in a sibcall omit the sibcall_epilogue if the block is not in
++   ANTIC.  */
+ 
+ static void
+ thread_prologue_and_epilogue_insns (void)
+ {
+   int inserted = 0;
++  basic_block last_bb;
++  bool last_bb_active;
++#ifdef HAVE_simple_return
++  bool unconverted_simple_returns = false;
++  basic_block simple_return_block = NULL;
++#endif
++  rtx returnjump ATTRIBUTE_UNUSED;
++  rtx seq ATTRIBUTE_UNUSED, epilogue_end ATTRIBUTE_UNUSED;
++  rtx prologue_seq ATTRIBUTE_UNUSED, split_prologue_seq ATTRIBUTE_UNUSED;
++  edge entry_edge, orig_entry_edge, exit_fallthru_edge;
+   edge e;
+-#if defined (HAVE_sibcall_epilogue) || defined (HAVE_epilogue) || defined (HAVE_return) || defined (HAVE_prologue)
+-  rtx seq;
+-#endif
+-#if defined (HAVE_epilogue) || defined(HAVE_return)
+-  rtx epilogue_end = NULL_RTX;
+-#endif
+   edge_iterator ei;
++  bitmap_head bb_flags;
++
++  df_analyze ();
+ 
+   rtl_profile_for_bb (ENTRY_BLOCK_PTR);
++
++  epilogue_end = NULL_RTX;
++  returnjump = NULL_RTX;
++
++  /* Can't deal with multiple successors of the entry block at the
++     moment.  Function should always have at least one entry
++     point.  */
++  gcc_assert (single_succ_p (ENTRY_BLOCK_PTR));
++  entry_edge = single_succ_edge (ENTRY_BLOCK_PTR);
++  orig_entry_edge = entry_edge;
++
++  exit_fallthru_edge = find_fallthru_edge (EXIT_BLOCK_PTR->preds);
++  if (exit_fallthru_edge != NULL)
++    {
++      rtx label;
++
++      last_bb = exit_fallthru_edge->src;
++      /* Test whether there are active instructions in the last block.  */
++      label = BB_END (last_bb);
++      while (label && !LABEL_P (label))
++	{
++	  if (active_insn_p (label))
++	    break;
++	  label = PREV_INSN (label);
++	}
++
++      last_bb_active = BB_HEAD (last_bb) != label || !LABEL_P (label);
++    }
++  else
++    {
++      last_bb = NULL;
++      last_bb_active = false;
++    }
++
+ #ifdef HAVE_prologue
+   if (HAVE_prologue)
+     {
+@@ -5040,20 +5192,169 @@ thread_prologue_and_epilogue_insns (void
+         emit_insn (gen_blockage ());
+ #endif
+ 
+-      seq = get_insns ();
++      prologue_seq = get_insns ();
+       end_sequence ();
+       set_insn_locators (seq, prologue_locator);
++    }
++#endif
+ 
+-      /* Can't deal with multiple successors of the entry block
+-         at the moment.  Function should always have at least one
+-         entry point.  */
+-      gcc_assert (single_succ_p (ENTRY_BLOCK_PTR));
++  bitmap_initialize (&bb_flags, &bitmap_default_obstack);
+ 
+-      insert_insn_on_edge (seq, single_succ_edge (ENTRY_BLOCK_PTR));
+-      inserted = 1;
++#ifdef HAVE_simple_return
++  /* Try to perform a kind of shrink-wrapping, making sure the
++     prologue/epilogue is emitted only around those parts of the
++     function that require it.  */
++
++  if (flag_shrink_wrap && HAVE_simple_return && !flag_non_call_exceptions
++      && HAVE_prologue && !crtl->calls_eh_return)
++    {
++      HARD_REG_SET prologue_clobbered, live_on_edge;
++      rtx p_insn;
++      VEC(basic_block, heap) *vec;
++      basic_block bb;
++      bitmap_head bb_antic_flags;
++      bitmap_head bb_on_list;
++
++      bitmap_initialize (&bb_antic_flags, &bitmap_default_obstack);
++      bitmap_initialize (&bb_on_list, &bitmap_default_obstack);
++
++      vec = VEC_alloc (basic_block, heap, n_basic_blocks);
++
++      FOR_EACH_BB (bb)
++	{
++	  rtx insn;
++	  FOR_BB_INSNS (bb, insn)
++	    {
++	      if (requires_stack_frame_p (insn))
++		{
++		  bitmap_set_bit (&bb_flags, bb->index);
++		  VEC_quick_push (basic_block, vec, bb);
++		  break;
++		}
++	    }
++	}
++
++      /* For every basic block that needs a prologue, mark all blocks
++	 reachable from it, so as to ensure they are also seen as
++	 requiring a prologue.  */
++      while (!VEC_empty (basic_block, vec))
++	{
++	  basic_block tmp_bb = VEC_pop (basic_block, vec);
++	  edge e;
++	  edge_iterator ei;
++	  FOR_EACH_EDGE (e, ei, tmp_bb->succs)
++	    {
++	      if (e->dest == EXIT_BLOCK_PTR
++		  || bitmap_bit_p (&bb_flags, e->dest->index))
++		continue;
++	      bitmap_set_bit (&bb_flags, e->dest->index);
++	      VEC_quick_push (basic_block, vec, e->dest);
++	    }
++	}
++      /* If the last basic block contains only a label, we'll be able
++	 to convert jumps to it to (potentially conditional) return
++	 insns later.  This means we don't necessarily need a prologue
++	 for paths reaching it.  */
++      if (last_bb)
++	{
++	  if (!last_bb_active)
++	    bitmap_clear_bit (&bb_flags, last_bb->index);
++	  else if (!bitmap_bit_p (&bb_flags, last_bb->index))
++	    goto fail_shrinkwrap;
++	}
++
++      /* Now walk backwards from every block that is marked as needing
++	 a prologue to compute the bb_antic_flags bitmap.  */
++      bitmap_copy (&bb_antic_flags, &bb_flags);
++      FOR_EACH_BB (bb)
++	{
++	  edge e;
++	  edge_iterator ei;
++	  if (!bitmap_bit_p (&bb_flags, bb->index))
++	    continue;
++	  FOR_EACH_EDGE (e, ei, bb->preds)
++	    if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++	      {
++		VEC_quick_push (basic_block, vec, e->src);
++		bitmap_set_bit (&bb_on_list, e->src->index);
++	      }
++	}
++      while (!VEC_empty (basic_block, vec))
++	{
++	  basic_block tmp_bb = VEC_pop (basic_block, vec);
++	  edge e;
++	  edge_iterator ei;
++	  bool all_set = true;
++	  
++	  bitmap_clear_bit (&bb_on_list, tmp_bb->index);
++	  FOR_EACH_EDGE (e, ei, tmp_bb->succs)
++	    {
++	      if (!bitmap_bit_p (&bb_antic_flags, e->dest->index))
++		{
++		  all_set = false;
++		  break;
++		}
++	    }
++	  if (all_set)
++	    {
++	      bitmap_set_bit (&bb_antic_flags, tmp_bb->index);
++	      FOR_EACH_EDGE (e, ei, tmp_bb->preds)
++		if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++		  {
++		    VEC_quick_push (basic_block, vec, e->src);
++		    bitmap_set_bit (&bb_on_list, e->src->index);
++		  }
++	    }
++	}
++      /* Find exactly one edge that leads to a block in ANTIC from
++	 a block that isn't.  */
++      if (!bitmap_bit_p (&bb_antic_flags, entry_edge->dest->index))
++	FOR_EACH_BB (bb)
++	  {
++	    if (!bitmap_bit_p (&bb_antic_flags, bb->index))
++	      continue;
++	    FOR_EACH_EDGE (e, ei, bb->preds)
++	      if (!bitmap_bit_p (&bb_antic_flags, e->src->index))
++		{
++		  if (entry_edge != orig_entry_edge)
++		    {
++		      entry_edge = orig_entry_edge;
++		      goto fail_shrinkwrap;
++		    }
++		  entry_edge = e;
++		}
++	  }
++
++      /* Test whether the prologue is known to clobber any register
++	 (other than FP or SP) which are live on the edge.  */
++      CLEAR_HARD_REG_SET (prologue_clobbered);
++      for (p_insn = prologue_seq; p_insn; p_insn = NEXT_INSN (p_insn))
++	if (NONDEBUG_INSN_P (p_insn))
++	  note_stores (PATTERN (p_insn), record_hard_reg_sets,
++		       &prologue_clobbered);
++      CLEAR_HARD_REG_BIT (prologue_clobbered, STACK_POINTER_REGNUM);
++      if (frame_pointer_needed)
++	CLEAR_HARD_REG_BIT (prologue_clobbered, HARD_FRAME_POINTER_REGNUM);
++
++      CLEAR_HARD_REG_SET (live_on_edge);
++      reg_set_to_hard_reg_set (&live_on_edge,
++			       df_get_live_in (entry_edge->dest));
++      if (hard_reg_set_intersect_p (live_on_edge, prologue_clobbered))
++	entry_edge = orig_entry_edge;
++
++    fail_shrinkwrap:
++      bitmap_clear (&bb_antic_flags);
++      bitmap_clear (&bb_on_list);
++      VEC_free (basic_block, heap, vec);
+     }
+ #endif
+ 
++  if (prologue_seq != NULL_RTX)
++    {
++      insert_insn_on_edge (prologue_seq, entry_edge);
++      inserted = true;
++    }
++
+   /* If the exit block has no non-fake predecessors, we don't need
+      an epilogue.  */
+   FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
+@@ -5063,100 +5364,130 @@ thread_prologue_and_epilogue_insns (void
+     goto epilogue_done;
+ 
+   rtl_profile_for_bb (EXIT_BLOCK_PTR);
++
+ #ifdef HAVE_return
+-  if (optimize && HAVE_return)
++  /* If we're allowed to generate a simple return instruction, then by
++     definition we don't need a full epilogue.  If the last basic
++     block before the exit block does not contain active instructions,
++     examine its predecessors and try to emit (conditional) return
++     instructions.  */
++  if (optimize && !last_bb_active
++      && (HAVE_return || entry_edge != orig_entry_edge))
+     {
+-      /* If we're allowed to generate a simple return instruction,
+-	 then by definition we don't need a full epilogue.  Examine
+-	 the block that falls through to EXIT.   If it does not
+-	 contain any code, examine its predecessors and try to
+-	 emit (conditional) return instructions.  */
+-
+-      basic_block last;
++      edge_iterator ei2;
++      int i;
++      basic_block bb;
+       rtx label;
++      VEC(basic_block,heap) *src_bbs;
+ 
+-      FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
+-	if (e->flags & EDGE_FALLTHRU)
+-	  break;
+-      if (e == NULL)
++      if (exit_fallthru_edge == NULL)
+ 	goto epilogue_done;
+-      last = e->src;
++      label = BB_HEAD (last_bb);
+ 
+-      /* Verify that there are no active instructions in the last block.  */
+-      label = BB_END (last);
+-      while (label && !LABEL_P (label))
+-	{
+-	  if (active_insn_p (label))
+-	    break;
+-	  label = PREV_INSN (label);
+-	}
++      src_bbs = VEC_alloc (basic_block, heap, EDGE_COUNT (last_bb->preds));
++      FOR_EACH_EDGE (e, ei2, last_bb->preds)
++	if (e->src != ENTRY_BLOCK_PTR)
++	  VEC_quick_push (basic_block, src_bbs, e->src);
+ 
+-      if (BB_HEAD (last) == label && LABEL_P (label))
++      FOR_EACH_VEC_ELT (basic_block, src_bbs, i, bb)
+ 	{
+-	  edge_iterator ei2;
++	  bool simple_p;
++	  rtx jump;
++	  e = find_edge (bb, last_bb);
+ 
+-	  for (ei2 = ei_start (last->preds); (e = ei_safe_edge (ei2)); )
+-	    {
+-	      basic_block bb = e->src;
+-	      rtx jump;
++	  jump = BB_END (bb);
+ 
+-	      if (bb == ENTRY_BLOCK_PTR)
+-		{
+-		  ei_next (&ei2);
+-		  continue;
+-		}
++#ifdef HAVE_simple_return
++	  simple_p = (entry_edge != orig_entry_edge
++		      ? !bitmap_bit_p (&bb_flags, bb->index) : false);
++#else
++	  simple_p = false;
++#endif
+ 
+-	      jump = BB_END (bb);
+-	      if (!JUMP_P (jump) || JUMP_LABEL (jump) != label)
+-		{
+-		  ei_next (&ei2);
+-		  continue;
+-		}
++	  if (!simple_p
++	      && (!HAVE_return || !JUMP_P (jump)
++		  || JUMP_LABEL (jump) != label))
++	    continue;
+ 
+-	      /* If we have an unconditional jump, we can replace that
+-		 with a simple return instruction.  */
+-	      if (simplejump_p (jump))
+-		{
+-		  emit_return_into_block (bb);
+-		  delete_insn (jump);
+-		}
++	  /* If we have an unconditional jump, we can replace that
++	     with a simple return instruction.  */
++	  if (!JUMP_P (jump))
++	    {
++	      emit_barrier_after (BB_END (bb));
++	      emit_return_into_block (simple_p, bb);
++	    }
++	  else if (simplejump_p (jump))
++	    {
++	      emit_return_into_block (simple_p, bb);
++	      delete_insn (jump);
++	    }
++	  else if (condjump_p (jump) && JUMP_LABEL (jump) != label)
++	    {
++	      basic_block new_bb;
++	      edge new_e;
+ 
+-	      /* If we have a conditional jump, we can try to replace
+-		 that with a conditional return instruction.  */
+-	      else if (condjump_p (jump))
+-		{
+-		  if (! redirect_jump (jump, 0, 0))
+-		    {
+-		      ei_next (&ei2);
+-		      continue;
+-		    }
++	      gcc_assert (simple_p);
++	      new_bb = split_edge (e);
++	      emit_barrier_after (BB_END (new_bb));
++	      emit_return_into_block (simple_p, new_bb);
++#ifdef HAVE_simple_return
++	      simple_return_block = new_bb;
++#endif
++	      new_e = single_succ_edge (new_bb);
++	      redirect_edge_succ (new_e, EXIT_BLOCK_PTR);
+ 
+-		  /* If this block has only one successor, it both jumps
+-		     and falls through to the fallthru block, so we can't
+-		     delete the edge.  */
+-		  if (single_succ_p (bb))
+-		    {
+-		      ei_next (&ei2);
+-		      continue;
+-		    }
+-		}
++	      continue;
++	    }
++	  /* If we have a conditional jump branching to the last
++	     block, we can try to replace that with a conditional
++	     return instruction.  */
++	  else if (condjump_p (jump))
++	    {
++	      rtx dest;
++	      if (simple_p)
++		dest = simple_return_rtx;
+ 	      else
++		dest = ret_rtx;
++	      if (! redirect_jump (jump, dest, 0))
+ 		{
+-		  ei_next (&ei2);
++#ifdef HAVE_simple_return
++		  if (simple_p)
++		    unconverted_simple_returns = true;
++#endif
+ 		  continue;
+ 		}
+ 
+-	      /* Fix up the CFG for the successful change we just made.  */
+-	      redirect_edge_succ (e, EXIT_BLOCK_PTR);
++	      /* If this block has only one successor, it both jumps
++		 and falls through to the fallthru block, so we can't
++		 delete the edge.  */
++	      if (single_succ_p (bb))
++		continue;
++	    }
++	  else
++	    {
++#ifdef HAVE_simple_return
++	      if (simple_p)
++		unconverted_simple_returns = true;
++#endif
++	      continue;
+ 	    }
+ 
++	  /* Fix up the CFG for the successful change we just made.  */
++	  redirect_edge_succ (e, EXIT_BLOCK_PTR);
++	}
++      VEC_free (basic_block, heap, src_bbs);
++
++      if (HAVE_return)
++	{
+ 	  /* Emit a return insn for the exit fallthru block.  Whether
+ 	     this is still reachable will be determined later.  */
+ 
+-	  emit_barrier_after (BB_END (last));
+-	  emit_return_into_block (last);
+-	  epilogue_end = BB_END (last);
+-	  single_succ_edge (last)->flags &= ~EDGE_FALLTHRU;
++	  emit_barrier_after (BB_END (last_bb));
++	  emit_return_into_block (false, last_bb);
++	  epilogue_end = BB_END (last_bb);
++	  if (JUMP_P (epilogue_end))
++	    JUMP_LABEL (epilogue_end) = ret_rtx;
++	  single_succ_edge (last_bb)->flags &= ~EDGE_FALLTHRU;
+ 	  goto epilogue_done;
+ 	}
+     }
+@@ -5193,15 +5524,10 @@ thread_prologue_and_epilogue_insns (void
+     }
+ #endif
+ 
+-  /* Find the edge that falls through to EXIT.  Other edges may exist
+-     due to RETURN instructions, but those don't need epilogues.
+-     There really shouldn't be a mixture -- either all should have
+-     been converted or none, however...  */
++  /* If nothing falls through into the exit block, we don't need an
++     epilogue.  */
+ 
+-  FOR_EACH_EDGE (e, ei, EXIT_BLOCK_PTR->preds)
+-    if (e->flags & EDGE_FALLTHRU)
+-      break;
+-  if (e == NULL)
++  if (exit_fallthru_edge == NULL)
+     goto epilogue_done;
+ 
+ #ifdef HAVE_epilogue
+@@ -5217,25 +5543,36 @@ thread_prologue_and_epilogue_insns (void
+       set_insn_locators (seq, epilogue_locator);
+ 
+       seq = get_insns ();
++      returnjump = get_last_insn ();
+       end_sequence ();
+ 
+-      insert_insn_on_edge (seq, e);
++      insert_insn_on_edge (seq, exit_fallthru_edge);
+       inserted = 1;
++      if (JUMP_P (returnjump))
++	{
++ 	  rtx pat = PATTERN (returnjump);
++ 	  if (GET_CODE (pat) == PARALLEL)
++	    pat = XVECEXP (pat, 0, 0);
++	  if (ANY_RETURN_P (pat))
++	    JUMP_LABEL (returnjump) = pat;
++	  else
++	    JUMP_LABEL (returnjump) = ret_rtx;
++	}
+     }
+   else
+ #endif
+     {
+       basic_block cur_bb;
+ 
+-      if (! next_active_insn (BB_END (e->src)))
++      if (! next_active_insn (BB_END (exit_fallthru_edge->src)))
+ 	goto epilogue_done;
+       /* We have a fall-through edge to the exit block, the source is not
+-         at the end of the function, and there will be an assembler epilogue
+-         at the end of the function.
+-         We can't use force_nonfallthru here, because that would try to
+-         use return.  Inserting a jump 'by hand' is extremely messy, so
++	 at the end of the function, and there will be an assembler epilogue
++	 at the end of the function.
++	 We can't use force_nonfallthru here, because that would try to
++	 use return.  Inserting a jump 'by hand' is extremely messy, so
+ 	 we take advantage of cfg_layout_finalize using
+-	fixup_fallthru_exit_predecessor.  */
++	 fixup_fallthru_exit_predecessor.  */
+       cfg_layout_initialize (0);
+       FOR_EACH_BB (cur_bb)
+ 	if (cur_bb->index >= NUM_FIXED_BLOCKS
+@@ -5244,6 +5581,7 @@ thread_prologue_and_epilogue_insns (void
+       cfg_layout_finalize ();
+     }
+ epilogue_done:
++
+   default_rtl_profile ();
+ 
+   if (inserted)
+@@ -5260,33 +5598,93 @@ epilogue_done:
+ 	}
+     }
+ 
++#ifdef HAVE_simple_return
++  /* If there were branches to an empty LAST_BB which we tried to
++     convert to conditional simple_returns, but couldn't for some
++     reason, create a block to hold a simple_return insn and redirect
++     those remaining edges.  */
++  if (unconverted_simple_returns)
++    {
++      edge_iterator ei2;
++      basic_block exit_pred = EXIT_BLOCK_PTR->prev_bb;
++
++      gcc_assert (entry_edge != orig_entry_edge);
++
++#ifdef HAVE_epilogue
++      if (simple_return_block == NULL && returnjump != NULL_RTX
++	  && JUMP_LABEL (returnjump) == simple_return_rtx)
++	{
++	  edge e = split_block (exit_fallthru_edge->src,
++				PREV_INSN (returnjump));
++	  simple_return_block = e->dest;
++	}
++#endif
++      if (simple_return_block == NULL)
++	{
++	  basic_block bb;
++	  rtx start;
++
++	  bb = create_basic_block (NULL, NULL, exit_pred);
++	  start = emit_jump_insn_after (gen_simple_return (),
++					BB_END (bb));
++	  JUMP_LABEL (start) = simple_return_rtx;
++	  emit_barrier_after (start);
++
++	  simple_return_block = bb;
++	  make_edge (bb, EXIT_BLOCK_PTR, 0);
++	}
++
++    restart_scan:
++      for (ei2 = ei_start (last_bb->preds); (e = ei_safe_edge (ei2)); )
++	{
++	  basic_block bb = e->src;
++
++	  if (bb != ENTRY_BLOCK_PTR
++	      && !bitmap_bit_p (&bb_flags, bb->index))
++	    {
++	      redirect_edge_and_branch_force (e, simple_return_block);
++	      goto restart_scan;
++	    }
++	  ei_next (&ei2);
++
++	}
++    }
++#endif
++
+ #ifdef HAVE_sibcall_epilogue
+   /* Emit sibling epilogues before any sibling call sites.  */
+   for (ei = ei_start (EXIT_BLOCK_PTR->preds); (e = ei_safe_edge (ei)); )
+     {
+       basic_block bb = e->src;
+       rtx insn = BB_END (bb);
++      rtx ep_seq;
+ 
+       if (!CALL_P (insn)
+-	  || ! SIBLING_CALL_P (insn))
++	  || ! SIBLING_CALL_P (insn)
++	  || (entry_edge != orig_entry_edge
++	      && !bitmap_bit_p (&bb_flags, bb->index)))
+ 	{
+ 	  ei_next (&ei);
+ 	  continue;
+ 	}
+ 
+-      start_sequence ();
+-      emit_note (NOTE_INSN_EPILOGUE_BEG);
+-      emit_insn (gen_sibcall_epilogue ());
+-      seq = get_insns ();
+-      end_sequence ();
++      ep_seq = gen_sibcall_epilogue ();
++      if (ep_seq)
++	{
++	  start_sequence ();
++	  emit_note (NOTE_INSN_EPILOGUE_BEG);
++	  emit_insn (ep_seq);
++	  seq = get_insns ();
++	  end_sequence ();
+ 
+-      /* Retain a map of the epilogue insns.  Used in life analysis to
+-	 avoid getting rid of sibcall epilogue insns.  Do this before we
+-	 actually emit the sequence.  */
+-      record_insns (seq, NULL, &epilogue_insn_hash);
+-      set_insn_locators (seq, epilogue_locator);
++	  /* Retain a map of the epilogue insns.  Used in life analysis to
++	     avoid getting rid of sibcall epilogue insns.  Do this before we
++	     actually emit the sequence.  */
++	  record_insns (seq, NULL, &epilogue_insn_hash);
++	  set_insn_locators (seq, epilogue_locator);
+ 
+-      emit_insn_before (seq, insn);
++	  emit_insn_before (seq, insn);
++	}
+       ei_next (&ei);
+     }
+ #endif
+@@ -5311,6 +5709,8 @@ epilogue_done:
+     }
+ #endif
+ 
++  bitmap_clear (&bb_flags);
++
+   /* Threading the prologue and epilogue changes the artificial refs
+      in the entry and exit blocks.  */
+   epilogue_completed = 1;
+Index: gcc-4_5-branch/gcc/genemit.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/genemit.c
++++ gcc-4_5-branch/gcc/genemit.c
+@@ -222,6 +222,12 @@ gen_exp (rtx x, enum rtx_code subroutine
+     case PC:
+       printf ("pc_rtx");
+       return;
++    case RETURN:
++      printf ("ret_rtx");
++      return;
++    case SIMPLE_RETURN:
++      printf ("simple_return_rtx");
++      return;
+     case CLOBBER:
+       if (REG_P (XEXP (x, 0)))
+ 	{
+@@ -544,8 +550,8 @@ gen_expand (rtx expand)
+ 	  || (GET_CODE (next) == PARALLEL
+ 	      && ((GET_CODE (XVECEXP (next, 0, 0)) == SET
+ 		   && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
+-		  || GET_CODE (XVECEXP (next, 0, 0)) == RETURN))
+-	  || GET_CODE (next) == RETURN)
++		  || ANY_RETURN_P (XVECEXP (next, 0, 0))))
++	  || ANY_RETURN_P (next))
+ 	printf ("  emit_jump_insn (");
+       else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
+ 	       || GET_CODE (next) == CALL
+@@ -660,7 +666,7 @@ gen_split (rtx split)
+ 	  || (GET_CODE (next) == PARALLEL
+ 	      && GET_CODE (XVECEXP (next, 0, 0)) == SET
+ 	      && GET_CODE (SET_DEST (XVECEXP (next, 0, 0))) == PC)
+-	  || GET_CODE (next) == RETURN)
++	  || ANY_RETURN_P (next))
+ 	printf ("  emit_jump_insn (");
+       else if ((GET_CODE (next) == SET && GET_CODE (SET_SRC (next)) == CALL)
+ 	       || GET_CODE (next) == CALL
+Index: gcc-4_5-branch/gcc/gengenrtl.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/gengenrtl.c
++++ gcc-4_5-branch/gcc/gengenrtl.c
+@@ -146,6 +146,10 @@ special_rtx (int idx)
+ 	  || strcmp (defs[idx].enumname, "REG") == 0
+ 	  || strcmp (defs[idx].enumname, "SUBREG") == 0
+ 	  || strcmp (defs[idx].enumname, "MEM") == 0
++	  || strcmp (defs[idx].enumname, "PC") == 0
++	  || strcmp (defs[idx].enumname, "CC0") == 0
++	  || strcmp (defs[idx].enumname, "RETURN") == 0
++	  || strcmp (defs[idx].enumname, "SIMPLE_RETURN") == 0
+ 	  || strcmp (defs[idx].enumname, "CONST_VECTOR") == 0);
+ }
+ 
+Index: gcc-4_5-branch/gcc/haifa-sched.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/haifa-sched.c
++++ gcc-4_5-branch/gcc/haifa-sched.c
+@@ -4231,7 +4231,7 @@ xrecalloc (void *p, size_t new_nmemb, si
+ /* Helper function.
+    Find fallthru edge from PRED.  */
+ edge
+-find_fallthru_edge (basic_block pred)
++find_fallthru_edge_from (basic_block pred)
+ {
+   edge e;
+   edge_iterator ei;
+@@ -4298,7 +4298,7 @@ init_before_recovery (basic_block *befor
+   edge e;
+ 
+   last = EXIT_BLOCK_PTR->prev_bb;
+-  e = find_fallthru_edge (last);
++  e = find_fallthru_edge_from (last);
+ 
+   if (e)
+     {
+@@ -5234,6 +5234,11 @@ check_cfg (rtx head, rtx tail)
+ 		    gcc_assert (/* Usual case.  */
+                                 (EDGE_COUNT (bb->succs) > 1
+                                  && !BARRIER_P (NEXT_INSN (head)))
++				/* Special cases, see cfglayout.c:
++				   fixup_reorder_chain.  */
++				|| (EDGE_COUNT (bb->succs) == 1
++				    && (!onlyjump_p (head)
++					|| returnjump_p (head)))
+                                 /* Or jump to the next instruction.  */
+                                 || (EDGE_COUNT (bb->succs) == 1
+                                     && (BB_HEAD (EDGE_I (bb->succs, 0)->dest)
+Index: gcc-4_5-branch/gcc/ifcvt.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/ifcvt.c
++++ gcc-4_5-branch/gcc/ifcvt.c
+@@ -105,7 +105,7 @@ static int find_if_case_1 (basic_block, 
+ static int find_if_case_2 (basic_block, edge, edge);
+ static int find_memory (rtx *, void *);
+ static int dead_or_predicable (basic_block, basic_block, basic_block,
+-			       basic_block, int);
++			       edge, int);
+ static void noce_emit_move_insn (rtx, rtx);
+ static rtx block_has_only_trap (basic_block);
+ 
+@@ -3791,6 +3791,7 @@ find_if_case_1 (basic_block test_bb, edg
+   basic_block then_bb = then_edge->dest;
+   basic_block else_bb = else_edge->dest;
+   basic_block new_bb;
++  rtx else_target = NULL_RTX;
+   int then_bb_index;
+ 
+   /* If we are partitioning hot/cold basic blocks, we don't want to
+@@ -3840,9 +3841,16 @@ find_if_case_1 (basic_block test_bb, edg
+ 				    predictable_edge_p (then_edge)))))
+     return FALSE;
+ 
++  if (else_bb == EXIT_BLOCK_PTR)
++    {
++      rtx jump = BB_END (else_edge->src);
++      gcc_assert (JUMP_P (jump));
++      else_target = JUMP_LABEL (jump);
++    }
++
+   /* Registers set are dead, or are predicable.  */
+   if (! dead_or_predicable (test_bb, then_bb, else_bb,
+-			    single_succ (then_bb), 1))
++			    single_succ_edge (then_bb), 1))
+     return FALSE;
+ 
+   /* Conversion went ok, including moving the insns and fixing up the
+@@ -3859,6 +3867,9 @@ find_if_case_1 (basic_block test_bb, edg
+       redirect_edge_succ (FALLTHRU_EDGE (test_bb), else_bb);
+       new_bb = 0;
+     }
++  else if (else_bb == EXIT_BLOCK_PTR)
++    new_bb = force_nonfallthru_and_redirect (FALLTHRU_EDGE (test_bb),
++					     else_bb, else_target);
+   else
+     new_bb = redirect_edge_and_branch_force (FALLTHRU_EDGE (test_bb),
+ 					     else_bb);
+@@ -3957,7 +3968,7 @@ find_if_case_2 (basic_block test_bb, edg
+     return FALSE;
+ 
+   /* Registers set are dead, or are predicable.  */
+-  if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ->dest, 0))
++  if (! dead_or_predicable (test_bb, else_bb, then_bb, else_succ, 0))
+     return FALSE;
+ 
+   /* Conversion went ok, including moving the insns and fixing up the
+@@ -3995,12 +4006,34 @@ find_memory (rtx *px, void *data ATTRIBU
+ 
+ static int
+ dead_or_predicable (basic_block test_bb, basic_block merge_bb,
+-		    basic_block other_bb, basic_block new_dest, int reversep)
++		    basic_block other_bb, edge dest_edge, int reversep)
+ {
+-  rtx head, end, jump, earliest = NULL_RTX, old_dest, new_label = NULL_RTX;
++  basic_block new_dest = dest_edge->dest;
++  rtx head, end, jump, earliest = NULL_RTX, old_dest;
+   bitmap merge_set = NULL;
+   /* Number of pending changes.  */
+   int n_validated_changes = 0;
++  rtx new_dest_label;
++
++  jump = BB_END (dest_edge->src);
++  if (JUMP_P (jump))
++    {
++      new_dest_label = JUMP_LABEL (jump);
++      if (new_dest_label == NULL_RTX)
++	{
++	  new_dest_label = PATTERN (jump);
++	  gcc_assert (ANY_RETURN_P (new_dest_label));
++	}
++    }
++  else if (other_bb != new_dest)
++    {
++      if (new_dest == EXIT_BLOCK_PTR)
++	new_dest_label = ret_rtx;
++      else
++	new_dest_label = block_label (new_dest);
++    }
++  else
++    new_dest_label = NULL_RTX;
+ 
+   jump = BB_END (test_bb);
+ 
+@@ -4220,10 +4253,9 @@ dead_or_predicable (basic_block test_bb,
+   old_dest = JUMP_LABEL (jump);
+   if (other_bb != new_dest)
+     {
+-      new_label = block_label (new_dest);
+       if (reversep
+-	  ? ! invert_jump_1 (jump, new_label)
+-	  : ! redirect_jump_1 (jump, new_label))
++	  ? ! invert_jump_1 (jump, new_dest_label)
++	  : ! redirect_jump_1 (jump, new_dest_label))
+ 	goto cancel;
+     }
+ 
+@@ -4234,7 +4266,7 @@ dead_or_predicable (basic_block test_bb,
+ 
+   if (other_bb != new_dest)
+     {
+-      redirect_jump_2 (jump, old_dest, new_label, 0, reversep);
++      redirect_jump_2 (jump, old_dest, new_dest_label, 0, reversep);
+ 
+       redirect_edge_succ (BRANCH_EDGE (test_bb), new_dest);
+       if (reversep)
+Index: gcc-4_5-branch/gcc/jump.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/jump.c
++++ gcc-4_5-branch/gcc/jump.c
+@@ -29,7 +29,8 @@ along with GCC; see the file COPYING3.  
+    JUMP_LABEL internal field.  With this we can detect labels that
+    become unused because of the deletion of all the jumps that
+    formerly used them.  The JUMP_LABEL info is sometimes looked
+-   at by later passes.
++   at by later passes.  For return insns, it contains either a
++   RETURN or a SIMPLE_RETURN rtx.
+ 
+    The subroutines redirect_jump and invert_jump are used
+    from other passes as well.  */
+@@ -742,10 +743,10 @@ condjump_p (const_rtx insn)
+     return (GET_CODE (x) == IF_THEN_ELSE
+ 	    && ((GET_CODE (XEXP (x, 2)) == PC
+ 		 && (GET_CODE (XEXP (x, 1)) == LABEL_REF
+-		     || GET_CODE (XEXP (x, 1)) == RETURN))
++		     || ANY_RETURN_P (XEXP (x, 1))))
+ 		|| (GET_CODE (XEXP (x, 1)) == PC
+ 		    && (GET_CODE (XEXP (x, 2)) == LABEL_REF
+-			|| GET_CODE (XEXP (x, 2)) == RETURN))));
++			|| ANY_RETURN_P (XEXP (x, 2))))));
+ }
+ 
+ /* Return nonzero if INSN is a (possibly) conditional jump inside a
+@@ -774,11 +775,11 @@ condjump_in_parallel_p (const_rtx insn)
+     return 0;
+   if (XEXP (SET_SRC (x), 2) == pc_rtx
+       && (GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF
+-	  || GET_CODE (XEXP (SET_SRC (x), 1)) == RETURN))
++	  || ANY_RETURN_P (XEXP (SET_SRC (x), 1)) == RETURN))
+     return 1;
+   if (XEXP (SET_SRC (x), 1) == pc_rtx
+       && (GET_CODE (XEXP (SET_SRC (x), 2)) == LABEL_REF
+-	  || GET_CODE (XEXP (SET_SRC (x), 2)) == RETURN))
++	  || ANY_RETURN_P (XEXP (SET_SRC (x), 2))))
+     return 1;
+   return 0;
+ }
+@@ -840,8 +841,9 @@ any_condjump_p (const_rtx insn)
+   a = GET_CODE (XEXP (SET_SRC (x), 1));
+   b = GET_CODE (XEXP (SET_SRC (x), 2));
+ 
+-  return ((b == PC && (a == LABEL_REF || a == RETURN))
+-	  || (a == PC && (b == LABEL_REF || b == RETURN)));
++  return ((b == PC && (a == LABEL_REF || a == RETURN || a == SIMPLE_RETURN))
++	  || (a == PC
++	      && (b == LABEL_REF || b == RETURN || b == SIMPLE_RETURN)));
+ }
+ 
+ /* Return the label of a conditional jump.  */
+@@ -878,6 +880,7 @@ returnjump_p_1 (rtx *loc, void *data ATT
+   switch (GET_CODE (x))
+     {
+     case RETURN:
++    case SIMPLE_RETURN:
+     case EH_RETURN:
+       return true;
+ 
+@@ -1200,7 +1203,7 @@ delete_related_insns (rtx insn)
+   /* If deleting a jump, decrement the count of the label,
+      and delete the label if it is now unused.  */
+ 
+-  if (JUMP_P (insn) && JUMP_LABEL (insn))
++  if (JUMP_P (insn) && JUMP_LABEL (insn) && !ANY_RETURN_P (JUMP_LABEL (insn)))
+     {
+       rtx lab = JUMP_LABEL (insn), lab_next;
+ 
+@@ -1331,6 +1334,18 @@ delete_for_peephole (rtx from, rtx to)
+      is also an unconditional jump in that case.  */
+ }
+ 
++/* A helper function for redirect_exp_1; examines its input X and returns
++   either a LABEL_REF around a label, or a RETURN if X was NULL.  */
++static rtx
++redirect_target (rtx x)
++{
++  if (x == NULL_RTX)
++    return ret_rtx;
++  if (!ANY_RETURN_P (x))
++    return gen_rtx_LABEL_REF (Pmode, x);
++  return x;
++}
++
+ /* Throughout LOC, redirect OLABEL to NLABEL.  Treat null OLABEL or
+    NLABEL as a return.  Accrue modifications into the change group.  */
+ 
+@@ -1342,37 +1357,19 @@ redirect_exp_1 (rtx *loc, rtx olabel, rt
+   int i;
+   const char *fmt;
+ 
+-  if (code == LABEL_REF)
+-    {
+-      if (XEXP (x, 0) == olabel)
+-	{
+-	  rtx n;
+-	  if (nlabel)
+-	    n = gen_rtx_LABEL_REF (Pmode, nlabel);
+-	  else
+-	    n = gen_rtx_RETURN (VOIDmode);
+-
+-	  validate_change (insn, loc, n, 1);
+-	  return;
+-	}
+-    }
+-  else if (code == RETURN && olabel == 0)
++  if ((code == LABEL_REF && XEXP (x, 0) == olabel)
++      || x == olabel)
+     {
+-      if (nlabel)
+-	x = gen_rtx_LABEL_REF (Pmode, nlabel);
+-      else
+-	x = gen_rtx_RETURN (VOIDmode);
+-      if (loc == &PATTERN (insn))
+-	x = gen_rtx_SET (VOIDmode, pc_rtx, x);
+-      validate_change (insn, loc, x, 1);
++      validate_change (insn, loc, redirect_target (nlabel), 1);
+       return;
+     }
+ 
+-  if (code == SET && nlabel == 0 && SET_DEST (x) == pc_rtx
++  if (code == SET && SET_DEST (x) == pc_rtx
++      && ANY_RETURN_P (nlabel)
+       && GET_CODE (SET_SRC (x)) == LABEL_REF
+       && XEXP (SET_SRC (x), 0) == olabel)
+     {
+-      validate_change (insn, loc, gen_rtx_RETURN (VOIDmode), 1);
++      validate_change (insn, loc, nlabel, 1);
+       return;
+     }
+ 
+@@ -1409,6 +1406,7 @@ redirect_jump_1 (rtx jump, rtx nlabel)
+   int ochanges = num_validated_changes ();
+   rtx *loc, asmop;
+ 
++  gcc_assert (nlabel);
+   asmop = extract_asm_operands (PATTERN (jump));
+   if (asmop)
+     {
+@@ -1430,17 +1428,20 @@ redirect_jump_1 (rtx jump, rtx nlabel)
+    jump target label is unused as a result, it and the code following
+    it may be deleted.
+ 
+-   If NLABEL is zero, we are to turn the jump into a (possibly conditional)
+-   RETURN insn.
++   Normally, NLABEL will be a label, but it may also be a RETURN or
++   SIMPLE_RETURN rtx; in that case we are to turn the jump into a
++   (possibly conditional) return insn.
+ 
+    The return value will be 1 if the change was made, 0 if it wasn't
+-   (this can only occur for NLABEL == 0).  */
++   (this can only occur when trying to produce return insns).  */
+ 
+ int
+ redirect_jump (rtx jump, rtx nlabel, int delete_unused)
+ {
+   rtx olabel = JUMP_LABEL (jump);
+ 
++  gcc_assert (nlabel != NULL_RTX);
++
+   if (nlabel == olabel)
+     return 1;
+ 
+@@ -1452,7 +1453,7 @@ redirect_jump (rtx jump, rtx nlabel, int
+ }
+ 
+ /* Fix up JUMP_LABEL and label ref counts after OLABEL has been replaced with
+-   NLABEL in JUMP.
++   NEW_DEST in JUMP.
+    If DELETE_UNUSED is positive, delete related insn to OLABEL if its ref
+    count has dropped to zero.  */
+ void
+@@ -1468,13 +1469,14 @@ redirect_jump_2 (rtx jump, rtx olabel, r
+      about this.  */
+   gcc_assert (delete_unused >= 0);
+   JUMP_LABEL (jump) = nlabel;
+-  if (nlabel)
++  if (nlabel && !ANY_RETURN_P (nlabel))
+     ++LABEL_NUSES (nlabel);
+ 
+   /* Update labels in any REG_EQUAL note.  */
+   if ((note = find_reg_note (jump, REG_EQUAL, NULL_RTX)) != NULL_RTX)
+     {
+-      if (!nlabel || (invert && !invert_exp_1 (XEXP (note, 0), jump)))
++      if (ANY_RETURN_P (nlabel)
++	  || (invert && !invert_exp_1 (XEXP (note, 0), jump)))
+ 	remove_note (jump, note);
+       else
+ 	{
+@@ -1483,7 +1485,8 @@ redirect_jump_2 (rtx jump, rtx olabel, r
+ 	}
+     }
+ 
+-  if (olabel && --LABEL_NUSES (olabel) == 0 && delete_unused > 0
++  if (olabel && !ANY_RETURN_P (olabel)
++      && --LABEL_NUSES (olabel) == 0 && delete_unused > 0
+       /* Undefined labels will remain outside the insn stream.  */
+       && INSN_UID (olabel))
+     delete_related_insns (olabel);
+Index: gcc-4_5-branch/gcc/opts.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/opts.c
++++ gcc-4_5-branch/gcc/opts.c
+@@ -909,6 +909,7 @@ decode_options (unsigned int argc, const
+   flag_ipa_cp = opt2;
+   flag_ipa_sra = opt2;
+   flag_ee = opt2;
++  flag_shrink_wrap = opt2;
+ 
+   /* Track fields in field-sensitive alias analysis.  */
+   set_param_value ("max-fields-for-field-sensitive",
+Index: gcc-4_5-branch/gcc/print-rtl.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/print-rtl.c
++++ gcc-4_5-branch/gcc/print-rtl.c
+@@ -308,9 +308,16 @@ print_rtx (const_rtx in_rtx)
+ 	      }
+ 	  }
+ 	else if (i == 8 && JUMP_P (in_rtx) && JUMP_LABEL (in_rtx) != NULL)
+-	  /* Output the JUMP_LABEL reference.  */
+-	  fprintf (outfile, "\n%s%*s -> %d", print_rtx_head, indent * 2, "",
+-		   INSN_UID (JUMP_LABEL (in_rtx)));
++	  {
++	    /* Output the JUMP_LABEL reference.  */
++	    fprintf (outfile, "\n%s%*s -> ", print_rtx_head, indent * 2, "");
++	    if (GET_CODE (JUMP_LABEL (in_rtx)) == RETURN)
++	      fprintf (outfile, "return");
++	    else if (GET_CODE (JUMP_LABEL (in_rtx)) == SIMPLE_RETURN)
++	      fprintf (outfile, "simple_return");
++	    else
++	      fprintf (outfile, "%d", INSN_UID (JUMP_LABEL (in_rtx)));
++	  }
+ 	else if (i == 0 && GET_CODE (in_rtx) == VALUE)
+ 	  {
+ #ifndef GENERATOR_FILE
+Index: gcc-4_5-branch/gcc/reorg.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/reorg.c
++++ gcc-4_5-branch/gcc/reorg.c
+@@ -161,8 +161,11 @@ static rtx *unfilled_firstobj;
+ #define unfilled_slots_next	\
+   ((rtx *) obstack_next_free (&unfilled_slots_obstack))
+ 
+-/* Points to the label before the end of the function.  */
+-static rtx end_of_function_label;
++/* Points to the label before the end of the function, or before a
++   return insn.  */
++static rtx function_return_label;
++/* Likewise for a simple_return.  */
++static rtx function_simple_return_label;
+ 
+ /* Mapping between INSN_UID's and position in the code since INSN_UID's do
+    not always monotonically increase.  */
+@@ -175,7 +178,7 @@ static int stop_search_p (rtx, int);
+ static int resource_conflicts_p (struct resources *, struct resources *);
+ static int insn_references_resource_p (rtx, struct resources *, bool);
+ static int insn_sets_resource_p (rtx, struct resources *, bool);
+-static rtx find_end_label (void);
++static rtx find_end_label (rtx);
+ static rtx emit_delay_sequence (rtx, rtx, int);
+ static rtx add_to_delay_list (rtx, rtx);
+ static rtx delete_from_delay_slot (rtx);
+@@ -220,6 +223,15 @@ static void relax_delay_slots (rtx);
+ static void make_return_insns (rtx);
+ #endif
+ 
++/* Return true iff INSN is a simplejump, or any kind of return insn.  */
++
++static bool
++simplejump_or_return_p (rtx insn)
++{
++  return (JUMP_P (insn)
++	  && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
++}
++
+ /* Return TRUE if this insn should stop the search for insn to fill delay
+    slots.  LABELS_P indicates that labels should terminate the search.
+    In all cases, jumps terminate the search.  */
+@@ -335,23 +347,29 @@ insn_sets_resource_p (rtx insn, struct r
+ 
+    ??? There may be a problem with the current implementation.  Suppose
+    we start with a bare RETURN insn and call find_end_label.  It may set
+-   end_of_function_label just before the RETURN.  Suppose the machinery
++   function_return_label just before the RETURN.  Suppose the machinery
+    is able to fill the delay slot of the RETURN insn afterwards.  Then
+-   end_of_function_label is no longer valid according to the property
++   function_return_label is no longer valid according to the property
+    described above and find_end_label will still return it unmodified.
+    Note that this is probably mitigated by the following observation:
+-   once end_of_function_label is made, it is very likely the target of
++   once function_return_label is made, it is very likely the target of
+    a jump, so filling the delay slot of the RETURN will be much more
+    difficult.  */
+ 
+ static rtx
+-find_end_label (void)
++find_end_label (rtx kind)
+ {
+   rtx insn;
++  rtx *plabel;
++
++  if (kind == ret_rtx)
++    plabel = &function_return_label;
++  else
++    plabel = &function_simple_return_label;
+ 
+   /* If we found one previously, return it.  */
+-  if (end_of_function_label)
+-    return end_of_function_label;
++  if (*plabel)
++    return *plabel;
+ 
+   /* Otherwise, see if there is a label at the end of the function.  If there
+      is, it must be that RETURN insns aren't needed, so that is our return
+@@ -366,44 +384,44 @@ find_end_label (void)
+ 
+   /* When a target threads its epilogue we might already have a
+      suitable return insn.  If so put a label before it for the
+-     end_of_function_label.  */
++     function_return_label.  */
+   if (BARRIER_P (insn)
+       && JUMP_P (PREV_INSN (insn))
+-      && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
++      && PATTERN (PREV_INSN (insn)) == kind)
+     {
+       rtx temp = PREV_INSN (PREV_INSN (insn));
+-      end_of_function_label = gen_label_rtx ();
+-      LABEL_NUSES (end_of_function_label) = 0;
++      rtx label = gen_label_rtx ();
++      LABEL_NUSES (label) = 0;
+ 
+       /* Put the label before an USE insns that may precede the RETURN insn.  */
+       while (GET_CODE (temp) == USE)
+ 	temp = PREV_INSN (temp);
+ 
+-      emit_label_after (end_of_function_label, temp);
++      emit_label_after (label, temp);
++      *plabel = label;
+     }
+ 
+   else if (LABEL_P (insn))
+-    end_of_function_label = insn;
++    *plabel = insn;
+   else
+     {
+-      end_of_function_label = gen_label_rtx ();
+-      LABEL_NUSES (end_of_function_label) = 0;
++      rtx label = gen_label_rtx ();
++      LABEL_NUSES (label) = 0;
+       /* If the basic block reorder pass moves the return insn to
+ 	 some other place try to locate it again and put our
+-	 end_of_function_label there.  */
+-      while (insn && ! (JUMP_P (insn)
+-		        && (GET_CODE (PATTERN (insn)) == RETURN)))
++	 function_return_label there.  */
++      while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
+ 	insn = PREV_INSN (insn);
+       if (insn)
+ 	{
+ 	  insn = PREV_INSN (insn);
+ 
+-	  /* Put the label before an USE insns that may proceed the
++	  /* Put the label before an USE insns that may precede the
+ 	     RETURN insn.  */
+ 	  while (GET_CODE (insn) == USE)
+ 	    insn = PREV_INSN (insn);
+ 
+-	  emit_label_after (end_of_function_label, insn);
++	  emit_label_after (label, insn);
+ 	}
+       else
+ 	{
+@@ -413,19 +431,16 @@ find_end_label (void)
+ 	      && ! HAVE_return
+ #endif
+ 	      )
+-	    {
+-	      /* The RETURN insn has its delay slot filled so we cannot
+-		 emit the label just before it.  Since we already have
+-		 an epilogue and cannot emit a new RETURN, we cannot
+-		 emit the label at all.  */
+-	      end_of_function_label = NULL_RTX;
+-	      return end_of_function_label;
+-	    }
++	    /* The RETURN insn has its delay slot filled so we cannot
++	       emit the label just before it.  Since we already have
++	       an epilogue and cannot emit a new RETURN, we cannot
++	       emit the label at all.  */
++	    return NULL_RTX;
+ #endif /* HAVE_epilogue */
+ 
+ 	  /* Otherwise, make a new label and emit a RETURN and BARRIER,
+ 	     if needed.  */
+-	  emit_label (end_of_function_label);
++	  emit_label (label);
+ #ifdef HAVE_return
+ 	  /* We don't bother trying to create a return insn if the
+ 	     epilogue has filled delay-slots; we would have to try and
+@@ -437,19 +452,21 @@ find_end_label (void)
+ 	      /* The return we make may have delay slots too.  */
+ 	      rtx insn = gen_return ();
+ 	      insn = emit_jump_insn (insn);
++	      JUMP_LABEL (insn) = ret_rtx;
+ 	      emit_barrier ();
+ 	      if (num_delay_slots (insn) > 0)
+ 		obstack_ptr_grow (&unfilled_slots_obstack, insn);
+ 	    }
+ #endif
+ 	}
++      *plabel = label;
+     }
+ 
+   /* Show one additional use for this label so it won't go away until
+      we are done.  */
+-  ++LABEL_NUSES (end_of_function_label);
++  ++LABEL_NUSES (*plabel);
+ 
+-  return end_of_function_label;
++  return *plabel;
+ }
+ 
+ /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
+@@ -797,10 +814,8 @@ optimize_skip (rtx insn)
+   if ((next_trial == next_active_insn (JUMP_LABEL (insn))
+        && ! (next_trial == 0 && crtl->epilogue_delay_list != 0))
+       || (next_trial != 0
+-	  && JUMP_P (next_trial)
+-	  && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
+-	  && (simplejump_p (next_trial)
+-	      || GET_CODE (PATTERN (next_trial)) == RETURN)))
++	  && simplejump_or_return_p (next_trial)
++	  && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
+     {
+       if (eligible_for_annul_false (insn, 0, trial, flags))
+ 	{
+@@ -819,13 +834,11 @@ optimize_skip (rtx insn)
+ 	 branch, thread our jump to the target of that branch.  Don't
+ 	 change this into a RETURN here, because it may not accept what
+ 	 we have in the delay slot.  We'll fix this up later.  */
+-      if (next_trial && JUMP_P (next_trial)
+-	  && (simplejump_p (next_trial)
+-	      || GET_CODE (PATTERN (next_trial)) == RETURN))
++      if (next_trial && simplejump_or_return_p (next_trial))
+ 	{
+ 	  rtx target_label = JUMP_LABEL (next_trial);
+-	  if (target_label == 0)
+-	    target_label = find_end_label ();
++	  if (ANY_RETURN_P (target_label))
++	    target_label = find_end_label (target_label);
+ 
+ 	  if (target_label)
+ 	    {
+@@ -866,7 +879,7 @@ get_jump_flags (rtx insn, rtx label)
+   if (JUMP_P (insn)
+       && (condjump_p (insn) || condjump_in_parallel_p (insn))
+       && INSN_UID (insn) <= max_uid
+-      && label != 0
++      && label != 0 && !ANY_RETURN_P (label)
+       && INSN_UID (label) <= max_uid)
+     flags
+       = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
+@@ -1038,7 +1051,7 @@ get_branch_condition (rtx insn, rtx targ
+     pat = XVECEXP (pat, 0, 0);
+ 
+   if (GET_CODE (pat) == RETURN)
+-    return target == 0 ? const_true_rtx : 0;
++    return ANY_RETURN_P (target) ? const_true_rtx : 0;
+ 
+   else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
+     return 0;
+@@ -1318,7 +1331,11 @@ steal_delay_list_from_target (rtx insn, 
+     }
+ 
+   /* Show the place to which we will be branching.  */
+-  *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
++  temp = JUMP_LABEL (XVECEXP (seq, 0, 0));
++  if (ANY_RETURN_P (temp))
++    *pnew_thread = temp;
++  else
++    *pnew_thread = next_active_insn (temp);
+ 
+   /* Add any new insns to the delay list and update the count of the
+      number of slots filled.  */
+@@ -1358,8 +1375,7 @@ steal_delay_list_from_fallthrough (rtx i
+   /* We can't do anything if SEQ's delay insn isn't an
+      unconditional branch.  */
+ 
+-  if (! simplejump_p (XVECEXP (seq, 0, 0))
+-      && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
++  if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
+     return delay_list;
+ 
+   for (i = 1; i < XVECLEN (seq, 0); i++)
+@@ -1827,7 +1843,7 @@ own_thread_p (rtx thread, rtx label, int
+   rtx insn;
+ 
+   /* We don't own the function end.  */
+-  if (thread == 0)
++  if (ANY_RETURN_P (thread))
+     return 0;
+ 
+   /* Get the first active insn, or THREAD, if it is an active insn.  */
+@@ -2245,7 +2261,8 @@ fill_simple_delay_slots (int non_jumps_p
+ 	  && (!JUMP_P (insn)
+ 	      || ((condjump_p (insn) || condjump_in_parallel_p (insn))
+ 		  && ! simplejump_p (insn)
+-		  && JUMP_LABEL (insn) != 0)))
++		  && JUMP_LABEL (insn) != 0
++		  && !ANY_RETURN_P (JUMP_LABEL (insn)))))
+ 	{
+ 	  /* Invariant: If insn is a JUMP_INSN, the insn's jump
+ 	     label.  Otherwise, zero.  */
+@@ -2270,7 +2287,7 @@ fill_simple_delay_slots (int non_jumps_p
+ 		target = JUMP_LABEL (insn);
+ 	    }
+ 
+-	  if (target == 0)
++	  if (target == 0 || ANY_RETURN_P (target))
+ 	    for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
+ 	      {
+ 		next_trial = next_nonnote_insn (trial);
+@@ -2349,6 +2366,7 @@ fill_simple_delay_slots (int non_jumps_p
+ 	      && JUMP_P (trial)
+ 	      && simplejump_p (trial)
+ 	      && (target == 0 || JUMP_LABEL (trial) == target)
++	      && !ANY_RETURN_P (JUMP_LABEL (trial))
+ 	      && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
+ 	      && ! (NONJUMP_INSN_P (next_trial)
+ 		    && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
+@@ -2371,7 +2389,7 @@ fill_simple_delay_slots (int non_jumps_p
+ 	      if (new_label != 0)
+ 		new_label = get_label_before (new_label);
+ 	      else
+-		new_label = find_end_label ();
++		new_label = find_end_label (simple_return_rtx);
+ 
+ 	      if (new_label)
+ 	        {
+@@ -2503,7 +2521,8 @@ fill_simple_delay_slots (int non_jumps_p
+ 
+ /* Follow any unconditional jump at LABEL;
+    return the ultimate label reached by any such chain of jumps.
+-   Return null if the chain ultimately leads to a return instruction.
++   Return a suitable return rtx if the chain ultimately leads to a
++   return instruction.
+    If LABEL is not followed by a jump, return LABEL.
+    If the chain loops or we can't find end, return LABEL,
+    since that tells caller to avoid changing the insn.  */
+@@ -2518,6 +2537,7 @@ follow_jumps (rtx label)
+ 
+   for (depth = 0;
+        (depth < 10
++	&& !ANY_RETURN_P (value)
+ 	&& (insn = next_active_insn (value)) != 0
+ 	&& JUMP_P (insn)
+ 	&& ((JUMP_LABEL (insn) != 0 && any_uncondjump_p (insn)
+@@ -2527,18 +2547,22 @@ follow_jumps (rtx label)
+ 	&& BARRIER_P (next));
+        depth++)
+     {
+-      rtx tem;
++      rtx this_label = JUMP_LABEL (insn);
+ 
+       /* If we have found a cycle, make the insn jump to itself.  */
+-      if (JUMP_LABEL (insn) == label)
++      if (this_label == label)
+ 	return label;
+ 
+-      tem = next_active_insn (JUMP_LABEL (insn));
+-      if (tem && (GET_CODE (PATTERN (tem)) == ADDR_VEC
++      if (!ANY_RETURN_P (this_label))
++	{
++	  rtx tem = next_active_insn (this_label);
++	  if (tem
++	      && (GET_CODE (PATTERN (tem)) == ADDR_VEC
+ 		  || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
+-	break;
++	    break;
++	}
+ 
+-      value = JUMP_LABEL (insn);
++      value = this_label;
+     }
+   if (depth == 10)
+     return label;
+@@ -2901,6 +2925,7 @@ fill_slots_from_thread (rtx insn, rtx co
+      arithmetic insn after the jump insn and put the arithmetic insn in the
+      delay slot.  If we can't do this, return.  */
+   if (delay_list == 0 && likely && new_thread
++      && !ANY_RETURN_P (new_thread)
+       && NONJUMP_INSN_P (new_thread)
+       && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
+       && asm_noperands (PATTERN (new_thread)) < 0)
+@@ -2985,16 +3010,14 @@ fill_slots_from_thread (rtx insn, rtx co
+ 
+       gcc_assert (thread_if_true);
+ 
+-      if (new_thread && JUMP_P (new_thread)
+-	  && (simplejump_p (new_thread)
+-	      || GET_CODE (PATTERN (new_thread)) == RETURN)
++      if (new_thread && simplejump_or_return_p (new_thread)
+ 	  && redirect_with_delay_list_safe_p (insn,
+ 					      JUMP_LABEL (new_thread),
+ 					      delay_list))
+ 	new_thread = follow_jumps (JUMP_LABEL (new_thread));
+ 
+-      if (new_thread == 0)
+-	label = find_end_label ();
++      if (ANY_RETURN_P (new_thread))
++	label = find_end_label (new_thread);
+       else if (LABEL_P (new_thread))
+ 	label = new_thread;
+       else
+@@ -3340,11 +3363,12 @@ relax_delay_slots (rtx first)
+ 	 group of consecutive labels.  */
+       if (JUMP_P (insn)
+ 	  && (condjump_p (insn) || condjump_in_parallel_p (insn))
+-	  && (target_label = JUMP_LABEL (insn)) != 0)
++	  && (target_label = JUMP_LABEL (insn)) != 0
++	  && !ANY_RETURN_P (target_label))
+ 	{
+ 	  target_label = skip_consecutive_labels (follow_jumps (target_label));
+-	  if (target_label == 0)
+-	    target_label = find_end_label ();
++	  if (ANY_RETURN_P (target_label))
++	    target_label = find_end_label (target_label);
+ 
+ 	  if (target_label && next_active_insn (target_label) == next
+ 	      && ! condjump_in_parallel_p (insn))
+@@ -3359,9 +3383,8 @@ relax_delay_slots (rtx first)
+ 	  /* See if this jump conditionally branches around an unconditional
+ 	     jump.  If so, invert this jump and point it to the target of the
+ 	     second jump.  */
+-	  if (next && JUMP_P (next)
++	  if (next && simplejump_or_return_p (next)
+ 	      && any_condjump_p (insn)
+-	      && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
+ 	      && target_label
+ 	      && next_active_insn (target_label) == next_active_insn (next)
+ 	      && no_labels_between_p (insn, next))
+@@ -3403,8 +3426,7 @@ relax_delay_slots (rtx first)
+ 	 Don't do this if we expect the conditional branch to be true, because
+ 	 we would then be making the more common case longer.  */
+ 
+-      if (JUMP_P (insn)
+-	  && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
++      if (simplejump_or_return_p (insn)
+ 	  && (other = prev_active_insn (insn)) != 0
+ 	  && any_condjump_p (other)
+ 	  && no_labels_between_p (other, insn)
+@@ -3445,10 +3467,10 @@ relax_delay_slots (rtx first)
+ 	 Only do so if optimizing for size since this results in slower, but
+ 	 smaller code.  */
+       if (optimize_function_for_size_p (cfun)
+-	  && GET_CODE (PATTERN (delay_insn)) == RETURN
++	  && ANY_RETURN_P (PATTERN (delay_insn))
+ 	  && next
+ 	  && JUMP_P (next)
+-	  && GET_CODE (PATTERN (next)) == RETURN)
++	  && PATTERN (next) == PATTERN (delay_insn))
+ 	{
+ 	  rtx after;
+ 	  int i;
+@@ -3487,14 +3509,16 @@ relax_delay_slots (rtx first)
+ 	continue;
+ 
+       target_label = JUMP_LABEL (delay_insn);
++      if (target_label && ANY_RETURN_P (target_label))
++	continue;
+ 
+       if (target_label)
+ 	{
+ 	  /* If this jump goes to another unconditional jump, thread it, but
+ 	     don't convert a jump into a RETURN here.  */
+ 	  trial = skip_consecutive_labels (follow_jumps (target_label));
+-	  if (trial == 0)
+-	    trial = find_end_label ();
++	  if (ANY_RETURN_P (trial))
++	    trial = find_end_label (trial);
+ 
+ 	  if (trial && trial != target_label
+ 	      && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
+@@ -3517,7 +3541,7 @@ relax_delay_slots (rtx first)
+ 		 later incorrectly compute register live/death info.  */
+ 	      rtx tmp = next_active_insn (trial);
+ 	      if (tmp == 0)
+-		tmp = find_end_label ();
++		tmp = find_end_label (simple_return_rtx);
+ 
+ 	      if (tmp)
+ 	        {
+@@ -3537,14 +3561,12 @@ relax_delay_slots (rtx first)
+ 	     delay list and that insn is redundant, thread the jump.  */
+ 	  if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
+ 	      && XVECLEN (PATTERN (trial), 0) == 2
+-	      && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
+-	      && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
+-		  || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
++	      && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
+ 	      && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
+ 	    {
+ 	      target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
+-	      if (target_label == 0)
+-		target_label = find_end_label ();
++	      if (ANY_RETURN_P (target_label))
++		target_label = find_end_label (target_label);
+ 
+ 	      if (target_label
+ 	          && redirect_with_delay_slots_safe_p (delay_insn, target_label,
+@@ -3622,16 +3644,15 @@ relax_delay_slots (rtx first)
+ 	 a RETURN here.  */
+       if (! INSN_ANNULLED_BRANCH_P (delay_insn)
+ 	  && any_condjump_p (delay_insn)
+-	  && next && JUMP_P (next)
+-	  && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
++	  && next && simplejump_or_return_p (next)
+ 	  && next_active_insn (target_label) == next_active_insn (next)
+ 	  && no_labels_between_p (insn, next))
+ 	{
+ 	  rtx label = JUMP_LABEL (next);
+ 	  rtx old_label = JUMP_LABEL (delay_insn);
+ 
+-	  if (label == 0)
+-	    label = find_end_label ();
++	  if (ANY_RETURN_P (label))
++	    label = find_end_label (label);
+ 
+ 	  /* find_end_label can generate a new label. Check this first.  */
+ 	  if (label
+@@ -3692,7 +3713,8 @@ static void
+ make_return_insns (rtx first)
+ {
+   rtx insn, jump_insn, pat;
+-  rtx real_return_label = end_of_function_label;
++  rtx real_return_label = function_return_label;
++  rtx real_simple_return_label = function_simple_return_label;
+   int slots, i;
+ 
+ #ifdef DELAY_SLOTS_FOR_EPILOGUE
+@@ -3707,18 +3729,25 @@ make_return_insns (rtx first)
+ #endif
+ 
+   /* See if there is a RETURN insn in the function other than the one we
+-     made for END_OF_FUNCTION_LABEL.  If so, set up anything we can't change
++     made for FUNCTION_RETURN_LABEL.  If so, set up anything we can't change
+      into a RETURN to jump to it.  */
+   for (insn = first; insn; insn = NEXT_INSN (insn))
+-    if (JUMP_P (insn) && GET_CODE (PATTERN (insn)) == RETURN)
++    if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
+       {
+-	real_return_label = get_label_before (insn);
++	rtx t = get_label_before (insn);
++	if (PATTERN (insn) == ret_rtx)
++	  real_return_label = t;
++	else
++	  real_simple_return_label = t;
+ 	break;
+       }
+ 
+   /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
+-     was equal to END_OF_FUNCTION_LABEL.  */
+-  LABEL_NUSES (real_return_label)++;
++     was equal to FUNCTION_RETURN_LABEL.  */
++  if (real_return_label)
++    LABEL_NUSES (real_return_label)++;
++  if (real_simple_return_label)
++    LABEL_NUSES (real_simple_return_label)++;
+ 
+   /* Clear the list of insns to fill so we can use it.  */
+   obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
+@@ -3726,13 +3755,27 @@ make_return_insns (rtx first)
+   for (insn = first; insn; insn = NEXT_INSN (insn))
+     {
+       int flags;
++      rtx kind, real_label;
+ 
+       /* Only look at filled JUMP_INSNs that go to the end of function
+ 	 label.  */
+       if (!NONJUMP_INSN_P (insn)
+ 	  || GET_CODE (PATTERN (insn)) != SEQUENCE
+-	  || !JUMP_P (XVECEXP (PATTERN (insn), 0, 0))
+-	  || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
++	  || !JUMP_P (XVECEXP (PATTERN (insn), 0, 0)))
++	continue;
++
++      if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
++	{
++	  kind = ret_rtx;
++	  real_label = real_return_label;
++	}
++      else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
++	       == function_simple_return_label)
++	{
++	  kind = simple_return_rtx;
++	  real_label = real_simple_return_label;
++	}
++      else
+ 	continue;
+ 
+       pat = PATTERN (insn);
+@@ -3740,14 +3783,12 @@ make_return_insns (rtx first)
+ 
+       /* If we can't make the jump into a RETURN, try to redirect it to the best
+ 	 RETURN and go on to the next insn.  */
+-      if (! reorg_redirect_jump (jump_insn, NULL_RTX))
++      if (! reorg_redirect_jump (jump_insn, kind))
+ 	{
+ 	  /* Make sure redirecting the jump will not invalidate the delay
+ 	     slot insns.  */
+-	  if (redirect_with_delay_slots_safe_p (jump_insn,
+-						real_return_label,
+-						insn))
+-	    reorg_redirect_jump (jump_insn, real_return_label);
++	  if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
++	    reorg_redirect_jump (jump_insn, real_label);
+ 	  continue;
+ 	}
+ 
+@@ -3787,7 +3828,7 @@ make_return_insns (rtx first)
+ 	 RETURN, delete the SEQUENCE and output the individual insns,
+ 	 followed by the RETURN.  Then set things up so we try to find
+ 	 insns for its delay slots, if it needs some.  */
+-      if (GET_CODE (PATTERN (jump_insn)) == RETURN)
++      if (ANY_RETURN_P (PATTERN (jump_insn)))
+ 	{
+ 	  rtx prev = PREV_INSN (insn);
+ 
+@@ -3804,13 +3845,16 @@ make_return_insns (rtx first)
+       else
+ 	/* It is probably more efficient to keep this with its current
+ 	   delay slot as a branch to a RETURN.  */
+-	reorg_redirect_jump (jump_insn, real_return_label);
++	reorg_redirect_jump (jump_insn, real_label);
+     }
+ 
+   /* Now delete REAL_RETURN_LABEL if we never used it.  Then try to fill any
+      new delay slots we have created.  */
+-  if (--LABEL_NUSES (real_return_label) == 0)
++  if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
+     delete_related_insns (real_return_label);
++  if (real_simple_return_label != NULL_RTX
++      && --LABEL_NUSES (real_simple_return_label) == 0)
++    delete_related_insns (real_simple_return_label);
+ 
+   fill_simple_delay_slots (1);
+   fill_simple_delay_slots (0);
+@@ -3878,7 +3922,7 @@ dbr_schedule (rtx first)
+   init_resource_info (epilogue_insn);
+ 
+   /* Show we haven't computed an end-of-function label yet.  */
+-  end_of_function_label = 0;
++  function_return_label = function_simple_return_label = NULL_RTX;
+ 
+   /* Initialize the statistics for this function.  */
+   memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
+@@ -3900,11 +3944,23 @@ dbr_schedule (rtx first)
+   /* If we made an end of function label, indicate that it is now
+      safe to delete it by undoing our prior adjustment to LABEL_NUSES.
+      If it is now unused, delete it.  */
+-  if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
+-    delete_related_insns (end_of_function_label);
++  if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
++    delete_related_insns (function_return_label);
++  if (function_simple_return_label
++      && --LABEL_NUSES (function_simple_return_label) == 0)
++    delete_related_insns (function_simple_return_label);
+ 
++#if defined HAVE_return || defined HAVE_simple_return
++  if (
+ #ifdef HAVE_return
+-  if (HAVE_return && end_of_function_label != 0)
++      (HAVE_return && function_return_label != 0)
++#else
++      0
++#endif
++#ifdef HAVE_simple_return
++      || (HAVE_simple_return && function_simple_return_label != 0)
++#endif
++      )
+     make_return_insns (first);
+ #endif
+ 
+Index: gcc-4_5-branch/gcc/resource.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/resource.c
++++ gcc-4_5-branch/gcc/resource.c
+@@ -495,6 +495,8 @@ find_dead_or_set_registers (rtx target, 
+ 		  || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
+ 		{
+ 		  next = JUMP_LABEL (this_jump_insn);
++		  if (next && ANY_RETURN_P (next))
++		    next = NULL_RTX;
+ 		  if (jump_insn == 0)
+ 		    {
+ 		      jump_insn = insn;
+@@ -562,9 +564,10 @@ find_dead_or_set_registers (rtx target, 
+ 		  AND_COMPL_HARD_REG_SET (scratch, needed.regs);
+ 		  AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
+ 
+-		  find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
+-					      &target_res, 0, jump_count,
+-					      target_set, needed);
++		  if (!ANY_RETURN_P (JUMP_LABEL (this_jump_insn)))
++		    find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
++						&target_res, 0, jump_count,
++						target_set, needed);
+ 		  find_dead_or_set_registers (next,
+ 					      &fallthrough_res, 0, jump_count,
+ 					      set, needed);
+@@ -1097,6 +1100,8 @@ mark_target_live_regs (rtx insns, rtx ta
+       struct resources new_resources;
+       rtx stop_insn = next_active_insn (jump_insn);
+ 
++      if (jump_target && ANY_RETURN_P (jump_target))
++	jump_target = NULL_RTX;
+       mark_target_live_regs (insns, next_active_insn (jump_target),
+ 			     &new_resources);
+       CLEAR_RESOURCE (&set);
+Index: gcc-4_5-branch/gcc/rtl.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/rtl.c
++++ gcc-4_5-branch/gcc/rtl.c
+@@ -256,6 +256,8 @@ copy_rtx (rtx orig)
+     case CODE_LABEL:
+     case PC:
+     case CC0:
++    case RETURN:
++    case SIMPLE_RETURN:
+     case SCRATCH:
+       /* SCRATCH must be shared because they represent distinct values.  */
+       return orig;
+Index: gcc-4_5-branch/gcc/rtl.def
+===================================================================
+--- gcc-4_5-branch.orig/gcc/rtl.def
++++ gcc-4_5-branch/gcc/rtl.def
+@@ -296,6 +296,10 @@ DEF_RTL_EXPR(CALL, "call", "ee", RTX_EXT
+ 
+ DEF_RTL_EXPR(RETURN, "return", "", RTX_EXTRA)
+ 
++/* A plain return, to be used on paths that are reached without going
++   through the function prologue.  */
++DEF_RTL_EXPR(SIMPLE_RETURN, "simple_return", "", RTX_EXTRA)
++
+ /* Special for EH return from subroutine.  */
+ 
+ DEF_RTL_EXPR(EH_RETURN, "eh_return", "", RTX_EXTRA)
+Index: gcc-4_5-branch/gcc/rtl.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/rtl.h
++++ gcc-4_5-branch/gcc/rtl.h
+@@ -411,6 +411,10 @@ struct GTY(()) rtvec_def {
+   (JUMP_P (INSN) && (GET_CODE (PATTERN (INSN)) == ADDR_VEC || \
+ 		     GET_CODE (PATTERN (INSN)) == ADDR_DIFF_VEC))
+ 
++/* Predicate yielding nonzero iff X is a return or simple_preturn.  */
++#define ANY_RETURN_P(X) \
++  (GET_CODE (X) == RETURN || GET_CODE (X) == SIMPLE_RETURN)
++
+ /* 1 if X is a unary operator.  */
+ 
+ #define UNARY_P(X)   \
+@@ -1998,6 +2002,8 @@ enum global_rtl_index
+ {
+   GR_PC,
+   GR_CC0,
++  GR_RETURN,
++  GR_SIMPLE_RETURN,
+   GR_STACK_POINTER,
+   GR_FRAME_POINTER,
+ /* For register elimination to work properly these hard_frame_pointer_rtx,
+@@ -2032,6 +2038,8 @@ extern GTY(()) rtx global_rtl[GR_MAX];
+ 
+ /* Standard pieces of rtx, to be substituted directly into things.  */
+ #define pc_rtx                  (global_rtl[GR_PC])
++#define ret_rtx                 (global_rtl[GR_RETURN])
++#define simple_return_rtx       (global_rtl[GR_SIMPLE_RETURN])
+ #define cc0_rtx                 (global_rtl[GR_CC0])
+ 
+ /* All references to certain hard regs, except those created
+Index: gcc-4_5-branch/gcc/rtlanal.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/rtlanal.c
++++ gcc-4_5-branch/gcc/rtlanal.c
+@@ -2673,6 +2673,7 @@ tablejump_p (const_rtx insn, rtx *labelp
+ 
+   if (JUMP_P (insn)
+       && (label = JUMP_LABEL (insn)) != NULL_RTX
++      && !ANY_RETURN_P (label)
+       && (table = next_active_insn (label)) != NULL_RTX
+       && JUMP_TABLE_DATA_P (table))
+     {
+Index: gcc-4_5-branch/gcc/sched-int.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/sched-int.h
++++ gcc-4_5-branch/gcc/sched-int.h
+@@ -199,7 +199,7 @@ extern int max_issue (struct ready_list 
+ 
+ extern void ebb_compute_jump_reg_dependencies (rtx, regset, regset, regset);
+ 
+-extern edge find_fallthru_edge (basic_block);
++extern edge find_fallthru_edge_from (basic_block);
+ 
+ extern void (* sched_init_only_bb) (basic_block, basic_block);
+ extern basic_block (* sched_split_block) (basic_block, rtx);
+Index: gcc-4_5-branch/gcc/sched-vis.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/sched-vis.c
++++ gcc-4_5-branch/gcc/sched-vis.c
+@@ -549,6 +549,9 @@ print_pattern (char *buf, const_rtx x, i
+     case RETURN:
+       sprintf (buf, "return");
+       break;
++    case SIMPLE_RETURN:
++      sprintf (buf, "simple_return");
++      break;
+     case CALL:
+       print_exp (buf, x, verbose);
+       break;
+Index: gcc-4_5-branch/gcc/sel-sched-ir.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/sel-sched-ir.c
++++ gcc-4_5-branch/gcc/sel-sched-ir.c
+@@ -686,7 +686,7 @@ merge_fences (fence_t f, insn_t insn,
+ 
+       /* Find fallthrough edge.  */
+       gcc_assert (BLOCK_FOR_INSN (insn)->prev_bb);
+-      candidate = find_fallthru_edge (BLOCK_FOR_INSN (insn)->prev_bb);
++      candidate = find_fallthru_edge_from (BLOCK_FOR_INSN (insn)->prev_bb);
+ 
+       if (!candidate
+           || (candidate->src != BLOCK_FOR_INSN (last_scheduled_insn)
+Index: gcc-4_5-branch/gcc/sel-sched.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/sel-sched.c
++++ gcc-4_5-branch/gcc/sel-sched.c
+@@ -617,8 +617,8 @@ in_fallthru_bb_p (rtx insn, rtx succ)
+   if (bb == BLOCK_FOR_INSN (succ))
+     return true;
+ 
+-  if (find_fallthru_edge (bb))
+-    bb = find_fallthru_edge (bb)->dest;
++  if (find_fallthru_edge_from (bb))
++    bb = find_fallthru_edge_from (bb)->dest;
+   else
+     return false;
+ 
+@@ -4911,7 +4911,7 @@ move_cond_jump (rtx insn, bnd_t bnd)
+   next = PREV_INSN (insn);
+   BND_TO (bnd) = insn;
+ 
+-  ft_edge = find_fallthru_edge (block_from);
++  ft_edge = find_fallthru_edge_from (block_from);
+   block_next = ft_edge->dest;
+   /* There must be a fallthrough block (or where should go
+   control flow in case of false jump predicate otherwise?).  */
+Index: gcc-4_5-branch/gcc/vec.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/vec.h
++++ gcc-4_5-branch/gcc/vec.h
+@@ -188,6 +188,18 @@ along with GCC; see the file COPYING3.  
+ 
+ #define VEC_iterate(T,V,I,P)	(VEC_OP(T,base,iterate)(VEC_BASE(V),I,&(P)))
+ 
++/* Convenience macro for forward iteration.  */
++
++#define FOR_EACH_VEC_ELT(T, V, I, P)		\
++  for (I = 0; VEC_iterate (T, (V), (I), (P)); ++(I))
++
++/* Convenience macro for reverse iteration.  */
++
++#define FOR_EACH_VEC_ELT_REVERSE(T,V,I,P) \
++  for (I = VEC_length (T, (V)) - 1;           \
++       VEC_iterate (T, (V), (I), (P));	  \
++       (I)--)
++
+ /* Allocate new vector.
+    VEC(T,A) *VEC_T_A_alloc(int reserve);
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
new file mode 100644
index 0000000000..aa9d6aa368
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99475.patch
@@ -0,0 +1,4217 @@
+2011-02-08  Andrew Stubbs  <ams@codesourcery.com>
+
+	Backport from FSF mainline:
+
+	2010-06-30  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/44721
+	* config/i386/i386.md (peephole2 for arithmetic ops with memory):
+	Fix last commit.
+
+	2010-06-30  Richard Guenther  <rguenther@suse.de>
+
+	PR target/44722
+	* config/i386/i386.md (peephole2 for fix:SSEMODEI24): Guard
+	against oscillation with reverse peephole2.
+
+	2010-07-01  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/44727
+	* config/i386/i386.md (peephole2 for arithmetic ops with memory):
+	Make sure operand 0 dies.
+
+2010-12-03  Yao Qi  <yao@codesourcery.com>
+
+	* config/arm/arm-ldmstm.ml: Rewrite ldm/stm RTL patterns to fix
+	regressions.
+	* config/arm/ldmstm.md: Regenreate.
+
+2010-12-03  Yao Qi  <yao@codesourcery.com>
+
+	Backport from FSF mainline:
+
+	2010-08-02  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR target/40457
+	* config/arm/arm.h (arm_regs_in_sequence): Declare.
+	* config/arm/arm-protos.h (emit_ldm_seq, emit_stm_seq,
+	load_multiple_sequence, store_multiple_sequence): Delete
+	declarations.
+	(arm_gen_load_multiple, arm_gen_store_multiple): Adjust
+	declarations.
+	* config/arm/ldmstm.md: New file.
+	* config/arm/arm.c (arm_regs_in_sequence): New array.
+	(load_multiple_sequence): Now static.  New args SAVED_ORDER,
+	CHECK_REGS.  All callers changed.
+	If SAVED_ORDER is nonnull, copy the computed order into it.
+	If CHECK_REGS is false, don't sort REGS.  Handle Thumb mode.
+	(store_multiple_sequence): Now static.  New args NOPS_TOTAL,
+	SAVED_ORDER, REG_RTXS and CHECK_REGS.  All callers changed.
+	If SAVED_ORDER is nonnull, copy the computed order into it.
+	If CHECK_REGS is false, don't sort REGS.  Set up REG_RTXS just
+	like REGS.  Handle Thumb mode.
+	(arm_gen_load_multiple_1): New function, broken out of
+	arm_gen_load_multiple.
+	(arm_gen_store_multiple_1): New function, broken out of
+	arm_gen_store_multiple.
+	(arm_gen_multiple_op): New function, with code from
+	arm_gen_load_multiple and arm_gen_store_multiple moved here.
+	(arm_gen_load_multiple, arm_gen_store_multiple): Now just
+	wrappers around arm_gen_multiple_op.  Remove argument UP, all callers
+	changed.
+	(gen_ldm_seq, gen_stm_seq, gen_const_stm_seq): New functions.
+	* config/arm/predicates.md (commutative_binary_operator): New.
+	(load_multiple_operation, store_multiple_operation): Handle more
+	variants of these patterns with different starting offsets.  Handle
+	Thumb-1.
+	* config/arm/arm.md: Include "ldmstm.md".
+	(ldmsi_postinc4, ldmsi_postinc4_thumb1, ldmsi_postinc3, ldmsi_postinc2,
+	ldmsi4, ldmsi3, ldmsi2, stmsi_postinc4, stmsi_postinc4_thumb1,
+	stmsi_postinc3, stmsi_postinc2, stmsi4, stmsi3, stmsi2 and related
+	peepholes): Delete.
+	* config/arm/ldmstm.md: New file.
+	* config/arm/arm-ldmstm.ml: New file.
+
+	* config/arm/arm.c (arm_rtx_costs_1): Remove second clause from the
+	if statement which adds extra costs to frame-related expressions.
+
+	2010-05-06  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* config/arm/arm.h (MAX_LDM_STM_OPS): New macro.
+	* config/arm/arm.c (multiple_operation_profitable_p,
+	compute_offset_order): New static functions.
+	(load_multiple_sequence, store_multiple_sequence): Use them.
+	Replace constant 4 with MAX_LDM_STM_OPS.  Compute order[0] from
+	memory offsets, not register numbers.
+	(emit_ldm_seq, emit_stm_seq): Replace constant 4 with MAX_LDM_STM_OPS.
+
+	2010-04-16  Bernd Schmidt  <bernds@codesourcery.com>
+
+	* recog.h (struct recog_data): New field is_operator.
+	(struct insn_operand_data): New field is_operator.
+	* recog.c (extract_insn): Set recog_data.is_operator.
+	* genoutput.c (output_operand_data): Emit code to set the
+	is_operator field.
+	* reload.c (find_reloads): Use it rather than testing for an
+	empty constraint string.
+
+=== added file 'gcc/config/arm/arm-ldmstm.ml'
+Index: gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/config/arm/arm-ldmstm.ml
+@@ -0,0 +1,333 @@
++(* Auto-generate ARM ldm/stm patterns
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by CodeSourcery.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it under
++   the terms of the GNU General Public License as published by the Free
++   Software Foundation; either version 3, or (at your option) any later
++   version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT ANY
++   WARRANTY; without even the implied warranty of MERCHANTABILITY or
++   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
++   for more details.
++
++   You should have received a copy of the GNU General Public License
++   along with GCC; see the file COPYING3.  If not see
++   <http://www.gnu.org/licenses/>.
++
++   This is an O'Caml program.  The O'Caml compiler is available from:
++
++     http://caml.inria.fr/
++
++   Or from your favourite OS's friendly packaging system. Tested with version
++   3.09.2, though other versions will probably work too.
++
++   Run with:
++     ocaml arm-ldmstm.ml >/path/to/gcc/config/arm/ldmstm.ml
++*)
++
++type amode = IA | IB | DA | DB
++
++type optype = IN | OUT | INOUT
++
++let rec string_of_addrmode addrmode =
++  match addrmode with
++    IA -> "ia" | IB -> "ib" | DA -> "da" | DB -> "db"
++
++let rec initial_offset addrmode nregs =
++  match addrmode with
++    IA -> 0
++  | IB -> 4
++  | DA -> -4 * nregs + 4
++  | DB -> -4 * nregs
++
++let rec final_offset addrmode nregs =
++  match addrmode with
++    IA -> nregs * 4
++  | IB -> nregs * 4
++  | DA -> -4 * nregs
++  | DB -> -4 * nregs
++
++let constr thumb =
++  if thumb then "l" else "rk"
++
++let inout_constr op_type =
++  match op_type with
++  OUT -> "="
++  | INOUT -> "+&"
++  | IN -> ""
++
++let destreg nregs first op_type thumb =
++  if not first then
++    Printf.sprintf "(match_dup %d)" (nregs)
++  else
++    Printf.sprintf ("(match_operand:SI %d \"s_register_operand\" \"%s%s\")")
++    (nregs) (inout_constr op_type) (constr thumb)
++
++let write_ldm_set thumb nregs offset opnr first =
++  let indent = "     " in
++  Printf.printf "%s" (if first then "    [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"arm_hard_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (mem:SI " indent;
++  begin if offset != 0 then Printf.printf "(plus:SI " end;
++  Printf.printf "%s" (destreg nregs first IN thumb);
++  begin if offset != 0 then Printf.printf "\n%s             (const_int %d))" indent offset end;
++  Printf.printf "))"
++
++let write_stm_set thumb nregs offset opnr first =
++  let indent = "     " in
++  Printf.printf "%s" (if first then "    [" else indent);
++  Printf.printf "(set (mem:SI ";
++  begin if offset != 0 then Printf.printf "(plus:SI " end;
++  Printf.printf "%s" (destreg nregs first IN thumb);
++  begin if offset != 0 then Printf.printf " (const_int %d))" offset end;
++  Printf.printf ")\n%s     (match_operand:SI %d \"arm_hard_register_operand\" \"\"))" indent opnr 
++
++let write_ldm_peep_set extra_indent nregs opnr first =
++  let indent = "   " ^ extra_indent in
++  Printf.printf "%s" (if first then extra_indent ^ "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"s_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (match_operand:SI %d \"memory_operand\" \"\"))" indent (nregs + opnr)
++
++let write_stm_peep_set extra_indent nregs opnr first =
++  let indent = "   " ^ extra_indent in
++  Printf.printf "%s" (if first then extra_indent ^ "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"memory_operand\" \"\")\n" (nregs + opnr);
++  Printf.printf "%s     (match_operand:SI %d \"s_register_operand\" \"\"))" indent opnr
++
++let write_any_load optype nregs opnr first =
++  let indent = "   " in
++  Printf.printf "%s" (if first then "  [" else indent);
++  Printf.printf "(set (match_operand:SI %d \"s_register_operand\" \"\")\n" opnr;
++  Printf.printf "%s     (match_operand:SI %d \"%s\" \"\"))" indent (nregs * 2 + opnr) optype
++
++let write_const_store nregs opnr first =
++  let indent = "   " in
++  Printf.printf "%s(set (match_operand:SI %d \"memory_operand\" \"\")\n" indent (nregs + opnr);
++  Printf.printf "%s     (match_dup %d))" indent opnr
++
++let write_const_stm_peep_set nregs opnr first =
++  write_any_load "const_int_operand" nregs opnr first;
++  Printf.printf "\n";
++  write_const_store nregs opnr false
++
++  
++let rec write_pat_sets func opnr offset first n_left =
++  func offset opnr first;
++  begin
++    if n_left > 1 then begin
++      Printf.printf "\n";
++      write_pat_sets func (opnr + 1) (offset + 4) false (n_left - 1);
++    end else
++      Printf.printf "]"
++  end
++
++let rec write_peep_sets func opnr first n_left =
++  func opnr first;
++  begin
++    if n_left > 1 then begin
++      Printf.printf "\n";
++      write_peep_sets func (opnr + 1) false (n_left - 1);
++    end
++  end
++    
++let can_thumb addrmode update is_store =
++  match addrmode, update, is_store with
++    (* Thumb1 mode only supports IA with update.  However, for LDMIA,
++       if the address register also appears in the list of loaded
++       registers, the loaded value is stored, hence the RTL pattern
++       to describe such an insn does not have an update.  We check
++       in the match_parallel predicate that the condition described
++       above is met.  *)
++    IA, _, false -> true
++  | IA, true, true -> true
++  | _ -> false
++
++let target addrmode thumb =
++  match addrmode, thumb with
++    IA, true -> "TARGET_THUMB1"
++  | IA, false -> "TARGET_32BIT"
++  | DB, false -> "TARGET_32BIT"
++  | _, false -> "TARGET_ARM"
++
++let write_pattern_1 name ls addrmode nregs write_set_fn update thumb =
++  let astr = string_of_addrmode addrmode in
++  Printf.printf "(define_insn \"*%s%s%d_%s%s\"\n"
++    (if thumb then "thumb_" else "") name nregs astr
++    (if update then "_update" else "");
++  Printf.printf "  [(match_parallel 0 \"%s_multiple_operation\"\n" ls;
++  begin
++    if update then begin
++      Printf.printf "    [(set %s\n          (plus:SI "
++	(destreg 1 true OUT thumb); (*destreg 2 true IN thumb*)
++      Printf.printf "(match_operand:SI 2 \"s_register_operand\" \"1\")";
++      Printf.printf " (const_int %d)))\n"
++	(final_offset addrmode nregs)
++    end
++  end;
++  write_pat_sets
++    (write_set_fn thumb (if update then 2 else 1)) (if update then 3 else 2)
++    (initial_offset addrmode nregs)
++    (not update) nregs;
++  Printf.printf ")]\n  \"%s && XVECLEN (operands[0], 0) == %d\"\n"
++    (target addrmode thumb)
++    (if update then nregs + 1 else nregs);
++  Printf.printf "  \"%s%%(%s%%)\\t%%%d%s, {"
++    name astr (1) (if update then "!" else "");
++  for n = 1 to nregs; do
++    Printf.printf "%%%d%s" (n+(if update then 2 else 1)) (if n < nregs then ", " else "")
++  done;
++  Printf.printf "}\"\n";
++  Printf.printf "  [(set_attr \"type\" \"%s%d\")" ls nregs;
++  begin if not thumb then
++    Printf.printf "\n   (set_attr \"predicable\" \"yes\")";
++  end;
++  Printf.printf "])\n\n"
++
++let write_ldm_pattern addrmode nregs update =
++  write_pattern_1 "ldm" "load" addrmode nregs write_ldm_set update false;
++  begin if can_thumb addrmode update false then
++    write_pattern_1 "ldm" "load" addrmode nregs write_ldm_set update true;
++  end
++
++let write_stm_pattern addrmode nregs update =
++  write_pattern_1 "stm" "store" addrmode nregs write_stm_set update false;
++  begin if can_thumb addrmode update true then
++    write_pattern_1 "stm" "store" addrmode nregs write_stm_set update true;
++  end
++
++let write_ldm_commutative_peephole thumb =
++  let nregs = 2 in
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_ldm_peep_set "" nregs) 0 true nregs;
++  let indent = "   " in
++  if thumb then begin
++    Printf.printf "\n%s(set (match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2);
++    Printf.printf "%s     (match_operator:SI %d \"commutative_binary_operator\"\n" indent (nregs * 2 + 1);
++    Printf.printf "%s      [(match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2 + 2);
++    Printf.printf "%s       (match_operand:SI %d \"s_register_operand\" \"\")]))]\n" indent (nregs * 2 + 3)
++  end else begin
++    Printf.printf "\n%s(parallel\n" indent;
++    Printf.printf "%s  [(set (match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2);
++    Printf.printf "%s        (match_operator:SI %d \"commutative_binary_operator\"\n" indent (nregs * 2 + 1);
++    Printf.printf "%s         [(match_operand:SI %d \"s_register_operand\" \"\")\n" indent (nregs * 2 + 2);
++    Printf.printf "%s          (match_operand:SI %d \"s_register_operand\" \"\")]))\n" indent (nregs * 2 + 3);
++    Printf.printf "%s   (clobber (reg:CC CC_REGNUM))])]\n" indent
++  end;
++  Printf.printf "  \"(((operands[%d] == operands[0] && operands[%d] == operands[1])\n" (nregs * 2 + 2) (nregs * 2 + 3);
++  Printf.printf "     || (operands[%d] == operands[0] && operands[%d] == operands[1]))\n" (nregs * 2 + 3) (nregs * 2 + 2);
++  Printf.printf "    && peep2_reg_dead_p (%d, operands[0]) && peep2_reg_dead_p (%d, operands[1]))\"\n" (nregs + 1) (nregs + 1);
++  begin
++    if thumb then
++      Printf.printf "  [(set (match_dup %d) (match_op_dup %d [(match_dup %d) (match_dup %d)]))]\n"
++	(nregs * 2) (nregs * 2 + 1) (nregs * 2 + 2) (nregs * 2 + 3)
++    else begin
++      Printf.printf "  [(parallel\n";
++      Printf.printf "    [(set (match_dup %d) (match_op_dup %d [(match_dup %d) (match_dup %d)]))\n"
++	(nregs * 2) (nregs * 2 + 1) (nregs * 2 + 2) (nregs * 2 + 3);
++      Printf.printf "     (clobber (reg:CC CC_REGNUM))])]\n"
++    end
++  end;
++  Printf.printf "{\n  if (!gen_ldm_seq (operands, %d, true))\n    FAIL;\n" nregs;
++  Printf.printf "})\n\n"
++
++let write_ldm_peephole nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_ldm_peep_set "" nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_ldm_seq (operands, %d, false))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_ldm_peephole_b nregs =
++  if nregs > 2 then begin
++    Printf.printf "(define_peephole2\n";
++    write_ldm_peep_set "" nregs 0 true;
++    Printf.printf "\n   (parallel\n";
++    write_peep_sets (write_ldm_peep_set "  " nregs) 1 true (nregs - 1);
++    Printf.printf "])]\n  \"\"\n  [(const_int 0)]\n{\n";
++    Printf.printf "  if (gen_ldm_seq (operands, %d, false))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++  end
++
++let write_stm_peephole nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_stm_peep_set "" nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_stm_peephole_b nregs =
++  if nregs > 2 then begin
++    Printf.printf "(define_peephole2\n";
++    write_stm_peep_set "" nregs 0 true;
++    Printf.printf "\n   (parallel\n";
++    write_peep_sets (write_stm_peep_set "" nregs) 1 true (nregs - 1);
++    Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++    Printf.printf "  if (gen_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++  end
++
++let write_const_stm_peephole_a nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_const_stm_peep_set nregs) 0 true nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_const_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let write_const_stm_peephole_b nregs =
++  Printf.printf "(define_peephole2\n";
++  write_peep_sets (write_any_load "const_int_operand" nregs) 0 true nregs;
++  Printf.printf "\n";
++  write_peep_sets (write_const_store nregs) 0 false nregs;
++  Printf.printf "]\n  \"\"\n  [(const_int 0)]\n{\n";
++  Printf.printf "  if (gen_const_stm_seq (operands, %d))\n    DONE;\n  else\n    FAIL;\n})\n\n" nregs
++
++let patterns () =
++  let addrmodes = [ IA; IB; DA; DB ]  in
++  let sizes = [ 4; 3; 2] in
++  List.iter
++    (fun n ->
++      List.iter
++	(fun addrmode ->
++	  write_ldm_pattern addrmode n false;
++	  write_ldm_pattern addrmode n true;
++	  write_stm_pattern addrmode n false;
++	  write_stm_pattern addrmode n true)
++	addrmodes;
++      write_ldm_peephole n;
++      write_ldm_peephole_b n;
++      write_const_stm_peephole_a n;
++      write_const_stm_peephole_b n;
++      write_stm_peephole n;)
++    sizes;
++  write_ldm_commutative_peephole false;
++  write_ldm_commutative_peephole true
++
++let print_lines = List.iter (fun s -> Format.printf "%s@\n" s)
++
++(* Do it.  *)
++
++let _ = 
++  print_lines [
++"/* ARM ldm/stm instruction patterns.  This file was automatically generated";
++"   using arm-ldmstm.ml.  Please do not edit manually.";
++"";
++"   Copyright (C) 2010 Free Software Foundation, Inc.";
++"   Contributed by CodeSourcery.";
++"";
++"   This file is part of GCC.";
++"";
++"   GCC is free software; you can redistribute it and/or modify it";
++"   under the terms of the GNU General Public License as published";
++"   by the Free Software Foundation; either version 3, or (at your";
++"   option) any later version.";
++"";
++"   GCC is distributed in the hope that it will be useful, but WITHOUT";
++"   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY";
++"   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public";
++"   License for more details.";
++"";
++"   You should have received a copy of the GNU General Public License and";
++"   a copy of the GCC Runtime Library Exception along with this program;";
++"   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see";
++"   <http://www.gnu.org/licenses/>.  */";
++""];
++  patterns ();
+Index: gcc-4_5-branch/gcc/config/arm/arm-protos.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm-protos.h
++++ gcc-4_5-branch/gcc/config/arm/arm-protos.h
+@@ -100,14 +100,11 @@ extern int symbol_mentioned_p (rtx);
+ extern int label_mentioned_p (rtx);
+ extern RTX_CODE minmax_code (rtx);
+ extern int adjacent_mem_locations (rtx, rtx);
+-extern int load_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+-extern const char *emit_ldm_seq (rtx *, int);
+-extern int store_multiple_sequence (rtx *, int, int *, int *, HOST_WIDE_INT *);
+-extern const char * emit_stm_seq (rtx *, int);
+-extern rtx arm_gen_load_multiple (int, int, rtx, int, int,
+-				  rtx, HOST_WIDE_INT *);
+-extern rtx arm_gen_store_multiple (int, int, rtx, int, int,
+-				   rtx, HOST_WIDE_INT *);
++extern bool gen_ldm_seq (rtx *, int, bool);
++extern bool gen_stm_seq (rtx *, int);
++extern bool gen_const_stm_seq (rtx *, int);
++extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
++extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
+ extern int arm_gen_movmemqi (rtx *);
+ extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
+ extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
+Index: gcc-4_5-branch/gcc/config/arm/arm.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.c
++++ gcc-4_5-branch/gcc/config/arm/arm.c
+@@ -753,6 +753,12 @@ static const char * const arm_condition_
+   "hi", "ls", "ge", "lt", "gt", "le", "al", "nv"
+ };
+ 
++/* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
++int arm_regs_in_sequence[] =
++{
++  0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
++};
++
+ #define ARM_LSL_NAME (TARGET_UNIFIED_ASM ? "lsl" : "asl")
+ #define streq(string1, string2) (strcmp (string1, string2) == 0)
+ 
+@@ -9680,24 +9686,125 @@ adjacent_mem_locations (rtx a, rtx b)
+   return 0;
+ }
+ 
+-int
+-load_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+-			HOST_WIDE_INT *load_offset)
++
++/* Return true iff it would be profitable to turn a sequence of NOPS loads
++   or stores (depending on IS_STORE) into a load-multiple or store-multiple
++   instruction.  ADD_OFFSET is nonzero if the base address register needs
++   to be modified with an add instruction before we can use it.  */
++
++static bool
++multiple_operation_profitable_p (bool is_store ATTRIBUTE_UNUSED,
++				 int nops, HOST_WIDE_INT add_offset)
++ {
++  /* For ARM8,9 & StrongARM, 2 ldr instructions are faster than an ldm
++     if the offset isn't small enough.  The reason 2 ldrs are faster
++     is because these ARMs are able to do more than one cache access
++     in a single cycle.  The ARM9 and StrongARM have Harvard caches,
++     whilst the ARM8 has a double bandwidth cache.  This means that
++     these cores can do both an instruction fetch and a data fetch in
++     a single cycle, so the trick of calculating the address into a
++     scratch register (one of the result regs) and then doing a load
++     multiple actually becomes slower (and no smaller in code size).
++     That is the transformation
++
++ 	ldr	rd1, [rbase + offset]
++ 	ldr	rd2, [rbase + offset + 4]
++
++     to
++
++ 	add	rd1, rbase, offset
++ 	ldmia	rd1, {rd1, rd2}
++
++     produces worse code -- '3 cycles + any stalls on rd2' instead of
++     '2 cycles + any stalls on rd2'.  On ARMs with only one cache
++     access per cycle, the first sequence could never complete in less
++     than 6 cycles, whereas the ldm sequence would only take 5 and
++     would make better use of sequential accesses if not hitting the
++     cache.
++
++     We cheat here and test 'arm_ld_sched' which we currently know to
++     only be true for the ARM8, ARM9 and StrongARM.  If this ever
++     changes, then the test below needs to be reworked.  */
++  if (nops == 2 && arm_ld_sched && add_offset != 0)
++    return false;
++
++  return true;
++}
++
++/* Subroutine of load_multiple_sequence and store_multiple_sequence.
++   Given an array of UNSORTED_OFFSETS, of which there are NOPS, compute
++   an array ORDER which describes the sequence to use when accessing the
++   offsets that produces an ascending order.  In this sequence, each
++   offset must be larger by exactly 4 than the previous one.  ORDER[0]
++   must have been filled in with the lowest offset by the caller.
++   If UNSORTED_REGS is nonnull, it is an array of register numbers that
++   we use to verify that ORDER produces an ascending order of registers.
++   Return true if it was possible to construct such an order, false if
++   not.  */
++
++static bool
++compute_offset_order (int nops, HOST_WIDE_INT *unsorted_offsets, int *order,
++		      int *unsorted_regs)
+ {
+-  int unsorted_regs[4];
+-  HOST_WIDE_INT unsorted_offsets[4];
+-  int order[4];
+-  int base_reg = -1;
+   int i;
++  for (i = 1; i < nops; i++)
++    {
++      int j;
++
++      order[i] = order[i - 1];
++      for (j = 0; j < nops; j++)
++	if (unsorted_offsets[j] == unsorted_offsets[order[i - 1]] + 4)
++	  {
++	    /* We must find exactly one offset that is higher than the
++	       previous one by 4.  */
++	    if (order[i] != order[i - 1])
++	      return false;
++	    order[i] = j;
++	  }
++      if (order[i] == order[i - 1])
++	return false;
++      /* The register numbers must be ascending.  */
++      if (unsorted_regs != NULL
++	  && unsorted_regs[order[i]] <= unsorted_regs[order[i - 1]])
++	return false;
++    }
++  return true;
++}
++
++/* Used to determine in a peephole whether a sequence of load
++   instructions can be changed into a load-multiple instruction.
++   NOPS is the number of separate load instructions we are examining.  The
++   first NOPS entries in OPERANDS are the destination registers, the
++   next NOPS entries are memory operands.  If this function is
++   successful, *BASE is set to the common base register of the memory
++   accesses; *LOAD_OFFSET is set to the first memory location's offset
++   from that base register.
++   REGS is an array filled in with the destination register numbers.
++   SAVED_ORDER (if nonnull), is an array filled in with an order that maps
++   insn numbers to to an ascending order of stores.  If CHECK_REGS is true,
++   the sequence of registers in REGS matches the loads from ascending memory
++   locations, and the function verifies that the register numbers are
++   themselves ascending.  If CHECK_REGS is false, the register numbers
++   are stored in the order they are found in the operands.  */
++static int
++load_multiple_sequence (rtx *operands, int nops, int *regs, int *saved_order,
++			int *base, HOST_WIDE_INT *load_offset, bool check_regs)
++{
++  int unsorted_regs[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT unsorted_offsets[MAX_LDM_STM_OPS];
++  int order[MAX_LDM_STM_OPS];
++  rtx base_reg_rtx = NULL;
++  int base_reg = -1;
++  int i, ldm_case;
+ 
+   if (low_irq_latency)
+     return 0;
+ 
+-  /* Can only handle 2, 3, or 4 insns at present,
+-     though could be easily extended if required.  */
+-  gcc_assert (nops >= 2 && nops <= 4);
++  /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be
++     easily extended if required.  */
++  gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS);
+ 
+-  memset (order, 0, 4 * sizeof (int));
++  memset (order, 0, MAX_LDM_STM_OPS * sizeof (int));
+ 
+   /* Loop over the operands and check that the memory references are
+      suitable (i.e. immediate offsets from the same base register).  At
+@@ -9735,32 +9842,30 @@ load_multiple_sequence (rtx *operands, i
+ 	  if (i == 0)
+ 	    {
+ 	      base_reg = REGNO (reg);
+-	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      order[0] = 0;
+-	    }
+-	  else
+-	    {
+-	      if (base_reg != (int) REGNO (reg))
+-		/* Not addressed from the same base register.  */
++	      base_reg_rtx = reg;
++	      if (TARGET_THUMB1 && base_reg > LAST_LO_REGNUM)
+ 		return 0;
+-
+-	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      if (unsorted_regs[i] < unsorted_regs[order[0]])
+-		order[0] = i;
+ 	    }
++	  else if (base_reg != (int) REGNO (reg))
++	    /* Not addressed from the same base register.  */
++	    return 0;
++
++	  unsorted_regs[i] = (GET_CODE (operands[i]) == REG
++			      ? REGNO (operands[i])
++			      : REGNO (SUBREG_REG (operands[i])));
+ 
+ 	  /* If it isn't an integer register, or if it overwrites the
+ 	     base register but isn't the last insn in the list, then
+ 	     we can't do this.  */
+-	  if (unsorted_regs[i] < 0 || unsorted_regs[i] > 14
++	  if (unsorted_regs[i] < 0
++	      || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM)
++	      || unsorted_regs[i] > 14
+ 	      || (i != nops - 1 && unsorted_regs[i] == base_reg))
+ 	    return 0;
+ 
+ 	  unsorted_offsets[i] = INTVAL (offset);
++	  if (i == 0 || unsorted_offsets[i] < unsorted_offsets[order[0]])
++	    order[0] = i;
+ 	}
+       else
+ 	/* Not a suitable memory address.  */
+@@ -9769,167 +9874,90 @@ load_multiple_sequence (rtx *operands, i
+ 
+   /* All the useful information has now been extracted from the
+      operands into unsorted_regs and unsorted_offsets; additionally,
+-     order[0] has been set to the lowest numbered register in the
+-     list.  Sort the registers into order, and check that the memory
+-     offsets are ascending and adjacent.  */
+-
+-  for (i = 1; i < nops; i++)
+-    {
+-      int j;
+-
+-      order[i] = order[i - 1];
+-      for (j = 0; j < nops; j++)
+-	if (unsorted_regs[j] > unsorted_regs[order[i - 1]]
+-	    && (order[i] == order[i - 1]
+-		|| unsorted_regs[j] < unsorted_regs[order[i]]))
+-	  order[i] = j;
+-
+-      /* Have we found a suitable register? if not, one must be used more
+-	 than once.  */
+-      if (order[i] == order[i - 1])
+-	return 0;
++     order[0] has been set to the lowest offset in the list.  Sort
++     the offsets into order, verifying that they are adjacent, and
++     check that the register numbers are ascending.  */
++  if (!compute_offset_order (nops, unsorted_offsets, order,
++			     check_regs ? unsorted_regs : NULL))
++    return 0;
+ 
+-      /* Is the memory address adjacent and ascending? */
+-      if (unsorted_offsets[order[i]] != unsorted_offsets[order[i - 1]] + 4)
+-	return 0;
+-    }
++  if (saved_order)
++    memcpy (saved_order, order, sizeof order);
+ 
+   if (base)
+     {
+       *base = base_reg;
+ 
+       for (i = 0; i < nops; i++)
+-	regs[i] = unsorted_regs[order[i]];
++	regs[i] = unsorted_regs[check_regs ? order[i] : i];
+ 
+       *load_offset = unsorted_offsets[order[0]];
+     }
+ 
+-  if (unsorted_offsets[order[0]] == 0)
+-    return 1; /* ldmia */
+-
+-  if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
+-    return 2; /* ldmib */
+-
+-  if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
+-    return 3; /* ldmda */
+-
+-  if (unsorted_offsets[order[nops - 1]] == -4)
+-    return 4; /* ldmdb */
+-
+-  /* For ARM8,9 & StrongARM, 2 ldr instructions are faster than an ldm
+-     if the offset isn't small enough.  The reason 2 ldrs are faster
+-     is because these ARMs are able to do more than one cache access
+-     in a single cycle.  The ARM9 and StrongARM have Harvard caches,
+-     whilst the ARM8 has a double bandwidth cache.  This means that
+-     these cores can do both an instruction fetch and a data fetch in
+-     a single cycle, so the trick of calculating the address into a
+-     scratch register (one of the result regs) and then doing a load
+-     multiple actually becomes slower (and no smaller in code size).
+-     That is the transformation
+-
+- 	ldr	rd1, [rbase + offset]
+- 	ldr	rd2, [rbase + offset + 4]
+-
+-     to
+-
+- 	add	rd1, rbase, offset
+- 	ldmia	rd1, {rd1, rd2}
+-
+-     produces worse code -- '3 cycles + any stalls on rd2' instead of
+-     '2 cycles + any stalls on rd2'.  On ARMs with only one cache
+-     access per cycle, the first sequence could never complete in less
+-     than 6 cycles, whereas the ldm sequence would only take 5 and
+-     would make better use of sequential accesses if not hitting the
+-     cache.
+-
+-     We cheat here and test 'arm_ld_sched' which we currently know to
+-     only be true for the ARM8, ARM9 and StrongARM.  If this ever
+-     changes, then the test below needs to be reworked.  */
+-  if (nops == 2 && arm_ld_sched)
++  if (TARGET_THUMB1
++      && !peep2_reg_dead_p (nops, base_reg_rtx))
+     return 0;
+ 
+-  /* Can't do it without setting up the offset, only do this if it takes
+-     no more than one insn.  */
+-  return (const_ok_for_arm (unsorted_offsets[order[0]])
+-	  || const_ok_for_arm (-unsorted_offsets[order[0]])) ? 5 : 0;
+-}
+-
+-const char *
+-emit_ldm_seq (rtx *operands, int nops)
+-{
+-  int regs[4];
+-  int base_reg;
+-  HOST_WIDE_INT offset;
+-  char buf[100];
+-  int i;
+-
+-  switch (load_multiple_sequence (operands, nops, regs, &base_reg, &offset))
+-    {
+-    case 1:
+-      strcpy (buf, "ldm%(ia%)\t");
+-      break;
+-
+-    case 2:
+-      strcpy (buf, "ldm%(ib%)\t");
+-      break;
+-
+-    case 3:
+-      strcpy (buf, "ldm%(da%)\t");
+-      break;
+-
+-    case 4:
+-      strcpy (buf, "ldm%(db%)\t");
+-      break;
+-
+-    case 5:
+-      if (offset >= 0)
+-	sprintf (buf, "add%%?\t%s%s, %s%s, #%ld", REGISTER_PREFIX,
+-		 reg_names[regs[0]], REGISTER_PREFIX, reg_names[base_reg],
+-		 (long) offset);
+-      else
+-	sprintf (buf, "sub%%?\t%s%s, %s%s, #%ld", REGISTER_PREFIX,
+-		 reg_names[regs[0]], REGISTER_PREFIX, reg_names[base_reg],
+-		 (long) -offset);
+-      output_asm_insn (buf, operands);
+-      base_reg = regs[0];
+-      strcpy (buf, "ldm%(ia%)\t");
+-      break;
+-
+-    default:
+-      gcc_unreachable ();
+-    }
+-
+-  sprintf (buf + strlen (buf), "%s%s, {%s%s", REGISTER_PREFIX,
+-	   reg_names[base_reg], REGISTER_PREFIX, reg_names[regs[0]]);
+-
+-  for (i = 1; i < nops; i++)
+-    sprintf (buf + strlen (buf), ", %s%s", REGISTER_PREFIX,
+-	     reg_names[regs[i]]);
++  if (unsorted_offsets[order[0]] == 0)
++    ldm_case = 1; /* ldmia */
++  else if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
++    ldm_case = 2; /* ldmib */
++  else if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
++    ldm_case = 3; /* ldmda */
++  else if (TARGET_32BIT && unsorted_offsets[order[nops - 1]] == -4)
++    ldm_case = 4; /* ldmdb */
++  else if (const_ok_for_arm (unsorted_offsets[order[0]])
++	   || const_ok_for_arm (-unsorted_offsets[order[0]]))
++    ldm_case = 5;
++  else
++    return 0;
+ 
+-  strcat (buf, "}\t%@ phole ldm");
++  if (!multiple_operation_profitable_p (false, nops,
++					ldm_case == 5
++					? unsorted_offsets[order[0]] : 0))
++    return 0;
+ 
+-  output_asm_insn (buf, operands);
+-  return "";
++  return ldm_case;
+ }
+ 
+-int
+-store_multiple_sequence (rtx *operands, int nops, int *regs, int *base,
+-			 HOST_WIDE_INT * load_offset)
+-{
+-  int unsorted_regs[4];
+-  HOST_WIDE_INT unsorted_offsets[4];
+-  int order[4];
++/* Used to determine in a peephole whether a sequence of store instructions can
++   be changed into a store-multiple instruction.
++   NOPS is the number of separate store instructions we are examining.
++   NOPS_TOTAL is the total number of instructions recognized by the peephole
++   pattern.
++   The first NOPS entries in OPERANDS are the source registers, the next
++   NOPS entries are memory operands.  If this function is successful, *BASE is
++   set to the common base register of the memory accesses; *LOAD_OFFSET is set
++   to the first memory location's offset from that base register.  REGS is an
++   array filled in with the source register numbers, REG_RTXS (if nonnull) is
++   likewise filled with the corresponding rtx's.
++   SAVED_ORDER (if nonnull), is an array filled in with an order that maps insn
++   numbers to to an ascending order of stores.
++   If CHECK_REGS is true, the sequence of registers in *REGS matches the stores
++   from ascending memory locations, and the function verifies that the register
++   numbers are themselves ascending.  If CHECK_REGS is false, the register
++   numbers are stored in the order they are found in the operands.  */
++static int
++store_multiple_sequence (rtx *operands, int nops, int nops_total,
++			 int *regs, rtx *reg_rtxs, int *saved_order, int *base,
++			 HOST_WIDE_INT *load_offset, bool check_regs)
++{
++  int unsorted_regs[MAX_LDM_STM_OPS];
++  rtx unsorted_reg_rtxs[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT unsorted_offsets[MAX_LDM_STM_OPS];
++  int order[MAX_LDM_STM_OPS];
+   int base_reg = -1;
+-  int i;
++  rtx base_reg_rtx = NULL;
++  int i, stm_case;
+ 
+   if (low_irq_latency)
+     return 0;
+ 
+-  /* Can only handle 2, 3, or 4 insns at present, though could be easily
+-     extended if required.  */
+-  gcc_assert (nops >= 2 && nops <= 4);
++  /* Can only handle up to MAX_LDM_STM_OPS insns at present, though could be
++     easily extended if required.  */
++  gcc_assert (nops >= 2 && nops <= MAX_LDM_STM_OPS);
+ 
+-  memset (order, 0, 4 * sizeof (int));
++  memset (order, 0, MAX_LDM_STM_OPS * sizeof (int));
+ 
+   /* Loop over the operands and check that the memory references are
+      suitable (i.e. immediate offsets from the same base register).  At
+@@ -9964,32 +9992,32 @@ store_multiple_sequence (rtx *operands, 
+ 	      && (GET_CODE (offset = XEXP (XEXP (operands[nops + i], 0), 1))
+ 		  == CONST_INT)))
+ 	{
++	  unsorted_reg_rtxs[i] = (GET_CODE (operands[i]) == REG
++				  ? operands[i] : SUBREG_REG (operands[i]));
++	  unsorted_regs[i] = REGNO (unsorted_reg_rtxs[i]);
++
+ 	  if (i == 0)
+ 	    {
+ 	      base_reg = REGNO (reg);
+-	      unsorted_regs[0] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      order[0] = 0;
+-	    }
+-	  else
+-	    {
+-	      if (base_reg != (int) REGNO (reg))
+-		/* Not addressed from the same base register.  */
++	      base_reg_rtx = reg;
++	      if (TARGET_THUMB1 && base_reg > LAST_LO_REGNUM)
+ 		return 0;
+-
+-	      unsorted_regs[i] = (GET_CODE (operands[i]) == REG
+-				  ? REGNO (operands[i])
+-				  : REGNO (SUBREG_REG (operands[i])));
+-	      if (unsorted_regs[i] < unsorted_regs[order[0]])
+-		order[0] = i;
+ 	    }
++	  else if (base_reg != (int) REGNO (reg))
++	    /* Not addressed from the same base register.  */
++	    return 0;
+ 
+ 	  /* If it isn't an integer register, then we can't do this.  */
+-	  if (unsorted_regs[i] < 0 || unsorted_regs[i] > 14)
++	  if (unsorted_regs[i] < 0
++	      || (TARGET_THUMB1 && unsorted_regs[i] > LAST_LO_REGNUM)
++	      || (TARGET_THUMB2 && unsorted_regs[i] == base_reg)
++	      || (TARGET_THUMB2 && unsorted_regs[i] == SP_REGNUM)
++	      || unsorted_regs[i] > 14)
+ 	    return 0;
+ 
+ 	  unsorted_offsets[i] = INTVAL (offset);
++	  if (i == 0 || unsorted_offsets[i] < unsorted_offsets[order[0]])
++	    order[0] = i;
+ 	}
+       else
+ 	/* Not a suitable memory address.  */
+@@ -9998,111 +10026,65 @@ store_multiple_sequence (rtx *operands, 
+ 
+   /* All the useful information has now been extracted from the
+      operands into unsorted_regs and unsorted_offsets; additionally,
+-     order[0] has been set to the lowest numbered register in the
+-     list.  Sort the registers into order, and check that the memory
+-     offsets are ascending and adjacent.  */
+-
+-  for (i = 1; i < nops; i++)
+-    {
+-      int j;
+-
+-      order[i] = order[i - 1];
+-      for (j = 0; j < nops; j++)
+-	if (unsorted_regs[j] > unsorted_regs[order[i - 1]]
+-	    && (order[i] == order[i - 1]
+-		|| unsorted_regs[j] < unsorted_regs[order[i]]))
+-	  order[i] = j;
+-
+-      /* Have we found a suitable register? if not, one must be used more
+-	 than once.  */
+-      if (order[i] == order[i - 1])
+-	return 0;
++     order[0] has been set to the lowest offset in the list.  Sort
++     the offsets into order, verifying that they are adjacent, and
++     check that the register numbers are ascending.  */
++  if (!compute_offset_order (nops, unsorted_offsets, order,
++			     check_regs ? unsorted_regs : NULL))
++    return 0;
+ 
+-      /* Is the memory address adjacent and ascending? */
+-      if (unsorted_offsets[order[i]] != unsorted_offsets[order[i - 1]] + 4)
+-	return 0;
+-    }
++  if (saved_order)
++    memcpy (saved_order, order, sizeof order);
+ 
+   if (base)
+     {
+       *base = base_reg;
+ 
+       for (i = 0; i < nops; i++)
+-	regs[i] = unsorted_regs[order[i]];
++	{
++	  regs[i] = unsorted_regs[check_regs ? order[i] : i];
++	  if (reg_rtxs)
++	    reg_rtxs[i] = unsorted_reg_rtxs[check_regs ? order[i] : i];
++	}
+ 
+       *load_offset = unsorted_offsets[order[0]];
+     }
+ 
+-  if (unsorted_offsets[order[0]] == 0)
+-    return 1; /* stmia */
+-
+-  if (unsorted_offsets[order[0]] == 4)
+-    return 2; /* stmib */
+-
+-  if (unsorted_offsets[order[nops - 1]] == 0)
+-    return 3; /* stmda */
+-
+-  if (unsorted_offsets[order[nops - 1]] == -4)
+-    return 4; /* stmdb */
+-
+-  return 0;
+-}
+-
+-const char *
+-emit_stm_seq (rtx *operands, int nops)
+-{
+-  int regs[4];
+-  int base_reg;
+-  HOST_WIDE_INT offset;
+-  char buf[100];
+-  int i;
+-
+-  switch (store_multiple_sequence (operands, nops, regs, &base_reg, &offset))
+-    {
+-    case 1:
+-      strcpy (buf, "stm%(ia%)\t");
+-      break;
+-
+-    case 2:
+-      strcpy (buf, "stm%(ib%)\t");
+-      break;
+-
+-    case 3:
+-      strcpy (buf, "stm%(da%)\t");
+-      break;
+-
+-    case 4:
+-      strcpy (buf, "stm%(db%)\t");
+-      break;
+-
+-    default:
+-      gcc_unreachable ();
+-    }
+-
+-  sprintf (buf + strlen (buf), "%s%s, {%s%s", REGISTER_PREFIX,
+-	   reg_names[base_reg], REGISTER_PREFIX, reg_names[regs[0]]);
++  if (TARGET_THUMB1
++      && !peep2_reg_dead_p (nops_total, base_reg_rtx))
++    return 0;
+ 
+-  for (i = 1; i < nops; i++)
+-    sprintf (buf + strlen (buf), ", %s%s", REGISTER_PREFIX,
+-	     reg_names[regs[i]]);
++  if (unsorted_offsets[order[0]] == 0)
++    stm_case = 1; /* stmia */
++  else if (TARGET_ARM && unsorted_offsets[order[0]] == 4)
++    stm_case = 2; /* stmib */
++  else if (TARGET_ARM && unsorted_offsets[order[nops - 1]] == 0)
++    stm_case = 3; /* stmda */
++  else if (TARGET_32BIT && unsorted_offsets[order[nops - 1]] == -4)
++    stm_case = 4; /* stmdb */
++  else
++    return 0;
+ 
+-  strcat (buf, "}\t%@ phole stm");
++  if (!multiple_operation_profitable_p (false, nops, 0))
++    return 0;
+ 
+-  output_asm_insn (buf, operands);
+-  return "";
++  return stm_case;
+ }
+ 
+ /* Routines for use in generating RTL.  */
+ 
+-rtx
+-arm_gen_load_multiple (int base_regno, int count, rtx from, int up,
+-		       int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++/* Generate a load-multiple instruction.  COUNT is the number of loads in
++   the instruction; REGS and MEMS are arrays containing the operands.
++   BASEREG is the base register to be used in addressing the memory operands.
++   WBACK_OFFSET is nonzero if the instruction should update the base
++   register.  */
++
++static rtx
++arm_gen_load_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
++			 HOST_WIDE_INT wback_offset)
+ {
+-  HOST_WIDE_INT offset = *offsetp;
+   int i = 0, j;
+   rtx result;
+-  int sign = up ? 1 : -1;
+-  rtx mem, addr;
+ 
+   /* XScale has load-store double instructions, but they have stricter
+      alignment requirements than load-store multiple, so we cannot
+@@ -10139,18 +10121,10 @@ arm_gen_load_multiple (int base_regno, i
+       start_sequence ();
+ 
+       for (i = 0; i < count; i++)
+-	{
+-	  addr = plus_constant (from, i * 4 * sign);
+-	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
+-	  emit_move_insn (gen_rtx_REG (SImode, base_regno + i), mem);
+-	  offset += 4 * sign;
+-	}
++	emit_move_insn (gen_rtx_REG (SImode, regs[i]), mems[i]);
+ 
+-      if (write_back)
+-	{
+-	  emit_move_insn (from, plus_constant (from, count * 4 * sign));
+-	  *offsetp = offset;
+-	}
++      if (wback_offset != 0)
++	emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ 
+       seq = get_insns ();
+       end_sequence ();
+@@ -10159,41 +10133,40 @@ arm_gen_load_multiple (int base_regno, i
+     }
+ 
+   result = gen_rtx_PARALLEL (VOIDmode,
+-			     rtvec_alloc (count + (write_back ? 1 : 0)));
+-  if (write_back)
++			     rtvec_alloc (count + (wback_offset != 0 ? 1 : 0)));
++  if (wback_offset != 0)
+     {
+       XVECEXP (result, 0, 0)
+-	= gen_rtx_SET (VOIDmode, from, plus_constant (from, count * 4 * sign));
++	= gen_rtx_SET (VOIDmode, basereg,
++		       plus_constant (basereg, wback_offset));
+       i = 1;
+       count++;
+     }
+ 
+   for (j = 0; i < count; i++, j++)
+-    {
+-      addr = plus_constant (from, j * 4 * sign);
+-      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
+-      XVECEXP (result, 0, i)
+-	= gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, base_regno + j), mem);
+-      offset += 4 * sign;
+-    }
+-
+-  if (write_back)
+-    *offsetp = offset;
++    XVECEXP (result, 0, i)
++      = gen_rtx_SET (VOIDmode, gen_rtx_REG (SImode, regs[j]), mems[j]);
+ 
+   return result;
+ }
+ 
+-rtx
+-arm_gen_store_multiple (int base_regno, int count, rtx to, int up,
+-			int write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++/* Generate a store-multiple instruction.  COUNT is the number of stores in
++   the instruction; REGS and MEMS are arrays containing the operands.
++   BASEREG is the base register to be used in addressing the memory operands.
++   WBACK_OFFSET is nonzero if the instruction should update the base
++   register.  */
++
++static rtx
++arm_gen_store_multiple_1 (int count, int *regs, rtx *mems, rtx basereg,
++			  HOST_WIDE_INT wback_offset)
+ {
+-  HOST_WIDE_INT offset = *offsetp;
+   int i = 0, j;
+   rtx result;
+-  int sign = up ? 1 : -1;
+-  rtx mem, addr;
+ 
+-  /* See arm_gen_load_multiple for discussion of
++  if (GET_CODE (basereg) == PLUS)
++    basereg = XEXP (basereg, 0);
++
++  /* See arm_gen_load_multiple_1 for discussion of
+      the pros/cons of ldm/stm usage for XScale.  */
+   if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
+     {
+@@ -10202,18 +10175,10 @@ arm_gen_store_multiple (int base_regno, 
+       start_sequence ();
+ 
+       for (i = 0; i < count; i++)
+-	{
+-	  addr = plus_constant (to, i * 4 * sign);
+-	  mem = adjust_automodify_address (basemem, SImode, addr, offset);
+-	  emit_move_insn (mem, gen_rtx_REG (SImode, base_regno + i));
+-	  offset += 4 * sign;
+-	}
++	emit_move_insn (mems[i], gen_rtx_REG (SImode, regs[i]));
+ 
+-      if (write_back)
+-	{
+-	  emit_move_insn (to, plus_constant (to, count * 4 * sign));
+-	  *offsetp = offset;
+-	}
++      if (wback_offset != 0)
++	emit_move_insn (basereg, plus_constant (basereg, wback_offset));
+ 
+       seq = get_insns ();
+       end_sequence ();
+@@ -10222,29 +10187,319 @@ arm_gen_store_multiple (int base_regno, 
+     }
+ 
+   result = gen_rtx_PARALLEL (VOIDmode,
+-			     rtvec_alloc (count + (write_back ? 1 : 0)));
+-  if (write_back)
++			     rtvec_alloc (count + (wback_offset != 0 ? 1 : 0)));
++  if (wback_offset != 0)
+     {
+       XVECEXP (result, 0, 0)
+-	= gen_rtx_SET (VOIDmode, to,
+-		       plus_constant (to, count * 4 * sign));
++	= gen_rtx_SET (VOIDmode, basereg,
++		       plus_constant (basereg, wback_offset));
+       i = 1;
+       count++;
+     }
+ 
+   for (j = 0; i < count; i++, j++)
++    XVECEXP (result, 0, i)
++      = gen_rtx_SET (VOIDmode, mems[j], gen_rtx_REG (SImode, regs[j]));
++
++  return result;
++}
++
++/* Generate either a load-multiple or a store-multiple instruction.  This
++   function can be used in situations where we can start with a single MEM
++   rtx and adjust its address upwards.
++   COUNT is the number of operations in the instruction, not counting a
++   possible update of the base register.  REGS is an array containing the
++   register operands.
++   BASEREG is the base register to be used in addressing the memory operands,
++   which are constructed from BASEMEM.
++   WRITE_BACK specifies whether the generated instruction should include an
++   update of the base register.
++   OFFSETP is used to pass an offset to and from this function; this offset
++   is not used when constructing the address (instead BASEMEM should have an
++   appropriate offset in its address), it is used only for setting
++   MEM_OFFSET.  It is updated only if WRITE_BACK is true.*/
++
++static rtx
++arm_gen_multiple_op (bool is_load, int *regs, int count, rtx basereg,
++		     bool write_back, rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  rtx mems[MAX_LDM_STM_OPS];
++  HOST_WIDE_INT offset = *offsetp;
++  int i;
++
++  gcc_assert (count <= MAX_LDM_STM_OPS);
++
++  if (GET_CODE (basereg) == PLUS)
++    basereg = XEXP (basereg, 0);
++
++  for (i = 0; i < count; i++)
+     {
+-      addr = plus_constant (to, j * 4 * sign);
+-      mem = adjust_automodify_address_nv (basemem, SImode, addr, offset);
+-      XVECEXP (result, 0, i)
+-	= gen_rtx_SET (VOIDmode, mem, gen_rtx_REG (SImode, base_regno + j));
+-      offset += 4 * sign;
++      rtx addr = plus_constant (basereg, i * 4);
++      mems[i] = adjust_automodify_address_nv (basemem, SImode, addr, offset);
++      offset += 4;
+     }
+ 
+   if (write_back)
+     *offsetp = offset;
+ 
+-  return result;
++  if (is_load)
++    return arm_gen_load_multiple_1 (count, regs, mems, basereg,
++				    write_back ? 4 * count : 0);
++  else
++    return arm_gen_store_multiple_1 (count, regs, mems, basereg,
++				     write_back ? 4 * count : 0);
++}
++
++rtx
++arm_gen_load_multiple (int *regs, int count, rtx basereg, int write_back,
++		       rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  return arm_gen_multiple_op (TRUE, regs, count, basereg, write_back, basemem,
++			      offsetp);
++}
++
++rtx
++arm_gen_store_multiple (int *regs, int count, rtx basereg, int write_back,
++			rtx basemem, HOST_WIDE_INT *offsetp)
++{
++  return arm_gen_multiple_op (FALSE, regs, count, basereg, write_back, basemem,
++			      offsetp);
++}
++
++/* Called from a peephole2 expander to turn a sequence of loads into an
++   LDM instruction.  OPERANDS are the operands found by the peephole matcher;
++   NOPS indicates how many separate loads we are trying to combine.  SORT_REGS
++   is true if we can reorder the registers because they are used commutatively
++   subsequently.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_ldm_seq (rtx *operands, int nops, bool sort_regs)
++{
++  int regs[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int i, j, base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int ldm_case;
++  rtx addr;
++
++  ldm_case = load_multiple_sequence (operands, nops, regs, mem_order,
++				     &base_reg, &offset, !sort_regs);
++
++  if (ldm_case == 0)
++    return false;
++
++  if (sort_regs)
++    for (i = 0; i < nops - 1; i++)
++      for (j = i + 1; j < nops; j++)
++	if (regs[i] > regs[j])
++	  {
++	    int t = regs[i];
++	    regs[i] = regs[j];
++	    regs[j] = t;
++	  }
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (peep2_reg_dead_p (nops, base_reg_rtx));
++      gcc_assert (ldm_case == 1 || ldm_case == 5);
++      write_back = TRUE;
++    }
++
++  if (ldm_case == 5)
++    {
++      rtx newbase = TARGET_THUMB1 ? base_reg_rtx : gen_rtx_REG (SImode, regs[0]);
++      emit_insn (gen_addsi3 (newbase, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++      if (!TARGET_THUMB1)
++	{
++	  base_reg = regs[0];
++	  base_reg_rtx = newbase;
++	}
++    }
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_load_multiple_1 (nops, regs, mems, base_reg_rtx,
++				      write_back ? offset + i * 4 : 0));
++  return true;
++}
++
++/* Called from a peephole2 expander to turn a sequence of stores into an
++   STM instruction.  OPERANDS are the operands found by the peephole matcher;
++   NOPS indicates how many separate stores we are trying to combine.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_stm_seq (rtx *operands, int nops)
++{
++  int i;
++  int regs[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int stm_case;
++  rtx addr;
++  bool base_reg_dies;
++
++  stm_case = store_multiple_sequence (operands, nops, nops, regs, NULL,
++				      mem_order, &base_reg, &offset, true);
++
++  if (stm_case == 0)
++    return false;
++
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  base_reg_dies = peep2_reg_dead_p (nops, base_reg_rtx);
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (base_reg_dies);
++      write_back = TRUE;
++    }
++
++  if (stm_case == 5)
++    {
++      gcc_assert (base_reg_dies);
++      emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++    }
++
++  addr = plus_constant (base_reg_rtx, offset);
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_store_multiple_1 (nops, regs, mems, base_reg_rtx,
++				       write_back ? offset + i * 4 : 0));
++  return true;
++}
++
++/* Called from a peephole2 expander to turn a sequence of stores that are
++   preceded by constant loads into an STM instruction.  OPERANDS are the
++   operands found by the peephole matcher; NOPS indicates how many
++   separate stores we are trying to combine; there are 2 * NOPS
++   instructions in the peephole.
++   Returns true iff we could generate a new instruction.  */
++
++bool
++gen_const_stm_seq (rtx *operands, int nops)
++{
++  int regs[MAX_LDM_STM_OPS], sorted_regs[MAX_LDM_STM_OPS];
++  int reg_order[MAX_LDM_STM_OPS], mem_order[MAX_LDM_STM_OPS];
++  rtx reg_rtxs[MAX_LDM_STM_OPS], orig_reg_rtxs[MAX_LDM_STM_OPS];
++  rtx mems[MAX_LDM_STM_OPS];
++  int base_reg;
++  rtx base_reg_rtx;
++  HOST_WIDE_INT offset;
++  int write_back = FALSE;
++  int stm_case;
++  rtx addr;
++  bool base_reg_dies;
++  int i, j;
++  HARD_REG_SET allocated;
++
++  stm_case = store_multiple_sequence (operands, nops, 2 * nops, regs, reg_rtxs,
++				      mem_order, &base_reg, &offset, false);
++
++  if (stm_case == 0)
++    return false;
++
++  memcpy (orig_reg_rtxs, reg_rtxs, sizeof orig_reg_rtxs);
++
++  /* If the same register is used more than once, try to find a free
++     register.  */
++  CLEAR_HARD_REG_SET (allocated);
++  for (i = 0; i < nops; i++)
++    {
++      for (j = i + 1; j < nops; j++)
++	if (regs[i] == regs[j])
++	  {
++	    rtx t = peep2_find_free_register (0, nops * 2,
++					      TARGET_THUMB1 ? "l" : "r",
++					      SImode, &allocated);
++	    if (t == NULL_RTX)
++	      return false;
++	    reg_rtxs[i] = t;
++	    regs[i] = REGNO (t);
++	  }
++    }
++
++  /* Compute an ordering that maps the register numbers to an ascending
++     sequence.  */
++  reg_order[0] = 0;
++  for (i = 0; i < nops; i++)
++    if (regs[i] < regs[reg_order[0]])
++      reg_order[0] = i;
++
++  for (i = 1; i < nops; i++)
++    {
++      int this_order = reg_order[i - 1];
++      for (j = 0; j < nops; j++)
++	if (regs[j] > regs[reg_order[i - 1]]
++	    && (this_order == reg_order[i - 1]
++		|| regs[j] < regs[this_order]))
++	  this_order = j;
++      reg_order[i] = this_order;
++    }
++
++  /* Ensure that registers that must be live after the instruction end
++     up with the correct value.  */
++  for (i = 0; i < nops; i++)
++    {
++      int this_order = reg_order[i];
++      if ((this_order != mem_order[i]
++	   || orig_reg_rtxs[this_order] != reg_rtxs[this_order])
++	  && !peep2_reg_dead_p (nops * 2, orig_reg_rtxs[this_order]))
++	return false;
++    }
++
++  /* Load the constants.  */
++  for (i = 0; i < nops; i++)
++    {
++      rtx op = operands[2 * nops + mem_order[i]];
++      sorted_regs[i] = regs[reg_order[i]];
++      emit_move_insn (reg_rtxs[reg_order[i]], op);
++    }
++
++  base_reg_rtx = gen_rtx_REG (Pmode, base_reg);
++
++  base_reg_dies = peep2_reg_dead_p (nops * 2, base_reg_rtx);
++  if (TARGET_THUMB1)
++    {
++      gcc_assert (base_reg_dies);
++      write_back = TRUE;
++    }
++
++  if (stm_case == 5)
++    {
++      gcc_assert (base_reg_dies);
++      emit_insn (gen_addsi3 (base_reg_rtx, base_reg_rtx, GEN_INT (offset)));
++      offset = 0;
++    }
++
++  addr = plus_constant (base_reg_rtx, offset);
++
++  for (i = 0; i < nops; i++)
++    {
++      addr = plus_constant (base_reg_rtx, offset + i * 4);
++      mems[i] = adjust_automodify_address_nv (operands[nops + mem_order[i]],
++					      SImode, addr, 0);
++    }
++  emit_insn (arm_gen_store_multiple_1 (nops, sorted_regs, mems, base_reg_rtx,
++				       write_back ? offset + i * 4 : 0));
++  return true;
+ }
+ 
+ int
+@@ -10280,20 +10535,21 @@ arm_gen_movmemqi (rtx *operands)
+   for (i = 0; in_words_to_go >= 2; i+=4)
+     {
+       if (in_words_to_go > 4)
+-	emit_insn (arm_gen_load_multiple (0, 4, src, TRUE, TRUE,
+-					  srcbase, &srcoffset));
++	emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, 4, src,
++					  TRUE, srcbase, &srcoffset));
+       else
+-	emit_insn (arm_gen_load_multiple (0, in_words_to_go, src, TRUE,
+-					  FALSE, srcbase, &srcoffset));
++	emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, in_words_to_go,
++					  src, FALSE, srcbase,
++					  &srcoffset));
+ 
+       if (out_words_to_go)
+ 	{
+ 	  if (out_words_to_go > 4)
+-	    emit_insn (arm_gen_store_multiple (0, 4, dst, TRUE, TRUE,
+-					       dstbase, &dstoffset));
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence, 4, dst,
++					       TRUE, dstbase, &dstoffset));
+ 	  else if (out_words_to_go != 1)
+-	    emit_insn (arm_gen_store_multiple (0, out_words_to_go,
+-					       dst, TRUE,
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence,
++					       out_words_to_go, dst,
+ 					       (last_bytes == 0
+ 						? FALSE : TRUE),
+ 					       dstbase, &dstoffset));
+Index: gcc-4_5-branch/gcc/config/arm/arm.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.h
++++ gcc-4_5-branch/gcc/config/arm/arm.h
+@@ -1143,6 +1143,9 @@ extern int arm_structure_size_boundary;
+   ((MODE) == TImode || (MODE) == EImode || (MODE) == OImode \
+    || (MODE) == CImode || (MODE) == XImode)
+ 
++/* The register numbers in sequence, for passing to arm_gen_load_multiple.  */
++extern int arm_regs_in_sequence[];
++
+ /* The order in which register should be allocated.  It is good to use ip
+    since no saving is required (though calls clobber it) and it never contains
+    function parameters.  It is quite good to use lr since other calls may
+@@ -2823,4 +2826,8 @@ enum arm_builtins
+ #define NEED_INDICATE_EXEC_STACK	0
+ #endif
+ 
++/* The maximum number of parallel loads or stores we support in an ldm/stm
++   instruction.  */
++#define MAX_LDM_STM_OPS 4
++
+ #endif /* ! GCC_ARM_H */
+Index: gcc-4_5-branch/gcc/config/arm/arm.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/arm.md
++++ gcc-4_5-branch/gcc/config/arm/arm.md
+@@ -6282,7 +6282,7 @@
+ 
+ ;; load- and store-multiple insns
+ ;; The arm can load/store any set of registers, provided that they are in
+-;; ascending order; but that is beyond GCC so stick with what it knows.
++;; ascending order, but these expanders assume a contiguous set.
+ 
+ (define_expand "load_multiple"
+   [(match_par_dup 3 [(set (match_operand:SI 0 "" "")
+@@ -6303,126 +6303,12 @@
+     FAIL;
+ 
+   operands[3]
+-    = arm_gen_load_multiple (REGNO (operands[0]), INTVAL (operands[2]),
++    = arm_gen_load_multiple (arm_regs_in_sequence + REGNO (operands[0]),
++			     INTVAL (operands[2]),
+ 			     force_reg (SImode, XEXP (operands[1], 0)),
+-			     TRUE, FALSE, operands[1], &offset);
++			     FALSE, operands[1], &offset);
+ })
+ 
+-;; Load multiple with write-back
+-
+-(define_insn "*ldmsi_postinc4"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))
+-     (set (match_operand:SI 6 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 12))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "ldm%(ia%)\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "load4")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi_postinc4_thumb1"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=l")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))
+-     (set (match_operand:SI 6 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 12))))])]
+-  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "ldmia\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "load4")]
+-)
+-
+-(define_insn "*ldmsi_postinc3"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 12)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 8))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\\t%1!, {%3, %4, %5}"
+-  [(set_attr "type" "load3")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi_postinc2"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 8)))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (match_dup 2)))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 2) (const_int 4))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\\t%1!, {%3, %4}"
+-  [(set_attr "type" "load2")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-;; Ordinary load multiple
+-
+-(define_insn "*ldmsi4"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 8))))
+-     (set (match_operand:SI 5 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 12))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "ldm%(ia%)\\t%1, {%2, %3, %4, %5}"
+-  [(set_attr "type" "load4")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi3"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))
+-     (set (match_operand:SI 4 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 8))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "ldm%(ia%)\\t%1, {%2, %3, %4}"
+-  [(set_attr "type" "load3")
+-   (set_attr "predicable" "yes")]
+-)
+-
+-(define_insn "*ldmsi2"
+-  [(match_parallel 0 "load_multiple_operation"
+-    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
+-	  (mem:SI (match_operand:SI 1 "s_register_operand" "r")))
+-     (set (match_operand:SI 3 "arm_hard_register_operand" "")
+-	  (mem:SI (plus:SI (match_dup 1) (const_int 4))))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "ldm%(ia%)\\t%1, {%2, %3}"
+-  [(set_attr "type" "load2")
+-   (set_attr "predicable" "yes")]
+-)
+-
+ (define_expand "store_multiple"
+   [(match_par_dup 3 [(set (match_operand:SI 0 "" "")
+                           (match_operand:SI 1 "" ""))
+@@ -6442,125 +6328,12 @@
+     FAIL;
+ 
+   operands[3]
+-    = arm_gen_store_multiple (REGNO (operands[1]), INTVAL (operands[2]),
++    = arm_gen_store_multiple (arm_regs_in_sequence + REGNO (operands[1]),
++			      INTVAL (operands[2]),
+ 			      force_reg (SImode, XEXP (operands[0], 0)),
+-			      TRUE, FALSE, operands[0], &offset);
++			      FALSE, operands[0], &offset);
+ })
+ 
+-;; Store multiple with write-back
+-
+-(define_insn "*stmsi_postinc4"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
+-	  (match_operand:SI 6 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
+-  "stm%(ia%)\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi_postinc4_thumb1"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=l")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 16)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
+-	  (match_operand:SI 6 "arm_hard_register_operand" ""))])]
+-  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
+-  "stmia\\t%1!, {%3, %4, %5, %6}"
+-  [(set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi_postinc3"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 12)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\\t%1!, {%3, %4, %5}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store3")]
+-)
+-
+-(define_insn "*stmsi_postinc2"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (match_operand:SI 1 "s_register_operand" "=r")
+-	  (plus:SI (match_operand:SI 2 "s_register_operand" "1")
+-		   (const_int 8)))
+-     (set (mem:SI (match_dup 2))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\\t%1!, {%3, %4}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store2")]
+-)
+-
+-;; Ordinary store multiple
+-
+-(define_insn "*stmsi4"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+-	  (match_operand:SI 5 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
+-  "stm%(ia%)\\t%1, {%2, %3, %4, %5}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store4")]
+-)
+-
+-(define_insn "*stmsi3"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+-	  (match_operand:SI 4 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
+-  "stm%(ia%)\\t%1, {%2, %3, %4}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store3")]
+-)
+-
+-(define_insn "*stmsi2"
+-  [(match_parallel 0 "store_multiple_operation"
+-    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "r"))
+-	  (match_operand:SI 2 "arm_hard_register_operand" ""))
+-     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+-	  (match_operand:SI 3 "arm_hard_register_operand" ""))])]
+-  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
+-  "stm%(ia%)\\t%1, {%2, %3}"
+-  [(set_attr "predicable" "yes")
+-   (set_attr "type" "store2")]
+-)
+ 
+ ;; Move a block of memory if it is word aligned and MORE than 2 words long.
+ ;; We could let this apply for blocks of less than this, but it clobbers so
+@@ -9031,8 +8804,8 @@
+ 	if (REGNO (reg) == R0_REGNUM)
+ 	  {
+ 	    /* On thumb we have to use a write-back instruction.  */
+-	    emit_insn (arm_gen_store_multiple (R0_REGNUM, 4, addr, TRUE,
+-			TARGET_THUMB ? TRUE : FALSE, mem, &offset));
++	    emit_insn (arm_gen_store_multiple (arm_regs_in_sequence, 4, addr,
++ 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
+ 	    size = TARGET_ARM ? 16 : 0;
+ 	  }
+ 	else
+@@ -9078,8 +8851,8 @@
+ 	if (REGNO (reg) == R0_REGNUM)
+ 	  {
+ 	    /* On thumb we have to use a write-back instruction.  */
+-	    emit_insn (arm_gen_load_multiple (R0_REGNUM, 4, addr, TRUE,
+-			TARGET_THUMB ? TRUE : FALSE, mem, &offset));
++	    emit_insn (arm_gen_load_multiple (arm_regs_in_sequence, 4, addr,
++ 		       TARGET_THUMB ? TRUE : FALSE, mem, &offset));
+ 	    size = TARGET_ARM ? 16 : 0;
+ 	  }
+ 	else
+@@ -10672,87 +10445,6 @@
+   ""
+ )
+ 
+-; Peepholes to spot possible load- and store-multiples, if the ordering is
+-; reversed, check that the memory references aren't volatile.
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 4 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 5 "memory_operand" "m"))
+-   (set (match_operand:SI 2 "s_register_operand" "=rk")
+-        (match_operand:SI 6 "memory_operand" "m"))
+-   (set (match_operand:SI 3 "s_register_operand" "=rk")
+-        (match_operand:SI 7 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 4, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 4);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 3 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 4 "memory_operand" "m"))
+-   (set (match_operand:SI 2 "s_register_operand" "=rk")
+-        (match_operand:SI 5 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 3, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 3);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 0 "s_register_operand" "=rk")
+-        (match_operand:SI 2 "memory_operand" "m"))
+-   (set (match_operand:SI 1 "s_register_operand" "=rk")
+-        (match_operand:SI 3 "memory_operand" "m"))]
+-  "TARGET_ARM && load_multiple_sequence (operands, 2, NULL, NULL, NULL)"
+-  "*
+-  return emit_ldm_seq (operands, 2);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 4 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 5 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))
+-   (set (match_operand:SI 6 "memory_operand" "=m")
+-        (match_operand:SI 2 "s_register_operand" "rk"))
+-   (set (match_operand:SI 7 "memory_operand" "=m")
+-        (match_operand:SI 3 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 4, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 4);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 3 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 4 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))
+-   (set (match_operand:SI 5 "memory_operand" "=m")
+-        (match_operand:SI 2 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 3, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 3);
+-  "
+-)
+-
+-(define_peephole
+-  [(set (match_operand:SI 2 "memory_operand" "=m")
+-        (match_operand:SI 0 "s_register_operand" "rk"))
+-   (set (match_operand:SI 3 "memory_operand" "=m")
+-        (match_operand:SI 1 "s_register_operand" "rk"))]
+-  "TARGET_ARM && store_multiple_sequence (operands, 2, NULL, NULL, NULL)"
+-  "*
+-  return emit_stm_seq (operands, 2);
+-  "
+-)
+-
+ (define_split
+   [(set (match_operand:SI 0 "s_register_operand" "")
+ 	(and:SI (ge:SI (match_operand:SI 1 "s_register_operand" "")
+@@ -11554,6 +11246,8 @@
+   "
+ )
+ 
++;; Load the load/store multiple patterns
++(include "ldmstm.md")
+ ;; Load the FPA co-processor patterns
+ (include "fpa.md")
+ ;; Load the Maverick co-processor patterns
+Index: gcc-4_5-branch/gcc/config/arm/ldmstm.md
+===================================================================
+--- /dev/null
++++ gcc-4_5-branch/gcc/config/arm/ldmstm.md
+@@ -0,0 +1,1191 @@
++/* ARM ldm/stm instruction patterns.  This file was automatically generated
++   using arm-ldmstm.ml.  Please do not edit manually.
++
++   Copyright (C) 2010 Free Software Foundation, Inc.
++   Contributed by CodeSourcery.
++
++   This file is part of GCC.
++
++   GCC is free software; you can redistribute it and/or modify it
++   under the terms of the GNU General Public License as published
++   by the Free Software Foundation; either version 3, or (at your
++   option) any later version.
++
++   GCC is distributed in the hope that it will be useful, but WITHOUT
++   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
++   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
++   License for more details.
++
++   You should have received a copy of the GNU General Public License and
++   a copy of the GCC Runtime Library Exception along with this program;
++   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
++   <http://www.gnu.org/licenses/>.  */
++
++(define_insn "*ldm4_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm4_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")])
++
++(define_insn "*ldm4_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm4_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")])
++
++(define_insn "*stm4_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "stm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm4_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 5"
++  "stm%(ia%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")])
++
++(define_insn "*ldm4_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 16))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ib%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 16))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "ldm%(ib%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(ib%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 16)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "stm%(ib%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -12))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(da%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "ldm%(da%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -12)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(da%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 5"
++  "stm%(da%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -16))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(db%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm4_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -16))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 6 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "ldm%(db%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "load4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -16)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(db%)\t%1, {%2, %3, %4, %5}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm4_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -16)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -16)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 6 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 5"
++  "stm%(db%)\t%1!, {%3, %4, %5, %6}"
++  [(set_attr "type" "store4")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "memory_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 6 "memory_operand" ""))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 7 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 4, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (parallel
++    [(set (match_operand:SI 1 "s_register_operand" "")
++          (match_operand:SI 5 "memory_operand" ""))
++     (set (match_operand:SI 2 "s_register_operand" "")
++          (match_operand:SI 6 "memory_operand" ""))
++     (set (match_operand:SI 3 "s_register_operand" "")
++          (match_operand:SI 7 "memory_operand" ""))])]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 4, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 9 "const_int_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 10 "const_int_operand" ""))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_dup 2))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 11 "const_int_operand" ""))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_dup 3))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 9 "const_int_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 10 "const_int_operand" ""))
++   (set (match_operand:SI 3 "s_register_operand" "")
++        (match_operand:SI 11 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_dup 2))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_dup 3))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 4 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))
++   (set (match_operand:SI 6 "memory_operand" "")
++        (match_operand:SI 2 "s_register_operand" ""))
++   (set (match_operand:SI 7 "memory_operand" "")
++        (match_operand:SI 3 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 4))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_insn "*ldm3_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm3_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")])
++
++(define_insn "*ldm3_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm3_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")])
++
++(define_insn "*stm3_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm3_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 4"
++  "stm%(ia%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")])
++
++(define_insn "*ldm3_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 12))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ib%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 12))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(ib%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(ib%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 12)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(ib%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -8))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(da%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "ldm%(da%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -8)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(da%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 4"
++  "stm%(da%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -12))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(db%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm3_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -12))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 5 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "ldm%(db%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "load3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -12)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(db%)\t%1, {%2, %3, %4}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm3_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -12)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -12)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 5 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 4"
++  "stm%(db%)\t%1!, {%3, %4, %5}"
++  [(set_attr "type" "store3")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 4 "memory_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 5 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 3, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (parallel
++    [(set (match_operand:SI 1 "s_register_operand" "")
++          (match_operand:SI 4 "memory_operand" ""))
++     (set (match_operand:SI 2 "s_register_operand" "")
++          (match_operand:SI 5 "memory_operand" ""))])]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 3, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 6 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 7 "const_int_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 2))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 6 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 7 "const_int_operand" ""))
++   (set (match_operand:SI 2 "s_register_operand" "")
++        (match_operand:SI 8 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_dup 1))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_dup 2))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 3 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 4 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))
++   (set (match_operand:SI 5 "memory_operand" "")
++        (match_operand:SI 2 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 3))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_insn "*ldm2_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "rk")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm2_ia"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (match_operand:SI 1 "s_register_operand" "l")))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 4))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")])
++
++(define_insn "*ldm2_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_ldm2_ia_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")])
++
++(define_insn "*stm2_ia"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (match_operand:SI 1 "s_register_operand" "rk"))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "stm%(ia%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*thumb_stm2_ia_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=l")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_THUMB1 && XVECLEN (operands[0], 0) == 3"
++  "stm%(ia%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")])
++
++(define_insn "*ldm2_ib"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int 4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int 8))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "ldm%(ib%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_ib_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int 8))))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(ib%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ib"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int 4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "stm%(ib%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_ib_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int 8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int 8)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(ib%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_da"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -4))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 1)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "ldm%(da%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_da_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (match_dup 2)))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "ldm%(da%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_da"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -4)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 1))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 2"
++  "stm%(da%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_da_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (match_dup 2))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_ARM && XVECLEN (operands[0], 0) == 3"
++  "stm%(da%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_db"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 2 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk")
++                  (const_int -8))))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 1)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "ldm%(db%)\t%1, {%2, %3}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*ldm2_db_update"
++  [(match_parallel 0 "load_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (match_operand:SI 3 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -8))))
++     (set (match_operand:SI 4 "arm_hard_register_operand" "")
++          (mem:SI (plus:SI (match_dup 2)
++                  (const_int -4))))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "ldm%(db%)\t%1!, {%3, %4}"
++  [(set_attr "type" "load2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_db"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (mem:SI (plus:SI (match_operand:SI 1 "s_register_operand" "rk") (const_int -8)))
++          (match_operand:SI 2 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 1) (const_int -4)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 2"
++  "stm%(db%)\t%1, {%2, %3}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_insn "*stm2_db_update"
++  [(match_parallel 0 "store_multiple_operation"
++    [(set (match_operand:SI 1 "s_register_operand" "=rk")
++          (plus:SI (match_operand:SI 2 "s_register_operand" "1") (const_int -8)))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -8)))
++          (match_operand:SI 3 "arm_hard_register_operand" ""))
++     (set (mem:SI (plus:SI (match_dup 2) (const_int -4)))
++          (match_operand:SI 4 "arm_hard_register_operand" ""))])]
++  "TARGET_32BIT && XVECLEN (operands[0], 0) == 3"
++  "stm%(db%)\t%1!, {%3, %4}"
++  [(set_attr "type" "store2")
++   (set_attr "predicable" "yes")])
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_ldm_seq (operands, 2, false))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "const_int_operand" ""))
++   (set (match_operand:SI 2 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "const_int_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 1))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 4 "const_int_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 5 "const_int_operand" ""))
++   (set (match_operand:SI 2 "memory_operand" "")
++        (match_dup 0))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_dup 1))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_const_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 2 "memory_operand" "")
++        (match_operand:SI 0 "s_register_operand" ""))
++   (set (match_operand:SI 3 "memory_operand" "")
++        (match_operand:SI 1 "s_register_operand" ""))]
++  ""
++  [(const_int 0)]
++{
++  if (gen_stm_seq (operands, 2))
++    DONE;
++  else
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (parallel
++     [(set (match_operand:SI 4 "s_register_operand" "")
++           (match_operator:SI 5 "commutative_binary_operator"
++            [(match_operand:SI 6 "s_register_operand" "")
++             (match_operand:SI 7 "s_register_operand" "")]))
++      (clobber (reg:CC CC_REGNUM))])]
++  "(((operands[6] == operands[0] && operands[7] == operands[1])
++     || (operands[7] == operands[0] && operands[6] == operands[1]))
++    && peep2_reg_dead_p (3, operands[0]) && peep2_reg_dead_p (3, operands[1]))"
++  [(parallel
++    [(set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)]))
++     (clobber (reg:CC CC_REGNUM))])]
++{
++  if (!gen_ldm_seq (operands, 2, true))
++    FAIL;
++})
++
++(define_peephole2
++  [(set (match_operand:SI 0 "s_register_operand" "")
++        (match_operand:SI 2 "memory_operand" ""))
++   (set (match_operand:SI 1 "s_register_operand" "")
++        (match_operand:SI 3 "memory_operand" ""))
++   (set (match_operand:SI 4 "s_register_operand" "")
++        (match_operator:SI 5 "commutative_binary_operator"
++         [(match_operand:SI 6 "s_register_operand" "")
++          (match_operand:SI 7 "s_register_operand" "")]))]
++  "(((operands[6] == operands[0] && operands[7] == operands[1])
++     || (operands[7] == operands[0] && operands[6] == operands[1]))
++    && peep2_reg_dead_p (3, operands[0]) && peep2_reg_dead_p (3, operands[1]))"
++  [(set (match_dup 4) (match_op_dup 5 [(match_dup 6) (match_dup 7)]))]
++{
++  if (!gen_ldm_seq (operands, 2, true))
++    FAIL;
++})
++
+Index: gcc-4_5-branch/gcc/config/arm/predicates.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/arm/predicates.md
++++ gcc-4_5-branch/gcc/config/arm/predicates.md
+@@ -211,6 +211,11 @@
+   (and (match_code "ior,xor,and")
+        (match_test "mode == GET_MODE (op)")))
+ 
++;; True for commutative operators
++(define_special_predicate "commutative_binary_operator"
++  (and (match_code "ior,xor,and,plus")
++       (match_test "mode == GET_MODE (op)")))
++
+ ;; True for shift operators.
+ (define_special_predicate "shift_operator"
+   (and (ior (ior (and (match_code "mult")
+@@ -334,16 +339,20 @@
+   (match_code "parallel")
+ {
+   HOST_WIDE_INT count = XVECLEN (op, 0);
+-  int dest_regno;
++  unsigned dest_regno;
+   rtx src_addr;
+   HOST_WIDE_INT i = 1, base = 0;
++  HOST_WIDE_INT offset = 0;
+   rtx elt;
++  bool addr_reg_loaded = false;
++  bool update = false;
+ 
+   if (low_irq_latency)
+     return false;
+ 
+   if (count <= 1
+-      || GET_CODE (XVECEXP (op, 0, 0)) != SET)
++      || GET_CODE (XVECEXP (op, 0, 0)) != SET
++      || !REG_P (SET_DEST (XVECEXP (op, 0, 0))))
+     return false;
+ 
+   /* Check to see if this might be a write-back.  */
+@@ -351,6 +360,7 @@
+     {
+       i++;
+       base = 1;
++      update = true;
+ 
+       /* Now check it more carefully.  */
+       if (GET_CODE (SET_DEST (elt)) != REG
+@@ -369,6 +379,15 @@
+ 
+   dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, i - 1)));
+   src_addr = XEXP (SET_SRC (XVECEXP (op, 0, i - 1)), 0);
++  if (GET_CODE (src_addr) == PLUS)
++    {
++      if (GET_CODE (XEXP (src_addr, 1)) != CONST_INT)
++	return false;
++      offset = INTVAL (XEXP (src_addr, 1));
++      src_addr = XEXP (src_addr, 0);
++    }
++  if (!REG_P (src_addr))
++    return false;
+ 
+   for (; i < count; i++)
+     {
+@@ -377,16 +396,28 @@
+       if (GET_CODE (elt) != SET
+           || GET_CODE (SET_DEST (elt)) != REG
+           || GET_MODE (SET_DEST (elt)) != SImode
+-          || REGNO (SET_DEST (elt)) != (unsigned int)(dest_regno + i - base)
++          || REGNO (SET_DEST (elt)) <= dest_regno
+           || GET_CODE (SET_SRC (elt)) != MEM
+           || GET_MODE (SET_SRC (elt)) != SImode
+-          || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
+-          || !rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
+-          || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
+-          || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != (i - base) * 4)
++          || ((GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
++	       || !rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
++	       || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
++	       || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != offset + (i - base) * 4)
++	      && (!REG_P (XEXP (SET_SRC (elt), 0))
++		  || offset + (i - base) * 4 != 0)))
+         return false;
++      dest_regno = REGNO (SET_DEST (elt));
++      if (dest_regno == REGNO (src_addr))
++        addr_reg_loaded = true;
+     }
+-
++  /* For Thumb, we only have updating instructions.  If the pattern does
++     not describe an update, it must be because the address register is
++     in the list of loaded registers - on the hardware, this has the effect
++     of overriding the update.  */
++  if (update && addr_reg_loaded)
++    return false;
++  if (TARGET_THUMB1)
++    return update || addr_reg_loaded;
+   return true;
+ })
+ 
+@@ -394,9 +425,9 @@
+   (match_code "parallel")
+ {
+   HOST_WIDE_INT count = XVECLEN (op, 0);
+-  int src_regno;
++  unsigned src_regno;
+   rtx dest_addr;
+-  HOST_WIDE_INT i = 1, base = 0;
++  HOST_WIDE_INT i = 1, base = 0, offset = 0;
+   rtx elt;
+ 
+   if (low_irq_latency)
+@@ -430,6 +461,16 @@
+   src_regno = REGNO (SET_SRC (XVECEXP (op, 0, i - 1)));
+   dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, i - 1)), 0);
+ 
++  if (GET_CODE (dest_addr) == PLUS)
++    {
++      if (GET_CODE (XEXP (dest_addr, 1)) != CONST_INT)
++	return false;
++      offset = INTVAL (XEXP (dest_addr, 1));
++      dest_addr = XEXP (dest_addr, 0);
++    }
++  if (!REG_P (dest_addr))
++    return false;
++
+   for (; i < count; i++)
+     {
+       elt = XVECEXP (op, 0, i);
+@@ -437,14 +478,17 @@
+       if (GET_CODE (elt) != SET
+           || GET_CODE (SET_SRC (elt)) != REG
+           || GET_MODE (SET_SRC (elt)) != SImode
+-          || REGNO (SET_SRC (elt)) != (unsigned int)(src_regno + i - base)
++          || REGNO (SET_SRC (elt)) <= src_regno
+           || GET_CODE (SET_DEST (elt)) != MEM
+           || GET_MODE (SET_DEST (elt)) != SImode
+-          || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
+-          || !rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
+-          || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
+-          || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != (i - base) * 4)
++          || ((GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
++	       || !rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
++	       || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
++               || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != offset + (i - base) * 4)
++	      && (!REG_P (XEXP (SET_DEST (elt), 0))
++		  || offset + (i - base) * 4 != 0)))
+         return false;
++      src_regno = REGNO (SET_SRC (elt));
+     }
+ 
+   return true;
+Index: gcc-4_5-branch/gcc/config/i386/i386.md
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config/i386/i386.md
++++ gcc-4_5-branch/gcc/config/i386/i386.md
+@@ -4934,6 +4934,7 @@
+    (set (match_operand:SSEMODEI24 2 "register_operand" "")
+ 	(fix:SSEMODEI24 (match_dup 0)))]
+   "TARGET_SHORTEN_X87_SSE
++   && !(TARGET_AVOID_VECTOR_DECODE && optimize_insn_for_speed_p ())
+    && peep2_reg_dead_p (2, operands[0])"
+   [(set (match_dup 2) (fix:SSEMODEI24 (match_dup 1)))]
+   "")
+@@ -20036,15 +20037,14 @@
+ ;;  leal    (%edx,%eax,4), %eax
+ 
+ (define_peephole2
+-  [(parallel [(set (match_operand 0 "register_operand" "")
++  [(match_scratch:P 5 "r")
++   (parallel [(set (match_operand 0 "register_operand" "")
+ 		   (ashift (match_operand 1 "register_operand" "")
+ 			   (match_operand 2 "const_int_operand" "")))
+ 	       (clobber (reg:CC FLAGS_REG))])
+-   (set (match_operand 3 "register_operand")
+-        (match_operand 4 "x86_64_general_operand" ""))
+-   (parallel [(set (match_operand 5 "register_operand" "")
+-		   (plus (match_operand 6 "register_operand" "")
+-			 (match_operand 7 "register_operand" "")))
++   (parallel [(set (match_operand 3 "register_operand" "")
++		   (plus (match_dup 0)
++			 (match_operand 4 "x86_64_general_operand" "")))
+ 		   (clobber (reg:CC FLAGS_REG))])]
+   "INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 3
+    /* Validate MODE for lea.  */
+@@ -20053,31 +20053,27 @@
+ 	    || GET_MODE (operands[0]) == HImode))
+        || GET_MODE (operands[0]) == SImode
+        || (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
++   && (rtx_equal_p (operands[0], operands[3])
++       || peep2_reg_dead_p (2, operands[0]))
+    /* We reorder load and the shift.  */
+-   && !rtx_equal_p (operands[1], operands[3])
+-   && !reg_overlap_mentioned_p (operands[0], operands[4])
+-   /* Last PLUS must consist of operand 0 and 3.  */
+-   && !rtx_equal_p (operands[0], operands[3])
+-   && (rtx_equal_p (operands[3], operands[6])
+-       || rtx_equal_p (operands[3], operands[7]))
+-   && (rtx_equal_p (operands[0], operands[6])
+-       || rtx_equal_p (operands[0], operands[7]))
+-   /* The intermediate operand 0 must die or be same as output.  */
+-   && (rtx_equal_p (operands[0], operands[5])
+-       || peep2_reg_dead_p (3, operands[0]))"
+-  [(set (match_dup 3) (match_dup 4))
++   && !reg_overlap_mentioned_p (operands[0], operands[4])"
++  [(set (match_dup 5) (match_dup 4))
+    (set (match_dup 0) (match_dup 1))]
+ {
+-  enum machine_mode mode = GET_MODE (operands[5]) == DImode ? DImode : SImode;
++  enum machine_mode mode = GET_MODE (operands[1]) == DImode ? DImode : SImode;
+   int scale = 1 << INTVAL (operands[2]);
+   rtx index = gen_lowpart (Pmode, operands[1]);
+-  rtx base = gen_lowpart (Pmode, operands[3]);
+-  rtx dest = gen_lowpart (mode, operands[5]);
++  rtx base = gen_lowpart (Pmode, operands[5]);
++  rtx dest = gen_lowpart (mode, operands[3]);
+ 
+   operands[1] = gen_rtx_PLUS (Pmode, base,
+   			      gen_rtx_MULT (Pmode, index, GEN_INT (scale)));
++  operands[5] = base;
+   if (mode != Pmode)
+-    operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
++    {
++      operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
++      operands[5] = gen_rtx_SUBREG (mode, operands[5], 0);
++    }
+   operands[0] = dest;
+ })
+ 
+Index: gcc-4_5-branch/gcc/df-problems.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/df-problems.c
++++ gcc-4_5-branch/gcc/df-problems.c
+@@ -3748,9 +3748,22 @@ df_simulate_find_defs (rtx insn, bitmap 
+   for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
+     {
+       df_ref def = *def_rec;
+-      /* If the def is to only part of the reg, it does
+-	 not kill the other defs that reach here.  */
+-      if (!(DF_REF_FLAGS (def) & (DF_REF_PARTIAL | DF_REF_CONDITIONAL)))
++      bitmap_set_bit (defs, DF_REF_REGNO (def));
++    }
++}
++
++/* Find the set of real DEFs, which are not clobbers, for INSN.  */
++
++void
++df_simulate_find_noclobber_defs (rtx insn, bitmap defs)
++{
++  df_ref *def_rec;
++  unsigned int uid = INSN_UID (insn);
++
++  for (def_rec = DF_INSN_UID_DEFS (uid); *def_rec; def_rec++)
++    {
++      df_ref def = *def_rec;
++      if (!(DF_REF_FLAGS (def) & (DF_REF_MUST_CLOBBER | DF_REF_MAY_CLOBBER)))
+ 	bitmap_set_bit (defs, DF_REF_REGNO (def));
+     }
+ }
+@@ -3921,7 +3934,7 @@ df_simulate_initialize_forwards (basic_b
+     {
+       df_ref def = *def_rec;
+       if (DF_REF_FLAGS (def) & DF_REF_AT_TOP)
+-	bitmap_clear_bit (live, DF_REF_REGNO (def));
++	bitmap_set_bit (live, DF_REF_REGNO (def));
+     }
+ }
+ 
+@@ -3942,7 +3955,7 @@ df_simulate_one_insn_forwards (basic_blo
+      while here the scan is performed forwards!  So, first assume that the
+      def is live, and if this is not true REG_UNUSED notes will rectify the
+      situation.  */
+-  df_simulate_find_defs (insn, live);
++  df_simulate_find_noclobber_defs (insn, live);
+ 
+   /* Clear all of the registers that go dead.  */
+   for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
+Index: gcc-4_5-branch/gcc/df.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/df.h
++++ gcc-4_5-branch/gcc/df.h
+@@ -978,6 +978,7 @@ extern void df_note_add_problem (void);
+ extern void df_md_add_problem (void);
+ extern void df_md_simulate_artificial_defs_at_top (basic_block, bitmap);
+ extern void df_md_simulate_one_insn (basic_block, rtx, bitmap);
++extern void df_simulate_find_noclobber_defs (rtx, bitmap);
+ extern void df_simulate_find_defs (rtx, bitmap);
+ extern void df_simulate_defs (rtx, bitmap);
+ extern void df_simulate_uses (rtx, bitmap);
+Index: gcc-4_5-branch/gcc/fwprop.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/fwprop.c
++++ gcc-4_5-branch/gcc/fwprop.c
+@@ -228,7 +228,10 @@ single_def_use_enter_block (struct dom_w
+ 
+   process_uses (df_get_artificial_uses (bb_index), DF_REF_AT_TOP);
+   process_defs (df_get_artificial_defs (bb_index), DF_REF_AT_TOP);
+-  df_simulate_initialize_forwards (bb, local_lr);
++
++  /* We don't call df_simulate_initialize_forwards, as it may overestimate
++     the live registers if there are unused artificial defs.  We prefer
++     liveness to be underestimated.  */
+ 
+   FOR_BB_INSNS (bb, insn)
+     if (INSN_P (insn))
+Index: gcc-4_5-branch/gcc/genoutput.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/genoutput.c
++++ gcc-4_5-branch/gcc/genoutput.c
+@@ -266,6 +266,8 @@ output_operand_data (void)
+ 
+       printf ("    %d,\n", d->strict_low);
+ 
++      printf ("    %d,\n", d->constraint == NULL ? 1 : 0);
++
+       printf ("    %d\n", d->eliminable);
+ 
+       printf("  },\n");
+Index: gcc-4_5-branch/gcc/genrecog.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/genrecog.c
++++ gcc-4_5-branch/gcc/genrecog.c
+@@ -1782,20 +1782,11 @@ change_state (const char *oldpos, const 
+   int odepth = strlen (oldpos);
+   int ndepth = strlen (newpos);
+   int depth;
+-  int old_has_insn, new_has_insn;
+ 
+   /* Pop up as many levels as necessary.  */
+   for (depth = odepth; strncmp (oldpos, newpos, depth) != 0; --depth)
+     continue;
+ 
+-  /* Hunt for the last [A-Z] in both strings.  */
+-  for (old_has_insn = odepth - 1; old_has_insn >= 0; --old_has_insn)
+-    if (ISUPPER (oldpos[old_has_insn]))
+-      break;
+-  for (new_has_insn = ndepth - 1; new_has_insn >= 0; --new_has_insn)
+-    if (ISUPPER (newpos[new_has_insn]))
+-      break;
+-
+   /* Go down to desired level.  */
+   while (depth < ndepth)
+     {
+Index: gcc-4_5-branch/gcc/ifcvt.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/ifcvt.c
++++ gcc-4_5-branch/gcc/ifcvt.c
+@@ -4011,6 +4011,7 @@ dead_or_predicable (basic_block test_bb,
+   basic_block new_dest = dest_edge->dest;
+   rtx head, end, jump, earliest = NULL_RTX, old_dest;
+   bitmap merge_set = NULL;
++  bitmap merge_set_noclobber  = NULL;
+   /* Number of pending changes.  */
+   int n_validated_changes = 0;
+   rtx new_dest_label;
+@@ -4169,6 +4170,7 @@ dead_or_predicable (basic_block test_bb,
+ 		       end of the block.  */
+ 
+       merge_set = BITMAP_ALLOC (&reg_obstack);
++      merge_set_noclobber = BITMAP_ALLOC (&reg_obstack);
+ 
+       /* If we allocated new pseudos (e.g. in the conditional move
+ 	 expander called from noce_emit_cmove), we must resize the
+@@ -4187,6 +4189,7 @@ dead_or_predicable (basic_block test_bb,
+ 		  df_ref def = *def_rec;
+ 		  bitmap_set_bit (merge_set, DF_REF_REGNO (def));
+ 		}
++              df_simulate_find_noclobber_defs (insn, merge_set_noclobber);
+ 	    }
+ 	}
+ 
+@@ -4197,7 +4200,7 @@ dead_or_predicable (basic_block test_bb,
+ 	  unsigned i;
+ 	  bitmap_iterator bi;
+ 
+-          EXECUTE_IF_SET_IN_BITMAP (merge_set, 0, i, bi)
++          EXECUTE_IF_SET_IN_BITMAP (merge_set_noclobber, 0, i, bi)
+ 	    {
+ 	      if (i < FIRST_PSEUDO_REGISTER
+ 		  && ! fixed_regs[i]
+@@ -4233,7 +4236,7 @@ dead_or_predicable (basic_block test_bb,
+ 	   TEST_SET & DF_LIVE_IN (merge_bb)
+ 	 are empty.  */
+ 
+-      if (bitmap_intersect_p (merge_set, test_set)
++      if (bitmap_intersect_p (merge_set_noclobber, test_set)
+ 	  || bitmap_intersect_p (merge_set, test_live)
+ 	  || bitmap_intersect_p (test_set, df_get_live_in (merge_bb)))
+ 	intersect = true;
+@@ -4320,6 +4323,7 @@ dead_or_predicable (basic_block test_bb,
+ 	    remove_reg_equal_equiv_notes_for_regno (i);
+ 
+ 	  BITMAP_FREE (merge_set);
++          BITMAP_FREE (merge_set_noclobber);
+ 	}
+ 
+       reorder_insns (head, end, PREV_INSN (earliest));
+@@ -4340,7 +4344,10 @@ dead_or_predicable (basic_block test_bb,
+   cancel_changes (0);
+  fail:
+   if (merge_set)
+-    BITMAP_FREE (merge_set);
++    {
++      BITMAP_FREE (merge_set);
++      BITMAP_FREE (merge_set_noclobber);
++    }
+   return FALSE;
+ }
+ 
+Index: gcc-4_5-branch/gcc/recog.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/recog.c
++++ gcc-4_5-branch/gcc/recog.c
+@@ -2082,6 +2082,7 @@ extract_insn (rtx insn)
+ 			       recog_data.operand_loc,
+ 			       recog_data.constraints,
+ 			       recog_data.operand_mode, NULL);
++	  memset (recog_data.is_operator, 0, sizeof recog_data.is_operator);
+ 	  if (noperands > 0)
+ 	    {
+ 	      const char *p =  recog_data.constraints[0];
+@@ -2111,6 +2112,7 @@ extract_insn (rtx insn)
+       for (i = 0; i < noperands; i++)
+ 	{
+ 	  recog_data.constraints[i] = insn_data[icode].operand[i].constraint;
++	  recog_data.is_operator[i] = insn_data[icode].operand[i].is_operator;
+ 	  recog_data.operand_mode[i] = insn_data[icode].operand[i].mode;
+ 	  /* VOIDmode match_operands gets mode from their real operand.  */
+ 	  if (recog_data.operand_mode[i] == VOIDmode)
+@@ -2909,6 +2911,10 @@ struct peep2_insn_data
+ 
+ static struct peep2_insn_data peep2_insn_data[MAX_INSNS_PER_PEEP2 + 1];
+ static int peep2_current;
++
++static bool peep2_do_rebuild_jump_labels;
++static bool peep2_do_cleanup_cfg;
++
+ /* The number of instructions available to match a peep2.  */
+ int peep2_current_count;
+ 
+@@ -2917,6 +2923,16 @@ int peep2_current_count;
+    DF_LIVE_OUT for the block.  */
+ #define PEEP2_EOB	pc_rtx
+ 
++/* Wrap N to fit into the peep2_insn_data buffer.  */
++
++static int
++peep2_buf_position (int n)
++{
++  if (n >= MAX_INSNS_PER_PEEP2 + 1)
++    n -= MAX_INSNS_PER_PEEP2 + 1;
++  return n;
++}
++
+ /* Return the Nth non-note insn after `current', or return NULL_RTX if it
+    does not exist.  Used by the recognizer to find the next insn to match
+    in a multi-insn pattern.  */
+@@ -2926,9 +2942,7 @@ peep2_next_insn (int n)
+ {
+   gcc_assert (n <= peep2_current_count);
+ 
+-  n += peep2_current;
+-  if (n >= MAX_INSNS_PER_PEEP2 + 1)
+-    n -= MAX_INSNS_PER_PEEP2 + 1;
++  n = peep2_buf_position (peep2_current + n);
+ 
+   return peep2_insn_data[n].insn;
+ }
+@@ -2941,9 +2955,7 @@ peep2_regno_dead_p (int ofs, int regno)
+ {
+   gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  ofs += peep2_current;
+-  if (ofs >= MAX_INSNS_PER_PEEP2 + 1)
+-    ofs -= MAX_INSNS_PER_PEEP2 + 1;
++  ofs = peep2_buf_position (peep2_current + ofs);
+ 
+   gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
+ 
+@@ -2959,9 +2971,7 @@ peep2_reg_dead_p (int ofs, rtx reg)
+ 
+   gcc_assert (ofs < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  ofs += peep2_current;
+-  if (ofs >= MAX_INSNS_PER_PEEP2 + 1)
+-    ofs -= MAX_INSNS_PER_PEEP2 + 1;
++  ofs = peep2_buf_position (peep2_current + ofs);
+ 
+   gcc_assert (peep2_insn_data[ofs].insn != NULL_RTX);
+ 
+@@ -2996,12 +3006,8 @@ peep2_find_free_register (int from, int 
+   gcc_assert (from < MAX_INSNS_PER_PEEP2 + 1);
+   gcc_assert (to < MAX_INSNS_PER_PEEP2 + 1);
+ 
+-  from += peep2_current;
+-  if (from >= MAX_INSNS_PER_PEEP2 + 1)
+-    from -= MAX_INSNS_PER_PEEP2 + 1;
+-  to += peep2_current;
+-  if (to >= MAX_INSNS_PER_PEEP2 + 1)
+-    to -= MAX_INSNS_PER_PEEP2 + 1;
++  from = peep2_buf_position (peep2_current + from);
++  to = peep2_buf_position (peep2_current + to);
+ 
+   gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
+   REG_SET_TO_HARD_REG_SET (live, peep2_insn_data[from].live_before);
+@@ -3010,8 +3016,7 @@ peep2_find_free_register (int from, int 
+     {
+       HARD_REG_SET this_live;
+ 
+-      if (++from >= MAX_INSNS_PER_PEEP2 + 1)
+-	from = 0;
++      from = peep2_buf_position (from + 1);
+       gcc_assert (peep2_insn_data[from].insn != NULL_RTX);
+       REG_SET_TO_HARD_REG_SET (this_live, peep2_insn_data[from].live_before);
+       IOR_HARD_REG_SET (live, this_live);
+@@ -3104,19 +3109,234 @@ peep2_reinit_state (regset live)
+   COPY_REG_SET (peep2_insn_data[MAX_INSNS_PER_PEEP2].live_before, live);
+ }
+ 
++/* While scanning basic block BB, we found a match of length MATCH_LEN,
++   starting at INSN.  Perform the replacement, removing the old insns and
++   replacing them with ATTEMPT.  Returns the last insn emitted.  */
++
++static rtx
++peep2_attempt (basic_block bb, rtx insn, int match_len, rtx attempt)
++{
++  int i;
++  rtx last, note, before_try, x;
++  bool was_call = false;
++
++  /* If we are splitting a CALL_INSN, look for the CALL_INSN
++     in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
++     cfg-related call notes.  */
++  for (i = 0; i <= match_len; ++i)
++    {
++      int j;
++      rtx old_insn, new_insn, note;
++
++      j = peep2_buf_position (peep2_current + i);
++      old_insn = peep2_insn_data[j].insn;
++      if (!CALL_P (old_insn))
++	continue;
++      was_call = true;
++
++      new_insn = attempt;
++      while (new_insn != NULL_RTX)
++	{
++	  if (CALL_P (new_insn))
++	    break;
++	  new_insn = NEXT_INSN (new_insn);
++	}
++
++      gcc_assert (new_insn != NULL_RTX);
++
++      CALL_INSN_FUNCTION_USAGE (new_insn)
++	= CALL_INSN_FUNCTION_USAGE (old_insn);
++
++      for (note = REG_NOTES (old_insn);
++	   note;
++	   note = XEXP (note, 1))
++	switch (REG_NOTE_KIND (note))
++	  {
++	  case REG_NORETURN:
++	  case REG_SETJMP:
++	    add_reg_note (new_insn, REG_NOTE_KIND (note),
++			  XEXP (note, 0));
++	    break;
++	  default:
++	    /* Discard all other reg notes.  */
++	    break;
++	  }
++
++      /* Croak if there is another call in the sequence.  */
++      while (++i <= match_len)
++	{
++	  j = peep2_buf_position (peep2_current + i);
++	  old_insn = peep2_insn_data[j].insn;
++	  gcc_assert (!CALL_P (old_insn));
++	}
++      break;
++    }
++
++  i = peep2_buf_position (peep2_current + match_len);
++
++  note = find_reg_note (peep2_insn_data[i].insn, REG_EH_REGION, NULL_RTX);
++
++  /* Replace the old sequence with the new.  */
++  last = emit_insn_after_setloc (attempt,
++				 peep2_insn_data[i].insn,
++				 INSN_LOCATOR (peep2_insn_data[i].insn));
++  before_try = PREV_INSN (insn);
++  delete_insn_chain (insn, peep2_insn_data[i].insn, false);
++
++  /* Re-insert the EH_REGION notes.  */
++  if (note || (was_call && nonlocal_goto_handler_labels))
++    {
++      edge eh_edge;
++      edge_iterator ei;
++
++      FOR_EACH_EDGE (eh_edge, ei, bb->succs)
++	if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
++	  break;
++
++      if (note)
++	copy_reg_eh_region_note_backward (note, last, before_try);
++
++      if (eh_edge)
++	for (x = last; x != before_try; x = PREV_INSN (x))
++	  if (x != BB_END (bb)
++	      && (can_throw_internal (x)
++		  || can_nonlocal_goto (x)))
++	    {
++	      edge nfte, nehe;
++	      int flags;
++
++	      nfte = split_block (bb, x);
++	      flags = (eh_edge->flags
++		       & (EDGE_EH | EDGE_ABNORMAL));
++	      if (CALL_P (x))
++		flags |= EDGE_ABNORMAL_CALL;
++	      nehe = make_edge (nfte->src, eh_edge->dest,
++				flags);
++
++	      nehe->probability = eh_edge->probability;
++	      nfte->probability
++		= REG_BR_PROB_BASE - nehe->probability;
++
++	      peep2_do_cleanup_cfg |= purge_dead_edges (nfte->dest);
++	      bb = nfte->src;
++	      eh_edge = nehe;
++	    }
++
++      /* Converting possibly trapping insn to non-trapping is
++	 possible.  Zap dummy outgoing edges.  */
++      peep2_do_cleanup_cfg |= purge_dead_edges (bb);
++    }
++
++  /* If we generated a jump instruction, it won't have
++     JUMP_LABEL set.  Recompute after we're done.  */
++  for (x = last; x != before_try; x = PREV_INSN (x))
++    if (JUMP_P (x))
++      {
++	peep2_do_rebuild_jump_labels = true;
++	break;
++      }
++
++  return last;
++}
++
++/* After performing a replacement in basic block BB, fix up the life
++   information in our buffer.  LAST is the last of the insns that we
++   emitted as a replacement.  PREV is the insn before the start of
++   the replacement.  MATCH_LEN is the number of instructions that were
++   matched, and which now need to be replaced in the buffer.  */
++
++static void
++peep2_update_life (basic_block bb, int match_len, rtx last, rtx prev)
++{
++  int i = peep2_buf_position (peep2_current + match_len + 1);
++  rtx x;
++  regset_head live;
++
++  INIT_REG_SET (&live);
++  COPY_REG_SET (&live, peep2_insn_data[i].live_before);
++
++  gcc_assert (peep2_current_count >= match_len + 1);
++  peep2_current_count -= match_len + 1;
++
++  x = last;
++  do
++    {
++      if (INSN_P (x))
++	{
++	  df_insn_rescan (x);
++	  if (peep2_current_count < MAX_INSNS_PER_PEEP2)
++	    {
++	      peep2_current_count++;
++	      if (--i < 0)
++		i = MAX_INSNS_PER_PEEP2;
++	      peep2_insn_data[i].insn = x;
++	      df_simulate_one_insn_backwards (bb, x, &live);
++	      COPY_REG_SET (peep2_insn_data[i].live_before, &live);
++	    }
++	}
++      x = PREV_INSN (x);
++    }
++  while (x != prev);
++  CLEAR_REG_SET (&live);
++
++  peep2_current = i;
++}
++
++/* Add INSN, which is in BB, at the end of the peep2 insn buffer if possible.
++   Return true if we added it, false otherwise.  The caller will try to match
++   peepholes against the buffer if we return false; otherwise it will try to
++   add more instructions to the buffer.  */
++
++static bool
++peep2_fill_buffer (basic_block bb, rtx insn, regset live)
++{
++  int pos;
++
++  /* Once we have filled the maximum number of insns the buffer can hold,
++     allow the caller to match the insns against peepholes.  We wait until
++     the buffer is full in case the target has similar peepholes of different
++     length; we always want to match the longest if possible.  */
++  if (peep2_current_count == MAX_INSNS_PER_PEEP2)
++    return false;
++
++  /* If an insn has RTX_FRAME_RELATED_P set, peephole substitution would lose
++     the REG_FRAME_RELATED_EXPR that is attached.  */
++  if (RTX_FRAME_RELATED_P (insn))
++    {
++      /* Let the buffer drain first.  */
++      if (peep2_current_count > 0)
++	return false;
++      /* Step over the insn then return true without adding the insn
++	 to the buffer; this will cause us to process the next
++	 insn.  */
++      df_simulate_one_insn_forwards (bb, insn, live);
++      return true;
++    }
++
++  pos = peep2_buf_position (peep2_current + peep2_current_count);
++  peep2_insn_data[pos].insn = insn;
++  COPY_REG_SET (peep2_insn_data[pos].live_before, live);
++  peep2_current_count++;
++
++  df_simulate_one_insn_forwards (bb, insn, live);
++  return true;
++}
++
+ /* Perform the peephole2 optimization pass.  */
+ 
+ static void
+ peephole2_optimize (void)
+ {
+-  rtx insn, prev;
++  rtx insn;
+   bitmap live;
+   int i;
+   basic_block bb;
+-  bool do_cleanup_cfg = false;
+-  bool do_rebuild_jump_labels = false;
++
++  peep2_do_cleanup_cfg = false;
++  peep2_do_rebuild_jump_labels = false;
+ 
+   df_set_flags (DF_LR_RUN_DCE);
++  df_note_add_problem ();
+   df_analyze ();
+ 
+   /* Initialize the regsets we're going to use.  */
+@@ -3126,214 +3346,59 @@ peephole2_optimize (void)
+ 
+   FOR_EACH_BB_REVERSE (bb)
+     {
++      bool past_end = false;
++      int pos;
++
+       rtl_profile_for_bb (bb);
+ 
+       /* Start up propagation.  */
+-      bitmap_copy (live, DF_LR_OUT (bb));
+-      df_simulate_initialize_backwards (bb, live);
++      bitmap_copy (live, DF_LR_IN (bb));
++      df_simulate_initialize_forwards (bb, live);
+       peep2_reinit_state (live);
+ 
+-      for (insn = BB_END (bb); ; insn = prev)
++      insn = BB_HEAD (bb);
++      for (;;)
+ 	{
+-	  prev = PREV_INSN (insn);
+-	  if (NONDEBUG_INSN_P (insn))
+-	    {
+-	      rtx attempt, before_try, x;
+-	      int match_len;
+-	      rtx note;
+-	      bool was_call = false;
+-
+-	      /* Record this insn.  */
+-	      if (--peep2_current < 0)
+-		peep2_current = MAX_INSNS_PER_PEEP2;
+-	      if (peep2_current_count < MAX_INSNS_PER_PEEP2
+-		  && peep2_insn_data[peep2_current].insn == NULL_RTX)
+-		peep2_current_count++;
+-	      peep2_insn_data[peep2_current].insn = insn;
+-	      df_simulate_one_insn_backwards (bb, insn, live);
+-	      COPY_REG_SET (peep2_insn_data[peep2_current].live_before, live);
+-
+-	      if (RTX_FRAME_RELATED_P (insn))
+-		{
+-		  /* If an insn has RTX_FRAME_RELATED_P set, peephole
+-		     substitution would lose the
+-		     REG_FRAME_RELATED_EXPR that is attached.  */
+-		  peep2_reinit_state (live);
+-		  attempt = NULL;
+-		}
+-	      else
+-		/* Match the peephole.  */
+-		attempt = peephole2_insns (PATTERN (insn), insn, &match_len);
+-
+-	      if (attempt != NULL)
+-		{
+-		  /* If we are splitting a CALL_INSN, look for the CALL_INSN
+-		     in SEQ and copy our CALL_INSN_FUNCTION_USAGE and other
+-		     cfg-related call notes.  */
+-		  for (i = 0; i <= match_len; ++i)
+-		    {
+-		      int j;
+-		      rtx old_insn, new_insn, note;
++	  rtx attempt, head;
++	  int match_len;
+ 
+-		      j = i + peep2_current;
+-		      if (j >= MAX_INSNS_PER_PEEP2 + 1)
+-			j -= MAX_INSNS_PER_PEEP2 + 1;
+-		      old_insn = peep2_insn_data[j].insn;
+-		      if (!CALL_P (old_insn))
+-			continue;
+-		      was_call = true;
+-
+-		      new_insn = attempt;
+-		      while (new_insn != NULL_RTX)
+-			{
+-			  if (CALL_P (new_insn))
+-			    break;
+-			  new_insn = NEXT_INSN (new_insn);
+-			}
+-
+-		      gcc_assert (new_insn != NULL_RTX);
+-
+-		      CALL_INSN_FUNCTION_USAGE (new_insn)
+-			= CALL_INSN_FUNCTION_USAGE (old_insn);
+-
+-		      for (note = REG_NOTES (old_insn);
+-			   note;
+-			   note = XEXP (note, 1))
+-			switch (REG_NOTE_KIND (note))
+-			  {
+-			  case REG_NORETURN:
+-			  case REG_SETJMP:
+-			    add_reg_note (new_insn, REG_NOTE_KIND (note),
+-					  XEXP (note, 0));
+-			    break;
+-			  default:
+-			    /* Discard all other reg notes.  */
+-			    break;
+-			  }
+-
+-		      /* Croak if there is another call in the sequence.  */
+-		      while (++i <= match_len)
+-			{
+-			  j = i + peep2_current;
+-			  if (j >= MAX_INSNS_PER_PEEP2 + 1)
+-			    j -= MAX_INSNS_PER_PEEP2 + 1;
+-			  old_insn = peep2_insn_data[j].insn;
+-			  gcc_assert (!CALL_P (old_insn));
+-			}
+-		      break;
+-		    }
+-
+-		  i = match_len + peep2_current;
+-		  if (i >= MAX_INSNS_PER_PEEP2 + 1)
+-		    i -= MAX_INSNS_PER_PEEP2 + 1;
+-
+-		  note = find_reg_note (peep2_insn_data[i].insn,
+-					REG_EH_REGION, NULL_RTX);
+-
+-		  /* Replace the old sequence with the new.  */
+-		  attempt = emit_insn_after_setloc (attempt,
+-						    peep2_insn_data[i].insn,
+-				       INSN_LOCATOR (peep2_insn_data[i].insn));
+-		  before_try = PREV_INSN (insn);
+-		  delete_insn_chain (insn, peep2_insn_data[i].insn, false);
+-
+-		  /* Re-insert the EH_REGION notes.  */
+-		  if (note || (was_call && nonlocal_goto_handler_labels))
+-		    {
+-		      edge eh_edge;
+-		      edge_iterator ei;
+-
+-		      FOR_EACH_EDGE (eh_edge, ei, bb->succs)
+-			if (eh_edge->flags & (EDGE_EH | EDGE_ABNORMAL_CALL))
+-			  break;
+-
+-		      if (note)
+-			copy_reg_eh_region_note_backward (note, attempt,
+-							  before_try);
+-
+-		      if (eh_edge)
+-			for (x = attempt ; x != before_try ; x = PREV_INSN (x))
+-			  if (x != BB_END (bb)
+-			      && (can_throw_internal (x)
+-				  || can_nonlocal_goto (x)))
+-			    {
+-			      edge nfte, nehe;
+-			      int flags;
+-
+-			      nfte = split_block (bb, x);
+-			      flags = (eh_edge->flags
+-				       & (EDGE_EH | EDGE_ABNORMAL));
+-			      if (CALL_P (x))
+-				flags |= EDGE_ABNORMAL_CALL;
+-			      nehe = make_edge (nfte->src, eh_edge->dest,
+-						flags);
+-
+-			      nehe->probability = eh_edge->probability;
+-			      nfte->probability
+-				= REG_BR_PROB_BASE - nehe->probability;
+-
+-			      do_cleanup_cfg |= purge_dead_edges (nfte->dest);
+-			      bb = nfte->src;
+-			      eh_edge = nehe;
+-			    }
+-
+-		      /* Converting possibly trapping insn to non-trapping is
+-			 possible.  Zap dummy outgoing edges.  */
+-		      do_cleanup_cfg |= purge_dead_edges (bb);
+-		    }
++	  if (!past_end && !NONDEBUG_INSN_P (insn))
++	    {
++	    next_insn:
++	      insn = NEXT_INSN (insn);
++	      if (insn == NEXT_INSN (BB_END (bb)))
++		past_end = true;
++	      continue;
++	    }
++	  if (!past_end && peep2_fill_buffer (bb, insn, live))
++	    goto next_insn;
+ 
+-		  if (targetm.have_conditional_execution ())
+-		    {
+-		      for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
+-			peep2_insn_data[i].insn = NULL_RTX;
+-		      peep2_insn_data[peep2_current].insn = PEEP2_EOB;
+-		      peep2_current_count = 0;
+-		    }
+-		  else
+-		    {
+-		      /* Back up lifetime information past the end of the
+-			 newly created sequence.  */
+-		      if (++i >= MAX_INSNS_PER_PEEP2 + 1)
+-			i = 0;
+-		      bitmap_copy (live, peep2_insn_data[i].live_before);
+-
+-		      /* Update life information for the new sequence.  */
+-		      x = attempt;
+-		      do
+-			{
+-			  if (INSN_P (x))
+-			    {
+-			      if (--i < 0)
+-				i = MAX_INSNS_PER_PEEP2;
+-			      if (peep2_current_count < MAX_INSNS_PER_PEEP2
+-				  && peep2_insn_data[i].insn == NULL_RTX)
+-				peep2_current_count++;
+-			      peep2_insn_data[i].insn = x;
+-			      df_insn_rescan (x);
+-			      df_simulate_one_insn_backwards (bb, x, live);
+-			      bitmap_copy (peep2_insn_data[i].live_before,
+-					   live);
+-			    }
+-			  x = PREV_INSN (x);
+-			}
+-		      while (x != prev);
++	  /* If we did not fill an empty buffer, it signals the end of the
++	     block.  */
++	  if (peep2_current_count == 0)
++	    break;
+ 
+-		      peep2_current = i;
+-		    }
++	  /* The buffer filled to the current maximum, so try to match.  */
+ 
+-		  /* If we generated a jump instruction, it won't have
+-		     JUMP_LABEL set.  Recompute after we're done.  */
+-		  for (x = attempt; x != before_try; x = PREV_INSN (x))
+-		    if (JUMP_P (x))
+-		      {
+-		        do_rebuild_jump_labels = true;
+-			break;
+-		      }
+-		}
++	  pos = peep2_buf_position (peep2_current + peep2_current_count);
++	  peep2_insn_data[pos].insn = PEEP2_EOB;
++	  COPY_REG_SET (peep2_insn_data[pos].live_before, live);
++
++	  /* Match the peephole.  */
++	  head = peep2_insn_data[peep2_current].insn;
++	  attempt = peephole2_insns (PATTERN (head), head, &match_len);
++	  if (attempt != NULL)
++	    {
++	      rtx last;
++	      last = peep2_attempt (bb, head, match_len, attempt);
++	      peep2_update_life (bb, match_len, last, PREV_INSN (attempt));
++	    }
++	  else
++	    {
++	      /* If no match, advance the buffer by one insn.  */
++	      peep2_current = peep2_buf_position (peep2_current + 1);
++	      peep2_current_count--;
+ 	    }
+-
+-	  if (insn == BB_HEAD (bb))
+-	    break;
+ 	}
+     }
+ 
+@@ -3341,7 +3406,7 @@ peephole2_optimize (void)
+   for (i = 0; i < MAX_INSNS_PER_PEEP2 + 1; ++i)
+     BITMAP_FREE (peep2_insn_data[i].live_before);
+   BITMAP_FREE (live);
+-  if (do_rebuild_jump_labels)
++  if (peep2_do_rebuild_jump_labels)
+     rebuild_jump_labels (get_insns ());
+ }
+ #endif /* HAVE_peephole2 */
+Index: gcc-4_5-branch/gcc/recog.h
+===================================================================
+--- gcc-4_5-branch.orig/gcc/recog.h
++++ gcc-4_5-branch/gcc/recog.h
+@@ -194,6 +194,9 @@ struct recog_data
+   /* Gives the constraint string for operand N.  */
+   const char *constraints[MAX_RECOG_OPERANDS];
+ 
++  /* Nonzero if operand N is a match_operator or a match_parallel.  */
++  char is_operator[MAX_RECOG_OPERANDS];
++
+   /* Gives the mode of operand N.  */
+   enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
+ 
+@@ -260,6 +263,8 @@ struct insn_operand_data
+ 
+   const char strict_low;
+ 
++  const char is_operator;
++
+   const char eliminable;
+ };
+ 
+Index: gcc-4_5-branch/gcc/reload.c
+===================================================================
+--- gcc-4_5-branch.orig/gcc/reload.c
++++ gcc-4_5-branch/gcc/reload.c
+@@ -3631,7 +3631,7 @@ find_reloads (rtx insn, int replace, int
+ 		   || modified[j] != RELOAD_WRITE)
+ 		  && j != i
+ 		  /* Ignore things like match_operator operands.  */
+-		  && *recog_data.constraints[j] != 0
++		  && !recog_data.is_operator[j]
+ 		  /* Don't count an input operand that is constrained to match
+ 		     the early clobber operand.  */
+ 		  && ! (this_alternative_matches[j] == i
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99478.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99478.patch
new file mode 100644
index 0000000000..38463a9b40
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99478.patch
@@ -0,0 +1,74 @@
+2011-01-11  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/arm/t-arm: Fix up last commit.
+
+2011-01-11  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+	* config/arm/t-arm: Update MD_INCLUDES to include
+	all the files correctly.
+	* config/arm/arm.md: Update comments.
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md	2011-02-22 11:38:56 +0000
++++ new/gcc/config/arm/arm.md	2011-03-01 14:32:39 +0000
+@@ -11246,6 +11246,7 @@
+   "
+ )
+ 
++;; Make sure that the includes are reflected in MD_INCLUDES.
+ ;; Load the load/store multiple patterns
+ (include "ldmstm.md")
+ ;; Load the FPA co-processor patterns
+
+=== modified file 'gcc/config/arm/t-arm'
+--- old/gcc/config/arm/t-arm	2010-08-16 09:41:58 +0000
++++ new/gcc/config/arm/t-arm	2011-01-11 21:01:30 +0000
+@@ -18,20 +18,33 @@
+ # along with GCC; see the file COPYING3.  If not see
+ # <http://www.gnu.org/licenses/>.
+ 
+-MD_INCLUDES= 	$(srcdir)/config/arm/arm-tune.md \
+-		$(srcdir)/config/arm/predicates.md \
+-		$(srcdir)/config/arm/arm-generic.md \
+-		$(srcdir)/config/arm/arm1020e.md \
+-		$(srcdir)/config/arm/arm1026ejs.md \
+-		$(srcdir)/config/arm/arm1136jfs.md \
+-		$(srcdir)/config/arm/arm926ejs.md \
+-		$(srcdir)/config/arm/cirrus.md \
+-		$(srcdir)/config/arm/fpa.md \
+-		$(srcdir)/config/arm/vec-common.md \
+-		$(srcdir)/config/arm/iwmmxt.md \
+-		$(srcdir)/config/arm/vfp.md \
+-		$(srcdir)/config/arm/neon.md \
+-		$(srcdir)/config/arm/thumb2.md
++MD_INCLUDES=	$(srcdir)/config/arm/arm-tune.md          	\
++		$(srcdir)/config/arm/predicates.md		\
++		$(srcdir)/config/arm/arm-generic.md       	\
++	 	$(srcdir)/config/arm/arm1020e.md          	\
++	 	$(srcdir)/config/arm/arm1026ejs.md        	\
++		$(srcdir)/config/arm/arm1136jfs.md        	\
++	 	$(srcdir)/config/arm/arm926ejs.md         	\
++		$(srcdir)/config/arm/cirrus.md            	\
++		$(srcdir)/config/arm/fpa.md               	\
++		$(srcdir)/config/arm/vec-common.md        	\
++		$(srcdir)/config/arm/iwmmxt.md            	\
++		$(srcdir)/config/arm/vfp.md               	\
++	 	$(srcdir)/config/arm/cortex-a5.md         	\
++		$(srcdir)/config/arm/cortex-a8.md         	\
++		$(srcdir)/config/arm/cortex-a9.md         	\
++		$(srcdir)/config/arm/cortex-a9-neon.md		\
++		$(srcdir)/config/arm/cortex-r4.md         	\
++		$(srcdir)/config/arm/cortex-r4f.md        	\
++		$(srcdir)/config/arm/cortex-m4.md         	\
++		$(srcdir)/config/arm/cortex-m4-fpu.md     	\
++		$(srcdir)/config/arm/vfp11.md             	\
++		$(srcdir)/config/arm/ldmstm.md            	\
++		$(srcdir)/config/arm/thumb2.md            	\
++		$(srcdir)/config/arm/neon.md              	\
++		$(srcdir)/config/arm/sync.md              	\
++		$(srcdir)/config/arm/cortex-a8-neon.md    	\
++		$(srcdir)/config/arm/constraints.md       	
+ 
+ LIB1ASMSRC = arm/lib1funcs.asm
+ LIB1ASMFUNCS = _thumb1_case_sqi _thumb1_case_uqi _thumb1_case_shi \
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99479.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99479.patch
new file mode 100644
index 0000000000..2920466d8f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99479.patch
@@ -0,0 +1,101 @@
+2011-02-24  Chung-Lin Tang  <cltang@codesourcery.com>
+
+	Backport from FSF mainline:
+
+	2010-08-10  Bernd Schmidt  <bernds@codesourcery.com>
+
+	PR bootstrap/45177
+	* config/arm/arm.c (multiple_operation_profitable_p): Move xscale
+	test here from arm_gen_load_multiple_1.
+	(arm_gen_load_multiple_1, arm_gen_store_multiple_1): Use
+	multiple_operation_profitable_p.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2011-02-22 11:38:56 +0000
++++ new/gcc/config/arm/arm.c	2011-02-24 17:30:32 +0000
+@@ -9728,6 +9728,36 @@
+   if (nops == 2 && arm_ld_sched && add_offset != 0)
+     return false;
+ 
++  /* XScale has load-store double instructions, but they have stricter
++     alignment requirements than load-store multiple, so we cannot
++     use them.
++
++     For XScale ldm requires 2 + NREGS cycles to complete and blocks
++     the pipeline until completion.
++
++	NREGS		CYCLES
++	  1		  3
++	  2		  4
++	  3		  5
++	  4		  6
++
++     An ldr instruction takes 1-3 cycles, but does not block the
++     pipeline.
++
++	NREGS		CYCLES
++	  1		 1-3
++	  2		 2-6
++	  3		 3-9
++	  4		 4-12
++
++     Best case ldr will always win.  However, the more ldr instructions
++     we issue, the less likely we are to be able to schedule them well.
++     Using ldr instructions also increases code size.
++
++     As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
++     for counts of 3 or 4 regs.  */
++  if (nops <= 2 && arm_tune_xscale && !optimize_size)
++    return false;
+   return true;
+ }
+ 
+@@ -10086,35 +10116,7 @@
+   int i = 0, j;
+   rtx result;
+ 
+-  /* XScale has load-store double instructions, but they have stricter
+-     alignment requirements than load-store multiple, so we cannot
+-     use them.
+-
+-     For XScale ldm requires 2 + NREGS cycles to complete and blocks
+-     the pipeline until completion.
+-
+-	NREGS		CYCLES
+-	  1		  3
+-	  2		  4
+-	  3		  5
+-	  4		  6
+-
+-     An ldr instruction takes 1-3 cycles, but does not block the
+-     pipeline.
+-
+-	NREGS		CYCLES
+-	  1		 1-3
+-	  2		 2-6
+-	  3		 3-9
+-	  4		 4-12
+-
+-     Best case ldr will always win.  However, the more ldr instructions
+-     we issue, the less likely we are to be able to schedule them well.
+-     Using ldr instructions also increases code size.
+-
+-     As a compromise, we use ldr for counts of 1 or 2 regs, and ldm
+-     for counts of 3 or 4 regs.  */
+-  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
++  if (low_irq_latency || !multiple_operation_profitable_p (false, count, 0))
+     {
+       rtx seq;
+ 
+@@ -10166,9 +10168,7 @@
+   if (GET_CODE (basereg) == PLUS)
+     basereg = XEXP (basereg, 0);
+ 
+-  /* See arm_gen_load_multiple_1 for discussion of
+-     the pros/cons of ldm/stm usage for XScale.  */
+-  if (low_irq_latency || (arm_tune_xscale && count <= 2 && ! optimize_size))
++  if (low_irq_latency || !multiple_operation_profitable_p (false, count, 0))
+     {
+       rtx seq;
+ 
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99480.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99480.patch
new file mode 100644
index 0000000000..76d3c9565c
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99480.patch
@@ -0,0 +1,64 @@
+2011-02-02  Richard Sandiford  <richard.sandiford@linaro.org>
+
+
+	gcc/
+	PR target/47551
+	* config/arm/arm.c (coproc_secondary_reload_class): Handle
+	structure modes.  Don't check neon_vector_mem_operand for
+	vector or structure modes.
+
+	gcc/testsuite/
+	PR target/47551
+	* gcc.target/arm/neon-modes-2.c: New test.
+
+=== modified file 'gcc/config/arm/arm.c'
+--- old/gcc/config/arm/arm.c	2011-02-24 17:30:32 +0000
++++ new/gcc/config/arm/arm.c	2011-03-02 11:29:06 +0000
+@@ -9303,11 +9303,14 @@
+       return GENERAL_REGS;
+     }
+ 
++  /* The neon move patterns handle all legitimate vector and struct
++     addresses.  */
+   if (TARGET_NEON
++      && MEM_P (x)
+       && (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
+-          || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
+-      && neon_vector_mem_operand (x, 0))
+-     return NO_REGS;
++	  || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT
++	  || VALID_NEON_STRUCT_MODE (mode)))
++    return NO_REGS;
+ 
+   if (arm_coproc_mem_operand (x, wb) || s_register_operand (x, mode))
+     return NO_REGS;
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-modes-2.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-modes-2.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-modes-2.c	2011-02-02 13:48:10 +0000
+@@ -0,0 +1,24 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O1" } */
++/* { dg-add-options arm_neon } */
++
++#include "arm_neon.h"
++
++#define SETUP(A) x##A = vld3_u32 (ptr + A * 0x20)
++#define MODIFY(A) x##A = vld3_lane_u32 (ptr + A * 0x20 + 0x10, x##A, 1)
++#define STORE(A) vst3_u32 (ptr + A * 0x20, x##A)
++
++#define MANY(A) A (0), A (1), A (2), A (3), A (4), A (5)
++
++void
++bar (uint32_t *ptr, int y)
++{
++  uint32x2x3_t MANY (SETUP);
++  int *x = __builtin_alloca (y);
++  int z[0x1000];
++  foo (x, z);
++  MANY (MODIFY);
++  foo (x, z);
++  MANY (STORE);
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch
new file mode 100644
index 0000000000..db53255de8
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99481.patch
@@ -0,0 +1,40 @@
+ 2011-02-02  Richard Sandiford  <richard.sandiford@linaro.org>
+ 
+	gcc/testsuite/
+	PR target/47553
+	* gcc.target/arm/neon-vld-1.c: New test.
+	gcc/
+	PR target/47553
+	* config/arm/predicates.md (neon_lane_number): Accept 0..15.
+
+=== modified file 'gcc/config/arm/predicates.md'
+--- old/gcc/config/arm/predicates.md	2011-02-08 12:07:29 +0000
++++ new/gcc/config/arm/predicates.md	2011-03-02 12:28:41 +0000
+@@ -607,7 +607,7 @@
+ ;; TODO: We could check lane numbers more precisely based on the mode.
+ (define_predicate "neon_lane_number"
+   (and (match_code "const_int")
+-       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 7")))
++       (match_test "INTVAL (op) >= 0 && INTVAL (op) <= 15")))
+ ;; Predicates for named expanders that overlap multiple ISAs.
+ 
+ (define_predicate "cmpdi_operand"
+
+=== added file 'gcc/testsuite/gcc.target/arm/neon-vld-1.c'
+--- old/gcc/testsuite/gcc.target/arm/neon-vld-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.target/arm/neon-vld-1.c	2011-02-02 13:57:54 +0000
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target arm_neon_ok } */
++/* { dg-options "-O1" } */
++/* { dg-add-options arm_neon } */
++
++#include <arm_neon.h>
++
++uint8x16_t
++foo (uint8_t *a, uint8x16_t b)
++{
++  vst1q_lane_u8 (a, b, 14);
++  return vld1q_lane_u8 (a + 0x100, b, 15);
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99482.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99482.patch
new file mode 100644
index 0000000000..334ac4ec1a
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99482.patch
@@ -0,0 +1,84 @@
+ 2011-02-02  Richard Sandiford  <richard.sandiford@linaro.org>
+ 
+	gcc/
+	Backport from mainline:
+
+	2011-01-23  Bernd Schmidt  <bernds@codesourcery.com>
+		    Richard Sandiford  <rdsandiford@googlemail.com>
+
+	PR rtl-optimization/47166
+	* reload1.c (emit_reload_insns): Disable the spill_reg_store
+	mechanism for PRE_MODIFY and POST_MODIFY.
+	(inc_for_reload): For PRE_MODIFY, return the insn that sets the
+	reloadreg.
+
+	gcc/testsuite/
+	* gcc.c-torture/execute/postmod-1.c: New test.
+
+=== added file 'gcc/testsuite/gcc.c-torture/execute/postmod-1.c'
+--- old/gcc/testsuite/gcc.c-torture/execute/postmod-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.c-torture/execute/postmod-1.c	2011-02-02 14:23:10 +0000
+@@ -0,0 +1,62 @@
++#define DECLARE_ARRAY(A) array##A[0x10]
++#define DECLARE_COUNTER(A) counter##A = 0
++#define DECLARE_POINTER(A) *pointer##A = array##A + x
++/* Create a loop that allows post-modification of pointerA, followed by
++   a use of the post-modified address.  */
++#define BEFORE(A) counter##A += *pointer##A, pointer##A += 3
++#define AFTER(A) counter##A += pointer##A[x]
++
++/* Set up the arrays so that one iteration of the loop sets the counter
++   to 3.0f.  */
++#define INIT_ARRAY(A) array##A[1] = 1.0f, array##A[5] = 2.0f
++
++/* Check that the loop worked correctly for all values.  */
++#define CHECK_ARRAY(A) exit_code |= (counter##A != 3.0f)
++
++/* Having 6 copies triggered the bug for ARM and Thumb.  */
++#define MANY(A) A (0), A (1), A (2), A (3), A (4), A (5)
++
++/* Each addendA should be allocated a register.  */
++#define INIT_VOLATILE(A) addend##A = vol
++#define ADD_VOLATILE(A) vol += addend##A
++
++/* Having 5 copies triggered the bug for ARM and Thumb.  */
++#define MANY2(A) A (0), A (1), A (2), A (3), A (4)
++
++float MANY (DECLARE_ARRAY);
++float MANY (DECLARE_COUNTER);
++
++volatile int stop = 1;
++volatile int vol;
++
++void __attribute__((noinline))
++foo (int x)
++{
++  float MANY (DECLARE_POINTER);
++  int i;
++
++  do
++    {
++      MANY (BEFORE);
++      MANY (AFTER);
++      /* Create an inner loop that should ensure the code above
++	 has registers free for reload inheritance.  */
++      {
++	int MANY2 (INIT_VOLATILE);
++	for (i = 0; i < 10; i++)
++	  MANY2 (ADD_VOLATILE);
++      }
++    }
++  while (!stop);
++}
++
++int
++main (void)
++{
++  int exit_code = 0;
++
++  MANY (INIT_ARRAY);
++  foo (1);
++  MANY (CHECK_ARRAY);
++  return exit_code;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99483.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99483.patch
new file mode 100644
index 0000000000..c0be4a03b1
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99483.patch
@@ -0,0 +1,63 @@
+2011-02-11  Richard Sandiford  <richard.sandiford@linaro.org>
+
+	gcc/
+	* cse.c (count_reg_usage): Check side_effects_p.  Remove the
+	separate check for volatile asms.
+
+	gcc/testsuite/
+	* gcc.dg/torture/volatile-pic-1.c: New test.
+
+=== modified file 'gcc/cse.c'
+--- old/gcc/cse.c	2010-11-26 12:03:32 +0000
++++ new/gcc/cse.c	2011-02-11 09:27:19 +0000
+@@ -6634,9 +6634,10 @@
+     case CALL_INSN:
+     case INSN:
+     case JUMP_INSN:
+-      /* We expect dest to be NULL_RTX here.  If the insn may trap, mark
+-         this fact by setting DEST to pc_rtx.  */
+-      if (insn_could_throw_p (x))
++      /* We expect dest to be NULL_RTX here.  If the insn may trap,
++	 or if it cannot be deleted due to side-effects, mark this fact
++	 by setting DEST to pc_rtx.  */
++      if (insn_could_throw_p (x) || side_effects_p (PATTERN (x)))
+ 	dest = pc_rtx;
+       if (code == CALL_INSN)
+ 	count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, dest, incr);
+@@ -6676,10 +6677,6 @@
+       return;
+ 
+     case ASM_OPERANDS:
+-      /* If the asm is volatile, then this insn cannot be deleted,
+-	 and so the inputs *must* be live.  */
+-      if (MEM_VOLATILE_P (x))
+-	dest = NULL_RTX;
+       /* Iterate over just the inputs, not the constraints as well.  */
+       for (i = ASM_OPERANDS_INPUT_LENGTH (x) - 1; i >= 0; i--)
+ 	count_reg_usage (ASM_OPERANDS_INPUT (x, i), counts, dest, incr);
+
+=== added file 'gcc/testsuite/gcc.dg/torture/volatile-pic-1.c'
+--- old/gcc/testsuite/gcc.dg/torture/volatile-pic-1.c	1970-01-01 00:00:00 +0000
++++ new/gcc/testsuite/gcc.dg/torture/volatile-pic-1.c	2011-02-11 09:27:19 +0000
+@@ -0,0 +1,20 @@
++/* { dg-do run } */
++/* { dg-require-visibility "" } */
++/* { dg-require-effective-target fpic } */
++/* { dg-options "-fPIC" } */
++
++volatile int x __attribute__((visibility("hidden")));
++
++void __attribute__((noinline)) bar (void)
++{
++#if defined (__arm__)
++  asm volatile ("mov r3,%0" :: "r" (0xdeadbeef) : "r3");
++#endif
++  (void) x;
++}
++
++int main (void)
++{
++  bar ();
++  return 0;
++}
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/mips64-nomultilib.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/mips64-nomultilib.patch
new file mode 100644
index 0000000000..1ef69f899d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/mips64-nomultilib.patch
@@ -0,0 +1,52 @@
+Index: gcc-4.5/gcc/config/mips/linux64.h
+===================================================================
+--- gcc-4.5.orig/gcc/config/mips/linux64.h	2010-09-25 02:05:05.484423095 -0700
++++ gcc-4.5/gcc/config/mips/linux64.h	2010-09-25 02:31:18.524931014 -0700
+@@ -26,7 +26,7 @@
+   BASE_DRIVER_SELF_SPECS, \
+   LINUX_DRIVER_SELF_SPECS \
+   " %{!EB:%{!EL:%(endian_spec)}}" \
+-  " %{!mabi=*: -mabi=n32}"
++  " %{!mabi=*: -mabi=64}"
+ 
+ #undef LIB_SPEC
+ #define LIB_SPEC "\
+@@ -35,9 +35,9 @@
+ %{!shared: \
+   %{profile:-lc_p} %{!profile:-lc}}"
+ 
+-#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
+-#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld.so.1"
+-#define GLIBC_DYNAMIC_LINKERN32 "/lib32/ld.so.1"
++#define GLIBC_DYNAMIC_LINKER32 "/lib32/ld.so.1"
++#define GLIBC_DYNAMIC_LINKER64 "/lib/ld.so.1"
++#define GLIBC_DYNAMIC_LINKERN32 "/lib64/ld.so.1"
+ #define UCLIBC_DYNAMIC_LINKERN32 "/lib32/ld-uClibc.so.0"
+ #define LINUX_DYNAMIC_LINKERN32 \
+   CHOOSE_DYNAMIC_LINKER (GLIBC_DYNAMIC_LINKERN32, UCLIBC_DYNAMIC_LINKERN32)
+Index: gcc-4.5/gcc/config.gcc
+===================================================================
+--- gcc-4.5.orig/gcc/config.gcc	2010-07-22 16:37:17.000000000 -0700
++++ gcc-4.5/gcc/config.gcc	2010-09-25 02:25:41.412414136 -0700
+@@ -1707,7 +1707,7 @@
+ 	*-*-irix6*)
+ 		tm_file="${tm_file} mips/iris6.h"
+ 		tmake_file="${tmake_file} mips/t-iris6"
+-		tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_N32"
++		tm_defines="${tm_defines} MIPS_ISA_DEFAULT=3 MIPS_ABI_DEFAULT=ABI_64"
+ 		case ${target} in
+ 		*-*-irix6.[0-4]*)
+ 			use_gcc_stdint=provide
+Index: gcc-4.5/gcc/config/mips/t-linux64
+===================================================================
+--- gcc-4.5.orig/gcc/config/mips/t-linux64	2010-07-11 16:14:42.000000000 -0700
++++ gcc-4.5/gcc/config/mips/t-linux64	2010-09-25 02:29:52.758708250 -0700
+@@ -18,7 +18,7 @@
+ 
+ MULTILIB_OPTIONS = mabi=n32/mabi=32/mabi=64
+ MULTILIB_DIRNAMES = n32 32 64
+-MULTILIB_OSDIRNAMES = ../lib32 ../lib ../lib64
++MULTILIB_OSDIRNAMES = ../lib64 ../lib32 ../lib
+ 
+ EXTRA_MULTILIB_PARTS=crtbegin.o crtend.o crtbeginS.o crtendS.o crtbeginT.o
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/more-epilogues.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/more-epilogues.patch
new file mode 100644
index 0000000000..64f1cf3751
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/more-epilogues.patch
@@ -0,0 +1,83 @@
+Index: a/gcc/cfgcleanup.c
+===================================================================
+--- a/gcc/cfgcleanup.c	(revision 315947)
++++ b/gcc/cfgcleanup.c	(working copy)
+@@ -1179,13 +1179,19 @@ flow_find_head_matching_sequence (basic_
+ 
+   while (true)
+     {
+-
+-      /* Ignore notes.  */
++      /* Ignore notes, except NOTE_INSN_EPILOGUE_BEG.  */
+       while (!NONDEBUG_INSN_P (i1) && i1 != BB_END (bb1))
+-	i1 = NEXT_INSN (i1);
+-
++	{
++	  if (NOTE_P (i1) && NOTE_KIND (i1) == NOTE_INSN_EPILOGUE_BEG)
++	    break;
++	  i1 = NEXT_INSN (i1);
++	}
+       while (!NONDEBUG_INSN_P (i2) && i2 != BB_END (bb2))
+-	i2 = NEXT_INSN (i2);
++	{
++	  if (NOTE_P (i2) && NOTE_KIND (i2) == NOTE_INSN_EPILOGUE_BEG)
++	    break;
++	  i2 = NEXT_INSN (i2);
++	}
+ 
+       if (NOTE_P (i1) || NOTE_P (i2)
+ 	  || JUMP_P (i1) || JUMP_P (i2))
+Index: a/gcc/cfglayout.c
+===================================================================
+--- a/gcc/cfglayout.c	(revision 315947)
++++ b/gcc/cfglayout.c	(working copy)
+@@ -1295,6 +1295,16 @@ cfg_layout_initialize (unsigned int flag
+       bb->flags |= BB_NON_LOCAL_GOTO_TARGET;
+     }
+ 
++  FOR_EACH_BB (bb)
++    {
++      rtx insn;
++      FOR_BB_INSNS (bb, insn)
++	if (NOTE_P (insn) && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
++	  {
++	    bb->flags |= BB_EPILOGUE_BEGIN;
++	    break;
++	  }
++    }
+   cleanup_cfg (CLEANUP_CFGLAYOUT | flags);
+ }
+ 
+Index: a/gcc/basic-block.h
+===================================================================
+--- a/gcc/basic-block.h	(revision 315947)
++++ b/gcc/basic-block.h	(working copy)
+@@ -332,7 +332,11 @@ enum bb_flags
+ 
+   /* Set on blocks that cannot be threaded through.
+      Only used in cfgcleanup.c.  */
+-  BB_NONTHREADABLE_BLOCK = 1 << 11
++  BB_NONTHREADABLE_BLOCK = 1 << 11,
++
++  /* Set on blocks that have a NOTE_INSN_EPILOGUE_BEGIN.
++     Only used in cfglayout mode.  */
++  BB_EPILOGUE_BEGIN = 1 << 12
+ };
+ 
+ /* Dummy flag for convenience in the hot/cold partitioning code.  */
+Index: a/gcc/cfgrtl.c
+===================================================================
+--- a/gcc/cfgrtl.c	(revision 315947)
++++ b/gcc/cfgrtl.c	(working copy)
+@@ -2707,7 +2707,10 @@ cfg_layout_can_merge_blocks_p (basic_blo
+ 	     not allow us to redirect an edge by replacing a table jump.  */
+ 	  && (!JUMP_P (BB_END (a))
+ 	      || ((!optimize || reload_completed)
+-		  ? simplejump_p (BB_END (a)) : onlyjump_p (BB_END (a)))));
++		  ? simplejump_p (BB_END (a)) : onlyjump_p (BB_END (a))))
++	  /* Don't separate a NOTE_INSN_EPILOGUE_BEG from its returnjump.  */
++	  && (!(b->flags & BB_EPILOGUE_BEGIN)
++	      || returnjump_p (BB_END (b))));
+ }
+ 
+ /* Merge block A and B.  The blocks must be mergeable.  */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/optional_libstdc.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/optional_libstdc.patch
new file mode 100644
index 0000000000..0f74353a1f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/optional_libstdc.patch
@@ -0,0 +1,23 @@
+gcc-runtime builds libstdc++ separately from gcc-cross-*. Its configure tests using g++ 
+will not run correctly since my default the linker will try and link against libstdc++
+which shouldn't exist yet. We need an option to disable the automatically added -lstdc++
+option whilst leaving -lc, -lgcc and other automatic library dependencies. This patch 
+adds such an option which only disables the -lstdc++ linkage.
+
+A "standard" gcc build uses xgcc and hence avoids this. We should ask upstream how to 
+do this officially, the likely answer is don't build libstdc++ separately.
+
+RP 29/6/10
+
+Index: gcc-4.3.3/gcc/cp/g++spec.c
+===================================================================
+--- gcc-4.3.3.orig/gcc/cp/g++spec.c	2010-06-29 00:06:03.901695025 +0100
++++ gcc-4.3.3/gcc/cp/g++spec.c	2010-06-29 00:06:58.800325439 +0100
+@@ -131,6 +131,7 @@
+       if (argv[i][0] == '-')
+ 	{
+ 	  if (strcmp (argv[i], "-nostdlib") == 0
++	      || strcmp (argv[i], "-nostdlib++") == 0
+ 	      || strcmp (argv[i], "-nodefaultlibs") == 0)
+ 	    {
+ 	      library = -1;
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/pr30961.dpatch b/meta-oe/recipes-devtools/gcc/gcc-4.5/pr30961.dpatch
new file mode 100644
index 0000000000..b20fdf5bf5
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/pr30961.dpatch
@@ -0,0 +1,179 @@
+#! /bin/sh -e
+
+# DP: <your description>
+
+dir=
+if [ $# -eq 3 -a "$2" = '-d' ]; then
+    pdir="-d $3"
+    dir="$3/"
+elif [ $# -ne 1 ]; then
+    echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+    exit 1
+fi
+case "$1" in
+    -patch)
+        patch $pdir -f --no-backup-if-mismatch -p0 < $0
+        ;;
+    -unpatch)
+        patch $pdir -f --no-backup-if-mismatch -R -p0 < $0
+        ;;
+    *)
+        echo >&2 "`basename $0`: script expects -patch|-unpatch as argument"
+        exit 1
+esac
+exit 0
+
+From: "H.J. Lu" <hjl@lucon.org>
+Sender: gcc-patches-owner@gcc.gnu.org
+To: gcc-patches@gcc.gnu.org
+Subject: PATCH: PR target/30961: [4.1/4.2/4.3 regression] redundant reg/mem 	stores/moves
+Date: Mon, 27 Aug 2007 11:34:12 -0700
+
+We start with
+
+(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
+
+(insn:HI 6 3 10 2 c.c:3 (set (reg:DF 58 [ <result> ])
+        (subreg:DF (reg/v:DI 59 [ in ]) 0)) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg/v:DI 59 [ in ])
+        (nil)))
+
+(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
+        (reg:DF 58 [ <result> ])) 102 {*movdf_integer_rex64} (expr_list:REG_DEAD (reg:DF 58 [ <result> ])
+        (nil)))
+
+(insn:HI 16 10 0 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
+
+we are trying to allocate registers for insn 6 and we allocate
+xmm0 for the return value. Reload doesn't check if xmm0 can be used for
+DF 59, it allocates xmm1 for DF 59 and generates:
+
+Reloads for insn # 6
+Reload 0: reload_in (DF) = (reg:DF 5 di)
+        SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
+        reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
+        reload_reg_rtx: (reg:DF 22 xmm1)
+...
+
+(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
+
+(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
+
+(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
+                (const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
+        (reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
+
+(insn 23 22 6 2 c.c:3 (set (reg:DF 22 xmm1)
+        (mem/c:DF (plus:DI (reg/f:DI 7 sp)
+                (const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
+
+(insn:HI 6 23 16 2 c.c:3 (set (reg:DF 21 xmm0 [orig:58 <result> ] [58])
+        (reg:DF 22 xmm1)) 102 {*movdf_integer_rex64} (nil))
+
+(insn 16 6 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
+
+This patch tries to use the destination register when reloading for input. It
+generates
+
+Reloads for insn # 6
+Reload 0: reload_in (DF) = (reg:DF 5 di)
+        SSE_REGS, RELOAD_FOR_INPUT (opnum = 1), can't combine
+        reload_in_reg: (subreg:DF (reg/v:DI 5 di [orig:59 in ] [59]) 0)
+        reload_reg_rtx: (reg:DF 21 xmm0)
+...
+(note:HI 4 1 3 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
+
+(note:HI 3 4 22 2 NOTE_INSN_FUNCTION_BEG)
+
+(insn 22 3 23 2 c.c:3 (set (mem/c:DF (plus:DI (reg/f:DI 7 sp)
+                (const_int -8 [0xfffffffffffffff8])) [0 S8 A8])
+        (reg:DF 5 di)) 102 {*movdf_integer_rex64} (nil))
+
+(insn 23 22 6 2 c.c:3 (set (reg:DF 21 xmm0)
+        (mem/c:DF (plus:DI (reg/f:DI 7 sp)
+                (const_int -8 [0xfffffffffffffff8])) [0 S8 A8])) 102 {*movdf_integer_rex64} (nil))
+
+(insn:HI 6 23 10 2 c.c:3 (set (reg:DF 22 xmm1 [orig:58 <result> ] [58])
+        (reg:DF 21 xmm0)) 102 {*movdf_integer_rex64} (nil))
+
+(insn:HI 10 6 16 2 c.c:7 (set (reg/i:DF 21 xmm0 [ <result> ])
+        (reg:DF 22 xmm1 [orig:58 <result> ] [58])) 102 {*movdf_integer_rex64} (nil))
+
+(insn 16 10 21 2 c.c:7 (use (reg/i:DF 21 xmm0 [ <result> ])) -1 (nil))
+
+
+H.J.
+----
+gcc/
+
+2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/30961
+	* reload1.c (find_reg): Favor the hard register in destination
+	if it is usable and a memory location is needed for reload
+	input.
+
+gcc/testsuite/
+
+2007-08-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR target/30961
+	* gcc.target/i386/pr30961-1.c: New.
+
+--- gcc/reload1.c.second	2007-08-27 09:35:08.000000000 -0700
++++ gcc/reload1.c	2007-08-27 09:36:33.000000000 -0700
+@@ -1781,6 +1781,20 @@ find_reg (struct insn_chain *chain, int 
+   HARD_REG_SET not_usable;
+   HARD_REG_SET used_by_other_reload;
+   reg_set_iterator rsi;
++#ifdef SECONDARY_MEMORY_NEEDED
++  rtx body = PATTERN (chain->insn);
++  unsigned int dest_reg = FIRST_PSEUDO_REGISTER;
++
++  if (GET_CODE (body) == SET)
++    {
++      rtx dest = SET_DEST (body);
++
++      if ((REG_P (dest)
++	   || (GET_CODE (dest) == SUBREG
++	       && REG_P (SUBREG_REG (dest)))))
++	dest_reg = reg_or_subregno (dest);
++    }
++#endif
+ 
+   COPY_HARD_REG_SET (not_usable, bad_spill_regs);
+   IOR_HARD_REG_SET (not_usable, bad_spill_regs_global);
+@@ -1821,6 +1835,18 @@ find_reg (struct insn_chain *chain, int 
+ 	    this_cost--;
+ 	  if (rl->out && REG_P (rl->out) && REGNO (rl->out) == regno)
+ 	    this_cost--;
++#ifdef SECONDARY_MEMORY_NEEDED
++	  /* If a memory location is needed for rl->in and dest_reg
++	     is usable, we will favor it.  */
++	  else if (dest_reg == regno
++		   && rl->in
++		   && REG_P (rl->in)
++		   && REGNO (rl->in) < FIRST_PSEUDO_REGISTER
++		   && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (rl->in)),
++					       rl->class,
++					       rl->mode))
++	    this_cost = 0;
++#endif
+ 	  if (this_cost < best_cost
+ 	      /* Among registers with equal cost, prefer caller-saved ones, or
+ 		 use REG_ALLOC_ORDER if it is defined.  */
+--- gcc/testsuite/gcc.target/i386/pr30961-1.c.second	2007-08-27 11:01:59.000000000 -0700
++++ gcc/testsuite/gcc.target/i386/pr30961-1.c	2007-08-27 11:02:51.000000000 -0700
+@@ -0,0 +1,13 @@
++/* { dg-do compile } */
++/* { dg-require-effective-target lp64 } */
++/* { dg-options "-O2" } */
++
++double
++convert (long long in)
++{
++  double f;
++  __builtin_memcpy( &f, &in, sizeof( in ) );
++  return f;
++}
++
++/* { dg-final { scan-assembler-not "movapd" } } */
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/pr35942.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/pr35942.patch
new file mode 100644
index 0000000000..da610f5189
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/pr35942.patch
@@ -0,0 +1,38 @@
+Fix PR 35942: remove -lstdc++ from libtool postdeps for CXX.
+
+libstdc++-v3/ChangeLog:
+2010-01-04  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
+
+	PR libstdc++/35942
+	* configure.ac: Remove -lstdc++ from libtool's postdeps_CXX.
+	* configure: Regenerate.
+
+
+Index: gcc-4.3.3/libstdc++-v3/configure
+===================================================================
+--- gcc-4.3.3.orig/libstdc++-v3/configure	2010-03-26 17:57:51.000000000 +0000
++++ gcc-4.3.3/libstdc++-v3/configure	2010-03-26 17:57:58.000000000 +0000
+@@ -13759,6 +13759,9 @@
+ 
+ 
+ 
++# Eliminate -lstdc++ addition to postdeps for cross compiles.
++postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
++
+ # Possibly disable most of the library.
+ ## TODO: Consider skipping unncessary tests altogether in this case, rather
+ ## than just ignoring the results.  Faster /and/ more correct, win win.
+Index: gcc-4.3.3/libstdc++-v3/configure.ac
+===================================================================
+--- gcc-4.3.3.orig/libstdc++-v3/configure.ac	2010-03-26 17:57:54.000000000 +0000
++++ gcc-4.3.3/libstdc++-v3/configure.ac	2010-03-26 17:57:58.000000000 +0000
+@@ -89,6 +89,9 @@
+ AC_SUBST(enable_shared)
+ AC_SUBST(enable_static)
+ 
++# Eliminate -lstdc++ addition to postdeps for cross compiles.
++postdeps_CXX=`echo " $postdeps_CXX " | sed 's, -lstdc++ ,,g'`
++
+ # Possibly disable most of the library.
+ ## TODO: Consider skipping unncessary tests altogether in this case, rather
+ ## than just ignoring the results.  Faster /and/ more correct, win win.
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/sh4-multilib.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/sh4-multilib.patch
new file mode 100644
index 0000000000..c895c95e12
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/sh4-multilib.patch
@@ -0,0 +1,25 @@
+# DP: Fix multilib (m4/m4-nofpu) for sh4-linux
+
+---
+ a/gcc/config.gcc |    5 +++--
+ 1 files changed, 3 insertions(+), 2 deletions(-)
+
+Index: gcc-4_5-branch/gcc/config.gcc
+===================================================================
+--- gcc-4_5-branch.orig/gcc/config.gcc	2010-12-23 00:33:39.000000000 -0800
++++ gcc-4_5-branch/gcc/config.gcc	2011-01-09 02:57:36.608656002 -0800
+@@ -2321,11 +2321,12 @@
+ 	if test "$sh_multilibs" = "default" ; then
+ 		case ${target} in
+ 		sh64-superh-linux* | \
+-		sh[1234]*)	sh_multilibs=${sh_cpu_target} ;;
+ 		sh64* | sh5*)	sh_multilibs=m5-32media,m5-32media-nofpu,m5-compact,m5-compact-nofpu,m5-64media,m5-64media-nofpu ;;
+-		sh-superh-*)	sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
++		sh-superh-* | \
++		sh4-*-linux*)	sh_multilibs=m4,m4-nofpu ;;
+ 		sh*-*-linux*)	sh_multilibs=m1,m3e,m4 ;;
+ 		sh*-*-netbsd*)	sh_multilibs=m3,m3e,m4 ;;
++		sh-superh-*)	sh_multilibs=m4,m4-single,m4-single-only,m4-nofpu ;;
+ 		*) sh_multilibs=m1,m2,m2e,m4,m4-single,m4-single-only,m2a,m2a-single ;;
+ 		esac
+ 		if test x$with_fp = xno; then
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-no-host-includes.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-no-host-includes.patch
new file mode 100644
index 0000000000..4ccf35f627
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-no-host-includes.patch
@@ -0,0 +1,31 @@
+Index: gcc-4.4+svnr145550/gcc/incpath.c
+===================================================================
+--- gcc-4.4+svnr145550.orig/gcc/incpath.c	2009-04-04 13:48:31.000000000 -0700
++++ gcc-4.4+svnr145550/gcc/incpath.c	2009-04-04 14:49:29.000000000 -0700
+@@ -417,6 +417,26 @@
+   p->construct = 0;
+   p->user_supplied_p = user_supplied_p;
+ 
++#ifdef CROSS_COMPILE
++    /* A common error when cross compiling is including
++    host headers. This code below will try to fail fast
++    for cross compiling. Currently we consider /usr/include,
++    /opt/include and /sw/include as harmful.  */
++	{
++		/* printf("Adding Path: %s\n", p->name ); */
++		if( strstr(p->name, "/usr/include" ) == p->name ) {
++			fprintf(stderr, _("CROSS COMPILE Badness: /usr/include in INCLUDEPATH: %s\n"), p->name);
++			abort();
++		} else if( strstr(p->name, "/sw/include") == p->name ) {
++			fprintf(stderr, _("CROSS COMPILE Badness: /sw/include in INCLUDEPATH: %s\n"), p->name);
++			abort();
++		} else if( strstr(p->name, "/opt/include") == p->name ) {
++			fprintf(stderr, _("CROSS COMPILE Badness: /opt/include in INCLUDEPATH: %s\n"), p->name);
++			abort();
++		 }
++	}
++#endif
++
+   add_cpp_dir_path (p, chain);
+ }
+ 
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-xgcc-cpp.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-xgcc-cpp.patch
new file mode 100644
index 0000000000..a7722cbfc4
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/zecke-xgcc-cpp.patch
@@ -0,0 +1,28 @@
+upstream: n/a
+comment: Use the preprocessor we have just compiled instead the one of
+the system. There might be incompabilities between us and them.
+
+Index: gcc-4.3.1/Makefile.in
+===================================================================
+--- gcc-4.3.1.orig/Makefile.in	2008-08-19 01:09:56.000000000 -0700
++++ gcc-4.3.1/Makefile.in	2008-08-19 01:13:27.000000000 -0700
+@@ -204,6 +204,7 @@
+ 	AR="$(AR_FOR_TARGET)"; export AR; \
+ 	AS="$(COMPILER_AS_FOR_TARGET)"; export AS; \
+ 	CC="$(CC_FOR_TARGET)"; export CC; \
++	CPP="$(CC_FOR_TARGET) -E"; export CPP; \
+ 	CFLAGS="$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \
+ 	CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \
+ 	CPPFLAGS="$(CPPFLAGS_FOR_TARGET)"; export CPPFLAGS; \
+Index: gcc-4.3.1/Makefile.tpl
+===================================================================
+--- gcc-4.3.1.orig/Makefile.tpl	2008-08-21 00:07:58.000000000 -0700
++++ gcc-4.3.1/Makefile.tpl	2008-08-21 00:09:52.000000000 -0700
+@@ -223,6 +223,7 @@
+ 	AR="$(AR_FOR_TARGET)"; export AR; \
+ 	AS="$(COMPILER_AS_FOR_TARGET)"; export AS; \
+ 	CC="$(CC_FOR_TARGET)"; export CC; \
++	CPP="$(CC_FOR_TARGET) -E"; export CPP; \
+ 	CFLAGS="$(CFLAGS_FOR_TARGET) $(SYSROOT_CFLAGS_FOR_TARGET) $(DEBUG_PREFIX_CFLAGS_FOR_TARGET)"; export CFLAGS; \
+ 	CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \
+ 	CPPFLAGS="$(CPPFLAGS_FOR_TARGET)"; export CPPFLAGS; \
diff --git a/meta-oe/recipes-devtools/gcc/gcc-cross-canadian_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-cross-canadian_4.5.bb
new file mode 100644
index 0000000000..288bd3343f
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-cross-canadian_4.5.bb
@@ -0,0 +1,25 @@
+inherit cross-canadian
+
+require recipes-devtools/gcc/gcc-${PV}.inc
+require recipes-devtools/gcc/gcc-cross-canadian.inc
+require recipes-devtools/gcc/gcc-configure-sdk.inc
+require recipes-devtools/gcc/gcc-package-sdk.inc
+
+PR = "${INC_PR}.0"
+
+DEPENDS += "gmp-nativesdk mpfr-nativesdk libmpc-nativesdk elfutils-nativesdk"
+RDEPENDS_${PN} += "mpfr-nativesdk libmpc-nativesdk elfutils-nativesdk"
+
+SYSTEMHEADERS = "/usr/include"
+SYSTEMLIBS = "/lib/"
+SYSTEMLIB. = "/usr/lib/"
+
+EXTRA_OECONF += "--disable-libunwind-exceptions --disable-libssp \
+		--disable-libgomp --disable-libmudflap \
+		--with-mpfr=${STAGING_DIR_HOST}${layout_exec_prefix} \
+		--with-mpc=${STAGING_DIR_HOST}${layout_exec_prefix}"
+
+# to find libmpfr
+# export LD_LIBRARY_PATH = "{STAGING_DIR_HOST}${layout_exec_prefix}"
+
+PARALLEL_MAKE = ""
diff --git a/meta-oe/recipes-devtools/gcc/gcc-cross-initial_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-cross-initial_4.5.bb
new file mode 100644
index 0000000000..3e67036bf6
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-cross-initial_4.5.bb
@@ -0,0 +1,5 @@
+require recipes-devtools/gcc/gcc-cross_${PV}.bb
+require recipes-devtools/gcc/gcc-cross-initial.inc
+
+PR = "${INC_PR}.0"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-cross-intermediate_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-cross-intermediate_4.5.bb
new file mode 100644
index 0000000000..8210483e78
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-cross-intermediate_4.5.bb
@@ -0,0 +1,4 @@
+require recipes-devtools/gcc/gcc-cross_${PV}.bb
+require recipes-devtools/gcc/gcc-cross-intermediate.inc
+PR = "${INC_PR}.0"
+
diff --git a/meta-oe/recipes-devtools/gcc/gcc-cross_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-cross_4.5.bb
new file mode 100644
index 0000000000..0f810b71ae
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-cross_4.5.bb
@@ -0,0 +1,10 @@
+PR = "${INC_PR}.2"
+
+require recipes-devtools/gcc/gcc-${PV}.inc
+require recipes-devtools/gcc/gcc-cross4.inc
+
+EXTRA_OECONF += "--disable-libunwind-exceptions \
+                 --with-mpfr=${STAGING_DIR_NATIVE}${prefix_native} \
+                 --with-system-zlib "
+
+ARCH_FLAGS_FOR_TARGET += "-isystem${STAGING_DIR_TARGET}${target_includedir}"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-crosssdk-initial_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-crosssdk-initial_4.5.bb
new file mode 100644
index 0000000000..7ebb27338e
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-crosssdk-initial_4.5.bb
@@ -0,0 +1,4 @@
+require recipes-devtools/gcc/gcc-cross-initial_${PV}.bb
+require recipes-devtools/gcc/gcc-crosssdk-initial.inc
+
+PR = "${INC_PR}.0"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-crosssdk-intermediate_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-crosssdk-intermediate_4.5.bb
new file mode 100644
index 0000000000..aa5b5a8459
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-crosssdk-intermediate_4.5.bb
@@ -0,0 +1,4 @@
+require recipes-devtools/gcc/gcc-cross-intermediate_${PV}.bb
+require recipes-devtools/gcc/gcc-crosssdk-intermediate.inc
+
+PR = "${INC_PR}.0"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-crosssdk_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-crosssdk_4.5.bb
new file mode 100644
index 0000000000..b8e3aed665
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-crosssdk_4.5.bb
@@ -0,0 +1,4 @@
+require recipes-devtools/gcc/gcc-cross_${PV}.bb
+require recipes-devtools/gcc/gcc-crosssdk.inc
+
+PR = "${INC_PR}.0"
diff --git a/meta-oe/recipes-devtools/gcc/gcc-runtime_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc-runtime_4.5.bb
new file mode 100644
index 0000000000..bfc5ce564d
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-runtime_4.5.bb
@@ -0,0 +1,11 @@
+PR = "${INC_PR}.0"
+
+require recipes-devtools/gcc/gcc-${PV}.inc
+require recipes-devtools/gcc/gcc-configure-runtime.inc
+require recipes-devtools/gcc/gcc-package-runtime.inc
+
+SRC_URI_append = "file://fortran-cross-compile-hack.patch"
+
+ARCH_FLAGS_FOR_TARGET += "-isystem${STAGING_INCDIR}"
+
+EXTRA_OECONF += "--disable-libunwind-exceptions"
diff --git a/meta-oe/recipes-devtools/gcc/gcc_4.5.bb b/meta-oe/recipes-devtools/gcc/gcc_4.5.bb
new file mode 100644
index 0000000000..31fcac0a70
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc_4.5.bb
@@ -0,0 +1,10 @@
+PR = "${INC_PR}.1"
+
+require recipes-devtools/gcc/gcc-${PV}.inc
+require recipes-devtools/gcc/gcc-configure-target.inc
+require recipes-devtools/gcc/gcc-package-target.inc
+
+SRC_URI_append = "file://fortran-cross-compile-hack.patch"
+
+ARCH_FLAGS_FOR_TARGET += "-isystem${STAGING_INCDIR}"
+
diff --git a/meta-oe/recipes-devtools/gcc/libgcc_4.5.bb b/meta-oe/recipes-devtools/gcc/libgcc_4.5.bb
new file mode 100644
index 0000000000..309dcb12c7
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/libgcc_4.5.bb
@@ -0,0 +1,42 @@
+require recipes-devtools/gcc/gcc-${PV}.inc
+
+PR = "r0"
+
+INHIBIT_DEFAULT_DEPS = "1"
+DEPENDS = "virtual/${TARGET_PREFIX}gcc virtual/${TARGET_PREFIX}g++"
+
+PACKAGES = "\
+  ${PN} \
+  ${PN}-dev \
+  "
+
+FILES_${PN} = "${base_libdir}/libgcc*.so.*"
+FILES_${PN}-dev = " \
+  ${base_libdir}/libgcc*.so \
+  ${libdir}/${TARGET_SYS}/${BINV}/crt* \
+  ${libdir}/${TARGET_SYS}/${BINV}/libgcc*"
+
+do_fetch[noexec] = "1"
+do_unpack[noexec] = "1"
+do_patch[noexec] = "1"
+do_configure[noexec] = "1"
+do_compile[noexec] = "1"
+
+do_install () {
+	target=`echo ${MULTIMACH_TARGET_SYS} | sed -e s#-nativesdk##`
+
+	# Install libgcc from our gcc-cross saved data
+	install -d ${D}${base_libdir} ${D}${libdir}
+	cp -fpPR ${STAGING_INCDIR_NATIVE}/gcc-build-internal-$target/* ${D}
+
+	# Move libgcc_s into /lib
+	mkdir -p ${D}${base_libdir}
+	if [ -f ${D}${libdir}/nof/libgcc_s.so ]; then
+		mv ${D}${libdir}/nof/libgcc* ${D}${base_libdir}
+	else
+		mv ${D}${libdir}/libgcc* ${D}${base_libdir} || true
+	fi
+}
+
+BBCLASSEXTEND = "nativesdk"
+
diff --git a/meta-oe/recipes-devtools/python/python-cheetah_2.4.4.bb b/meta-oe/recipes-devtools/python/python-cheetah_2.4.4.bb
new file mode 100644
index 0000000000..e3ecb1c089
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-cheetah_2.4.4.bb
@@ -0,0 +1,19 @@
+DESCRIPTION = "Python template engine and code generation tool"
+SECTION = "devel/python"
+PRIORITY = "optional"
+LICENSE = "MIT"
+SRCNAME = "Cheetah"
+PR = "r1"
+
+SRC_URI = "http://pypi.python.org/packages/source/C/Cheetah/Cheetah-${PV}.tar.gz"
+S = "${WORKDIR}/${SRCNAME}-${PV}"
+
+inherit setuptools
+
+RDEPENDS_${PN} = "python-pickle python-pprint"
+
+NATIVE_INSTALL_WORKS = "1"
+BBCLASSEXTEND = "native"
+
+SRC_URI[md5sum] = "853917116e731afbc8c8a43c37e6ddba"
+SRC_URI[sha256sum] = "be308229f0c1e5e5af4f27d7ee06d90bb19e6af3059794e5fd536a6f29a9b550"
diff --git a/meta-oe/recipes-devtools/python/python-numpy/arm/config.h b/meta-oe/recipes-devtools/python/python-numpy/arm/config.h
new file mode 100644
index 0000000000..17ef186d56
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/arm/config.h
@@ -0,0 +1,21 @@
+/* ./src.linux-i686-2.5/numpy/core/include/numpy/config.h */
+/* #define SIZEOF_SHORT 2 */
+/* #define SIZEOF_INT 4 */
+/* #define SIZEOF_LONG 4 */
+/* #define SIZEOF_FLOAT 4 */
+/* #define SIZEOF_DOUBLE 8 */
+#define SIZEOF_LONG_DOUBLE 12
+#define SIZEOF_PY_INTPTR_T 4
+/* #define SIZEOF_LONG_LONG 8 */
+#define SIZEOF_PY_LONG_LONG 8
+/* #define CHAR_BIT 8 */
+#define MATHLIB m
+#define HAVE_FLOAT_FUNCS
+#define HAVE_LOG1P
+#define HAVE_EXPM1
+#define HAVE_INVERSE_HYPERBOLIC
+#define HAVE_INVERSE_HYPERBOLIC_FLOAT
+#define HAVE_ISNAN
+#define HAVE_ISINF
+#define HAVE_RINT
+
diff --git a/meta-oe/recipes-devtools/python/python-numpy/arm/numpyconfig.h b/meta-oe/recipes-devtools/python/python-numpy/arm/numpyconfig.h
new file mode 100644
index 0000000000..c4bf6547f0
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/arm/numpyconfig.h
@@ -0,0 +1,17 @@
+/* cat ./src.linux-i686-2.5/numpy/core/include/numpy/numpyconfig.h */
+/*
+ *  * This file is generated by numpy/core/setup.pyc. DO NOT EDIT 
+ *   */
+#define NPY_SIZEOF_SHORT 2 
+#define NPY_SIZEOF_INT 4 
+#define NPY_SIZEOF_LONG 4 
+#define NPY_SIZEOF_FLOAT 4 
+#define NPY_SIZEOF_DOUBLE 8 
+#define NPY_SIZEOF_LONGDOUBLE 12 
+#define NPY_SIZEOF_PY_INTPTR_T 4 
+#define NPY_NO_SMP 0
+
+#define NPY_SIZEOF_LONGLONG 8 
+#define NPY_SIZEOF_PY_LONG_LONG 8 
+/* #define CHAR_BIT 8 */
+
diff --git a/meta-oe/recipes-devtools/python/python-numpy/mipsel/config.h b/meta-oe/recipes-devtools/python/python-numpy/mipsel/config.h
new file mode 100644
index 0000000000..17ef186d56
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/mipsel/config.h
@@ -0,0 +1,21 @@
+/* ./src.linux-i686-2.5/numpy/core/include/numpy/config.h */
+/* #define SIZEOF_SHORT 2 */
+/* #define SIZEOF_INT 4 */
+/* #define SIZEOF_LONG 4 */
+/* #define SIZEOF_FLOAT 4 */
+/* #define SIZEOF_DOUBLE 8 */
+#define SIZEOF_LONG_DOUBLE 12
+#define SIZEOF_PY_INTPTR_T 4
+/* #define SIZEOF_LONG_LONG 8 */
+#define SIZEOF_PY_LONG_LONG 8
+/* #define CHAR_BIT 8 */
+#define MATHLIB m
+#define HAVE_FLOAT_FUNCS
+#define HAVE_LOG1P
+#define HAVE_EXPM1
+#define HAVE_INVERSE_HYPERBOLIC
+#define HAVE_INVERSE_HYPERBOLIC_FLOAT
+#define HAVE_ISNAN
+#define HAVE_ISINF
+#define HAVE_RINT
+
diff --git a/meta-oe/recipes-devtools/python/python-numpy/mipsel/numpyconfig.h b/meta-oe/recipes-devtools/python/python-numpy/mipsel/numpyconfig.h
new file mode 100644
index 0000000000..c4bf6547f0
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/mipsel/numpyconfig.h
@@ -0,0 +1,17 @@
+/* cat ./src.linux-i686-2.5/numpy/core/include/numpy/numpyconfig.h */
+/*
+ *  * This file is generated by numpy/core/setup.pyc. DO NOT EDIT 
+ *   */
+#define NPY_SIZEOF_SHORT 2 
+#define NPY_SIZEOF_INT 4 
+#define NPY_SIZEOF_LONG 4 
+#define NPY_SIZEOF_FLOAT 4 
+#define NPY_SIZEOF_DOUBLE 8 
+#define NPY_SIZEOF_LONGDOUBLE 12 
+#define NPY_SIZEOF_PY_INTPTR_T 4 
+#define NPY_NO_SMP 0
+
+#define NPY_SIZEOF_LONGLONG 8 
+#define NPY_SIZEOF_PY_LONG_LONG 8 
+/* #define CHAR_BIT 8 */
+
diff --git a/meta-oe/recipes-devtools/python/python-numpy/trycompile.diff b/meta-oe/recipes-devtools/python/python-numpy/trycompile.diff
new file mode 100644
index 0000000000..3ab3d72f2c
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/trycompile.diff
@@ -0,0 +1,33 @@
+--- /tmp/setup.py	2008-09-01 10:37:44.000000000 +0200
++++ numpy-1.1.1/numpy/core/setup.py	2008-09-01 10:38:20.373198000 +0200
+@@ -80,8 +80,7 @@
+                 raise SystemError,\
+                       "Non-existing %s. Perhaps you need to install"\
+                       " python-dev|python-devel." % (python_h)
+-            result = config_cmd.try_run(tc,include_dirs=[python_include],
+-                                        library_dirs = default_lib_dirs)
++            result = config_cmd.try_compile(tc)
+             if not result:
+                 raise SystemError,"Failed to test configuration. "\
+                       "See previous error messages for more information."
+@@ -95,7 +94,7 @@
+             if mathlib:
+                 mathlibs_choices.insert(0,mathlib.split(','))
+             for libs in mathlibs_choices:
+-                if config_cmd.try_run(tc,libraries=libs):
++                if config_cmd.try_compile(tc):
+                     mathlibs = libs
+                     break
+             else:
+@@ -180,10 +179,7 @@
+                       " python-dev|python-devel." % (python_h)
+ 
+             config.numpy_include_dirs
+-            result = config_cmd.try_run(testcode,
+-                                include_dirs = [python_include] + \
+-                                                       config.numpy_include_dirs,
+-                                        library_dirs = default_lib_dirs)
++            result = config_cmd.try_compile(testcode)
+ 
+             if not result:
+                 raise SystemError,"Failed to generate numpy configuration. "\
diff --git a/meta-oe/recipes-devtools/python/python-numpy/unbreak-assumptions.diff b/meta-oe/recipes-devtools/python/python-numpy/unbreak-assumptions.diff
new file mode 100644
index 0000000000..c5b448167f
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy/unbreak-assumptions.diff
@@ -0,0 +1,16 @@
+--- /tmp/system_info.py	2008-08-22 00:38:16.000000000 +0200
++++ numpy-1.1.1/numpy/distutils/system_info.py	2008-08-22 00:40:33.013198000 +0200
+@@ -137,11 +137,8 @@
+     default_x11_lib_dirs = []
+     default_x11_include_dirs = []
+ else:
+-    default_lib_dirs = ['/usr/local/lib', '/opt/lib', '/usr/lib',
+-                        '/opt/local/lib', '/sw/lib']
+-    default_include_dirs = ['/usr/local/include',
+-                            '/opt/include', '/usr/include',
+-                            '/opt/local/include', '/sw/include']
++    default_lib_dirs = ['/non-existant-dir']
++    default_include_dirs = ['non-existant-dir']
+     default_src_dirs = ['.','/usr/local/src', '/opt/src','/sw/src']
+ 
+     try:
diff --git a/meta-oe/recipes-devtools/python/python-numpy_1.4.1.bb b/meta-oe/recipes-devtools/python/python-numpy_1.4.1.bb
new file mode 100644
index 0000000000..ed47f47db1
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-numpy_1.4.1.bb
@@ -0,0 +1,26 @@
+DESCRIPTION = "A sophisticated Numeric Processing Package for Python"
+SECTION = "devel/python"
+PRIORITY = "optional"
+LICENSE = "PSF"
+LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=3c42211d73c3faa1026e671dd39883fa"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/numpy/numpy-${PV}.tar.gz \
+	   file://config.h \
+	   file://numpyconfig.h \
+	  "
+
+S = "${WORKDIR}/numpy-${PV}"
+
+inherit distutils
+
+# Make the build fail and replace *config.h with proper one
+# This is a ugly, ugly hack - Koen
+do_compile_prepend() {
+         BUILD_SYS=${BUILD_SYS} HOST_SYS=${HOST_SYS} \
+         ${STAGING_BINDIR_NATIVE}/python setup.py build ${DISTUTILS_BUILD_ARGS} || \
+         true
+	 cp ${WORKDIR}/*config.h ${S}/build/$(ls ${S}/build | grep src)/numpy/core/include/numpy/
+}
+
+SRC_URI[md5sum] = "5c7b5349dc3161763f7f366ceb96516b"
+SRC_URI[sha256sum] = "2e7bb84573e5123e07f3c919fd433bc09b78d606252b6b719e385c2a981d8e06"
diff --git a/meta-oe/recipes-devtools/python/python-setuptools_0.6c11.bb b/meta-oe/recipes-devtools/python/python-setuptools_0.6c11.bb
new file mode 100644
index 0000000000..6b17a41f7f
--- /dev/null
+++ b/meta-oe/recipes-devtools/python/python-setuptools_0.6c11.bb
@@ -0,0 +1,34 @@
+DESCRIPTION = "Download, build, install, upgrade, and uninstall Python packages"
+HOMEPAGE = "http://cheeseshop.python.org/pypi/setuptools"
+SECTION = "devel/python"
+PRIORITY = "optional"
+LICENSE = "PSF"
+LIC_FILES_CHKSUM = "file://setup.py;beginline=23;endline=23;md5=8a314270dd7a8dbca741775415f1716e"
+
+SRCNAME = "setuptools"
+PR = "ml2"
+DEPENDS += "python"
+DEPENDS_virtclass-native += "python-native"
+
+SRC_URI = "\
+  http://cheeseshop.python.org/packages/source/s/setuptools/${SRCNAME}-${PV}.tar.gz\
+"
+S = "${WORKDIR}/${SRCNAME}-${PV}"
+
+inherit distutils
+
+do_install_prepend() {
+    install -d ${D}/${libdir}/${PYTHON_DIR}/site-packages
+}
+
+RDEPENDS_${PN} = "\
+  python-distutils \
+  python-compression \
+"
+
+SRC_URI[md5sum] = "7df2a529a074f613b509fb44feefe74e"
+SRC_URI[sha256sum] = "630fea9b726320b73ee3ca6ff61732cb32675b0389be658080fe46383b87a1d3"
+
+BBCLASSEXTEND = "native"
+
+NATIVE_INSTALL_WORKS = "1"
diff --git a/meta-oe/recipes-devtools/swig/swig.inc b/meta-oe/recipes-devtools/swig/swig.inc
new file mode 100644
index 0000000000..0603d1cfe5
--- /dev/null
+++ b/meta-oe/recipes-devtools/swig/swig.inc
@@ -0,0 +1,18 @@
+DESCRIPTION = "SWIG - Simplified Wrapper and Interface Generator"
+HOMEPAGE = "http://swig.sourceforge.net/"
+LICENSE = "BSD"
+SECTION = "devel"
+INC_PR = "r1"
+
+DEPENDS = "python"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/${BPN}/${BPN}-${PV}.tar.gz"
+
+inherit autotools
+
+BBCLASSEXTEND = "native"
+
+do_configure() {
+	oe_runconf
+}
+
diff --git a/meta-oe/recipes-devtools/swig/swig_1.3.31.bb b/meta-oe/recipes-devtools/swig/swig_1.3.31.bb
new file mode 100644
index 0000000000..8a601350ad
--- /dev/null
+++ b/meta-oe/recipes-devtools/swig/swig_1.3.31.bb
@@ -0,0 +1,7 @@
+require swig.inc
+
+PR = "${INC_PR}.0"
+
+
+SRC_URI[md5sum] = "4a0bae63e3713e89b26db7209b6a7e05"
+SRC_URI[sha256sum] = "c2ad63095e34b4a474e7ff4adb6ea8b7ab238bb5738d00a739102bb8bb71d805"
diff --git a/meta-oe/recipes-devtools/swig/swig_1.3.38.bb b/meta-oe/recipes-devtools/swig/swig_1.3.38.bb
new file mode 100644
index 0000000000..a2d7ecbca2
--- /dev/null
+++ b/meta-oe/recipes-devtools/swig/swig_1.3.38.bb
@@ -0,0 +1,7 @@
+require swig.inc
+
+PR = "${INC_PR}.0"
+
+
+SRC_URI[md5sum] = "650c774917be49c526a4f8a3e733c898"
+SRC_URI[sha256sum] = "e7cbddc8c68b1eccba1c82edd5427595397d9a483c8fb1184abc9303afe08045"
diff --git a/meta-oe/recipes-devtools/swig/swig_1.3.39.bb b/meta-oe/recipes-devtools/swig/swig_1.3.39.bb
new file mode 100644
index 0000000000..2db94dae34
--- /dev/null
+++ b/meta-oe/recipes-devtools/swig/swig_1.3.39.bb
@@ -0,0 +1,6 @@
+require swig.inc
+
+PR = "${INC_PR}.1"
+
+SRC_URI[md5sum] = "ac201d1b87f8659584534f9540d7ad24"
+SRC_URI[sha256sum] = "bb2d5d9373cf1fe03faaadb02de47af3b058b0300e0f58ece6a7212f0a2b11dc"
diff --git a/meta-oe/recipes-devtools/swig/swig_2.0.0.bb b/meta-oe/recipes-devtools/swig/swig_2.0.0.bb
new file mode 100644
index 0000000000..b443def58a
--- /dev/null
+++ b/meta-oe/recipes-devtools/swig/swig_2.0.0.bb
@@ -0,0 +1,7 @@
+require swig.inc
+
+PR = "${INC_PR}.0"
+
+SRC_URI[md5sum] = "36ee2d9974be46a9f0a36460af928eb9"
+SRC_URI[sha256sum] = "2568d042d3c7cfbcb17e2471b0434bd3aa78d7a1829f9ef6f1b9fc522e4754ea"
+
diff --git a/meta-oe/recipes-gnome/gnome/files/acinclude.m4 b/meta-oe/recipes-gnome/gnome/files/acinclude.m4
new file mode 100644
index 0000000000..53518fb2eb
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/files/acinclude.m4
@@ -0,0 +1,90 @@
+## this one is commonly used with AM_PATH_PYTHONDIR ...
+dnl AM_CHECK_PYMOD(MODNAME [,SYMBOL [,ACTION-IF-FOUND [,ACTION-IF-NOT-FOUND]]])
+dnl Check if a module containing a given symbol is visible to python.
+AC_DEFUN(AM_CHECK_PYMOD,
+[AC_REQUIRE([AM_PATH_PYTHON])
+py_mod_var=`echo $1['_']$2 | sed 'y%./+-%__p_%'`
+AC_MSG_CHECKING(for ifelse([$2],[],,[$2 in ])python module $1)
+AC_CACHE_VAL(py_cv_mod_$py_mod_var, [
+ifelse([$2],[], [prog="
+import sys
+try:
+        import $1
+except ImportError:
+        sys.exit(1)
+except:
+        sys.exit(0)
+sys.exit(0)"], [prog="
+import $1
+$1.$2"])
+if $PYTHON -c "$prog" 1>&AC_FD_CC 2>&AC_FD_CC
+  then
+    eval "py_cv_mod_$py_mod_var=yes"
+  else
+    eval "py_cv_mod_$py_mod_var=no"
+  fi
+])
+py_val=`eval "echo \`echo '$py_cv_mod_'$py_mod_var\`"`
+if test "x$py_val" != xno; then
+  AC_MSG_RESULT(yes)
+  ifelse([$3], [],, [$3
+])dnl
+else
+  AC_MSG_RESULT(no)
+  ifelse([$4], [],, [$4
+])dnl
+fi
+])
+
+dnl a macro to check for ability to create python extensions
+dnl  AM_CHECK_PYTHON_HEADERS([ACTION-IF-POSSIBLE], [ACTION-IF-NOT-POSSIBLE])
+dnl function also defines PYTHON_INCLUDES
+AC_DEFUN([AM_CHECK_PYTHON_HEADERS],
+[AC_REQUIRE([AM_PATH_PYTHON])
+AC_MSG_CHECKING(for headers required to compile python extensions)
+dnl deduce PYTHON_INCLUDES
+AC_ARG_WITH(python-includes,
+	[  --with-python-includes=DIR  path to Python includes], py_exec_prefix=$withval)
+if test x$py_exec_prefix != x; then
+PYTHON_INCLUDES="-I${py_exec_prefix}/include/python${PYTHON_VERSION}"
+else
+py_prefix=`$PYTHON -c "import sys; print sys.prefix"`
+py_exec_prefix=`$PYTHON -c "import sys; print sys.exec_prefix"`
+PYTHON_INCLUDES="-I${py_prefix}/include/python${PYTHON_VERSION}"
+if test "$py_prefix" != "$py_exec_prefix"; then
+  PYTHON_INCLUDES="$PYTHON_INCLUDES -I${py_exec_prefix}/include/python${PYTHON_VERSION}"
+fi
+fi
+AC_SUBST(PYTHON_INCLUDES)
+dnl check if the headers exist:
+save_CPPFLAGS="$CPPFLAGS"
+CPPFLAGS="$CPPFLAGS $PYTHON_INCLUDES"
+AC_TRY_CPP([#include <Python.h>],dnl
+[AC_MSG_RESULT(found)
+$1],dnl
+[AC_MSG_RESULT(not found)
+$2])
+CPPFLAGS="$save_CPPFLAGS"
+])
+
+dnl
+dnl JH_ADD_CFLAG(FLAG)
+dnl checks whether the C compiler supports the given flag, and if so, adds
+dnl it to $CFLAGS.  If the flag is already present in the list, then the
+dnl check is not performed.
+AC_DEFUN([JH_ADD_CFLAG],
+[
+case " $CFLAGS " in
+*@<:@\	\ @:>@$1@<:@\	\ @:>@*)
+  ;;
+*)
+  save_CFLAGS="$CFLAGS"
+  CFLAGS="$CFLAGS $1"
+  AC_MSG_CHECKING([whether [$]CC understands $1])
+  AC_TRY_COMPILE([], [], [jh_has_option=yes], [jh_has_option=no])
+  AC_MSG_RESULT($jh_has_option)
+  if test $jh_has_option = no; then
+    CFLAGS="$save_CFLAGS"
+  fi
+  ;;
+esac])
diff --git a/meta-oe/recipes-gnome/gnome/files/gtk-doc.m4 b/meta-oe/recipes-gnome/gnome/files/gtk-doc.m4
new file mode 100644
index 0000000000..3ec41666b2
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/files/gtk-doc.m4
@@ -0,0 +1,53 @@
+dnl -*- mode: autoconf -*-
+
+# serial 1
+
+dnl Usage:
+dnl   GTK_DOC_CHECK([minimum-gtk-doc-version])
+AC_DEFUN([GTK_DOC_CHECK],
+[
+  AC_BEFORE([AC_PROG_LIBTOOL],[$0])dnl setup libtool first
+  AC_BEFORE([AM_PROG_LIBTOOL],[$0])dnl setup libtool first
+  dnl for overriding the documentation installation directory
+  AC_ARG_WITH(html-dir,
+    AC_HELP_STRING([--with-html-dir=PATH], [path to installed docs]),,
+    [with_html_dir='${datadir}/gtk-doc/html'])
+  HTML_DIR="$with_html_dir"
+  AC_SUBST(HTML_DIR)
+
+  dnl enable/disable documentation building
+  AC_ARG_ENABLE(gtk-doc,
+    AC_HELP_STRING([--enable-gtk-doc],
+                   [use gtk-doc to build documentation [default=no]]),,
+    enable_gtk_doc=no)
+
+  have_gtk_doc=no
+  if test -z "$PKG_CONFIG"; then
+    AC_PATH_PROG(PKG_CONFIG, pkg-config, no)
+  fi
+  if test "$PKG_CONFIG" != "no" && $PKG_CONFIG --exists gtk-doc; then
+    have_gtk_doc=yes
+  fi
+
+  dnl do we want to do a version check?
+ifelse([$1],[],,
+  [gtk_doc_min_version=$1
+  if test "$have_gtk_doc" = yes; then
+    AC_MSG_CHECKING([gtk-doc version >= $gtk_doc_min_version])
+    if $PKG_CONFIG --atleast-version $gtk_doc_min_version gtk-doc; then
+      AC_MSG_RESULT(yes)
+    else
+      AC_MSG_RESULT(no)
+      have_gtk_doc=no
+    fi
+  fi
+])
+  if test x$enable_gtk_doc = xyes; then
+    if test "$have_gtk_doc" != yes; then
+      enable_gtk_doc=no
+    fi
+  fi
+
+  AM_CONDITIONAL(ENABLE_GTK_DOC, test x$enable_gtk_doc = xyes)
+  AM_CONDITIONAL(GTK_DOC_USE_LIBTOOL, test -n "$LIBTOOL")
+])
diff --git a/meta-oe/recipes-gnome/gnome/files/gtk-doc.make b/meta-oe/recipes-gnome/gnome/files/gtk-doc.make
new file mode 100644
index 0000000000..354ffb7c66
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/files/gtk-doc.make
@@ -0,0 +1,173 @@
+# -*- mode: makefile -*-
+
+####################################
+# Everything below here is generic #
+####################################
+
+if GTK_DOC_USE_LIBTOOL
+GTKDOC_CC = $(LIBTOOL) --mode=compile $(CC) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+GTKDOC_LD = $(LIBTOOL) --mode=link $(CC) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS)
+else
+GTKDOC_CC = $(CC) $(INCLUDES) $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS)
+GTKDOC_LD = $(CC) $(AM_CFLAGS) $(CFLAGS) $(AM_LDFLAGS) $(LDFLAGS)
+endif
+
+# We set GPATH here; this gives us semantics for GNU make
+# which are more like other make's VPATH, when it comes to
+# whether a source that is a target of one rule is then
+# searched for in VPATH/GPATH.
+#
+GPATH = $(srcdir)
+
+TARGET_DIR=$(HTML_DIR)/$(DOC_MODULE)
+
+EXTRA_DIST = 				\
+	$(content_files)		\
+	$(HTML_IMAGES)			\
+	$(DOC_MAIN_SGML_FILE)		\
+	$(DOC_MODULE)-sections.txt	\
+	$(DOC_MODULE)-overrides.txt
+
+DOC_STAMPS=scan-build.stamp tmpl-build.stamp sgml-build.stamp html-build.stamp \
+	   $(srcdir)/tmpl.stamp $(srcdir)/sgml.stamp $(srcdir)/html.stamp
+
+SCANOBJ_FILES = 		 \
+	$(DOC_MODULE).args 	 \
+	$(DOC_MODULE).hierarchy  \
+	$(DOC_MODULE).interfaces \
+	$(DOC_MODULE).prerequisites \
+	$(DOC_MODULE).signals
+
+REPORT_FILES = \
+	$(DOC_MODULE)-undocumented.txt \
+	$(DOC_MODULE)-undeclared.txt \
+	$(DOC_MODULE)-unused.txt
+
+CLEANFILES = $(SCANOBJ_FILES) $(REPORT_FILES) $(DOC_STAMPS)
+
+if ENABLE_GTK_DOC
+all-local: html-build.stamp
+else
+all-local:
+endif
+
+docs: html-build.stamp
+
+#### scan ####
+
+scan-build.stamp: $(HFILE_GLOB) $(CFILE_GLOB)
+	@echo 'gtk-doc: Scanning header files'
+	@-chmod -R u+w $(srcdir)
+	cd $(srcdir) && \
+	  gtkdoc-scan --module=$(DOC_MODULE) --source-dir=$(DOC_SOURCE_DIR) --ignore-headers="$(IGNORE_HFILES)" $(SCAN_OPTIONS) $(EXTRA_HFILES)
+	if grep -l '^..*$$' $(srcdir)/$(DOC_MODULE).types > /dev/null 2>&1 ; then \
+	    CC="$(GTKDOC_CC)" LD="$(GTKDOC_LD)" CFLAGS="$(GTKDOC_CFLAGS)" LDFLAGS="$(GTKDOC_LIBS)" gtkdoc-scangobj $(SCANGOBJ_OPTIONS) --module=$(DOC_MODULE) --output-dir=$(srcdir) ; \
+	else \
+	    cd $(srcdir) ; \
+	    for i in $(SCANOBJ_FILES) ; do \
+               test -f $$i || touch $$i ; \
+	    done \
+	fi
+	touch scan-build.stamp
+
+$(DOC_MODULE)-decl.txt $(SCANOBJ_FILES) $(DOC_MODULE)-sections.txt $(DOC_MODULE)-overrides.txt: scan-build.stamp
+	@true
+
+#### templates ####
+
+tmpl-build.stamp: $(DOC_MODULE)-decl.txt $(SCANOBJ_FILES) $(DOC_MODULE)-sections.txt $(DOC_MODULE)-overrides.txt
+	@echo 'gtk-doc: Rebuilding template files'
+	@-chmod -R u+w $(srcdir)
+	cd $(srcdir) && gtkdoc-mktmpl --module=$(DOC_MODULE) $(MKTMPL_OPTIONS)
+	touch tmpl-build.stamp
+
+tmpl.stamp: tmpl-build.stamp
+	@true
+
+tmpl/*.sgml:
+	@true
+
+
+#### xml ####
+
+sgml-build.stamp: tmpl.stamp $(HFILE_GLOB) $(CFILE_GLOB) $(DOC_MODULE)-sections.txt $(srcdir)/tmpl/*.sgml $(expand_content_files)
+	@echo 'gtk-doc: Building XML'
+	@-chmod -R u+w $(srcdir)
+	cd $(srcdir) && \
+	gtkdoc-mkdb --module=$(DOC_MODULE) --source-dir=$(DOC_SOURCE_DIR) --output-format=xml --expand-content-files="$(expand_content_files)" --main-sgml-file=$(DOC_MAIN_SGML_FILE) $(MKDB_OPTIONS)
+	touch sgml-build.stamp
+
+sgml.stamp: sgml-build.stamp
+	@true
+
+#### html ####
+
+html-build.stamp: sgml.stamp $(DOC_MAIN_SGML_FILE) $(content_files)
+	@echo 'gtk-doc: Building HTML'
+	@-chmod -R u+w $(srcdir)
+	rm -rf $(srcdir)/html
+	mkdir $(srcdir)/html
+	cd $(srcdir)/html && gtkdoc-mkhtml $(DOC_MODULE) ../$(DOC_MAIN_SGML_FILE)
+	test "x$(HTML_IMAGES)" = "x" || ( cd $(srcdir) && cp $(HTML_IMAGES) html )
+	@echo 'gtk-doc: Fixing cross-references'
+	cd $(srcdir) && gtkdoc-fixxref --module-dir=html --html-dir=$(HTML_DIR) $(FIXXREF_OPTIONS)
+	touch html-build.stamp
+
+##############
+
+clean-local:
+	rm -f *~ *.bak
+	rm -rf .libs
+
+distclean-local:
+	cd $(srcdir) && \
+	  rm -rf xml $(REPORT_FILES) \
+	         $(DOC_MODULE)-decl-list.txt $(DOC_MODULE)-decl.txt
+
+maintainer-clean-local: clean
+	cd $(srcdir) && rm -rf xml html
+
+install-data-local:
+	-installfiles=`echo $(srcdir)/html/*`; \
+	if test "$$installfiles" = '$(srcdir)/html/*'; \
+	then echo '-- Nothing to install' ; \
+	else \
+	  $(mkinstalldirs) $(DESTDIR)$(TARGET_DIR); \
+	  for i in $$installfiles; do \
+	    echo '-- Installing '$$i ; \
+	    $(INSTALL_DATA) $$i $(DESTDIR)$(TARGET_DIR); \
+	  done; \
+	  echo '-- Installing $(srcdir)/html/index.sgml' ; \
+	  $(INSTALL_DATA) $(srcdir)/html/index.sgml $(DESTDIR)$(TARGET_DIR) || :; \
+	  which gtkdoc-rebase >/dev/null && \
+	    gtkdoc-rebase --relative --dest-dir=$(DESTDIR) --html-dir=$(DESTDIR)$(TARGET_DIR) ; \
+	fi
+	
+
+uninstall-local:
+	rm -f $(DESTDIR)$(TARGET_DIR)/*
+
+#
+# Require gtk-doc when making dist
+#
+if ENABLE_GTK_DOC
+dist-check-gtkdoc:
+else
+dist-check-gtkdoc:
+	@echo "*** gtk-doc must be installed and enabled in order to make dist"
+	@false
+endif
+
+dist-hook: dist-check-gtkdoc dist-hook-local
+	mkdir $(distdir)/tmpl
+	mkdir $(distdir)/xml
+	mkdir $(distdir)/html
+	-cp $(srcdir)/tmpl/*.sgml $(distdir)/tmpl
+	-cp $(srcdir)/xml/*.xml $(distdir)/xml
+	cp $(srcdir)/html/* $(distdir)/html
+	-cp $(srcdir)/$(DOC_MODULE).types $(distdir)/
+	-cp $(srcdir)/$(DOC_MODULE)-sections.txt $(distdir)/
+	cd $(distdir) && rm -f $(DISTCLEANFILES)
+	-gtkdoc-rebase --online --relative --html-dir=$(distdir)/html
+
+.PHONY : dist-hook-local docs
diff --git a/meta-oe/recipes-gnome/gnome/files/libproxy-move-define-__USE_BSD.patch b/meta-oe/recipes-gnome/gnome/files/libproxy-move-define-__USE_BSD.patch
new file mode 100644
index 0000000000..b65b3608d4
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/files/libproxy-move-define-__USE_BSD.patch
@@ -0,0 +1,17 @@
+Index: libproxy-0.2.3/src/lib/dns.c
+===================================================================
+--- libproxy-0.2.3.orig/src/lib/dns.c	2009-08-14 14:13:21.123557812 -0700
++++ libproxy-0.2.3/src/lib/dns.c	2009-08-14 14:13:31.954575500 -0700
+@@ -17,11 +17,11 @@
+  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301 USA
+  ******************************************************************************/
+ 
++#define __USE_BSD
+ #include <string.h>
+ #include <errno.h>
+ #include <stdio.h>
+ #include <netdb.h>
+-#define __USE_BSD
+ #include <unistd.h>
+ 
+ #include "misc.h"
diff --git a/meta-oe/recipes-gnome/gnome/files/tasn.m4 b/meta-oe/recipes-gnome/gnome/files/tasn.m4
new file mode 100644
index 0000000000..6df32085a8
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/files/tasn.m4
@@ -0,0 +1,161 @@
+dnl Autoconf macros for libtasn1
+dnl $id$
+
+# Modified for LIBTASN1 -- nmav
+# Configure paths for LIBGCRYPT
+# Shamelessly stolen from the one of XDELTA by Owen Taylor
+# Werner Koch   99-12-09
+
+dnl AM_PATH_LIBTASN1([MINIMUM-VERSION, [ACTION-IF-FOUND [, ACTION-IF-NOT-FOUND ]]])
+dnl Test for libtasn1, and define LIBTASN1_CFLAGS and LIBTASN1_LIBS
+dnl
+AC_DEFUN([AM_PATH_LIBTASN1],
+[dnl
+dnl Get the cflags and libraries from the libtasn1-config script
+dnl
+AC_ARG_WITH(libtasn1-prefix,
+          [  --with-libtasn1-prefix=PFX   Prefix where libtasn1 is installed (optional)],
+          libtasn1_config_prefix="$withval", libtasn1_config_prefix="")
+
+  if test x$libtasn1_config_prefix != x ; then
+     if test x${LIBTASN1_CONFIG+set} != xset ; then
+        LIBTASN1_CONFIG=$libtasn1_config_prefix/bin/libtasn1-config
+     fi
+  fi
+
+  AC_PATH_PROG(LIBTASN1_CONFIG, libtasn1-config, no)
+  min_libtasn1_version=ifelse([$1], ,0.1.0,$1)
+  AC_MSG_CHECKING(for libtasn1 - version >= $min_libtasn1_version)
+  no_libtasn1=""
+  if test "$LIBTASN1_CONFIG" = "no" ; then
+    no_libtasn1=yes
+  else
+    LIBTASN1_CFLAGS=`$LIBTASN1_CONFIG $libtasn1_config_args --cflags`
+    LIBTASN1_LIBS=`$LIBTASN1_CONFIG $libtasn1_config_args --libs`
+    libtasn1_config_version=`$LIBTASN1_CONFIG $libtasn1_config_args --version`
+
+
+      ac_save_CFLAGS="$CFLAGS"
+      ac_save_LIBS="$LIBS"
+      CFLAGS="$CFLAGS $LIBTASN1_CFLAGS"
+      LIBS="$LIBS $LIBTASN1_LIBS"
+dnl
+dnl Now check if the installed libtasn1 is sufficiently new. Also sanity
+dnl checks the results of libtasn1-config to some extent
+dnl
+      rm -f conf.libtasn1test
+      AC_TRY_RUN([
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <libtasn1.h>
+
+int
+main ()
+{
+    system ("touch conf.libtasn1test");
+
+    if( strcmp( asn1_check_version(NULL), "$libtasn1_config_version" ) )
+    {
+      printf("\n*** 'libtasn1-config --version' returned %s, but LIBTASN1 (%s)\n",
+             "$libtasn1_config_version", asn1_check_version(NULL) );
+      printf("*** was found! If libtasn1-config was correct, then it is best\n");
+      printf("*** to remove the old version of LIBTASN1. You may also be able to fix the error\n");
+      printf("*** by modifying your LD_LIBRARY_PATH enviroment variable, or by editing\n");
+      printf("*** /etc/ld.so.conf. Make sure you have run ldconfig if that is\n");
+      printf("*** required on your system.\n");
+      printf("*** If libtasn1-config was wrong, set the environment variable LIBTASN1_CONFIG\n");
+      printf("*** to point to the correct copy of libtasn1-config, and remove the file config.cache\n");
+      printf("*** before re-running configure\n");
+    }
+    else if ( strcmp(asn1_check_version(NULL), LIBTASN1_VERSION ) )
+    {
+      printf("\n*** LIBTASN1 header file (version %s) does not match\n", LIBTASN1_VERSION);
+      printf("*** library (version %s)\n", asn1_check_version(NULL) );
+    }
+    else
+    {
+      if ( asn1_check_version( "$min_libtasn1_version" ) )
+      {
+        return 0;
+      }
+     else
+      {
+        printf("no\n*** An old version of LIBTASN1 (%s) was found.\n",
+                asn1_check_version(NULL) );
+        printf("*** You need a version of LIBTASN1 newer than %s. The latest version of\n",
+               "$min_libtasn1_version" );
+        printf("*** LIBTASN1 is always available from ftp://gnutls.hellug.gr/pub/gnutls/libtasn1.\n");
+        printf("*** \n");
+        printf("*** If you have already installed a sufficiently new version, this error\n");
+        printf("*** probably means that the wrong copy of the libtasn1-config shell script is\n");
+        printf("*** being found. The easiest way to fix this is to remove the old version\n");
+        printf("*** of LIBTASN1, but you can also set the LIBTASN1_CONFIG environment to point to the\n");
+        printf("*** correct copy of libtasn1-config. (In this case, you will have to\n");
+        printf("*** modify your LD_LIBRARY_PATH enviroment variable, or edit /etc/ld.so.conf\n");
+        printf("*** so that the correct libraries are found at run-time))\n");
+      }
+    }
+  return 0;
+}
+],, no_libtasn1=yes,[echo $ac_n "cross compiling; assumed OK... $ac_c"])
+       CFLAGS="$ac_save_CFLAGS"
+       LIBS="$ac_save_LIBS"
+  fi
+
+  if test "x$no_libtasn1" = x ; then
+     AC_MSG_RESULT(yes)
+     ifelse([$2], , :, [$2])
+  else
+     if test -f conf.libtasn1test ; then
+        :
+     else
+        AC_MSG_RESULT(no)
+     fi
+     if test "$LIBTASN1_CONFIG" = "no" ; then
+       echo "*** The libtasn1-config script installed by LIBTASN1 could not be found"
+       echo "*** If LIBTASN1 was installed in PREFIX, make sure PREFIX/bin is in"
+       echo "*** your path, or set the LIBTASN1_CONFIG environment variable to the"
+       echo "*** full path to libtasn1-config."
+     else
+       if test -f conf.libtasn1test ; then
+        :
+       else
+          echo "*** Could not run libtasn1 test program, checking why..."
+          CFLAGS="$CFLAGS $LIBTASN1_CFLAGS"
+          LIBS="$LIBS $LIBTASN1_LIBS"
+          AC_TRY_LINK([
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <libtasn1.h>
+],      [ return !!asn1_check_version(NULL); ],
+        [ echo "*** The test program compiled, but did not run. This usually means"
+          echo "*** that the run-time linker is not finding LIBTASN1 or finding the wrong"
+          echo "*** version of LIBTASN1. If it is not finding LIBTASN1, you'll need to set your"
+          echo "*** LD_LIBRARY_PATH environment variable, or edit /etc/ld.so.conf to point"
+          echo "*** to the installed location  Also, make sure you have run ldconfig if that"
+          echo "*** is required on your system"
+          echo "***"
+          echo "*** If you have an old version installed, it is best to remove it, although"
+          echo "*** you may also be able to get things to work by modifying LD_LIBRARY_PATH"
+          echo "***" ],
+        [ echo "*** The test program failed to compile or link. See the file config.log for the"
+          echo "*** exact error that occured. This usually means LIBTASN1 was incorrectly installed"
+          echo "*** or that you have moved LIBTASN1 since it was installed. In the latter case, you"
+          echo "*** may want to edit the libtasn1-config script: $LIBTASN1_CONFIG" ])
+          CFLAGS="$ac_save_CFLAGS"
+          LIBS="$ac_save_LIBS"
+       fi
+     fi
+     LIBTASN1_CFLAGS=""
+     LIBTASN1_LIBS=""
+     ifelse([$3], , :, [$3])
+  fi
+  rm -f conf.libtasn1test
+  AC_SUBST(LIBTASN1_CFLAGS)
+  AC_SUBST(LIBTASN1_LIBS)
+])
+
+dnl *-*wedit:notab*-*  Please keep this as the last line.
+
diff --git a/meta-oe/recipes-gnome/gnome/gconf-native_2.6.1.bb b/meta-oe/recipes-gnome/gnome/gconf-native_2.6.1.bb
new file mode 100644
index 0000000000..fac712395d
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/gconf-native_2.6.1.bb
@@ -0,0 +1,17 @@
+NOTE = "This is just a dummy package to get packages stop complaining about gconftool-2 \
+        which they are not using anyway... :D"
+
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${POKYBASE}/LICENSE;md5=3f40d7994397109285ec7b81fdeb3b58"
+
+PR = "r1"
+
+inherit native
+
+do_install() {
+        install -d ${D}${bindir}
+        echo "#!/bin/sh" >${D}${bindir}/gconftool-2
+        chmod a+rx ${D}${bindir}/gconftool-2
+}
+
+NATIVE_INSTALL_WORKS = "1"
diff --git a/meta-oe/recipes-gnome/gnome/gconf_2.28.0.bb b/meta-oe/recipes-gnome/gnome/gconf_2.28.0.bb
new file mode 100644
index 0000000000..e167d8a6d5
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/gconf_2.28.0.bb
@@ -0,0 +1,40 @@
+DESCRIPTION = "GNOME configuration database system"
+SECTION = "x11/gnome"
+DEPENDS = "gtk+ orbit2 glib-2.0 libxml2 policykit"
+ORBIT_IDL_SRC = "${STAGING_BINDIR_NATIVE}/orbit-idl-2"
+
+LICENSE = "LGPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=55ca817ccb7d5b5b66355690e9abc605"
+
+S = "${WORKDIR}/GConf-${PV}"
+
+SRC_URI = "http://ftp.gnome.org/pub/GNOME/sources/GConf/2.28/GConf-${PV}.tar.bz2;name=archive"
+SRC_URI[archive.md5sum] = "ad2aeb9c7d906b274954c51a615caeac"
+SRC_URI[archive.sha256sum] = "d057dcfe2bfb2a80e592349c2a78d7dce12d19542aeced466c64fb701c806ac8"
+
+PR = "r2"
+
+RDEPENDS_${PN} += "dbus-x11"
+
+EXTRA_OECONF = " --without-openldap --disable-gtk-doc --enable-gtk POLKIT_POLICY_FILE_VALIDATE=true"
+
+inherit autotools gettext
+
+EXTRA_OEMAKE = 'ORBIT_IDL="${ORBIT_IDL_SRC}"'
+
+do_install_append() {
+	# this directory need to be created to avoid an Error 256 at gdm launch
+	install -d ${D}${sysconfdir}/gconf/gconf.xml.system
+
+	# this stuff is unusable
+	rm ${D}${libdir}/GConf/*/*.*a
+}
+
+FILES_${PN} += "${libdir}/GConf/* \
+		${datadir}/polkit* \
+		${datadir}/dbus-1/services/*.service \
+		${datadir}/dbus-1/system-services/*.service \
+"
+
+FILES_${PN}-dbg += "${libdir}/*/*/.debug"
+FILES_${PN}-dev += "${datadir}/sgml/gconf/gconf-1.0.dtd"
diff --git a/meta-oe/recipes-gnome/gnome/orbit2-2.14.17/configure-lossage.patch b/meta-oe/recipes-gnome/gnome/orbit2-2.14.17/configure-lossage.patch
new file mode 100644
index 0000000000..5fc1de5610
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2-2.14.17/configure-lossage.patch
@@ -0,0 +1,37 @@
+--- ORBit2-2.14.17/configure.in-orig	2009-01-10 09:36:18.000000000 -0800
++++ ORBit2-2.14.17/configure.in	2009-06-17 15:10:59.000000000 -0700
+@@ -217,20 +217,20 @@ dnl
+ dnl   So many people with broken linking setups asked about this
+ dnl it turned out to be necessary to check for this.
+ dnl
+-dofus_save_libs="$LIBS"
+-LIBS="$ORBIT_LIBS $LIBS"
+-AC_TRY_RUN([ #include <stdio.h>
+-             main ()
+-             {
+-               return 0;
+-             } ],,
+-           AC_MSG_ERROR([
+-Linking is badly borked on your system. Please ensure your library path is correct
+-Check config.log for details - check near the end of the log above 'failed program was'
+-Alternatively ensure that your /etc/ld.so.conf (and/or LD_LIBRARY_PATH) includes the
+-prefix you're compiling on: '${prefix}' ]), 
+-AC_MSG_WARN([Could not check for borked linking while cross-compiling]))
+-LIBS="$dofus_save_libs"
++dnl dofus_save_libs="$LIBS"
++dnl LIBS="$ORBIT_LIBS $LIBS"
++dnl AC_TRY_RUN([ #include <stdio.h>
++dnl             main ()
++dnl              {
++dnl                return 0;
++dnl              } ],,
++dnl            AC_MSG_ERROR([
++dnl Linking is badly borked on your system. Please ensure your library path is correct
++dnl Check config.log for details - check near the end of the log above 'failed program was'
++dnl Alternatively ensure that your /etc/ld.so.conf (and/or LD_LIBRARY_PATH) includes the
++dnl prefix you're compiling on: '${prefix}' ]), 
++dnl AC_MSG_WARN([Could not check for borked linking while cross-compiling]))
++dnl LIBS="$dofus_save_libs"
+ 
+ orig_CPPFLAGS=$CPPFLAGS
+ CPPFLAGS="$CPPFLAGS $ORBIT_CFLAGS"
diff --git a/meta-oe/recipes-gnome/gnome/orbit2-native_2.14.12.bb b/meta-oe/recipes-gnome/gnome/orbit2-native_2.14.12.bb
new file mode 100644
index 0000000000..1db2496c35
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2-native_2.14.12.bb
@@ -0,0 +1,27 @@
+DESCRIPTION = "CORBA ORB"
+PR = "r0"
+LICENSE = "LGPL GPL"
+LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f"
+SECTION = "x11/gnome/libs"
+SRC_URI = "http://ftp.gnome.org/pub/GNOME/sources/ORBit2/2.14/ORBit2-${PV}.tar.bz2 \
+           file://configure-lossage.patch \
+	   file://gtk-doc.m4 \
+	   file://gtk-doc.make"
+DEPENDS = "libidl-native popt-native gtk-doc"
+
+S = "${WORKDIR}/ORBit2-${PV}"
+FILESDIR = "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/orbit2"
+
+PARALLEL_MAKE = ""
+inherit autotools native pkgconfig
+
+EXTRA_OECONF = "--disable-gtk-doc"
+
+do_configure_prepend() {
+	mkdir -p m4
+	install ${WORKDIR}/gtk-doc.m4 ./m4/
+	install ${WORKDIR}/gtk-doc.make ./
+}
+
+SRC_URI[md5sum] = "6f4bf7d803d442e9d093a0daa203d506"
+SRC_URI[sha256sum] = "d60027a4a36e64d02723d00b76c08e8d92850cab6269b2edcda4a1bb30cc7723"
diff --git a/meta-oe/recipes-gnome/gnome/orbit2.inc b/meta-oe/recipes-gnome/gnome/orbit2.inc
new file mode 100644
index 0000000000..51978909be
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2.inc
@@ -0,0 +1,32 @@
+LICENSE = "GPL"
+DESCRIPTION = "CORBA ORB"
+SECTION = "x11/gnome/libs"
+SRC_URI = "http://ftp.gnome.org/pub/GNOME/sources/ORBit2/2.14/ORBit2-${PV}.tar.bz2 \
+           file://configure-lossage.patch \
+           file://pkgconfig-fix.patch \
+	   file://gtk-doc.m4 \
+	   file://gtk-doc.make"
+DEPENDS = "libidl popt orbit2-native gtk-doc"
+PARALLEL_MAKE = ""
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f"
+
+FILES_${PN} += "${libdir}/orbit-2.0/*.so"
+FILES_${PN}-dev += "${libdir}/orbit-2.0/*.a ${libdir}/orbit-2.0/*.la"
+FILES_${PN}-dbg += "${libdir}/orbit-2.0/.debug"
+
+S = "${WORKDIR}/ORBit2-${PV}"
+
+LEAD_SONAME = "libORBit-2.so"
+
+inherit autotools pkgconfig
+
+EXTRA_OECONF = "--disable-gtk-doc"
+EXTRA_OEMAKE = "IDL_COMPILER='${STAGING_BINDIR_NATIVE}/orbit-idl-2'"
+
+do_configure_prepend() {
+	mkdir -p m4
+	install ${WORKDIR}/gtk-doc.m4 ./m4/
+	install ${WORKDIR}/gtk-doc.make ./
+}
+
diff --git a/meta-oe/recipes-gnome/gnome/orbit2/configure-lossage.patch b/meta-oe/recipes-gnome/gnome/orbit2/configure-lossage.patch
new file mode 100644
index 0000000000..7485a0ce0c
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2/configure-lossage.patch
@@ -0,0 +1,35 @@
+--- orbit/configure.in~	2004-05-07 09:31:32.000000000 +0100
++++ orbit/configure.in	2004-05-08 19:27:35.000000000 +0100
+@@ -193,19 +193,19 @@
+ dnl   So many people with broken linking setups asked about this
+ dnl it turned out to be necessary to check for this.
+ dnl
+-dofus_save_libs="$LIBS"
+-LIBS="$ORBIT_LIBS $LIBS"
+-AC_TRY_RUN([ #include <stdio.h>
+-             main ()
+-             {
+-               return 0;
+-             } ],,
+-           AC_MSG_ERROR([
+-Linking is badly borked on your system. Please ensure your library path is correct
+-Check config.log for details - check near the end of the log above 'failed program was'
+-Alternatively ensure that your /etc/ld.so.conf (and/or LD_LIBRARY_PATH) includes the
+-prefix you're compiling on: '${prefix}' ]))
+-LIBS="$dofus_save_libs"
++dnl dofus_save_libs="$LIBS"
++dnl LIBS="$ORBIT_LIBS $LIBS"
++dnl AC_TRY_RUN([ #include <stdio.h>
++dnl              main ()
++dnl              {
++dnl                return 0;
++dnl              } ],,
++dnl            AC_MSG_ERROR([
++dnl Linking is badly borked on your system. Please ensure your library path is correct
++dnl Check config.log for details - check near the end of the log above 'failed program was'
++dnl Alternatively ensure that your /etc/ld.so.conf (and/or LD_LIBRARY_PATH) includes the
++dnl prefix you're compiling on: '${prefix}' ]))
++dnl LIBS="$dofus_save_libs"
+ 
+ orig_CPPFLAGS=$CPPFLAGS
+ CPPFLAGS="$CPPFLAGS $ORBIT_CFLAGS"
diff --git a/meta-oe/recipes-gnome/gnome/orbit2/pkgconfig-fix.patch b/meta-oe/recipes-gnome/gnome/orbit2/pkgconfig-fix.patch
new file mode 100644
index 0000000000..f629e506dd
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2/pkgconfig-fix.patch
@@ -0,0 +1,12 @@
+diff -urN ORBit2-2.14.12.orig/ORBit-2.0.pc.in ORBit2-2.14.12/ORBit-2.0.pc.in
+--- ORBit2-2.14.12.orig/ORBit-2.0.pc.in	2008-01-29 13:45:22.000000000 +0100
++++ ORBit2-2.14.12/ORBit-2.0.pc.in	2008-09-23 20:13:07.000000000 +0200
+@@ -2,7 +2,7 @@
+ exec_prefix=@exec_prefix@
+ libdir=@libdir@
+ includedir=@includedir@
+-orbit_idl=@bindir@/orbit-idl-2@EXEEXT@
++orbit_idl=@exec_prefix@/bin/orbit-idl-2@EXEEXT@
+ 
+ 
+ Name: ORBit-2.0
diff --git a/meta-oe/recipes-gnome/gnome/orbit2_2.14.17.bb b/meta-oe/recipes-gnome/gnome/orbit2_2.14.17.bb
new file mode 100644
index 0000000000..47f632793c
--- /dev/null
+++ b/meta-oe/recipes-gnome/gnome/orbit2_2.14.17.bb
@@ -0,0 +1,5 @@
+require orbit2.inc
+
+
+SRC_URI[md5sum] = "10bfb957fa4a8935a0b4afaee7d71df7"
+SRC_URI[sha256sum] = "62bfce3f678f9347a19c766944e8aef7b89bc32b25ac23eb3e4c25929ce8974c"
diff --git a/meta-oe/recipes-gnome/gtk+/composite-pixbuf_0.0.bb b/meta-oe/recipes-gnome/gtk+/composite-pixbuf_0.0.bb
new file mode 100644
index 0000000000..29e329a4af
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/composite-pixbuf_0.0.bb
@@ -0,0 +1,21 @@
+DESCRIPTION = "Pixbuf performance test"
+LICENSE = "Public domain"
+DEPENDS = "gtk+" 
+
+SRC_URI = "http://amelang.net/composite_pixbuf.c"
+
+S = "${WORKDIR}"
+
+do_compile() {
+        ${CC} ${CFLAGS} composite_pixbuf.c -o composite_pixbuf \
+            `pkg-config --cflags gdk-2.0` `pkg-config --libs gdk-2.0` `pkg-config --libs x11` `pkg-config --libs pango` \
+	     -lxcb -lXext -lXinerama -lXrandr -lXcursor -lXfixes -lpangoft2-1.0 -lz -lexpat -lxcb-xlib -lXau -lXdmcp  
+}	    
+
+do_install() {
+        install -d ${D}${bindir} 
+        install -m 755 composite_pixbuf ${D}${bindir}
+}
+
+SRC_URI[md5sum] = "97edf3cce3353b6cb5f822442a83aa5e"
+SRC_URI[sha256sum] = "bd6f9e5dc0a89e9918f78a550f6e688480f044cec2e8674d34c7c6212831d6bd"
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/cross-nm.patch b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/cross-nm.patch
new file mode 100644
index 0000000000..36e9557009
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/cross-nm.patch
@@ -0,0 +1,13 @@
+Index: gtk+-2.20.1/configure.in
+===================================================================
+--- gtk+-2.20.1.orig/configure.in	2010-07-10 16:25:40.000000000 -0700
++++ gtk+-2.20.1/configure.in	2010-07-12 22:08:49.878377002 -0700
+@@ -202,7 +202,7 @@ m4_ifdef([LT_OUTPUT], [LT_OUTPUT])
+ AC_SYS_LARGEFILE
+ 
+ AM_PROG_AS
+-AC_PATH_PROG(NM, nm, nm)
++AC_CHECK_PROG(NM, nm, nm)
+ 
+ dnl Initialize maintainer mode
+ AM_MAINTAINER_MODE
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/gtk-dnd-grab-deadlock-fix.patch b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/gtk-dnd-grab-deadlock-fix.patch
new file mode 100644
index 0000000000..10e84d3bac
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/gtk-dnd-grab-deadlock-fix.patch
@@ -0,0 +1,24 @@
+commit 96c731cc2dde8a3e4ba542eca4c87ed6154084d2
+Author: Stanislav Brabec <sbrabec@suse.cz>
+Date:   Fri Jul 9 15:11:15 2010 +0200
+
+    Fix pointer grab dead lock if gtk_drag_begin uses GDK_CURRENT_TIME and
+    release happens before getting grab.
+    
+    For more see https://bugzilla.gnome.org/show_bug.cgi?id=623865
+
+diff --git a/gtk/gtkdnd.c b/gtk/gtkdnd.c
+index a0d878d..48063a5 100644
+--- a/gtk/gtkdnd.c
++++ b/gtk/gtkdnd.c
+@@ -4065,6 +4065,10 @@ gtk_drag_end (GtkDragSourceInfo *info, guint32 time)
+   pointer = gdk_drag_context_get_device (info->context);
+   keyboard = gdk_device_get_associated_device (pointer);
+ 
++  /* Prevent grab after release (see bug 623865) */
++  if (info->grab_time == GDK_CURRENT_TIME)
++    time = GDK_CURRENT_TIME;
++
+   if (info->update_idle)
+     {
+       g_source_remove (info->update_idle);
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/hardcoded_libtool.patch b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/hardcoded_libtool.patch
new file mode 100644
index 0000000000..82fbbac8d7
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/hardcoded_libtool.patch
@@ -0,0 +1,31 @@
+Index: gtk+-2.14.2/configure.in
+===================================================================
+--- gtk+-2.14.2.orig/configure.in	2008-09-23 15:52:44.000000000 +0100
++++ gtk+-2.14.2/configure.in	2008-09-23 15:53:51.000000000 +0100
+@@ -401,7 +401,7 @@
+ case $enable_explicit_deps in
+   auto)
+     export SED
+-    deplibs_check_method=`(./libtool --config; echo 'eval echo \"$deplibs_check_method\"') | sh`
++    deplibs_check_method=`(./$host_alias-libtool --config; echo 'eval echo \"$deplibs_check_method\"') | sh`
+     if test "x$deplibs_check_method" '!=' xpass_all || test "x$enable_static" = xyes ; then
+       enable_explicit_deps=yes  
+     else
+@@ -759,7 +759,7 @@
+     dnl Now we check to see if our libtool supports shared lib deps
+     dnl (in a rather ugly way even)
+     if $dynworks; then
+-        pixbuf_libtool_config="${CONFIG_SHELL-/bin/sh} ./libtool --config"
++        pixbuf_libtool_config="${CONFIG_SHELL-/bin/sh} $host_alias-libtool --config"
+         pixbuf_deplibs_check=`$pixbuf_libtool_config | \
+             grep '^[[a-z_]]*check[[a-z_]]*_method=[['\''"]]' | \
+             sed 's/.*[['\''"]]\(.*\)[['\''"]]$/\1/'`
+@@ -1893,7 +1893,7 @@
+ # We are using gmodule-no-export now, but I'm leaving the stripping
+ # code in place for now, since pango and atk still require gmodule.
+ export SED
+-export_dynamic=`(./libtool --config; echo eval echo \\$export_dynamic_flag_spec) | sh`
++export_dynamic=`($host_alias-libtool --config; echo eval echo \\$export_dynamic_flag_spec) | sh`
+ if test -n "$export_dynamic"; then
+   GDK_PIXBUF_DEP_LIBS=`echo $GDK_PIXBUF_DEP_LIBS | sed -e "s/$export_dynamic//"`
+   GDK_PIXBUF_XLIB_DEP_LIBS=`echo $GDK_PIXBUF_XLIB_DEP_LIBS | sed -e "s/$export_dynamic//"`
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/no-demos.patch b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/no-demos.patch
new file mode 100644
index 0000000000..0fc4c48d1a
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/no-demos.patch
@@ -0,0 +1,10 @@
+--- gtk+-2.10.1/Makefile.am.orig	2006-08-08 12:37:30.000000000 +0100
++++ gtk+-2.10.1/Makefile.am	2006-08-08 12:37:48.000000000 +0100
+@@ -1,6 +1,6 @@
+ ## Makefile.am for GTK+
+ 
+-SRC_SUBDIRS = gdk-pixbuf gdk gtk modules demos tests perf contrib
++SRC_SUBDIRS = gdk-pixbuf gdk gtk modules tests perf contrib
+ SUBDIRS = po po-properties $(SRC_SUBDIRS) docs m4macros
+ 
+ # require automake 1.4
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/run-iconcache.patch b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/run-iconcache.patch
new file mode 100644
index 0000000000..aa1bffa8a7
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/run-iconcache.patch
@@ -0,0 +1,19 @@
+--- /tmp/Makefile.am	2009-10-28 18:21:54.000000000 +0100
++++ gtk+-2.18.3/gtk/Makefile.am	2009-10-28 18:23:07.000000000 +0100
+@@ -1300,11 +1300,11 @@
+ 	   ./gtk-update-icon-cache
+ endif
+ 
+-gtkbuiltincache.h: @REBUILD@ stamp-icons
+-	$(MAKE) $(AM_MAKEFLAGS) gtk-update-icon-cache$(EXEEXT) $(GTK_UPDATE_ICON_CACHE_MANIFEST)
+-	$(gtk_update_icon_cache_program) --force --ignore-theme-index		\
+-	   --source builtin_icons stock-icons > gtkbuiltincache.h.tmp &&        \
+-	mv gtkbuiltincache.h.tmp gtkbuiltincache.h
++#gtkbuiltincache.h: @REBUILD@ stamp-icons
++#	$(MAKE) $(AM_MAKEFLAGS) gtk-update-icon-cache$(EXEEXT) $(GTK_UPDATE_ICON_CACHE_MANIFEST)
++#	$(gtk_update_icon_cache_program) --force --ignore-theme-index		\
++#	   --source builtin_icons stock-icons > gtkbuiltincache.h.tmp &&        \
++#	mv gtkbuiltincache.h.tmp gtkbuiltincache.h
+ 
+ EXTRA_DIST +=                   \
+ 	$(STOCK_ICONS)		\
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/toggle-font.diff b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/toggle-font.diff
new file mode 100644
index 0000000000..59ad150b2f
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+-2.20.1/toggle-font.diff
@@ -0,0 +1,100 @@
+Index: gtk/gtkcellrenderertoggle.c
+===================================================================
+--- gtk/gtkcellrenderertoggle.c	(revision 18523)
++++ gtk/gtkcellrenderertoggle.c	(working copy)
+@@ -71,6 +71,8 @@
+   PROP_INDICATOR_SIZE
+ };
+ 
++/* This is a hard-coded default which promptly gets overridden by a size
++   calculated from the font size. */
+ #define TOGGLE_WIDTH 13
+ 
+ static guint toggle_cell_signals[LAST_SIGNAL] = { 0 };
+@@ -80,8 +82,9 @@
+ typedef struct _GtkCellRendererTogglePrivate GtkCellRendererTogglePrivate;
+ struct _GtkCellRendererTogglePrivate
+ {
+-  gint indicator_size;
+-
++  gint indicator_size; /* This is the real size */
++  gint override_size; /* This is the size set from the indicator-size property */
++  GtkWidget *cached_widget;
+   guint inconsistent : 1;
+ };
+ 
+@@ -104,6 +107,7 @@
+   GTK_CELL_RENDERER (celltoggle)->ypad = 2;
+ 
+   priv->indicator_size = TOGGLE_WIDTH;
++  priv->override_size = 0;
+   priv->inconsistent = FALSE;
+ }
+ 
+@@ -210,7 +214,7 @@
+       g_value_set_boolean (value, celltoggle->radio);
+       break;
+     case PROP_INDICATOR_SIZE:
+-      g_value_set_int (value, priv->indicator_size);
++      g_value_set_int (value, priv->override_size ? priv->override_size : priv->indicator_size);
+       break;
+     default:
+       G_OBJECT_WARN_INVALID_PROPERTY_ID (object, param_id, pspec);
+@@ -245,7 +249,7 @@
+       celltoggle->radio = g_value_get_boolean (value);
+       break;
+     case PROP_INDICATOR_SIZE:
+-      priv->indicator_size = g_value_get_int (value);
++      priv->override_size = g_value_get_int (value);
+       break;
+     default:
+       G_OBJECT_WARN_INVALID_PROPERTY_ID (object, param_id, pspec);
+@@ -273,6 +277,27 @@
+ }
+ 
+ static void
++on_widget_style_set (GtkWidget *widget, GtkStyle *previous, gpointer user_data)
++{
++  GtkCellRendererTogglePrivate *priv = user_data;
++  PangoContext *context;
++  PangoFontMetrics *metrics;
++  int height;
++  
++  context = gtk_widget_get_pango_context (widget);
++  metrics = pango_context_get_metrics (context,
++                                       widget->style->font_desc,
++                                       pango_context_get_language (context));
++
++  height = pango_font_metrics_get_ascent (metrics) +
++    pango_font_metrics_get_descent (metrics);
++  
++  pango_font_metrics_unref (metrics);
++  
++  priv->indicator_size = PANGO_PIXELS (height * 0.85);
++}
++
++static void
+ gtk_cell_renderer_toggle_get_size (GtkCellRenderer *cell,
+ 				   GtkWidget       *widget,
+ 				   GdkRectangle    *cell_area,
+@@ -287,6 +312,20 @@
+ 
+   priv = GTK_CELL_RENDERER_TOGGLE_GET_PRIVATE (cell);
+ 
++  if (priv->override_size) {
++    priv->indicator_size = priv->override_size;
++  } else if (priv->cached_widget != widget) {
++    if (priv->cached_widget) {
++      g_object_remove_weak_pointer (widget, &priv->cached_widget);
++      g_signal_handlers_disconnect_by_func (priv->cached_widget, on_widget_style_set, priv);
++    }
++    priv->cached_widget = widget;
++    g_object_add_weak_pointer (widget, &priv->cached_widget);
++    g_signal_connect (widget, "style-set", on_widget_style_set, priv);
++    
++    on_widget_style_set (widget, NULL, priv);
++  }
++
+   calc_width = (gint) cell->xpad * 2 + priv->indicator_size;
+   calc_height = (gint) cell->ypad * 2 + priv->indicator_size;
+ 
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+.inc b/meta-oe/recipes-gnome/gtk+/gtk+.inc
new file mode 100644
index 0000000000..42a8febcdd
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+.inc
@@ -0,0 +1,97 @@
+DESCRIPTION = "GTK+ is a multi-platform toolkit for creating graphical user interfaces. Offering a complete \
+set of widgets, GTK+ is suitable for projects ranging from small one-off projects to complete application suites."
+HOMEPAGE = "http://www.gtk.org"
+SECTION = "libs"
+LICENSE = "LGPL"
+PRIORITY = "optional"
+DEPENDS = "glib-2.0 tiff pango atk jpeg libpng libxext libxcursor gtk-doc libgcrypt cups \
+	   libxrandr libxdamage libxrender libxcomposite cairo jasper gtk+-native"
+PROVIDES = "gdk-pixbuf"
+
+MAJ_VER = "${@bb.data.getVar('PV',d,1).split('.')[0]}.${@bb.data.getVar('PV',d,1).split('.')[1]}"
+SRC_URI = "http://download.gnome.org/sources/gtk+/${MAJ_VER}/gtk+-${PV}.tar.bz2;name=gtk \
+	file://hardcoded_libtool.patch \
+	file://run-iconcache.patch \
+	file://toggle-font.diff;striplevel=0 \
+	file://xsettings.patch \
+	"
+
+INC_PR = "r10"
+
+inherit autotools pkgconfig
+
+LEAD_SONAME = "libgtk-x11-2.0.so"
+LIBV = "2.10.0"
+
+PACKAGES =+ "${PN}-demo ${PN}-demo-source"
+FILES_${PN}-demo = "${bindir}/gtk-demo"
+FILES_${PN}-demo-source = "${datadir}/gtk-2.0/demo"
+
+FILES_${PN} = "${bindir}/gdk-pixbuf-query-loaders \
+	${bindir}/gtk-update-icon-cache \
+	${bindir}/gtk-query-immodules-2.0 \
+	${libdir}/lib*.so.* \
+	${datadir}/themes ${sysconfdir} \
+	${libdir}/gtk-2.0/${LIBV}/engines/libpixmap.so"
+
+FILES_${PN}-dev += " \
+	${datadir}/gtk-2.0/include \
+	${libdir}/gtk-2.0/include \
+	${bindir}/gdk-pixbuf-csource \
+	${bindir}/gtk-builder-convert"
+
+FILES_${PN}-dbg += " \
+	${libdir}/gtk-2.0/modules/.debug/* \
+	${libdir}/gtk-2.0/${LIBV}/loaders/.debug/* \
+	${libdir}/gtk-2.0/${LIBV}/immodules/.debug/* \
+	${libdir}/gtk-2.0/${LIBV}/engines/.debug/* \
+	${libdir}/gtk-2.0/${LIBV}/printbackends/.debug/*"
+
+NEATSTUFF = "ttf-dejavu-sans gdk-pixbuf-loader-png gdk-pixbuf-loader-jpeg gdk-pixbuf-loader-gif gdk-pixbuf-loader-xpm"
+NEATSTUFF_append_linux = " glibc-gconv-iso8859-1"
+NEATSTUFF_append_linux-gnueabi = " glibc-gconv-iso8859-1"
+
+# Only add runtime dependencies for target recipe
+RDEPENDS_${PN} += "${@['', 'hicolor-icon-theme']['${PN}' == '${BPN}']}"
+RRECOMMENDS_${PN} += "${@['', '${NEATSTUFF}']['${PN}' == '${BPN}']}"
+
+do_install_append () {
+	mkdir -p ${D}${libdir}/gtk-2.0/include
+	install -m 0644 gdk/gdkconfig.h ${D}${libdir}/gtk-2.0/include/gdkconfig.h
+	# Copy over all headers, since the maemo stuff needs access to the private api. *sigh*
+	cp gtk/*.h ${D}${includedir}/gtk-2.0/gtk/
+
+	install -m 0644 m4macros/gtk-2.0.m4 ${STAGING_DATADIR}/aclocal/
+
+	install -d ${D}${sysconfdir}/gtk-2.0
+	rm -f ${D}${libdir}/gtk-2.0/*/*.la ${D}${libdir}/gtk-2.0/${LIBV}/*/*.la
+}
+
+do_install_append_virtclass-native () {
+	${D}${bindir}/gdk-pixbuf-query-loaders \
+		${D}${libdir}/gtk-2.0/${LIBV}/loaders/*.so | \
+		sed -e's,${D},,' > \
+			${D}${sysconfdir}/gtk-2.0/gdk-pixbuf.loaders
+}
+
+SYSROOT_PREPROCESS_FUNCS_append_virtclass-native = " gdk_pixbuf_fixup"
+
+_SYSROOT_DEST = "${SYSROOT_DESTDIR}${STAGING_DIR_HOST}"
+gdk_pixbuf_fixup () {
+	create_wrapper ${_SYSROOT_DEST}${bindir}/gdk-pixbuf-query-loaders \
+		LD_LIBRARY_PATH=${STAGING_LIBDIR} \
+		GDK_PIXBUF_MODULEDIR=${libdir}/gtk-2.0/${LIBV}/loaders
+	${_SYSROOT_DEST}${bindir}/gdk-pixbuf-query-loaders \
+		${_SYSROOT_DEST}${libdir}/gtk-2.0/${LIBV}/loaders/*.so | \
+		sed -e's,${_SYSROOT_DEST},,' > \
+			${_SYSROOT_DEST}${sysconfdir}/gtk-2.0/gdk-pixbuf.loaders
+	create_wrapper ${_SYSROOT_DEST}${bindir}/gdk-pixbuf-csource \
+		GDK_PIXBUF_MODULE_FILE=${sysconfdir}/gtk-2.0/gdk-pixbuf.loaders
+}
+
+postinst_prologue() {
+if [ "x$D" != "x" ]; then
+  exit 1
+fi
+
+}
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/filesel-fix-segfault.patch b/meta-oe/recipes-gnome/gtk+/gtk+/filesel-fix-segfault.patch
new file mode 100644
index 0000000000..7b37d4bb2e
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/filesel-fix-segfault.patch
@@ -0,0 +1,19 @@
+--- gtk+-2.10.12_/gtk/gtkfilesel.c	2007-06-12 14:00:38.000000000 +0200
++++ gtk+-2.10.12/gtk/gtkfilesel.c	2007-06-12 14:40:32.000000000 +0200
+@@ -2444,9 +2444,13 @@
+ 
+               if (!is_file)
+                 {
+-                  gtk_file_selection_dir_activate (tree_view, path, 
+-                          gtk_tree_view_get_column (tree_view, DIR_COLUMN),
+-                          user_data);
++		   fs->last_selected = g_strdup (g_ptr_array_index (new_names, index));
++		   gtk_file_selection_dir_activate (tree_view, path, 
++						    gtk_tree_view_get_column (tree_view, DIR_COLUMN),
++						    user_data);
++		   gtk_tree_path_free (path);
++		   return;
++		  
+                 }
+                 
+               gtk_tree_path_free (path);
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/gtklabel-resize-patch b/meta-oe/recipes-gnome/gtk+/gtk+/gtklabel-resize-patch
new file mode 100644
index 0000000000..df29656343
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/gtklabel-resize-patch
@@ -0,0 +1,10 @@
+--- gtk+-2.4.3/gtk/gtklabel.c~	2004-06-11 13:50:34.000000000 +0100
++++ gtk+-2.4.3/gtk/gtklabel.c	2004-07-05 13:33:57.000000000 +0100
+@@ -1623,6 +1623,7 @@
+ 
+   /* We have to clear the layout, fonts etc. may have changed */
+   gtk_label_clear_layout (label);
++  gtk_widget_queue_resize (GTK_WIDGET (label));
+ }
+ 
+ static void 
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/lower-quality-scaling-in-pixbuf-engine.patch b/meta-oe/recipes-gnome/gtk+/gtk+/lower-quality-scaling-in-pixbuf-engine.patch
new file mode 100644
index 0000000000..6cf1c14991
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/lower-quality-scaling-in-pixbuf-engine.patch
@@ -0,0 +1,13 @@
+Index: gtk+-2.6.10/modules/engines/pixbuf/pixbuf-render.c
+===================================================================
+--- gtk+-2.6.10.orig/modules/engines/pixbuf/pixbuf-render.c	2005-08-18 14:11:00.000000000 +0000
++++ gtk+-2.6.10/modules/engines/pixbuf/pixbuf-render.c	2007-05-24 11:16:50.000000000 +0000
+@@ -407,7 +407,7 @@
+ 			0, 0, rect.width, rect.height,
+ 			dest_x - rect.x, dest_y - rect.y, 
+ 			x_scale, y_scale,
+-			GDK_INTERP_BILINEAR);
++			GDK_INTERP_NEAREST);
+ 
+       g_object_unref (partial_src);
+ 
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/migration.patch b/meta-oe/recipes-gnome/gtk+/gtk+/migration.patch
new file mode 100644
index 0000000000..f4c7f853ad
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/migration.patch
@@ -0,0 +1,619 @@
+Index: configure.in
+===================================================================
+RCS file: /cvs/gnome/gtk+/configure.in,v
+retrieving revision 1.419.2.4
+diff -u -r1.419.2.4 configure.in
+--- configure.in	8 Feb 2005 21:39:42 -0000	1.419.2.4
++++ configure.in	27 Feb 2005 13:10:16 -0000
+@@ -1495,6 +1495,16 @@
+ GTK_DEP_LIBS="$GDK_EXTRA_LIBS $GTK_DEP_LIBS_FOR_X `$PKG_CONFIG --libs $GDK_PIXBUF_PACKAGES $GDK_PACKAGES $GTK_PACKAGES` $GTK_EXTRA_LIBS $GDK_PIXBUF_EXTRA_LIBS"
+ GTK_DEP_CFLAGS="`$PKG_CONFIG --cflags  gthread-2.0 $GDK_PIXBUF_PACKAGES $GDK_PACKAGES $GTK_PACKAGES` $GDK_PIXBUF_EXTRA_CFLAGS $GDK_EXTRA_CFLAGS $GTK_EXTRA_CFLAGS"
+ 
++AC_ARG_ENABLE(display-migration,
++	[AC_HELP_STRING([--enable-display-migration],
++			[include support for GPE_CHANGE_DISPLAY protocol])],
++	enable_migration=yes, enable_migration=no)
++if test "$enable_migration" = "yes"; then
++	AC_DEFINE([ENABLE_MIGRATION], 1, [Define if display migration is enabled])
++	GTK_DEP_LIBS="$GTK_DEP_LIBS -lgcrypt"
++fi
++AM_CONDITIONAL(ENABLE_MIGRATION, test $enable_migration = "yes")
++
+ AC_SUBST(GTK_PACKAGES)
+ AC_SUBST(GTK_EXTRA_LIBS)
+ AC_SUBST(GTK_EXTRA_CFLAGS)
+Index: gtk/Makefile.am
+===================================================================
+RCS file: /cvs/gnome/gtk+/gtk/Makefile.am,v
+retrieving revision 1.266.2.1
+diff -u -r1.266.2.1 Makefile.am
+--- gtk/Makefile.am	13 Jan 2005 15:18:21 -0000	1.266.2.1
++++ gtk/Makefile.am	27 Feb 2005 13:10:17 -0000
+@@ -520,6 +520,10 @@
+ 	gtkwindow.c		\
+ 	xembed.h
+ 
++if ENABLE_MIGRATION
++gtk_c_sources += gtkmigration.c
++endif
++
+ if OS_UNIX
+ gtk_private_h_sources += gtkfilesystemunix.h
+ gtk_c_sources +=         gtkfilesystemunix.c
+Index: gtk/gtkmain.c
+===================================================================
+RCS file: /cvs/gnome/gtk+/gtk/gtkmain.c,v
+retrieving revision 1.255
+diff -u -r1.255 gtkmain.c
+--- gtk/gtkmain.c	27 Dec 2004 05:25:15 -0000	1.255
++++ gtk/gtkmain.c	27 Feb 2005 13:10:19 -0000
+@@ -491,6 +491,10 @@
+   _gtk_accel_map_init ();  
+   _gtk_rc_init ();
+ 
++#ifdef ENABLE_MIGRATION
++  gtk_migration_init ();
++#endif
++
+   /* Set the 'initialized' flag.
+    */
+   gtk_initialized = TRUE;
+Index: gtk/gtkwindow.c
+===================================================================
+RCS file: /cvs/gnome/gtk+/gtk/gtkwindow.c,v
+retrieving revision 1.281.2.4
+diff -u -r1.281.2.4 gtkwindow.c
+--- gtk/gtkwindow.c	21 Feb 2005 04:21:49 -0000	1.281.2.4
++++ gtk/gtkwindow.c	27 Feb 2005 13:10:56 -0000
+@@ -731,6 +731,8 @@
+   add_tab_bindings (binding_set, GDK_CONTROL_MASK | GDK_SHIFT_MASK, GTK_DIR_TAB_BACKWARD);
+ }
+ 
++extern void gtk_migration_mark_window (GtkWidget *w);
++
+ static void
+ gtk_window_init (GtkWindow *window)
+ {
+@@ -790,6 +792,10 @@
+ 		    "event",
+ 		    G_CALLBACK (gtk_window_event),
+ 		    NULL);
++
++#ifdef ENABLE_MIGRATION
++  gtk_migration_mark_window (window);
++#endif
+ }
+ 
+ static void
+--- /dev/null	2005-02-20 01:07:50.714416160 +0000
++++ gtk/gtkmigration.c	2005-02-27 15:05:04.052757352 +0000
+@@ -0,0 +1,529 @@
++/*
++ * Copyright (C) 2003, 2005 Philip Blundell <philb@gnu.org>
++ *
++ * This program is free software; you can redistribute it and/or
++ * modify it under the terms of the GNU General Public License
++ * as published by the Free Software Foundation; either version
++ * 2 of the License, or (at your option) any later version.
++ */
++
++#include <stdlib.h>
++#include <ctype.h>
++#include <libintl.h>
++#include <string.h>
++#include <assert.h>
++
++#include <X11/X.h>
++#include <X11/Xlib.h>
++#include <X11/Xatom.h>
++
++#include <gcrypt.h>
++
++#include "gtk.h"
++#include "gdk.h"
++#include "x11/gdkx.h"
++
++#define _(x) gettext(x)
++
++static GdkAtom string_gdkatom, display_change_gdkatom;
++static GdkAtom rsa_challenge_gdkatom;
++
++#define DISPLAY_CHANGE_SUCCESS			0
++#define DISPLAY_CHANGE_UNABLE_TO_CONNECT	1
++#define DISPLAY_CHANGE_NO_SUCH_SCREEN		2
++#define DISPLAY_CHANGE_AUTHENTICATION_BAD	3
++#define DISPLAY_CHANGE_INDETERMINATE_ERROR	4
++
++static gboolean no_auth;
++
++static GSList *all_widgets;
++
++static gboolean gtk_migration_initialised;
++
++#define CHALLENGE_LEN 64
++
++gchar *gtk_migration_auth_challenge_string;
++
++static unsigned char challenge_bytes[CHALLENGE_LEN];
++static unsigned long challenge_seq;
++
++#define hexbyte(x)  ((x) >= 10 ? (x) + 'a' - 10 : (x) + '0')
++
++struct rsa_key
++{
++  gcry_mpi_t n, e, d, p, q, u;
++};
++
++static gcry_mpi_t
++mpi_from_sexp (gcry_sexp_t r, char *tag)
++{
++  gcry_sexp_t s = gcry_sexp_find_token (r, tag, 0);
++  return gcry_sexp_nth_mpi (s, 1, GCRYMPI_FMT_USG);
++}
++
++static char *
++hex_from_mpi (gcry_mpi_t m)
++{
++  char *buf;
++  gcry_mpi_aprint (GCRYMPI_FMT_HEX, (void *)&buf, NULL, m);
++  return buf;
++}
++
++static void
++gtk_migration_crypt_create_hash (char *display, char *challenge, size_t len, char *result)
++{
++  size_t dlen = strlen (display);
++  gchar *buf = g_malloc (dlen + 1 + len);
++  strcpy (buf, display);
++  memcpy (buf + dlen + 1, challenge, len);
++  gcry_md_hash_buffer (GCRY_MD_SHA1, result, buf, len + dlen + 1);
++  g_free (buf);
++}
++
++static int
++do_encode_md (const unsigned char *digest, size_t digestlen, int algo,
++              unsigned int nbits, gcry_mpi_t *r_val)
++{
++  int nframe = (nbits+7) / 8;
++  unsigned char *frame;
++  int i, n;
++  unsigned char asn[100];
++  size_t asnlen;
++
++  asnlen = sizeof(asn);
++  if (gcry_md_algo_info (algo, GCRYCTL_GET_ASNOID, asn, &asnlen))
++    return -1;
++
++  if (digestlen + asnlen + 4  > nframe )
++    return -1;
++  
++  /* We encode the MD in this way:
++   *
++   *	   0  1 PAD(n bytes)   0  ASN(asnlen bytes)  MD(len bytes)
++   *
++   * PAD consists of FF bytes.
++   */
++  frame = g_malloc (nframe);
++  n = 0;
++  frame[n++] = 0;
++  frame[n++] = 1; /* block type */
++  i = nframe - digestlen - asnlen -3 ;
++  assert ( i > 1 );
++  memset ( frame+n, 0xff, i ); n += i;
++  frame[n++] = 0;
++  memcpy ( frame+n, asn, asnlen ); n += asnlen;
++  memcpy ( frame+n, digest, digestlen ); n += digestlen;
++  assert ( n == nframe );
++      
++  gcry_mpi_scan (r_val, GCRYMPI_FMT_USG, frame, nframe, &nframe);
++  g_free (frame);
++  return 0;
++}
++
++static gboolean
++gtk_migration_crypt_check_signature (struct rsa_key *k, char *hash, char *sigbuf)
++{
++  gcry_mpi_t mpi, mpi2;
++  gcry_sexp_t data, sig, key;
++  int rc;
++
++  do_encode_md (hash, 20, GCRY_MD_SHA1, 1024, &mpi);
++
++  gcry_sexp_build (&data, NULL, "(data (value %m))", mpi);
++  
++  gcry_mpi_release (mpi);
++
++  gcry_sexp_build (&key, NULL, "(public-key (rsa (n %m) (e %m)))", k->n, k->e);
++
++  if (gcry_mpi_scan (&mpi2, GCRYMPI_FMT_HEX, sigbuf, 0, NULL))
++    {
++      gcry_sexp_release (data);
++      return FALSE;
++    }
++
++  gcry_sexp_build (&sig, NULL, "(sig-val (rsa (s %m)))", mpi2);
++
++  rc = gcry_pk_verify (sig, data, key);
++
++  gcry_sexp_release (data);
++  gcry_sexp_release (key);
++  gcry_sexp_release (sig);
++  gcry_mpi_release (mpi2);
++
++  if (rc)
++    return FALSE;
++
++  return TRUE;
++}
++
++static void 
++gtk_migration_auth_update_challenge (void)
++{
++  int i;
++  unsigned char *p;
++
++  if (gtk_migration_auth_challenge_string == NULL)
++    gtk_migration_auth_challenge_string = g_malloc ((CHALLENGE_LEN * 2) + 9);
++
++  p = gtk_migration_auth_challenge_string;
++
++  for (i = 0; i < CHALLENGE_LEN; i++)
++    {
++      *p++ = hexbyte (challenge_bytes[i] >> 4);
++      *p++ = hexbyte (challenge_bytes[i] & 15);
++    }
++  
++  sprintf (p, "%08lx", challenge_seq++);
++}
++
++static void
++gtk_migration_auth_generate_challenge (void)
++{
++  gcry_randomize (challenge_bytes, sizeof (challenge_bytes), GCRY_STRONG_RANDOM);
++  gtk_migration_auth_update_challenge ();
++}
++
++static struct rsa_key *
++parse_pubkey (char *s)
++{
++  struct rsa_key *r;
++  gcry_mpi_t n, e;
++  gchar *sp;
++
++  sp = strtok (s, " \n");
++  gcry_mpi_scan (&e, GCRYMPI_FMT_HEX, sp, 0, NULL);
++  sp = strtok (NULL, " \n");
++  gcry_mpi_scan (&n, GCRYMPI_FMT_HEX, sp, 0, NULL);
++
++  r = g_malloc0 (sizeof (struct rsa_key));
++  r->e = e;
++  r->n = n;
++  return r;
++}
++
++static struct rsa_key *
++lookup_pubkey (u_int32_t id)
++{
++  const gchar *home_dir = g_get_home_dir ();
++  gchar *filename = g_strdup_printf ("%s/.gpe/migrate/public", home_dir);
++  FILE *fp = fopen (filename, "r");
++  struct rsa_key *r = NULL;
++
++  if (fp)
++    {
++      while (!feof (fp))
++	{
++	  char buffer[4096];
++	  if (fgets (buffer, 4096, fp))
++	    {
++	      char *p;
++	      u_int32_t this_id = strtoul (buffer, &p, 16);
++	      if (p != buffer && *p == ' ')
++		{
++#ifdef DEBUG
++		  fprintf (stderr, "found id %x\n", this_id);
++#endif
++		  if (this_id == id)
++		    {
++		      r = parse_pubkey (++p);
++		      break;
++		    }
++		}
++	    }
++	}
++      fclose (fp);
++    }
++
++  g_free (filename);
++  return r;
++}
++
++static void
++free_pubkey (struct rsa_key *k)
++{
++  gcry_mpi_release (k->n);
++  gcry_mpi_release (k->e);
++
++  g_free (k);
++}
++
++static gboolean
++gtk_migration_auth_validate_request (char *display, char *data)
++{
++  u_int32_t key_id;
++  char *ep;
++  char *p;
++  struct rsa_key *k;
++  char hash[20];
++  gboolean rc;
++
++  p = strchr (data, ' ');
++  if (p == NULL)
++    return FALSE;
++  *p++ = 0;
++
++  key_id = strtoul (data, &ep, 16);
++  if (*ep)
++    return FALSE;
++
++  k = lookup_pubkey (key_id);
++  if (k == NULL)
++    return FALSE;
++
++  gtk_migration_crypt_create_hash (display, gtk_migration_auth_challenge_string, 
++			   strlen (gtk_migration_auth_challenge_string), hash);
++
++  rc = gtk_migration_crypt_check_signature (k, hash, p);
++
++  free_pubkey (k);
++
++  return rc;
++}
++
++static int
++do_change_display (GtkWidget *w, char *display_name)
++{
++  GdkDisplay *newdisplay;
++  guint screen_nr = 1;
++  guint i;
++
++  if (display_name[0] == 0)
++    return DISPLAY_CHANGE_INDETERMINATE_ERROR;
++
++  i = strlen (display_name) - 1;
++  while (i > 0 && isdigit (display_name[i]))
++    i--;
++
++  if (display_name[i] == '.')
++    {
++      screen_nr = atoi (display_name + i + 1);
++      display_name[i] = 0;
++    }
++
++  newdisplay = gdk_display_open (display_name);
++  if (newdisplay)
++    {
++      GdkScreen *screen = gdk_display_get_screen (newdisplay, screen_nr);
++      if (screen)
++	{
++	  gtk_window_set_screen (GTK_WINDOW (w), screen);
++	  gdk_display_manager_set_default_display (gdk_display_manager_get (),
++						   newdisplay);
++	  return DISPLAY_CHANGE_SUCCESS;
++	}
++      else
++	return DISPLAY_CHANGE_NO_SUCH_SCREEN;
++    }
++
++  return DISPLAY_CHANGE_UNABLE_TO_CONNECT;
++}
++
++static void
++set_challenge_on_window (GdkWindow *window)
++{
++  gdk_property_change (window, rsa_challenge_gdkatom, string_gdkatom,
++		       8, GDK_PROP_MODE_REPLACE, gtk_migration_auth_challenge_string, 
++		       strlen (gtk_migration_auth_challenge_string));
++}
++
++static void
++update_challenge_on_windows (void)
++{
++  GSList *i;
++
++  gtk_migration_auth_update_challenge ();
++
++  for (i = all_widgets; i; i = i->next)
++    {
++      GtkWidget *w = GTK_WIDGET (i->data);
++      if (w->window)
++	set_challenge_on_window (w->window);
++    }
++}
++
++static void
++reset_state (GdkWindow *window)
++{
++  gdk_property_change (window, display_change_gdkatom, string_gdkatom,
++		       8, GDK_PROP_MODE_REPLACE, NULL, 0);
++}
++
++static void
++generate_response (GdkDisplay *gdisplay, Display *dpy, Window window, int code)
++{
++  XClientMessageEvent ev;
++  Atom atom = gdk_x11_atom_to_xatom_for_display (gdisplay, 
++						 display_change_gdkatom);
++  
++  memset (&ev, 0, sizeof (ev));
++  
++  ev.type = ClientMessage;
++  ev.window = window;
++  ev.message_type = atom;
++  ev.format = 32;
++  
++  ev.data.l[0] = window;
++  ev.data.l[1] = code;
++  
++  XSendEvent (dpy, DefaultRootWindow (dpy), False, SubstructureNotifyMask, (XEvent *)&ev);
++}
++
++static int
++handle_request (GdkWindow *gwindow, char *prop)
++{
++  GtkWidget *widget;
++  char *target, *auth_method, *auth_data;
++  char *p;
++
++  target = prop;
++  auth_method = "NULL";
++  auth_data = NULL;
++
++  p = strchr (prop, ' ');
++  if (p)
++    {
++      *p = 0;
++      auth_method = ++p;
++      
++      p = strchr (p, ' ');
++      if (p)
++	{
++	  *p = 0;
++	  auth_data = ++p;
++	}
++    }
++
++  if (no_auth == FALSE)
++    {
++      if (!strcasecmp (auth_method, "null"))
++	return DISPLAY_CHANGE_AUTHENTICATION_BAD;
++      else if (!strcasecmp (auth_method, "rsa-sig"))
++	{
++	  if (gtk_migration_auth_validate_request (target, auth_data) == FALSE)
++	    return DISPLAY_CHANGE_AUTHENTICATION_BAD;
++	}
++      else
++	return DISPLAY_CHANGE_AUTHENTICATION_BAD;
++    }
++
++  gdk_window_get_user_data (gwindow, (gpointer*) &widget);
++
++  if (widget)
++    return do_change_display (widget, target);
++
++  return DISPLAY_CHANGE_INDETERMINATE_ERROR;
++}
++
++static GdkFilterReturn 
++filter_func (GdkXEvent *xevp, GdkEvent *ev, gpointer p)
++{
++  XPropertyEvent *xev = (XPropertyEvent *)xevp;
++
++  if (xev->type == PropertyNotify)
++    {
++      GdkDisplay *gdisplay;
++      Atom atom;
++
++      gdisplay = gdk_x11_lookup_xdisplay (xev->display);
++      if (gdisplay)
++	{
++	  atom = gdk_x11_atom_to_xatom_for_display (gdisplay, display_change_gdkatom);
++
++	  if (xev->atom == atom)
++	    {
++	      GdkWindow *gwindow;
++	      
++	      gwindow = gdk_window_lookup_for_display (gdisplay, xev->window);
++	      
++	      if (gwindow)
++		{
++		  GdkAtom actual_type;
++		  gint actual_format;
++		  gint actual_length;
++		  unsigned char *prop = NULL;
++		  
++		  if (gdk_property_get (gwindow, display_change_gdkatom, string_gdkatom,
++					0, G_MAXLONG, FALSE, &actual_type, &actual_format,
++					&actual_length, &prop))
++		    {
++		      if (actual_length != 0)
++			{
++			  if (actual_type == string_gdkatom && actual_length > 8)
++			    {
++			      gchar *buf = g_malloc (actual_length + 1);
++			      int rc;
++			      
++			      memcpy (buf, prop, actual_length);
++			      buf[actual_length] = 0;
++			      
++			      rc = handle_request (gwindow, buf);
++			      
++			      g_free (buf);
++			      generate_response (gdisplay, xev->display, xev->window, rc);
++			      
++			      if (rc == DISPLAY_CHANGE_SUCCESS)
++				update_challenge_on_windows ();
++			    }
++			  
++			  reset_state (gwindow);
++			}
++		    }
++		  
++		  if (prop)
++		    g_free (prop);
++		}
++	    }
++	  
++	  return GDK_FILTER_REMOVE;
++	}
++    }
++
++  return GDK_FILTER_CONTINUE;
++}
++
++static void
++unrealize_window (GtkWidget *w)
++{
++  all_widgets = g_slist_remove (all_widgets, w);
++}
++
++void
++gtk_migration_mark_window (GtkWidget *w)
++{
++  if (! gtk_migration_initialised)
++    {
++      g_warning ("gtk_migration not initialised yet");
++      return;
++    }
++
++  if (GTK_WIDGET_REALIZED (w))
++    {
++      GdkWindow *window = w->window;
++      
++      gdk_window_add_filter (window, filter_func, NULL);
++
++      reset_state (window);
++      set_challenge_on_window (window);
++
++      all_widgets = g_slist_append (all_widgets, w);
++
++      g_signal_connect (G_OBJECT (w), "unrealize", G_CALLBACK (unrealize_window), NULL);
++    }
++  else
++    g_signal_connect (G_OBJECT (w), "realize", G_CALLBACK (gtk_migration_mark_window), NULL);
++}
++
++void
++gtk_migration_init (void)
++{
++  if (getenv ("GPE_DISPLAY_MIGRATION_NO_AUTH") != NULL)
++    no_auth = TRUE;
++
++  string_gdkatom = gdk_atom_intern ("STRING", FALSE);
++  display_change_gdkatom = gdk_atom_intern ("_GPE_DISPLAY_CHANGE", FALSE);
++  rsa_challenge_gdkatom = gdk_atom_intern ("_GPE_DISPLAY_CHANGE_RSA_CHALLENGE", FALSE);
++
++  gtk_migration_auth_generate_challenge ();
++
++  gtk_migration_initialised = TRUE;
++}
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/xkb-ifdef.patch b/meta-oe/recipes-gnome/gtk+/gtk+/xkb-ifdef.patch
new file mode 100644
index 0000000000..b74d9c9639
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/xkb-ifdef.patch
@@ -0,0 +1,24 @@
+commit eff1fe2500f07fa2b4683ff52fe92e39e6487b05
+Author: Matthias Clasen <mclasen@redhat.com>
+Date:   Fri May 21 12:13:05 2010 -0400
+
+    Make the !xkb build survive a little longer
+    
+    This fixes bug 619114.
+
+diff --git a/gdk/x11/gdkdisplay-x11.c b/gdk/x11/gdkdisplay-x11.c
+index c0cbc99..6cded79 100644
+--- a/gdk/x11/gdkdisplay-x11.c
++++ b/gdk/x11/gdkdisplay-x11.c
+@@ -690,7 +690,11 @@ gdk_display_beep (GdkDisplay *display)
+ {
+   g_return_if_fail (GDK_IS_DISPLAY (display));
+ 
++#ifdef HAVE_XKB
+   XkbBell (GDK_DISPLAY_XDISPLAY (display), None, 0, None);
++#else
++  XBell (GDK_DISPLAY_XDISPLAY (display), 0);
++#endif
+ }
+ 
+ /**
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+/xsettings.patch b/meta-oe/recipes-gnome/gtk+/gtk+/xsettings.patch
new file mode 100644
index 0000000000..b63e262d34
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+/xsettings.patch
@@ -0,0 +1,16 @@
+--- gtk+-2.4.4/gdk/x11/gdkevents-x11.c.old	Sun Aug 22 17:14:00 2004
++++ gtk+-2.4.4/gdk/x11/gdkevents-x11.c	Sun Aug 22 17:14:00 2004
+@@ -2827,10 +2827,9 @@
+ {
+   GdkScreenX11 *screen = data;
+   
+-  if (xsettings_client_process_event (screen->xsettings_client, (XEvent *)xevent))
+-    return GDK_FILTER_REMOVE;
+-  else
+-    return GDK_FILTER_CONTINUE;
++  xsettings_client_process_event (screen->xsettings_client, (XEvent *)xevent);
++
++  return GDK_FILTER_CONTINUE;
+ }
+ 
+ static void 
diff --git a/meta-oe/recipes-gnome/gtk+/gtk+_2.20.1.bb b/meta-oe/recipes-gnome/gtk+/gtk+_2.20.1.bb
new file mode 100644
index 0000000000..c565514a19
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk+_2.20.1.bb
@@ -0,0 +1,71 @@
+require gtk+.inc
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=3bf50002aefd002f49e7bb854063f7e7 \
+                    file://gtk/gtk.h;endline=27;md5=c59e0b4490dd135a5726ebf851f9b17f \
+                    file://gdk/gdk.h;endline=27;md5=07db285ec208fb3e0bf7d861b0614202 \
+                    file://tests/testgtk.c;endline=27;md5=262db5db5f776f9863e56df31423e24c"
+
+SRC_URI_append_virtclass-native = " file://no-demos.patch \
+"
+SRC_URI_append = "file://gtk-dnd-grab-deadlock-fix.patch \
+		  file://cross-nm.patch \
+		  file://xkb-ifdef.patch \
+		 "
+
+SRC_URI[gtk.md5sum] = "53e6f3a93bd22934878fc4a4a34c68aa"
+SRC_URI[gtk.sha256sum] = "0e081731d21e34ff45c82199490c2889504fa8b3c7e117c043e82ababaec0f65"
+
+PR = "${INC_PR}.4"
+
+BBCLASSEXTEND = "native"
+
+ARM_INSTRUCTION_SET = "arm"
+
+DEPENDS_virtclass-native = "libpng-native atk-native pango-native cairo-native libxrender-native libxext-native libgcrypt-native"
+PROVIDES_virtclass-native = "gdk-pixbuf-csource-native"
+
+# Enable xkb selectively
+XKBTOGGLE = " --disable-xkb"
+XKBTOGGLE_angstrom = ""
+
+EXTRA_OECONF = " --enable-introspection=no --with-libtiff ${XKBTOGGLE} --disable-glibtest gio_can_sniff=yes"
+EXTRA_OECONF_append_virtclass-native = " --without-libtiff --without-libjpeg --disable-cups"
+
+PACKAGES_DYNAMIC = "gtk-module-* gdk-pixbuf-loader-* gtk-immodule-* gtk-printbackend-*"
+
+python populate_packages_prepend () {
+	import os.path
+
+	prologue = bb.data.getVar("postinst_prologue", d, 1)
+
+	gtk_libdir = bb.data.expand('${libdir}/gtk-2.0/${LIBV}', d)
+	loaders_root = os.path.join(gtk_libdir, 'loaders')
+	immodules_root = os.path.join(gtk_libdir, 'immodules')
+	printmodules_root = os.path.join(gtk_libdir, 'printbackends');
+	modules_root = bb.data.expand('${libdir}/gtk-2.0/modules/',d)
+
+	do_split_packages(d, loaders_root, '^libpixbufloader-(.*)\.so$', 'gdk-pixbuf-loader-%s', 'GDK pixbuf loader for %s', prologue + 'gdk-pixbuf-query-loaders > /etc/gtk-2.0/gdk-pixbuf.loaders', extra_depends='')
+	do_split_packages(d, immodules_root, '^im-(.*)\.so$', 'gtk-immodule-%s', 'GTK input module for %s', prologue + 'gtk-query-immodules-2.0 > /etc/gtk-2.0/gtk.immodules', extra_depends='')
+	do_split_packages(d, printmodules_root, '^libprintbackend-(.*)\.so$', 'gtk-printbackend-%s', 'GTK printbackend module for %s', extra_depends='')
+	do_split_packages(d, modules_root, '^lib(.*)\.so$', 'gtk-module-%s', 'GTK module for %s', extra_depends='')
+
+        if (bb.data.getVar('DEBIAN_NAMES', d, 1)):
+                bb.data.setVar('PKG_${PN}', 'libgtk-2.0', d)
+}
+
+# gail is part of gtk+ since gtk+-2.13.0 (targetting >=GNOME 2.23):
+PROVIDES = "virtual/gail"
+RPROVIDES_${PN} = "libgailutil18"
+RCONFLICTS_${PN} = "libgailutil18"
+RREPLACES_${PN} = "libgailutil18"
+RPROVIDES_${PN}-dev = "libgailutil-dev"
+RCONFLICTS_${PN}-dev = "libgailutil-dev"
+RREPLACES_${PN}-dev = "libgailutil-dev"
+RPROVIDES_${PN}-doc = "libgailutil-doc"
+RCONFLICTS_${PN}-doc = "libgailutil-doc"
+RREPLACES_${PN}-doc = "libgailutil-doc"
+RPROVIDES_${PN}-dbg = "libgailutil-dbg"
+RCONFLICTS_${PN}-dbg = "libgailutil-dbg"
+RREPLACES_${PN}-dbg = "libgailutil-dbg"
+# FIXME: replace locales as well
+
diff --git a/meta-oe/recipes-gnome/gtk+/gtk-fpu.inc b/meta-oe/recipes-gnome/gtk+/gtk-fpu.inc
new file mode 100644
index 0000000000..52cdc3b446
--- /dev/null
+++ b/meta-oe/recipes-gnome/gtk+/gtk-fpu.inc
@@ -0,0 +1,6 @@
+
+def get_gtk_fpu_setting(bb, d):
+	if bb.data.getVar('TARGET_FPU', d, 1) in [ 'soft' ]:
+		return "--enable-integer-pixops"
+	return ""
+
diff --git a/meta-oe/recipes-gnome/hicolor-icon-theme/files/index.theme b/meta-oe/recipes-gnome/hicolor-icon-theme/files/index.theme
new file mode 100644
index 0000000000..0471bd53f2
--- /dev/null
+++ b/meta-oe/recipes-gnome/hicolor-icon-theme/files/index.theme
@@ -0,0 +1,1731 @@
+[Icon Theme]
+Name=Hicolor
+Comment=Fallback icon theme
+Hidden=true
+Directories=16x16/actions,16x16/animations,16x16/apps,16x16/categories,16x16/devices,16x16/emblems,16x16/emotes,16x16/filesystems,16x16/intl,16x16/mimetypes,16x16/places,16x16/status,16x16/stock,16x16/stock/chart,16x16/stock/code,16x16/stock/data,16x16/stock/form,16x16/stock/image,16x16/stock/io,16x16/stock/media,16x16/stock/navigation,16x16/stock/net,16x16/stock/object,16x16/stock/table,16x16/stock/text,22x22/actions,22x22/animations,22x22/apps,22x22/categories,22x22/devices,22x22/emblems,22x22/emotes,22x22/filesystems,22x22/intl,22x22/mimetypes,22x22/places,22x22/status,22x22/stock,22x22/stock/chart,22x22/stock/code,22x22/stock/data,22x22/stock/form,22x22/stock/image,22x22/stock/io,22x22/stock/media,22x22/stock/navigation,22x22/stock/net,22x22/stock/object,22x22/stock/table,22x22/stock/text,24x24/actions,24x24/animations,24x24/apps,24x24/categories,24x24/devices,24x24/emblems,24x24/emotes,24x24/filesystems,24x24/intl,24x24/mimetypes,24x24/places,24x24/status,24x24/stock,24x24/stock/chart,24x24/stock/code,24x24/stock/data,24x24/stock/form,24x24/stock/image,24x24/stock/io,24x24/stock/media,24x24/stock/navigation,24x24/stock/net,24x24/stock/object,24x24/stock/table,24x24/stock/text,32x32/actions,32x32/animations,32x32/apps,32x32/categories,32x32/devices,32x32/emblems,32x32/emotes,32x32/filesystems,32x32/intl,32x32/mimetypes,32x32/places,32x32/status,32x32/stock,32x32/stock/chart,32x32/stock/code,32x32/stock/data,32x32/stock/form,32x32/stock/image,32x32/stock/io,32x32/stock/media,32x32/stock/navigation,32x32/stock/net,32x32/stock/object,32x32/stock/table,32x32/stock/text,36x36/actions,36x36/animations,36x36/apps,36x36/categories,36x36/devices,36x36/emblems,36x36/emotes,36x36/filesystems,36x36/intl,36x36/mimetypes,36x36/places,36x36/status,36x36/stock,36x36/stock/chart,36x36/stock/code,36x36/stock/data,36x36/stock/form,36x36/stock/image,36x36/stock/io,36x36/stock/media,36x36/stock/navigation,36x36/stock/net,36x36/stock/object,36x36/stock/table,36x36/stock/text,48x48/actions,48x48/animations,48x48/apps,48x48/categories,48x48/devices,48x48/emblems,48x48/emotes,48x48/filesystems,48x48/intl,48x48/mimetypes,48x48/places,48x48/status,48x48/stock,48x48/stock/chart,48x48/stock/code,48x48/stock/data,48x48/stock/form,48x48/stock/image,48x48/stock/io,48x48/stock/media,48x48/stock/navigation,48x48/stock/net,48x48/stock/object,48x48/stock/table,48x48/stock/text,64x64/actions,64x64/animations,64x64/apps,64x64/categories,64x64/devices,64x64/emblems,64x64/emotes,64x64/filesystems,64x64/intl,64x64/mimetypes,64x64/places,64x64/status,64x64/stock,64x64/stock/chart,64x64/stock/code,64x64/stock/data,64x64/stock/form,64x64/stock/image,64x64/stock/io,64x64/stock/media,64x64/stock/navigation,64x64/stock/net,64x64/stock/object,64x64/stock/table,64x64/stock/text,72x72/actions,72x72/animations,72x72/apps,72x72/categories,72x72/devices,72x72/emblems,72x72/emotes,72x72/filesystems,72x72/intl,72x72/mimetypes,72x72/places,72x72/status,72x72/stock,72x72/stock/chart,72x72/stock/code,72x72/stock/data,72x72/stock/form,72x72/stock/image,72x72/stock/io,72x72/stock/media,72x72/stock/navigation,72x72/stock/net,72x72/stock/object,72x72/stock/table,72x72/stock/text,96x96/actions,96x96/animations,96x96/apps,96x96/categories,96x96/devices,96x96/emblems,96x96/emotes,96x96/filesystems,96x96/intl,96x96/mimetypes,96x96/places,96x96/status,96x96/stock,96x96/stock/chart,96x96/stock/code,96x96/stock/data,96x96/stock/form,96x96/stock/image,96x96/stock/io,96x96/stock/media,96x96/stock/navigation,96x96/stock/net,96x96/stock/object,96x96/stock/table,96x96/stock/text,128x128/actions,128x128/animations,128x128/apps,128x128/categories,128x128/devices,128x128/emblems,128x128/emotes,128x128/filesystems,128x128/intl,128x128/mimetypes,128x128/places,128x128/status,128x128/stock,128x128/stock/chart,128x128/stock/code,128x128/stock/data,128x128/stock/form,128x128/stock/image,128x128/stock/io,128x128/stock/media,128x128/stock/navigation,128x128/stock/net,128x128/stock/object,128x128/stock/table,128x128/stock/text,192x192/actions,192x192/animations,192x192/apps,192x192/categories,192x192/devices,192x192/emblems,192x192/emotes,192x192/filesystems,192x192/intl,192x192/mimetypes,192x192/places,192x192/status,192x192/stock,192x192/stock/chart,192x192/stock/code,192x192/stock/data,192x192/stock/form,192x192/stock/image,192x192/stock/io,192x192/stock/media,192x192/stock/navigation,192x192/stock/net,192x192/stock/object,192x192/stock/table,192x192/stock/text,scalable/actions,scalable/animations,scalable/apps,scalable/categories,scalable/devices,scalable/emblems,scalable/emotes,scalable/filesystems,scalable/intl,scalable/mimetypes,scalable/places,scalable/status,scalable/stock,scalable/stock/chart,scalable/stock/code,scalable/stock/data,scalable/stock/form,scalable/stock/image,scalable/stock/io,scalable/stock/media,scalable/stock/navigation,scalable/stock/net,scalable/stock/object,scalable/stock/table,scalable/stock/text,12x12/apps,12x12/devices,12x12/filesystems,12x12/hildon,12x12/mimetypes,16x16/hildon,26x26/apps,26x26/devices,26x26/filesystems,26x26/hildon,26x26/mimetypes,34x34/apps,34x34/devices,34x34/filesystems,34x34/hildon,34x34/mimetypes,40x40/apps,40x40/devices,40x40/filesystems,40x40/hildon,40x40/mimetypes,50x50/apps,50x50/devices,50x50/filesystems,50x50/hildon,50x50/mimetypes,250x250/apps,250x250/devices,250x250/filesystems,250x250/hildon,250x250/mimetypes,scalable/hildon
+
+[12x12/apps]
+Size=12
+Context=Applications
+Type=Threshold
+
+[12x12/devices]
+Size=12
+Context=Devices
+Type=Threshold
+
+[12x12/filesystems]
+Size=12
+Context=FileSystems
+Type=Threshold
+
+[12x12/hildon]
+Size=12
+Context=hildon
+Type=Threshold
+
+[12x12/mimetypes]
+Size=12
+Context=MimeTypes
+Type=Threshold
+
+[16x16/actions]
+Size=16
+Context=Actions
+Type=Threshold
+
+[16x16/animations]
+Size=16
+Context=Animations
+Type=Threshold
+
+[16x16/apps]
+Size=16
+Context=Applications
+Type=Threshold
+
+[16x16/categories]
+Size=16
+Context=Categories
+Type=Threshold
+
+[16x16/devices]
+Size=16
+Context=Devices
+Type=Threshold
+
+[16x16/emblems]
+Size=16
+Context=Emblems
+Type=Threshold
+
+[16x16/emotes]
+Size=16
+Context=Emotes
+Type=Threshold
+
+[16x16/filesystems]
+Size=16
+Context=FileSystems
+Type=Threshold
+
+[16x16/hildon]
+Size=16
+Context=hildon
+Type=Threshold
+
+[16x16/intl]
+Size=16
+Context=International
+Type=Threshold
+
+[16x16/mimetypes]
+Size=16
+Context=MimeTypes
+Type=Threshold
+
+[16x16/places]
+Size=16
+Context=Places
+Type=Threshold
+
+[16x16/status]
+Size=16
+Context=Status
+Type=Threshold
+
+[16x16/stock/chart]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/code]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/data]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/form]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/image]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/io]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/media]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/navigation]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/net]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/object]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/table]
+Size=16
+Context=Stock
+Type=Threshold
+
+[16x16/stock/text]
+Size=16
+Context=Stock
+Type=Threshold
+
+[22x22/actions]
+Size=22
+Context=Actions
+Type=Threshold
+
+[22x22/animations]
+Size=22
+Context=Animations
+Type=Threshold
+
+[22x22/apps]
+Size=22
+Context=Applications
+Type=Fixed
+
+[22x22/categories]
+Size=22
+Context=Categories
+Type=Threshold
+
+[22x22/devices]
+Size=22
+Context=Devices
+Type=Threshold
+
+[22x22/emblems]
+Size=22
+Context=Emblems
+Type=Threshold
+
+[22x22/emotes]
+Size=22
+Context=Emotes
+Type=Threshold
+
+[22x22/filesystems]
+Size=22
+Context=FileSystems
+Type=Threshold
+
+[22x22/intl]
+Size=22
+Context=International
+Type=Threshold
+
+[22x22/mimetypes]
+Size=22
+Context=MimeTypes
+Type=Threshold
+
+[22x22/places]
+Size=22
+Context=Places
+Type=Threshold
+
+[22x22/status]
+Size=22
+Context=Status
+Type=Threshold
+
+[22x22/stock/chart]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/code]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/data]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/form]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/image]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/io]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/media]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/navigation]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/net]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/object]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/table]
+Size=22
+Context=Stock
+Type=Threshold
+
+[22x22/stock/text]
+Size=22
+Context=Stock
+Type=Threshold
+
+[24x24/actions]
+Size=24
+Context=Actions
+Type=Threshold
+
+[24x24/animations]
+Size=24
+Context=Animations
+Type=Threshold
+
+[24x24/apps]
+Size=24
+Context=Applications
+Type=Threshold
+
+[24x24/categories]
+Size=24
+Context=Categories
+Type=Threshold
+
+[24x24/devices]
+Size=24
+Context=Devices
+Type=Threshold
+
+[24x24/emblems]
+Size=24
+Context=Emblems
+Type=Threshold
+
+[24x24/emotes]
+Size=24
+Context=Emotes
+Type=Threshold
+
+[24x24/filesystems]
+Size=24
+Context=FileSystems
+Type=Threshold
+
+[24x24/intl]
+Size=24
+Context=International
+Type=Threshold
+
+[24x24/mimetypes]
+Size=24
+Context=MimeTypes
+Type=Threshold
+
+[24x24/places]
+Size=24
+Context=Places
+Type=Threshold
+
+[24x24/status]
+Size=24
+Context=Status
+Type=Threshold
+
+[24x24/stock/chart]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/code]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/data]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/form]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/image]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/io]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/media]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/navigation]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/net]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/object]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/table]
+Size=24
+Context=Stock
+Type=Threshold
+
+[24x24/stock/text]
+Size=24
+Context=Stock
+Type=Threshold
+
+[26x26/apps]
+Size=26
+Context=Applications
+Type=Threshold
+
+[26x26/devices]
+Size=26
+Context=Devices
+Type=Threshold
+
+[26x26/filesystems]
+Size=26
+Context=FileSystems
+Type=Threshold
+
+[26x26/hildon]
+Size=26
+Context=hildon
+Type=Threshold
+
+[26x26/mimetypes]
+Size=26
+Context=MimeTypes
+Type=Threshold
+
+[32x32/actions]
+Size=32
+Context=Actions
+Type=Threshold
+
+[32x32/animations]
+Size=32
+Context=Animations
+Type=Threshold
+
+[32x32/apps]
+Size=32
+Context=Applications
+Type=Threshold
+
+[32x32/categories]
+Size=32
+Context=Categories
+Type=Threshold
+
+[32x32/devices]
+Size=32
+Context=Devices
+Type=Threshold
+
+[32x32/emblems]
+Size=32
+Context=Emblems
+Type=Threshold
+
+[32x32/emotes]
+Size=32
+Context=Emotes
+Type=Threshold
+
+[32x32/filesystems]
+Size=32
+Context=FileSystems
+Type=Threshold
+
+[32x32/intl]
+Size=32
+Context=International
+Type=Threshold
+
+[32x32/mimetypes]
+Size=32
+Context=MimeTypes
+Type=Threshold
+
+[32x32/places]
+Size=32
+Context=Places
+Type=Threshold
+
+[32x32/status]
+Size=32
+Context=Status
+Type=Threshold
+
+[32x32/stock/chart]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/code]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/data]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/form]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/image]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/io]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/media]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/navigation]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/net]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/object]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/table]
+Size=32
+Context=Stock
+Type=Threshold
+
+[32x32/stock/text]
+Size=32
+Context=Stock
+Type=Threshold
+
+[34x34/apps]
+Size=34
+Context=Applications
+Type=Threshold
+
+[34x34/devices]
+Size=34
+Context=Devices
+Type=Threshold
+
+[34x34/filesystems]
+Size=34
+Context=FileSystems
+Type=Threshold
+
+[34x34/hildon]
+Size=34
+Context=hildon
+Type=Threshold
+
+[34x34/mimetypes]
+Size=34
+Context=MimeTypes
+Type=Threshold
+
+[36x36/actions]
+Size=36
+Context=Actions
+Type=Threshold
+
+[36x36/animations]
+Size=36
+Context=Animations
+Type=Threshold
+
+[36x36/apps]
+Size=36
+Context=Applications
+Type=Threshold
+
+[36x36/categories]
+Size=36
+Context=Categories
+Type=Threshold
+
+[36x36/devices]
+Size=36
+Context=Devices
+Type=Threshold
+
+[36x36/emblems]
+Size=36
+Context=Emblems
+Type=Threshold
+
+[36x36/emotes]
+Size=36
+Context=Emotes
+Type=Threshold
+
+[36x36/filesystems]
+Size=36
+Context=FileSystems
+Type=Threshold
+
+[36x36/intl]
+Size=36
+Context=International
+Type=Threshold
+
+[36x36/mimetypes]
+Size=36
+Context=MimeTypes
+Type=Threshold
+
+[36x36/places]
+Size=36
+Context=Places
+Type=Threshold
+
+[36x36/status]
+Size=36
+Context=Status
+Type=Threshold
+
+[36x36/stock/chart]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/code]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/data]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/form]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/image]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/io]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/media]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/navigation]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/net]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/object]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/table]
+Size=36
+Context=Stock
+Type=Threshold
+
+[36x36/stock/text]
+Size=36
+Context=Stock
+Type=Threshold
+
+[40x40/apps]
+Size=40
+Context=Applications
+Type=Threshold
+
+[40x40/devices]
+Size=40
+Context=Devices
+Type=Threshold
+
+[40x40/filesystems]
+Size=40
+Context=FileSystems
+Type=Threshold
+
+[40x40/hildon]
+Size=40
+Context=hildon
+Type=Threshold
+
+[40x40/mimetypes]
+Size=40
+Context=MimeTypes
+Type=Threshold
+
+[48x48/actions]
+Size=48
+Context=Actions
+Type=Threshold
+
+[48x48/animations]
+Size=48
+Context=Animations
+Type=Threshold
+
+[48x48/apps]
+Size=48
+Context=Applications
+Type=Threshold
+
+[48x48/categories]
+Size=48
+Context=Categories
+Type=Threshold
+
+[48x48/devices]
+Size=48
+Context=Devices
+Type=Threshold
+
+[48x48/emblems]
+Size=48
+Context=Emblems
+Type=Threshold
+
+[48x48/emotes]
+Size=48
+Context=Emotes
+Type=Threshold
+
+[48x48/filesystems]
+Size=48
+Context=FileSystems
+Type=Threshold
+
+[48x48/intl]
+Size=48
+Context=International
+Type=Threshold
+
+[48x48/mimetypes]
+Size=48
+Context=MimeTypes
+Type=Threshold
+
+[48x48/places]
+Size=48
+Context=Places
+Type=Threshold
+
+[48x48/status]
+Size=48
+Context=Status
+Type=Threshold
+
+[48x48/stock/chart]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/code]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/data]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/form]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/image]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/io]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/media]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/navigation]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/net]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/object]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/table]
+Size=48
+Context=Stock
+Type=Threshold
+
+[48x48/stock/text]
+Size=48
+Context=Stock
+Type=Threshold
+
+[50x50/apps]
+Size=50
+Context=Applications
+Type=Threshold
+
+[50x50/devices]
+Size=50
+Context=Devices
+Type=Threshold
+
+[50x50/filesystems]
+Size=50
+Context=FileSystems
+Type=Threshold
+
+[50x50/hildon]
+Size=50
+Context=hildon
+Type=Threshold
+
+[50x50/mimetypes]
+Size=50
+Context=MimeTypes
+Type=Threshold
+
+[64x64/actions]
+Size=64
+Context=Actions
+Type=Threshold
+
+[64x64/animations]
+Size=64
+Context=Animations
+Type=Threshold
+
+[64x64/apps]
+Size=64
+Context=Applications
+Type=Threshold
+
+[64x64/categories]
+Size=64
+Context=Categories
+Type=Threshold
+
+[64x64/devices]
+Size=64
+Context=Devices
+Type=Threshold
+
+[64x64/emblems]
+Size=64
+Context=Emblems
+Type=Threshold
+
+[64x64/emotes]
+Size=64
+Context=Emotes
+Type=Threshold
+
+[64x64/filesystems]
+Size=64
+Context=FileSystems
+Type=Threshold
+
+[64x64/intl]
+Size=64
+Context=International
+Type=Threshold
+
+[64x64/mimetypes]
+Size=64
+Context=MimeTypes
+Type=Threshold
+
+[64x64/places]
+Size=64
+Context=Places
+Type=Threshold
+
+[64x64/status]
+Size=64
+Context=Status
+Type=Threshold
+
+[64x64/stock/chart]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/code]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/data]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/form]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/image]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/io]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/media]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/navigation]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/net]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/object]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/table]
+Size=64
+Context=Stock
+Type=Threshold
+
+[64x64/stock/text]
+Size=64
+Context=Stock
+Type=Threshold
+[72x72/actions]
+Size=72
+Context=Actions
+Type=Threshold
+
+[72x72/animations]
+Size=72
+Context=Animations
+Type=Threshold
+
+[72x72/apps]
+Size=72
+Context=Applications
+Type=Threshold
+
+[72x72/categories]
+Size=72
+Context=Categories
+Type=Threshold
+
+[72x72/devices]
+Size=72
+Context=Devices
+Type=Threshold
+
+[72x72/emblems]
+Size=72
+Context=Emblems
+Type=Threshold
+
+[72x72/emotes]
+Size=72
+Context=Emotes
+Type=Threshold
+
+[72x72/filesystems]
+Size=72
+Context=FileSystems
+Type=Threshold
+
+[72x72/intl]
+Size=72
+Context=International
+Type=Threshold
+
+[72x72/mimetypes]
+Size=72
+Context=MimeTypes
+Type=Threshold
+
+[72x72/places]
+Size=72
+Context=Places
+Type=Threshold
+
+[72x72/status]
+Size=72
+Context=Status
+Type=Threshold
+
+[72x72/stock/chart]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/code]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/data]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/form]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/image]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/io]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/media]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/navigation]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/net]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/object]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/table]
+Size=72
+Context=Stock
+Type=Threshold
+
+[72x72/stock/text]
+Size=72
+Context=Stock
+Type=Threshold
+
+[96x96/actions]
+Size=96
+Context=Actions
+Type=Threshold
+
+[96x96/animations]
+Size=96
+Context=Animations
+Type=Threshold
+
+[96x96/apps]
+Size=96
+Context=Applications
+Type=Threshold
+
+[96x96/categories]
+Size=96
+Context=Categories
+Type=Threshold
+
+[96x96/devices]
+Size=96
+Context=Devices
+Type=Threshold
+
+[96x96/emblems]
+Size=96
+Context=Emblems
+Type=Threshold
+
+[96x96/emotes]
+Size=96
+Context=Emotes
+Type=Threshold
+
+[96x96/filesystems]
+Size=96
+Context=FileSystems
+Type=Threshold
+
+[96x96/intl]
+Size=96
+Context=International
+Type=Threshold
+
+[96x96/mimetypes]
+Size=96
+Context=MimeTypes
+Type=Threshold
+
+[96x96/places]
+Size=96
+Context=Places
+Type=Threshold
+
+[96x96/status]
+Size=96
+Context=Status
+Type=Threshold
+
+[96x96/stock/chart]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/code]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/data]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/form]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/image]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/io]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/media]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/navigation]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/net]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/object]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/table]
+Size=96
+Context=Stock
+Type=Threshold
+
+[96x96/stock/text]
+Size=96
+Context=Stock
+Type=Threshold
+
+[128x128/actions]
+Size=128
+Context=Actions
+Type=Threshold
+
+[128x128/animations]
+Size=128
+Context=Animations
+Type=Threshold
+
+[128x128/apps]
+Size=128
+Context=Applications
+Type=Threshold
+
+[128x128/categories]
+Size=128
+Context=Categories
+Type=Threshold
+
+[128x128/devices]
+Size=128
+Context=Devices
+Type=Threshold
+
+[128x128/emblems]
+Size=128
+Context=Emblems
+Type=Threshold
+
+[128x128/emotes]
+Size=128
+Context=Emotes
+Type=Threshold
+
+[128x128/filesystems]
+Size=128
+Context=FileSystems
+Type=Threshold
+
+[128x128/intl]
+Size=128
+Context=International
+Type=Threshold
+
+[128x128/mimetypes]
+Size=128
+Context=MimeTypes
+Type=Threshold
+
+[128x128/places]
+Size=128
+Context=Places
+Type=Threshold
+
+[128x128/status]
+Size=128
+Context=Status
+Type=Threshold
+
+[128x128/stock/chart]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/code]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/data]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/form]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/image]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/io]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/media]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/navigation]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/net]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/object]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/table]
+Size=128
+Context=Stock
+Type=Threshold
+
+[128x128/stock/text]
+Size=128
+Context=Stock
+Type=Threshold
+
+[192x192/actions]
+Size=192
+Context=Actions
+Type=Threshold
+
+[192x192/animations]
+Size=192
+Context=Animations
+Type=Threshold
+
+[192x192/apps]
+Size=192
+Context=Applications
+Type=Threshold
+
+[192x192/categories]
+Size=192
+Context=Categories
+Type=Threshold
+
+[192x192/devices]
+Size=192
+Context=Devices
+Type=Threshold
+
+[192x192/emblems]
+Size=192
+Context=Emblems
+Type=Threshold
+
+[192x192/emotes]
+Size=192
+Context=Emotes
+Type=Threshold
+
+[192x192/filesystems]
+Size=192
+Context=FileSystems
+Type=Threshold
+
+[192x192/intl]
+Size=192
+Context=International
+Type=Threshold
+
+[192x192/mimetypes]
+Size=192
+Context=MimeTypes
+Type=Threshold
+
+[192x192/places]
+Size=192
+Context=Places
+Type=Threshold
+
+[192x192/status]
+Size=192
+Context=Status
+Type=Threshold
+
+[192x192/stock/chart]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/code]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/data]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/form]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/image]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/io]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/media]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/navigation]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/net]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/object]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/table]
+Size=192
+Context=Stock
+Type=Threshold
+
+[192x192/stock/text]
+Size=192
+Context=Stock
+Type=Threshold
+
+[250x250/apps]
+Size=250
+Context=Applications
+Type=Threshold
+
+[250x250/devices]
+Size=250
+Context=Devices
+Type=Threshold
+
+[250x250/filesystems]
+Size=250
+Context=FileSystems
+Type=Threshold
+
+[250x250/hildon]
+Size=250
+Context=hildon
+Type=Threshold
+
+[250x250/mimetypes]
+Size=250
+Context=MimeTypes
+Type=Threshold
+
+[scalable/actions]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Actions
+Type=Scalable
+
+[scalable/animations]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Animations
+Type=Scalable
+
+[scalable/apps]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Applications
+Type=Scalable
+
+[scalable/categories]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Categories
+Type=Scalable
+
+[scalable/devices]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Devices
+Type=Scalable
+
+[scalable/emblems]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Emblems
+Type=Scalable
+
+[scalable/emotes]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Emotes
+Type=Scalable
+
+[scalable/filesystems]
+MinSize=1
+Size=128
+MaxSize=256
+Context=FileSystems
+Type=Scalable
+
+[scalable/hildon]
+MinSize=1
+Size=128
+MaxSize=256
+Context=hildon
+Type=Scalable
+
+[scalable/intl]
+MinSize=1
+Size=128
+MaxSize=256
+Context=International
+Type=Scalable
+
+[scalable/mimetypes]
+MinSize=1
+Size=128
+MaxSize=256
+Context=MimeTypes
+Type=Scalable
+
+[scalable/places]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Places
+Type=Scalable
+
+[scalable/status]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Status
+Type=Scalable
+
+[scalable/stock/chart]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/code]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/data]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/form]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/image]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/io]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/media]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/navigation]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/net]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/object]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/table]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[scalable/stock/text]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
+
+[12x12/stock]
+Size=12
+Context=Stock
+Type=Threshold
+
+[16x16/stock]
+Size=16
+Context=Stock
+Type=Threshold
+
+[22x22/stock]
+Size=22
+Context=Stock
+Type=Threshold
+
+[24x24/stock]
+Size=24
+Context=Stock
+Type=Threshold
+
+[26x26/stock]
+Size=26
+Context=Stock
+Type=Threshold
+
+[32x32/stock]
+Size=32
+Context=Stock
+Type=Threshold
+
+[34x34/stock]
+Size=34
+Context=Stock
+Type=Threshold
+
+[36x36/stock]
+Size=36
+Context=Stock
+Type=Threshold
+
+[48x48/stock]
+Size=48
+Context=Stock
+Type=Threshold
+
+[64x64/stock]
+Size=64
+Context=Stock
+Type=Threshold
+
+[72x72/stock]
+Size=72
+Context=Stock
+Type=Threshold
+
+[96x96/stock]
+Size=96
+Context=Stock
+Type=Threshold
+
+[128x128/stock]
+Size=128
+Context=Stock
+Type=Threshold
+
+[192x192/stock]
+Size=192
+Context=Stock
+Type=Threshold
+
+[scalable/stock]
+MinSize=1
+Size=128
+MaxSize=256
+Context=Stock
+Type=Scalable
diff --git a/meta-oe/recipes-gnome/hicolor-icon-theme/hicolor-icon-theme_0.12.bb b/meta-oe/recipes-gnome/hicolor-icon-theme/hicolor-icon-theme_0.12.bb
new file mode 100644
index 0000000000..1934cdb503
--- /dev/null
+++ b/meta-oe/recipes-gnome/hicolor-icon-theme/hicolor-icon-theme_0.12.bb
@@ -0,0 +1,22 @@
+DESCRIPTION = "default icon theme that all icon themes automatically inherit from."
+HOMEPAGE = "http://icon-theme.freedesktop.org/wiki/HicolorTheme"
+BUGTRACKER = "https://bugs.freedesktop.org/"
+
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=f08a446809913fc9b3c718f0eaea0426"
+
+SECTION = "unknown"
+inherit gnome
+
+PR = "r0"
+
+SRC_URI = "http://icon-theme.freedesktop.org/releases/${BPN}-${PV}.tar.gz \
+        file://index.theme"
+
+PACKAGE_ARCH = "all"
+
+FILES_${PN} += "${datadir}/icons"
+
+do_install_append () {
+	install -m 0644 ${WORKDIR}/index.theme ${D}/${datadir}/icons/hicolor
+}
diff --git a/meta-oe/recipes-gnome/libidl/libidl-native_0.8.13.bb b/meta-oe/recipes-gnome/libidl/libidl-native_0.8.13.bb
new file mode 100644
index 0000000000..834f4af426
--- /dev/null
+++ b/meta-oe/recipes-gnome/libidl/libidl-native_0.8.13.bb
@@ -0,0 +1,10 @@
+SECTION = "libs"
+require libidl_${PV}.bb
+inherit native
+
+PR = "r1"
+
+DEPENDS = "bison-native glib-2.0-native"
+
+SRC_URI[md5sum] = "b43b289a859eb38a710f70622c46e571"
+SRC_URI[sha256sum] = "bccc7e10dae979518ff012f8464e47ec4b3558a5456a94c8679653aa0b262b71"
diff --git a/meta-oe/recipes-gnome/libidl/libidl.inc b/meta-oe/recipes-gnome/libidl/libidl.inc
new file mode 100644
index 0000000000..7a90a7044d
--- /dev/null
+++ b/meta-oe/recipes-gnome/libidl/libidl.inc
@@ -0,0 +1,12 @@
+DESCRIPTION = "Library for parsing CORBA IDL files"
+SECTION = "x11/gnome/libs"
+LICENSE = "LGPL"
+
+inherit autotools pkgconfig
+
+SRC_URI = "http://ftp.gnome.org/pub/GNOME/sources/libIDL/0.8/libIDL-${PV}.tar.bz2"
+
+S = "${WORKDIR}/libIDL-${PV}"
+
+FILES_${PN} = "${libdir}/*.so.*"
+FILES_${PN}-dev += " ${bindir}"
diff --git a/meta-oe/recipes-gnome/libidl/libidl_0.8.13.bb b/meta-oe/recipes-gnome/libidl/libidl_0.8.13.bb
new file mode 100644
index 0000000000..732178d037
--- /dev/null
+++ b/meta-oe/recipes-gnome/libidl/libidl_0.8.13.bb
@@ -0,0 +1,13 @@
+require libidl.inc
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=55ca817ccb7d5b5b66355690e9abc605"
+
+DEPENDS = "glib-2.0 flex-native libidl-native"
+
+PR = "r0"
+
+BINCONFIG_GLOB = "*-config-2"
+inherit autotools pkgconfig binconfig
+
+SRC_URI[md5sum] = "b43b289a859eb38a710f70622c46e571"
+SRC_URI[sha256sum] = "bccc7e10dae979518ff012f8464e47ec4b3558a5456a94c8679653aa0b262b71"
diff --git a/meta-oe/recipes-gnome/policykit/policykit-gnome_0.96.bb b/meta-oe/recipes-gnome/policykit/policykit-gnome_0.96.bb
new file mode 100644
index 0000000000..8720ea9fec
--- /dev/null
+++ b/meta-oe/recipes-gnome/policykit/policykit-gnome_0.96.bb
@@ -0,0 +1,25 @@
+HOMEPAGE = "http://www.packagekit.org/"
+DEPENDS = "policykit libgnome"
+LICENSE = "LGPLv2"
+
+PR = "r1"
+
+SRC_URI = "http://hal.freedesktop.org/releases/polkit-gnome-${PV}.tar.bz2;name=polkitgnome"
+SRC_URI[polkitgnome.md5sum] = "611cf39fba2945320fc7a9ec49087e69"
+SRC_URI[polkitgnome.sha256sum] = "0d96c8032d658a2e1eef8adfbeafff0f569ef0cf68b35915423acc00873c8a92"
+
+EXTRA_OECONF = " --disable-scrollkeeper \
+                 --disable-man-pages \
+                 --disable-examples \
+                 --disable-gtk-doc \
+                 --enable-introspection=no \
+"
+
+S = "${WORKDIR}/polkit-gnome-${PV}"
+
+inherit autotools pkgconfig
+
+FILES_${PN} += " ${datadir}/dbus-1 \
+                 ${datadir}/PolicyKit \
+               "
+
diff --git a/meta-oe/recipes-gnome/policykit/policykit_0.96.bb b/meta-oe/recipes-gnome/policykit/policykit_0.96.bb
new file mode 100644
index 0000000000..98c0dd0d26
--- /dev/null
+++ b/meta-oe/recipes-gnome/policykit/policykit_0.96.bb
@@ -0,0 +1,67 @@
+HOMEPAGE = "http://www.packagekit.org/"
+DEPENDS = "eggdbus libpam expat dbus-glib intltool-native"
+LICENSE = "LGPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=155db86cdbafa7532b41f390409283eb"
+
+PR = "r2"
+
+SRC_URI = "http://hal.freedesktop.org/releases/polkit-${PV}.tar.gz;name=polkit \
+          "
+
+SRC_URI[polkit.md5sum] = "e0a06da501b04ed3bab986a9df5b5aa2"
+SRC_URI[polkit.sha256sum] = "3426ca917210b2a5525732559368c18f983a4c39a6a55c5dddba26071bd8054a"
+
+EXTRA_OECONF = "--with-authfw=pam \
+                --with-os-type=${DISTRO} \
+                --disable-man-pages \
+                --disable-gtk-doc \
+                --enable-introspection=no \
+"
+
+S = "${WORKDIR}/polkit-${PV}"
+
+inherit autotools pkgconfig
+
+do_install_append () {
+	install -d ${D}${localstatedir}/run/PolicyKit
+	sed -i -e s:system:common:g ${D}${sysconfdir}/pam.d/*
+}
+
+FILES_${PN} += " ${datadir}/dbus-1 \
+                 ${datadir}/PolicyKit ${datadir}/polkit-1\
+                 ${localstatedir}/run/PolicyKit \
+                 ${libdir}/polkit-1/extensions/*.so \
+"
+
+FILES_${PN}-dev += " ${libdir}/polkit-1/extensions/*a"
+
+pkg_postinst_${PN} () {
+    # can't do this offline
+    if [ "x$D" != "x" ]; then
+        exit 1
+    fi
+    grep "^polkituser:" /etc/group > /dev/null || addgroup polkituser
+    grep "^polkituser:" /etc/passwd > /dev/null || adduser --disabled-password --system --home /var/run/polkit polkituser --ingroup polkituser -g polkituser 
+
+	# Fix owners
+	for i in /etc/polkit-1/localauthority /var/lib/polkit-1 ; do
+		mkdir -p $i
+		chown root $i
+		chmod 700 $i
+	done
+
+	for i in /usr/libexec/polkit-agent-helper-1 /usr/bin/pkexec ; do
+		chown root $i
+		chmod 4755 $i
+	done
+
+	DBUSPID=`pidof dbus-daemon`
+    if [ "x$DBUSPID" != "x" ]; then
+        /etc/init.d/dbus-1 force-reload
+    fi
+}
+
+pkg_postrm_${PN} () {
+    deluser polkituser || true
+    delgroup polkituser || true
+}
diff --git a/meta-oe/recipes-graphics/cairo/cairo-fpu.inc b/meta-oe/recipes-graphics/cairo/cairo-fpu.inc
new file mode 100644
index 0000000000..bdaf789799
--- /dev/null
+++ b/meta-oe/recipes-graphics/cairo/cairo-fpu.inc
@@ -0,0 +1,6 @@
+
+def get_cairo_fpu_setting(bb, d):
+	if bb.data.getVar('TARGET_FPU', d, 1) in [ 'soft' ]:
+		return "--disable-some-floating-point"
+	return ""
+
diff --git a/meta-oe/recipes-graphics/cairo/cairo.inc b/meta-oe/recipes-graphics/cairo/cairo.inc
new file mode 100644
index 0000000000..42774e05be
--- /dev/null
+++ b/meta-oe/recipes-graphics/cairo/cairo.inc
@@ -0,0 +1,20 @@
+SECTION = "libs"
+PRIORITY = "optional"
+DEPENDS = "virtual/libx11 pixman libsm libpng fontconfig libxrender glib-2.0"
+DESCRIPTION = "Cairo graphics library"
+LICENSE = "MPL LGPL"
+
+#check for TARGET_FPU=soft and inform configure of the result so it can disable some floating points 
+require cairo-fpu.inc
+EXTRA_OECONF += "${@get_cairo_fpu_setting(bb, d)}"
+
+inherit autotools pkgconfig 
+
+BBCLASSEXTEND = "native"
+
+PACKAGES =+ "cairo-trace cairo-trace-dev libcairo-script-interpreter libcairo-gobject"
+FILES_libcairo-gobject = "${libdir}/libcairo-gobject.so.*"
+FILES_libcairo-script-interpreter = "${libdir}/libcairo-script-interpreter.so.*"
+FILES_cairo-trace = "${bindir}/*trace ${libdir}/cairo/libcairo-trace.so.*"
+FILES_cairo-trace-dev = "${libdir}/cairo/*"
+
diff --git a/meta-oe/recipes-graphics/cairo/cairo_1.10.0.bb b/meta-oe/recipes-graphics/cairo/cairo_1.10.0.bb
new file mode 100644
index 0000000000..dccb726edb
--- /dev/null
+++ b/meta-oe/recipes-graphics/cairo/cairo_1.10.0.bb
@@ -0,0 +1,12 @@
+require cairo.inc
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=e73e999e0c72b5ac9012424fa157ad77"
+
+PR = "r1"
+
+SRC_URI = "http://cairographics.org/releases/cairo-${PV}.tar.gz;name=cairo \
+"
+
+SRC_URI[cairo.md5sum] = "70a2ece66cf473d976e2db0f75bf199e"
+SRC_URI[cairo.sha256sum] = "0f2ce4cc4615594088d74eb8b5360bad7c3cc3c3da9b61af9bfd979ed1ed94b2"
+
diff --git a/meta-oe/recipes-graphics/font-update-common/font-update-common/update-fonts b/meta-oe/recipes-graphics/font-update-common/font-update-common/update-fonts
new file mode 100644
index 0000000000..19e3157d2f
--- /dev/null
+++ b/meta-oe/recipes-graphics/font-update-common/font-update-common/update-fonts
@@ -0,0 +1,4 @@
+#!/bin/sh
+#Author: Rolf Leggewie
+
+run-parts /etc/update-fonts-common.d/
diff --git a/meta-oe/recipes-graphics/font-update-common/font-update-common_0.1.bb b/meta-oe/recipes-graphics/font-update-common/font-update-common_0.1.bb
new file mode 100644
index 0000000000..4a4c714ecb
--- /dev/null
+++ b/meta-oe/recipes-graphics/font-update-common/font-update-common_0.1.bb
@@ -0,0 +1,16 @@
+DESCRIPTION = "Scripts to be called when fonts are installed or removed \
+to make them known to the WM, whether X11 or Opie"
+AUTHOR = "Rolf Leggewie <oe-devel@rolf.leggewie.biz"
+
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${POKYBASE}/LICENSE;md5=3f40d7994397109285ec7b81fdeb3b58"
+
+SRC_URI = "file://update-fonts"
+
+do_install() {
+        install -d ${D}${bindir}
+        install -d ${D}${sysconfdir}/update-fonts-common.d/
+        install -m 0755 ${WORKDIR}/update-fonts ${D}${bindir}
+}
+
+PACKAGE_ARCH = "all"
diff --git a/meta-oe/recipes-graphics/jasper/jasper_1.900.1.bb b/meta-oe/recipes-graphics/jasper/jasper_1.900.1.bb
new file mode 100644
index 0000000000..ef9ca6fb40
--- /dev/null
+++ b/meta-oe/recipes-graphics/jasper/jasper_1.900.1.bb
@@ -0,0 +1,14 @@
+DESCRIPTION = "Jpeg 2000 implementation"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=baa697d7510288a9cdcce9bd7edaf9bc"
+
+PR = "r1"
+
+SRC_URI = "http://www.ece.uvic.ca/~mdadams/jasper/software/jasper-${PV}.zip"
+
+inherit autotools lib_package
+
+EXTRA_OECONF = "--enable-shared"
+
+SRC_URI[md5sum] = "a342b2b4495b3e1394e161eb5d85d754"
+SRC_URI[sha256sum] = "6b905a9c2aca2e275544212666eefc4eb44d95d0a57e4305457b407fe63f9494"
diff --git a/meta-oe/recipes-graphics/pango/pango-1.28.3/no-tests.patch b/meta-oe/recipes-graphics/pango/pango-1.28.3/no-tests.patch
new file mode 100644
index 0000000000..dafcb20c3b
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pango-1.28.3/no-tests.patch
@@ -0,0 +1,10 @@
+--- /tmp/Makefile.am	2007-03-01 13:29:37.000000000 +0100
++++ pango-1.16.0/Makefile.am	2007-03-01 13:29:52.545251000 +0100
+@@ -1,6 +1,6 @@
+ ## Process this file with automake to create Makefile.in.
+ 
+-SUBDIRS= pango modules pango-view examples docs tools tests
++SUBDIRS= pango modules pango-view examples docs tools 
+ 
+ EXTRA_DIST = 			\
+ 	autogen.sh		\
diff --git a/meta-oe/recipes-graphics/pango/pango.inc b/meta-oe/recipes-graphics/pango/pango.inc
new file mode 100644
index 0000000000..b09869135e
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pango.inc
@@ -0,0 +1,53 @@
+DESCRIPTION = "The goal of the Pango project is to provide an \
+Open Source framework for the layout and rendering of \
+internationalized text."
+LICENSE = "LGPL"
+
+inherit gnome
+EXTRA_AUTORECONF = ""
+
+SECTION = "x11/libs"
+
+DEPENDS = "glib-2.0 fontconfig freetype zlib virtual/libiconv virtual/libx11 libxft gtk-doc cairo"
+
+DEPENDS_virtclass-native = "glib-2.0-native cairo-native"
+BBCLASSEXTEND = "native"
+
+PACKAGES_DYNAMIC = "pango-module-*"
+PACKAGES_DYNAMIC_virtclass-native = ""
+
+RRECOMMENDS_${PN} = "pango-module-basic-x pango-module-basic-fc" 
+
+INC_PR = "r1"
+
+# seems to go wrong with default cflags
+FULL_OPTIMIZATION_arm = "-O2"
+
+SRC_URI += "file://no-tests.patch \
+           "
+
+EXTRA_OECONF += "--disable-glibtest \
+                 --enable-explicit-deps=no \
+                 --disable-debug"
+
+LEAD_SONAME = "libpango-1.0*"
+LIBV = "1.6.0"
+
+FILES_${PN} = "/etc ${bindir}/* ${libdir}/libpango*.so.*"
+FILES_${PN}-dbg += "${libdir}/pango/${LIBV}/modules/.debug"
+FILES_${PN}-dev += "${libdir}/pango/${LIBV}/modules/*.la"
+
+postinst_prologue() {
+if [ "x$D" != "x" ]; then
+  exit 1
+fi
+
+}
+
+python populate_packages_prepend () {
+	prologue = bb.data.getVar("postinst_prologue", d, 1)
+
+	modules_root = bb.data.expand('${libdir}/pango/${LIBV}/modules', d)
+
+	do_split_packages(d, modules_root, '^pango-(.*)\.so$', 'pango-module-%s', 'Pango module %s', prologue + 'pango-querymodules > /etc/pango/pango.modules')
+}
diff --git a/meta-oe/recipes-graphics/pango/pango/no-tests.patch b/meta-oe/recipes-graphics/pango/pango/no-tests.patch
new file mode 100644
index 0000000000..b382126129
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pango/no-tests.patch
@@ -0,0 +1,15 @@
+
+#
+# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
+#
+
+--- pango-1.2.5/Makefile.am~no-tests	2003-01-30 22:43:47.000000000 +0100
++++ pango-1.2.5/Makefile.am	2004-03-11 11:31:25.000000000 +0100
+@@ -1,6 +1,6 @@
+ ## Process this file with automake to create Makefile.in.
+ 
+-SUBDIRS= pango modules examples docs tools tests
++SUBDIRS= pango modules examples docs tools 
+ 
+ EXTRA_DIST = 		\
+ 	pango.pc.in	\
diff --git a/meta-oe/recipes-graphics/pango/pango/pkgconfig_fixes.patch b/meta-oe/recipes-graphics/pango/pango/pkgconfig_fixes.patch
new file mode 100644
index 0000000000..f021591a91
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pango/pkgconfig_fixes.patch
@@ -0,0 +1,79 @@
+Index: pango-1.18.1/configure.in
+===================================================================
+--- pango-1.18.1.orig/configure.in	2007-08-28 00:29:54.000000000 +0000
++++ pango-1.18.1/configure.in	2007-11-12 19:21:22.000000000 +0000
+@@ -226,13 +226,9 @@
+   #
+   # Checks for FreeType
+   #
+-  FREETYPE_LIBS=
+-  FREETYPE_CFLAGS=
+-  AC_PATH_PROG(FREETYPE_CONFIG, freetype-config, no)
+-  if test "x$FREETYPE_CONFIG" != "xno" ; then
+-    FREETYPE_CFLAGS=`$FREETYPE_CONFIG --cflags`
+-    FREETYPE_LIBS=`$FREETYPE_CONFIG --libs`
++  PKG_CHECK_MODULES(FREETYPE, freetype2 >= 1.0.1, have_freetype=true, AC_MSG_RESULT([no]))
+ 
++  if $have_freetype ; then
+     pango_save_ldflags=$LDFLAGS
+     LDFLAGS="$LDFLAGS $FREETYPE_LIBS"
+     AC_CHECK_LIB(freetype, FT_Get_Next_Char, have_freetype=true, :)
+Index: pango-1.18.1/pangoft2-uninstalled.pc.in
+===================================================================
+--- pango-1.18.1.orig/pangoft2-uninstalled.pc.in	2007-07-05 21:30:28.000000000 +0000
++++ pango-1.18.1/pangoft2-uninstalled.pc.in	2007-11-12 19:23:44.000000000 +0000
+@@ -1,7 +1,7 @@
+ Name: Pango FT2 Uninstalled
+ Description: Freetype 2.0 font support for Pango, Not Installed
+ Version: @VERSION@
+-Requires: pango
+-Libs: ${pc_top_builddir}/${pcfiledir}/pango/libpangoft2-@PANGO_API_VERSION@.la @FREETYPE_LIBS@
+-Cflags: -I${pc_top_builddir}/${pcfiledir}/@srcdir@ @FREETYPE_CFLAGS@
++Requires: pango freetype2
++Libs: ${pc_top_builddir}/${pcfiledir}/pango/libpangoft2-@PANGO_API_VERSION@.la
++Cflags: -I${pc_top_builddir}/${pcfiledir}/@srcdir@
+ 
+Index: pango-1.18.1/pangoft2.pc.in
+===================================================================
+--- pango-1.18.1.orig/pangoft2.pc.in	2007-07-05 21:30:28.000000000 +0000
++++ pango-1.18.1/pangoft2.pc.in	2007-11-12 19:27:05.000000000 +0000
+@@ -6,7 +6,7 @@
+ Name: Pango FT2
+ Description: Freetype 2.0 font support for Pango
+ Version: @VERSION@
+-Requires: pango
+-Libs: -L${libdir} -lpangoft2-@PANGO_API_VERSION@ @PKGCONFIG_FREETYPE_LIBS@
+-Cflags: -I${includedir}/pango-1.0 @FONTCONFIG_CFLAGS@ @FREETYPE_CFLAGS@
++Requires: pango freetype2 fontconfig
++Libs: -L${libdir} -lpangoft2-@PANGO_API_VERSION@
++Cflags: -I${includedir}/pango-1.0
+ 
+Index: pango-1.18.1/pangoxft-uninstalled.pc.in
+===================================================================
+--- pango-1.18.1.orig/pangoxft-uninstalled.pc.in	2007-07-05 21:30:28.000000000 +0000
++++ pango-1.18.1/pangoxft-uninstalled.pc.in	2007-11-12 19:22:24.000000000 +0000
+@@ -1,7 +1,7 @@
+ Name: Pango Xft Uninstalled
+ Description: Xft font support for Pango, Not Installed
+ Version: @VERSION@
+-Requires: pango
+-Libs: ${pc_top_builddir}/${pcfiledir}/pango/libpangoxft-@PANGO_API_VERSION@.la @XFT_LIBS@
+-Cflags: -I${pc_top_builddir}/${pcfiledir}/@srcdir@ @X_CFLAGS@ @FREETYPE_CFLAGS@
++Requires: pango xft
++Libs: ${pc_top_builddir}/${pcfiledir}/pango/libpangoxft-@PANGO_API_VERSION@.la
++Cflags: -I${pc_top_builddir}/${pcfiledir}/@srcdir@ @X_CFLAGS@
+ 
+Index: pango-1.18.1/pangoxft.pc.in
+===================================================================
+--- pango-1.18.1.orig/pangoxft.pc.in	2007-07-05 21:30:28.000000000 +0000
++++ pango-1.18.1/pangoxft.pc.in	2007-11-12 19:21:57.000000000 +0000
+@@ -6,6 +6,6 @@
+ Name: Pango Xft
+ Description: Xft font support for Pango
+ Version: @VERSION@
+-Requires: pango pangoft2
+-Libs: -L${libdir} -lpangoxft-@PANGO_API_VERSION@ @PKGCONFIG_XFT_LIBS@
+-Cflags: -I${includedir}/pango-1.0 @XFT_CFLAGS@
++Requires: pango pangoft2 xft
++Libs: -L${libdir} -lpangoxft-@PANGO_API_VERSION@
++Cflags: -I${includedir}/pango-1.0
diff --git a/meta-oe/recipes-graphics/pango/pango_1.28.3.bb b/meta-oe/recipes-graphics/pango/pango_1.28.3.bb
new file mode 100644
index 0000000000..4c875bf339
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pango_1.28.3.bb
@@ -0,0 +1,9 @@
+require pango.inc
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=3bf50002aefd002f49e7bb854063f7e7"
+
+SRC_URI[archive.md5sum] = "caa74baea47e7e16bc73c89f9089d522"
+SRC_URI[archive.sha256sum] = "5e278bc9430cc7bb00270f183360d262c5006b51248e8b537ea904573f200632"
+
+PR = "${INC_PR}.0"
+
diff --git a/meta-oe/recipes-graphics/pango/pangomm_2.26.0.bb b/meta-oe/recipes-graphics/pango/pangomm_2.26.0.bb
new file mode 100644
index 0000000000..ecf2dd1ee8
--- /dev/null
+++ b/meta-oe/recipes-graphics/pango/pangomm_2.26.0.bb
@@ -0,0 +1,22 @@
+DESCRIPTION = "C++ bindings for the pango library."
+SECTION = "libs"
+PRIORITY = "optional"
+LICENSE = "LGPL"
+DEPENDS = "mm-common cairomm glibmm"
+SHRT_VER = "${@bb.data.getVar('PV',d,1).split('.')[0]}.${@bb.data.getVar('PV',d,1).split('.')[1]}"
+PR = "r1"
+
+SRC_URI = "ftp://ftp.gnome.org/pub/GNOME/sources/pangomm/${SHRT_VER}/pangomm-${PV}.tar.bz2"
+
+inherit autotools flow-lossage
+
+FILES_${PN} = "${libdir}/lib*.so.*"
+FILES_${PN}-dev += "${libdir}/*/include/"
+
+EXTRA_OECONF = " --disable-documentation "
+
+AUTOTOOLS_STAGE_PKGCONFIG = "1"
+
+
+SRC_URI[md5sum] = "37f54dc8e6cb73ed923b22f313352156"
+SRC_URI[sha256sum] = "bf26ebe42c12c81e5c32ceca80ff226a01c8d80d4db2a4cc3463d5bf241b095e"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-arphic-uming_20080216.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-arphic-uming_20080216.bb
new file mode 100644
index 0000000000..bb259b9181
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-arphic-uming_20080216.bb
@@ -0,0 +1,18 @@
+DESCRIPTION = "Unicode Mingti (printed) TrueType Font"
+HOMEPAGE = "http://www.freedesktop.org/wiki/Software/CJKUnifonts"
+LICENSE = "${PN}"
+SRC_DISTRIBUTE_LICENSES += "${PN}"
+RPROVIDES_${PN} = "virtual-chinese-font"
+PR = "r2"
+
+SRC_URI = \
+"http://archive.ubuntu.com/ubuntu/pool/main/t/ttf-arphic-uming/ttf-arphic-uming_0.2.${PV}.1.orig.tar.gz"
+S = "${WORKDIR}"
+
+require ttf.inc
+
+FILES_${PN} = "${datadir}"
+
+
+SRC_URI[md5sum] = "d219fcaf953f3eb1889399955a00379f"
+SRC_URI[sha256sum] = "8038a6db9e832456d5da5559aff8d15130243be1091bf24f3243503a6f1bda98"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu/30-dejavu-aliases.conf b/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu/30-dejavu-aliases.conf
new file mode 100644
index 0000000000..9c6e56bf7c
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu/30-dejavu-aliases.conf
@@ -0,0 +1,16 @@
+<?xml version="1.0"?>
+<!DOCTYPE fontconfig SYSTEM "fonts.dtd">
+<fontconfig>
+	<alias>
+		<family>DejaVu Serif</family>
+		<default><family>serif</family></default>
+	</alias>
+	<alias>
+		<family>DejaVu Sans</family>
+		<default><family>sans-serif</family></default>
+	</alias>
+ 	<alias>
+		<family>DejaVu Sans Mono</family>
+		<default><family>monospace</family></default>
+	</alias>
+</fontconfig>
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu_2.23.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu_2.23.bb
new file mode 100644
index 0000000000..f852cbffd6
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-dejavu_2.23.bb
@@ -0,0 +1,44 @@
+require ttf.inc
+
+DESCRIPTION = "DejaVu font - TTF Edition"
+HOMEPAGE = "http://dejavu.sourceforge.net/wiki/"
+LICENSE = "Bitstream Vera"
+LIC_FILES_CHKSUM = "file://${WORKDIR}/dejavu-fonts-ttf-${PV}/LICENSE;md5=9f867da7a73fad2715291348e80d0763"
+
+# all subpackages except ${PN}-dbg and ${PN}-common itself rdepends on ${PN}-common
+RDEPENDS_${PN}-sans = "${PN}-common"
+RDEPENDS_${PN}-sans-mono = "${PN}-common"
+RDEPENDS_${PN}-sans-condensed = "${PN}-common"
+RDEPENDS_${PN}-serif = "${PN}-common"
+RDEPENDS_${PN}-serif-condensed = "${PN}-common"
+RDEPENDS_${PN}-common = ""
+PR = "r3"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/dejavu/dejavu-fonts-ttf-${PV}.tar.bz2 \
+           file://30-dejavu-aliases.conf"
+
+S = "${WORKDIR}/dejavu-fonts-ttf-${PV}/ttf"
+
+do_install_append () { 
+	install -d ${D}${sysconfdir}/fonts/conf.d/
+	install -m 0644 ${WORKDIR}/30-dejavu-aliases.conf ${D}${sysconfdir}/fonts/conf.d/
+}
+
+PACKAGES = "${PN}-dbg \
+            ${PN}-sans \
+            ${PN}-sans-mono \
+            ${PN}-sans-condensed \
+            ${PN}-serif \
+            ${PN}-serif-condensed \
+            ${PN}-common"
+RRECOMMENDS_${PN}-dbg = ""
+
+FILES_${PN}-sans            = "${datadir}/fonts/truetype/DejaVuSans.ttf ${datadir}/fonts/truetype/DejaVuSans-*.ttf"
+FILES_${PN}-sans-mono       = "${datadir}/fonts/truetype/DejaVuSansMono*.ttf"
+FILES_${PN}-sans-condensed  = "${datadir}/fonts/truetype/DejaVuSansCondensed*.ttf"
+FILES_${PN}-serif           = "${datadir}/fonts/truetype/DejaVuSerif.ttf ${datadir}/fonts/truetype/DejaVuSerif-*.ttf"
+FILES_${PN}-serif-condensed = "${datadir}/fonts/truetype/DejaVuSerifCondensed*.ttf"
+FILES_${PN}-common          = "${sysconfdir}"
+
+SRC_URI[md5sum] = "ff871dff0b3e8a11cd5c54478f11073f"
+SRC_URI[sha256sum] = "243642a1c3f4b6fd00125f5772ac5c8e4d0bb6586f5abb05829ead4b83ad5233"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-droid_git.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-droid_git.bb
new file mode 100644
index 0000000000..3fa04abf5d
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-droid_git.bb
@@ -0,0 +1,28 @@
+require ttf.inc
+
+DESCRIPTION = "Droid fonts - TTF Edition"
+HOMEPAGE = "http://www.droidfonts.com/"
+LICENSE = "Apache-2.0"
+PR = "r0"
+# git magic below - SRCREV is an ID of /data/fonts subtree
+# (so we don't need to fetch full platform/frameworks/base.git)
+SRCREV = "31f255e44e618ff3b923f332e8fcb83403fd39f5"
+PV = "0.0+${PR}+gitr${SRCREV}"
+
+SRC_URI = "git://android.git.kernel.org/platform/frameworks/base.git;protocol=git;branch=master"
+
+S = "${WORKDIR}/git"
+
+do_install_prepend() {
+	rm ${S}/Ahem.ttf # we're not packaging it
+}
+
+PACKAGES = "${PN}-dbg ttf-droid-sans ttf-droid-sans-mono \
+            ttf-droid-sans-fallback ttf-droid-sans-japanese ttf-droid-serif"
+RRECOMMENDS_${PN}-dbg = ""
+
+FILES_ttf-droid-sans = "${datadir}/fonts/truetype/DroidSans.ttf ${datadir}/fonts/truetype/DroidSans-Bold.ttf"
+FILES_ttf-droid-sans-mono = "${datadir}/fonts/truetype/DroidSansMono.ttf"
+FILES_ttf-droid-sans-fallback = "${datadir}/fonts/truetype/DroidSansFallback.ttf"
+FILES_ttf-droid-sans-japanese = "${datadir}/fonts/truetype/DroidSansJapanese.ttf"
+FILES_ttf-droid-serif = "${datadir}/fonts/truetype/DroidSerif*.ttf"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium/OFL.gz b/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium/OFL.gz
new file mode 100644
index 0000000000..7ebada7572
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium/OFL.gz
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium_1.02.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium_1.02.bb
new file mode 100644
index 0000000000..698b2edf89
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-gentium_1.02.bb
@@ -0,0 +1,135 @@
+require ttf.inc
+
+DESCRIPTION = "Gentium fonts - TTF Version"
+HOMEPAGE = "http://scripts.sil.org/gentium"
+LICENSE = "SIL Open Font License"
+LICENSE_URL = "http://scripts.sil.org/cms/scripts/page.php?site_id=nrsi&item_id=OFL"
+PR = "r3"
+
+SRC_URI = "${DEBIAN_MIRROR}/main/t/ttf-gentium/ttf-gentium_${PV}.orig.tar.gz \
+           file://OFL.gz"
+
+S = "${WORKDIR}/ttf-sil-gentium-${PV}"
+
+do_install_append() {
+
+    install -d ${D}${datadir}/doc/ttf-gentium/
+    install -d ${D}${datadir}/doc/ttf-gentium-alt/
+
+    install -m 0644 ${WORKDIR}/OFL ${D}${datadir}/doc/ttf-gentium/
+    install -m 0644 ${WORKDIR}/OFL ${D}${datadir}/doc/ttf-gentium-alt/
+
+}
+
+PACKAGES = "${PN}-dbg ${PN} ${PN}-alt"
+
+FILES_ttf-gentium-alt = "${datadir}/fonts/truetype/GenAI*.ttf \
+                         ${datadir}/fonts/truetype/GenAR*.ttf \
+			 ${datadir}/doc/ttf-gentium-alt/*"
+
+FILES_${PN} = "${datadir}/fonts/truetype/GenI*.ttf \
+               ${datadir}/fonts/truetype/GenR*.ttf \
+	       ${datadir}/doc/ttf-gentium/*"
+
+#
+# License
+#
+# Gentium is released under the SIL Open Font License - please read it carefully
+# and do not download the fonts unless you agree to the terms of the license:
+#
+# This Font Software is Copyright (c) 2003-2005, SIL International
+# (http://scripts.sil.org/). All Rights Reserved.
+#
+# "Gentium" is a Reserved Font Name for this Font Software. "SIL" is a Reserved
+# Font Name for this Font Software.
+#
+# This Font Software is licensed under the SIL Open Font License, Version 1.0. No
+# modification of the license is permitted, only verbatim copy is allowed. This
+# license is copied below, and is also available with a FAQ
+# at:http://scripts.sil.org/OFL SIL OPEN FONT LICENSE
+#
+# Version 1.0 - 22 November 2005
+#
+# PREAMBLE
+#
+# The goals of the Open Font License (OFL) are to stimulate worldwide development
+# of cooperative font projects, to support the font creation efforts of academic
+# and linguistic communities, and to provide an open framework in which fonts may
+# be shared and improved in partnership with others.
+#
+# The OFL allows the licensed fonts to be used, studied, modified and
+# redistributed freely as long as they are not sold by themselves. The fonts,
+# including any derivative works, can be bundled, embedded, redistributed and
+# sold with any software provided that the font names of derivative works are
+# changed. The fonts and derivatives, however, cannot be released under any other
+# type of license.
+#
+# DEFINITIONS
+#
+# "Font Software" refers to any and all of the following:
+#
+#     * font files data files source code build scripts documentation
+#
+# "Reserved Font Name" refers to the Font Software name as seen by users and any
+# other names as specified after the copyright statement.
+#
+# "Standard Version" refers to the collection of Font Software components as
+# distributed by the Copyright Holder.
+#
+# "Modified Version" refers to any derivative font software made by adding to,
+# deleting, or substituting -- in part or in whole -- any of the components of
+# the Standard Version, by changing formats or by porting the Font Software to a
+# new environment.
+#
+# "Author" refers to any designer, engineer, programmer, technical writer or
+# other person who contributed to the Font Software.
+#
+# PERMISSION & CONDITIONS
+#
+# Permission is hereby granted, free of charge, to any person obtaining a copy of
+# the Font Software, to use, study, copy, merge, embed, modify, redistribute, and
+# sell modified and unmodified copies of the Font Software, subject to the
+# following conditions:
+#
+# 1) Neither the Font Software nor any of its individual components, in Standard
+# or Modified Versions, may be sold by itself.
+#
+# 2) Standard or Modified Versions of the Font Software may be bundled,
+# redistributed and sold with any software, provided that each copy contains the
+# above copyright notice and this license. These can be included either as
+# stand-alone text files, human-readable headers or in the appropriate
+# machine-readable metadata fields within text or binary files as long as those
+# fields can be easily viewed by the user.
+#
+# 3) No Modified Version of the Font Software may use the Reserved Font Name(s),
+# in part or in whole, unless explicit written permission is granted by the
+# Copyright Holder. This restriction applies to all references stored in the Font
+# Software, such as the font menu name and other font description fields, which
+# are used to differentiate the font from others.
+#
+# 4) The name(s) of the Copyright Holder or the Author(s) of the Font Software
+# shall not be used to promote, endorse or advertise any Modified Version, except
+# to acknowledge the contribution(s) of the Copyright Holder and the Author(s) or
+# with their explicit written permission.
+#
+# 5) The Font Software, modified or unmodified, in part or in whole, must be
+# distributed using this license, and may not be distributed under any other
+# license.
+#
+# TERMINATION
+#
+# This license becomes null and void if any of the above conditions are not met.
+#
+# DISCLAIMER
+#
+# THE FONT SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT OF COPYRIGHT, PATENT,
+# TRADEMARK, OR OTHER RIGHT. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR
+# ANY CLAIM, DAMAGES OR OTHER LIABILITY, INCLUDING ANY GENERAL, SPECIAL,
+# INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, WHETHER IN AN ACTION OF
+# CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF THE USE OR INABILITY TO USE
+# THE FONT SOFTWARE OR FROM OTHER DEALINGS IN THE FONT SOFTWARE.
+
+SRC_URI[md5sum] = "4c3e6ae586be277537ebb68f2a45b883"
+SRC_URI[sha256sum] = "4746c04c9a4ad9e0788a38e0a2f81919a630d8070ceabc89f156b6d41d8ceb37"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-hunkyfonts_0.3.0.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-hunkyfonts_0.3.0.bb
new file mode 100644
index 0000000000..3984f868a5
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-hunkyfonts_0.3.0.bb
@@ -0,0 +1,18 @@
+require ttf.inc
+
+DESCRIPTION = "Hunky fonts - TTF Version"
+HOMEPAGE = "http://sourceforge.net/projects/hunkyfonts"
+LICENSE = "LGPL"
+PR = "r3"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/hunkyfonts/hunkyfonts-${PV}.tar.bz2"
+
+S = "${WORKDIR}/hunkyfonts-${PV}/TTF/"
+
+PACKAGES = "${PN}-dbg ttf-hunky-sans ttf-hunky-serif"
+RRECOMMENDS_${PN}-dbg = ""
+FILES_ttf-hunky-sans = "${datadir}/fonts/truetype/HunkySans*.ttf"
+FILES_ttf-hunky-serif = "${datadir}/fonts/truetype/HunkySerif*.ttf"
+
+SRC_URI[md5sum] = "36444795a356fb8a56c63b2840729bab"
+SRC_URI[sha256sum] = "e0b1849c545b6af276407d93025c73094dd74fc259b07c1d91594fdbb9a0b829"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-mplus_027.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-mplus_027.bb
new file mode 100644
index 0000000000..a6f885b8dd
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-mplus_027.bb
@@ -0,0 +1,22 @@
+require ttf.inc
+
+DESCRIPTION = "MPlus font - TTF Edition"
+HOMEPAGE = "http://dejavu.sourceforge.net/wiki/"
+LICENSE = "${PN}"
+PR = "r0"
+
+SRC_URI = "http://osdn.dl.sourceforge.jp/mplus-fonts/6650/mplus-TESTFLIGHT-${PV}.tar.gz"
+S = "${WORKDIR}/mplus-TESTFLIGHT-${PV}"
+
+python populate_packages_prepend() {
+	plugindir = bb.data.expand('${datadir}/fonts/ttf-mplus/', d)
+	do_split_packages(d, plugindir, '^(.*)\.ttf$', 'ttf-%s', 'TTF Font %s', extra_depends = "ttf-common")
+}
+
+do_install() {
+	install -d ${D}${datadir}/fonts/ttf-mplus
+	install -m 0644 *.ttf ${D}${datadir}/fonts/ttf-mplus/
+}
+
+SRC_URI[md5sum] = "d1400184b51b3871e8d2fca6c50e18ae"
+SRC_URI[sha256sum] = "a20b9b9b03c2a6fb1e2137d29e8a6ce06406ba1e008906ea3c474dc048dc06a6"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-sazanami_20040629.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-sazanami_20040629.bb
new file mode 100644
index 0000000000..1b9a01b2a1
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-sazanami_20040629.bb
@@ -0,0 +1,33 @@
+require ttf.inc
+
+DESCRIPTION = "Sazanami Gothic/Mincho Japanese TrueType fonts"
+DESCRIPTION_ttf-sazanami-gothic = "Sazanami Gothic Japanese TrueType font"
+DESCRIPTION_ttf-sazanami-mincho = "Sazanami Mincho Japanese TrueType font"
+AUTHOR = "Electronic Font Open Laboratory (/efont/)"
+HOMEPAGE = "http://sourceforge.jp/projects/efont/"
+LICENSE = "${PN}"
+SRC_DISTRIBUTE_LICENSES += "${PN}"
+RPROVIDES_${PN} = "virtual-japanese-font"
+PR = "r5"
+
+SRC_URI = "http://osdn.dl.sourceforge.jp/efont/10087/sazanami-20040629.tar.bz2"
+S = "${WORKDIR}/sazanami-20040629"
+
+PACKAGES = "${PN}-dbg ttf-sazanami-gothic ttf-sazanami-mincho"
+RRECOMMENDS_${PN}-dbg = ""
+FILES_ttf-sazanami-gothic = "${datadir}/fonts/truetype/sazanami-gothic.ttf \
+			     ${datadir}/doc/ttf-sazanami-gothic/README"
+FILES_ttf-sazanami-mincho = "${datadir}/fonts/truetype/sazanami-mincho.ttf \
+			     ${datadir}/doc/ttf-sazanami-mincho/README"
+
+do_install_append() {
+	# README contains the redistribution license
+	install -d ${D}${datadir}/doc/
+	install -d ${D}${datadir}/doc/ttf-sazanami-gothic
+	install -d ${D}${datadir}/doc/ttf-sazanami-mincho
+	install -m 0644 ${S}/README ${D}${datadir}/doc/ttf-sazanami-gothic
+	install -m 0644 ${S}/README ${D}${datadir}/doc/ttf-sazanami-mincho
+}
+
+SRC_URI[md5sum] = "ceef10579a75c92483171f3bd7f77df2"
+SRC_URI[sha256sum] = "3467ce2f70a9a3fbbf8d4d97355a2f334a6351baa6722251403637a8cbebf6b7"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-ubuntu-font-family_0.69.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-ubuntu-font-family_0.69.bb
new file mode 100644
index 0000000000..cc8d2e4cb3
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-ubuntu-font-family_0.69.bb
@@ -0,0 +1,18 @@
+require ttf.inc
+
+DESCRIPTION = "Ubuntu Font Family - TTF Version"
+HOMEPAGE = "http://font.ubuntu.com"
+LICENSE = "UFL"
+PR = "r0"
+
+SRC_URI = "http://font.ubuntu.com/download/ubuntu-font-family-${PV}+ufl.zip"
+SRC_URI[md5sum] = "2c3287ea72f81ce025095f7a6d68af28"
+SRC_URI[sha256sum] = "23206a306d92ec57404ab3bc75610b6d8cfed0b8ddcfbe51b99fb48519a4855b"
+S = "${WORKDIR}/ubuntu-font-family-0.69+ufl"
+
+PACKAGES = "${PN}-dbg ttf-ubuntu-mono ttf-ubuntu-sans ttf-ubuntu-serif"
+RRECOMMENDS_${PN}-dbg = ""
+
+FILES_ttf-ubuntu-mono  = "${datadir}/fonts/truetype/*Mono*"
+FILES_ttf-ubuntu-sans  = "${datadir}/fonts/truetype/Ubuntu-*"
+FILES_ttf-ubuntu-serif = "${datadir}/fonts/truetype/*Serif*"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf-wqy-zenhei_0.6.26.bb b/meta-oe/recipes-graphics/ttf-fonts/ttf-wqy-zenhei_0.6.26.bb
new file mode 100644
index 0000000000..2d1d23e12a
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf-wqy-zenhei_0.6.26.bb
@@ -0,0 +1,22 @@
+require ttf.inc
+
+DESCRIPTION = "WenQuanYi Zen Hei - A Hei-Ti Style Chinese font"
+AUTHOR = "Qianqian Fang and The WenQuanYi Project Contributors"
+HOMEPAGE = "http://wqy.sourceforge.net/en/"
+LICENSE = "GPLv2"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/wqy/wqy-zenhei-${PV}-0.tar.gz"
+S = "${WORKDIR}/wqy-zenhei"
+
+do_install_append () { 
+	install -d ${D}${sysconfdir}/fonts/conf.d/
+	install -m 0644 ${S}/44-wqy-zenhei.conf ${D}${sysconfdir}/fonts/conf.d/
+	install -m 0644 ${S}/66-wqy-zenhei-sharp.conf ${D}${sysconfdir}/fonts/conf.d/
+}
+
+PACKAGES = "${PN}"
+
+FILES_${PN} = "${datadir}/fonts ${sysconfdir}"
+
+SRC_URI[md5sum] = "bf2c1cb512606d995873bada27c777da"
+SRC_URI[sha256sum] = "47355b6ec84bb309614b6d657ddfda993b96ed0be569264f82e523b254f945b2"
diff --git a/meta-oe/recipes-graphics/ttf-fonts/ttf.inc b/meta-oe/recipes-graphics/ttf-fonts/ttf.inc
new file mode 100644
index 0000000000..af3f278536
--- /dev/null
+++ b/meta-oe/recipes-graphics/ttf-fonts/ttf.inc
@@ -0,0 +1,23 @@
+DESCRIPTION ?= "TrueType font package ${PN}"
+SECTION = "fonts"
+PRIORITY = "optional"
+# don't use RRECOMMENDS_${PN} here because sometimes each font is packaged to separate package and each one needs this dep to call update-fonts
+RRECOMMENDS += "font-update-common"
+
+# we don't need a compiler nor a c library for these fonts
+INHIBIT_DEFAULT_DEPS = "1"
+
+do_install() {
+    install -d ${D}${datadir}/fonts/truetype/
+    find ./ -name '*.tt[cf]' -exec install -m 0644 {} ${D}${datadir}/fonts/truetype/ \;
+}
+
+pkg_postinst_append() {
+    update-fonts
+}
+
+pkg_postrm_append() {
+    update-fonts
+}
+
+PACKAGE_ARCH = "all"
diff --git a/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0001-blacklist-tv-out.patch b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0001-blacklist-tv-out.patch
new file mode 100644
index 0000000000..5ac3b7ae9e
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0001-blacklist-tv-out.patch
@@ -0,0 +1,28 @@
+From 05efb061f1945425d214ff6b6050883e6d8633bf Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 26 Jan 2011 13:21:12 +0100
+Subject: [PATCH 1/3] blacklist tv out
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ src/omapfb-output-dss.c |    4 ++++
+ 1 files changed, 4 insertions(+), 0 deletions(-)
+
+diff --git a/src/omapfb-output-dss.c b/src/omapfb-output-dss.c
+index 6cc52de..83cb711 100644
+--- a/src/omapfb-output-dss.c
++++ b/src/omapfb-output-dss.c
+@@ -205,6 +205,10 @@ OMAPFBDSSOutputDetect (xf86OutputPtr output)
+ 	if(ofb->timings[idx][0] == '\0')
+ 		return XF86OutputStatusDisconnected;
+ 
++	// Hack to disable the tv out
++	if (strncmp(output->name, "tv", 2) == 0)
++		return XF86OutputStatusDisconnected;
++
+ 	return XF86OutputStatusConnected;
+ }
+ 
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0002-Revert-Set-virtual-size-when-configuring-framebuffer.patch b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0002-Revert-Set-virtual-size-when-configuring-framebuffer.patch
new file mode 100644
index 0000000000..41d5f131a6
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0002-Revert-Set-virtual-size-when-configuring-framebuffer.patch
@@ -0,0 +1,26 @@
+From 316f31253902eb3567ef62faf52b3f0a5d6b0c93 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 26 Jan 2011 13:27:20 +0100
+Subject: [PATCH 2/3] Revert "Set virtual size when configuring framebuffer"
+
+This reverts commit 2653ef07883fbd1a5e7025f9300cf89b79ba429a.
+---
+ src/omapfb-crtc.c |    2 --
+ 1 files changed, 0 insertions(+), 2 deletions(-)
+
+diff --git a/src/omapfb-crtc.c b/src/omapfb-crtc.c
+index 9aaa52f..d321a5a 100644
+--- a/src/omapfb-crtc.c
++++ b/src/omapfb-crtc.c
+@@ -98,8 +98,6 @@ OMAPFBCrtcCommitChangeMode (xf86CrtcPtr crtc)
+ 	v = ofb->state_info;
+ 	v.xres = mode->HDisplay;
+ 	v.yres = mode->VDisplay;
+-	v.xres_virtual = crtc->scrn->virtualX;
+-	v.yres_virtual = crtc->scrn->virtualY;
+ 	v.activate = FB_ACTIVATE_NOW;
+ 	v.pixclock = KHZ2PICOS(mode->Clock ? mode->Clock : 56000);
+ 	v.left_margin = mode->HTotal - mode->HSyncEnd;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0003-force-plain-mode.patch b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0003-force-plain-mode.patch
new file mode 100644
index 0000000000..06eeca9d26
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb/0003-force-plain-mode.patch
@@ -0,0 +1,26 @@
+From b7acfade1ac15332ebfd24d4bf02b466858c8cf8 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Wed, 26 Jan 2011 13:20:20 +0100
+Subject: [PATCH 3/3] force 'plain' mode
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ src/omapfb-driver.c |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+diff --git a/src/omapfb-driver.c b/src/omapfb-driver.c
+index 018e040..48aa09c 100644
+--- a/src/omapfb-driver.c
++++ b/src/omapfb-driver.c
+@@ -326,7 +326,7 @@ OMAPFBPreInit(ScrnInfoPtr pScrn, int flags)
+ 	OMAPFBProbeController(ofb->ctrl_name);
+ 
+ 	/* Do we have the DSS kernel API? */
+-	if (stat(SYSFS_DSS_DIR, &st) == 0) {
++	if (0) { //stat(SYSFS_DSS_DIR, &st) == 0) {
+ 		ofb->dss = TRUE;
+ 	} else {
+ 		ofb->dss = FALSE;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb_git.bb b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb_git.bb
new file mode 100644
index 0000000000..85b68b17c6
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-driver/xf86-video-omapfb_git.bb
@@ -0,0 +1,29 @@
+require recipes-graphics/xorg-driver/xf86-driver-common.inc
+
+INC_PR ?= "r15"
+
+DESCRIPTION = "X.Org X server -- OMAP display driver"
+PE = "1"
+PV = "0.1.1+${PR}+gitr${SRCREV}"
+PR = "${INC_PR}.2"
+
+LICENSE = "MIT-X"
+LIC_FILES_CHKSUM = "file://src/omapfb-driver.c;beginline=1;endline=30;md5=a44c2a37e04d1c2c5f0313afb493f833"
+
+SRC_URI = "git://git.pingu.fi/xf86-video-omapfb.git;protocol=http \
+           file://0001-blacklist-tv-out.patch \
+           file://0002-Revert-Set-virtual-size-when-configuring-framebuffer.patch \
+           file://0003-force-plain-mode.patch \
+          "
+
+SRCREV_pn-${PN} = "044617665d6737f4909aab96f91b06261dff05d2"
+S = "${WORKDIR}/git"
+
+EXTRA_OECONF_armv7a = " --enable-neon "
+
+# Use overlay 2 on omap3 to enable other apps to use overlay 1 (e.g. dmai or omapfbplay)
+do_compile_prepend_armv7a () {
+        sed -i -e s:fb1:fb2:g ${S}/src/omapfb-xv.c
+}
+
+CFLAGS += " -I${STAGING_INCDIR}/xorg "
diff --git a/meta-oe/recipes-graphics/xorg-lib/libxext_1.2.0.bb b/meta-oe/recipes-graphics/xorg-lib/libxext_1.2.0.bb
new file mode 100644
index 0000000000..3d18d62882
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/libxext_1.2.0.bb
@@ -0,0 +1,18 @@
+DESCRIPTION = "X11 miscellaneous extension library"
+
+require xorg-lib-common.inc
+
+LICENSE = "MIT-style"
+LIC_FILES_CHKSUM = "file://COPYING;md5=0542b0321c1c9a7a20b23a1b9fa45f91"
+
+DEPENDS += "xproto virtual/libx11 xextproto libxau libxdmcp"
+PROVIDES = "xext"
+
+PR = "r0"
+PE = "1"
+
+XORG_PN = "libXext"
+
+
+SRC_URI[md5sum] = "9bb236ff0193e9fc1c1fb504dd840331"
+SRC_URI[sha256sum] = "4aed3e211e41c47908c293515580e731c26048f61a1212bf0888d1f456de6ff7"
diff --git a/meta-oe/recipes-graphics/xorg-lib/libxrender_0.9.6.bb b/meta-oe/recipes-graphics/xorg-lib/libxrender_0.9.6.bb
new file mode 100644
index 0000000000..c1bb045f86
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/libxrender_0.9.6.bb
@@ -0,0 +1,17 @@
+DESCRIPTION = "X11 Rendering Extension client library"
+
+require xorg-lib-common.inc
+
+LICENSE = "MIT-style"
+LIC_FILES_CHKSUM = "file://COPYING;md5=0db75cc842842b36f097fdae571b4b70"
+
+DEPENDS += "virtual/libx11 renderproto xproto xdmcp"
+
+PR = "r0"
+PE = "1"
+
+XORG_PN = "libXrender"
+
+
+SRC_URI[md5sum] = "3b3b7d076c2384b6c600c0b5f4ba971f"
+SRC_URI[sha256sum] = "7f58b1e263109e0a873eef8423aa14733a5499befbe645053aa622ed1f3ea668"
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0000-Add-pixman_bits_override_accessors.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0000-Add-pixman_bits_override_accessors.patch
new file mode 100644
index 0000000000..43cd44268e
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0000-Add-pixman_bits_override_accessors.patch
@@ -0,0 +1,77 @@
+From 38aabb3be87ea68e37f34256c778d07f62680ec6 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 10 Dec 2009 00:51:50 +0200
+Subject: [PATCH 1/9] add _pixman_bits_override_accessors
+
+* from patch ARM: HACK: added NEON optimizations for fetch/store r5g6b5 scanline
+* used in 
+  0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
+  0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
+  0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
+
+
+---
+ pixman/pixman-access.c       |   23 ++++++++++++++++++++++-
+ pixman/pixman-private.h      |    5 +++++
+ 4 files changed, 87 insertions(+), 1 deletions(-)
+
+diff --git a/pixman/pixman-access.c b/pixman/pixman-access.c
+index f1ce0ba..b33da29 100644
+--- a/pixman/pixman-access.c
++++ b/pixman/pixman-access.c
+@@ -2836,7 +2836,7 @@ typedef struct
+ 	    store_scanline_ ## format, store_scanline_generic_64	\
+     }
+ 
+-static const format_info_t accessors[] =
++static format_info_t accessors[] =
+ {
+ /* 32 bpp formats */
+     FORMAT_INFO (a8r8g8b8),
+@@ -2978,6 +2978,27 @@ _pixman_bits_image_setup_accessors (bits_image_t *image)
+ 	setup_accessors (image);
+ }
+ 
++void
++_pixman_bits_override_accessors (pixman_format_code_t format,
++                                 fetch_scanline_t     fetch_func,
++                                 store_scanline_t     store_func)
++{
++    format_info_t *info = accessors;
++
++    while (info->format != PIXMAN_null)
++    {
++	if (info->format == format)
++	{
++	    if (fetch_func)
++		info->fetch_scanline_32 = fetch_func;
++	    if (store_func)
++		info->store_scanline_32 = store_func;
++	    return;
++	}
++	info++;
++    }
++}
++
+ #else
+ 
+ void
+diff --git a/pixman/pixman-private.h b/pixman/pixman-private.h
+index d85868f..564f8f0 100644
+--- a/pixman/pixman-private.h
++++ b/pixman/pixman-private.h
+@@ -206,6 +206,11 @@ void
+ _pixman_bits_image_setup_accessors (bits_image_t *image);
+ 
+ void
++_pixman_bits_override_accessors (pixman_format_code_t format,
++                                 fetch_scanline_t     fetch_func,
++                                 store_scanline_t     store_func);
++
++void
+ _pixman_image_get_scanline_generic_64  (pixman_image_t *image,
+                                         int             x,
+                                         int             y,
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0001-Generic-C-implementation-of-pixman_blt-with-overlapp.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0001-Generic-C-implementation-of-pixman_blt-with-overlapp.patch
new file mode 100644
index 0000000000..795cce5bad
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0001-Generic-C-implementation-of-pixman_blt-with-overlapp.patch
@@ -0,0 +1,114 @@
+From 97b2bb933455f222b392b5c60a8bde82d7d6329f Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Tue, 16 Mar 2010 16:55:28 +0100
+Subject: [PATCH 1/8] Generic C implementation of pixman_blt with overlapping support
+
+Uses memcpy/memmove functions to copy pixels, can handle the
+case when both source and destination areas are in the same
+image (this is useful for scrolling).
+
+It is assumed that copying direction is only important when
+using the same image for both source and destination (and
+src_stride == dst_stride). Copying direction is undefined
+for the images with different source and destination stride
+which happen to be in the overlapped areas (but this is an
+unrealistic case anyway).
+---
+ pixman/pixman-general.c |   21 ++++++++++++++++++---
+ pixman/pixman-private.h |   43 +++++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 61 insertions(+), 3 deletions(-)
+
+diff --git a/pixman/pixman-general.c b/pixman/pixman-general.c
+index 4d234a0..c4d2c14 100644
+--- a/pixman/pixman-general.c
++++ b/pixman/pixman-general.c
+@@ -280,9 +280,24 @@ general_blt (pixman_implementation_t *imp,
+              int                      width,
+              int                      height)
+ {
+-    /* We can't blit unless we have sse2 or mmx */
+-
+-    return FALSE;
++    uint8_t *dst_bytes = (uint8_t *)dst_bits;
++    uint8_t *src_bytes = (uint8_t *)src_bits;
++    int bpp;
++
++    if (src_bpp != dst_bpp || src_bpp & 7)
++	return FALSE;
++
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    pixman_blt_helper (src_bytes + src_y * src_stride + src_x * bpp,
++                       dst_bytes + dst_y * dst_stride + dst_x * bpp,
++                       src_stride,
++                       dst_stride,
++                       width,
++                       height);
++    return TRUE;
+ }
+ 
+ static pixman_bool_t
+diff --git a/pixman/pixman-private.h b/pixman/pixman-private.h
+index c43172b..f980454 100644
+--- a/pixman/pixman-private.h
++++ b/pixman/pixman-private.h
+@@ -10,6 +10,7 @@
+ 
+ #include "pixman.h"
+ #include <time.h>
++#include <string.h>
+ #include <assert.h>
+ #include <stdio.h>
+ #include <string.h>
+@@ -873,4 +874,46 @@ void pixman_timer_register (pixman_timer_t *timer);
+ 
+ #endif /* PIXMAN_TIMERS */
+ 
++/* a helper function, can blit 8-bit images with src/dst overlapping support */
++static inline void
++pixman_blt_helper (uint8_t *src_bytes,
++                   uint8_t *dst_bytes,
++                   int      src_stride,
++                   int      dst_stride,
++                   int      width,
++                   int      height)
++{
++    /*
++     * The second part of this check is not strictly needed, but it prevents
++     * unnecessary upside-down processing of areas which belong to different
++     * images. Upside-down processing can be slower with fixed-distance-ahead
++     * prefetch and perceived as having more tearing.
++     */
++    if (src_bytes < dst_bytes + width &&
++	src_bytes + src_stride * height > dst_bytes)
++    {
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++	/* Horizontal scrolling to the left needs memmove */
++	if (src_bytes + width > dst_bytes)
++	{
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return;
++	}
++    }
++    while (--height >= 0)
++    {
++	memcpy (dst_bytes, src_bytes, width);
++	dst_bytes += dst_stride;
++	src_bytes += src_stride;
++    }
++}
++
+ #endif /* PIXMAN_PRIVATE_H */
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0002-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0002-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch
new file mode 100644
index 0000000000..6e2d492aaf
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0002-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch
@@ -0,0 +1,91 @@
+From 47b31f936641da07431093ede340465625bfcb3d Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 22 Oct 2009 05:45:47 +0300
+Subject: [PATCH 2/8] Support of overlapping src/dst for pixman_blt_mmx
+
+---
+ pixman/pixman-mmx.c |   55 +++++++++++++++++++++++++++++---------------------
+ 1 files changed, 32 insertions(+), 23 deletions(-)
+
+diff --git a/pixman/pixman-mmx.c b/pixman/pixman-mmx.c
+index e936c4c..2413197 100644
+--- a/pixman/pixman-mmx.c
++++ b/pixman/pixman-mmx.c
+@@ -2996,34 +2996,43 @@ pixman_blt_mmx (uint32_t *src_bits,
+ {
+     uint8_t *   src_bytes;
+     uint8_t *   dst_bytes;
+-    int byte_width;
++    int         bpp;
+ 
+-    if (src_bpp != dst_bpp)
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
+-    if (src_bpp == 16)
+-    {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 2;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 2;
+-	src_bytes = (uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 2 * width;
+-	src_stride *= 2;
+-	dst_stride *= 2;
+-    }
+-    else if (src_bpp == 32)
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
+     {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 4;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 4;
+-	src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 4 * width;
+-	src_stride *= 4;
+-	dst_stride *= 4;
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
+     }
+-    else
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
+     {
+-	return FALSE;
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using MMX */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
+     }
+ 
+     while (height--)
+@@ -3033,7 +3042,7 @@ pixman_blt_mmx (uint32_t *src_bits,
+ 	uint8_t *d = dst_bytes;
+ 	src_bytes += src_stride;
+ 	dst_bytes += dst_stride;
+-	w = byte_width;
++	w = width;
+ 
+ 	while (w >= 2 && ((unsigned long)d & 3))
+ 	{
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0003-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0003-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch
new file mode 100644
index 0000000000..910f62e6dd
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0003-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch
@@ -0,0 +1,91 @@
+From 13be027637602fffda3b3cb6e171d8d6a67b3b4b Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 22 Oct 2009 05:45:54 +0300
+Subject: [PATCH 3/8] Support of overlapping src/dst for pixman_blt_sse2
+
+---
+ pixman/pixman-sse2.c |   55 +++++++++++++++++++++++++++++--------------------
+ 1 files changed, 32 insertions(+), 23 deletions(-)
+
+diff --git a/pixman/pixman-sse2.c b/pixman/pixman-sse2.c
+index 5907de0..25015ae 100644
+--- a/pixman/pixman-sse2.c
++++ b/pixman/pixman-sse2.c
+@@ -5027,34 +5027,43 @@ pixman_blt_sse2 (uint32_t *src_bits,
+ {
+     uint8_t *   src_bytes;
+     uint8_t *   dst_bytes;
+-    int byte_width;
++    int         bpp;
+ 
+-    if (src_bpp != dst_bpp)
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
+-    if (src_bpp == 16)
+-    {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 2;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 2;
+-	src_bytes =(uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 2 * width;
+-	src_stride *= 2;
+-	dst_stride *= 2;
+-    }
+-    else if (src_bpp == 32)
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
+     {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 4;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 4;
+-	src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 4 * width;
+-	src_stride *= 4;
+-	dst_stride *= 4;
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
+     }
+-    else
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
+     {
+-	return FALSE;
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using SSE2 */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
+     }
+ 
+     while (height--)
+@@ -5064,7 +5073,7 @@ pixman_blt_sse2 (uint32_t *src_bits,
+ 	uint8_t *d = dst_bytes;
+ 	src_bytes += src_stride;
+ 	dst_bytes += dst_stride;
+-	w = byte_width;
++	w = width;
+ 
+ 	while (w >= 2 && ((unsigned long)d & 3))
+ 	{
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0004-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0004-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch
new file mode 100644
index 0000000000..f6aa9792b8
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0004-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch
@@ -0,0 +1,94 @@
+From a913cc05a1a1c5a813cf06d248334edede9caab7 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Wed, 18 Nov 2009 06:08:48 +0200
+Subject: [PATCH 4/8] Support of overlapping src/dst for pixman_blt_neon
+
+---
+ pixman/pixman-arm-neon.c |   62 +++++++++++++++++++++++++++++++++++++--------
+ 1 files changed, 51 insertions(+), 11 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index be5d403..cbfd7cf 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -176,26 +176,66 @@ pixman_blt_neon (uint32_t *src_bits,
+                  int       width,
+                  int       height)
+ {
+-    if (src_bpp != dst_bpp)
++    uint8_t *   src_bytes;
++    uint8_t *   dst_bytes;
++    int         bpp;
++
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
++    {
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
++    }
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
++    {
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using NEON */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
++    }
++
+     switch (src_bpp)
+     {
+     case 16:
+ 	pixman_composite_src_0565_0565_asm_neon (
+-		width, height,
+-		(uint16_t *)(((char *) dst_bits) +
+-		dst_y * dst_stride * 4 + dst_x * 2), dst_stride * 2,
+-		(uint16_t *)(((char *) src_bits) +
+-		src_y * src_stride * 4 + src_x * 2), src_stride * 2);
++		width >> 1,
++		height,
++		(uint16_t *) dst_bytes,
++		dst_stride >> 1,
++		(uint16_t *) src_bytes,
++		src_stride >> 1);
+ 	return TRUE;
+     case 32:
+ 	pixman_composite_src_8888_8888_asm_neon (
+-		width, height,
+-		(uint32_t *)(((char *) dst_bits) +
+-		dst_y * dst_stride * 4 + dst_x * 4), dst_stride,
+-		(uint32_t *)(((char *) src_bits) +
+-		src_y * src_stride * 4 + src_x * 4), src_stride);
++		width >> 2,
++		height,
++		(uint32_t *) dst_bytes,
++		dst_stride >> 2,
++		(uint32_t *) src_bytes,
++		src_stride >> 2);
+ 	return TRUE;
+     default:
+ 	return FALSE;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
new file mode 100644
index 0000000000..dbe98b38ce
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
@@ -0,0 +1,109 @@
+From f75e9d1868e21dd75ff3a2ca3561546d23877ddb Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 10 Dec 2009 00:51:50 +0200
+Subject: [PATCH 5/8] ARM: added NEON optimizations for fetch/store r5g6b5 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   20 ++++++++++++++++++++
+ pixman/pixman-arm-neon.c     |   40 ++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 60 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index e4db5cd..c79ba81 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -459,6 +459,16 @@ generate_composite_function \
+     pixman_composite_src_8888_0565_process_pixblock_tail, \
+     pixman_composite_src_8888_0565_process_pixblock_tail_head
+ 
++generate_composite_function_single_scanline \
++    pixman_store_scanline_r5g6b5_asm_neon, 32, 0, 16, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8888_0565_process_pixblock_head, \
++    pixman_composite_src_8888_0565_process_pixblock_tail, \
++    pixman_composite_src_8888_0565_process_pixblock_tail_head
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_src_0565_8888_process_pixblock_head
+@@ -494,6 +504,16 @@ generate_composite_function \
+     pixman_composite_src_0565_8888_process_pixblock_tail, \
+     pixman_composite_src_0565_8888_process_pixblock_tail_head
+ 
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_r5g6b5_asm_neon, 16, 0, 32, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_0565_8888_process_pixblock_head, \
++    pixman_composite_src_0565_8888_process_pixblock_tail, \
++    pixman_composite_src_0565_8888_process_pixblock_tail_head
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_add_8_8_process_pixblock_head
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index cbfd7cf..f88c8f8 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -392,6 +392,42 @@ BIND_COMBINE_U (over)
+ BIND_COMBINE_U (add)
+ BIND_COMBINE_U (out_reverse)
+ 
++void
++pixman_fetch_scanline_r5g6b5_asm_neon (int             width,
++                                       uint32_t       *buffer,
++                                       const uint16_t *pixel);
++void
++pixman_store_scanline_r5g6b5_asm_neon (int             width,
++                                       uint16_t       *pixel,
++                                       const uint32_t *values);
++
++static void
++neon_fetch_scanline_r5g6b5 (pixman_image_t *image,
++                            int             x,
++                            int             y,
++                            int             width,
++                            uint32_t *      buffer,
++                            const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint16_t *pixel = (const uint16_t *)bits + x;
++
++    pixman_fetch_scanline_r5g6b5_asm_neon (width, buffer, pixel);
++}
++
++static void
++neon_store_scanline_r5g6b5 (bits_image_t *  image,
++                            int             x,
++                            int             y,
++                            int             width,
++                            const uint32_t *values)
++{
++    uint32_t *bits = image->bits + image->rowstride * y;
++    uint16_t *pixel = ((uint16_t *) bits) + x;
++
++    pixman_store_scanline_r5g6b5_asm_neon (width, pixel, values);
++}
++
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+ {
+@@ -407,6 +443,10 @@ _pixman_implementation_create_arm_neon (void)
+     imp->combine_32[PIXMAN_OP_ADD] = neon_combine_add_u;
+     imp->combine_32[PIXMAN_OP_OUT_REVERSE] = neon_combine_out_reverse_u;
+ 
++    _pixman_bits_override_accessors (PIXMAN_r5g6b5,
++                                     neon_fetch_scanline_r5g6b5,
++                                     neon_store_scanline_r5g6b5);
++
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+ 
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
new file mode 100644
index 0000000000..d050646fa7
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
@@ -0,0 +1,148 @@
+From a1cd695c5e22f0f4a2b7272fab675a3cc510bacb Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 23 Sep 2010 21:10:56 +0300
+Subject: [PATCH 6/8] ARM: added NEON optimizations for fetch/store a8 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   64 ++++++++++++++++++++++++++++++++++++++++++
+ pixman/pixman-arm-neon.c     |   42 +++++++++++++++++++++++++++
+ 2 files changed, 106 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index c79ba81..ca0825c 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -418,6 +418,70 @@ generate_composite_function \
+ 
+ /******************************************************************************/
+ 
++.macro pixman_composite_src_8_8888_process_pixblock_head
++    /* This is tricky part: we can't set these values just once in 'init' macro
++     * because leading/trailing pixels handling part uses VZIP.8 instructions,
++     * and they operate on values in-place and destroy original registers
++     * content. Think about it like VST4.8 instruction corrupting NEON
++     * registers after write in 'tail_head' macro. Except that 'tail_head'
++     * macro itself actually does not need these extra VMOVs because it uses
++     * real VST4.8 instruction.
++     */
++    vmov.u8     q0, #0
++    vmov.u8     d2, #0
++.endm
++
++.macro pixman_composite_src_8_8888_process_pixblock_tail
++.endm
++
++.macro pixman_composite_src_8_8888_process_pixblock_tail_head
++    vst4.8      {d0, d1, d2, d3}, [DST_W, :128]!
++    vld1.8      {d3}, [SRC]!
++.endm
++
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_a8_asm_neon, 8, 0, 32, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8_8888_process_pixblock_head, \
++    pixman_composite_src_8_8888_process_pixblock_tail, \
++    pixman_composite_src_8_8888_process_pixblock_tail_head, \
++    0,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    3,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
++/******************************************************************************/
++
++.macro pixman_composite_src_8888_8_process_pixblock_head
++.endm
++
++.macro pixman_composite_src_8888_8_process_pixblock_tail
++.endm
++
++.macro pixman_composite_src_8888_8_process_pixblock_tail_head
++    vst1.8      {d3}, [DST_W, :64]!
++    vld4.8      {d0, d1, d2, d3}, [SRC]!
++.endm
++
++generate_composite_function_single_scanline \
++    pixman_store_scanline_a8_asm_neon, 32, 0, 8, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8888_8_process_pixblock_head, \
++    pixman_composite_src_8888_8_process_pixblock_tail, \
++    pixman_composite_src_8888_8_process_pixblock_tail_head, \
++    3,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    0,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
++/******************************************************************************/
++
+ .macro pixman_composite_src_8888_0565_process_pixblock_head
+     vshll.u8    q8, d1, #8
+     vshll.u8    q14, d2, #8
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index f88c8f8..43091d2 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -428,6 +428,45 @@ neon_store_scanline_r5g6b5 (bits_image_t *  image,
+     pixman_store_scanline_r5g6b5_asm_neon (width, pixel, values);
+ }
+ 
++void
++pixman_fetch_scanline_a8_asm_neon (int             width,
++                                   uint32_t       *buffer,
++                                   const uint8_t  *pixel);
++
++
++void
++pixman_store_scanline_a8_asm_neon (int             width,
++                                   uint8_t        *pixel,
++                                   const uint32_t *values);
++
++static void
++neon_fetch_scanline_a8 (pixman_image_t *image,
++                        int             x,
++                        int             y,
++                        int             width,
++                        uint32_t *      buffer,
++                        const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint8_t *pixel = (const uint8_t *) bits + x;
++
++    pixman_fetch_scanline_a8_asm_neon (width, buffer, pixel);
++}
++
++static void
++neon_store_scanline_a8 (bits_image_t *  image,
++                        int             x,
++                        int             y,
++                        int             width,
++                        const uint32_t *values)
++{
++    uint32_t *bits = image->bits + image->rowstride * y;
++    uint8_t *pixel = (uint8_t *) bits + x;
++
++    pixman_store_scanline_a8_asm_neon (width, pixel, values);
++}
++
++
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+ {
+@@ -446,6 +485,9 @@ _pixman_implementation_create_arm_neon (void)
+     _pixman_bits_override_accessors (PIXMAN_r5g6b5,
+                                      neon_fetch_scanline_r5g6b5,
+                                      neon_store_scanline_r5g6b5);
++    _pixman_bits_override_accessors (PIXMAN_a8,
++                                     neon_fetch_scanline_a8,
++                                     neon_store_scanline_a8);
+ 
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
new file mode 100644
index 0000000000..7f28f47cff
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
@@ -0,0 +1,77 @@
+From d6ae7da60cc797900b5eff0786536c4a11ab0f50 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Fri, 24 Sep 2010 18:22:44 +0300
+Subject: [PATCH 7/8] ARM: added NEON optimizations for fetching x8r8g8b8 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   14 ++++++++++++++
+ pixman/pixman-arm-neon.c     |   21 +++++++++++++++++++++
+ 2 files changed, 35 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index ca0825c..ffd0b83 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -1206,6 +1206,20 @@ generate_composite_function \
+     0, /* src_basereg   */ \
+     0  /* mask_basereg  */
+ 
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_x888_asm_neon, 32, 0, 32, \
++    FLAG_DST_WRITEONLY, \
++    8, /* number of pixels, processed in a single block */ \
++    pixman_composite_src_x888_8888_init, \
++    default_cleanup, \
++    pixman_composite_src_x888_8888_process_pixblock_head, \
++    pixman_composite_src_x888_8888_process_pixblock_tail, \
++    pixman_composite_src_x888_8888_process_pixblock_tail_head, \
++    0,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    0,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_over_n_8_8888_process_pixblock_head
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index 43091d2..f84b5e6 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -466,6 +466,24 @@ neon_store_scanline_a8 (bits_image_t *  image,
+     pixman_store_scanline_a8_asm_neon (width, pixel, values);
+ }
+ 
++void
++pixman_fetch_scanline_x888_asm_neon (int             width,
++                                     uint32_t       *buffer,
++                                     const uint32_t *pixel);
++
++static void
++neon_fetch_scanline_x888 (pixman_image_t *image,
++                          int             x,
++                          int             y,
++                          int             width,
++                          uint32_t *      buffer,
++                          const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint32_t *pixel = (const uint32_t *) bits + x;
++
++    pixman_fetch_scanline_x888_asm_neon (width, buffer, pixel);
++}
+ 
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+@@ -488,6 +506,9 @@ _pixman_implementation_create_arm_neon (void)
+     _pixman_bits_override_accessors (PIXMAN_a8,
+                                      neon_fetch_scanline_a8,
+                                      neon_store_scanline_a8);
++    _pixman_bits_override_accessors (PIXMAN_x8r8g8b8,
++                                     neon_fetch_scanline_x888,
++                                     NULL);
+ 
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0008-ARM-optimization-for-scaled-src_0565_0565-operation-.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0008-ARM-optimization-for-scaled-src_0565_0565-operation-.patch
new file mode 100644
index 0000000000..6efdb621ad
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.20.0/0008-ARM-optimization-for-scaled-src_0565_0565-operation-.patch
@@ -0,0 +1,172 @@
+From e1191ad6563a1fb02a45982b1c4d7fed3c655e97 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Mon, 4 Oct 2010 01:56:59 +0300
+Subject: [PATCH 8/8] ARM optimization for scaled src_0565_0565 operation with nearest filter
+
+The code actually uses only armv4t instructions.
+
+Benchmark from ARM11:
+
+    == before ==
+    op=1, src_fmt=10020565, dst_fmt=10020565, speed=34.86 MPix/s
+
+    == after ==
+    op=1, src_fmt=10020565, dst_fmt=10020565, speed=36.62 MPix/s
+
+Benchmark from ARM Cortex-A8:
+
+    == before ==
+    op=1, src_fmt=10020565, dst_fmt=10020565, speed=89.55 MPix/s
+
+    == after ==
+    op=1, src_fmt=10020565, dst_fmt=10020565, speed=94.91 MPix/s
+---
+ pixman/pixman-arm-simd-asm.S |   66 ++++++++++++++++++++++++++++++++++++++++++
+ pixman/pixman-arm-simd.c     |   37 +++++++++++++++++++++++
+ 2 files changed, 103 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-simd-asm.S b/pixman/pixman-arm-simd-asm.S
+index a3d2d40..b6f69db 100644
+--- a/pixman/pixman-arm-simd-asm.S
++++ b/pixman/pixman-arm-simd-asm.S
+@@ -1,5 +1,6 @@
+ /*
+  * Copyright © 2008 Mozilla Corporation
++ * Copyright © 2010 Nokia Corporation
+  *
+  * Permission to use, copy, modify, distribute, and sell this software and its
+  * documentation for any purpose is hereby granted without fee, provided that
+@@ -328,3 +329,68 @@ pixman_asm_function pixman_composite_over_n_8_8888_asm_armv6
+ 	pop	{r4, r5, r6, r7, r8, r9, r10, r11}
+ 	bx	lr
+ .endfunc
++
++/*
++ * Note: This function is actually primarily optimized for ARM Cortex-A8
++ * pipeline. In order to get good performance on ARM9/ARM11 cores (which
++ * don't have efficient write combining), it needs to be changed to use
++ * 16-byte aligned writes using STM instruction.
++ */
++pixman_asm_function pixman_scaled_nearest_scanline_565_565_SRC_asm_armv6
++	DST	.req	r0
++	SRC	.req	r1
++	W	.req	r2
++	VX	.req	r3
++	UNIT_X	.req	r12
++	TMP1	.req	r4
++	TMP2	.req	r5
++	MASK	.req	r6
++	ldr	UNIT_X, [sp]
++	push	{r4, r5, r6, r7}
++	mvn	MASK, #1
++
++	/* define helper macro */
++	.macro	scale_2_pixels
++		ldrh	TMP1, [SRC, TMP1]
++		and	TMP2, MASK, VX, lsr #15
++		add	VX, VX, UNIT_X
++		strh	TMP1, [DST], #2
++
++		ldrh	TMP2, [SRC, TMP2]
++		and	TMP1, MASK, VX, lsr #15
++		add	VX, VX, UNIT_X
++		strh	TMP2, [DST], #2
++	.endm
++
++	/* now do the scaling */
++	and	TMP1, MASK, VX, lsr #15
++	add	VX, VX, UNIT_X
++	subs	W, #4
++	blt	2f
++1: /* main loop, process 4 pixels per iteration */
++	scale_2_pixels
++	scale_2_pixels
++	subs	W, W, #4
++	bge	1b
++2:
++	tst	W, #2
++	beq	2f
++	scale_2_pixels
++2:
++	tst	W, #1
++	ldrneh	TMP1, [SRC, TMP1]
++	strneh	TMP1, [DST], #2
++	/* cleanup helper macro */
++	.purgem	scale_2_pixels
++	.unreq	DST
++	.unreq	SRC
++	.unreq	W
++	.unreq	VX
++	.unreq	UNIT_X
++	.unreq	TMP1
++	.unreq	TMP2
++	.unreq	MASK
++	/* return */
++	pop	{r4, r5, r6, r7}
++	bx	lr
++.endfunc
+diff --git a/pixman/pixman-arm-simd.c b/pixman/pixman-arm-simd.c
+index d466a31..f6f464c 100644
+--- a/pixman/pixman-arm-simd.c
++++ b/pixman/pixman-arm-simd.c
+@@ -29,6 +29,7 @@
+ 
+ #include "pixman-private.h"
+ #include "pixman-arm-common.h"
++#include "pixman-fast-path.h"
+ 
+ #if 0 /* This code was moved to 'pixman-arm-simd-asm.S' */
+ 
+@@ -375,6 +376,35 @@ pixman_composite_over_n_8_8888_asm_armv6 (int32_t   width,
+ 
+ #endif
+ 
++void
++pixman_scaled_nearest_scanline_565_565_SRC_asm_armv6 (uint16_t *      dst,
++						      uint16_t *      src,
++						      int32_t         w,
++						      pixman_fixed_t  vx,
++						      pixman_fixed_t  unit_x);
++
++static force_inline void
++scaled_nearest_scanline_armv6_565_565_SRC (uint16_t *      dst,
++					   uint16_t *      src,
++					   int32_t         w,
++					   pixman_fixed_t  vx,
++					   pixman_fixed_t  unit_x,
++					   pixman_fixed_t  max_vx)
++{
++    pixman_scaled_nearest_scanline_565_565_SRC_asm_armv6 (dst, src, w,
++							  vx, unit_x);
++}
++
++FAST_NEAREST_MAINLOOP (armv6_565_565_cover_SRC,
++		       scaled_nearest_scanline_armv6_565_565_SRC,
++		       uint16_t, uint16_t, COVER);
++FAST_NEAREST_MAINLOOP (armv6_565_565_none_SRC,
++		       scaled_nearest_scanline_armv6_565_565_SRC,
++		       uint16_t, uint16_t, NONE);
++FAST_NEAREST_MAINLOOP (armv6_565_565_pad_SRC,
++		       scaled_nearest_scanline_armv6_565_565_SRC,
++		       uint16_t, uint16_t, PAD);
++
+ PIXMAN_ARM_BIND_FAST_PATH_SRC_DST (armv6, add_8_8,
+                                    uint8_t, 1, uint8_t, 1)
+ PIXMAN_ARM_BIND_FAST_PATH_SRC_DST (armv6, over_8888_8888,
+@@ -404,6 +434,13 @@ static const pixman_fast_path_t arm_simd_fast_paths[] =
+     PIXMAN_STD_FAST_PATH (OVER, solid, a8, a8b8g8r8, armv6_composite_over_n_8_8888),
+     PIXMAN_STD_FAST_PATH (OVER, solid, a8, x8b8g8r8, armv6_composite_over_n_8_8888),
+ 
++    SIMPLE_NEAREST_FAST_PATH_COVER (SRC, r5g6b5, r5g6b5, armv6_565_565),
++    SIMPLE_NEAREST_FAST_PATH_COVER (SRC, b5g6r5, b5g6r5, armv6_565_565),
++    SIMPLE_NEAREST_FAST_PATH_NONE (SRC, r5g6b5, r5g6b5, armv6_565_565),
++    SIMPLE_NEAREST_FAST_PATH_NONE (SRC, b5g6r5, b5g6r5, armv6_565_565),
++    SIMPLE_NEAREST_FAST_PATH_PAD (SRC, r5g6b5, r5g6b5, armv6_565_565),
++    SIMPLE_NEAREST_FAST_PATH_PAD (SRC, b5g6r5, b5g6r5, armv6_565_565),
++
+     { PIXMAN_OP_NONE },
+ };
+ 
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0017-add-_pixman_bits_override_accessors.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0017-add-_pixman_bits_override_accessors.patch
new file mode 100644
index 0000000000..b7983b2081
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0017-add-_pixman_bits_override_accessors.patch
@@ -0,0 +1,75 @@
+From 6593d86679fde724e49efa96b16ca22d9521b288 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 10 Dec 2009 00:51:50 +0200
+Subject: [PATCH 17/24] add _pixman_bits_override_accessors
+
+* from patch ARM: HACK: added NEON optimizations for fetch/store r5g6b5 scanline
+* used in
+  0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
+  0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
+  0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
+---
+ pixman/pixman-access.c  |   23 ++++++++++++++++++++++-
+ pixman/pixman-private.h |    5 +++++
+ 2 files changed, 27 insertions(+), 1 deletions(-)
+
+diff --git a/pixman/pixman-access.c b/pixman/pixman-access.c
+index f1ce0ba..b33da29 100644
+--- a/pixman/pixman-access.c
++++ b/pixman/pixman-access.c
+@@ -2836,7 +2836,7 @@ typedef struct
+ 	    store_scanline_ ## format, store_scanline_generic_64	\
+     }
+ 
+-static const format_info_t accessors[] =
++static format_info_t accessors[] =
+ {
+ /* 32 bpp formats */
+     FORMAT_INFO (a8r8g8b8),
+@@ -2978,6 +2978,27 @@ _pixman_bits_image_setup_accessors (bits_image_t *image)
+ 	setup_accessors (image);
+ }
+ 
++void
++_pixman_bits_override_accessors (pixman_format_code_t format,
++                                 fetch_scanline_t     fetch_func,
++                                 store_scanline_t     store_func)
++{
++    format_info_t *info = accessors;
++
++    while (info->format != PIXMAN_null)
++    {
++	if (info->format == format)
++	{
++	    if (fetch_func)
++		info->fetch_scanline_32 = fetch_func;
++	    if (store_func)
++		info->store_scanline_32 = store_func;
++	    return;
++	}
++	info++;
++    }
++}
++
+ #else
+ 
+ void
+diff --git a/pixman/pixman-private.h b/pixman/pixman-private.h
+index 1662d2c..c0f9af4 100644
+--- a/pixman/pixman-private.h
++++ b/pixman/pixman-private.h
+@@ -256,6 +256,11 @@ _pixman_conical_gradient_iter_init (pixman_image_t *image,
+ 				    int x, int y, int width, int height,
+ 				    uint8_t *buffer, iter_flags_t flags);
+ 
++void
++_pixman_bits_override_accessors (pixman_format_code_t format,
++				 fetch_scanline_t     fetch_func,
++				 store_scanline_t     store_func);
++
+ pixman_image_t *
+ _pixman_image_allocate (void);
+ 
+-- 
+1.7.4.rc2
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0018-Generic-C-implementation-of-pixman_blt-with-overlapp.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0018-Generic-C-implementation-of-pixman_blt-with-overlapp.patch
new file mode 100644
index 0000000000..5b1c1089ed
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0018-Generic-C-implementation-of-pixman_blt-with-overlapp.patch
@@ -0,0 +1,114 @@
+From 8e8b2809b505486001dc213becab0d50bfd96c1b Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Tue, 16 Mar 2010 16:55:28 +0100
+Subject: [PATCH 18/24] Generic C implementation of pixman_blt with overlapping support
+
+Uses memcpy/memmove functions to copy pixels, can handle the
+case when both source and destination areas are in the same
+image (this is useful for scrolling).
+
+It is assumed that copying direction is only important when
+using the same image for both source and destination (and
+src_stride == dst_stride). Copying direction is undefined
+for the images with different source and destination stride
+which happen to be in the overlapped areas (but this is an
+unrealistic case anyway).
+---
+ pixman/pixman-general.c |   21 ++++++++++++++++++---
+ pixman/pixman-private.h |   43 +++++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 61 insertions(+), 3 deletions(-)
+
+diff --git a/pixman/pixman-general.c b/pixman/pixman-general.c
+index 4d234a0..c4d2c14 100644
+--- a/pixman/pixman-general.c
++++ b/pixman/pixman-general.c
+@@ -280,9 +280,24 @@ general_blt (pixman_implementation_t *imp,
+              int                      width,
+              int                      height)
+ {
+-    /* We can't blit unless we have sse2 or mmx */
+-
+-    return FALSE;
++    uint8_t *dst_bytes = (uint8_t *)dst_bits;
++    uint8_t *src_bytes = (uint8_t *)src_bits;
++    int bpp;
++
++    if (src_bpp != dst_bpp || src_bpp & 7)
++	return FALSE;
++
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    pixman_blt_helper (src_bytes + src_y * src_stride + src_x * bpp,
++                       dst_bytes + dst_y * dst_stride + dst_x * bpp,
++                       src_stride,
++                       dst_stride,
++                       width,
++                       height);
++    return TRUE;
+ }
+ 
+ static pixman_bool_t
+diff --git a/pixman/pixman-private.h b/pixman/pixman-private.h
+index 969dfab..352bceb 100644
+--- a/pixman/pixman-private.h
++++ b/pixman/pixman-private.h
+@@ -10,6 +10,7 @@
+ 
+ #include "pixman.h"
+ #include <time.h>
++#include <string.h>
+ #include <assert.h>
+ #include <stdio.h>
+ #include <string.h>
+@@ -869,4 +870,46 @@ void pixman_timer_register (pixman_timer_t *timer);
+ 
+ #endif /* PIXMAN_TIMERS */
+ 
++/* a helper function, can blit 8-bit images with src/dst overlapping support */
++static inline void
++pixman_blt_helper (uint8_t *src_bytes,
++                   uint8_t *dst_bytes,
++                   int      src_stride,
++                   int      dst_stride,
++                   int      width,
++                   int      height)
++{
++    /*
++     * The second part of this check is not strictly needed, but it prevents
++     * unnecessary upside-down processing of areas which belong to different
++     * images. Upside-down processing can be slower with fixed-distance-ahead
++     * prefetch and perceived as having more tearing.
++     */
++    if (src_bytes < dst_bytes + width &&
++	src_bytes + src_stride * height > dst_bytes)
++    {
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++	/* Horizontal scrolling to the left needs memmove */
++	if (src_bytes + width > dst_bytes)
++	{
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return;
++	}
++    }
++    while (--height >= 0)
++    {
++	memcpy (dst_bytes, src_bytes, width);
++	dst_bytes += dst_stride;
++	src_bytes += src_stride;
++    }
++}
++
+ #endif /* PIXMAN_PRIVATE_H */
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0019-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0019-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch
new file mode 100644
index 0000000000..5193d38f74
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0019-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch
@@ -0,0 +1,91 @@
+From f5a54f7d5eb1169bc79f0e445e2998e98080ef13 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 22 Oct 2009 05:45:47 +0300
+Subject: [PATCH 19/24] Support of overlapping src/dst for pixman_blt_mmx
+
+---
+ pixman/pixman-mmx.c |   55 +++++++++++++++++++++++++++++---------------------
+ 1 files changed, 32 insertions(+), 23 deletions(-)
+
+diff --git a/pixman/pixman-mmx.c b/pixman/pixman-mmx.c
+index 34637a4..f9dd473 100644
+--- a/pixman/pixman-mmx.c
++++ b/pixman/pixman-mmx.c
+@@ -2996,34 +2996,43 @@ pixman_blt_mmx (uint32_t *src_bits,
+ {
+     uint8_t *   src_bytes;
+     uint8_t *   dst_bytes;
+-    int byte_width;
++    int         bpp;
+ 
+-    if (src_bpp != dst_bpp)
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
+-    if (src_bpp == 16)
+-    {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 2;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 2;
+-	src_bytes = (uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 2 * width;
+-	src_stride *= 2;
+-	dst_stride *= 2;
+-    }
+-    else if (src_bpp == 32)
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
+     {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 4;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 4;
+-	src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 4 * width;
+-	src_stride *= 4;
+-	dst_stride *= 4;
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
+     }
+-    else
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
+     {
+-	return FALSE;
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using MMX */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
+     }
+ 
+     while (height--)
+@@ -3033,7 +3042,7 @@ pixman_blt_mmx (uint32_t *src_bits,
+ 	uint8_t *d = dst_bytes;
+ 	src_bytes += src_stride;
+ 	dst_bytes += dst_stride;
+-	w = byte_width;
++	w = width;
+ 
+ 	while (w >= 2 && ((unsigned long)d & 3))
+ 	{
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0020-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0020-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch
new file mode 100644
index 0000000000..f5c0e12f24
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0020-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch
@@ -0,0 +1,91 @@
+From c8755294fa9ea396f7113370230b17c424a93be1 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 22 Oct 2009 05:45:54 +0300
+Subject: [PATCH 20/24] Support of overlapping src/dst for pixman_blt_sse2
+
+---
+ pixman/pixman-sse2.c |   55 +++++++++++++++++++++++++++++--------------------
+ 1 files changed, 32 insertions(+), 23 deletions(-)
+
+diff --git a/pixman/pixman-sse2.c b/pixman/pixman-sse2.c
+index 5907de0..25015ae 100644
+--- a/pixman/pixman-sse2.c
++++ b/pixman/pixman-sse2.c
+@@ -5027,34 +5027,43 @@ pixman_blt_sse2 (uint32_t *src_bits,
+ {
+     uint8_t *   src_bytes;
+     uint8_t *   dst_bytes;
+-    int byte_width;
++    int         bpp;
+ 
+-    if (src_bpp != dst_bpp)
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
+-    if (src_bpp == 16)
+-    {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 2;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 2;
+-	src_bytes =(uint8_t *)(((uint16_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint16_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 2 * width;
+-	src_stride *= 2;
+-	dst_stride *= 2;
+-    }
+-    else if (src_bpp == 32)
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
+     {
+-	src_stride = src_stride * (int) sizeof (uint32_t) / 4;
+-	dst_stride = dst_stride * (int) sizeof (uint32_t) / 4;
+-	src_bytes = (uint8_t *)(((uint32_t *)src_bits) + src_stride * (src_y) + (src_x));
+-	dst_bytes = (uint8_t *)(((uint32_t *)dst_bits) + dst_stride * (dst_y) + (dst_x));
+-	byte_width = 4 * width;
+-	src_stride *= 4;
+-	dst_stride *= 4;
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
+     }
+-    else
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
+     {
+-	return FALSE;
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using SSE2 */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
+     }
+ 
+     while (height--)
+@@ -5064,7 +5073,7 @@ pixman_blt_sse2 (uint32_t *src_bits,
+ 	uint8_t *d = dst_bytes;
+ 	src_bytes += src_stride;
+ 	dst_bytes += dst_stride;
+-	w = byte_width;
++	w = width;
+ 
+ 	while (w >= 2 && ((unsigned long)d & 3))
+ 	{
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0021-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0021-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch
new file mode 100644
index 0000000000..0eb9d88eba
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0021-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch
@@ -0,0 +1,94 @@
+From 86c8198598ef6d639e656c04644015795cc249aa Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Wed, 18 Nov 2009 06:08:48 +0200
+Subject: [PATCH 21/24] Support of overlapping src/dst for pixman_blt_neon
+
+---
+ pixman/pixman-arm-neon.c |   62 +++++++++++++++++++++++++++++++++++++--------
+ 1 files changed, 51 insertions(+), 11 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index e3eca2b..74316a8 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -199,26 +199,66 @@ pixman_blt_neon (uint32_t *src_bits,
+                  int       width,
+                  int       height)
+ {
+-    if (src_bpp != dst_bpp)
++    uint8_t *   src_bytes;
++    uint8_t *   dst_bytes;
++    int         bpp;
++
++    if (src_bpp != dst_bpp || src_bpp & 7)
+ 	return FALSE;
+ 
++    bpp = src_bpp >> 3;
++    width *= bpp;
++    src_stride *= 4;
++    dst_stride *= 4;
++    src_bytes = (uint8_t *)src_bits + src_y * src_stride + src_x * bpp;
++    dst_bytes = (uint8_t *)dst_bits + dst_y * dst_stride + dst_x * bpp;
++
++    if (src_bpp != 16 && src_bpp != 32)
++    {
++	pixman_blt_helper (src_bytes, dst_bytes, src_stride, dst_stride,
++	                   width, height);
++	return TRUE;
++    }
++
++    if (src_bytes < dst_bytes && src_bytes + src_stride * height > dst_bytes)
++    {
++	src_bytes += src_stride * height - src_stride;
++	dst_bytes += dst_stride * height - dst_stride;
++	dst_stride = -dst_stride;
++	src_stride = -src_stride;
++
++	if (src_bytes + width > dst_bytes)
++	{
++	    /* TODO: reverse scanline copy using NEON */
++	    while (--height >= 0)
++	    {
++		memmove (dst_bytes, src_bytes, width);
++		dst_bytes += dst_stride;
++		src_bytes += src_stride;
++	    }
++	    return TRUE;
++	}
++    }
++
+     switch (src_bpp)
+     {
+     case 16:
+ 	pixman_composite_src_0565_0565_asm_neon (
+-		width, height,
+-		(uint16_t *)(((char *) dst_bits) +
+-		dst_y * dst_stride * 4 + dst_x * 2), dst_stride * 2,
+-		(uint16_t *)(((char *) src_bits) +
+-		src_y * src_stride * 4 + src_x * 2), src_stride * 2);
++		width >> 1,
++		height,
++		(uint16_t *) dst_bytes,
++		dst_stride >> 1,
++		(uint16_t *) src_bytes,
++		src_stride >> 1);
+ 	return TRUE;
+     case 32:
+ 	pixman_composite_src_8888_8888_asm_neon (
+-		width, height,
+-		(uint32_t *)(((char *) dst_bits) +
+-		dst_y * dst_stride * 4 + dst_x * 4), dst_stride,
+-		(uint32_t *)(((char *) src_bits) +
+-		src_y * src_stride * 4 + src_x * 4), src_stride);
++		width >> 2,
++		height,
++		(uint32_t *) dst_bytes,
++		dst_stride >> 2,
++		(uint32_t *) src_bytes,
++		src_stride >> 2);
+ 	return TRUE;
+     default:
+ 	return FALSE;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0022-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0022-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
new file mode 100644
index 0000000000..129c1f1bb6
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0022-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch
@@ -0,0 +1,109 @@
+From 60d972afbae8613d700d3a6b3cb107429d7e11c6 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 10 Dec 2009 00:51:50 +0200
+Subject: [PATCH 22/24] ARM: added NEON optimizations for fetch/store r5g6b5 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   20 ++++++++++++++++++++
+ pixman/pixman-arm-neon.c     |   40 ++++++++++++++++++++++++++++++++++++++++
+ 2 files changed, 60 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index cf014fa..25f7bf0 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -459,6 +459,16 @@ generate_composite_function \
+     pixman_composite_src_8888_0565_process_pixblock_tail, \
+     pixman_composite_src_8888_0565_process_pixblock_tail_head
+ 
++generate_composite_function_single_scanline \
++    pixman_store_scanline_r5g6b5_asm_neon, 32, 0, 16, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8888_0565_process_pixblock_head, \
++    pixman_composite_src_8888_0565_process_pixblock_tail, \
++    pixman_composite_src_8888_0565_process_pixblock_tail_head
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_src_0565_8888_process_pixblock_head
+@@ -494,6 +504,16 @@ generate_composite_function \
+     pixman_composite_src_0565_8888_process_pixblock_tail, \
+     pixman_composite_src_0565_8888_process_pixblock_tail_head
+ 
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_r5g6b5_asm_neon, 16, 0, 32, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_0565_8888_process_pixblock_head, \
++    pixman_composite_src_0565_8888_process_pixblock_tail, \
++    pixman_composite_src_0565_8888_process_pixblock_tail_head
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_add_8_8_process_pixblock_head
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index 74316a8..f773e92 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -448,6 +448,42 @@ BIND_COMBINE_U (over)
+ BIND_COMBINE_U (add)
+ BIND_COMBINE_U (out_reverse)
+ 
++void
++pixman_fetch_scanline_r5g6b5_asm_neon (int             width,
++                                       uint32_t       *buffer,
++                                       const uint16_t *pixel);
++void
++pixman_store_scanline_r5g6b5_asm_neon (int             width,
++                                       uint16_t       *pixel,
++                                       const uint32_t *values);
++
++static void
++neon_fetch_scanline_r5g6b5 (pixman_image_t *image,
++                            int             x,
++                            int             y,
++                            int             width,
++                            uint32_t *      buffer,
++                            const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint16_t *pixel = (const uint16_t *)bits + x;
++
++    pixman_fetch_scanline_r5g6b5_asm_neon (width, buffer, pixel);
++}
++
++static void
++neon_store_scanline_r5g6b5 (bits_image_t *  image,
++                            int             x,
++                            int             y,
++                            int             width,
++                            const uint32_t *values)
++{
++    uint32_t *bits = image->bits + image->rowstride * y;
++    uint16_t *pixel = ((uint16_t *) bits) + x;
++
++    pixman_store_scanline_r5g6b5_asm_neon (width, pixel, values);
++}
++
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+ {
+@@ -463,6 +499,10 @@ _pixman_implementation_create_arm_neon (void)
+     imp->combine_32[PIXMAN_OP_ADD] = neon_combine_add_u;
+     imp->combine_32[PIXMAN_OP_OUT_REVERSE] = neon_combine_out_reverse_u;
+ 
++    _pixman_bits_override_accessors (PIXMAN_r5g6b5,
++                                     neon_fetch_scanline_r5g6b5,
++                                     neon_store_scanline_r5g6b5);
++
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+ 
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0023-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0023-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
new file mode 100644
index 0000000000..7724f5433e
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0023-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch
@@ -0,0 +1,148 @@
+From cc99d8d6fcbabd7f9f3ed99e65c78a2fb71792fa Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Thu, 23 Sep 2010 21:10:56 +0300
+Subject: [PATCH 23/24] ARM: added NEON optimizations for fetch/store a8 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   64 ++++++++++++++++++++++++++++++++++++++++++
+ pixman/pixman-arm-neon.c     |   42 +++++++++++++++++++++++++++
+ 2 files changed, 106 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index 25f7bf0..439b06b 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -418,6 +418,70 @@ generate_composite_function \
+ 
+ /******************************************************************************/
+ 
++.macro pixman_composite_src_8_8888_process_pixblock_head
++    /* This is tricky part: we can't set these values just once in 'init' macro
++     * because leading/trailing pixels handling part uses VZIP.8 instructions,
++     * and they operate on values in-place and destroy original registers
++     * content. Think about it like VST4.8 instruction corrupting NEON
++     * registers after write in 'tail_head' macro. Except that 'tail_head'
++     * macro itself actually does not need these extra VMOVs because it uses
++     * real VST4.8 instruction.
++     */
++    vmov.u8     q0, #0
++    vmov.u8     d2, #0
++.endm
++
++.macro pixman_composite_src_8_8888_process_pixblock_tail
++.endm
++
++.macro pixman_composite_src_8_8888_process_pixblock_tail_head
++    vst4.8      {d0, d1, d2, d3}, [DST_W, :128]!
++    vld1.8      {d3}, [SRC]!
++.endm
++
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_a8_asm_neon, 8, 0, 32, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8_8888_process_pixblock_head, \
++    pixman_composite_src_8_8888_process_pixblock_tail, \
++    pixman_composite_src_8_8888_process_pixblock_tail_head, \
++    0,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    3,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
++/******************************************************************************/
++
++.macro pixman_composite_src_8888_8_process_pixblock_head
++.endm
++
++.macro pixman_composite_src_8888_8_process_pixblock_tail
++.endm
++
++.macro pixman_composite_src_8888_8_process_pixblock_tail_head
++    vst1.8      {d3}, [DST_W, :64]!
++    vld4.8      {d0, d1, d2, d3}, [SRC]!
++.endm
++
++generate_composite_function_single_scanline \
++    pixman_store_scanline_a8_asm_neon, 32, 0, 8, \
++    FLAG_DST_WRITEONLY | FLAG_DEINTERLEAVE_32BPP, \
++    8, /* number of pixels, processed in a single block */ \
++    default_init, \
++    default_cleanup, \
++    pixman_composite_src_8888_8_process_pixblock_head, \
++    pixman_composite_src_8888_8_process_pixblock_tail, \
++    pixman_composite_src_8888_8_process_pixblock_tail_head, \
++    3,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    0,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
++/******************************************************************************/
++
+ .macro pixman_composite_src_8888_0565_process_pixblock_head
+     vshll.u8    q8, d1, #8
+     vshll.u8    q14, d2, #8
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index f773e92..55219b3 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -484,6 +484,45 @@ neon_store_scanline_r5g6b5 (bits_image_t *  image,
+     pixman_store_scanline_r5g6b5_asm_neon (width, pixel, values);
+ }
+ 
++void
++pixman_fetch_scanline_a8_asm_neon (int             width,
++                                   uint32_t       *buffer,
++                                   const uint8_t  *pixel);
++
++
++void
++pixman_store_scanline_a8_asm_neon (int             width,
++                                   uint8_t        *pixel,
++                                   const uint32_t *values);
++
++static void
++neon_fetch_scanline_a8 (pixman_image_t *image,
++                        int             x,
++                        int             y,
++                        int             width,
++                        uint32_t *      buffer,
++                        const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint8_t *pixel = (const uint8_t *) bits + x;
++
++    pixman_fetch_scanline_a8_asm_neon (width, buffer, pixel);
++}
++
++static void
++neon_store_scanline_a8 (bits_image_t *  image,
++                        int             x,
++                        int             y,
++                        int             width,
++                        const uint32_t *values)
++{
++    uint32_t *bits = image->bits + image->rowstride * y;
++    uint8_t *pixel = (uint8_t *) bits + x;
++
++    pixman_store_scanline_a8_asm_neon (width, pixel, values);
++}
++
++
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+ {
+@@ -502,6 +541,9 @@ _pixman_implementation_create_arm_neon (void)
+     _pixman_bits_override_accessors (PIXMAN_r5g6b5,
+                                      neon_fetch_scanline_r5g6b5,
+                                      neon_store_scanline_r5g6b5);
++    _pixman_bits_override_accessors (PIXMAN_a8,
++                                     neon_fetch_scanline_a8,
++                                     neon_store_scanline_a8);
+ 
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0024-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0024-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
new file mode 100644
index 0000000000..8253f41b8f
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman-0.21.4/0024-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch
@@ -0,0 +1,77 @@
+From cf3b8fdc53144ff62c4054996559d3a1a4d62b75 Mon Sep 17 00:00:00 2001
+From: Siarhei Siamashka <siarhei.siamashka@nokia.com>
+Date: Fri, 24 Sep 2010 18:22:44 +0300
+Subject: [PATCH 24/24] ARM: added NEON optimizations for fetching x8r8g8b8 scanline
+
+---
+ pixman/pixman-arm-neon-asm.S |   14 ++++++++++++++
+ pixman/pixman-arm-neon.c     |   21 +++++++++++++++++++++
+ 2 files changed, 35 insertions(+), 0 deletions(-)
+
+diff --git a/pixman/pixman-arm-neon-asm.S b/pixman/pixman-arm-neon-asm.S
+index 439b06b..3e0dcfe 100644
+--- a/pixman/pixman-arm-neon-asm.S
++++ b/pixman/pixman-arm-neon-asm.S
+@@ -1257,6 +1257,20 @@ generate_composite_function \
+     0, /* src_basereg   */ \
+     0  /* mask_basereg  */
+ 
++generate_composite_function_single_scanline \
++    pixman_fetch_scanline_x888_asm_neon, 32, 0, 32, \
++    FLAG_DST_WRITEONLY, \
++    8, /* number of pixels, processed in a single block */ \
++    pixman_composite_src_x888_8888_init, \
++    default_cleanup, \
++    pixman_composite_src_x888_8888_process_pixblock_head, \
++    pixman_composite_src_x888_8888_process_pixblock_tail, \
++    pixman_composite_src_x888_8888_process_pixblock_tail_head, \
++    0,  /* dst_w_basereg */ \
++    0,  /* dst_r_basereg */ \
++    0,  /* src_basereg   */ \
++    0   /* mask_basereg  */
++
+ /******************************************************************************/
+ 
+ .macro pixman_composite_over_n_8_8888_process_pixblock_head
+diff --git a/pixman/pixman-arm-neon.c b/pixman/pixman-arm-neon.c
+index 55219b3..8cef414 100644
+--- a/pixman/pixman-arm-neon.c
++++ b/pixman/pixman-arm-neon.c
+@@ -522,6 +522,24 @@ neon_store_scanline_a8 (bits_image_t *  image,
+     pixman_store_scanline_a8_asm_neon (width, pixel, values);
+ }
+ 
++void
++pixman_fetch_scanline_x888_asm_neon (int             width,
++                                     uint32_t       *buffer,
++                                     const uint32_t *pixel);
++
++static void
++neon_fetch_scanline_x888 (pixman_image_t *image,
++                          int             x,
++                          int             y,
++                          int             width,
++                          uint32_t *      buffer,
++                          const uint32_t *mask)
++{
++    const uint32_t *bits = image->bits.bits + y * image->bits.rowstride;
++    const uint32_t *pixel = (const uint32_t *) bits + x;
++
++    pixman_fetch_scanline_x888_asm_neon (width, buffer, pixel);
++}
+ 
+ pixman_implementation_t *
+ _pixman_implementation_create_arm_neon (void)
+@@ -544,6 +562,9 @@ _pixman_implementation_create_arm_neon (void)
+     _pixman_bits_override_accessors (PIXMAN_a8,
+                                      neon_fetch_scanline_a8,
+                                      neon_store_scanline_a8);
++    _pixman_bits_override_accessors (PIXMAN_x8r8g8b8,
++                                     neon_fetch_scanline_x888,
++                                     NULL);
+ 
+     imp->blt = arm_neon_blt;
+     imp->fill = arm_neon_fill;
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman.inc b/meta-oe/recipes-graphics/xorg-lib/pixman.inc
new file mode 100644
index 0000000000..539a33a888
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman.inc
@@ -0,0 +1,14 @@
+SECTION = "libs"
+PRIORITY = "optional"
+DESCRIPTION = "Low-level pixel manipulation library."
+LICENSE = "X11"
+
+DEPENDS = "perl-native"
+
+BBCLASSEXTEND = "native"
+
+SRC_URI = "http://cairographics.org/releases/${BPN}-${PV}.tar.gz;name=archive "
+
+INC_PR = "r5"
+
+inherit autotools pkgconfig
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman_0.20.0.bb b/meta-oe/recipes-graphics/xorg-lib/pixman_0.20.0.bb
new file mode 100644
index 0000000000..b3fbd4f155
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman_0.20.0.bb
@@ -0,0 +1,23 @@
+require pixman.inc
+
+SRC_URI[archive.md5sum] = "c1a31d5cedfa97c5af7148a2d1fd4356"
+SRC_URI[archive.sha256sum] = "9c02c22c6cc3f28f3633d02ef6f0cac130518f621edb011ebbbf08cd1a81251a"
+
+PR = "${INC_PR}.0"
+
+SRC_URI += "\
+           file://0000-Add-pixman_bits_override_accessors.patch \
+           file://0001-Generic-C-implementation-of-pixman_blt-with-overlapp.patch \
+           file://0002-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch \
+           file://0003-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch \
+           file://0004-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch \
+           file://0005-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch \
+           file://0006-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch \
+           file://0007-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch \
+           file://0008-ARM-optimization-for-scaled-src_0565_0565-operation-.patch \
+"
+
+NEON = " --disable-arm-neon "
+NEON_armv7a = " "
+
+EXTRA_OECONF = "${NEON} --disable-gtk"
diff --git a/meta-oe/recipes-graphics/xorg-lib/pixman_0.21.4.bb b/meta-oe/recipes-graphics/xorg-lib/pixman_0.21.4.bb
new file mode 100644
index 0000000000..f0e9e388b1
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/pixman_0.21.4.bb
@@ -0,0 +1,28 @@
+require pixman.inc
+
+SRC_URI[archive.md5sum] = "e50975ace979cd416a505827c15191b4"
+SRC_URI[archive.sha256sum] = "57783330ee2f96121dc267b7f25b98356fd09fe9de185cd39e72e906b6444013"
+
+LICENSE = "MIT & MIT-style & Public Domain"
+LIC_FILES_CHKSUM = "file://COPYING;md5=14096c769ae0cbb5fcb94ec468be11b3\
+                    file://pixman/pixman-matrix.c;endline=25;md5=ba6e8769bfaaee2c41698755af04c4be \
+                    file://pixman/pixman-arm-neon-asm.h;endline=24;md5=9a9cc1e51abbf1da58f4d9528ec9d49b \
+                    file://pixman/pixman-x64-mmx-emulation.h;beginline=4;endline=9;md5=4e32716f2efaa6c4659222667c339bb8"
+
+PR = "${INC_PR}.0"
+
+SRC_URI += "\
+           file://0017-add-_pixman_bits_override_accessors.patch \
+           file://0018-Generic-C-implementation-of-pixman_blt-with-overlapp.patch \
+           file://0019-Support-of-overlapping-src-dst-for-pixman_blt_mmx.patch \
+           file://0020-Support-of-overlapping-src-dst-for-pixman_blt_sse2.patch \
+           file://0021-Support-of-overlapping-src-dst-for-pixman_blt_neon.patch \
+           file://0022-ARM-added-NEON-optimizations-for-fetch-store-r5g6b5-.patch \
+           file://0023-ARM-added-NEON-optimizations-for-fetch-store-a8-scan.patch \
+           file://0024-ARM-added-NEON-optimizations-for-fetching-x8r8g8b8-s.patch \
+"
+
+NEON = " --disable-arm-neon "
+NEON_armv7a = " "
+
+EXTRA_OECONF = "${NEON} --disable-gtk"
diff --git a/meta-oe/recipes-graphics/xorg-lib/xorg-lib-common.inc b/meta-oe/recipes-graphics/xorg-lib/xorg-lib-common.inc
new file mode 100644
index 0000000000..93212c591f
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-lib/xorg-lib-common.inc
@@ -0,0 +1,19 @@
+HOMEPAGE = "http://www.x.org"
+BUGTRACKER = "https://bugs.freedesktop.org/enter_bug.cgi?product=xorg"
+
+SECTION = "x11/libs"
+LICENSE = "MIT-X"
+DEPENDS = "util-macros"
+
+XORG_PN = "${BPN}"
+INC_PR = "r9"
+
+SRC_URI = "${XORG_MIRROR}/individual/lib/${XORG_PN}-${PV}.tar.bz2"
+
+S = "${WORKDIR}/${XORG_PN}-${PV}"
+
+inherit autotools pkgconfig
+
+EXTRA_OECONF = "--enable-malloc0returnsnull"
+
+BBCLASSEXTEND = "native nativesdk"
diff --git a/meta-oe/recipes-graphics/xorg-proto/renderproto_0.11.1.bb b/meta-oe/recipes-graphics/xorg-proto/renderproto_0.11.1.bb
new file mode 100644
index 0000000000..7e3844847a
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-proto/renderproto_0.11.1.bb
@@ -0,0 +1,15 @@
+require xorg-proto-common.inc
+
+LICENSE = "MIT-style"
+LIC_FILES_CHKSUM = "file://COPYING;md5=f826d99765196352e6122a406cf0d024 \
+                    file://renderproto.h;beginline=4;endline=24;md5=3e5e2851dad240b0a3a27c4776b4fd1f"
+
+CONFLICTS = "renderext"
+PR = "r0"
+PE = "1"
+
+BBCLASSEXTEND = "native nativesdk"
+
+SRC_URI[md5sum] = "a914ccc1de66ddeb4b611c6b0686e274"
+SRC_URI[sha256sum] = "06735a5b92b20759204e4751ecd6064a2ad8a6246bb65b3078b862a00def2537"
+
diff --git a/meta-oe/recipes-graphics/xorg-proto/xorg-proto-common.inc b/meta-oe/recipes-graphics/xorg-proto/xorg-proto-common.inc
new file mode 100644
index 0000000000..3e7c701c79
--- /dev/null
+++ b/meta-oe/recipes-graphics/xorg-proto/xorg-proto-common.inc
@@ -0,0 +1,17 @@
+DESCRIPTION = "X protocol headers: ${BPN}"
+HOMEPAGE = "http://www.x.org"
+SECTION = "x11/libs"
+LICENSE = "MIT-X"
+
+DEPENDS = "util-macros"
+
+ALLOW_EMPTY = "1"
+
+INC_PR = "r2"
+
+SRC_URI = "${XORG_MIRROR}/individual/proto/${BPN}-${PV}.tar.bz2;name=archive"
+
+S = "${WORKDIR}/${BPN}-${PV}"
+
+inherit autotools pkgconfig
+
diff --git a/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base-0.10.30/gst-plugins-base-tremor.patch b/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base-0.10.30/gst-plugins-base-tremor.patch
new file mode 100644
index 0000000000..a6494fd4a9
--- /dev/null
+++ b/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base-0.10.30/gst-plugins-base-tremor.patch
@@ -0,0 +1,17 @@
+Remove -DTREMOR option since Tremor has dropped its internal
+libogg2, and gst-plugins-base has dependency on that.
+
+Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
+
+diff -ruN gst-plugins-base-0.10.30-orig/ext/vorbis/Makefile.am gst-plugins-base-0.10.30/ext/vorbis/Makefile.am
+--- gst-plugins-base-0.10.30-orig/ext/vorbis/Makefile.am	2010-11-17 16:11:03.000000000 +0800
++++ gst-plugins-base-0.10.30/ext/vorbis/Makefile.am	2010-11-17 16:12:41.000000000 +0800
+@@ -28,7 +28,7 @@
+ libgstivorbisdec_la_SOURCES = gstivorbisdec.c \
+ 	gstvorbisdec.c gstvorbisdeclib.c gstvorbiscommon.c
+ libgstivorbisdec_la_CFLAGS = $(GST_PLUGINS_BASE_CFLAGS) $(GST_CFLAGS) \
+-	-DTREMOR $(IVORBIS_CFLAGS)
++	$(IVORBIS_CFLAGS)
+ libgstivorbisdec_la_LIBADD = \
+ 	$(top_builddir)/gst-libs/gst/tag/libgsttag-@GST_MAJORMINOR@.la \
+ 	$(top_builddir)/gst-libs/gst/audio/libgstaudio-@GST_MAJORMINOR@.la \
diff --git a/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base_0.10.30.bb b/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base_0.10.30.bb
new file mode 100644
index 0000000000..9347ef4937
--- /dev/null
+++ b/meta-oe/recipes-multimedia/gstreamer/gst-plugins-base_0.10.30.bb
@@ -0,0 +1,22 @@
+require gst-plugins.inc
+
+LICENSE = "GPLv2+ & LGPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=0636e73ff0215e8d672dc4c32c317bb3 \
+                    file://common/coverage/coverage-report.pl;beginline=2;endline=17;md5=622921ffad8cb18ab906c56052788a3f \
+                    file://COPYING.LIB;md5=55ca817ccb7d5b5b66355690e9abc605 \
+                    file://gst/ffmpegcolorspace/utils.c;beginline=1;endline=20;md5=9c83a200b8e597b26ca29df20fc6ecd0"
+
+DEPENDS += "virtual/libx11 alsa-lib freetype liboil libogg libvorbis libxv libtheora"
+
+SRC_URI += " file://gst-plugins-base-tremor.patch"
+
+PR = "r2"
+
+inherit gettext
+
+EXTRA_OECONF += "--disable-freetypetest --disable-pango"
+
+do_configure_prepend() {
+	# This m4 file contains nastiness which conflicts with libtool 2.2.2
+	rm -f ${S}/m4/lib-link.m4
+}
diff --git a/meta-oe/recipes-multimedia/gstreamer/gst-plugins.inc b/meta-oe/recipes-multimedia/gstreamer/gst-plugins.inc
new file mode 100644
index 0000000000..cd3e0a0a95
--- /dev/null
+++ b/meta-oe/recipes-multimedia/gstreamer/gst-plugins.inc
@@ -0,0 +1,41 @@
+DESCRIPTION = "Plugins for GStreamer"
+HOMEPAGE = "http://gstreamer.freedesktop.org/"
+BUGTRACKER = "https://bugzilla.gnome.org/enter_bug.cgi?product=Gstreamer"
+SECTION = "multimedia"
+PRIORITY = "optional"
+DEPENDS = "gstreamer"
+
+inherit autotools pkgconfig
+
+SRC_URI = "http://gstreamer.freedesktop.org/src/${PN}/${PN}-${PV}.tar.bz2"
+
+EXTRA_OECONF = "--disable-valgrind --disable-debug --disable-examples "
+
+acpaths = "-I ${S}/common/m4 -I ${S}/m4"
+
+LIBV = "0.10"
+#FILES_${PN} += "${libdir}/gstreamer-${LIBV}/*.so"
+#FILES_${PN}-dev += "${libdir}/gstreamer-${LIBV}/*.la ${libdir}/gstreamer-${LIBV}/*.a"
+FILES_${PN}-dbg += "${libdir}/gstreamer-${LIBV}/.debug"
+
+PACKAGES_DYNAMIC = "${PN}-*"
+
+# orc.m4 calls pkg-config ----variable=orcc orc-0.4 to get the path to orcc,
+# resulting in /usr/bin/orcc. Force it to use the staged orcc.
+do_configure_append() {
+ 	for i in $(find ${S} -name "Makefile") ; do
+		sed -i -e s:${bindir}/orcc:${STAGING_BINDIR_NATIVE}/orcc:g $i
+ 	done
+}
+
+python populate_packages_prepend () {
+	gst_libdir = bb.data.expand('${libdir}/gstreamer-${LIBV}', d)
+	postinst = bb.data.getVar('plugin_postinst', d, 1)
+
+#	Can't package separate debug packages yet
+#	do_split_packages(d, gst_libdir, '\.debug/libgst(.*)\.so$', bb.data.expand('${PN}-%s-dbg', d), 'GStreamer plugin for %s (with debugging symbols)', recursive=True, extra_depends=bb.data.expand('${PN}-dbg', d), match_path=True)
+	do_split_packages(d, gst_libdir, 'libgst(.*)\.so$', bb.data.expand('${PN}-%s', d), 'GStreamer plugin for %s', postinst=postinst, extra_depends=bb.data.expand('${PN}',d))
+	do_split_packages(d, gst_libdir, 'libgst(.*)\.l?a$', bb.data.expand('${PN}-%s-dev', d), 'GStreamer plugin for %s (development files)', extra_depends=bb.data.expand('${PN}-dev',d))
+}
+
+ALLOW_EMPTY = "1"
diff --git a/meta-oe/recipes-qt/qt-apps/fotowall_0.9.bb b/meta-oe/recipes-qt/qt-apps/fotowall_0.9.bb
new file mode 100644
index 0000000000..20a5820923
--- /dev/null
+++ b/meta-oe/recipes-qt/qt-apps/fotowall_0.9.bb
@@ -0,0 +1,25 @@
+DESCRIPTION = "Fotowall is a creative tool that allows you to layout your photos or pictures \
+in a personal way. You can add pictures, then resize, move, change colors, text, shadows, etc.."
+
+HOMEPAGE = "http://www.enricoros.com/opensource/fotowall"
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://GPL_V2;md5=79808397c3355f163c012616125c9e26 \
+                    file://main.cpp;beginline=6;endline=11;md5=b569acc2bf8974a3082b58fc53b9d8dc"
+SECTION = "x11/apps"
+
+PR = "r1"
+
+inherit qt4x11 pkgconfig
+
+RRECOMMENDS_${PN} += "qt4-plugin-imageformat-gif qt4-plugin-imageformat-jpeg qt4-plugin-imageformat-tiff"
+
+SRC_URI = "http://qt-apps.org/CONTENT/content-files/71316-Fotowall-0.9.tar.bz2"
+
+SRC_URI[md5sum] = "142ef697332e0777c6d22c5bc96cc438"
+SRC_URI[sha256sum] = "e4d0c005d2cb1d7c09438bfc3098eadebc08946e4fbc0655b7fc8b046de3810d"
+
+S = "${WORKDIR}/Fotowall-${PV}"
+
+do_install() {
+	oe_runmake INSTALL_ROOT=${D} install
+}
diff --git a/meta-oe/recipes-qt/qt-apps/qmmp_0.4.3.bb b/meta-oe/recipes-qt/qt-apps/qmmp_0.4.3.bb
new file mode 100644
index 0000000000..eadef62064
--- /dev/null
+++ b/meta-oe/recipes-qt/qt-apps/qmmp_0.4.3.bb
@@ -0,0 +1,46 @@
+DESCRIPTION = "Qmmp (Qt-based Multimedia Player) is an audio-player, written with help of Qt library"
+HOMEPAGE = "http://qmmp.ylsoftware.com"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=393a5ca445f6965873eca0259a17f833"
+SECTION = "multimedia"
+
+PR = "r0"
+
+DEPENDS = "taglib libmad libvorbis libogg alsa-lib"
+RDEPENDS_${PN} += "taglib alsa-lib curl"
+
+inherit qt4x11 cmake
+
+SRC_URI = "http://qmmp.ylsoftware.com/files/${PN}-${PV}.tar.bz2"
+
+SRC_URI[md5sum] = "b79ce55ed8aca31a29360ff828ce1881"
+SRC_URI[sha256sum] = "a75c2c676515182ecfbe811cba29ba4ca736912e52fde283db4d03eb116457a4"
+
+PARALLEL_MAKE = ""
+
+export EXTRA_OECMAKE = "-DQT_QMAKE_EXECUTABLE=${OE_QMAKE_QMAKE} \
+                        -DQT_LRELEASE_EXECUTABLE=${OE_QMAKE_LRELEASE} \
+                        -DQT_MOC_EXECUTABLE=${OE_QMAKE_MOC} \
+                        -DQT_UIC_EXECUTABLE=${OE_QMAKE_UIC} \
+                        -DQT_RCC_EXECUTABLE=${OE_QMAKE_RCC} \
+                        -DQT_LIBRARY_DIR=${OE_QMAKE_LIBDIR_QT} \
+                        -DQT_HEADERS_DIR=${OE_QMAKE_INCDIR_QT} \
+                        -DQT_QTCORE_INCLUDE_DIR=${OE_QMAKE_INCDIR_QT}/QtCore \
+                        "
+
+FILES_${PN} = "${bindir}/qmmp ${libdir}/*.so* \ 
+               ${libdir}/qmmp/PlaylistFormats/*.so \
+               ${libdir}/qmmp/Output/libalsa.so \
+               ${libdir}/qmmp/Transports/libhttp.so \
+               ${libdir}/qmmp/Visual/libanalyzer.so \
+               ${datadir}/icons/* \
+               ${datadir}/qmmp/images/* \
+               ${datadir}/applications/qmmp.desktop \
+               "
+
+PACKAGES += "${PN}-plugin-input-mad ${PN}-plugin-input-vorbis"
+
+FILES_${PN}-plugin-input-mad = "${libdir}/qmmp/Input/libmad.so"
+RDEPENDS_${PN}-plugin-input-mad = "libmad"
+FILES_${PN}-plugin-input-vorbis = "${libdir}/qmmp/Input/libvorbis.so"
+RDEPENDS_${PN}-plugin-input-vorbis = "libvorbis libogg"
diff --git a/meta-oe/recipes-qt/qt-apps/quicky_0.4.bb b/meta-oe/recipes-qt/qt-apps/quicky_0.4.bb
new file mode 100644
index 0000000000..89894457c7
--- /dev/null
+++ b/meta-oe/recipes-qt/qt-apps/quicky_0.4.bb
@@ -0,0 +1,20 @@
+DESCRIPTION = "A simple note-taking application with Wiki-style syntax and behaviour"
+HOMEPAGE = "http://qt-apps.org/content/show.php/Quicky?content=80325"
+LICENSE = "GPLv2+"
+LIC_FILES_CHKSUM = "file://version.h;endline=19;md5=878bdaff438dab86298301fd1a210e14"
+SECTION = "x11/apps"
+
+PR = "r1"
+
+
+SRC_URI = "http://qt-apps.org/CONTENT/content-files/80325-quicky-0.4.tar.gz"
+
+SRC_URI[md5sum] = "824d9e477ee9c4994f73a3cb215161d9"
+SRC_URI[sha256sum] = "9c66376e0035d44547612bf629890769a6178c3e7eafbcf95f1c6207ac0f352a"
+
+inherit qt4x11
+
+do_install() {
+	install -d ${D}${bindir}
+	install -m 0755 ${S}/${PN} ${D}${bindir}
+}
diff --git a/meta-oe/recipes-qt/qt4/files/0001-cross-compile.patch b/meta-oe/recipes-qt/qt4/files/0001-cross-compile.patch
new file mode 100644
index 0000000000..053be06e54
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0001-cross-compile.patch
@@ -0,0 +1,36 @@
+Add configure option "crossarch" for cross compiling
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+Index: qt-embedded-linux-opensource-src-4.4.3/configure
+===================================================================
+--- qt-embedded-linux-opensource-src-4.4.3.orig/configure	2009-03-26 17:02:45.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.4.3/configure	2009-03-26 17:03:43.000000000 +0100
+@@ -726,7 +726,7 @@
+             UNKNOWN_ARG=yes
+         fi
+         ;;
+-    -prefix|-docdir|-headerdir|-plugindir|-datadir|-libdir|-bindir|-translationdir|-sysconfdir|-examplesdir|-demosdir|-depths|-make|-nomake|-platform|-xplatform|-buildkey|-sdk|-arch|-host-arch|-mysql_config)
++    -prefix|-docdir|-headerdir|-plugindir|-datadir|-libdir|-bindir|-translationdir|-sysconfdir|-examplesdir|-demosdir|-depths|-make|-nomake|-platform|-xplatform|-buildkey|-sdk|-arch|-host-arch|-mysql_config|-crossarch)
+         VAR=`echo $1 | sed "s,^-\(.*\),\1,"`
+         shift
+         VAL="$1"
+@@ -1143,6 +1143,9 @@
+     xplatform)
+         XPLATFORM="$VAL"
+         ;;
++	crossarch)
++		CROSSARCH="$VAL"
++		;;
+     debug-and-release)
+         if [ "$VAL" = "yes" ] || [ "$VAL" = "no" ]; then
+             CFG_DEBUG_RELEASE="$VAL"
+@@ -2405,6 +2408,8 @@
+     CFG_ARCH=$CFG_HOST_ARCH
+ fi
+ 
++CFG_ARCH="$CROSSARCH"
++
+ if [ -d "$relpath/src/corelib/arch/$CFG_ARCH" ]; then
+     if [ "$OPT_VERBOSE" = "yes" ]; then
+         echo "    '$CFG_ARCH' is supported"
diff --git a/meta-oe/recipes-qt/qt4/files/0001-fix-mkspecs.patch b/meta-oe/recipes-qt/qt4/files/0001-fix-mkspecs.patch
new file mode 100644
index 0000000000..0fccb57c04
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0001-fix-mkspecs.patch
@@ -0,0 +1,102 @@
+--- /tmp/g++.conf	2008-07-08 10:32:18.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.0/mkspecs/common/g++.conf	2008-07-08 10:34:15.000000000 +0200
+@@ -2,12 +2,12 @@
+ # qmake configuration for common gcc
+ #
+ 
+-QMAKE_CC		= gcc
+-QMAKE_CFLAGS		+= -pipe
++QMAKE_CC       = $(OE_QMAKE_CC)
++QMAKE_CFLAGS       += -pipe $(OE_QMAKE_CFLAGS)
+ QMAKE_CFLAGS_DEPS	+= -M
+ QMAKE_CFLAGS_WARN_ON	+= -Wall -W
+ QMAKE_CFLAGS_WARN_OFF	+= -w
+-QMAKE_CFLAGS_RELEASE	+= -O2
++QMAKE_CFLAGS_RELEASE	+= 
+ QMAKE_CFLAGS_DEBUG	+= -g
+ QMAKE_CFLAGS_SHLIB	+= -fPIC
+ QMAKE_CFLAGS_STATIC_LIB	+= -fPIC
+@@ -16,8 +16,8 @@
+ QMAKE_CFLAGS_PRECOMPILE += -x c-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+ QMAKE_CFLAGS_USE_PRECOMPILE += -include ${QMAKE_PCH_OUTPUT_BASE}
+ 
+-QMAKE_CXX		= g++
+-QMAKE_CXXFLAGS		+= $$QMAKE_CFLAGS
++QMAKE_CXX      = $(OE_QMAKE_CXX)
++QMAKE_CXXFLAGS     += $$QMAKE_CFLAGS $(OE_QMAKE_CXXFLAGS)
+ QMAKE_CXXFLAGS_DEPS	+= $$QMAKE_CFLAGS_DEPS
+ QMAKE_CXXFLAGS_WARN_ON	+= $$QMAKE_CFLAGS_WARN_ON
+ QMAKE_CXXFLAGS_WARN_OFF	+= $$QMAKE_CFLAGS_WARN_OFF
+@@ -30,9 +30,9 @@
+ QMAKE_CXXFLAGS_PRECOMPILE += -x c++-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+ QMAKE_CXXFLAGS_USE_PRECOMPILE = $$QMAKE_CFLAGS_USE_PRECOMPILE
+ 
+-QMAKE_LINK		= g++
+-QMAKE_LINK_SHLIB	= g++
+-QMAKE_LFLAGS		+=
++QMAKE_LINK     = $(OE_QMAKE_LINK)
++QMAKE_LINK_SHLIB   = $(OE_QMAKE_LINK)
++QMAKE_LFLAGS       += $(OE_QMAKE_LDFLAGS)
+ QMAKE_LFLAGS_RELEASE	+=
+ QMAKE_LFLAGS_DEBUG	+=
+ QMAKE_LFLAGS_APP	+=
+@@ -41,7 +41,7 @@
+ QMAKE_LFLAGS_SONAME	+= -Wl,-soname,
+ QMAKE_LFLAGS_THREAD	+=
+ QMAKE_LFLAGS_NOUNDEF	+= -Wl,--no-undefined
+-QMAKE_RPATH		= -Wl,-rpath,
++QMAKE_RPATH        = -Wl,-rpath-link,
+ 
+ QMAKE_PCH_OUTPUT_EXT    = .gch
+ 
+--- /tmp/linux.conf	2008-07-08 10:32:18.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.0/mkspecs/common/linux.conf	2008-07-08 10:38:37.000000000 +0200
+@@ -7,26 +7,28 @@
+ 
+ QMAKE_INCDIR          =
+ QMAKE_LIBDIR          =
+-QMAKE_INCDIR_X11      = /usr/X11R6/include
+-QMAKE_LIBDIR_X11      = /usr/X11R6/lib
+-QMAKE_INCDIR_QT       = $$[QT_INSTALL_HEADERS]
+-QMAKE_LIBDIR_QT       = $$[QT_INSTALL_LIBS]
+-QMAKE_INCDIR_OPENGL   = /usr/X11R6/include
+-QMAKE_LIBDIR_OPENGL   = /usr/X11R6/lib
++QMAKE_INCDIR_X11      =
++QMAKE_LIBDIR_X11      =
++QMAKE_INCDIR_QT       = $(OE_QMAKE_INCDIR_QT)
++QMAKE_LIBDIR_QT       = $(OE_QMAKE_LIBDIR_QT)
++QMAKE_INCDIR_OPENGL   =
++QMAKE_LIBDIR_OPENGL   =
++
+ 
+ QMAKE_LIBS            =
+ QMAKE_LIBS_DYNLOAD    = -ldl
+-QMAKE_LIBS_X11        = -lXext -lX11 -lm
+-QMAKE_LIBS_X11SM      = -lSM -lICE
++QMAKE_LIBS_X11        = $(OE_QMAKE_LIBS_X11)
++QMAKE_LIBS_X11SM      = $(OE_QMAKE_LIBS_X11SM)
+ QMAKE_LIBS_NIS        = -lnsl
+ QMAKE_LIBS_OPENGL     = -lGLU -lGL
+ QMAKE_LIBS_OPENGL_QT  = -lGL
+ QMAKE_LIBS_THREAD     = -lpthread
+ 
+-QMAKE_MOC             = $$[QT_INSTALL_BINS]/moc
+-QMAKE_UIC             = $$[QT_INSTALL_BINS]/uic
++QMAKE_MOC             = $(OE_QMAKE_MOC)
++QMAKE_UIC             = $(OE_QMAKE_UIC)
++QMAKE_RCC             = $(OE_QMAKE_RCC)
+ 
+-QMAKE_AR              = ar cqs
++QMAKE_AR              = $(OE_QMAKE_AR) cqs
+ QMAKE_OBJCOPY         = objcopy
+ QMAKE_RANLIB          =
+ 
+@@ -39,7 +40,7 @@
+ QMAKE_MOVE            = mv -f
+ QMAKE_DEL_FILE        = rm -f
+ QMAKE_DEL_DIR         = rmdir
+-QMAKE_STRIP           = strip
++QMAKE_STRIP           = $(OE_QMAKE_STRIP)
+ QMAKE_STRIPFLAGS_LIB += --strip-unneeded
+ QMAKE_CHK_DIR_EXISTS  = test -d
+ QMAKE_MKDIR           = mkdir -p
diff --git a/meta-oe/recipes-qt/qt4/files/0002-fix-resinit-declaration.patch b/meta-oe/recipes-qt/qt4/files/0002-fix-resinit-declaration.patch
new file mode 100644
index 0000000000..be4d5c0e22
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0002-fix-resinit-declaration.patch
@@ -0,0 +1,22 @@
+From acfeb18aa94bad6b2066e91cd15570889baaa252 Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Sat, 2 Jun 2007 16:04:01 +0200
+Subject: [PATCH] fix resinit declaration
+
+---
+ src/qt3support/network/q3dns.cpp |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.4.3/src/qt3support/network/q3dns.cpp
+===================================================================
+--- qt-embedded-linux-opensource-src-4.4.3.orig/src/qt3support/network/q3dns.cpp	2008-09-27 11:01:28.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.3/src/qt3support/network/q3dns.cpp	2009-03-26 17:04:05.000000000 +0100
+@@ -44,7 +44,7 @@
+ # include <netinet/in.h>
+ # include <arpa/nameser.h>
+ # include <resolv.h>
+-extern "C" int res_init();
++extern "C" int res_init() throw();
+ #endif
+ 
+ // POSIX Large File Support redefines open -> open64
diff --git a/meta-oe/recipes-qt/qt4/files/0004-no-qmake.patch b/meta-oe/recipes-qt/qt4/files/0004-no-qmake.patch
new file mode 100644
index 0000000000..a58b19f904
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0004-no-qmake.patch
@@ -0,0 +1,26 @@
+From f5a73ce944240de9013cc23288c115e8213add5e Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Sat, 2 Jun 2007 16:06:59 +0200
+Subject: [PATCH] no qmake
+
+qmake is already built in qt4-tools-native, so disable it
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+---
+ configure |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.4.3/configure
+===================================================================
+--- qt-embedded-linux-opensource-src-4.4.3.orig/configure	2009-03-26 17:03:43.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.4.3/configure	2009-03-26 17:04:17.000000000 +0100
+@@ -3786,7 +3786,7 @@
+ }
+ 
+ # build qmake
+-if true; then ###[ '!' -f "$outpath/bin/qmake" ];
++if false; then ###[ '!' -f "$outpath/bin/qmake" ];
+     echo "Creating qmake. Please wait..."
+ 
+     OLD_QCONFIG_H=
diff --git a/meta-oe/recipes-qt/qt4/files/0006-freetype-host-includes.patch b/meta-oe/recipes-qt/qt4/files/0006-freetype-host-includes.patch
new file mode 100644
index 0000000000..081d8992ef
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0006-freetype-host-includes.patch
@@ -0,0 +1,24 @@
+From c9ab62bd9a56643574b3ae6e59e0ca776d4860d2 Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Mon, 4 Jun 2007 14:48:50 +0200
+Subject: [PATCH] freetype host includes
+
+Host include path should not be used in corss compiling case.
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+---
+ config.tests/unix/freetype/freetype.pri |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/config.tests/unix/freetype/freetype.pri	2009-02-25 22:32:32.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri	2009-03-26 17:14:16.000000000 +0100
+@@ -1,5 +1,5 @@
+ !cross_compile {
+-    TRY_INCLUDEPATHS = /include /usr/include $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
++    TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     # LSB doesn't allow using headers from /include or /usr/include
+     linux-lsb-g++:TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     for(p, TRY_INCLUDEPATHS) {
diff --git a/meta-oe/recipes-qt/qt4/files/0008-qt-lib-infix.patch b/meta-oe/recipes-qt/qt4/files/0008-qt-lib-infix.patch
new file mode 100644
index 0000000000..a1b89124dd
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0008-qt-lib-infix.patch
@@ -0,0 +1,36 @@
+Add lib infix to distinguish different qt compile version: e.g. "E" for embedded, "" for X11
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+--- /tmp/uitools.prf	2009-12-01 18:38:22.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/mkspecs/features/uitools.prf	2009-12-01 18:58:16.000000000 +0100
+@@ -3,11 +3,11 @@
+ 
+ # Include the correct version of the UiLoader library
+ symbian: QTUITOOLS_LINKAGE = -lQtUiTools.lib
+-else: QTUITOOLS_LINKAGE = -lQtUiTools
++else: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}
+ 
+ CONFIG(debug, debug|release) {
+-    mac: QTUITOOLS_LINKAGE = -lQtUiTools_debug
+-    win32: QTUITOOLS_LINKAGE = -lQtUiToolsd
++    mac: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}_debug
++    win32: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}d
+ }
+ LIBS += $$QTUITOOLS_LINKAGE
+ 
+--- /tmp/uitools.pro	2009-12-01 18:40:28.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/tools/designer/src/uitools/uitools.pro	2009-12-01 18:59:18.000000000 +0100
+@@ -1,5 +1,5 @@
+ TEMPLATE = lib
+-TARGET = $$qtLibraryTarget(QtUiTools)
++TARGET = QtUiTools
+ QT += xml
+ CONFIG += qt staticlib
+ DESTDIR = ../../../../lib
+@@ -43,3 +43,5 @@
+    QMAKE_PKGCONFIG_DESTDIR = pkgconfig
+    QMAKE_PKGCONFIG_REQUIRES += QtXml
+ }
++
++TARGET = $$qtLibraryTarget($$TARGET$$QT_LIBINFIX) #do this towards the end
diff --git a/meta-oe/recipes-qt/qt4/files/0009-support-2bpp.patch b/meta-oe/recipes-qt/qt4/files/0009-support-2bpp.patch
new file mode 100644
index 0000000000..cf44ea8214
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0009-support-2bpp.patch
@@ -0,0 +1,299 @@
+Add 2bpp support
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+diff -urN qt-embedded-linux-opensource-src-4.4.3.orig/configure qt-embedded-linux-opensource-src-4.4.3/configure
+--- qt-embedded-linux-opensource-src-4.4.3.orig/configure	2008-09-27 11:01:23.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.3/configure	2009-01-14 14:30:53.000000000 +0100
+@@ -5045,6 +5045,7 @@
+     echo "Choose pixel-depths to support:"
+     echo
+     echo "   1. 1bpp, black/white"
++    echo "   2. 2bpp, grayscale"
+     echo "   4. 4bpp, grayscale"
+     echo "   8. 8bpp, paletted"
+     echo "  12. 12bpp, rgb 4-4-4"
+@@ -5063,11 +5064,11 @@
+ fi
+ if [ -n "$CFG_QWS_DEPTHS" -a "$PLATFORM_QWS" = "yes" ]; then
+     if [ "$CFG_QWS_DEPTHS" = "all" ]; then
+-        CFG_QWS_DEPTHS="1 4 8 12 15 16 18 24 32 generic"
++        CFG_QWS_DEPTHS="1 2 4 8 12 15 16 18 24 32 generic"
+     fi
+     for D in `echo "$CFG_QWS_DEPTHS" | sed -e 's/,/ /g'`; do
+ 	case $D in
+-	    1|4|8|12|15|16|18|24|32) QCONFIG_FLAGS="$QCONFIG_FLAGS QT_QWS_DEPTH_$D";;
++	    1|2|4|8|12|15|16|18|24|32) QCONFIG_FLAGS="$QCONFIG_FLAGS QT_QWS_DEPTH_$D";;
+ 	    generic) QCONFIG_FLAGS="$QCONFIG_FLAGS QT_QWS_DEPTH_GENERIC";;
+ 	esac
+     done
+diff -urN qt-embedded-linux-opensource-src-4.4.3.orig/src/gui/embedded/qscreenlinuxfb_qws.cpp qt-embedded-linux-opensource-src-4.4.3/src/gui/embedded/qscreenlinuxfb_qws.cpp
+--- qt-embedded-linux-opensource-src-4.4.3.orig/src/gui/embedded/qscreenlinuxfb_qws.cpp	2008-09-27 11:01:28.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.3/src/gui/embedded/qscreenlinuxfb_qws.cpp	2009-01-14 17:22:34.000000000 +0100
+@@ -404,8 +404,8 @@
+         setupOffScreen();
+ 
+     // Now read in palette
+-    if((vinfo.bits_per_pixel==8) || (vinfo.bits_per_pixel==4)) {
+-        screencols= (vinfo.bits_per_pixel==8) ? 256 : 16;
++    if((vinfo.bits_per_pixel==8) || (vinfo.bits_per_pixel==4) || (vinfo.bits_per_pixel==2)) {
++        screencols= 1 << vinfo.bits_per_pixel;
+         int loopc;
+         fb_cmap startcmap;
+         startcmap.start=0;
+diff -urN qt-embedded-linux-opensource-src-4.4.3.orig/src/gui/embedded/qscreen_qws.cpp qt-embedded-linux-opensource-src-4.4.3/src/gui/embedded/qscreen_qws.cpp
+--- qt-embedded-linux-opensource-src-4.4.3.orig/src/gui/embedded/qscreen_qws.cpp	2008-09-27 11:01:28.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.3/src/gui/embedded/qscreen_qws.cpp	2009-01-14 17:22:44.000000000 +0100
+@@ -444,6 +444,58 @@
+ }
+ #endif // QT_QWS_DEPTH_4
+ 
++#ifdef QT_QWS_DEPTH_2
++static inline void qt_rectfill_gray2(quint8 *dest, quint8 value,
++                                     int x, int y, int width, int height,
++                                     int stride)
++{
++    const int pixelsPerByte = 4;
++    const int alignWidth = qMin(width, (4 - (x & 3)) & 3);
++    const int doAlign = (alignWidth > 0 ? 1 : 0);
++    const int alignStart = pixelsPerByte - 1 - (x & 3);
++    const int alignStop = alignStart - (alignWidth - 1);
++    const quint8 alignMask = ((1 << (2 * alignWidth)) - 1) << (2 * alignStop);
++    const int tailWidth = (width - alignWidth) & 3;
++    const int doTail = (tailWidth > 0 ? 1 : 0);
++    const quint8 tailMask = (1 << (2 * (pixelsPerByte - tailWidth))) - 1;
++    const int width8 = (width - alignWidth) / pixelsPerByte;
++
++    dest += y * stride + x / pixelsPerByte;
++    stride -= (doAlign + width8);
++
++    for (int j = 0; j < height; ++j) {
++        if (doAlign) {
++            *dest = (*dest & ~alignMask) | (value & alignMask);
++            ++dest;
++        }
++        if (width8) {
++            qt_memfill<quint8>(dest, value, width8);
++            dest += width8;
++        }
++        if (doTail)
++            *dest = (*dest & tailMask) | (value & ~tailMask);
++        dest += stride;
++    }
++}
++
++static void solidFill_gray2(QScreen *screen, const QColor &color,
++                            const QRegion &region)
++{
++    quint8 *dest = reinterpret_cast<quint8*>(screen->base());
++    const quint8 c = qGray(color.rgba()) >> 6;
++    const quint8 c8 = (c << 6) | (c << 4) | (c << 2) | c;
++
++    const int stride = screen->linestep();
++    const QVector<QRect> rects = region.rects();
++
++    for (int i = 0; i < rects.size(); ++i) {
++        const QRect r = rects.at(i);
++        qt_rectfill_gray2(dest, c8, r.x(), r.y(), r.width(), r.height(),
++                          stride);
++    }
++}
++#endif // QT_QWS_DEPTH_2
++
+ #ifdef QT_QWS_DEPTH_1
+ static inline void qt_rectfill_mono(quint8 *dest, quint8 value,
+                                     int x, int y, int width, int height,
+@@ -551,6 +603,11 @@
+         screen->d_ptr->solidFill = solidFill_gray4;
+         break;
+ #endif
++#ifdef QT_QWS_DEPTH_2
++    case 2:
++        screen->d_ptr->solidFill = solidFill_gray2;
++        break;
++#endif
+ #ifdef QT_QWS_DEPTH_1
+     case 1:
+         screen->d_ptr->solidFill = solidFill_mono;
+@@ -958,6 +1015,149 @@
+ }
+ #endif // QT_QWS_DEPTH_4
+ 
++#ifdef QT_QWS_DEPTH_2
++
++struct qgray2 { quint8 dummy; } Q_PACKED;
++
++template <typename SRC>
++static inline quint8 qt_convertToGray2(SRC color);
++
++template <>
++inline quint8 qt_convertToGray2(quint32 color)
++{
++    return qGray(color) >> 6;
++}
++
++template <>
++inline quint8 qt_convertToGray2(quint16 color)
++{
++    const int r = (color & 0xf800) >> 11;
++    const int g = (color & 0x07e0) >> 6; // only keep 5 bit
++    const int b = (color & 0x001f);
++    return (r * 11 + g * 16 + b * 5) >> 8;
++}
++
++template <>
++inline quint8 qt_convertToGray2(qrgb444 color)
++{
++    return qt_convertToGray2(quint32(color));
++}
++
++template <>
++inline quint8 qt_convertToGray2(qargb4444 color)
++{
++    return qt_convertToGray2(quint32(color));
++}
++
++template <typename SRC>
++static inline void qt_rectconvert_gray2(qgray2 *dest2, const SRC *src,
++                                        int x, int y, int width, int height,
++                                        int dstStride, int srcStride)
++{
++    const int pixelsPerByte = 4;
++    quint8 *dest8 = reinterpret_cast<quint8*>(dest2)
++                    + y * dstStride + x / pixelsPerByte;
++    const int alignWidth = qMin(width, (4 - (x & 3)) & 3);
++    const int doAlign = (alignWidth > 0 ? 1 : 0);
++    const int alignStart = pixelsPerByte - 1 - (x & 3);
++    const int alignStop = alignStart - (alignWidth - 1);
++    const quint8 alignMask = ((1 << (2 * alignWidth)) - 1) << (2 * alignStop);
++    const int tailWidth = (width - alignWidth) & 3;
++    const int doTail = (tailWidth > 0 ? 1 : 0);
++    const quint8 tailMask = (1 << (2 * (pixelsPerByte - tailWidth))) - 1;
++    const int width8 = (width - alignWidth) / pixelsPerByte;
++
++    srcStride = srcStride / sizeof(SRC) - (width8 * pixelsPerByte + alignWidth);
++    dstStride -= (width8 + doAlign);
++
++    for (int j = 0;  j < height; ++j) {
++        if (doAlign) {
++            quint8 d = *dest8 & ~alignMask;
++            for (int i = alignStart; i >= alignStop; --i)
++                d |= qt_convertToGray2<SRC>(*src++) << (2 * i);
++            *dest8++ = d;
++        }
++        for (int i = 0; i < width8; ++i) {
++            *dest8 = (qt_convertToGray2<SRC>(src[0]) << 6)
++                     | (qt_convertToGray2<SRC>(src[1]) << 4)
++                     | (qt_convertToGray2<SRC>(src[2]) << 2)
++                     | (qt_convertToGray2<SRC>(src[3]));
++            src += 4;
++            ++dest8;
++        }
++        if (doTail) {
++            quint8 d = *dest8 & tailMask;
++            switch (tailWidth) {
++            case 3: d |= qt_convertToGray2<SRC>(src[2]) << 2;
++            case 2: d |= qt_convertToGray2<SRC>(src[1]) << 4;
++            case 1: d |= qt_convertToGray2<SRC>(src[0]) << 6;
++            }
++            *dest8 = d;
++        }
++
++        dest8 += dstStride;
++        src += srcStride;
++    }
++}
++
++template <>
++void qt_rectconvert(qgray2 *dest, const quint32 *src,
++                    int x, int y, int width, int height,
++                    int dstStride, int srcStride)
++{
++    qt_rectconvert_gray2<quint32>(dest, src, x, y, width, height,
++                                  dstStride, srcStride);
++}
++
++template <>
++void qt_rectconvert(qgray2 *dest, const quint16 *src,
++                    int x, int y, int width, int height,
++                    int dstStride, int srcStride)
++{
++    qt_rectconvert_gray2<quint16>(dest, src, x, y, width, height,
++                                  dstStride, srcStride);
++}
++
++template <>
++void qt_rectconvert(qgray2 *dest, const qrgb444 *src,
++                    int x, int y, int width, int height,
++                    int dstStride, int srcStride)
++{
++    qt_rectconvert_gray2<qrgb444>(dest, src, x, y, width, height,
++                                  dstStride, srcStride);
++}
++
++template <>
++void qt_rectconvert(qgray2 *dest, const qargb4444 *src,
++                    int x, int y, int width, int height,
++                    int dstStride, int srcStride)
++{
++    qt_rectconvert_gray2<qargb4444>(dest, src, x, y, width, height,
++                                    dstStride, srcStride);
++}
++
++static void blit_2(QScreen *screen, const QImage &image,
++                   const QPoint &topLeft, const QRegion &region)
++{
++    switch (image.format()) {
++    case QImage::Format_ARGB32_Premultiplied:
++        blit_template<qgray2, quint32>(screen, image, topLeft, region);
++        return;
++    case QImage::Format_RGB16:
++        blit_template<qgray2, quint16>(screen, image, topLeft, region);
++        return;
++    case QImage::Format_RGB444:
++        blit_template<qgray2, qrgb444>(screen, image, topLeft, region);
++        return;
++    case QImage::Format_ARGB4444_Premultiplied:
++        blit_template<qgray2, qargb4444>(screen, image, topLeft, region);
++        return;
++    default:
++        qCritical("blit_2(): Image format %d not supported!", image.format());
++    }
++}
++#endif // QT_QWS_DEPTH_2
++
+ #ifdef QT_QWS_DEPTH_1
+ 
+ struct qmono { quint8 dummy; } Q_PACKED;
+@@ -1206,6 +1406,11 @@
+         screen->d_ptr->blit = blit_4;
+         break;
+ #endif
++#ifdef QT_QWS_DEPTH_2
++    case 2:
++        screen->d_ptr->blit = blit_2;
++        break;
++#endif
+ #ifdef QT_QWS_DEPTH_1
+     case 1:
+         screen->d_ptr->blit = blit_1;
+@@ -2056,6 +2261,8 @@
+         }
+     } else if (d == 4) {
+         ret = qGray(r, g, b) >> 4;
++    } else if (d == 2) {
++        ret = qGray(r, g, b) >> 6;
+     } else if (d == 1) {
+         ret = qGray(r, g, b) >= 128;
+     } else {
+@@ -2126,6 +2333,10 @@
+     } else if(d==1) {
+         return true;
+ #endif
++#ifdef QT_QWS_DEPTH_2
++    } else if(d==2) {
++        return true;
++#endif
+ #ifdef QT_QWS_DEPTH_4
+     } else if(d==4) {
+         return true;
diff --git a/meta-oe/recipes-qt/qt4/files/0010-no-simpledecoration-example.patch b/meta-oe/recipes-qt/qt4/files/0010-no-simpledecoration-example.patch
new file mode 100644
index 0000000000..e52736926f
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/0010-no-simpledecoration-example.patch
@@ -0,0 +1,14 @@
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+--- /tmp/qws.pro	2009-12-10 19:30:08.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/examples/qws/qws.pro	2009-12-10 19:30:21.000000000 +0100
+@@ -1,7 +1,7 @@
+ TEMPLATE      = subdirs
+ # no /dev/fbX
+ !qnx:!vxworks:SUBDIRS = framebuffer
+-SUBDIRS      += mousecalibration simpledecoration
++SUBDIRS      += mousecalibration
+ 
+ # install
+ sources.files = $$SOURCES $$HEADERS $$RESOURCES $$FORMS README *.pro
diff --git a/meta-oe/recipes-qt/qt4/files/common.pro b/meta-oe/recipes-qt/qt4/files/common.pro
new file mode 100644
index 0000000000..382d93f5d1
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/common.pro
@@ -0,0 +1,108 @@
+#====================================================================================
+# common.pro (C) 2004 Michael 'Mickey' Lauer <mickey@Vanille.de>
+#====================================================================================
+#
+# Purpose: This file contains qmake scope rules of common usage
+#
+# Example: When building a qmake based application using libsdl,
+#          use CONFIG+=sdl to add the proper include and library
+#          paths and definitions to the resulting Makefile
+#
+#
+# General problem: One has to decide between evaluation at makefile generation time
+#                  and evaluation at makefile processing time.
+#                  The following example illustrates the difference:
+#
+# Evaluation at makefile processing time:
+#
+# sdl {
+#     QMAKE_CFLAGS    += `sdl-config --cflags`
+#     LIBS            += `sdl-config --libs`
+# }
+#
+# Evalutation at makefile generation time:
+#
+# sdl {
+#     QMAKE_CFLAGS    += $$system( sdl-config --cflags )
+#     LIBS            += `sdl-config --libs`
+# }
+#
+# For now I use version 2 which is a bit faster
+# See the fine qmake manual for more details
+#
+#
+
+#=============================================================================
+# pthread scope for multithreaded applications
+#
+
+pthread {
+    LIBS += -lpthread
+}
+
+#=============================================================================
+# sdl scopes for applications using the Simple Direct Media Layer (SDL)
+#
+
+sdl {
+    QMAKE_CXXFLAGS  += $$system( sdl-config --cflags )
+    DEFINES         += USE_SDL QTOPIA
+    LIBS            += $$system( sdl-config --libs )
+}
+
+sdl-mixer {
+    LIBS            += -lSDL_mixer
+}
+
+sdl-image {
+    LIBS            += -lSDL_image
+}
+
+sdl-font {
+    LIBS            += -lSDL_ttf
+}
+
+#=============================================================================
+#
+#
+
+opie {
+    DEFINES         += QWS
+}
+
+opiecore {
+    LIBS            += -lopiecore2
+}
+
+opieui {
+    CONFIG          += opiecore
+    LIBS            += -lopieui2
+}
+
+opienet {
+    CONFIG          += opiecore
+    LIBS            += -lopienet2
+}
+
+opiepim {
+    CONFIG          += opiecore
+    LIBS            += -lopiepim2
+}
+
+opiedb {
+    CONFIG          += opiecore
+    LIBS            += -lopiedb2
+}
+
+opiemm {
+    CONFIG          += opiecore
+    LIBS            += -lopiemm2
+}
+
+#=============================================================================
+#
+#
+
+#=============================================================================
+#
+#
diff --git a/meta-oe/recipes-qt/qt4/files/compile.test-lflags.patch b/meta-oe/recipes-qt/qt4/files/compile.test-lflags.patch
new file mode 100644
index 0000000000..e4b256b0ce
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/compile.test-lflags.patch
@@ -0,0 +1,13 @@
+Index: qt-everywhere-opensource-src-4.6.3/config.tests/unix/compile.test
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/config.tests/unix/compile.test	2010-06-02 06:03:18.000000000 +0400
++++ qt-everywhere-opensource-src-4.6.3/config.tests/unix/compile.test	2010-10-04 17:35:07.587783460 +0400
+@@ -11,7 +11,7 @@
+ EXE=`basename "$6"`
+ DESCRIPTION=$7
+ shift 7
+-LFLAGS=""
++LFLAGS="$LDFLAGS"
+ INCLUDEPATH=""
+ CXXFLAGS=""
+ MAC_ARCH_CXXFLAGS=""
diff --git a/meta-oe/recipes-qt/qt4/files/configure-lflags.patch b/meta-oe/recipes-qt/qt4/files/configure-lflags.patch
new file mode 100644
index 0000000000..df195494ee
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/configure-lflags.patch
@@ -0,0 +1,13 @@
+Index: qtopia-core-opensource-src-4.3.3/configure
+===================================================================
+--- qtopia-core-opensource-src-4.3.3.orig/configure	2008-01-14 08:53:51.000000000 +0000
++++ qtopia-core-opensource-src-4.3.3/configure	2008-01-14 08:54:07.000000000 +0000
+@@ -447,7 +447,7 @@
+ # initalize variables
+ #-------------------------------------------------------------------------------
+ 
+-SYSTEM_VARIABLES="CC CXX CFLAGS CXXFLAGS LDFLAGS"
++SYSTEM_VARIABLES="CC CXX CFLAGS CXXFLAGS LDFLAGS LFLAGS"
+ for varname in $SYSTEM_VARIABLES; do
+     cmd=`echo \
+ 'if [ -n "\$'${varname}'" ]; then
diff --git a/meta-oe/recipes-qt/qt4/files/configure-paths.patch b/meta-oe/recipes-qt/qt4/files/configure-paths.patch
new file mode 100644
index 0000000000..c9259a1159
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/configure-paths.patch
@@ -0,0 +1,21 @@
+Index: qt-everywhere-opensource-src-4.6.3/configure
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/configure	2011-01-10 15:47:37.100607001 +0000
++++ qt-everywhere-opensource-src-4.6.3/configure	2011-01-10 15:49:14.576606999 +0000
+@@ -7198,11 +7198,11 @@
+ QMAKE_MOC_SRC    = \$\$QT_BUILD_TREE/src/moc
+ 
+ #local paths that cannot be queried from the QT_INSTALL_* properties while building QTDIR
+-QMAKE_MOC        = \$\$QT_BUILD_TREE/bin/moc
+-QMAKE_UIC        = \$\$QT_BUILD_TREE/bin/uic
+-QMAKE_UIC3       = \$\$QT_BUILD_TREE/bin/uic3
+-QMAKE_RCC        = \$\$QT_BUILD_TREE/bin/rcc
+-QMAKE_QDBUSXML2CPP = \$\$QT_BUILD_TREE/bin/qdbusxml2cpp
++QMAKE_MOC        = \${OE_QMAKE_MOC}
++QMAKE_UIC        = \${OE_QMAKE_UIC}
++QMAKE_UIC3       = \${OE_QMAKE_UIC3}
++QMAKE_RCC        = \${OE_QMAKE_RCC}
++QMAKE_QDBUSXML2CPP = \${OE_QMAKE_QDBUSXML2CPP}
+ QMAKE_INCDIR_QT  = \$\$QT_BUILD_TREE/include
+ QMAKE_LIBDIR_QT  = \$\$QT_BUILD_TREE/lib
+ 
diff --git a/meta-oe/recipes-qt/qt4/files/fix-config-tests.patch b/meta-oe/recipes-qt/qt4/files/fix-config-tests.patch
new file mode 100644
index 0000000000..21054555bc
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/fix-config-tests.patch
@@ -0,0 +1,36 @@
+Fix invocation in case of "ccache some-compiler-gcc". As the command "ccache some-compiler-gcc" will not exist but "ccache" will.
+
+both visibility and relocs were affected.
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+Index: qt-x11-opensource-src-4.5.2/config.tests/unix/bsymbolic_functions.test
+===================================================================
+--- qt-x11-opensource-src-4.5.2.orig/config.tests/unix/bsymbolic_functions.test 2009-08-01 08:01:11.000000000 +0200
++++ qt-x11-opensource-src-4.5.2/config.tests/unix/bsymbolic_functions.test      2009-08-01 08:01:16.000000000 +0200
+@@ -8,7 +8,7 @@
+ int main() { return 0; }
+ EOF
+ 
+-"$COMPILER" -o libtest.so -shared -Wl,-Bsymbolic-functions -fPIC bsymbolic_functions.c >/dev/null 2>&1 && BSYMBOLIC_FUNCTIONS_SUPPORT=yes
++$COMPILER -o libtest.so -shared -Wl,-Bsymbolic-functions -fPIC bsymbolic_functions.c >/dev/null 2>&1 && BSYMBOLIC_FUNCTIONS_SUPPORT=yes
+ rm -f bsymbolic_functions.c libtest.so
+ 
+ # done
+Index: qt-x11-opensource-src-4.5.2/config.tests/unix/fvisibility.test
+===================================================================
+--- qt-x11-opensource-src-4.5.2.orig/config.tests/unix/fvisibility.test 2009-06-20 06:57:50.000000000 +0200
++++ qt-x11-opensource-src-4.5.2/config.tests/unix/fvisibility.test      2009-08-01 07:59:05.000000000 +0200
+@@ -15,9 +15,9 @@
+ EOF
+ 
+     if [ "$VERBOSE" = "yes" ] ; then
+-        "$COMPILER" -c -fvisibility=hidden fvisibility.c && FVISIBILITY_SUPPORT=yes
++        $COMPILER -c -fvisibility=hidden fvisibility.c && FVISIBILITY_SUPPORT=yes
+     else
+-        "$COMPILER" -c -fvisibility=hidden fvisibility.c >/dev/null 2>&1 && FVISIBILITY_SUPPORT=yes
++        $COMPILER -c -fvisibility=hidden fvisibility.c >/dev/null 2>&1 && FVISIBILITY_SUPPORT=yes
+     fi
+     rm -f fvisibility.c fvisibility.o
+ }
+
diff --git a/meta-oe/recipes-qt/qt4/files/g++.conf b/meta-oe/recipes-qt/qt4/files/g++.conf
new file mode 100644
index 0000000000..4cd76e62ea
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/g++.conf
@@ -0,0 +1,53 @@
+#
+# qmake configuration for common gcc
+#
+
+QMAKE_CC       = $(OE_QMAKE_CC)
+QMAKE_CFLAGS       += -pipe $(OE_QMAKE_CFLAGS)
+QMAKE_CFLAGS_DEPS	+= -M
+QMAKE_CFLAGS_WARN_ON	+= -Wall -W
+QMAKE_CFLAGS_WARN_OFF	+= -w
+QMAKE_CFLAGS_RELEASE	+= 
+QMAKE_CFLAGS_DEBUG	+= -g
+QMAKE_CFLAGS_SHLIB	+= -fPIC
+QMAKE_CFLAGS_STATIC_LIB	+= -fPIC
+QMAKE_CFLAGS_YACC	+= -Wno-unused -Wno-parentheses
+QMAKE_CFLAGS_HIDESYMS   += -fvisibility=hidden
+QMAKE_CFLAGS_PRECOMPILE += -x c-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+QMAKE_CFLAGS_USE_PRECOMPILE += -include ${QMAKE_PCH_OUTPUT_BASE}
+
+QMAKE_CXX      = $(OE_QMAKE_CXX)
+QMAKE_CXXFLAGS     += $$QMAKE_CFLAGS $(OE_QMAKE_CXXFLAGS)
+QMAKE_CXXFLAGS_DEPS	+= $$QMAKE_CFLAGS_DEPS
+QMAKE_CXXFLAGS_WARN_ON	+= $$QMAKE_CFLAGS_WARN_ON
+QMAKE_CXXFLAGS_WARN_OFF	+= $$QMAKE_CFLAGS_WARN_OFF
+QMAKE_CXXFLAGS_RELEASE	+= $$QMAKE_CFLAGS_RELEASE
+QMAKE_CXXFLAGS_DEBUG	+= $$QMAKE_CFLAGS_DEBUG
+QMAKE_CXXFLAGS_SHLIB	+= $$QMAKE_CFLAGS_SHLIB
+QMAKE_CXXFLAGS_STATIC_LIB += $$QMAKE_CFLAGS_STATIC_LIB
+QMAKE_CXXFLAGS_YACC	+= $$QMAKE_CFLAGS_YACC
+QMAKE_CXXFLAGS_HIDESYMS += $$QMAKE_CFLAGS_HIDESYMS -fvisibility-inlines-hidden
+QMAKE_CXXFLAGS_PRECOMPILE += -x c++-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+QMAKE_CXXFLAGS_USE_PRECOMPILE = $$QMAKE_CFLAGS_USE_PRECOMPILE
+
+QMAKE_LINK     = $(OE_QMAKE_LINK)
+QMAKE_LINK_SHLIB   = $(OE_QMAKE_LINK)
+QMAKE_LFLAGS       += $(OE_QMAKE_LDFLAGS)
+QMAKE_LFLAGS_RELEASE	+=
+QMAKE_LFLAGS_DEBUG	+=
+QMAKE_LFLAGS_APP	+=
+QMAKE_LFLAGS_SHLIB	+= -shared
+QMAKE_LFLAGS_PLUGIN	+= $$QMAKE_LFLAGS_SHLIB
+QMAKE_LFLAGS_SONAME	+= -Wl,-soname,
+QMAKE_LFLAGS_THREAD	+=
+QMAKE_LFLAGS_NOUNDEF	+= -Wl,--no-undefined
+QMAKE_RPATH        = -Wl,-rpath-link,
+
+QMAKE_PCH_OUTPUT_EXT    = .gch
+
+# -Bsymbolic-functions (ld) support
+QMAKE_LFLAGS_BSYMBOLIC_FUNC = -Wl,-Bsymbolic-functions
+QMAKE_LFLAGS_DYNAMIC_LIST = -Wl,--dynamic-list,
+
+# for the SDK
+isEmpty(QMAKE_QT_CONFIG):QMAKE_QT_CONFIG = $(OE_QMAKE_QT_CONFIG)
diff --git a/meta-oe/recipes-qt/qt4/files/hack-out-pg_config.patch b/meta-oe/recipes-qt/qt4/files/hack-out-pg_config.patch
new file mode 100644
index 0000000000..650ed7745e
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/hack-out-pg_config.patch
@@ -0,0 +1,30 @@
+Hack to not use the pg_config of the host system which will add /usr/include
+
+pg_config is a native binary so using that when cross compiling
+will always fail.  The commented out fix would do, but for OE
+our -platform and -xplatform is the same so we are actually not
+really cross compiling. Just comment out the test, we are passing
+the location to the postgres headers and if they are okay we
+will padd.
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+Index: qt-embedded-linux-opensource-src-4.5.2/configure
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.2.orig/configure	2009-08-10 03:03:04.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.5.2/configure	2009-08-10 03:58:11.000000000 +0200
+@@ -4401,10 +4402,10 @@
+             ;;
+         psql)
+             if [ "$CFG_SQL_psql" != "no" ]; then
+-                if "$WHICH" pg_config >/dev/null 2>&1; then
+-                    QT_CFLAGS_PSQL=`pg_config --includedir 2>/dev/null`
+-                    QT_LFLAGS_PSQL=`pg_config --libdir 2>/dev/null`
+-                fi
++#                if [ "$QT_CROSS_COMPILE" = "no" ] && "$WHICH" pg_config >/dev/null 2>&1; then
++#                    QT_CFLAGS_PSQL=`pg_config --includedir 2>/dev/null`
++#                    QT_LFLAGS_PSQL=`pg_config --libdir 2>/dev/null`
++#                fi
+                 [ -z "$QT_CFLAGS_PSQL" ] || QT_CFLAGS_PSQL="-I$QT_CFLAGS_PSQL"
+                 [ -z "$QT_LFLAGS_PSQL" ] || QT_LFLAGS_PSQL="-L$QT_LFLAGS_PSQL"
+                 if "$unixtests/compile.test" "$XQMAKESPEC" "$QMAKE_CONFIG" $OPT_VERBOSE "$relpath" "$outpath" config.tests/unix/psql "PostgreSQL" $QT_LFLAGS_PSQL $L_FLAGS $QT_CFLAGS_PSQL $I_FLAGS $l_FLAGS $MAC_ARCHS_COMMANDLINE; then
diff --git a/meta-oe/recipes-qt/qt4/files/linux-oe-qmake.conf b/meta-oe/recipes-qt/qt4/files/linux-oe-qmake.conf
new file mode 100644
index 0000000000..205b693fda
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/linux-oe-qmake.conf
@@ -0,0 +1,82 @@
+#
+# qmake configuration for linux-oe-g++ / OpenEmbedded Build System / http://openembedded.org
+#
+
+MAKEFILE_GENERATOR	= UNIX
+TEMPLATE		= app
+CONFIG			+= qt warn_on release
+
+QMAKE_CC		= $(OE_QMAKE_CC)
+QMAKE_LEX		= flex
+QMAKE_LEXFLAGS		=
+QMAKE_YACC		= yacc
+QMAKE_YACCFLAGS		= -d
+QMAKE_CFLAGS		= -pipe $(OE_QMAKE_CFLAGS) $(CFLAGS_EXTRA)
+QMAKE_CFLAGS_WARN_ON	= -Wall -W
+QMAKE_CFLAGS_WARN_OFF	=
+QMAKE_CFLAGS_RELEASE	= $(if $(CFLAGS_RELEASE),$(CFLAGS_RELEASE), -O2)
+QMAKE_CFLAGS_DEBUG	= -g
+QMAKE_CFLAGS_SHLIB	= -fPIC
+QMAKE_CFLAGS_YACC	= -Wno-unused -Wno-parentheses
+QMAKE_CFLAGS_THREAD	= -D_REENTRANT
+
+QMAKE_CXX		= $(OE_QMAKE_CXX)
+QMAKE_CXXFLAGS		= $$QMAKE_CFLAGS $(OE_QMAKE_CXXFLAGS) $(CXXFLAGS_EXTRA)
+QMAKE_CXXFLAGS_WARN_ON	= $$QMAKE_CFLAGS_WARN_ON
+QMAKE_CXXFLAGS_WARN_OFF	= $$QMAKE_CFLAGS_WARN_OFF
+QMAKE_CXXFLAGS_RELEASE	= $$QMAKE_CFLAGS_RELEASE
+QMAKE_CXXFLAGS_DEBUG	= $$QMAKE_CFLAGS_DEBUG
+QMAKE_CXXFLAGS_SHLIB	= $$QMAKE_CFLAGS_SHLIB
+QMAKE_CXXFLAGS_YACC	= $$QMAKE_CFLAGS_YACC
+QMAKE_CXXFLAGS_THREAD	= $$QMAKE_CFLAGS_THREAD
+
+QMAKE_INCDIR		=
+QMAKE_LIBDIR		=
+QMAKE_INCDIR_X11	= 
+QMAKE_LIBDIR_X11	= 
+QMAKE_INCDIR_QT		= $(OE_QMAKE_INCDIR_QT)
+QMAKE_LIBDIR_QT		= $(OE_QMAKE_LIBDIR_QT)
+QMAKE_INCDIR_OPENGL	=
+QMAKE_LIBDIR_OPENGL	=
+
+QMAKE_LINK		= $(OE_QMAKE_LINK)
+QMAKE_LINK_SHLIB	= $(OE_QMAKE_LINK)
+QMAKE_LFLAGS		= $(OE_QMAKE_LDFLAGS) $(LFLAGS_EXTRA)
+QMAKE_LFLAGS_RELEASE	=
+QMAKE_LFLAGS_DEBUG	=
+QMAKE_LFLAGS_SHLIB      = -shared
+QMAKE_LFLAGS_PLUGIN     = $$QMAKE_LFLAGS_SHLIB
+QMAKE_LFLAGS_SONAME     = -Wl,-soname,
+QMAKE_LFLAGS_THREAD     =
+QMAKE_RPATH             = -Wl,-rpath-link,
+
+QMAKE_LIBS		= $(LIBS_EXTRA)
+QMAKE_LIBS_DYNLOAD      = -ldl
+QMAKE_LIBS_X11		= $(OE_QMAKE_LIBS_X11)
+QMAKE_LIBS_X11SM	= 
+QMAKE_LIBS_QT		= -l$(OE_QMAKE_LIBS_QT)
+QMAKE_LIBS_QT_THREAD    = -l$(OE_QMAKE_LIBS_QT)-mt
+QMAKE_LIBS_OPENGL	= $(OE_QMAKE_LIBS_OPENGL)
+QMAKE_LIBS_OPENGL_QT	= $(OE_QMAKE_LIBS_OPENGL_QT)
+QMAKE_LIBS_THREAD       = -lpthread
+
+QMAKE_MOC		= $(OE_QMAKE_MOC)
+QMAKE_UIC		= $(OE_QMAKE_UIC)
+
+QMAKE_AR		= $(OE_QMAKE_AR) cqs
+QMAKE_RANLIB		=
+
+QMAKE_TAR		= tar -cf
+QMAKE_GZIP		= gzip -9f
+
+QMAKE_COPY		= cp -f
+QMAKE_COPY_FILE         = $(COPY)
+QMAKE_COPY_DIR          = $(COPY) -r
+QMAKE_MOVE		= mv -f
+QMAKE_DEL_FILE		= rm -f
+QMAKE_DEL_DIR		= rmdir
+QMAKE_STRIP             = $(OE_QMAKE_STRIP)
+QMAKE_STRIPFLAGS_LIB	+= --strip-unneeded
+QMAKE_CHK_DIR_EXISTS	= test -d
+QMAKE_MKDIR		= mkdir -p
+
diff --git a/meta-oe/recipes-qt/qt4/files/linux.conf b/meta-oe/recipes-qt/qt4/files/linux.conf
new file mode 100644
index 0000000000..90b8d65aba
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/linux.conf
@@ -0,0 +1,54 @@
+#
+# qmake configuration for common linux
+#
+
+QMAKE_CFLAGS_THREAD	+= -D_REENTRANT
+QMAKE_CXXFLAGS_THREAD	+= $$QMAKE_CFLAGS_THREAD
+
+QMAKE_INCDIR          =
+QMAKE_LIBDIR          =
+QMAKE_INCDIR_X11      =
+QMAKE_LIBDIR_X11      =
+QMAKE_INCDIR_QT       = $(OE_QMAKE_INCDIR_QT)
+QMAKE_LIBDIR_QT       = $(OE_QMAKE_LIBDIR_QT)
+QMAKE_INCDIR_OPENGL   =
+QMAKE_LIBDIR_OPENGL   =
+
+
+QMAKE_LIBS            =
+QMAKE_LIBS_DYNLOAD    = -ldl
+QMAKE_LIBS_X11        = $(OE_QMAKE_LIBS_X11)
+QMAKE_LIBS_X11SM      = $(OE_QMAKE_LIBS_X11SM)
+QMAKE_LIBS_NIS        = -lnsl
+QMAKE_LIBS_OPENGL     = -lGLU -lGL
+QMAKE_LIBS_OPENGL_QT  = -lGL
+QMAKE_LIBS_THREAD     = -lpthread
+
+QMAKE_MOC             = $(OE_QMAKE_MOC)
+QMAKE_UIC             = $(OE_QMAKE_UIC)
+QMAKE_UIC3            = $(OE_QMAKE_UIC3)
+QMAKE_RCC             = $(OE_QMAKE_RCC)
+QMAKE_QDBUSCPP2XML    = $(OE_QMAKE_QDBUSCPP2XML)
+QMAKE_QDBUSXML2CPP    = $(OE_QMAKE_QDBUSXML2CPP)
+
+QMAKE_AR              = $(OE_QMAKE_AR) cqs
+QMAKE_OBJCOPY         = objcopy
+QMAKE_RANLIB          =
+
+QMAKE_TAR             = tar -cf
+QMAKE_GZIP            = gzip -9f
+
+QMAKE_COPY            = cp -f
+QMAKE_COPY_FILE       = $(COPY)
+QMAKE_COPY_DIR        = $(COPY) -r
+QMAKE_MOVE            = mv -f
+QMAKE_DEL_FILE        = rm -f
+QMAKE_DEL_DIR         = rmdir
+QMAKE_STRIP           = $(OE_QMAKE_STRIP)
+QMAKE_STRIPFLAGS_LIB += --strip-unneeded
+QMAKE_CHK_DIR_EXISTS  = test -d
+QMAKE_MKDIR           = mkdir -p
+QMAKE_INSTALL_FILE    = install -m 644 -p
+QMAKE_INSTALL_PROGRAM = install -m 755 -p
+
+include(unix.conf)
diff --git a/meta-oe/recipes-qt/qt4/files/mips-relocate.patch b/meta-oe/recipes-qt/qt4/files/mips-relocate.patch
new file mode 100644
index 0000000000..2fde9a0dcf
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/mips-relocate.patch
@@ -0,0 +1,28 @@
+Disable the LDFLAGS "-Bsymbolic-functions" for mips
+
+"-Bsymbolic-functions" flag makes ld to bind the global function symbol of shared library at compiling time, thus reduce the runtime relocation cost.
+
+However, this flag in binutil 2.20 cause QT4 mips building failure, which is "final link failed: Bad value" error in libQtWebKit.so linking stage. If downgrad to binutil 2.19, this error disappears. further investigation showes commit http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/scripttempl/mips.sc.diff?r1=1.2&r2=1.3&cvsroot=src cause this error.
+
+So this patch disable this flag for QT4 mips. If future binutils version fix this issue, this patch can be safely removed.
+
+Signed-off-by: Yu Ke <ke.yu@intel.com>
+
+diff --git a/configure b/configure
+index ca14279..5db9926 100755
+--- a/configure
++++ b/configure
+@@ -3035,6 +3035,13 @@ if [ "$CFG_REDUCE_RELOCATIONS" != "no" ]; then
+     fi
+ fi
+ 
++# Temporily disable -Bsymbolic-functions for mips, because libQtWebKit can not pass the build
++# if has -Bsymbolic-functions and binutil 2.20
++# -Bsymbolic-functions is OK in binutil 2.19
++if [ "$CFG_ARCH" = "mips" ]; then
++    CFG_REDUCE_RELOCATIONS=no
++fi
++
+ # auto-detect GNU make support
+ if [ "$CFG_USE_GNUMAKE" = "auto" ] && "$MAKE" -v | grep "GNU Make" >/dev/null 2>&1; then
+    CFG_USE_GNUMAKE=yes
diff --git a/meta-oe/recipes-qt/qt4/files/qmake-exists-check.patch b/meta-oe/recipes-qt/qt4/files/qmake-exists-check.patch
new file mode 100644
index 0000000000..cc73837e53
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/qmake-exists-check.patch
@@ -0,0 +1,18 @@
+qt4-tools-nativesdk: avoid rebuilding qmake
+
+qt4-tools-nativesdk patch to avoids building qmake in configure if it already exists 
+(as it will, since we symlink it in from the native sysroot in do_configure)
+
+Signed-off-by: Paul Eggleton <paul.eggleton@linux.intel.com>
+
+--- qt-everywhere-opensource-src-4.6.3.orig/configure	2011-01-10 12:01:56.260607001 +0000
++++ qt-everywhere-opensource-src-4.6.3/configure	2011-01-10 12:02:20.584607015 +0000
+@@ -4286,7 +4286,7 @@
+ }
+ 
+ # build qmake
+-if true; then ###[ '!' -f "$outpath/bin/qmake" ];
++if [ '!' -f "$outpath/bin/qmake" ]; then
+     echo "Creating qmake. Please wait..."
+ 
+     OLD_QCONFIG_H=
diff --git a/meta-oe/recipes-qt/qt4/files/qmake-hack.diff b/meta-oe/recipes-qt/qt4/files/qmake-hack.diff
new file mode 100644
index 0000000000..290f54052b
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/qmake-hack.diff
@@ -0,0 +1,15 @@
+--- /tmp/configure	2010-02-10 15:41:58.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.4.3/configure	2010-02-10 15:42:01.000000000 +0100
+@@ -3946,6 +3946,12 @@
+     [ '!' -z "$QCONFIG_H" ] && mv -f "$QCONFIG_H" "$QMAKE_QCONFIG_H" #move qmake's qconfig.h to qconfig.h.qmake
+     [ '!' -z "$OLD_QCONFIG_H" ] && mv -f "${OLD_QCONFIG_H}.old" "$OLD_QCONFIG_H" #put back qconfig.h
+     [ "$QMAKE_BUILD_ERROR" = "yes" ] && exit 2
++
++# OE
++if [ x$CROSSHACK = xtrue ] ; then
++	echo "Exiting now, since we have what we want: a qmake binary"
++	exit 0
++fi
+ fi # Build qmake
+ 
+ #-------------------------------------------------------------------------------
diff --git a/meta-oe/recipes-qt/qt4/files/qt-config.patch b/meta-oe/recipes-qt/qt4/files/qt-config.patch
new file mode 100644
index 0000000000..a31e7b3e2a
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/qt-config.patch
@@ -0,0 +1,24 @@
+
+Ported from OE by: Yu Ke <ke.yu@intel.com>
+
+--- /tmp/qlibraryinfo.cpp	2008-08-02 17:16:41.000000000 +0200
++++ qt-embedded-linux-opensource-src-4.4.1/src/corelib/global/qlibraryinfo.cpp	2008-08-02 17:17:42.000000000 +0200
+@@ -47,6 +47,7 @@
+ QT_BEGIN_NAMESPACE
+ extern QString qmake_libraryInfoFile();
+ QT_END_NAMESPACE
++#include <stdlib.h>
+ #else
+ # include "qcoreapplication.h"
+ #endif
+@@ -113,6 +114,10 @@
+ #ifdef QT_BUILD_QMAKE
+     if(!QFile::exists(qtconfig))
+         qtconfig = qmake_libraryInfoFile();
++    if (!QFile::exists(qtconfig)) {
++        QByteArray config = getenv("QT_CONF_PATH");
++        qtconfig = QFile::decodeName(config);
++    }
+ #else
+     if (!QFile::exists(qtconfig) && QCoreApplication::instance()) {
+ #ifdef Q_OS_MAC
diff --git a/meta-oe/recipes-qt/qt4/files/qte.sh b/meta-oe/recipes-qt/qt4/files/qte.sh
new file mode 100644
index 0000000000..21d6ecbd6a
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/qte.sh
@@ -0,0 +1,7 @@
+#!/bin/sh
+
+if [ -e /dev/input/touchscreen0 ]
+then
+    QWS_MOUSE_PROTO=Tslib:/dev/input/touchscreen0
+    export QWS_MOUSE_PROTO
+fi
diff --git a/meta-oe/recipes-qt/qt4/files/qthelp-lib-qtclucene.patch b/meta-oe/recipes-qt/qt4/files/qthelp-lib-qtclucene.patch
new file mode 100644
index 0000000000..1d250d8a98
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/qthelp-lib-qtclucene.patch
@@ -0,0 +1,86 @@
+qt-embedded: fix linker error in do_compile
+
+This patch ensures that we link to libQtCLucene where required (i.e. when 
+linking to libQtHelp) avoiding a linker error.
+
+Signed-off-by: Paul Eggleton <paul.eggleton@linux.intel.com>
+
+Index: qt-everywhere-opensource-src-4.6.3/demos/qtdemo/qtdemo.pro
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/demos/qtdemo/qtdemo.pro	2011-01-11 16:06:47.382828004 +0000
++++ qt-everywhere-opensource-src-4.6.3/demos/qtdemo/qtdemo.pro	2011-01-11 16:10:06.906828001 +0000
+@@ -76,3 +76,10 @@
+ sources.files = $$SOURCES $$HEADERS $$FORMS $$RESOURCES qtdemo.pro images xml *.ico *.icns *.rc *.plist
+ sources.path = $$[QT_INSTALL_DEMOS]/qtdemo
+ 
++qclucene = QtCLucene$${QT_LIBINFIX}
++if(!debug_and_release|build_pass):CONFIG(debug, debug|release) {
++    mac:qclucene = $${qclucene}_debug
++    win32:qclucene = $${qclucene}d
++}
++linux-lsb-g++:LIBS_PRIVATE += --lsb-shared-libs=$$qclucene
++LIBS_PRIVATE += -l$$qclucene
+Index: qt-everywhere-opensource-src-4.6.3/examples/help/contextsensitivehelp/contextsensitivehelp.pro
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/examples/help/contextsensitivehelp/contextsensitivehelp.pro	2011-01-11 16:05:56.598828002 +0000
++++ qt-everywhere-opensource-src-4.6.3/examples/help/contextsensitivehelp/contextsensitivehelp.pro	2011-01-11 16:09:57.762828002 +0000
+@@ -18,3 +18,11 @@
+ INSTALLS += target sources
+ 
+ symbian: include($$QT_SOURCE_TREE/examples/symbianpkgrules.pri)
++
++qclucene = QtCLucene$${QT_LIBINFIX}
++if(!debug_and_release|build_pass):CONFIG(debug, debug|release) {
++    mac:qclucene = $${qclucene}_debug
++    win32:qclucene = $${qclucene}d
++}
++linux-lsb-g++:LIBS_PRIVATE += --lsb-shared-libs=$$qclucene
++LIBS_PRIVATE += -l$$qclucene
+Index: qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/assistant/assistant.pro
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/tools/assistant/tools/assistant/assistant.pro	2011-01-11 14:56:50.902828001 +0000
++++ qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/assistant/assistant.pro	2011-01-11 16:09:39.914828003 +0000
+@@ -85,3 +85,11 @@
+         DEFINES += USE_STATIC_SQLITE_PLUGIN
+     }
+ }
++
++qclucene = QtCLucene$${QT_LIBINFIX}
++if(!debug_and_release|build_pass):CONFIG(debug, debug|release) {
++    mac:qclucene = $${qclucene}_debug
++    win32:qclucene = $${qclucene}d
++}
++linux-lsb-g++:LIBS_PRIVATE += --lsb-shared-libs=$$qclucene
++LIBS_PRIVATE += -l$$qclucene
+Index: qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/qcollectiongenerator/qcollectiongenerator.pro
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/tools/assistant/tools/qcollectiongenerator/qcollectiongenerator.pro	2011-01-11 14:56:50.918828002 +0000
++++ qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/qcollectiongenerator/qcollectiongenerator.pro	2011-01-11 16:09:44.538828001 +0000
+@@ -12,3 +12,11 @@
+            main.cpp
+ 
+ HEADERS += ../shared/helpgenerator.h
++
++qclucene = QtCLucene$${QT_LIBINFIX}
++if(!debug_and_release|build_pass):CONFIG(debug, debug|release) {
++    mac:qclucene = $${qclucene}_debug
++    win32:qclucene = $${qclucene}d
++}
++linux-lsb-g++:LIBS_PRIVATE += --lsb-shared-libs=$$qclucene
++LIBS_PRIVATE += -l$$qclucene
+Index: qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/qhelpgenerator/qhelpgenerator.pro
+===================================================================
+--- qt-everywhere-opensource-src-4.6.3.orig/tools/assistant/tools/qhelpgenerator/qhelpgenerator.pro	2011-01-11 14:56:50.930828002 +0000
++++ qt-everywhere-opensource-src-4.6.3/tools/assistant/tools/qhelpgenerator/qhelpgenerator.pro	2011-01-11 16:09:50.274828003 +0000
+@@ -12,3 +12,11 @@
+            main.cpp
+ 
+ HEADERS += ../shared/helpgenerator.h
++
++qclucene = QtCLucene$${QT_LIBINFIX}
++if(!debug_and_release|build_pass):CONFIG(debug, debug|release) {
++    mac:qclucene = $${qclucene}_debug
++    win32:qclucene = $${qclucene}d
++}
++linux-lsb-g++:LIBS_PRIVATE += --lsb-shared-libs=$$qclucene
++LIBS_PRIVATE += -l$$qclucene
diff --git a/meta-oe/recipes-qt/qt4/files/use-lflags-last.patch b/meta-oe/recipes-qt/qt4/files/use-lflags-last.patch
new file mode 100644
index 0000000000..4197dbbf64
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/files/use-lflags-last.patch
@@ -0,0 +1,22 @@
+Index: qtopia-core-opensource-src-4.3.1/qmake/generators/unix/unixmake2.cpp
+===================================================================
+--- qtopia-core-opensource-src-4.3.1.orig/qmake/generators/unix/unixmake2.cpp	2007-10-07 13:45:26.000000000 +0200
++++ qtopia-core-opensource-src-4.3.1/qmake/generators/unix/unixmake2.cpp	2007-10-07 13:57:09.000000000 +0200
+@@ -416,7 +416,7 @@
+                 t << "\n\t" << mkdir_p_asstring(destdir) << "\n\t";
+             if(!project->isEmpty("QMAKE_PRE_LINK"))
+                 t << var("QMAKE_PRE_LINK") << "\n\t";
+-            t << "$(LINK) $(LFLAGS) -o $(TARGET) " << incr_deps << " " << incr_objs << " $(OBJCOMP) $(LIBS)";
++            t << "$(LINK) -o $(TARGET) " << incr_deps << " " << incr_objs << " $(OBJCOMP) $(LIBS) $(LFLAGS)";
+             if(!project->isEmpty("QMAKE_POST_LINK"))
+                 t << "\n\t" << var("QMAKE_POST_LINK");
+             t << endl << endl;
+@@ -430,7 +430,7 @@
+                 t << mkdir_p_asstring(destdir) << "\n\t";
+             if(!project->isEmpty("QMAKE_PRE_LINK"))
+                 t << var("QMAKE_PRE_LINK") << "\n\t";
+-            t << "$(LINK) $(LFLAGS) -o $(TARGET) $(OBJECTS) $(OBJCOMP) $(LIBS)";
++            t << "$(LINK) -o $(TARGET) $(OBJECTS) $(OBJCOMP) $(LIBS) $(LFLAGS)";
+             if(!project->isEmpty("QMAKE_POST_LINK"))
+                 t << "\n\t" << var("QMAKE_POST_LINK");
+             t << endl << endl;
diff --git a/meta-oe/recipes-qt/qt4/qmake2-sdk/linux-oe-qmake.conf b/meta-oe/recipes-qt/qt4/qmake2-sdk/linux-oe-qmake.conf
new file mode 100644
index 0000000000..f58481a693
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qmake2-sdk/linux-oe-qmake.conf
@@ -0,0 +1 @@
+include(../linux-g++/qmake.conf)
diff --git a/meta-oe/recipes-qt/qt4/qmake2.inc b/meta-oe/recipes-qt/qt4/qmake2.inc
new file mode 100644
index 0000000000..f2631b5f7e
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qmake2.inc
@@ -0,0 +1,69 @@
+DESCRIPTION = "TrollTech Makefile Generator"
+PRIORITY = "optional"
+HOMEPAGE = "http://www.trolltech.com"
+SECTION = "devel"
+LICENSE = "GPL"
+PR = "r12"
+
+# We call 'moc' during the build 
+DEPENDS = "qt4-tools-native"
+
+QTVER = "qt-embedded-linux-opensource-src-${QTVERSION}"
+
+SRC_URI = "ftp://ftp.trolltech.com/qt/source/${QTVER}.tar.bz2 \
+           file://0001-fix-mkspecs.patch \
+           file://qt-config.patch \
+           file://use-lflags-last.patch \
+           file://linux-oe-qmake.conf"
+S = "${WORKDIR}/${QTVER}"
+
+inherit autotools  
+
+CROSSHACK = "true"
+CROSSHACK_virtclass-native = ""
+CROSSHACK_virtclass-nativesdk = ""
+
+export CROSSHACK
+export QTDIR = "${S}"
+EXTRA_OEMAKE = "-e"
+
+TARGET_CC_ARCH += "${LDFLAGS}"
+
+do_configure() {
+
+    # Make sure we regenerate all Makefiles 
+    find ${S} -name "Makefile" | xargs rm
+    # Install the OE build templates
+    for template in linux-oe-g++ linux-uclibc-oe-g++ linux-gnueabi-oe-g++ linux-uclibceabi-oe-g++
+    do
+        install -d ${S}/mkspecs/$template
+        install -m 0644 ${WORKDIR}/linux-oe-qmake.conf ${S}/mkspecs/$template/qmake.conf
+        ln -sf ../linux-g++/qplatformdefs.h ${S}/mkspecs/$template/qplatformdefs.h
+    done
+
+    QMAKESPEC=
+    PLATFORM=${HOST_OS}-oe-g++
+    export PLATFORM
+    export OE_QMAKE_CC="${CC}"
+    export OE_QMAKE_CFLAGS="${CFLAGS}"
+    export OE_QMAKE_CXX="${CXX}"
+    export OE_QMAKE_CXXFLAGS="-fno-exceptions -fno-rtti ${CXXFLAGS}"
+    export OE_QMAKE_LDFLAGS="${LDFLAGS}"
+    export OE_QMAKE_LINK="${CCLD}"
+    export OE_QMAKE_AR="${AR}"
+    export OE_QMAKE_STRIP="${STRIP}"
+    export OE_QMAKE_UIC="${STAGING_BINDIR_NATIVE}/uic4"
+    export OE_QMAKE_MOC="${STAGING_BINDIR_NATIVE}/moc4"
+    export QMAKE_MOC="${STAGING_BINDIR_NATIVE}/moc4"
+    export OE_QMAKE_RCC="${STAGING_BINDIR_NATIVE}/rcc4"
+    export QMAKE_RCC="${STAGING_BINDIR_NATIVE}/rcc4"
+    export OE_QMAKE_QMAKE="${STAGING_BINDIR_NATIVE}/qmake"
+    export OE_QMAKE_RPATH="-Wl,-rpath-link,"
+    echo yes | ./configure -prefix ${STAGING_DIR_NATIVE}/qt4 ${EXTRA_OECONF} || die "Configuring qt failed"
+}
+
+do_compile() {
+    :
+}
+
+FILES_${PN} += "${datadir}/qt4/"
diff --git a/meta-oe/recipes-qt/qt4/qmake2/linux-oe-qmake.conf b/meta-oe/recipes-qt/qt4/qmake2/linux-oe-qmake.conf
new file mode 100644
index 0000000000..f58481a693
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qmake2/linux-oe-qmake.conf
@@ -0,0 +1 @@
+include(../linux-g++/qmake.conf)
diff --git a/meta-oe/recipes-qt/qt4/qmake2_2.10a.bb b/meta-oe/recipes-qt/qt4/qmake2_2.10a.bb
new file mode 100644
index 0000000000..3602a7f248
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qmake2_2.10a.bb
@@ -0,0 +1,60 @@
+QTVERSION="4.4.3"
+FILESDIR += "${@os.path.dirname(bb.data.getVar('FILE',d,1))}/qmake2"
+
+BBCLASSEXTEND = "native nativesdk"
+
+require ${PN}.inc
+
+SRC_URI += "file://qmake-hack.diff"
+
+do_install() {
+    install -d ${D}/${bindir}
+    install -m 0755 bin/qmake ${D}/${bindir}/qmake2
+    install -m 0755 bin/qmake ${D}/${bindir}/qmake-qt4
+    install -d ${D}/${datadir}/qt4
+    install -d ${D}/${datadir}/qtopia
+
+    script="${D}/${datadir}/qtopia/environment-setup"
+    touch $script
+    echo 'export QT_DIR_NAME=qtopia' >> $script
+    echo 'export QT_LIBINFIX=E' >> $script
+    echo 'export OE_QMAKE_AR=ar' >> $script
+    echo 'export OE_QMAKE_CC=gcc' >> $script
+    echo 'export OE_QMAKE_CXX=g++' >> $script
+    echo 'export OE_QMAKE_LINK=g++' >> $script
+    echo 'export OE_QMAKE_LIBDIR_QT=${libdir}' >> $script
+    echo 'export OE_QMAKE_INCDIR_QT=${includedir}/qtopia' >> $script
+    echo 'export OE_QMAKE_MOC=${bindir}/moc' >> $script
+    echo 'export OE_QMAKE_UIC=${bindir}/uic' >> $script
+    echo 'export OE_QMAKE_UIC3=${bindir}/uic3' >> $script
+    echo 'export OE_QMAKE_RCC=${bindir}/rcc' >> $script
+    echo 'export OE_QMAKE_QDBUSCPP2XML=${bindir}/qdbuscpp2xml' >> $script
+    echo 'export OE_QMAKE_QDBUSXML2CPP=${bindir}/qdbusxml2cpp' >> $script
+    echo 'export OE_QMAKE_QT_CONFIG=${datadir}/qtopia/mkspecs/qconfig.pri' >> $script
+    echo 'export QMAKESPEC=${datadir}/qtopia/mkspecs/linux-g++' >> $script
+
+    script="${D}/${datadir}/qt4/environment-setup"
+    touch $script
+    echo 'export OE_QMAKE_AR=ar' >> $script
+    echo 'export OE_QMAKE_CC=gcc' >> $script
+    echo 'export OE_QMAKE_CXX=g++' >> $script
+    echo 'export OE_QMAKE_LINK=g++' >> $script
+    echo 'export OE_QMAKE_LIBDIR_QT=${libdir}' >> $script
+    echo 'export OE_QMAKE_INCDIR_QT=${includedir}/qt4' >> $script
+    echo 'export OE_QMAKE_MOC=${bindir}/moc' >> $script
+    echo 'export OE_QMAKE_UIC=${bindir}/uic' >> $script
+    echo 'export OE_QMAKE_UIC3=${bindir}/uic3' >> $script
+    echo 'export OE_QMAKE_RCC=${bindir}/rcc' >> $script
+    echo 'export OE_QMAKE_QDBUSCPP2XML=${bindir}/qdbuscpp2xml' >> $script
+    echo 'export OE_QMAKE_QDBUSXML2CPP=${bindir}/qdbusxml2cpp' >> $script
+    echo 'export OE_QMAKE_QT_CONFIG=${datadir}/qt4/mkspecs/qconfig.pri' >> $script
+    echo 'export QMAKESPEC=${datadir}/qt4/mkspecs/linux-g++' >> $script
+
+    chmod 0755 ${D}${datadir}/qt*/environment-setup
+}
+
+FILES_${PN} += "${datadir}/qt*/environment-setup"
+
+
+SRC_URI[md5sum] = "9a639aec44a1e4c70040117183d247a3"
+SRC_URI[sha256sum] = "05d06b93f95092f1318634fca24f0c2d0a1252c9f1dc2fbb427b07e8ecbb4f39"
diff --git a/meta-oe/recipes-qt/qt4/qt-4.6.0/.1165-NEON-configure-detection-and-initial-blend-function-.patch.swp b/meta-oe/recipes-qt/qt4/qt-4.6.0/.1165-NEON-configure-detection-and-initial-blend-function-.patch.swp
new file mode 100644
index 0000000000..5a11254f65
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.6.0/.1165-NEON-configure-detection-and-initial-blend-function-.patch.swp
diff --git a/meta-oe/recipes-qt/qt4/qt-4.6.3.inc b/meta-oe/recipes-qt/qt4/qt-4.6.3.inc
new file mode 100644
index 0000000000..a41b483180
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.6.3.inc
@@ -0,0 +1,56 @@
+LICENSE = "LGPLv2.1 | GPLv3"
+LIC_FILES_CHKSUM = "file://LICENSE.LGPL;md5=fbc093901857fcd118f065f900982c24 \
+                    file://LICENSE.GPL3;md5=babc5b6b77441da277f5c06b2e547720 \
+                    file://LGPL_EXCEPTION.txt;md5=411080a56ff917a5a1aa08c98acae354"
+
+SRC_URI = "http://get.qt.nokia.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://0001-cross-compile.patch \
+           file://0002-fix-resinit-declaration.patch \
+           file://0004-no-qmake.patch \
+           file://0006-freetype-host-includes.patch \
+           file://0008-qt-lib-infix.patch \
+           file://0009-support-2bpp.patch \
+           file://0010-no-simpledecoration-example.patch \
+           file://fix-config-tests.patch \
+           file://qt-config.patch \
+           file://g++.conf \
+           file://linux.conf \
+           file://hack-out-pg_config.patch \
+           file://mips-relocate.patch \
+           "
+
+SRC_URI[md5sum] = "5c69f16d452b0bb3d44bc3c10556c072"
+SRC_URI[sha256sum] = "f4e0ada8d4d516bbb8600a3ee7d9046c9c79e38cd781df9ffc46d8f16acd1768"
+
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+do_configure_prepend() {
+    for pro in $(find ${S} -name "*.pro") ; do
+        sed -i 's:$$QT_BUILD_TREE/bin/lrelease:${OE_QMAKE_LRELEASE}:g' $pro
+    done
+
+    sed -i s:SEDME:${S}: ${WORKDIR}/linux.conf
+    sed -i \
+    -e /QMAKE_MOC\ /d \
+    -e /QMAKE_UIC\ /d \
+    -e /QMAKE_UIC3\ /d \
+    -e /QMAKE_RCC\ /d \
+    ${S}/configure
+}
+
+do_configure_append() {
+    sed -e '/QMAKE_TARGET /d' -e '/TARGET /d' -i ${S}/translations/Makefile
+}
+
+QT_GLFLAGS ?= ""
+QT_CONFIG_FLAGS += " -no-rpath -qt3support -reduce-relocations -silent ${QT_GLFLAGS}"
+
+do_compile() {
+    # Fixup missing wsegl header in some SGX SDKs
+    if ! [ -e ${STAGING_INCDIR}/wsegl.h ] ; then
+        cp src/3rdparty/powervr/wsegl.h src/plugins/gfxdrivers/powervr/QWSWSEGL/
+    fi
+
+    unset CFLAGS CXXFLAGS
+    oe_runmake ${EXTRA_ENV}
+}
diff --git a/meta-oe/recipes-qt/qt4/qt-4.7.1.inc b/meta-oe/recipes-qt/qt4/qt-4.7.1.inc
new file mode 100644
index 0000000000..70ee59697c
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.7.1.inc
@@ -0,0 +1,58 @@
+LICENSE = "LGPLv2.1 | GPLv3"
+LIC_FILES_CHKSUM = "file://LICENSE.LGPL;md5=fbc093901857fcd118f065f900982c24 \
+                    file://LICENSE.GPL3;md5=babc5b6b77441da277f5c06b2e547720 \
+                    file://LGPL_EXCEPTION.txt;md5=411080a56ff917a5a1aa08c98acae354"
+
+FILESPATH =. "${FILE_DIRNAME}/qt-${PV}:"
+
+SRC_URI = "http://get.qt.nokia.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://0004-no-qmake.patch \
+           file://hack-out-pg2-4.7.0.patch \
+           file://0006-freetype-host-includes.patch \
+           file://0001-Added-Openembedded-crossarch-option.patch \
+           file://g++.conf \
+           file://linux.conf \
+           "
+
+SRC_URI[md5sum] = "6f88d96507c84e9fea5bf3a71ebeb6d7"
+SRC_URI[sha256sum] = "8cb5277c41f824cfc6dcee0e95e0bf23a9ad2c8d18d245105137481d092b124a"
+
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+FILES_${QT_BASE_NAME}-tools                += "${bindir}/qml"
+
+do_configure_prepend() {
+    for pro in $(find ${S} -name "*.pro") ; do
+        sed -i 's:$$QT_BUILD_TREE/bin/lrelease:${OE_QMAKE_LRELEASE}:g' $pro
+    done
+
+    sed -i s:SEDME:${S}: ${WORKDIR}/linux.conf
+    sed -i \
+    -e /QMAKE_MOC\ /d \
+    -e /QMAKE_UIC\ /d \
+    -e /QMAKE_UIC3\ /d \
+    -e /QMAKE_RCC\ /d \
+    ${S}/configure
+}
+
+do_configure_append() {
+    sed -e '/QMAKE_TARGET /d' -e '/TARGET /d' -i ${S}/translations/Makefile
+}
+
+QT_GLFLAGS ?= ""
+QT_CONFIG_FLAGS += " -xmlpatterns -no-rpath -qt3support -reduce-relocations -silent ${QT_GLFLAGS}"
+
+do_compile() {
+    # Fixup missing wsegl header in some SGX SDKs
+    if ! [ -e ${STAGING_INCDIR}/wsegl.h ] ; then
+        cp src/3rdparty/powervr/wsegl.h src/plugins/gfxdrivers/powervr/QWSWSEGL/
+    fi
+
+    unset CFLAGS CXXFLAGS
+    install -m 0755 ${STAGING_BINDIR_NATIVE}/rcc4 ${S}/bin/rcc
+    install -m 0755 ${STAGING_BINDIR_NATIVE}/moc4 ${S}/bin/moc
+    install -m 0755 ${STAGING_BINDIR_NATIVE}/uic4 ${S}/bin/uic
+    install -m 0755 ${STAGING_BINDIR_NATIVE}/lrelease4 ${S}/bin/lrelease
+
+    oe_runmake ${EXTRA_ENV}
+}
diff --git a/meta-oe/recipes-qt/qt4/qt-4.7.1/0001-Added-Openembedded-crossarch-option.patch b/meta-oe/recipes-qt/qt4/qt-4.7.1/0001-Added-Openembedded-crossarch-option.patch
new file mode 100644
index 0000000000..71a04a59d2
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.7.1/0001-Added-Openembedded-crossarch-option.patch
@@ -0,0 +1,44 @@
+From b1ba119f6a824dc01bd42ee00dba4a1653867b72 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Matthias=20G=C3=BCnther?= <matgnt@gmail.com>
+Date: Wed, 12 May 2010 16:52:45 +0200
+Subject: [PATCH 1/9] Added Openembedded "-crossarch" option
+
+---
+ configure |    7 ++++++-
+ 1 files changed, 6 insertions(+), 1 deletions(-)
+
+diff --git a/configure b/configure
+index facd192..9d15136 100755
+--- a/configure
++++ b/configure
+@@ -954,7 +954,7 @@ while [ "$#" -gt 0 ]; do
+         shift
+         VAL=$1
+         ;;
+-    -prefix|-docdir|-headerdir|-plugindir|-importdir|-datadir|-libdir|-bindir|-translationdir|-sysconfdir|-examplesdir|-demosdir|-depths|-make|-nomake|-platform|-xplatform|-buildkey|-sdk|-arch|-host-arch|-mysql_config)
++    -prefix|-docdir|-headerdir|-plugindir|-importdir|-datadir|-libdir|-bindir|-translationdir|-sysconfdir|-examplesdir|-demosdir|-depths|-make|-nomake|-platform|-xplatform|-buildkey|-sdk|-arch|-host-arch|-mysql_config|-crossarch)
+         VAR=`echo $1 | sed "s,^-\(.*\),\1,"`
+         shift
+         VAL="$1"
+@@ -1443,6 +1443,9 @@ while [ "$#" -gt 0 ]; do
+     xplatform)
+         XPLATFORM="$VAL"
+         ;;
++	crossarch)
++		CROSSARCH="$VAL"
++		;;
+     debug-and-release)
+         if [ "$VAL" = "yes" ] || [ "$VAL" = "no" ]; then
+             CFG_DEBUG_RELEASE="$VAL"
+@@ -2918,6 +2921,8 @@ elif [ "$PLATFORM_MAC" = "yes" ] || [ -z "$CFG_ARCH" ]; then
+     CFG_ARCH=$CFG_HOST_ARCH
+ fi
+ 
++CFG_ARCH="$CROSSARCH"
++
+ if [ -d "$relpath/src/corelib/arch/$CFG_ARCH" ]; then
+     if [ "$OPT_VERBOSE" = "yes" ]; then
+         echo "    '$CFG_ARCH' is supported"
+-- 
+1.7.0.4
+
diff --git a/meta-oe/recipes-qt/qt4/qt-4.7.1/g++.conf b/meta-oe/recipes-qt/qt4/qt-4.7.1/g++.conf
new file mode 100644
index 0000000000..80f925cc5e
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.7.1/g++.conf
@@ -0,0 +1,60 @@
+#
+# qmake configuration for common gcc
+#
+
+QMAKE_CC       = $(OE_QMAKE_CC)
+QMAKE_CFLAGS       += -pipe $(OE_QMAKE_CFLAGS)
+QMAKE_CFLAGS_RELEASE_WITH_DEBUGINFO += $(OE_QMAKE_CFLAGS)
+QMAKE_CFLAGS_DEPS	+= -M
+QMAKE_CFLAGS_WARN_ON	+= -Wall -W
+QMAKE_CFLAGS_WARN_OFF	+= -w
+QMAKE_CFLAGS_RELEASE	+=
+QMAKE_CFLAGS_DEBUG	+= -g
+QMAKE_CFLAGS_SHLIB	+= -fPIC
+QMAKE_CFLAGS_STATIC_LIB	+= -fPIC
+QMAKE_CFLAGS_YACC	+= -Wno-unused -Wno-parentheses
+QMAKE_CFLAGS_HIDESYMS   += -fvisibility=hidden
+QMAKE_CFLAGS_PRECOMPILE += -x c-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+QMAKE_CFLAGS_USE_PRECOMPILE += -include ${QMAKE_PCH_OUTPUT_BASE}
+
+QMAKE_CXX      = $(OE_QMAKE_CXX)
+QMAKE_CXXFLAGS     += $$QMAKE_CFLAGS $(OE_QMAKE_CXXFLAGS)
+QMAKE_CXXFLAGS_DEPS	+= $$QMAKE_CFLAGS_DEPS
+QMAKE_CXXFLAGS_WARN_ON	+= $$QMAKE_CFLAGS_WARN_ON
+QMAKE_CXXFLAGS_WARN_OFF	+= $$QMAKE_CFLAGS_WARN_OFF
+QMAKE_CXXFLAGS_RELEASE	+= $$QMAKE_CFLAGS_RELEASE
+QMAKE_CXXFLAGS_RELEASE_WITH_DEBUGINFO += $$QMAKE_CFLAGS_RELEASE_WITH_DEBUGINFO
+QMAKE_CXXFLAGS_DEBUG	+= $$QMAKE_CFLAGS_DEBUG
+QMAKE_CXXFLAGS_SHLIB	+= $$QMAKE_CFLAGS_SHLIB
+QMAKE_CXXFLAGS_STATIC_LIB += $$QMAKE_CFLAGS_STATIC_LIB
+QMAKE_CXXFLAGS_YACC	+= $$QMAKE_CFLAGS_YACC
+QMAKE_CXXFLAGS_HIDESYMS += $$QMAKE_CFLAGS_HIDESYMS -fvisibility-inlines-hidden
+QMAKE_CXXFLAGS_PRECOMPILE += -x c++-header -c ${QMAKE_PCH_INPUT} -o ${QMAKE_PCH_OUTPUT}
+QMAKE_CXXFLAGS_USE_PRECOMPILE = $$QMAKE_CFLAGS_USE_PRECOMPILE
+
+QMAKE_LINK     = $(OE_QMAKE_LINK)
+QMAKE_LINK_SHLIB   = $(OE_QMAKE_LINK)
+QMAKE_LINK_C		= $(OE_QMAKE_LINK)
+QMAKE_LINK_C_SHLIB	= $(OE_QMAKE_LINK)
+QMAKE_LFLAGS       += $(OE_QMAKE_LDFLAGS)
+QMAKE_LFLAGS_RELEASE	+=
+QMAKE_LFLAGS_DEBUG	+=
+QMAKE_LFLAGS_APP	+=
+QMAKE_LFLAGS_SHLIB	+= -shared
+QMAKE_LFLAGS_PLUGIN	+= $$QMAKE_LFLAGS_SHLIB
+QMAKE_LFLAGS_SONAME	+= -Wl,-soname,
+QMAKE_LFLAGS_THREAD	+=
+QMAKE_LFLAGS_NOUNDEF	+= -Wl,--no-undefined
+QMAKE_LFLAGS_RPATH        = -Wl,-rpath-link,
+
+QMAKE_PCH_OUTPUT_EXT    = .gch
+
+# -Bsymbolic-functions (ld) support
+QMAKE_LFLAGS_BSYMBOLIC_FUNC = -Wl,-Bsymbolic-functions
+QMAKE_LFLAGS_DYNAMIC_LIST = -Wl,--dynamic-list,
+
+# some linking helper...
+CONFIG += rpath_libdirs
+
+# for the SDK
+isEmpty(QMAKE_QT_CONFIG):QMAKE_QT_CONFIG = $(OE_QMAKE_QT_CONFIG)
diff --git a/meta-oe/recipes-qt/qt4/qt-4.7.1/hack-out-pg2-4.7.0.patch b/meta-oe/recipes-qt/qt4/qt-4.7.1/hack-out-pg2-4.7.0.patch
new file mode 100644
index 0000000000..5c588ff0f7
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.7.1/hack-out-pg2-4.7.0.patch
@@ -0,0 +1,19 @@
+Index: qt-everywhere-opensource-src-4.7.0/configure
+===================================================================
+--- qt-everywhere-opensource-src-4.7.0.orig/configure	2010-09-22 15:43:51.191162141 -0400
++++ qt-everywhere-opensource-src-4.7.0/configure	2010-09-22 15:44:35.179981232 -0400
+@@ -4921,10 +4921,10 @@
+         psql)
+             if [ "$CFG_SQL_psql" != "no" ]; then
+                 # Be careful not to use native pg_config when cross building.
+-                if [ "$XPLATFORM_MINGW" != "yes" ] && "$WHICH" pg_config >/dev/null 2>&1; then
+-                    QT_CFLAGS_PSQL=`pg_config --includedir 2>/dev/null`
+-                    QT_LFLAGS_PSQL=`pg_config --libdir 2>/dev/null`
+-                fi
++#                if [ "$XPLATFORM_MINGW" != "yes" ] && "$WHICH" pg_config >/dev/null 2>&1; then
++#                    QT_CFLAGS_PSQL=`pg_config --includedir 2>/dev/null`
++#                    QT_LFLAGS_PSQL=`pg_config --libdir 2>/dev/null`
++#                fi
+                 [ -z "$QT_CFLAGS_PSQL" ] || QT_CFLAGS_PSQL="-I$QT_CFLAGS_PSQL"
+                 [ -z "$QT_LFLAGS_PSQL" ] || QT_LFLAGS_PSQL="-L$QT_LFLAGS_PSQL"
+                 # But, respect PSQL_LIBS if set
diff --git a/meta-oe/recipes-qt/qt4/qt-4.7.1/linux.conf b/meta-oe/recipes-qt/qt4/qt-4.7.1/linux.conf
new file mode 100644
index 0000000000..a54135513b
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt-4.7.1/linux.conf
@@ -0,0 +1,66 @@
+#
+# qmake configuration for common linux
+#
+
+QMAKE_CFLAGS_THREAD	+= -D_REENTRANT
+QMAKE_CXXFLAGS_THREAD	+= $$QMAKE_CFLAGS_THREAD
+
+QMAKE_INCDIR          =
+QMAKE_LIBDIR          =
+QMAKE_INCDIR_X11      =
+QMAKE_LIBDIR_X11      =
+QMAKE_INCDIR_QT       = $(OE_QMAKE_INCDIR_QT)
+QMAKE_LIBDIR_QT       = $(OE_QMAKE_LIBDIR_QT)
+QMAKE_INCDIR_OPENGL   =
+QMAKE_LIBDIR_OPENGL   =
+QMAKE_INCDIR_OPENGL_ES1 = $$QMAKE_INCDIR_OPENGL
+QMAKE_LIBDIR_OPENGL_ES1 = $$QMAKE_LIBDIR_OPENGL
+QMAKE_INCDIR_OPENGL_ES2 = $$QMAKE_INCDIR_OPENGL
+QMAKE_LIBDIR_OPENGL_ES2 = $$QMAKE_LIBDIR_OPENGL
+QMAKE_INCDIR_EGL      =
+QMAKE_LIBDIR_EGL      =
+QMAKE_INCDIR_OPENVG   =
+QMAKE_LIBDIR_OPENVG   =
+
+
+QMAKE_LIBS            =
+QMAKE_LIBS_DYNLOAD    = -ldl
+QMAKE_LIBS_X11        = $(OE_QMAKE_LIBS_X11)
+QMAKE_LIBS_X11SM      = $(OE_QMAKE_LIBS_X11SM)
+QMAKE_LIBS_NIS        = -lnsl
+QMAKE_LIBS_EGL        = -lEGL
+QMAKE_LIBS_OPENGL     = -lGLU -lGL
+QMAKE_LIBS_OPENGL_QT  = -lGL
+QMAKE_LIBS_OPENGL_ES1 = -lGLES_CM
+QMAKE_LIBS_OPENGL_ES2 = -lGLESv2
+QMAKE_LIBS_OPENVG     = -lOpenVG
+QMAKE_LIBS_THREAD     = -lpthread
+
+QMAKE_MOC             = $(OE_QMAKE_MOC)
+QMAKE_UIC             = $(OE_QMAKE_UIC)
+QMAKE_UIC3            = $(OE_QMAKE_UIC3)
+QMAKE_RCC             = $(OE_QMAKE_RCC)
+QMAKE_QDBUSCPP2XML    = $(OE_QMAKE_QDBUSCPP2XML)
+QMAKE_QDBUSXML2CPP    = $(OE_QMAKE_QDBUSXML2CPP)
+
+QMAKE_AR              = $(OE_QMAKE_AR) cqs
+QMAKE_OBJCOPY         = objcopy
+QMAKE_RANLIB          =
+
+QMAKE_TAR             = tar -cf
+QMAKE_GZIP            = gzip -9f
+
+QMAKE_COPY            = cp -f
+QMAKE_COPY_FILE       = $(COPY)
+QMAKE_COPY_DIR        = $(COPY) -r
+QMAKE_MOVE            = mv -f
+QMAKE_DEL_FILE        = rm -f
+QMAKE_DEL_DIR         = rmdir
+QMAKE_STRIP           = $(OE_QMAKE_STRIP)
+QMAKE_STRIPFLAGS_LIB += --strip-unneeded
+QMAKE_CHK_DIR_EXISTS  = test -d
+QMAKE_MKDIR           = mkdir -p
+QMAKE_INSTALL_FILE    = install -m 644 -p
+QMAKE_INSTALL_PROGRAM = install -m 755 -p
+
+include(unix.conf)
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0006-freetype-host-includes.patch b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0006-freetype-host-includes.patch
new file mode 100644
index 0000000000..987c425138
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0006-freetype-host-includes.patch
@@ -0,0 +1,20 @@
+From c9ab62bd9a56643574b3ae6e59e0ca776d4860d2 Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Mon, 4 Jun 2007 14:48:50 +0200
+Subject: [PATCH] freetype host includes
+
+---
+ config.tests/unix/freetype/freetype.pri |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/config.tests/unix/freetype/freetype.pri	2009-02-25 22:32:32.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri	2009-03-26 17:14:16.000000000 +0100
+@@ -1,5 +1,5 @@
+ !cross_compile {
+-    TRY_INCLUDEPATHS = /include /usr/include $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
++    TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     # LSB doesn't allow using headers from /include or /usr/include
+     linux-lsb-g++:TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     for(p, TRY_INCLUDEPATHS) {
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0008-qt-lib-infix.patch b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0008-qt-lib-infix.patch
new file mode 100644
index 0000000000..61e60a0eb6
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0008-qt-lib-infix.patch
@@ -0,0 +1,32 @@
+--- /tmp/uitools.prf	2009-12-01 18:38:22.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/mkspecs/features/uitools.prf	2009-12-01 18:58:16.000000000 +0100
+@@ -3,11 +3,11 @@
+ 
+ # Include the correct version of the UiLoader library
+ symbian: QTUITOOLS_LINKAGE = -lQtUiTools.lib
+-else: QTUITOOLS_LINKAGE = -lQtUiTools
++else: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}
+ 
+ CONFIG(debug, debug|release) {
+-    mac: QTUITOOLS_LINKAGE = -lQtUiTools_debug
+-    win32: QTUITOOLS_LINKAGE = -lQtUiToolsd
++    mac: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}_debug
++    win32: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}d
+ }
+ LIBS += $$QTUITOOLS_LINKAGE
+ 
+--- /tmp/uitools.pro	2009-12-01 18:40:28.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/tools/designer/src/uitools/uitools.pro	2009-12-01 18:59:18.000000000 +0100
+@@ -1,5 +1,5 @@
+ TEMPLATE = lib
+-TARGET = $$qtLibraryTarget(QtUiTools)
++TARGET = QtUiTools
+ QT += xml
+ CONFIG += qt staticlib
+ DESTDIR = ../../../../lib
+@@ -43,3 +43,5 @@
+    QMAKE_PKGCONFIG_DESTDIR = pkgconfig
+    QMAKE_PKGCONFIG_REQUIRES += QtXml
+ }
++
++TARGET = $$qtLibraryTarget($$TARGET$$QT_LIBINFIX) #do this towards the end
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0010-no-simpledecoration-example.patch b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0010-no-simpledecoration-example.patch
new file mode 100644
index 0000000000..fce5bba938
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/0010-no-simpledecoration-example.patch
@@ -0,0 +1,11 @@
+--- /tmp/qws.pro	2009-12-10 19:30:08.000000000 +0100
++++ qt-everywhere-opensource-src-4.6.0/examples/qws/qws.pro	2009-12-10 19:30:21.000000000 +0100
+@@ -1,7 +1,7 @@
+ TEMPLATE      = subdirs
+ # no /dev/fbX
+ !qnx:!vxworks:SUBDIRS = framebuffer
+-SUBDIRS      += mousecalibration simpledecoration
++SUBDIRS      += mousecalibration
+ 
+ # install
+ sources.files = $$SOURCES $$HEADERS $$RESOURCES $$FORMS README *.pro
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/linux.conf b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/linux.conf
new file mode 100644
index 0000000000..68ae80b929
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded-4.6.3/linux.conf
@@ -0,0 +1,54 @@
+#
+# qmake configuration for common linux
+#
+
+QMAKE_CFLAGS_THREAD	+= -D_REENTRANT
+QMAKE_CXXFLAGS_THREAD	+= $$QMAKE_CFLAGS_THREAD
+
+QMAKE_INCDIR          =
+QMAKE_LIBDIR          =
+QMAKE_INCDIR_X11      =
+QMAKE_LIBDIR_X11      =
+QMAKE_INCDIR_QT       = $(OE_QMAKE_INCDIR_QT)
+QMAKE_LIBDIR_QT       = $(OE_QMAKE_LIBDIR_QT)
+QMAKE_INCDIR_OPENGL   =
+QMAKE_LIBDIR_OPENGL   =
+
+
+QMAKE_LIBS            = -Wl,-rpath-link,SEDME/lib -lglib-2.0
+QMAKE_LIBS_DYNLOAD    = -ldl
+QMAKE_LIBS_X11        = $(OE_QMAKE_LIBS_X11)
+QMAKE_LIBS_X11SM      = $(OE_QMAKE_LIBS_X11SM)
+QMAKE_LIBS_NIS        = -lnsl
+QMAKE_LIBS_OPENGL     = -lGLU -lGL
+QMAKE_LIBS_OPENGL_QT  = -lGL
+QMAKE_LIBS_THREAD     = -lpthread
+
+QMAKE_MOC             = $(OE_QMAKE_MOC)
+QMAKE_UIC             = $(OE_QMAKE_UIC)
+QMAKE_UIC3            = $(OE_QMAKE_UIC3)
+QMAKE_RCC             = $(OE_QMAKE_RCC)
+QMAKE_QDBUSCPP2XML    = $(OE_QMAKE_QDBUSCPP2XML)
+QMAKE_QDBUSXML2CPP    = $(OE_QMAKE_QDBUSXML2CPP)
+
+QMAKE_AR              = $(OE_QMAKE_AR) cqs
+QMAKE_OBJCOPY         = ${OBJCOPY}
+QMAKE_RANLIB          =
+
+QMAKE_TAR             = tar -cf
+QMAKE_GZIP            = gzip -9f
+
+QMAKE_COPY            = cp -f
+QMAKE_COPY_FILE       = $(COPY)
+QMAKE_COPY_DIR        = $(COPY) -r
+QMAKE_MOVE            = mv -f
+QMAKE_DEL_FILE        = rm -f
+QMAKE_DEL_DIR         = rmdir
+QMAKE_STRIP           = $(OE_QMAKE_STRIP)
+QMAKE_STRIPFLAGS_LIB += --strip-unneeded
+QMAKE_CHK_DIR_EXISTS  = test -d
+QMAKE_MKDIR           = mkdir -p
+QMAKE_INSTALL_FILE    = install -m 644 -p
+QMAKE_INSTALL_PROGRAM = install -m 755 -p
+
+include(unix.conf)
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded.inc b/meta-oe/recipes-qt/qt4/qt4-embedded.inc
new file mode 100644
index 0000000000..2ed1819f6f
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded.inc
@@ -0,0 +1,34 @@
+DESCRIPTION = "Qt is a versatile cross-platform application framework -- this is the embedded version."
+SECTION = "libs"
+LICENSE = "LGPLv2.1 | GPLv3"
+PRIORITY = "optional"
+HOMEPAGE = "http://qt.nokia.com"
+DEPENDS += "directfb tslib"
+INC_PR = "r26"
+
+QT_BASE_NAME ?= "qt4-embedded"
+QT_BASE_LIB  ?= "libqt-embedded"
+
+# Set necessary variables in the profile
+SRC_URI += "file://qte.sh"
+
+QT_CONFIG_FLAGS += " \
+    -embedded ${QT_ARCH} \
+    -qtlibinfix ${QT_LIBINFIX} \
+    -plugin-gfx-transformed -plugin-gfx-qvfb -plugin-gfx-vnc -plugin-gfx-directfb \
+    -plugin-mouse-tslib -qt-mouse-pc -qt-mouse-qvfb -qt-mouse-linuxinput \
+    -qt-kbd-tty \
+    -DQT_KEYPAD_NAVIGATION \
+    "
+
+require qt4.inc
+
+do_install_append() {
+    install -d ${D}${sysconfdir}/profile.d/
+    install -m 0755 ${WORKDIR}/qte.sh ${D}${sysconfdir}/profile.d/
+}
+
+FILES_${PN} += " ${sysconfdir}/profile.d/qte.sh"
+
+inherit qt4e
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded/0006-freetype-host-includes.patch b/meta-oe/recipes-qt/qt4/qt4-embedded/0006-freetype-host-includes.patch
new file mode 100644
index 0000000000..987c425138
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded/0006-freetype-host-includes.patch
@@ -0,0 +1,20 @@
+From c9ab62bd9a56643574b3ae6e59e0ca776d4860d2 Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Mon, 4 Jun 2007 14:48:50 +0200
+Subject: [PATCH] freetype host includes
+
+---
+ config.tests/unix/freetype/freetype.pri |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/config.tests/unix/freetype/freetype.pri	2009-02-25 22:32:32.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri	2009-03-26 17:14:16.000000000 +0100
+@@ -1,5 +1,5 @@
+ !cross_compile {
+-    TRY_INCLUDEPATHS = /include /usr/include $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
++    TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     # LSB doesn't allow using headers from /include or /usr/include
+     linux-lsb-g++:TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     for(p, TRY_INCLUDEPATHS) {
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded_4.6.3.bb b/meta-oe/recipes-qt/qt4/qt4-embedded_4.6.3.bb
new file mode 100644
index 0000000000..dd662aa3d8
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded_4.6.3.bb
@@ -0,0 +1,9 @@
+require qt-${PV}.inc
+require qt4-embedded.inc
+
+SRC_URI += "file://qthelp-lib-qtclucene.patch"
+
+PR = "${INC_PR}.1"
+
+QT_CONFIG_FLAGS_append_armv6 = " -no-neon "
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-embedded_4.7.1.bb b/meta-oe/recipes-qt/qt4/qt4-embedded_4.7.1.bb
new file mode 100644
index 0000000000..c3f6713199
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-embedded_4.7.1.bb
@@ -0,0 +1,10 @@
+require qt-${PV}.inc
+require qt4-embedded.inc
+
+PR = "${INC_PR}.1"
+
+QT_CONFIG_FLAGS_append_armv6 = " -no-neon "
+
+QT_CONFIG_FLAGS += " \
+ -exceptions \
+"
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-native.inc b/meta-oe/recipes-qt/qt4/qt4-tools-native.inc
new file mode 100644
index 0000000000..9114e7df6c
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-native.inc
@@ -0,0 +1,77 @@
+DESCRIPTION = "Native tools for Qt/[X11|Mac|Embedded] version 4.x"
+DEPENDS = "zlib-native dbus-native"
+SECTION = "libs"
+HOMEPAGE = "http://qt.nokia.com"
+PRIORITY = "optional"
+
+LICENSE = "LGPLv2.1 | GPLv3"
+LIC_FILES_CHKSUM = "file://LICENSE.LGPL;md5=fbc093901857fcd118f065f900982c24 \
+                    file://LICENSE.GPL3;md5=babc5b6b77441da277f5c06b2e547720 \
+                    file://LGPL_EXCEPTION.txt;md5=411080a56ff917a5a1aa08c98acae354"
+
+INC_PR = "r11"
+
+inherit native
+
+SRC_URI = "http://get.qt.nokia.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://qt-config.patch \
+           file://g++.conf \
+           file://linux.conf"
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+EXTRA_OECONF = "-prefix ${prefix} \
+                -L ${STAGING_LIBDIR_NATIVE} \
+                -I ${STAGING_INCDIR_NATIVE} \
+                -qt-libjpeg -qt-gif -system-zlib \
+                -no-libjpeg -no-libpng -no-libmng -no-libtiff \
+                -no-accessibility \
+                -no-cups \
+                -no-exceptions  \
+                -no-nas-sound \
+                -no-nis -no-openssl \
+                -verbose -release -static \
+                -embedded -no-freetype -no-glib -no-iconv \
+                -qt3support"
+
+# yank default -e, otherwise we get the following error:
+# moc_qbuffer.cpp: No such file or directory
+EXTRA_OEMAKE = " "
+
+do_configure() {
+   (echo o; echo yes) | ./configure ${EXTRA_OECONF} || die "Configuring qt failed. EXTRA_OECONF was ${EXTRA_OECONF}"
+}
+
+TOBUILD = "\
+  src/tools/moc \
+  src/corelib \
+  src/sql \
+  src/dbus \
+  src/qt3support \
+  src/xml \
+  src/tools/uic \
+  src/tools/rcc \
+  src/network \
+  tools/linguist/lrelease \
+  tools/linguist/lupdate \
+"
+
+do_compile() {
+    for i in ${TOBUILD}; do
+        cd ${S}/$i && oe_runmake CC="${CC}" CXX="${CXX}"
+    done
+}
+
+do_install() {
+    install -d ${D}${bindir}/
+    install -m 0755 bin/qmake ${D}${bindir}/qmake2
+    for i in moc uic rcc lrelease lupdate; do
+        install -m 0755 bin/${i} ${D}${bindir}/${i}4
+    done
+    
+    install -d ${D}${datadir}/qt4/
+    cp -PfR mkspecs ${D}${datadir}/qt4/
+    ln -sf linux-g++ ${D}${datadir}/qt4/mkspecs/${BUILD_OS}-oe-g++
+    cp -f ${WORKDIR}/g++.conf ${WORKDIR}/linux.conf ${D}${datadir}/qt4/mkspecs/common/
+
+    install -m 0644 tools/porting/src/q3porting.xml ${D}${datadir}/qt4/
+}
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-native_4.6.3.bb b/meta-oe/recipes-qt/qt4/qt4-tools-native_4.6.3.bb
new file mode 100644
index 0000000000..dae8cd19e3
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-native_4.6.3.bb
@@ -0,0 +1,11 @@
+require qt4-tools-native.inc
+
+PR = "${INC_PR}.0"
+
+EXTRA_OECONF += " -no-fast -silent -no-rpath"
+
+TOBUILD := "src/tools/bootstrap ${TOBUILD}"
+
+SRC_URI[md5sum] = "5c69f16d452b0bb3d44bc3c10556c072"
+SRC_URI[sha256sum] = "f4e0ada8d4d516bbb8600a3ee7d9046c9c79e38cd781df9ffc46d8f16acd1768"
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-native_4.7.1.bb b/meta-oe/recipes-qt/qt4/qt4-tools-native_4.7.1.bb
new file mode 100644
index 0000000000..e9de510fea
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-native_4.7.1.bb
@@ -0,0 +1,13 @@
+require qt4-tools-native.inc
+
+PR = "${INC_PR}.0"
+
+# Find the g++.conf/linux.conf in the right directory.
+FILESPATHPKG =. "qt-${PV}:"
+
+EXTRA_OECONF += " -no-fast -silent -no-rpath"
+
+TOBUILD := "src/tools/bootstrap ${TOBUILD}"
+
+SRC_URI[md5sum] = "6f88d96507c84e9fea5bf3a71ebeb6d7"
+SRC_URI[sha256sum] = "8cb5277c41f824cfc6dcee0e95e0bf23a9ad2c8d18d245105137481d092b124a"
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk.inc b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk.inc
new file mode 100644
index 0000000000..f273c9fab8
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk.inc
@@ -0,0 +1,111 @@
+DESCRIPTION = "SDK tools for Qt/[X11|Mac|Embedded] version 4.x"
+DEPENDS = "zlib-nativesdk dbus-nativesdk libx11-nativesdk qt4-tools-native"
+SECTION = "libs"
+HOMEPAGE = "http://qt.nokia.com"
+PRIORITY = "optional"
+LICENSE = "LGPLv2.1 | GPLv3"
+
+INC_PR = "r3"
+
+FILESPATHPKG =. "qt-${PV}:"
+inherit nativesdk qmake2
+
+SRC_URI = "http://get.qt.nokia.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://configure-lflags.patch \
+           file://compile.test-lflags.patch \
+           file://qt-config.patch \
+           file://qmake-exists-check.patch \
+           file://configure-paths.patch \
+           file://g++.conf \
+           file://linux.conf"
+
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+LIC_FILES_CHKSUM = "file://LICENSE.LGPL;md5=fbc093901857fcd118f065f900982c24 \
+                    file://LICENSE.GPL3;md5=babc5b6b77441da277f5c06b2e547720 \
+                    file://LGPL_EXCEPTION.txt;md5=411080a56ff917a5a1aa08c98acae354"
+
+# FIXME: make it work with "${STAGING_BINDIR_NATIVE}/pkg-config --cflags dbus-1"
+EXTRA_OECONF = "-prefix ${prefix} \
+                -qt-libjpeg -qt-gif -system-zlib \
+                -no-libjpeg -no-libpng -no-libmng -no-libtiff \
+                -no-accessibility \
+                -no-cups \
+                -no-exceptions  \
+                -no-nas-sound \
+                -no-nis -no-openssl \
+                -verbose -release -fast -static \
+                -platform ${TARGET_OS}-oe-g++ \
+                -xplatform ${TARGET_OS}-oe-g++ \
+                -embedded -no-freetype -no-glib -no-iconv \
+                -qt3support \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/include \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/include/freetype2 \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/include/dbus-1.0 \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/lib/dbus-1.0/include \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/include/c++ \
+                -I${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/include/c++/${TARGET_SYS} \
+                -L${STAGING_DIR_HOST}${SDKPATHNATIVE}/lib \
+                -L${STAGING_DIR_HOST}${SDKPATHNATIVE}/usr/lib"
+
+# yank default -e, otherwise we get the following error:
+# moc_qbuffer.cpp: No such file or directory
+EXTRA_OEMAKE = " "
+
+do_configure() {
+    if [ ! -e bin/qmake ]; then
+        ln -sf ${STAGING_BINDIR_NATIVE}/qmake2 bin/qmake
+    fi
+
+    if [ ! -e mkspecs/${TARGET_OS}-oe-g++ ]; then
+        ln -sf linux-g++ mkspecs/${TARGET_OS}-oe-g++
+    fi
+
+    cp ../g++.conf mkspecs/common
+    cp ../linux.conf mkspecs/common
+
+    (echo o; echo yes) | ./configure ${EXTRA_OECONF} || die "Configuring qt failed. EXTRA_OECONF was ${EXTRA_OECONF}"
+}
+
+TOBUILD = "\
+  src/tools/bootstrap \
+  src/tools/moc \
+  src/corelib \
+  src/sql \
+  src/dbus \
+  src/qt3support \
+  src/xml \
+  src/tools/uic \
+  src/tools/rcc \
+  src/network \
+  src/gui \
+  src/tools/uic3 \
+  tools/linguist/lrelease \
+  tools/linguist/lupdate \
+  tools/qdbus \
+"
+
+do_compile() {
+    for i in ${TOBUILD}; do
+        cd ${S}/$i && oe_runmake CC="${CC}" CXX="${CXX}"
+    done
+}
+
+do_install() {
+    install -d ${D}${bindir}
+    install -m 0755 bin/qmake ${D}${bindir}/qmake2
+    for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do
+        install -m 0755 bin/${i} ${D}${bindir}/${i}4
+    done
+
+    (cd ${D}${bindir}; \
+    ln -s qmake2 qmake; \
+    for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do \
+        ln -s ${i}4 ${i}; \
+    done)
+
+    # make a symbolic link to mkspecs for compatibility with Nokia's SDK
+    # and QTCreator
+    (cd ${D}${bindir}/..; ln -s ${TARGET_SYS}/usr/share/qtopia/mkspecs mkspecs;)
+}
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.6.3.bb b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.6.3.bb
new file mode 100644
index 0000000000..d64542b5fe
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.6.3.bb
@@ -0,0 +1,6 @@
+require qt4-tools-nativesdk.inc
+
+PR = "${INC_PR}.0"
+
+SRC_URI[md5sum] = "5c69f16d452b0bb3d44bc3c10556c072"
+SRC_URI[sha256sum] = "f4e0ada8d4d516bbb8600a3ee7d9046c9c79e38cd781df9ffc46d8f16acd1768"
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.7.1.bb b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.7.1.bb
new file mode 100644
index 0000000000..091a539271
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-nativesdk_4.7.1.bb
@@ -0,0 +1,6 @@
+require qt4-tools-nativesdk.inc
+
+PR = "${INC_PR}.0"
+
+SRC_URI[md5sum] = "6f88d96507c84e9fea5bf3a71ebeb6d7"
+SRC_URI[sha256sum] = "8cb5277c41f824cfc6dcee0e95e0bf23a9ad2c8d18d245105137481d092b124a"
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-sdk.inc b/meta-oe/recipes-qt/qt4/qt4-tools-sdk.inc
new file mode 100644
index 0000000000..1bcfed060f
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-sdk.inc
@@ -0,0 +1,88 @@
+DESCRIPTION = "SDK tools for Qt/[X11|Mac|Embedded] version 4.x"
+DEPENDS = "zlib-native dbus-native"
+SECTION = "libs"
+HOMEPAGE = "http://www.trolltech.com"
+PRIORITY = "optional"
+LICENSE = "LGPLv2.1 GPLv3"
+
+INC_PR = "r2"
+
+FILESPATHPKG =. "qt-${PV}:"
+inherit nativesdk
+
+SRC_URI = "ftp://ftp.trolltech.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://configure-lflags.patch \
+           file://compile.test-lflags.patch \
+           file://qt-config.patch \
+           file://g++.conf \
+           file://linux.conf"
+
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+
+# FIXME: make it work with "${STAGING_BINDIR_NATIVE}/pkg-config --cflags dbus-1"
+EXTRA_OECONF = "-prefix ${prefix} \
+                -qt-libjpeg -qt-gif -system-zlib \
+                -no-libjpeg -no-libpng -no-libmng -no-libtiff \
+                -no-accessibility \
+                -no-cups \
+                -no-exceptions  \
+                -no-nas-sound \
+                -no-nis -no-openssl \
+                -verbose -release -fast -static \
+                -embedded -no-freetype -no-glib -no-iconv \
+                -qt3support \
+                -I${STAGING_DIR_NATIVE}/usr/include \
+                -I${STAGING_DIR_NATIVE}/usr/include/dbus-1.0 \
+                -I${STAGING_DIR_NATIVE}/usr/lib/dbus-1.0/include"
+
+# yank default -e, otherwise we get the following error:
+# moc_qbuffer.cpp: No such file or directory
+EXTRA_OEMAKE = " "
+
+do_configure() {
+   (echo o; echo yes) | ./configure ${EXTRA_OECONF} || die "Configuring qt failed. EXTRA_OECONF was ${EXTRA_OECONF}"
+}
+
+TOBUILD = "\
+  src/tools/bootstrap \
+  src/tools/moc \
+  src/corelib \
+  src/sql \
+  src/dbus \
+  src/qt3support \
+  src/xml \
+  src/tools/uic \
+  src/tools/rcc \
+  src/network \
+  src/gui \
+  src/tools/uic3 \
+  tools/linguist/lrelease \
+  tools/linguist/lupdate \
+  tools/qdbus \
+"
+
+do_compile() {
+    for i in ${TOBUILD}; do
+        cd ${S}/$i && oe_runmake CC="${CC}" CXX="${CXX}"
+    done
+}
+
+do_install() {
+    install -d ${D}${bindir}
+    install -m 0755 bin/qmake ${D}${bindir}/qmake2
+    for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do
+        install -m 0755 bin/${i} ${D}${bindir}/${i}4
+    done
+
+	(cd ${D}${bindir}; \
+	ln -s qmake2 qmake; \
+	for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do \
+		ln -s ${i}4 ${i}; \
+	done)
+
+	# make a symbolic link to mkspecs for compatibility with Nokia's SDK
+	# and QTCreator
+	(cd ${D}${bindir}/..; ln -s ${TARGET_SYS}/usr/share/qtopia/mkspecs mkspecs;)
+}
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.6.3.bb b/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.6.3.bb
new file mode 100644
index 0000000000..5913507179
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.6.3.bb
@@ -0,0 +1,90 @@
+DESCRIPTION = "SDK tools for Qt/[X11|Mac|Embedded] version 4.x"
+DEPENDS = "zlib-native dbus-native"
+SECTION = "libs"
+HOMEPAGE = "http://www.trolltech.com"
+PRIORITY = "optional"
+LICENSE = "LGPLv2.1 GPLv3"
+
+PR = "r1"
+
+DEFAULT_PREFERENCE = "-1"
+inherit nativesdk
+
+SRC_URI = "ftp://ftp.trolltech.com/qt/source/qt-everywhere-opensource-src-${PV}.tar.gz \
+           file://configure-lflags.patch \
+           file://compile.test-lflags.patch \
+           file://qt-config.patch \
+           file://g++.conf \
+           file://linux.conf"
+
+S = "${WORKDIR}/qt-everywhere-opensource-src-${PV}"
+
+
+# FIXME: make it work with "${STAGING_BINDIR_NATIVE}/pkg-config --cflags dbus-1"
+EXTRA_OECONF = "-prefix ${prefix} \
+                -qt-libjpeg -qt-gif -system-zlib \
+                -no-libjpeg -no-libpng \
+                -no-accessibility \
+                -no-cups \
+                -no-exceptions  \
+                -no-nas-sound \
+                -no-nis \
+                -verbose -release -fast -static \
+                -qt3support \
+                -I${STAGING_DIR_NATIVE}/usr/include \
+                -I${STAGING_DIR_NATIVE}/usr/include/freetype2 \
+                -I${STAGING_DIR_NATIVE}/usr/include/dbus-1.0 \
+                -I${STAGING_DIR_NATIVE}/usr/lib/dbus-1.0/include"
+
+# yank default -e, otherwise we get the following error:
+# moc_qbuffer.cpp: No such file or directory
+EXTRA_OEMAKE = " "
+
+do_configure() {
+   (echo o; echo yes) | ./configure ${EXTRA_OECONF} || die "Configuring qt failed. EXTRA_OECONF was ${EXTRA_OECONF}"
+}
+
+TOBUILD = "\
+  src/tools/bootstrap \
+  src/tools/moc \
+  src/corelib \
+  src/sql \
+  src/dbus \
+  src/qt3support \
+  src/xml \
+  src/tools/uic \
+  src/tools/rcc \
+  src/network \
+  src/gui \
+  src/tools/uic3 \
+  tools/linguist/lrelease \
+  tools/linguist/lupdate \
+  tools/qdbus \
+"
+
+do_compile() {
+    for i in ${TOBUILD}; do
+        cd ${S}/$i && oe_runmake CC="${CC}" CXX="${CXX}"
+    done
+}
+
+do_install() {
+    install -d ${D}${bindir}
+    install -m 0755 bin/qmake ${D}${bindir}/qmake2
+    for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do
+        install -m 0755 bin/${i} ${D}${bindir}/${i}4
+    done
+
+	(cd ${D}${bindir}; \
+	ln -s qmake2 qmake; \
+	for i in moc uic uic3 rcc lrelease lupdate qdbuscpp2xml qdbusxml2cpp; do \
+		ln -s ${i}4 ${i}; \
+	done)
+
+	# make a symbolic link to mkspecs for compatibility with Nokia's SDK
+	# and QTCreator
+	(cd ${D}${bindir}/..; ln -s ${TARGET_SYS}/usr/share/qtopia/mkspecs mkspecs;)
+}
+
+SRC_URI[md5sum] = "5c69f16d452b0bb3d44bc3c10556c072"
+SRC_URI[sha256sum] = "f4e0ada8d4d516bbb8600a3ee7d9046c9c79e38cd781df9ffc46d8f16acd1768"
diff --git a/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.7.1.bb b/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.7.1.bb
new file mode 100644
index 0000000000..1018f74c36
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-tools-sdk_4.7.1.bb
@@ -0,0 +1,8 @@
+require qt4-tools-sdk.inc
+
+PR = "${INC_PR}.0"
+
+DEFAULT_PREFERENCE = "-1"
+
+SRC_URI[md5sum] = "6f88d96507c84e9fea5bf3a71ebeb6d7"
+SRC_URI[sha256sum] = "8cb5277c41f824cfc6dcee0e95e0bf23a9ad2c8d18d245105137481d092b124a"
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free-4.6.3/linux.conf b/meta-oe/recipes-qt/qt4/qt4-x11-free-4.6.3/linux.conf
new file mode 100644
index 0000000000..68ae80b929
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free-4.6.3/linux.conf
@@ -0,0 +1,54 @@
+#
+# qmake configuration for common linux
+#
+
+QMAKE_CFLAGS_THREAD	+= -D_REENTRANT
+QMAKE_CXXFLAGS_THREAD	+= $$QMAKE_CFLAGS_THREAD
+
+QMAKE_INCDIR          =
+QMAKE_LIBDIR          =
+QMAKE_INCDIR_X11      =
+QMAKE_LIBDIR_X11      =
+QMAKE_INCDIR_QT       = $(OE_QMAKE_INCDIR_QT)
+QMAKE_LIBDIR_QT       = $(OE_QMAKE_LIBDIR_QT)
+QMAKE_INCDIR_OPENGL   =
+QMAKE_LIBDIR_OPENGL   =
+
+
+QMAKE_LIBS            = -Wl,-rpath-link,SEDME/lib -lglib-2.0
+QMAKE_LIBS_DYNLOAD    = -ldl
+QMAKE_LIBS_X11        = $(OE_QMAKE_LIBS_X11)
+QMAKE_LIBS_X11SM      = $(OE_QMAKE_LIBS_X11SM)
+QMAKE_LIBS_NIS        = -lnsl
+QMAKE_LIBS_OPENGL     = -lGLU -lGL
+QMAKE_LIBS_OPENGL_QT  = -lGL
+QMAKE_LIBS_THREAD     = -lpthread
+
+QMAKE_MOC             = $(OE_QMAKE_MOC)
+QMAKE_UIC             = $(OE_QMAKE_UIC)
+QMAKE_UIC3            = $(OE_QMAKE_UIC3)
+QMAKE_RCC             = $(OE_QMAKE_RCC)
+QMAKE_QDBUSCPP2XML    = $(OE_QMAKE_QDBUSCPP2XML)
+QMAKE_QDBUSXML2CPP    = $(OE_QMAKE_QDBUSXML2CPP)
+
+QMAKE_AR              = $(OE_QMAKE_AR) cqs
+QMAKE_OBJCOPY         = ${OBJCOPY}
+QMAKE_RANLIB          =
+
+QMAKE_TAR             = tar -cf
+QMAKE_GZIP            = gzip -9f
+
+QMAKE_COPY            = cp -f
+QMAKE_COPY_FILE       = $(COPY)
+QMAKE_COPY_DIR        = $(COPY) -r
+QMAKE_MOVE            = mv -f
+QMAKE_DEL_FILE        = rm -f
+QMAKE_DEL_DIR         = rmdir
+QMAKE_STRIP           = $(OE_QMAKE_STRIP)
+QMAKE_STRIPFLAGS_LIB += --strip-unneeded
+QMAKE_CHK_DIR_EXISTS  = test -d
+QMAKE_MKDIR           = mkdir -p
+QMAKE_INSTALL_FILE    = install -m 644 -p
+QMAKE_INSTALL_PROGRAM = install -m 755 -p
+
+include(unix.conf)
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free.inc b/meta-oe/recipes-qt/qt4/qt4-x11-free.inc
new file mode 100644
index 0000000000..057a129ecf
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free.inc
@@ -0,0 +1,20 @@
+require qt4.inc
+
+DESCRIPTION = "Qt is a versatile cross-platform application framework -- this is the X11 version."
+HOMEPAGE = "http://qt.nokia.com"
+SECTION = "x11/libs"
+PRIORITY = "optional"
+DEPENDS += "virtual/libx11 fontconfig libxft libxext libxrender libxrandr libxcursor"
+
+INC_PR = "r21"
+
+QT_GLFLAGS ?= "-no-opengl"
+QT_GLFLAGS_qemux86 = "-opengl"
+QT_GLFLAGS_emenlow = "-opengl"
+QT_GLFLAGS_atom-pc = "-opengl"
+QT_CONFIG_FLAGS += "-no-xinerama -no-xkb ${QT_GLFLAGS}"
+QT_BASE_NAME ?= "qt4"
+QT_BASE_LIB  ?= "libqt"
+
+inherit qt4x11
+
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free/0003-no-tools.patch b/meta-oe/recipes-qt/qt4/qt4-x11-free/0003-no-tools.patch
new file mode 100644
index 0000000000..3829ffcdc5
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free/0003-no-tools.patch
@@ -0,0 +1,18 @@
+Index: qt-embedded-linux-opensource-src-4.5.0/src/src.pro
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/src/src.pro	2009-02-25 22:32:41.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/src/src.pro	2009-03-26 17:11:07.000000000 +0100
+@@ -6,12 +6,9 @@
+ wince*:{
+   SRC_SUBDIRS += src_corelib src_xml src_gui src_sql src_network src_script src_testlib
+ } else {
+-    SRC_SUBDIRS += src_tools_bootstrap src_tools_moc src_tools_rcc src_tools_uic src_corelib src_xml src_network src_gui src_sql src_script src_testlib
++    SRC_SUBDIRS += src_corelib src_xml src_network src_gui src_sql src_script src_testlib
+     contains(QT_CONFIG, qt3support): SRC_SUBDIRS += src_qt3support
+     contains(QT_CONFIG, dbus):SRC_SUBDIRS += src_dbus
+-    !cross_compile {
+-        contains(QT_CONFIG, qt3support): SRC_SUBDIRS += src_tools_uic3
+-    }
+ }
+ win32:!contains(QT_EDITION, OpenSource|Console): {
+     SRC_SUBDIRS += src_activeqt
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free/0006-freetype-host-includes.patch b/meta-oe/recipes-qt/qt4/qt4-x11-free/0006-freetype-host-includes.patch
new file mode 100644
index 0000000000..987c425138
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free/0006-freetype-host-includes.patch
@@ -0,0 +1,20 @@
+From c9ab62bd9a56643574b3ae6e59e0ca776d4860d2 Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Mon, 4 Jun 2007 14:48:50 +0200
+Subject: [PATCH] freetype host includes
+
+---
+ config.tests/unix/freetype/freetype.pri |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/config.tests/unix/freetype/freetype.pri	2009-02-25 22:32:32.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/freetype/freetype.pri	2009-03-26 17:14:16.000000000 +0100
+@@ -1,5 +1,5 @@
+ !cross_compile {
+-    TRY_INCLUDEPATHS = /include /usr/include $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
++    TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     # LSB doesn't allow using headers from /include or /usr/include
+     linux-lsb-g++:TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$QMAKE_INCDIR_X11 $$INCLUDEPATH
+     for(p, TRY_INCLUDEPATHS) {
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free/0007-openssl-host-includes.patch b/meta-oe/recipes-qt/qt4/qt4-x11-free/0007-openssl-host-includes.patch
new file mode 100644
index 0000000000..3409cc0bf2
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free/0007-openssl-host-includes.patch
@@ -0,0 +1,20 @@
+From d45943adb443ad4b85ca4504952dee743c675e1e Mon Sep 17 00:00:00 2001
+From: Michael Krelin <hacker@klever.net>
+Date: Mon, 4 Jun 2007 14:58:34 +0200
+Subject: [PATCH] openssl host includes
+
+---
+ config.tests/unix/openssl/openssl.pri |    2 +-
+ 1 files changed, 1 insertions(+), 1 deletions(-)
+
+Index: qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/openssl/openssl.pri
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/config.tests/unix/openssl/openssl.pri	2009-02-25 22:32:32.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/config.tests/unix/openssl/openssl.pri	2009-03-26 17:16:28.000000000 +0100
+@@ -1,5 +1,5 @@
+ !cross_compile {
+-    TRY_INCLUDEPATHS = /include /usr/include /usr/local/include $$QMAKE_INCDIR $$INCLUDEPATH
++    TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$INCLUDEPATH
+     # LSB doesn't allow using headers from /include or /usr/include
+     linux-lsb-g++:TRY_INCLUDEPATHS = $$QMAKE_INCDIR $$INCLUDEPATH
+     for(p, TRY_INCLUDEPATHS) {
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free/0008-qt-lib-infix.patch b/meta-oe/recipes-qt/qt4/qt4-x11-free/0008-qt-lib-infix.patch
new file mode 100644
index 0000000000..3efaff37d3
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free/0008-qt-lib-infix.patch
@@ -0,0 +1,34 @@
+Index: qt-embedded-linux-opensource-src-4.5.0/mkspecs/features/uitools.prf
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/mkspecs/features/uitools.prf	2009-02-25 22:32:34.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/mkspecs/features/uitools.prf	2009-03-26 17:17:27.000000000 +0100
+@@ -2,10 +2,10 @@
+ qt:load(qt)
+ 
+ # Include the correct version of the UiLoader library
+-QTUITOOLS_LINKAGE = -lQtUiTools
++QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}
+ CONFIG(debug, debug|release) {
+-    mac: QTUITOOLS_LINKAGE = -lQtUiTools_debug
+-    win32: QTUITOOLS_LINKAGE = -lQtUiToolsd
++    mac: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}_debug
++    win32: QTUITOOLS_LINKAGE = -lQtUiTools$${QT_LIBINFIX}d
+ }
+ LIBS += $$QTUITOOLS_LINKAGE
+ 
+Index: qt-embedded-linux-opensource-src-4.5.0/tools/designer/src/uitools/uitools.pro
+===================================================================
+--- qt-embedded-linux-opensource-src-4.5.0.orig/tools/designer/src/uitools/uitools.pro	2009-02-25 22:32:42.000000000 +0100
++++ qt-embedded-linux-opensource-src-4.5.0/tools/designer/src/uitools/uitools.pro	2009-03-26 17:17:27.000000000 +0100
+@@ -1,5 +1,5 @@
+ TEMPLATE = lib
+-TARGET = $$qtLibraryTarget(QtUiTools)
++TARGET = QtUiTools
+ QT += xml
+ CONFIG += qt staticlib
+ DESTDIR = ../../../../lib
+@@ -39,3 +39,4 @@
+    QMAKE_PKGCONFIG_REQUIRES += QtXml
+ }
+ 
++TARGET = $$qtLibraryTarget($$TARGET$$QT_LIBINFIX) #do this towards the end
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free_4.6.3.bb b/meta-oe/recipes-qt/qt4/qt4-x11-free_4.6.3.bb
new file mode 100644
index 0000000000..8cf5449254
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free_4.6.3.bb
@@ -0,0 +1,6 @@
+require qt-${PV}.inc
+require qt4-x11-free.inc
+
+PR = "${INC_PR}.0"
+
+QT_CONFIG_FLAGS += " -xrandr "
diff --git a/meta-oe/recipes-qt/qt4/qt4-x11-free_4.7.1.bb b/meta-oe/recipes-qt/qt4/qt4-x11-free_4.7.1.bb
new file mode 100644
index 0000000000..75c6314e7f
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4-x11-free_4.7.1.bb
@@ -0,0 +1,12 @@
+require qt4-x11-free.inc
+require qt-${PV}.inc
+
+PR = "${INC_PR}.1"
+
+QT_CONFIG_FLAGS_append_armv6 = " -no-neon "
+
+QT_CONFIG_FLAGS += " \
+ -no-embedded \
+ -xrandr \
+ -x11"
+
diff --git a/meta-oe/recipes-qt/qt4/qt4.inc b/meta-oe/recipes-qt/qt4/qt4.inc
new file mode 100644
index 0000000000..98d55b1be5
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4.inc
@@ -0,0 +1,314 @@
+inherit qmake_base
+
+DEPENDS += "qt4-tools-native freetype jpeg libpng zlib dbus openssl glib-2.0 gstreamer gst-plugins-base mysql5 postgresql sqlite sqlite3"
+
+require qt4_arch.inc
+QT_ARCH := "${@qt_arch(d)}"
+QT_ENDIAN = "${@qt_endian(d)}"
+
+QT_DISTRO_FLAGS ?= "-no-accessibility -no-sm"
+QT_DISTRO_FLAGS_poky-lsb = "-sm"
+
+QT_CONFIG_FLAGS += "-release -no-cups -reduce-relocations \
+                    -shared -no-nas-sound -no-nis \
+                    -qt-gif -system-libjpeg -system-libpng -system-zlib \
+                    -no-sql-ibase -plugin-sql-mysql -no-sql-odbc -plugin-sql-psql -plugin-sql-sqlite -plugin-sql-sqlite3 \
+                    -no-pch -qdbus -stl -glib -phonon -webkit \
+                    ${QT_DISTRO_FLAGS} "
+
+EXTRA_OEMAKE = "-e"
+
+EXTRA_ENV = 'QMAKE="${STAGING_BINDIR_NATIVE}/qmake2 -after \
+             INCPATH+=${STAGING_INCDIR}/freetype2 LIBS+=-L${STAGING_LIBDIR}" \
+             QMAKESPEC="${QMAKESPEC}" LINK="${CXX} -Wl,-rpath-link,${STAGING_LIBDIR}" \
+             AR="${TARGET_PREFIX}ar cqs" \
+             MOC="${STAGING_BINDIR_NATIVE}/moc4" UIC="${STAGING_BINDIR_NATIVE}/uic4" MAKE="make -e"'
+
+export QT_CONF_PATH="${WORKDIR}/qt.conf"
+
+# Library packages
+QT_LIB_NAMES = "Qt3Support QtAssistantClient QtCLucene QtCore QtDBus QtDesigner QtDesignerComponents QtGui QtHelp QtNetwork QtOpenGL QtScript QtScriptTools QtSql QtSvg QtTest QtUiTools QtWebKit QtXml QtXmlPatterns phonon QtMultimedia QtOpenVG QtMediaServices QtDeclarative"
+
+QT_EXTRA_LIBS = "pvrQWSWSEGL"
+
+python __anonymous () {
+    import bb
+
+    lib_packages = []
+    dev_packages = []
+    dbg_packages = []
+    for name in bb.data.getVar("QT_LIB_NAMES", d, 1).split():
+        pkg = "${QT_BASE_LIB}" + name.lower().replace("qt", "").replace("_", "-") + "4"
+        # NOTE: the headers for QtAssistantClient are different
+        incname = name.replace("QtAssistantClient", "QtAssistant")
+        bb.data.setVar("FILES_%s" % pkg, "${libdir}/lib%(name)s${QT_LIBINFIX}.so.*" % locals(), d)
+        bb.data.setVar("FILES_%s-dev" % pkg, """${libdir}/lib%(name)s${QT_LIBINFIX}.prl
+                  ${libdir}/lib%(name)s${QT_LIBINFIX}.a
+                  ${libdir}/lib%(name)s${QT_LIBINFIX}.la
+                  ${libdir}/lib%(name)s${QT_LIBINFIX}.so
+                  ${includedir}/${QT_DIR_NAME}/%(incname)s
+                  ${libdir}/pkgconfig/%(name)s${QT_LIBINFIX}.pc""" % locals(), d)
+        bb.data.setVar("FILES_%s-dbg" % pkg, "${libdir}/.debug/lib%(name)s${QT_LIBINFIX}.so.*" % locals(), d)
+        lib_packages.append(pkg)
+        dev_packages.append("%s-dev" % pkg)
+        dbg_packages.append("%s-dbg" % pkg)
+    for name in bb.data.getVar("OTHER_PACKAGES", d, 1).split():
+        dbg_packages.append("%s-dbg" % name)
+
+    for name in bb.data.getVar("QT_EXTRA_LIBS", d, 1).split():
+        pkg = "${QT_BASE_LIB}" + name.lower().replace("qt", "").replace("_", "-") + "4"
+        bb.data.setVar("FILES_%s" % pkg, "${libdir}/lib%(name)s.so.*" % locals(), d)
+        bb.data.setVar("FILES_%s-dev" % pkg, """${libdir}/lib%(name)s.prl
+                  ${libdir}/lib%(name)s.a
+                  ${libdir}/lib%(name)s.la
+                  ${libdir}/lib%(name)s.so
+                  ${includedir}/${QT_DIR_NAME}/%(incname)s
+                  ${libdir}/pkgconfig/%(name)s.pc""" % locals(), d)
+        bb.data.setVar("FILES_%s-dbg" % pkg, "${libdir}/.debug/lib%(name)s.so.*" % locals(), d)
+        lib_packages.append(pkg)
+        dev_packages.append("%s-dev" % pkg)
+        dbg_packages.append("%s-dbg" % pkg)
+
+    bb.data.setVar("LIB_PACKAGES", " ".join(lib_packages), d)
+    bb.data.setVar("DEV_PACKAGES", " ".join(dev_packages), d)
+    bb.data.setVar("DBG_PACKAGES", " ".join(dbg_packages), d)
+}
+
+OTHER_PACKAGES = "\
+             ${QT_BASE_NAME}-tools \
+             ${QT_BASE_NAME}-assistant \
+             ${QT_BASE_NAME}-common \
+             ${QT_BASE_NAME}-dbus \
+             ${QT_BASE_NAME}-demos \
+             ${QT_BASE_NAME}-designer \
+             ${QT_BASE_NAME}-examples \
+             ${QT_BASE_NAME}-fonts \
+             ${QT_BASE_NAME}-fonts-ttf-vera \
+             ${QT_BASE_NAME}-fonts-ttf-dejavu \
+             ${QT_BASE_NAME}-fonts-pfa \
+             ${QT_BASE_NAME}-fonts-pfb \
+             ${QT_BASE_NAME}-fonts-qpf \
+             ${QT_BASE_NAME}-linguist \
+             ${QT_BASE_NAME}-makeqpf \
+             ${QT_BASE_NAME}-mkspecs \
+             ${QT_BASE_NAME}-pixeltool \
+             ${QT_BASE_NAME}-qmlviewer \
+             ${QT_BASE_NAME}-xmlpatterns \
+             ${QT_BASE_NAME}-qt3to4"
+
+PACKAGES += "${LIB_PACKAGES} ${DEV_PACKAGES} ${DBG_PACKAGES} ${OTHER_PACKAGES}"
+PACKAGES_DYNAMIC = "${QT_BASE_NAME}-plugin-* ${QT_BASE_NAME}-translation-* ${QT_BASE_NAME}-fonts-*"
+
+ALLOW_EMPTY_${PN} = "1"
+ALLOW_EMPTY_${QT_BASE_NAME}-fonts = "1"
+FILES_${PN}     = ""
+FILES_${PN}-dev = "${includedir}/${QT_DIR_NAME}/Qt/*"
+FILES_${PN}-dbg = ""
+RRECOMMENDS_${PN} = "${LIB_PACKAGES} ${OTHER_PACKAGES}"
+RRECOMMENDS_${PN}-dev = "${DEV_PACKAGES}"
+RRECOMMENDS_${PN}-dbg = "${DBG_PACKAGES}"
+RRECOMMENDS_${QT_BASE_NAME}-fonts = " \
+             ${QT_BASE_NAME}-fonts-ttf-vera \
+             ${QT_BASE_NAME}-fonts-ttf-dejavu \
+             ${QT_BASE_NAME}-fonts-pfa \
+             ${QT_BASE_NAME}-fonts-pfb \
+             ${QT_BASE_NAME}-fonts-qpf"
+RRECOMMENDS_${QT_BASE_NAME}-demos += " \
+            ${QT_BASE_NAME}-fonts \
+            ${QT_BASE_NAME}-examples \
+            ${QT_BASE_NAME}-plugin-sqldriver-sqlite \
+            ${QT_BASE_NAME}-plugin-imageformat-jpeg \
+            ${QT_BASE_NAME}-assistant \
+            ${PN}-doc"
+RRECOMMENDS_${QT_BASE_NAME}-examples += " \
+            ${QT_BASE_NAME}-plugin-sqldriver-sqlite \
+            ${QT_BASE_NAME}-plugin-imageformat-jpeg"
+
+FILES_${QT_BASE_NAME}-tools                = "${bindir}/uic* ${bindir}/moc ${bindir}/rcc ${bindir}/qttracereplay ${bindir}/qdoc*"
+FILES_${QT_BASE_NAME}-tools-dbg            = "${bindir}/.debug/uic* ${bindir}/.debug/moc ${bindir}/.debug/rcc ${bindir}/.debug/qttracereplay ${bindir}/.debug/qdoc*"
+FILES_${QT_BASE_NAME}-assistant            = "${bindir}/*assistant* ${bindir}/qcollectiongenerator ${bindir}/qhelpconverter ${bindir}/qhelpgenerator"
+FILES_${QT_BASE_NAME}-assistant-dbg        = "${bindir}/.debug/*assistant* ${bindir}/.debug/qcollectiongenerator ${bindir}/.debug/qhelpconverter ${bindir}/.debug/qhelpgenerator"
+FILES_${QT_BASE_NAME}-common               = "${bindir}/qtconfig"
+FILES_${QT_BASE_NAME}-common-dbg           = "${bindir}/.debug/qtconfig"
+FILES_${QT_BASE_NAME}-dbus                 = "${bindir}/qdbus ${bindir}/qdbusxml2cpp ${bindir}/qdbuscpp2xml ${bindir}/qdbusviewer"
+FILES_${QT_BASE_NAME}-dbus-dbg             = "${bindir}/.debug/qdbus ${bindir}/.debug/qdbusxml2cpp ${bindir}/.debug/qdbuscpp2xml ${bindir}/.debug/qdbusviewer"
+FILES_${QT_BASE_NAME}-demos                = "${bindir}/qtdemo* ${bindir}/${QT_DIR_NAME}/demos/*"
+FILES_${QT_BASE_NAME}-demos-dbg            = "${bindir}/.debug/qtdemo* ${bindir}/${QT_DIR_NAME}/demos/.debug/*  ${bindir}/${QT_DIR_NAME}/demos/*/.debug  ${bindir}/${QT_DIR_NAME}/demos/*/*/.debug  ${bindir}/${QT_DIR_NAME}/demos/*/*/*/.debug"
+FILES_${QT_BASE_NAME}-designer             = "${bindir}/*designer*"
+FILES_${QT_BASE_NAME}-designer-dbg         = "${bindir}/.debug/*designer*"
+FILES_${QT_BASE_NAME}-examples             = "${bindir}/${QT_DIR_NAME}/examples/*"
+FILES_${QT_BASE_NAME}-examples-dbg         = "${bindir}/${QT_DIR_NAME}/examples/.debug ${bindir}/${QT_DIR_NAME}/examples/*/.debug ${bindir}/${QT_DIR_NAME}/examples/*/*/.debug ${bindir}/${QT_DIR_NAME}/examples/*/*/*/.debug ${bindir}/${QT_DIR_NAME}/examples/*/*/*/*/.debug ${bindir}/${QT_DIR_NAME}/examples/declarative/*/*/*/*/*/.debug/* ${bindir}/${QT_DIR_NAME}/examples/declarative/*/*/*/*/.debug/*"
+FILES_${QT_BASE_NAME}-fonts-ttf-vera       = "${libdir}/fonts/Vera*.ttf"
+FILES_${QT_BASE_NAME}-fonts-ttf-dejavu     = "${libdir}/fonts/DejaVu*.ttf"
+FILES_${QT_BASE_NAME}-fonts-pfa            = "${libdir}/fonts/*.pfa"
+FILES_${QT_BASE_NAME}-fonts-pfb            = "${libdir}/fonts/*.pfb"
+FILES_${QT_BASE_NAME}-fonts-qpf            = "${libdir}/fonts/*.qpf"
+FILES_${QT_BASE_NAME}-linguist             = "${bindir}/*linguist* ${bindir}/lrelease ${bindir}/lupdate ${bindir}/lconvert ${bindir}/qm2ts"
+FILES_${QT_BASE_NAME}-linguist-dbg         = "${bindir}/.debug/*linguist* ${bindir}/.debug/lrelease ${bindir}/.debug/lupdate ${bindir}/.debug/lconvert ${bindir}/.debug/qm2ts"
+FILES_${QT_BASE_NAME}-pixeltool            = "${bindir}/pixeltool"
+FILES_${QT_BASE_NAME}-pixeltool-dbg        = "${bindir}/.debug/pixeltool"
+FILES_${QT_BASE_NAME}-qt3to4               = "${bindir}/qt3to4 ${datadir}/${QT_DIR_NAME}/q3porting.xml"
+FILES_${QT_BASE_NAME}-qt3to4-dbg           = "${bindir}/.debug/qt3to4"
+FILES_${QT_BASE_NAME}-qmlviewer            = "${bindir}/qmlviewer"
+FILES_${QT_BASE_NAME}-qmlviewer-dbg        = "${bindir}/.debug/qmlviewer"
+FILES_${QT_BASE_NAME}-makeqpf              = "${bindir}/makeqpf"
+FILES_${QT_BASE_NAME}-makeqpf-dbg          = "${bindir}/.debug/makeqpf"
+FILES_${QT_BASE_NAME}-mkspecs              = "${datadir}/${QT_DIR_NAME}/mkspecs/*"
+FILES_${QT_BASE_NAME}-xmlpatterns          = "${bindir}/xmlpatterns*"
+FILES_${QT_BASE_NAME}-xmlpatterns-dbg      = "${bindir}/.debug/xmlpatterns*"
+
+
+do_configure() {
+    unset QMAKESPEC
+    unset QTDIR
+
+    if [ ! -e bin/qmake ]; then
+        ln -sf ${STAGING_BINDIR_NATIVE}/qmake2 bin/qmake
+    fi
+
+    if [ ! -e mkspecs/${TARGET_OS}-oe-g++ ]; then
+        ln -sf linux-g++ mkspecs/${TARGET_OS}-oe-g++
+    fi
+
+    cp -f ${WORKDIR}/g++.conf ${WORKDIR}/linux.conf mkspecs/common/
+
+    echo "[Paths]"                                 > $QT_CONF_PATH
+    echo "Prefix=${prefix}/"                      >> $QT_CONF_PATH
+    echo "Documentation=${docdir}/${QT_DIR_NAME}" >> $QT_CONF_PATH
+    echo "Headers=${includedir}/${QT_DIR_NAME}"   >> $QT_CONF_PATH
+    echo "Libraries=${libdir}"                    >> $QT_CONF_PATH
+    echo "Binaries=${bindir}"                     >> $QT_CONF_PATH
+    echo "Plugins=${libdir}/${QT_DIR_NAME}/plugins" >> $QT_CONF_PATH
+    echo "Data=${datadir}/${QT_DIR_NAME}"         >> $QT_CONF_PATH
+    echo "Translations=${datadir}/${QT_DIR_NAME}/translations" >> $QT_CONF_PATH
+    echo "Settings=${sysconfdir}/${QT_DIR_NAME}"  >> $QT_CONF_PATH
+    echo "Examples=${bindir}/${QT_DIR_NAME}/examples" >> $QT_CONF_PATH
+    echo "Demos=${bindir}/${QT_DIR_NAME}/demos"   >> $QT_CONF_PATH
+
+    ${EXTRA_QMAKE_MUNGE}|| true
+
+    (echo o; echo yes) | ./configure -v \
+            -prefix ${prefix}/ \
+            -bindir ${bindir} \
+            -libdir ${libdir} \
+            -datadir ${datadir}/${QT_DIR_NAME} \
+            -sysconfdir ${sysconfdir}/${QT_DIR_NAME} \
+            -docdir ${docdir}/${QT_DIR_NAME} \
+            -headerdir ${includedir}/${QT_DIR_NAME} \
+            -plugindir ${libdir}/${QT_DIR_NAME}/plugins \
+            -translationdir ${datadir}/${QT_DIR_NAME}/translations \
+            -examplesdir ${bindir}/${QT_DIR_NAME}/examples \
+            -demosdir ${bindir}/${QT_DIR_NAME}/demos \
+            -platform ${TARGET_OS}-oe-g++ \
+            -xplatform ${TARGET_OS}-oe-g++ \
+            ${QT_ENDIAN} \
+            -crossarch ${QT_ARCH} \
+            ${QT_CONFIG_FLAGS} -no-fast \
+            -L${STAGING_LIBDIR} -I${STAGING_INCDIR} \
+            -I${STAGING_INCDIR}/freetype2 \
+            -I${STAGING_INCDIR}/mysql \
+            -I${STAGING_INCDIR}/postgresql
+}
+
+python populate_packages_prepend() {
+        translation_dir = bb.data.expand('${datadir}/${QT_DIR_NAME}/translations/', d)
+        translation_name = bb.data.expand('${QT_BASE_NAME}-translation-%s', d)
+        do_split_packages(d, translation_dir, '^(assistant|designer|linguist|qt|qtconfig|qvfb)_(.*)\.qm$', translation_name, '${PN} translation for %s', extra_depends='' )
+ 
+        phrasebook_dir = bb.data.expand('${datadir}/${QT_DIR_NAME}/phrasebooks/', d)
+        phrasebook_name = bb.data.expand('${QT_BASE_NAME}-phrasebook-%s', d)
+        do_split_packages(d, phrasebook_dir, '^(.*)\.qph$', phrasebook_name, '${PN} phrasebook for %s', extra_depends='' )
+ 
+        # Package all the plugins and their -dbg version and create a meta package
+        import os
+        def qtopia_split(path, name, glob):
+                """
+                Split the package into a normal and -dbg package and then add the
+                new packages to the meta package.
+                """
+                plugin_dir = bb.data.expand('${libdir}/${QT_DIR_NAME}/plugins/%s/' % path, d)
+                if not os.path.exists("%s%s" % (bb.data.expand('${D}',d), plugin_dir)):
+                        bb.note("The path does not exist:", bb.data.expand('${D}', d), plugin_dir)
+                        return
+ 
+                plugin_name = bb.data.expand('${QT_BASE_NAME}-plugin-%s-%%s' % name, d)
+                dev_packages = []
+                dev_hook = lambda file,pkg,b,c,d:dev_packages.append((file,pkg))
+                do_split_packages(d, plugin_dir, glob, plugin_name, '${PN} %s for %%s' % name, extra_depends='', hook=dev_hook)
+                # Create a -dbg package as well
+                plugin_dir_dbg = bb.data.expand('${libdir}/${QT_DIR_NAME}/plugins/%s/.debug' % path, d)
+                packages = bb.data.getVar('PACKAGES',d)
+                for (file,package) in dev_packages:
+                        packages = "%s %s-dbg" % (packages, package)
+                        file_name = os.path.join(plugin_dir_dbg, os.path.basename(file))
+                        bb.data.setVar("FILES_%s-dbg" % package, file_name, d)
+                        bb.data.setVar("DESCRIPTION_%s-dbg" % package, "${PN} %s for %s" % (name, package), d)
+
+                bb.data.setVar('PACKAGES', packages, d)
+ 
+        qtopia_split('accessible',    'accessible',    '^libq(.*)\.so$')
+        qtopia_split('codecs',        'codec',         '^libq(.*)\.so$')
+        qtopia_split('decorations',   'decoration',    '^libqdecoration(.*)\.so$')
+        qtopia_split('designer',      'designer',      '^lib(.*)\.so$')
+        qtopia_split('gfxdrivers',    'gfxdriver',     '^libq(.*)\.so$')
+        qtopia_split('graphicssystems','graphicssystems', '^libq(.*)\.so$')
+        qtopia_split('mousedrivers',  'mousedriver',   '^libq(.*)mousedriver\.so$')
+        qtopia_split('iconengines',   'iconengine',    '^libq(.*)\.so$')
+        qtopia_split('imageformats',  'imageformat',   '^libq(.*)\.so$')
+        qtopia_split('inputmethods',  'inputmethod',   '^libq(.*)\.so$')
+        qtopia_split('sqldrivers',    'sqldriver',     '^libq(.*)\.so$')
+        qtopia_split('script',        'script',        '^libqtscript(.*)\.so$')
+        qtopia_split('styles',        'style',         '^libq(.*)\.so$')
+        qtopia_split('phonon_backend','phonon-backend','^libphonon_(.*)\.so$')
+        qtopia_split('bearer',        'bearer',        '^libq(.*)bearer\.so$')
+}
+
+do_install() {
+    oe_runmake install INSTALL_ROOT=${D}
+
+    # These are host binaries, we should only use them in staging
+    rm -rf ${D}/${bindir}/qmake
+
+    # fix pkgconfig, libtool and prl files
+    sed -i -e s#-L${S}/lib##g \
+           -e s#-L${STAGING_LIBDIR}##g \
+           -e 's#STAGING_LIBDIR}#libdir}'#g \ 
+           -e s#-L${libdir}##g \
+           -e s#'$(OE_QMAKE_LIBS_X11)'#"${OE_QMAKE_LIBS_X11}"#g \
+           -e s#" -Wl,-rpath-link,${S}/lib"##g \
+           -e s#" -Wl,-rpath-link,${libdir}"##g \
+           -e 's#I/usr/include#Iincludedir}#g' \ 
+           -e 's#Iin#I${in#g' \
+           ${D}${libdir}/*.la ${D}${libdir}/*.prl ${D}${libdir}/pkgconfig/*.pc
+
+    sed -i -e s#" -Wl,-rpath-link,${S}/lib"##g \
+            ${D}${datadir}/${QT_DIR_NAME}/mkspecs/common/linux.conf
+
+    # fix pkgconfig files
+    sed -i -e s#"moc_location=.*$"#"moc_location=${bindir}/moc4"# \
+           -e s#"uic_location=.*$"#"uic_location=${bindir}/uic4"# \
+           ${D}${libdir}/pkgconfig/*.pc
+    for name in ${QT_LIB_NAMES}; do
+        sed -i -e /Requires/s#"${name}"#"${name}${QT_LIBINFIX}"#g ${D}${libdir}/pkgconfig/*.pc
+    done
+
+    # QT abuses $includedir to point to its headers, which breaks pkgconfig sysroot, so manually fix it up here:
+    for pc in ${D}${libdir}/pkgconfig/*.pc ; do
+        sed -i -e "s:prefix}include/${QT_BASE_NAME}/$(basename $pc .pc):prefix}/include:" \
+               -e "s,Cflags: ,Cflags: -IP{includedir}/${QT_BASE_NAME}/$(basename $pc .pc) ," \
+               -e 's:IP{:I${:g' $pc
+    done
+
+    install -d ${D}/${libdir}/fonts
+    touch ${D}/${libdir}/fonts/fontdir
+
+    install -d ${D}${bindir}
+    for i in rcc uic moc ; do
+        install -m 0755 ${S}/bin/$i ${D}${bindir}/
+    done
+
+    #Append an E to the qtdemo file
+    if [ -n "${QT_LIBINFIX}" ] ; then
+        mv ${D}${bindir}/qtdemo ${D}${bindir}/qtdemo${QT_LIBINFIX}
+    fi
+}
diff --git a/meta-oe/recipes-qt/qt4/qt4_arch.inc b/meta-oe/recipes-qt/qt4/qt4_arch.inc
new file mode 100644
index 0000000000..7f4be63bca
--- /dev/null
+++ b/meta-oe/recipes-qt/qt4/qt4_arch.inc
@@ -0,0 +1,25 @@
+inherit siteinfo
+
+ARM_INSTRUCTION_SET = "arm"
+
+def qt_arch(d):
+    import bb, re
+    arch = bb.data.getVar('TARGET_ARCH', d, 1)
+    if re.match("^i.86$", arch):
+        arch = "i386"
+    elif re.match("^arm.*", arch):
+        arch = "arm"
+    elif arch == "x86_64":
+        arch = "x86"
+    elif arch == "mipsel":
+        arch = "mips"
+    return arch
+
+def qt_endian(d):
+    import bb
+    if bb.data.getVar('SITEINFO_ENDIANESS', d, True) == "le":
+        return "-little-endian"
+    elif bb.data.getVar('SITEINFO_ENDIANESS', d, True) == "be":
+        return "-big-endian"
+    else:
+        assert False
diff --git a/meta-oe/recipes-qt/tasks/task-poky-qt.bb b/meta-oe/recipes-qt/tasks/task-poky-qt.bb
new file mode 100644
index 0000000000..da960db5b0
--- /dev/null
+++ b/meta-oe/recipes-qt/tasks/task-poky-qt.bb
@@ -0,0 +1,22 @@
+#
+# Copyright (C) 2010  Intel Corporation. All rights reserved
+#
+
+DESCRIPTION = "Qt Tasks for Poky"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${POKYBASE}/LICENSE;md5=3f40d7994397109285ec7b81fdeb3b58 \
+                    file://${POKYBASE}/meta/COPYING.MIT;md5=3da9cfbcb788c80a0384361b4de20420"
+PR = "r3"
+
+PACKAGES = "\
+    task-poky-qt-demos \
+    task-poky-qt-demos-dbg \
+    task-poky-qt-demos-dev \
+    "
+
+ALLOW_EMPTY = "1"
+
+QTDEMOS ?= "quicky ${COMMERCIAL_QT} fotowall"
+#QTDEMOS_disabled = "fotowall"
+
+RDEPENDS_task-poky-qt-demos = "${QTDEMOS}"
diff --git a/meta-oe/recipes-support/atk/atk.inc b/meta-oe/recipes-support/atk/atk.inc
new file mode 100644
index 0000000000..a508012cfb
--- /dev/null
+++ b/meta-oe/recipes-support/atk/atk.inc
@@ -0,0 +1,11 @@
+DESCRIPTION = "An accessibility toolkit for GNOME."
+SECTION = "x11/libs"
+PRIORITY = "optional"
+LICENSE = "LGPL"
+
+DEPENDS = "glib-2.0 gtk-doc-native"
+
+inherit autotools pkgconfig
+
+EXTRA_OECONF = "--disable-glibtest"
+
diff --git a/meta-oe/recipes-support/atk/atk_1.30.0.bb b/meta-oe/recipes-support/atk/atk_1.30.0.bb
new file mode 100644
index 0000000000..cc8f573810
--- /dev/null
+++ b/meta-oe/recipes-support/atk/atk_1.30.0.bb
@@ -0,0 +1,20 @@
+DESCRIPTION = "An accessibility toolkit for GNOME."
+SECTION = "x11/libs"
+PRIORITY = "optional"
+LICENSE = "LGPLv2 & LGPLv2+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=3bf50002aefd002f49e7bb854063f7e7 \
+                    file://atk/atkutil.c;endline=20;md5=db21b0bdbef9da4dc6eb122debc9f9bc \
+                    file://atk/atk.h;endline=20;md5=c58238d688c24387376d6c69d06248a7
+PR = "r1"
+
+inherit gnome
+
+SRC_URI[archive.md5sum] = "548d413775819fef425410739041cac3"
+SRC_URI[archive.sha256sum] = "92b9b1213cafc68fe9c3806273b968c26423237d7b1f631dd83dc5270b8c268c"
+
+DEPENDS = "glib-2.0 gtk-doc-native"
+
+EXTRA_OECONF += "--disable-glibtest"
+
+BBCLASSEXTEND = "native"
+
diff --git a/meta-oe/recipes-support/cups/cups-1.4.6/0001-don-t-try-to-run-generated-binaries.patch b/meta-oe/recipes-support/cups/cups-1.4.6/0001-don-t-try-to-run-generated-binaries.patch
new file mode 100644
index 0000000000..7b544ca0e3
--- /dev/null
+++ b/meta-oe/recipes-support/cups/cups-1.4.6/0001-don-t-try-to-run-generated-binaries.patch
@@ -0,0 +1,68 @@
+From 90069586167b930befce7303aea57078f04b4ed8 Mon Sep 17 00:00:00 2001
+From: Koen Kooi <koen@dominion.thruhere.net>
+Date: Sun, 30 Jan 2011 16:37:27 +0100
+Subject: [PATCH] don't try to run generated binaries
+
+Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
+---
+ ppdc/Makefile |   30 +++++++++++++++---------------
+ 1 files changed, 15 insertions(+), 15 deletions(-)
+
+diff --git a/ppdc/Makefile b/ppdc/Makefile
+index 0288d47..fc87f1b 100644
+--- a/ppdc/Makefile
++++ b/ppdc/Makefile
+@@ -243,8 +243,8 @@ genstrings:		genstrings.o libcupsppdc.a ../cups/libcups.a \
+ 	$(CXX) $(ARCHFLAGS) $(LDFLAGS) -o genstrings genstrings.o \
+ 		libcupsppdc.a ../cups/libcups.a $(LIBGSSAPI) $(SSLLIBS) \
+ 		$(DNSSDLIBS) $(COMMONLIBS) $(LIBZ)
+-	echo Generating localization strings...
+-	./genstrings >sample.c
++#	echo Generating localization strings...
++#	./genstrings >sample.c
+ 
+ 
+ #
+@@ -261,9 +261,9 @@ ppdc-static:		ppdc.o libcupsppdc.a  ../cups/libcups.a foo.drv foo-fr.po
+ 	$(CXX) $(ARCHFLAGS) $(LDFLAGS) -o ppdc-static ppdc.o libcupsppdc.a \
+ 		../cups/libcups.a $(LIBGSSAPI) $(SSLLIBS) $(DNSSDLIBS) \
+ 		$(COMMONLIBS) $(LIBZ)
+-	echo Testing PPD compiler...
+-	./ppdc-static -l en,fr -I ../data foo.drv
+-	./ppdc-static -l en,fr -z -I ../data foo.drv
++#	echo Testing PPD compiler...
++#	./ppdc-static -l en,fr -I ../data foo.drv
++#	./ppdc-static -l en,fr -z -I ../data foo.drv
+ 
+ 
+ #
+@@ -290,16 +290,16 @@ ppdi-static:		ppdc-static ppdi.o libcupsppdc.a  ../cups/libcups.a
+ 		../cups/libcups.a $(LIBGSSAPI) $(SSLLIBS) $(DNSSDLIBS) \
+ 		$(COMMONLIBS) $(LIBZ)
+ 	echo Testing PPD importer...
+-	$(RM) -r ppd ppd2 sample-import.drv
+-	./ppdc-static -I ../data sample.drv
+-	./ppdi-static -I ../data -o sample-import.drv ppd/*
+-	./ppdc-static -I ../data -d ppd2 sample-import.drv
+-	if diff -r ppd ppd2 >/dev/null; then \
+-		echo PPD import OK; \
+-	else \
+-		echo PPD import FAILED; \
+-		exit 1; \
+-	fi
++#	$(RM) -r ppd ppd2 sample-import.drv
++#	./ppdc-static -I ../data sample.drv
++#	./ppdi-static -I ../data -o sample-import.drv ppd/*
++#	./ppdc-static -I ../data -d ppd2 sample-import.drv
++#	if diff -r ppd ppd2 >/dev/null; then \
++#		echo PPD import OK; \
++#	else \
++#		echo PPD import FAILED; \
++#		exit 1; \
++#	fi
+ 
+ 
+ #
+-- 
+1.6.6.1
+
diff --git a/meta-oe/recipes-support/cups/cups-1.4.6/use_echo_only_in_init.patch b/meta-oe/recipes-support/cups/cups-1.4.6/use_echo_only_in_init.patch
new file mode 100644
index 0000000000..21ff0e535b
--- /dev/null
+++ b/meta-oe/recipes-support/cups/cups-1.4.6/use_echo_only_in_init.patch
@@ -0,0 +1,11 @@
+--- a/init/cups.sh.in.orig	2008-10-04 16:50:46.000000000 -0300
++++ b/init/cups.sh.in	2008-10-04 16:51:39.000000000 -0300
+@@ -68,7 +68,7 @@
+ 		ECHO_ERROR=:
+ 		;;
+ 
+-	Linux*)
++	DISABLELinux*)
+ 		IS_ON=/bin/true
+ 		if test -f /etc/init.d/functions; then
+ 			. /etc/init.d/functions
diff --git a/meta-oe/recipes-support/cups/cups14.inc b/meta-oe/recipes-support/cups/cups14.inc
new file mode 100644
index 0000000000..430d3ab5b5
--- /dev/null
+++ b/meta-oe/recipes-support/cups/cups14.inc
@@ -0,0 +1,84 @@
+DESCRIPTION = "An Internet printing system for Unix."
+SECTION = "console/utils"
+LICENSE = "GPLv2 LGPLv2"
+DEPENDS = "gnutls libpng jpeg dbus dbus-glib zlib"
+PROVIDES = "cups14"
+
+SRC_URI = "ftp://ftp.easysw.com/pub/cups/${PV}/cups-${PV}-source.tar.bz2"
+
+LEAD_SONAME = "libcupsdriver.so"
+
+inherit autotools binconfig
+
+EXTRA_OECONF = " \
+               --enable-gnutls \
+               --enable-dbus \
+               --enable-browsing \
+               --disable-openssl \
+               --disable-tiff \
+               --without-php \
+               --without-perl \
+               --without-python \
+               --without-java \
+               "
+
+
+do_configure() {
+	gnu-configize
+	libtoolize --force
+	DSOFLAGS="${LDFLAGS}" oe_runconf
+}
+
+do_compile () {
+	sed -i s:STRIP:NOSTRIP: Makedefs
+	sed -i s:serial:: backend/Makefile
+
+	echo "all:"    >  man/Makefile
+	echo "libs:" >> man/Makefile
+	echo "install:" >> man/Makefile
+	echo "install-data:" >> man/Makefile
+	echo "install-exec:" >> man/Makefile
+	echo "install-headers:" >> man/Makefile
+	echo "install-libs:" >> man/Makefile
+
+	oe_runmake "SSLLIBS=-lgnutls -L${STAGING_LIBDIR}" \
+		   "LIBPNG=-lpng -lm -L${STAGING_LIBDIR}" \
+		   "LIBJPEG=-ljpeg -L${STAGING_LIBDIR}" \
+		   "LIBZ=-lz -L${STAGING_LIBDIR}" \
+		   "-I."
+}
+
+fakeroot do_install () {
+	oe_runmake "DSTROOT=${D}" install
+
+   # This directory gets installed with perms 511, which makes packaging fail
+   chmod 0711 "${D}/${localstatedir}/run/cups/certs"
+}
+
+python do_package_append() {
+	# Change permissions back the way they were, they probably had a reason...
+	workdir = bb.data.getVar('WORKDIR', d, 1)
+	os.system('chmod 0511 %s/install/cups/var/run/cups/certs' % workdir)
+}
+
+PACKAGES =+ "${PN}-lib ${PN}-libimage"
+
+FILES_${PN}-lib = "${libdir}/libcups.so.*"
+
+FILES_${PN}-libimage = "${libdir}/libcupsimage.so.*"
+
+FILES_${PN}-dbg += "${libdir}/cups/backend/.debug \
+                    ${libdir}/cups/cgi-bin/.debug \
+                    ${libdir}/cups/filter/.debug \
+                    ${libdir}/cups/monitor/.debug \
+                    ${libdir}/cups/notifier/.debug \
+                    ${libdir}/cups/daemon/.debug \
+                   "
+
+#package the html for the webgui inside the main packages (~1MB uncompressed)
+
+FILES_${PN} += "${datadir}/doc/cups/images \
+                ${datadir}/doc/cups/*html \
+                ${datadir}/doc/cups/*.css \
+                ${datadir}/icons/ \
+               "
diff --git a/meta-oe/recipes-support/cups/cups_1.4.6.bb b/meta-oe/recipes-support/cups/cups_1.4.6.bb
new file mode 100644
index 0000000000..783ecf6b3a
--- /dev/null
+++ b/meta-oe/recipes-support/cups/cups_1.4.6.bb
@@ -0,0 +1,17 @@
+require cups14.inc
+
+DEPENDS += "virtual/libusb0"
+
+LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=956e7600195e6139f12de8c2a5bbefa9"
+
+SRC_URI += " \
+	file://use_echo_only_in_init.patch \
+    file://0001-don-t-try-to-run-generated-binaries.patch \
+	"
+
+SRC_URI[md5sum] = "de8fb5a29c36554925c0c6a6e2c0dae1"
+SRC_URI[sha256sum] = "f08711702a77b52c7150f96fe1f45482f6151cb95ef601268c528607fe6ad514"
+
+EXTRA_OECONF += " --disable-gssapi --enable-debug --disable-relro --enable-libusb"
+
+CONFFILES_${PN} += "${sysconfdir}/cups/cupsd.conf"
diff --git a/meta-oe/recipes-support/fftw/benchfft_3.1.bb b/meta-oe/recipes-support/fftw/benchfft_3.1.bb
new file mode 100644
index 0000000000..efa76cdcef
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/benchfft_3.1.bb
@@ -0,0 +1,20 @@
+DESCRIPTION = "FFTW benchmarks"
+SECTION = "libs"
+PRIORITY = "optional"
+LICENSE = "GPLv2"
+
+# single precision fftw is called fftwf 
+DEPENDS = "fftwf"
+
+SRC_URI = "http://www.fftw.org/benchfft/benchfft-${PV}.tar.gz"
+
+EXTRA_OECONF = "--disable-fortran --enable-single --enable-shared"
+
+inherit autotools pkgconfig
+
+do_compile_prepend() {
+	sed -i -e 's:all-recursive:$(RECURSIVE_TARGETS):g' ${S}/Makefile
+}
+
+SRC_URI[md5sum] = "9356e5e9dcb3f1481977009720a2ccf8"
+SRC_URI[sha256sum] = "1b4a5b5e48ad5e61a21586b7b59d5c0a88691a981e73e2c6dc5868197461791b"
diff --git a/meta-oe/recipes-support/fftw/fftw.inc b/meta-oe/recipes-support/fftw/fftw.inc
new file mode 100644
index 0000000000..40608b61db
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftw.inc
@@ -0,0 +1,23 @@
+DESCRIPTION = "FFTW"
+SECTION = "libs"
+PRIORITY = "optional"
+LICENSE = "GPL"
+RPROVIDES_${PN} += "libfftw3"
+
+PR = "r3"
+
+SRC_URI = "http://www.fftw.org/fftw-${PV}.tar.gz"
+
+S = "${WORKDIR}/fftw-${PV}"
+
+inherit autotools pkgconfig
+
+do_configure_prepend() {
+        echo 'AM_PROG_AS' >> ${S}/configure.ac 
+}
+
+PACKAGES =+ "lib${PN}"
+
+FILES_lib${PN} = "${libdir}/lib*.so.*"
+
+# rename binary in /bin and use u-a tpo choose between different precision implementations?
diff --git a/meta-oe/recipes-support/fftw/fftw_3.1.2.bb b/meta-oe/recipes-support/fftw/fftw_3.1.2.bb
new file mode 100644
index 0000000000..da8133785d
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftw_3.1.2.bb
@@ -0,0 +1,8 @@
+require fftw.inc
+
+EXTRA_OECONF = "--disable-fortran --enable-shared"
+
+
+
+SRC_URI[md5sum] = "08f2e21c9fd02f4be2bd53a62592afa4"
+SRC_URI[sha256sum] = "e1b92e97fe27efcbd150212d0d287ac907bd2fef0af32e16284fef5d1c1c26bf"
diff --git a/meta-oe/recipes-support/fftw/fftw_3.2.2.bb b/meta-oe/recipes-support/fftw/fftw_3.2.2.bb
new file mode 100644
index 0000000000..090e004092
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftw_3.2.2.bb
@@ -0,0 +1,8 @@
+require fftw.inc
+
+SRC_URI = "http://www.fftw.org/fftw-${PV}.tar.gz"
+
+EXTRA_OECONF = "--disable-fortran --enable-shared --enable-threads"
+
+SRC_URI[md5sum] = "b616e5c91218cc778b5aa735fefb61ae"
+SRC_URI[sha256sum] = "6aa7ae65ee49eb99004f15899f9bb77f54759122f1a350041e81e096157d768f"
diff --git a/meta-oe/recipes-support/fftw/fftwf_3.1.2.bb b/meta-oe/recipes-support/fftw/fftwf_3.1.2.bb
new file mode 100644
index 0000000000..a4f2466528
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftwf_3.1.2.bb
@@ -0,0 +1,7 @@
+require fftw.inc
+
+EXTRA_OECONF = "--disable-fortran --enable-single --enable-shared"
+
+
+SRC_URI[md5sum] = "08f2e21c9fd02f4be2bd53a62592afa4"
+SRC_URI[sha256sum] = "e1b92e97fe27efcbd150212d0d287ac907bd2fef0af32e16284fef5d1c1c26bf"
diff --git a/meta-oe/recipes-support/fftw/fftwf_3.2.2.bb b/meta-oe/recipes-support/fftw/fftwf_3.2.2.bb
new file mode 100644
index 0000000000..ac0bb6cd81
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftwf_3.2.2.bb
@@ -0,0 +1,8 @@
+require fftw.inc
+
+SRC_URI = "http://www.fftw.org/fftw-${PV}.tar.gz"
+
+EXTRA_OECONF = "--disable-fortran --enable-single --enable-shared --enable-threads"
+
+SRC_URI[md5sum] = "b616e5c91218cc778b5aa735fefb61ae"
+SRC_URI[sha256sum] = "6aa7ae65ee49eb99004f15899f9bb77f54759122f1a350041e81e096157d768f"
diff --git a/meta-oe/recipes-support/fftw/fftwl_3.1.2.bb b/meta-oe/recipes-support/fftw/fftwl_3.1.2.bb
new file mode 100644
index 0000000000..69256fb9fd
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftwl_3.1.2.bb
@@ -0,0 +1,8 @@
+require fftw.inc
+
+EXTRA_OECONF = "--disable-fortran --enable-long-double --enable-shared"
+
+
+
+SRC_URI[md5sum] = "08f2e21c9fd02f4be2bd53a62592afa4"
+SRC_URI[sha256sum] = "e1b92e97fe27efcbd150212d0d287ac907bd2fef0af32e16284fef5d1c1c26bf"
diff --git a/meta-oe/recipes-support/fftw/fftwl_3.2.2.bb b/meta-oe/recipes-support/fftw/fftwl_3.2.2.bb
new file mode 100644
index 0000000000..ff2cb2aaa5
--- /dev/null
+++ b/meta-oe/recipes-support/fftw/fftwl_3.2.2.bb
@@ -0,0 +1,8 @@
+require fftw.inc
+
+SRC_URI = "http://www.fftw.org/fftw-${PV}.tar.gz"
+
+EXTRA_OECONF = "--disable-fortran --enable-long-double --enable-shared --enable-threads"
+
+SRC_URI[md5sum] = "b616e5c91218cc778b5aa735fefb61ae"
+SRC_URI[sha256sum] = "6aa7ae65ee49eb99004f15899f9bb77f54759122f1a350041e81e096157d768f"
diff --git a/meta-oe/recipes-support/gsl/gsl.inc b/meta-oe/recipes-support/gsl/gsl.inc
new file mode 100644
index 0000000000..10bacc523d
--- /dev/null
+++ b/meta-oe/recipes-support/gsl/gsl.inc
@@ -0,0 +1,10 @@
+DESCRIPTION = "GNU Scientific Library"
+HOMEPAGE = "http://www.gnu.org/software/gsl/"
+SECTION = "libs"
+PRIORITY = "optional"
+LICENSE = "GPL"
+PR = "r1"
+
+inherit autotools pkgconfig binconfig
+
+LEAD_SONAME = "libgsl.so"
diff --git a/meta-oe/recipes-support/gsl/gsl_1.12.bb b/meta-oe/recipes-support/gsl/gsl_1.12.bb
new file mode 100644
index 0000000000..8fdbbc11e3
--- /dev/null
+++ b/meta-oe/recipes-support/gsl/gsl_1.12.bb
@@ -0,0 +1,6 @@
+include gsl.inc
+
+SRC_URI = "${GNU_MIRROR}/gsl/gsl-${PV}.tar.gz"
+
+SRC_URI[md5sum] = "3ec101903c8157756fa1352161bd4c39"
+SRC_URI[sha256sum] = "22019188d24c769acafc250ddc247105eb9cab099529b627078cbd8012c7b7b9"
diff --git a/meta-oe/recipes-support/guile/files/configure-fix.patch b/meta-oe/recipes-support/guile/files/configure-fix.patch
new file mode 100644
index 0000000000..c59798d9e9
--- /dev/null
+++ b/meta-oe/recipes-support/guile/files/configure-fix.patch
@@ -0,0 +1,10 @@
+--- /tmp/configure.in	2008-06-04 12:33:55.451086283 +0200
++++ guile-1.8.5/configure.in	2008-06-04 12:34:03.974994278 +0200
+@@ -38,7 +38,6 @@
+ ]),
+         [bug-guile@gnu.org])
+ AC_CONFIG_AUX_DIR([build-aux])
+-AC_CONFIG_MACRO_DIR([m4])
+ AC_CONFIG_SRCDIR(GUILE-VERSION)
+ 
+ AM_INIT_AUTOMAKE([gnu no-define check-news])
diff --git a/meta-oe/recipes-support/guile/files/cpp-linemarkers.patch b/meta-oe/recipes-support/guile/files/cpp-linemarkers.patch
new file mode 100644
index 0000000000..3e48932a3c
--- /dev/null
+++ b/meta-oe/recipes-support/guile/files/cpp-linemarkers.patch
@@ -0,0 +1,8 @@
+--- guile.orig/libguile/guile-snarf-docs.in	2009-07-03 18:19:00.000000000 -0400
++++ guile/libguile/guile-snarf-docs.in	2009-11-19 12:55:32.487266268 -0500
+@@ -23,4 +23,4 @@
+ ## Let the user override the preprocessor autoconf found.
+ test -n "${CPP+set}" || CPP="@CPP@"
+
+-${CPP} -DSCM_MAGIC_SNARF_DOCS "$@"
++${CPP} -P -DSCM_MAGIC_SNARF_DOCS "$@"
diff --git a/meta-oe/recipes-support/guile/guile-1.8.7/18.diff b/meta-oe/recipes-support/guile/guile-1.8.7/18.diff
new file mode 100644
index 0000000000..9c9eefb09b
--- /dev/null
+++ b/meta-oe/recipes-support/guile/guile-1.8.7/18.diff
@@ -0,0 +1,1743 @@
+diff --git a/LICENSE b/LICENSE
+index 213e34a..dda451e 100644
+--- a/LICENSE
++++ b/LICENSE
+@@ -1,2 +1,2 @@
+ Guile is covered under the terms of the GNU Lesser General Public
+-License, version 2.1.  See COPYING.LESSER.
++License, version 2.1 or later.  See COPYING.LESSER.
+diff --git a/NEWS b/NEWS
+index 0dcc411..564484f 100644
+--- a/NEWS
++++ b/NEWS
+@@ -5,6 +5,19 @@ See the end for copying conditions.
+ Please send Guile bug reports to bug-guile@gnu.org.
+ 
+ 
++Changes in 1.8.8 (since 1.8.7)
++
++* Bugs fixed
++
++** Fix possible buffer overruns when parsing numbers
++** Avoid clash with system setjmp/longjmp on IA64
++** Don't dynamically link an extension that is already registered
++** Fix `wrong type arg' exceptions with IPv6 addresses
++** Fix typos in `(srfi srfi-19)'
++** Have `(srfi srfi-35)' provide named struct vtables
++** Fix some Interix build problems
++
++
+ Changes in 1.8.7 (since 1.8.6)
+ 
+ * Bugs fixed
+diff --git a/THANKS b/THANKS
+index 47d3cfa..48a105a 100644
+--- a/THANKS
++++ b/THANKS
+@@ -50,6 +50,7 @@ For fixes or providing information which led to a fix:
+          Roland Haeder
+ 	   Sven Hartrumpf
+ 	   Eric Hanchrow
++	   Judy Hawkins
+             Sam Hocevar
+ 	Patrick Horgan
+            Ales Hvezda
+@@ -64,12 +65,15 @@ For fixes or providing information which led to a fix:
+        Matthias Köppe
+            Matt Kraai
+          Daniel Kraft
++            Jay Krell
+            Jeff Long
+ 	  Marco Maggi
+         Gregory Marton
++      Kjetil S. Matheussen
+         Antoine Mathys
+             Dan McMahill
+           Roger Mc Murtrie
++          Scott McPeak
+             Tim Mooney
+         Han-Wen Nienhuys
+             Jan Nieuwenhuizen
+diff --git a/doc/ref/api-modules.texi b/doc/ref/api-modules.texi
+index 9aeb08a..f6393db 100644
+--- a/doc/ref/api-modules.texi
++++ b/doc/ref/api-modules.texi
+@@ -758,7 +758,7 @@ Record definition with @code{define-record-type} (@pxref{SRFI-9}).
+ Read hash extension @code{#,()} (@pxref{SRFI-10}).
+ 
+ @item (srfi srfi-11)
+-Multiple-value handling with @code{let-values} and @code{let-values*}
++Multiple-value handling with @code{let-values} and @code{let*-values}
+ (@pxref{SRFI-11}).
+ 
+ @item (srfi srfi-13)
+diff --git a/doc/ref/guile.texi b/doc/ref/guile.texi
+index 7c17b36..3d9cde4 100644
+--- a/doc/ref/guile.texi
++++ b/doc/ref/guile.texi
+@@ -13,8 +13,8 @@ This reference manual documents Guile, GNU's Ubiquitous Intelligent
+ Language for Extensions.  This is edition @value{MANUAL-EDITION}
+ corresponding to Guile @value{VERSION}.
+ 
+-Copyright (C) 1996, 1997, 2000, 2001, 2002, 2003, 2004, 2005 Free
+-Software Foundation.
++Copyright (C) 1996, 1997, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
++2007, 2008, 2009, 2010 Free Software Foundation.
+ 
+ Permission is granted to copy, distribute and/or modify this document
+ under the terms of the GNU Free Documentation License, Version 1.2 or
+diff --git a/doc/ref/posix.texi b/doc/ref/posix.texi
+index 1cb273a..0a7e342 100644
+--- a/doc/ref/posix.texi
++++ b/doc/ref/posix.texi
+@@ -2310,8 +2310,8 @@ Convert a network address from an integer to a printable string.
+ 
+ @lisp
+ (inet-ntop AF_INET 2130706433) @result{} "127.0.0.1"
+-(inet-ntop AF_INET6 (- (expt 2 128) 1)) @result{}
+-ffff:ffff:ffff:ffff:ffff:ffff:ffff:ffff
++(inet-ntop AF_INET6 (- (expt 2 128) 1))
++  @result{} "ffff:ffff:ffff:ffff:ffff:ffff:ffff:ffff"
+ @end lisp
+ @end deffn
+ 
+@@ -2882,8 +2882,8 @@ same as @code{make-socket-address} would take to make such an object
+ (@pxref{Network Socket Address}).  The return value is unspecified.
+ 
+ @example
+-(connect sock AF_INET INADDR_LOCALHOST 23)
+-(connect sock (make-socket-address AF_INET INADDR_LOCALHOST 23))
++(connect sock AF_INET INADDR_LOOPBACK 23)
++(connect sock (make-socket-address AF_INET INADDR_LOOPBACK 23))
+ @end example
+ @end deffn
+ 
+diff --git a/ice-9/debugging/ice-9-debugger-extensions.scm b/ice-9/debugging/ice-9-debugger-extensions.scm
+index a8b8c97..fe04fc0 100644
+--- a/ice-9/debugging/ice-9-debugger-extensions.scm
++++ b/ice-9/debugging/ice-9-debugger-extensions.scm
+@@ -39,7 +39,8 @@
+       (else
+        (define-module (ice-9 debugger))))
+ 
+-(use-modules (ice-9 debugging steps))
++(use-modules (ice-9 debugging steps)
++             (ice-9 debugging trace))
+ 
+ (define (assert-continuable state)
+   ;; Check that debugger is in a state where `continuing' makes sense.
+diff --git a/libguile/__scm.h b/libguile/__scm.h
+index b198f9d..e75f1a9 100644
+--- a/libguile/__scm.h
++++ b/libguile/__scm.h
+@@ -3,7 +3,7 @@
+ #ifndef SCM___SCM_H
+ #define SCM___SCM_H
+ 
+-/* Copyright (C) 1995,1996,1998,1999,2000,2001,2002,2003, 2006, 2007, 2008 Free Software Foundation, Inc.
++/* Copyright (C) 1995,1996,1998,1999,2000,2001,2002,2003, 2006, 2007, 2008, 2010 Free Software Foundation, Inc.
+  *
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -359,11 +359,9 @@
+ #define SCM_T_INT32_MIN   SCM_I_TYPE_MIN(scm_t_int32,SCM_T_UINT32_MAX)
+ #define SCM_T_INT32_MAX   SCM_I_TYPE_MAX(scm_t_int32,SCM_T_UINT32_MAX)
+ 
+-#if SCM_HAVE_T_INT64
+ #define SCM_T_UINT64_MAX  SCM_I_UTYPE_MAX(scm_t_uint64)
+ #define SCM_T_INT64_MIN   SCM_I_TYPE_MIN(scm_t_int64,SCM_T_UINT64_MAX)
+ #define SCM_T_INT64_MAX   SCM_I_TYPE_MAX(scm_t_int64,SCM_T_UINT64_MAX)
+-#endif
+ 
+ #if SCM_SIZEOF_LONG_LONG
+ #define SCM_I_ULLONG_MAX  SCM_I_UTYPE_MAX(unsigned long long)
+@@ -409,19 +407,28 @@
+     typedef struct {
+       ucontext_t ctx;
+       int fresh;
+-    } jmp_buf;
+-#   define setjmp(JB)				        \
++    } scm_i_jmp_buf;
++#   define SCM_I_SETJMP(JB)			        \
+       ( (JB).fresh = 1,				        \
+         getcontext (&((JB).ctx)),			\
+         ((JB).fresh ? ((JB).fresh = 0, 0) : 1) )
+-#   define longjmp(JB,VAL) scm_ia64_longjmp (&(JB), VAL)
+-    void scm_ia64_longjmp (jmp_buf *, int);
++#   define SCM_I_LONGJMP(JB,VAL) scm_ia64_longjmp (&(JB), VAL)
++    void scm_ia64_longjmp (scm_i_jmp_buf *, int);
+ #  else                 	/* ndef __ia64__ */
+ #   include <setjmp.h>
+ #  endif			/* ndef __ia64__ */
+ # endif				/* ndef _CRAY1 */
+ #endif				/* ndef vms */
+ 
++/* For any platform where SCM_I_SETJMP hasn't been defined in some
++   special way above, map SCM_I_SETJMP, SCM_I_LONGJMP and
++   scm_i_jmp_buf to setjmp, longjmp and jmp_buf. */
++#ifndef SCM_I_SETJMP
++#define scm_i_jmp_buf jmp_buf
++#define SCM_I_SETJMP setjmp
++#define SCM_I_LONGJMP longjmp
++#endif
++
+ /* James Clark came up with this neat one instruction fix for
+  * continuations on the SPARC.  It flushes the register windows so
+  * that all the state of the process is contained in the stack.
+diff --git a/libguile/continuations.c b/libguile/continuations.c
+index 69d2569..84a7fed 100644
+--- a/libguile/continuations.c
++++ b/libguile/continuations.c
+@@ -127,7 +127,7 @@ scm_make_continuation (int *first)
+   continuation->offset = continuation->stack - src;
+   memcpy (continuation->stack, src, sizeof (SCM_STACKITEM) * stack_size);
+ 
+-  *first = !setjmp (continuation->jmpbuf);
++  *first = !SCM_I_SETJMP (continuation->jmpbuf);
+   if (*first)
+     {
+ #ifdef __ia64__
+@@ -224,12 +224,12 @@ copy_stack_and_call (scm_t_contregs *continuation, SCM val,
+   scm_i_set_last_debug_frame (continuation->dframe);
+ 
+   continuation->throw_value = val;
+-  longjmp (continuation->jmpbuf, 1);
++  SCM_I_LONGJMP (continuation->jmpbuf, 1);
+ }
+ 
+ #ifdef __ia64__
+ void
+-scm_ia64_longjmp (jmp_buf *JB, int VAL)
++scm_ia64_longjmp (scm_i_jmp_buf *JB, int VAL)
+ {
+   scm_i_thread *t = SCM_I_CURRENT_THREAD;
+ 
+diff --git a/libguile/continuations.h b/libguile/continuations.h
+index f6fb96a..c61ab2d 100644
+--- a/libguile/continuations.h
++++ b/libguile/continuations.h
+@@ -43,7 +43,7 @@ SCM_API scm_t_bits scm_tc16_continuation;
+ typedef struct 
+ {
+   SCM throw_value;
+-  jmp_buf jmpbuf;
++  scm_i_jmp_buf jmpbuf;
+   SCM dynenv;
+ #ifdef __ia64__
+   void *backing_store;
+diff --git a/libguile/extensions.c b/libguile/extensions.c
+index 1090b8b..29cb58c 100644
+--- a/libguile/extensions.c
++++ b/libguile/extensions.c
+@@ -76,6 +76,7 @@ load_extension (SCM lib, SCM init)
+     {
+       extension_t *ext;
+       char *clib, *cinit;
++      int found = 0;
+ 
+       scm_dynwind_begin (0);
+ 
+@@ -89,10 +90,14 @@ load_extension (SCM lib, SCM init)
+ 	    && !strcmp (ext->init, cinit))
+ 	  {
+ 	    ext->func (ext->data);
++            found = 1;
+ 	    break;
+ 	  }
+ 
+       scm_dynwind_end ();
++
++      if (found)
++        return;
+     }
+ 
+   /* Dynamically link the library. */
+diff --git a/libguile/filesys.c b/libguile/filesys.c
+index 70dfe15..c8acb13 100644
+--- a/libguile/filesys.c
++++ b/libguile/filesys.c
+@@ -23,6 +23,9 @@
+ #ifdef __hpux
+ #define _POSIX_C_SOURCE 199506L  /* for readdir_r */
+ #endif
++#if defined(__INTERIX) && !defined(_REENTRANT)
++# define _REENTRANT   /* ask Interix for readdir_r prototype */
++#endif
+ 
+ #ifdef HAVE_CONFIG_H
+ #  include <config.h>
+diff --git a/libguile/gen-scmconfig.c b/libguile/gen-scmconfig.c
+index 85ebfae..e5de31d 100644
+--- a/libguile/gen-scmconfig.c
++++ b/libguile/gen-scmconfig.c
+@@ -315,28 +315,10 @@ main (int argc, char *argv[])
+     return 1;
+ 
+   pf ("\n");
+-  pf ("/* 64-bit integer -- if available SCM_HAVE_T_INT64 will be 1 and\n"
+-      "   scm_t_int64 will be a suitable type, otherwise SCM_HAVE_T_INT64\n"
+-      "   will be 0. */\n");
+-  if (SCM_I_GSC_T_INT64)
+-  {
+-    pf ("#define SCM_HAVE_T_INT64 1 /* 0 or 1 */\n");
+-    pf ("typedef %s scm_t_int64;\n", SCM_I_GSC_T_INT64);
+-  }
+-  else
+-    pf ("#define SCM_HAVE_T_INT64 0 /* 0 or 1 */\n");
+-
+-  pf ("\n");
+-  pf ("/* 64-bit unsigned integer -- if available SCM_HAVE_T_UINT64 will\n"
+-      "   be 1 and scm_t_uint64 will be a suitable type, otherwise\n"
+-      "   SCM_HAVE_T_UINT64 will be 0. */\n");
+-  if (SCM_I_GSC_T_UINT64)
+-  {
+-    pf ("#define SCM_HAVE_T_UINT64 1 /* 0 or 1 */\n");
+-    pf ("typedef %s scm_t_uint64;\n", SCM_I_GSC_T_UINT64);
+-  }
+-  else
+-    pf ("#define SCM_HAVE_T_UINT64 0 /* 0 or 1 */\n");
++  pf ("#define SCM_HAVE_T_INT64 1 /* 0 or 1 */\n");
++  pf ("typedef %s scm_t_int64;\n", SCM_I_GSC_T_INT64);
++  pf ("#define SCM_HAVE_T_UINT64 1 /* 0 or 1 */\n");
++  pf ("typedef %s scm_t_uint64;\n", SCM_I_GSC_T_UINT64);
+ 
+   pf ("\n");
+   pf ("/* scm_t_ptrdiff_t and size, always defined -- defined to long if\n"
+diff --git a/libguile/hashtab.c b/libguile/hashtab.c
+index ea7fc69..1f1569c 100644
+--- a/libguile/hashtab.c
++++ b/libguile/hashtab.c
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1995,1996,1998,1999,2000,2001, 2003, 2004, 2006, 2008 Free Software Foundation, Inc.
++/* Copyright (C) 1995,1996,1998,1999,2000,2001, 2003, 2004, 2006, 2008, 2010 Free Software Foundation, Inc.
+  * 
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -911,74 +911,6 @@ SCM_DEFINE (scm_hashx_remove_x, "hashx-remove!", 4, 0, 0,
+ 
+ /* Hash table iterators */
+ 
+-static const char s_scm_hash_fold[];
+-
+-SCM
+-scm_internal_hash_fold (SCM (*fn) (), void *closure, SCM init, SCM table)
+-{
+-  long i, n;
+-  SCM buckets, result = init;
+-  
+-  if (SCM_HASHTABLE_P (table))
+-    buckets = SCM_HASHTABLE_VECTOR (table);
+-  else
+-    buckets = table;
+-  
+-  n = SCM_SIMPLE_VECTOR_LENGTH (buckets);
+-  for (i = 0; i < n; ++i)
+-    {
+-      SCM ls = SCM_SIMPLE_VECTOR_REF (buckets, i), handle;
+-      while (!scm_is_null (ls))
+-	{
+-	  if (!scm_is_pair (ls))
+-	    scm_wrong_type_arg (s_scm_hash_fold, SCM_ARG3, buckets);
+-	  handle = SCM_CAR (ls);
+-	  if (!scm_is_pair (handle))
+-	    scm_wrong_type_arg (s_scm_hash_fold, SCM_ARG3, buckets);
+-	  result = fn (closure, SCM_CAR (handle), SCM_CDR (handle), result);
+-	  ls = SCM_CDR (ls);
+-	}
+-    }
+-
+-  return result;
+-}
+-
+-/* The following redundant code is here in order to be able to support
+-   hash-for-each-handle.  An alternative would have been to replace
+-   this code and scm_internal_hash_fold above with a single
+-   scm_internal_hash_fold_handles, but we don't want to promote such
+-   an API. */
+-
+-static const char s_scm_hash_for_each[];
+-
+-void
+-scm_internal_hash_for_each_handle (SCM (*fn) (), void *closure, SCM table)
+-{
+-  long i, n;
+-  SCM buckets;
+-  
+-  if (SCM_HASHTABLE_P (table))
+-    buckets = SCM_HASHTABLE_VECTOR (table);
+-  else
+-    buckets = table;
+-  
+-  n = SCM_SIMPLE_VECTOR_LENGTH (buckets);
+-  for (i = 0; i < n; ++i)
+-    {
+-      SCM ls = SCM_SIMPLE_VECTOR_REF (buckets, i), handle;
+-      while (!scm_is_null (ls))
+-	{
+-	  if (!scm_is_pair (ls))
+-	    scm_wrong_type_arg (s_scm_hash_for_each, SCM_ARG3, buckets);
+-	  handle = SCM_CAR (ls);
+-	  if (!scm_is_pair (handle))
+-	    scm_wrong_type_arg (s_scm_hash_for_each, SCM_ARG3, buckets);
+-	  fn (closure, handle);
+-	  ls = SCM_CDR (ls);
+-	}
+-    }
+-}
+-
+ SCM_DEFINE (scm_hash_fold, "hash-fold", 3, 0, 0, 
+             (SCM proc, SCM init, SCM table),
+ 	    "An iterator over hash-table elements.\n"
+@@ -1067,6 +999,72 @@ SCM_DEFINE (scm_hash_map_to_list, "hash-map->list", 2, 0, 0,
+ 
+ 
+ 
++SCM
++scm_internal_hash_fold (SCM (*fn) (), void *closure, SCM init, SCM table)
++{
++  long i, n;
++  SCM buckets, result = init;
++  
++  if (SCM_HASHTABLE_P (table))
++    buckets = SCM_HASHTABLE_VECTOR (table);
++  else
++    buckets = table;
++  
++  n = SCM_SIMPLE_VECTOR_LENGTH (buckets);
++  for (i = 0; i < n; ++i)
++    {
++      SCM ls = SCM_SIMPLE_VECTOR_REF (buckets, i), handle;
++      while (!scm_is_null (ls))
++	{
++	  if (!scm_is_pair (ls))
++	    scm_wrong_type_arg (s_scm_hash_fold, SCM_ARG3, buckets);
++	  handle = SCM_CAR (ls);
++	  if (!scm_is_pair (handle))
++	    scm_wrong_type_arg (s_scm_hash_fold, SCM_ARG3, buckets);
++	  result = fn (closure, SCM_CAR (handle), SCM_CDR (handle), result);
++	  ls = SCM_CDR (ls);
++	}
++    }
++
++  return result;
++}
++
++/* The following redundant code is here in order to be able to support
++   hash-for-each-handle.  An alternative would have been to replace
++   this code and scm_internal_hash_fold above with a single
++   scm_internal_hash_fold_handles, but we don't want to promote such
++   an API. */
++
++void
++scm_internal_hash_for_each_handle (SCM (*fn) (), void *closure, SCM table)
++{
++  long i, n;
++  SCM buckets;
++  
++  if (SCM_HASHTABLE_P (table))
++    buckets = SCM_HASHTABLE_VECTOR (table);
++  else
++    buckets = table;
++  
++  n = SCM_SIMPLE_VECTOR_LENGTH (buckets);
++  for (i = 0; i < n; ++i)
++    {
++      SCM ls = SCM_SIMPLE_VECTOR_REF (buckets, i), handle;
++      while (!scm_is_null (ls))
++	{
++	  if (!scm_is_pair (ls))
++	    scm_wrong_type_arg (s_scm_hash_for_each, SCM_ARG3, buckets);
++	  handle = SCM_CAR (ls);
++	  if (!scm_is_pair (handle))
++	    scm_wrong_type_arg (s_scm_hash_for_each, SCM_ARG3, buckets);
++	  fn (closure, handle);
++	  ls = SCM_CDR (ls);
++	}
++    }
++}
++
++
++
+ 
+ void
+ scm_hashtab_prehistory ()
+diff --git a/libguile/iselect.h b/libguile/iselect.h
+index 5a4b30d..b23a641 100644
+--- a/libguile/iselect.h
++++ b/libguile/iselect.h
+@@ -38,7 +38,12 @@
+ #ifdef FD_SET
+ 
+ #define SELECT_TYPE fd_set
++#if defined(__INTERIX) && FD_SETSIZE == 4096
++/* Interix defines FD_SETSIZE 4096 but select rejects that. */
++#define SELECT_SET_SIZE 1024
++#else
+ #define SELECT_SET_SIZE FD_SETSIZE
++#endif
+ 
+ #else /* no FD_SET */
+ 
+diff --git a/libguile/numbers.c b/libguile/numbers.c
+index 2e1635f..4f5ab31 100644
+--- a/libguile/numbers.c
++++ b/libguile/numbers.c
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1995,1996,1997,1998,1999,2000,2001,2002,2003,2004,2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
++/* Copyright (C) 1995,1996,1997,1998,1999,2000,2001,2002,2003,2004,2005, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+  *
+  * Portions Copyright 1990, 1991, 1992, 1993 by AT&T Bell Laboratories
+  * and Bellcore.  See scm_divide.
+@@ -620,7 +620,14 @@ guile_ieee_init (void)
+ #elif HAVE_DINFINITY
+   /* OSF */
+   extern unsigned int DINFINITY[2];
+-  guile_Inf = (*((double *) (DINFINITY)));
++  union
++  {
++    double d;
++    int i[2];
++  } alias;
++  alias.i[0] = DINFINITY[0];
++  alias.i[1] = DINFINITY[1];
++  guile_Inf = alias.d;
+ #else
+   double tmp = 1e+10;
+   guile_Inf = tmp;
+@@ -651,7 +658,14 @@ guile_ieee_init (void)
+   {
+     /* OSF */
+     extern unsigned int DQNAN[2];
+-    guile_NaN = (*((double *)(DQNAN)));
++    union
++    {
++      double d;
++      int i[2];
++    } alias;
++    alias.i[0] = DQNAN[0];
++    alias.i[1] = DQNAN[1];
++    guile_NaN = alias.d;
+   }
+ #else
+   guile_NaN = guile_Inf / guile_Inf;
+@@ -2663,17 +2677,26 @@ mem2decimal_from_point (SCM result, const char* mem, size_t len,
+ 	case 'l': case 'L':
+ 	case 's': case 'S':
+ 	  idx++;
++          if (idx == len)
++            return SCM_BOOL_F;
++
+ 	  start = idx;
+ 	  c = mem[idx];
+ 	  if (c == '-')
+ 	    {
+ 	      idx++;
++              if (idx == len)
++                return SCM_BOOL_F;
++
+ 	      sign = -1;
+ 	      c = mem[idx];
+ 	    }
+ 	  else if (c == '+')
+ 	    {
+ 	      idx++;
++              if (idx == len)
++                return SCM_BOOL_F;
++
+ 	      sign = 1;
+ 	      c = mem[idx];
+ 	    }
+@@ -2789,8 +2812,10 @@ mem2ureal (const char* mem, size_t len, unsigned int *p_idx,
+ 	  SCM divisor;
+ 
+ 	  idx++;
++          if (idx == len)
++            return SCM_BOOL_F;
+ 
+-	  divisor = mem2uinteger (mem, len, &idx, radix, &x);
++          divisor = mem2uinteger (mem, len, &idx, radix, &x);
+ 	  if (scm_is_false (divisor))
+ 	    return SCM_BOOL_F;
+ 
+@@ -2911,11 +2936,15 @@ mem2complex (const char* mem, size_t len, unsigned int idx,
+ 	      if (c == '+')
+ 		{
+ 		  idx++;
++                  if (idx == len)
++                    return SCM_BOOL_F;
+ 		  sign = 1;
+ 		}
+ 	      else if (c == '-')
+ 		{
+ 		  idx++;
++                  if (idx == len)
++                    return SCM_BOOL_F;
+ 		  sign = -1;
+ 		}
+ 	      else
+@@ -5869,8 +5898,6 @@ scm_i_range_error (SCM bad_val, SCM min, SCM max)
+ #define SCM_FROM_TYPE_PROTO(arg) scm_from_uint32 (arg)
+ #include "libguile/conv-uinteger.i.c"
+ 
+-#if SCM_HAVE_T_INT64
+-
+ #define TYPE                     scm_t_int64
+ #define TYPE_MIN                 SCM_T_INT64_MIN
+ #define TYPE_MAX                 SCM_T_INT64_MAX
+@@ -5887,8 +5914,6 @@ scm_i_range_error (SCM bad_val, SCM min, SCM max)
+ #define SCM_FROM_TYPE_PROTO(arg) scm_from_uint64 (arg)
+ #include "libguile/conv-uinteger.i.c"
+ 
+-#endif
+-
+ void
+ scm_to_mpz (SCM val, mpz_t rop)
+ {
+diff --git a/libguile/numbers.h b/libguile/numbers.h
+index 2c2fdcf..35263a4 100644
+--- a/libguile/numbers.h
++++ b/libguile/numbers.h
+@@ -3,7 +3,7 @@
+ #ifndef SCM_NUMBERS_H
+ #define SCM_NUMBERS_H
+ 
+-/* Copyright (C) 1995,1996,1998,2000,2001,2002,2003,2004,2005, 2006 Free Software Foundation, Inc.
++/* Copyright (C) 1995,1996,1998,2000,2001,2002,2003,2004,2005, 2006, 2010 Free Software Foundation, Inc.
+  *
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -321,16 +321,12 @@ SCM_API SCM          scm_from_int32  (scm_t_int32 x);
+ SCM_API scm_t_uint32 scm_to_uint32   (SCM x);
+ SCM_API SCM          scm_from_uint32 (scm_t_uint32 x);
+ 
+-#if SCM_HAVE_T_INT64
+-
+ SCM_API scm_t_int64  scm_to_int64    (SCM x);
+ SCM_API SCM          scm_from_int64  (scm_t_int64 x);
+ 
+ SCM_API scm_t_uint64 scm_to_uint64   (SCM x);
+ SCM_API SCM          scm_from_uint64 (scm_t_uint64 x);
+ 
+-#endif
+-
+ SCM_API void scm_to_mpz (SCM x, mpz_t rop);
+ SCM_API SCM  scm_from_mpz (mpz_t rop);
+ 
+diff --git a/libguile/random.c b/libguile/random.c
+index 8d2ff03..693ed4a 100644
+--- a/libguile/random.c
++++ b/libguile/random.c
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1999,2000,2001, 2003, 2005, 2006 Free Software Foundation, Inc.
++/* Copyright (C) 1999,2000,2001, 2003, 2005, 2006, 2010 Free Software Foundation, Inc.
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+  * License as published by the Free Software Foundation; either
+@@ -75,8 +75,6 @@ scm_t_rng scm_the_rng;
+ #define M_PI 3.14159265359
+ #endif
+ 
+-#if SCM_HAVE_T_UINT64
+-
+ unsigned long
+ scm_i_uniform32 (scm_t_i_rstate *state)
+ {
+@@ -87,38 +85,6 @@ scm_i_uniform32 (scm_t_i_rstate *state)
+   return w;
+ }
+ 
+-#else
+-
+-/*     ww  This is a portable version of the same RNG without 64 bit
+- *   * aa  arithmetic.
+- *   ----
+- *     xx  It is only intended to provide identical behaviour on
+- *    xx   platforms without 8 byte longs or long longs until
+- *    xx   someone has implemented the routine in assembler code.
+- *   xxcc
+- *   ----
+- *   ccww
+- */
+-
+-#define L(x) ((x) & 0xffff)
+-#define H(x) ((x) >> 16)
+-
+-unsigned long
+-scm_i_uniform32 (scm_t_i_rstate *state)
+-{
+-  scm_t_uint32 x1 = L (A) * L (state->w);
+-  scm_t_uint32 x2 = L (A) * H (state->w);
+-  scm_t_uint32 x3 = H (A) * L (state->w);
+-  scm_t_uint32 w = L (x1) + L (state->c);
+-  scm_t_uint32 m = H (x1) + L (x2) + L (x3) + H (state->c) + H (w);
+-  scm_t_uint32 x4 = H (A) * H (state->w);
+-  state->w = w = (L (m) << 16) + L (w);
+-  state->c = H (x2) + H (x3) + x4 + H (m);
+-  return w;
+-}
+-
+-#endif
+-
+ void
+ scm_i_init_rstate (scm_t_i_rstate *state, const char *seed, int n)
+ {
+@@ -212,21 +178,49 @@ scm_c_exp1 (scm_t_rstate *state)
+ 
+ unsigned char scm_masktab[256];
+ 
+-unsigned long
+-scm_c_random (scm_t_rstate *state, unsigned long m)
++static inline scm_t_uint32
++scm_i_mask32 (scm_t_uint32 m)
+ {
+-  unsigned int r, mask;
+-  mask = (m < 0x100
++  return (m < 0x100
+ 	  ? scm_masktab[m]
+ 	  : (m < 0x10000
+ 	     ? scm_masktab[m >> 8] << 8 | 0xff
+ 	     : (m < 0x1000000
+ 		? scm_masktab[m >> 16] << 16 | 0xffff
+ 		: scm_masktab[m >> 24] << 24 | 0xffffff)));
++}
++
++static scm_t_uint32
++scm_c_random32 (scm_t_rstate *state, scm_t_uint32 m)
++{
++  scm_t_uint32 r, mask = scm_i_mask32 (m);
+   while ((r = scm_the_rng.random_bits (state) & mask) >= m);
+   return r;
+ }
+ 
++/* Returns 32 random bits. */
++unsigned long
++scm_c_random (scm_t_rstate *state, unsigned long m)
++{
++  return scm_c_random32 (state, (scm_t_uint32)m);
++}
++
++scm_t_uint64
++scm_c_random64 (scm_t_rstate *state, scm_t_uint64 m)
++{
++  scm_t_uint64 r;
++  scm_t_uint32 mask;
++
++  if (m <= SCM_T_UINT32_MAX)
++    return scm_c_random32 (state, (scm_t_uint32) m);
++  
++  mask = scm_i_mask32 (m >> 32);
++  while ((r = ((scm_t_uint64) (scm_the_rng.random_bits (state) & mask) << 32)
++          | scm_the_rng.random_bits (state)) >= m)
++    ;
++  return r;
++}
++
+ /*
+   SCM scm_c_random_bignum (scm_t_rstate *state, SCM m)
+ 
+@@ -247,24 +241,24 @@ scm_c_random_bignum (scm_t_rstate *state, SCM m)
+ {
+   SCM result = scm_i_mkbig ();
+   const size_t m_bits = mpz_sizeinbase (SCM_I_BIG_MPZ (m), 2);
+-  /* how many bits would only partially fill the last unsigned long? */
+-  const size_t end_bits = m_bits % (sizeof (unsigned long) * SCM_CHAR_BIT);
+-  unsigned long *random_chunks = NULL;
+-  const unsigned long num_full_chunks =
+-    m_bits / (sizeof (unsigned long) * SCM_CHAR_BIT);
+-  const unsigned long num_chunks = num_full_chunks + ((end_bits) ? 1 : 0);
++  /* how many bits would only partially fill the last u32? */
++  const size_t end_bits = m_bits % (sizeof (scm_t_uint32) * SCM_CHAR_BIT);
++  scm_t_uint32 *random_chunks = NULL;
++  const scm_t_uint32 num_full_chunks =
++    m_bits / (sizeof (scm_t_uint32) * SCM_CHAR_BIT);
++  const scm_t_uint32 num_chunks = num_full_chunks + ((end_bits) ? 1 : 0);
+ 
+   /* we know the result will be this big */
+   mpz_realloc2 (SCM_I_BIG_MPZ (result), m_bits);
+ 
+   random_chunks =
+-    (unsigned long *) scm_gc_calloc (num_chunks * sizeof (unsigned long),
++    (scm_t_uint32 *) scm_gc_calloc (num_chunks * sizeof (scm_t_uint32),
+                                      "random bignum chunks");
+ 
+   do
+     {
+-      unsigned long *current_chunk = random_chunks + (num_chunks - 1);
+-      unsigned long chunks_left = num_chunks;
++      scm_t_uint32 *current_chunk = random_chunks + (num_chunks - 1);
++      scm_t_uint32 chunks_left = num_chunks;
+ 
+       mpz_set_ui (SCM_I_BIG_MPZ (result), 0);
+       
+@@ -273,23 +267,23 @@ scm_c_random_bignum (scm_t_rstate *state, SCM m)
+           /* generate a mask with ones in the end_bits position, i.e. if
+              end_bits is 3, then we'd have a mask of ...0000000111 */
+           const unsigned long rndbits = scm_the_rng.random_bits (state);
+-          int rshift = (sizeof (unsigned long) * SCM_CHAR_BIT) - end_bits;
+-          unsigned long mask = ((unsigned long) ULONG_MAX) >> rshift;
+-          unsigned long highest_bits = rndbits & mask;
++          int rshift = (sizeof (scm_t_uint32) * SCM_CHAR_BIT) - end_bits;
++          scm_t_uint32 mask = 0xffffffff >> rshift;
++          scm_t_uint32 highest_bits = ((scm_t_uint32) rndbits) & mask;
+           *current_chunk-- = highest_bits;
+           chunks_left--;
+         }
+       
+       while (chunks_left)
+         {
+-          /* now fill in the remaining unsigned long sized chunks */
++          /* now fill in the remaining scm_t_uint32 sized chunks */
+           *current_chunk-- = scm_the_rng.random_bits (state);
+           chunks_left--;
+         }
+       mpz_import (SCM_I_BIG_MPZ (result),
+                   num_chunks,
+                   -1,
+-                  sizeof (unsigned long),
++                  sizeof (scm_t_uint32),
+                   0,
+                   0,
+                   random_chunks);
+@@ -297,7 +291,7 @@ scm_c_random_bignum (scm_t_rstate *state, SCM m)
+ 	 all bits in order not to get a distorted distribution) */
+     } while (mpz_cmp (SCM_I_BIG_MPZ (result), SCM_I_BIG_MPZ (m)) >= 0);
+   scm_gc_free (random_chunks,
+-               num_chunks * sizeof (unsigned long),
++               num_chunks * sizeof (scm_t_uint32),
+                "random bignum chunks");
+   return scm_i_normbig (result);
+ }
+@@ -348,9 +342,17 @@ SCM_DEFINE (scm_random, "random", 1, 1, 0,
+   SCM_VALIDATE_RSTATE (2, state);
+   if (SCM_I_INUMP (n))
+     {
+-      unsigned long m = SCM_I_INUM (n);
+-      SCM_ASSERT_RANGE (1, n, m > 0);
+-      return scm_from_ulong (scm_c_random (SCM_RSTATE (state), m));
++      unsigned long m = (unsigned long) SCM_I_INUM (n);
++      SCM_ASSERT_RANGE (1, n, SCM_I_INUM (n) > 0);
++#if SCM_SIZEOF_UNSIGNED_LONG <= 4
++      return scm_from_uint32 (scm_c_random (SCM_RSTATE (state),
++                                            (scm_t_uint32) m));
++#elif SCM_SIZEOF_UNSIGNED_LONG <= 8
++      return scm_from_uint64 (scm_c_random64 (SCM_RSTATE (state),
++                                              (scm_t_uint64) m));
++#else
++#error "Cannot deal with this platform's unsigned long size"
++#endif
+     }
+   SCM_VALIDATE_NIM (1, n);
+   if (SCM_REALP (n))
+diff --git a/libguile/random.h b/libguile/random.h
+index 6ec43ff..0690b59 100644
+--- a/libguile/random.h
++++ b/libguile/random.h
+@@ -3,7 +3,7 @@
+ #ifndef SCM_RANDOM_H
+ #define SCM_RANDOM_H
+ 
+-/* Copyright (C) 1999,2000,2001, 2006 Free Software Foundation, Inc.
++/* Copyright (C) 1999,2000,2001, 2006, 2010 Free Software Foundation, Inc.
+  *
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -45,6 +45,7 @@ typedef struct scm_t_rstate {
+ 
+ typedef struct scm_t_rng {
+   size_t rstate_size;				    /* size of random state */
++  /* Though this returns an unsigned long, it's only 32 bits of randomness. */
+   unsigned long (*random_bits) (scm_t_rstate *state); /* gives 32 random bits */
+   void (*init_rstate) (scm_t_rstate *state, const char *seed, int n);
+   scm_t_rstate *(*copy_rstate) (scm_t_rstate *state);
+@@ -62,6 +63,7 @@ typedef struct scm_t_i_rstate {
+   unsigned long c;
+ } scm_t_i_rstate;
+ 
++/* Though this returns an unsigned long, it's only 32 bits of randomness. */
+ SCM_API unsigned long scm_i_uniform32 (scm_t_i_rstate *);
+ SCM_API void scm_i_init_rstate (scm_t_i_rstate *, const char *seed, int n);
+ SCM_API scm_t_i_rstate *scm_i_copy_rstate (scm_t_i_rstate *);
+@@ -76,7 +78,10 @@ SCM_API scm_t_rstate *scm_c_default_rstate (void);
+ SCM_API double scm_c_uniform01 (scm_t_rstate *);
+ SCM_API double scm_c_normal01 (scm_t_rstate *);
+ SCM_API double scm_c_exp1 (scm_t_rstate *);
++/* Though this returns an unsigned long, it's only 32 bits of randomness. */
+ SCM_API unsigned long scm_c_random (scm_t_rstate *, unsigned long m);
++/* This one returns 64 bits of randomness. */
++SCM_API scm_t_uint64 scm_c_random64 (scm_t_rstate *state, scm_t_uint64 m);
+ SCM_API SCM scm_c_random_bignum (scm_t_rstate *, SCM m);
+ 
+ 
+diff --git a/libguile/socket.c b/libguile/socket.c
+index f34b6d4..cb954f4 100644
+--- a/libguile/socket.c
++++ b/libguile/socket.c
+@@ -347,7 +347,7 @@ scm_to_ipv6 (scm_t_uint8 dst[16], SCM src)
+       scm_remember_upto_here_1 (src);
+     }
+   else
+-    scm_wrong_type_arg (NULL, 0, src);
++    scm_wrong_type_arg_msg ("scm_to_ipv6", 0, src, "integer");
+ }
+ 
+ #ifdef HAVE_INET_PTON
+@@ -397,8 +397,8 @@ SCM_DEFINE (scm_inet_ntop, "inet-ntop", 2, 0, 0,
+ 	    "@var{family} can be @code{AF_INET} or @code{AF_INET6}.  E.g.,\n\n"
+ 	    "@lisp\n"
+ 	    "(inet-ntop AF_INET 2130706433) @result{} \"127.0.0.1\"\n"
+-	    "(inet-ntop AF_INET6 (- (expt 2 128) 1)) @result{}\n"
+-	    "ffff:ffff:ffff:ffff:ffff:ffff:ffff:ffff\n"
++	    "(inet-ntop AF_INET6 (- (expt 2 128) 1))\n"
++	    "  @result{} \"ffff:ffff:ffff:ffff:ffff:ffff:ffff:ffff\"\n"
+ 	    "@end lisp")
+ #define FUNC_NAME s_scm_inet_ntop
+ {
+@@ -1167,7 +1167,8 @@ scm_to_sockaddr (SCM address, size_t *address_size)
+ 	  {
+ 	    struct sockaddr_in6 c_inet6;
+ 
+-	    scm_to_ipv6 (c_inet6.sin6_addr.s6_addr, address);
++	    scm_to_ipv6 (c_inet6.sin6_addr.s6_addr,
++			 SCM_SIMPLE_VECTOR_REF (address, 1));
+ 	    c_inet6.sin6_port =
+ 	      htons (scm_to_ushort (SCM_SIMPLE_VECTOR_REF (address, 2)));
+ 	    c_inet6.sin6_flowinfo =
+diff --git a/libguile/srfi-4.c b/libguile/srfi-4.c
+index b0e052a..f2a9d7f 100644
+--- a/libguile/srfi-4.c
++++ b/libguile/srfi-4.c
+@@ -1,6 +1,6 @@
+ /* srfi-4.c --- Uniform numeric vector datatypes.
+  *
+- * 	Copyright (C) 2001, 2004, 2006 Free Software Foundation, Inc.
++ * 	Copyright (C) 2001, 2004, 2006, 2010 Free Software Foundation, Inc.
+  *
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -84,11 +84,7 @@ static const int uvec_sizes[12] = {
+   1, 1,
+   2, 2,
+   4, 4,
+-#if SCM_HAVE_T_INT64
+   8, 8,
+-#else
+-  sizeof (SCM), sizeof (SCM),
+-#endif
+   sizeof(float), sizeof(double),
+   2*sizeof(float), 2*sizeof(double)
+ };
+@@ -127,10 +123,8 @@ uvec_print (SCM uvec, SCM port, scm_print_state *pstate)
+     scm_t_int16 *s16;
+     scm_t_uint32 *u32;
+     scm_t_int32 *s32;
+-#if SCM_HAVE_T_INT64
+     scm_t_uint64 *u64;
+     scm_t_int64 *s64;
+-#endif
+     float *f32;
+     double *f64;
+     SCM *fake_64;
+@@ -148,13 +142,8 @@ uvec_print (SCM uvec, SCM port, scm_print_state *pstate)
+     case SCM_UVEC_S16: np.s16 = (scm_t_int16 *) uptr; break;
+     case SCM_UVEC_U32: np.u32 = (scm_t_uint32 *) uptr; break;
+     case SCM_UVEC_S32: np.s32 = (scm_t_int32 *) uptr; break;
+-#if SCM_HAVE_T_INT64
+     case SCM_UVEC_U64: np.u64 = (scm_t_uint64 *) uptr; break;
+     case SCM_UVEC_S64: np.s64 = (scm_t_int64 *) uptr; break;
+-#else
+-    case SCM_UVEC_U64:
+-    case SCM_UVEC_S64: np.fake_64 = (SCM *) uptr; break;
+-#endif      
+     case SCM_UVEC_F32: np.f32 = (float *) uptr; break;
+     case SCM_UVEC_F64: np.f64 = (double *) uptr; break;
+     case SCM_UVEC_C32: np.f32 = (float *) uptr; break;
+@@ -179,14 +168,8 @@ uvec_print (SCM uvec, SCM port, scm_print_state *pstate)
+ 	case SCM_UVEC_S16: scm_intprint (*np.s16, 10, port); np.s16++; break;
+ 	case SCM_UVEC_U32: scm_uintprint (*np.u32, 10, port); np.u32++; break;
+ 	case SCM_UVEC_S32: scm_intprint (*np.s32, 10, port); np.s32++; break;
+-#if SCM_HAVE_T_INT64
+ 	case SCM_UVEC_U64: scm_uintprint (*np.u64, 10, port); np.u64++; break;
+ 	case SCM_UVEC_S64: scm_intprint (*np.s64, 10, port); np.s64++; break;
+-#else
+-	case SCM_UVEC_U64:
+-	case SCM_UVEC_S64: scm_iprin1 (*np.fake_64, port, pstate);
+-	  np.fake_64++; break;
+-#endif
+ 	case SCM_UVEC_F32: scm_i_print_double (*np.f32, port); np.f32++; break;
+ 	case SCM_UVEC_F64: scm_i_print_double (*np.f64, port); np.f64++; break;
+ 	case SCM_UVEC_C32:
+@@ -222,20 +205,6 @@ uvec_equalp (SCM a, SCM b)
+     result = SCM_BOOL_F;
+   else if (SCM_UVEC_LENGTH (a) != SCM_UVEC_LENGTH (b))
+     result = SCM_BOOL_F;
+-#if SCM_HAVE_T_INT64 == 0
+-  else if (SCM_UVEC_TYPE (a) == SCM_UVEC_U64
+-	   || SCM_UVEC_TYPE (a) == SCM_UVEC_S64)
+-    {
+-      SCM *aptr = (SCM *)SCM_UVEC_BASE (a), *bptr = (SCM *)SCM_UVEC_BASE (b);
+-      size_t len = SCM_UVEC_LENGTH (a), i;
+-      for (i = 0; i < len; i++)
+-	if (scm_is_false (scm_num_eq_p (*aptr++, *bptr++)))
+-	  {
+-	    result = SCM_BOOL_F;
+-	    break;
+-	  }
+-    }
+-#endif
+   else if (memcmp (SCM_UVEC_BASE (a), SCM_UVEC_BASE (b),
+ 		   SCM_UVEC_LENGTH (a) * uvec_sizes[SCM_UVEC_TYPE(a)]) != 0)
+     result = SCM_BOOL_F;
+@@ -244,24 +213,6 @@ uvec_equalp (SCM a, SCM b)
+   return result;
+ }
+ 
+-/* Mark hook.  Only used when U64 and S64 are implemented as SCMs. */
+-
+-#if SCM_HAVE_T_INT64 == 0
+-static SCM
+-uvec_mark (SCM uvec)
+-{
+-  if (SCM_UVEC_TYPE (uvec) == SCM_UVEC_U64
+-      || SCM_UVEC_TYPE (uvec) == SCM_UVEC_S64)
+-    {
+-      SCM *ptr = (SCM *)SCM_UVEC_BASE (uvec);
+-      size_t len = SCM_UVEC_LENGTH (uvec), i;
+-      for (i = 0; i < len; i++)
+-	scm_gc_mark (*ptr++);
+-    }
+-  return SCM_BOOL_F;
+-}
+-#endif
+-
+ /* Smob free hook for uniform numeric vectors. */
+ static size_t
+ uvec_free (SCM uvec)
+@@ -318,15 +269,6 @@ alloc_uvec (int type, size_t len)
+   if (len > SCM_I_SIZE_MAX / uvec_sizes[type])
+     scm_out_of_range (NULL, scm_from_size_t (len));
+   base = scm_gc_malloc (len * uvec_sizes[type], uvec_names[type]);
+-#if SCM_HAVE_T_INT64 == 0
+-  if (type == SCM_UVEC_U64 || type == SCM_UVEC_S64)
+-    {
+-      SCM *ptr = (SCM *)base;
+-      size_t i;
+-      for (i = 0; i < len; i++)
+-	*ptr++ = SCM_UNSPECIFIED;
+-    }
+-#endif
+   return take_uvec (type, base, len);
+ }
+ 
+@@ -349,17 +291,10 @@ uvec_fast_ref (int type, const void *base, size_t c_idx)
+     return scm_from_uint32 (((scm_t_uint32*)base)[c_idx]);
+   else if (type == SCM_UVEC_S32)
+     return scm_from_int32 (((scm_t_int32*)base)[c_idx]);
+-#if SCM_HAVE_T_INT64
+   else if (type == SCM_UVEC_U64)
+     return scm_from_uint64 (((scm_t_uint64*)base)[c_idx]);
+   else if (type == SCM_UVEC_S64)
+     return scm_from_int64 (((scm_t_int64*)base)[c_idx]);
+-#else
+-  else if (type == SCM_UVEC_U64)
+-    return ((SCM *)base)[c_idx];
+-  else if (type == SCM_UVEC_S64)
+-    return ((SCM *)base)[c_idx];
+-#endif
+   else if (type == SCM_UVEC_F32)
+     return scm_from_double (((float*)base)[c_idx]);
+   else if (type == SCM_UVEC_F64)
+@@ -374,22 +309,6 @@ uvec_fast_ref (int type, const void *base, size_t c_idx)
+     return SCM_BOOL_F;
+ }
+ 
+-#if SCM_HAVE_T_INT64 == 0
+-static SCM scm_uint64_min, scm_uint64_max;
+-static SCM scm_int64_min, scm_int64_max;
+-
+-static void
+-assert_exact_integer_range (SCM val, SCM min, SCM max)
+-{
+-  if (!scm_is_integer (val)
+-      || scm_is_false (scm_exact_p (val)))
+-    scm_wrong_type_arg_msg (NULL, 0, val, "exact integer");
+-  if (scm_is_true (scm_less_p (val, min))
+-      || scm_is_true (scm_gr_p (val, max)))
+-    scm_out_of_range (NULL, val);
+-}
+-#endif
+-
+ static SCM_C_INLINE_KEYWORD void
+ uvec_fast_set_x (int type, void *base, size_t c_idx, SCM val)
+ {
+@@ -405,23 +324,10 @@ uvec_fast_set_x (int type, void *base, size_t c_idx, SCM val)
+     (((scm_t_uint32*)base)[c_idx]) = scm_to_uint32 (val);
+   else if (type == SCM_UVEC_S32)
+     (((scm_t_int32*)base)[c_idx]) = scm_to_int32 (val);
+-#if SCM_HAVE_T_INT64
+   else if (type == SCM_UVEC_U64)
+     (((scm_t_uint64*)base)[c_idx]) = scm_to_uint64 (val);
+   else if (type == SCM_UVEC_S64)
+     (((scm_t_int64*)base)[c_idx]) = scm_to_int64 (val);
+-#else
+-  else if (type == SCM_UVEC_U64)
+-    {
+-      assert_exact_integer_range (val, scm_uint64_min, scm_uint64_max);
+-      ((SCM *)base)[c_idx] = val;
+-    }
+-  else if (type == SCM_UVEC_S64)
+-    {
+-      assert_exact_integer_range (val, scm_int64_min, scm_int64_max);
+-      ((SCM *)base)[c_idx] = val;
+-    }
+-#endif
+   else if (type == SCM_UVEC_F32)
+     (((float*)base)[c_idx]) = scm_to_double (val);
+   else if (type == SCM_UVEC_F64)
+@@ -1027,16 +933,12 @@ SCM_DEFINE (scm_uniform_vector_write, "uniform-vector-write", 1, 3, 0,
+ 
+ #define TYPE  SCM_UVEC_U64
+ #define TAG   u64
+-#if SCM_HAVE_T_UINT64
+ #define CTYPE scm_t_uint64
+-#endif
+ #include "libguile/srfi-4.i.c"
+ 
+ #define TYPE  SCM_UVEC_S64
+ #define TAG   s64
+-#if SCM_HAVE_T_INT64
+ #define CTYPE scm_t_int64
+-#endif
+ #include "libguile/srfi-4.i.c"
+ 
+ #define TYPE  SCM_UVEC_F32
+@@ -1094,23 +996,9 @@ scm_init_srfi_4 (void)
+ {
+   scm_tc16_uvec = scm_make_smob_type ("uvec", 0);
+   scm_set_smob_equalp (scm_tc16_uvec, uvec_equalp);
+-#if SCM_HAVE_T_INT64 == 0
+-  scm_set_smob_mark (scm_tc16_uvec, uvec_mark);
+-#endif
+   scm_set_smob_free (scm_tc16_uvec, uvec_free);
+   scm_set_smob_print (scm_tc16_uvec, uvec_print);
+ 
+-#if SCM_HAVE_T_INT64 == 0
+-  scm_uint64_min =
+-    scm_permanent_object (scm_from_int (0));
+-  scm_uint64_max =
+-    scm_permanent_object (scm_c_read_string ("18446744073709551615"));
+-  scm_int64_min =
+-    scm_permanent_object (scm_c_read_string ("-9223372036854775808"));
+-  scm_int64_max =
+-    scm_permanent_object (scm_c_read_string ("9223372036854775807"));
+-#endif
+-
+ #include "libguile/srfi-4.x"
+ 
+ }
+diff --git a/libguile/srfi-4.h b/libguile/srfi-4.h
+index 7abbac8..2348c5a 100644
+--- a/libguile/srfi-4.h
++++ b/libguile/srfi-4.h
+@@ -2,7 +2,7 @@
+ #define SCM_SRFI_4_H
+ /* srfi-4.c --- Homogeneous numeric vector datatypes.
+  *
+- * 	Copyright (C) 2001, 2004, 2006 Free Software Foundation, Inc.
++ * 	Copyright (C) 2001, 2004, 2006, 2010 Free Software Foundation, Inc.
+  * 
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -186,7 +186,6 @@ SCM_API SCM scm_u64vector_to_list (SCM uvec);
+ SCM_API SCM scm_list_to_u64vector (SCM l);
+ SCM_API SCM scm_any_to_u64vector (SCM obj);
+ 
+-#if SCM_HAVE_T_UINT64
+ SCM_API SCM scm_take_u64vector (scm_t_uint64 *data, size_t n);
+ SCM_API const scm_t_uint64 *scm_array_handle_u64_elements (scm_t_array_handle *h);
+ SCM_API scm_t_uint64 *scm_array_handle_u64_writable_elements (scm_t_array_handle *h);
+@@ -198,7 +197,6 @@ SCM_API scm_t_uint64 *scm_u64vector_writable_elements (SCM uvec,
+ 						       scm_t_array_handle *h,
+ 						       size_t *lenp,
+ 						       ssize_t *incp);
+-#endif
+ 
+ SCM_API SCM scm_s64vector_p (SCM obj);
+ SCM_API SCM scm_make_s64vector (SCM n, SCM fill);
+@@ -210,7 +208,6 @@ SCM_API SCM scm_s64vector_to_list (SCM uvec);
+ SCM_API SCM scm_list_to_s64vector (SCM l);
+ SCM_API SCM scm_any_to_s64vector (SCM obj);
+ 
+-#if SCM_HAVE_T_INT64
+ SCM_API SCM scm_take_s64vector (scm_t_int64 *data, size_t n);
+ SCM_API const scm_t_int64 *scm_array_handle_s64_elements (scm_t_array_handle *h);
+ SCM_API scm_t_int64 *scm_array_handle_s64_writable_elements (scm_t_array_handle *h);
+@@ -221,7 +218,6 @@ SCM_API scm_t_int64 *scm_s64vector_writable_elements (SCM uvec,
+ 						      scm_t_array_handle *h,
+ 						      size_t *lenp,
+ 						      ssize_t *incp);
+-#endif
+ 
+ SCM_API SCM scm_f32vector_p (SCM obj);
+ SCM_API SCM scm_make_f32vector (SCM n, SCM fill);
+diff --git a/libguile/threads.c b/libguile/threads.c
+index 95a905c..f2bb556 100644
+--- a/libguile/threads.c
++++ b/libguile/threads.c
+@@ -276,7 +276,7 @@ unblock_from_queue (SCM queue)
+       var 't'
+       // save registers.
+       SCM_FLUSH_REGISTER_WINDOWS;      // sparc only
+-      setjmp (t->regs);                // here's most of the magic
++      SCM_I_SETJMP (t->regs);          // here's most of the magic
+ 
+    ... and returns.
+ 
+@@ -330,7 +330,7 @@ unblock_from_queue (SCM queue)
+       t->top = SCM_STACK_PTR (&t);
+       // save registers.
+       SCM_FLUSH_REGISTER_WINDOWS;
+-      setjmp (t->regs);
++      SCM_I_SETJMP (t->regs);
+       res = func(data);
+       scm_enter_guile (t);
+ 
+@@ -388,7 +388,7 @@ suspend (void)
+   t->top = SCM_STACK_PTR (&t);
+   /* save registers. */
+   SCM_FLUSH_REGISTER_WINDOWS;
+-  setjmp (t->regs);
++  SCM_I_SETJMP (t->regs);
+   return t;
+ }
+ 
+diff --git a/libguile/threads.h b/libguile/threads.h
+index 2b0e067..e22d9bd 100644
+--- a/libguile/threads.h
++++ b/libguile/threads.h
+@@ -107,7 +107,7 @@ typedef struct scm_i_thread {
+   /* For keeping track of the stack and registers. */
+   SCM_STACKITEM *base;
+   SCM_STACKITEM *top;
+-  jmp_buf regs;
++  scm_i_jmp_buf regs;
+ #ifdef __ia64__
+   void *register_backing_store_base;
+   scm_t_contregs *pending_rbs_continuation;
+diff --git a/libguile/throw.c b/libguile/throw.c
+index 92c5a1a..fcfde47 100644
+--- a/libguile/throw.c
++++ b/libguile/throw.c
+@@ -53,7 +53,7 @@ static scm_t_bits tc16_jmpbuffer;
+ #define DEACTIVATEJB(x) \
+   (SCM_SET_CELL_WORD_0 ((x), (SCM_CELL_WORD_0 (x) & ~(1L << 16L))))
+ 
+-#define JBJMPBUF(OBJ)           ((jmp_buf *) SCM_CELL_WORD_1 (OBJ))
++#define JBJMPBUF(OBJ)           ((scm_i_jmp_buf *) SCM_CELL_WORD_1 (OBJ))
+ #define SETJBJMPBUF(x, v)        (SCM_SET_CELL_WORD_1 ((x), (scm_t_bits) (v)))
+ #define SCM_JBDFRAME(x)         ((scm_t_debug_frame *) SCM_CELL_WORD_2 (x))
+ #define SCM_SETJBDFRAME(x, v)    (SCM_SET_CELL_WORD_2 ((x), (scm_t_bits) (v)))
+@@ -75,7 +75,7 @@ make_jmpbuf (void)
+ {
+   SCM answer;
+   SCM_NEWSMOB2 (answer, tc16_jmpbuffer, 0, 0);
+-  SETJBJMPBUF(answer, (jmp_buf *)0);
++  SETJBJMPBUF(answer, (scm_i_jmp_buf *)0);
+   DEACTIVATEJB(answer);
+   return answer;
+ }
+@@ -85,7 +85,7 @@ make_jmpbuf (void)
+ 
+ struct jmp_buf_and_retval	/* use only on the stack, in scm_catch */
+ {
+-  jmp_buf buf;			/* must be first */
++  scm_i_jmp_buf buf;		/* must be first */
+   SCM throw_tag;
+   SCM retval;
+ };
+@@ -179,7 +179,7 @@ scm_c_catch (SCM tag,
+   pre_unwind.lazy_catch_p = 0;
+   SCM_SETJBPREUNWIND(jmpbuf, &pre_unwind);
+ 
+-  if (setjmp (jbr.buf))
++  if (SCM_I_SETJMP (jbr.buf))
+     {
+       SCM throw_tag;
+       SCM throw_args;
+@@ -821,7 +821,7 @@ scm_ithrow (SCM key, SCM args, int noreturn SCM_UNUSED)
+       jbr->throw_tag = key;
+       jbr->retval = args;
+       scm_i_set_last_debug_frame (SCM_JBDFRAME (jmpbuf));
+-      longjmp (*JBJMPBUF (jmpbuf), 1);
++      SCM_I_LONGJMP (*JBJMPBUF (jmpbuf), 1);
+     }
+ 
+   /* Otherwise, it's some random piece of junk.  */
+diff --git a/libguile/vectors.c b/libguile/vectors.c
+index eeb8569..074655c 100644
+--- a/libguile/vectors.c
++++ b/libguile/vectors.c
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1995,1996,1998,1999,2000,2001, 2006, 2008 Free Software Foundation, Inc.
++/* Copyright (C) 1995,1996,1998,1999,2000,2001, 2006, 2008, 2010 Free Software Foundation, Inc.
+  * 
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -465,7 +465,9 @@ SCM_DEFINE (scm_vector_move_left_x, "vector-move-left!", 5, 0, 0,
+ 
+   i = scm_to_unsigned_integer (start1, 0, len1);
+   e = scm_to_unsigned_integer (end1, i, len1);
+-  j = scm_to_unsigned_integer (start2, 0, len2 - (i-e));
++  SCM_ASSERT_RANGE (SCM_ARG3, end1, (e-i) < len2);
++  j = scm_to_unsigned_integer (start2, 0, len2);
++  SCM_ASSERT_RANGE (SCM_ARG5, start2, j <= len2 - (e - i));
+   
+   i *= inc1;
+   e *= inc1;
+@@ -503,7 +505,11 @@ SCM_DEFINE (scm_vector_move_right_x, "vector-move-right!", 5, 0, 0,
+ 
+   i = scm_to_unsigned_integer (start1, 0, len1);
+   e = scm_to_unsigned_integer (end1, i, len1);
+-  j = scm_to_unsigned_integer (start2, 0, len2 - (i-e));
++  SCM_ASSERT_RANGE (SCM_ARG3, end1, (e-i) < len2);
++  j = scm_to_unsigned_integer (start2, 0, len2);
++  SCM_ASSERT_RANGE (SCM_ARG5, start2, j <= len2 - (e - i));
++  
++  j += (e - i);
+   
+   i *= inc1;
+   e *= inc1;
+diff --git a/scripts/snarf-check-and-output-texi b/scripts/snarf-check-and-output-texi
+index ea33e17..8cd42e8 100755
+--- a/scripts/snarf-check-and-output-texi
++++ b/scripts/snarf-check-and-output-texi
+@@ -267,6 +267,17 @@ exec ${GUILE-guile} -l $0 -c "(apply $main (cdr (command-line)))" "$@"
+       (set! *file* file)
+       (set! *line* line))
+ 
++     ;; newer gccs like to throw around more location markers into the
++     ;; preprocessed source; these (hash . hash) bits are what they translate to
++     ;; in snarfy terms.
++     (('location ('string . file) ('int . line) ('hash . 'hash))
++      (set! *file* file)
++      (set! *line* line))
++
++     (('location ('hash . 'hash) ('string . file) ('int . line) ('hash . 'hash))
++      (set! *file* file)
++      (set! *line* line))
++
+      (('arglist rest ...)
+       (set! *args* (do-arglist rest)))
+ 
+diff --git a/srfi/srfi-19.scm b/srfi/srfi-19.scm
+index ffce990..482ec4e 100644
+--- a/srfi/srfi-19.scm
++++ b/srfi/srfi-19.scm
+@@ -1,6 +1,6 @@
+ ;;; srfi-19.scm --- Time/Date Library
+ 
+-;; 	Copyright (C) 2001, 2002, 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
++;; 	Copyright (C) 2001, 2002, 2003, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ ;;
+ ;; This library is free software; you can redistribute it and/or
+ ;; modify it under the terms of the GNU Lesser General Public
+@@ -41,7 +41,8 @@
+ (define-module (srfi srfi-19)
+   :use-module (srfi srfi-6)
+   :use-module (srfi srfi-8)
+-  :use-module (srfi srfi-9))
++  :use-module (srfi srfi-9)
++  :autoload   (ice-9 rdelim) (read-line))
+ 
+ (begin-deprecated
+  ;; Prevent `export' from re-exporting core bindings.  This behaviour
+@@ -339,7 +340,7 @@
+     (set-tm:hour result (date-hour date))
+     ;; FIXME: SRFI day ranges from 0-31.  (not compatible with set-tm:mday).
+     (set-tm:mday result (date-day date))
+-    (set-tm:month result (- (date-month date) 1))
++    (set-tm:mon result (- (date-month date) 1))
+     ;; FIXME: need to signal error on range violation.
+     (set-tm:year result (+ 1900 (date-year date)))
+     (set-tm:isdst result -1)
+@@ -528,33 +529,38 @@
+ ;; -- these depend on time-monotonic having the same definition as time-tai!
+ (define (time-monotonic->time-utc time-in)
+   (if (not (eq? (time-type time-in) time-monotonic))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-monotonic->time-utc
++                       'incompatible-time-types time-in))
+   (let ((ntime (copy-time time-in)))
+     (set-time-type! ntime time-tai)
+     (priv:time-tai->time-utc! ntime ntime 'time-monotonic->time-utc)))
+ 
+ (define (time-monotonic->time-utc! time-in)
+   (if (not (eq? (time-type time-in) time-monotonic))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-monotonic->time-utc!
++                       'incompatible-time-types time-in))
+   (set-time-type! time-in time-tai)
+-  (priv:time-tai->time-utc! ntime ntime 'time-monotonic->time-utc))
++  (priv:time-tai->time-utc! time-in time-in 'time-monotonic->time-utc))
+ 
+ (define (time-monotonic->time-tai time-in)
+   (if (not (eq? (time-type time-in) time-monotonic))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-monotonic->time-tai
++                       'incompatible-time-types time-in))
+   (let ((ntime (copy-time time-in)))
+     (set-time-type! ntime time-tai)
+     ntime))
+ 
+ (define (time-monotonic->time-tai! time-in)
+   (if (not (eq? (time-type time-in) time-monotonic))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-monotonic->time-tai!
++                       'incompatible-time-types time-in))
+   (set-time-type! time-in time-tai)
+   time-in)
+ 
+ (define (time-utc->time-monotonic time-in)
+   (if (not (eq? (time-type time-in) time-utc))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-utc->time-monotonic
++                       'incompatible-time-types time-in))
+   (let ((ntime (priv:time-utc->time-tai! time-in (make-time-unnormalized #f #f #f)
+                                          'time-utc->time-monotonic)))
+     (set-time-type! ntime time-monotonic)
+@@ -562,7 +568,8 @@
+ 
+ (define (time-utc->time-monotonic! time-in)
+   (if (not (eq? (time-type time-in) time-utc))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-utc->time-monotonic!
++                       'incompatible-time-types time-in))
+   (let ((ntime (priv:time-utc->time-tai! time-in time-in
+                                          'time-utc->time-monotonic!)))
+     (set-time-type! ntime time-monotonic)
+@@ -570,14 +577,16 @@
+ 
+ (define (time-tai->time-monotonic time-in)
+   (if (not (eq? (time-type time-in) time-tai))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-tai->time-monotonic
++                       'incompatible-time-types time-in))
+   (let ((ntime (copy-time time-in)))
+     (set-time-type! ntime time-monotonic)
+     ntime))
+ 
+ (define (time-tai->time-monotonic! time-in)
+   (if (not (eq? (time-type time-in) time-tai))
+-      (priv:time-error caller 'incompatible-time-types time-in))
++      (priv:time-error 'time-tai->time-monotonic!
++                       'incompatible-time-types time-in))
+   (set-time-type! time-in time-monotonic)
+   time-in)
+ 
+@@ -780,7 +789,7 @@
+ (define (priv:year-day day month year)
+   (let ((days-pr (assoc month priv:month-assoc)))
+     (if (not days-pr)
+-        (priv:error 'date-year-day 'invalid-month-specification month))
++        (priv:time-error 'date-year-day 'invalid-month-specification month))
+     (if (and (priv:leap-year? year) (> month 2))
+         (+ day (cdr days-pr) 1)
+         (+ day (cdr days-pr)))))
+@@ -1263,7 +1272,7 @@
+    ((#\8) 8)
+    ((#\9) 9)
+    (else (priv:time-error 'bad-date-template-string
+-                          (list "Non-integer character" ch i)))))
++                          (list "Non-integer character" ch)))))
+ 
+ ;; read an integer upto n characters long on port; upto -> #f is any length
+ (define (priv:integer-reader upto port)
+diff --git a/srfi/srfi-35.scm b/srfi/srfi-35.scm
+index 2035466..ee20a10 100644
+--- a/srfi/srfi-35.scm
++++ b/srfi/srfi-35.scm
+@@ -57,6 +57,19 @@
+ 				    (number->string (object-address ct)
+ 						    16))))))
+ 
++(define (%make-condition-type layout id parent all-fields)
++  (let ((struct (make-struct %condition-type-vtable 0
++                             (make-struct-layout layout) ;; layout
++                             print-condition             ;; printer
++                             id parent all-fields)))
++
++    ;; Hack to associate STRUCT with a name, providing a better name for
++    ;; GOOPS classes as returned by `class-of' et al.
++    (set-struct-vtable-name! struct (cond ((symbol? id) id)
++                                          ((string? id) (string->symbol id))
++                                          (else         (string->symbol ""))))
++    struct))
++
+ (define (condition-type? obj)
+   "Return true if OBJ is a condition type."
+   (and (struct? obj)
+@@ -104,10 +117,8 @@ supertypes."
+ 					       field-names parent-fields)))
+ 		(let* ((all-fields (append parent-fields field-names))
+ 		       (layout     (struct-layout-for-condition all-fields)))
+-		  (make-struct %condition-type-vtable 0
+-			       (make-struct-layout layout) ;; layout
+-			       print-condition             ;; printer
+-			       id parent all-fields))
++		  (%make-condition-type layout
++                                        id parent all-fields))
+ 		(error "invalid condition type field names"
+ 		       field-names)))
+ 	  (error "parent is not a condition type" parent))
+@@ -126,13 +137,10 @@ supertypes."
+          (let* ((all-fields (append-map condition-type-all-fields
+                                         parents))
+                 (layout     (struct-layout-for-condition all-fields)))
+-           (make-struct %condition-type-vtable 0
+-                        (make-struct-layout layout) ;; layout
+-                        print-condition             ;; printer
+-                        id
+-                        parents                     ;; list of parents!
+-                        all-fields
+-                        all-fields)))))
++           (%make-condition-type layout
++                                 id
++                                 parents         ;; list of parents!
++                                 all-fields)))))
+ 
+ 
+ ;;;
+diff --git a/test-suite/standalone/Makefile.am b/test-suite/standalone/Makefile.am
+index e7cfd82..058ce93 100644
+--- a/test-suite/standalone/Makefile.am
++++ b/test-suite/standalone/Makefile.am
+@@ -28,7 +28,9 @@ check_SCRIPTS =
+ BUILT_SOURCES =
+ EXTRA_DIST =
+ 
+-TESTS_ENVIRONMENT = "${top_builddir}/pre-inst-guile-env"
++TESTS_ENVIRONMENT = 						\
++  builddir="$(builddir)"					\
++  "${top_builddir}/pre-inst-guile-env"
+ 
+ test_cflags =					\
+   -I$(top_srcdir)/test-suite/standalone		\
+diff --git a/test-suite/standalone/test-asmobs b/test-suite/standalone/test-asmobs
+index 2ea75d9..9689ab9 100755
+--- a/test-suite/standalone/test-asmobs
++++ b/test-suite/standalone/test-asmobs
+@@ -2,7 +2,8 @@
+ exec guile -q -s "$0" "$@"
+ !#
+ 
+-(load-extension "libtest-asmobs" "libtest_asmobs_init")
++(load-extension (string-append (getenv "builddir") "/libtest-asmobs")
++                "libtest_asmobs_init")
+ 
+ (define (test x v)
+   (if v
+diff --git a/test-suite/standalone/test-conversion.c b/test-suite/standalone/test-conversion.c
+index 41f99d3..caa835d 100644
+--- a/test-suite/standalone/test-conversion.c
++++ b/test-suite/standalone/test-conversion.c
+@@ -1,4 +1,4 @@
+-/* Copyright (C) 1999,2000,2001,2003,2004, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
++/* Copyright (C) 1999,2000,2001,2003,2004, 2006, 2007, 2008, 2009, 2010 Free Software Foundation, Inc.
+  *
+  * This library is free software; you can redistribute it and/or
+  * modify it under the terms of the GNU Lesser General Public
+@@ -702,10 +702,8 @@ DEFSTST (scm_to_int16)
+ DEFUTST (scm_to_uint16)
+ DEFSTST (scm_to_int32)
+ DEFUTST (scm_to_uint32)
+-#ifdef SCM_HAVE_T_INT64
+ DEFSTST (scm_to_int64)
+ DEFUTST (scm_to_uint64)
+-#endif
+ 
+ #define TEST_8S(v,f,r,re,te) test_8s (v, tst_##f, #f, r, re, te)
+ #define TEST_8U(v,f,r,re,te) test_8u (v, tst_##f, #f, r, re, te)
+@@ -745,11 +743,9 @@ test_int_sizes ()
+   TEST_7S (scm_from_int32,  SCM_T_INT32_MAX+1LL, "-2147483648");
+   TEST_7U (scm_from_uint32, SCM_T_UINT32_MAX,     "4294967295");
+ 
+-#if SCM_HAVE_T_INT64
+   TEST_7S (scm_from_int64,  SCM_T_INT64_MIN,  "-9223372036854775808");
+   TEST_7S (scm_from_int64,  SCM_T_INT64_MAX,   "9223372036854775807");
+   TEST_7U (scm_from_uint64, SCM_T_UINT64_MAX, "18446744073709551615");
+-#endif
+ 
+   TEST_8S ("91",   scm_to_schar,   91, 0, 0);
+   TEST_8U ("91",   scm_to_uchar,   91, 0, 0);
+@@ -794,7 +790,6 @@ test_int_sizes ()
+   TEST_8U ("-1",          scm_to_uint32,                0, 1, 0);
+   TEST_8U ("#f",          scm_to_uint32,                0, 0, 1);
+ 
+-#if SCM_HAVE_T_INT64
+   TEST_8S ("-9223372036854775808", scm_to_int64,   SCM_T_INT64_MIN, 0, 0);
+   TEST_8S ("9223372036854775807",  scm_to_int64,   SCM_T_INT64_MAX, 0, 0);
+   TEST_8S ("9223372036854775808",  scm_to_int64,                 0, 1, 0);
+@@ -803,7 +798,6 @@ test_int_sizes ()
+   TEST_8U ("18446744073709551616", scm_to_uint64,                0, 1, 0);
+   TEST_8U ("-1",                   scm_to_uint64,                0, 1, 0);
+   TEST_8U ("#f",                   scm_to_uint64,                0, 0, 1);
+-#endif
+ 
+ }
+ 
+diff --git a/test-suite/tests/goops.test b/test-suite/tests/goops.test
+index fa53fd2..fb2535a 100644
+--- a/test-suite/tests/goops.test
++++ b/test-suite/tests/goops.test
+@@ -140,7 +140,12 @@
+     (eq? (class-of "foo") <string>))
+ 
+   (pass-if "port"
+-    (is-a? (%make-void-port "w") <port>)))
++    (is-a? (%make-void-port "w") <port>))
++
++  (pass-if "struct vtable"
++    ;; Previously, `class-of' would fail for nameless structs, i.e., structs
++    ;; for which `struct-vtable-name' is #f.
++    (is-a? (class-of (make-vtable-vtable "prprpr" 0)) <class>)))
+ 
+ 
+ (with-test-prefix "defining classes"
+diff --git a/test-suite/tests/socket.test b/test-suite/tests/socket.test
+index 4bfc415..e73f585 100644
+--- a/test-suite/tests/socket.test
++++ b/test-suite/tests/socket.test
+@@ -1,6 +1,6 @@
+ ;;;; socket.test --- test socket functions     -*- scheme -*-
+ ;;;;
+-;;;; Copyright (C) 2004, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
++;;;; Copyright (C) 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+ ;;;;
+ ;;;; This library is free software; you can redistribute it and/or
+ ;;;; modify it under the terms of the GNU Lesser General Public
+@@ -174,13 +174,28 @@
+ ;;; AF_UNIX sockets and `make-socket-address'
+ ;;;
+ 
++(define %tmpdir
++  ;; Honor `$TMPDIR', which tmpnam(3) doesn't do.
++  (or (getenv "TMPDIR") "/tmp"))
++
++(define %curdir
++  ;; Remember the current working directory.
++  (getcwd))
++
++;; Temporarily cd to %TMPDIR.  The goal is to work around path name
++;; limitations, which can lead to exceptions like:
++;;
++;;  (misc-error "scm_to_sockaddr"
++;;              "unix address path too long: ~A"
++;;              ("/tmp/nix-build-fb7bph4ifh0vr3ihigm702dzffdnapfj-guile-coverage-1.9.5.drv-0/guile-test-socket-1258553296-77619")
++;;              #f)
++(chdir %tmpdir)
++
+ (define (temp-file-path)
+-  ;; Return a temporary file path that honors `$TMPDIR', which `tmpnam'
+-  ;; doesn't do.
+-  (let ((dir (or (getenv "TMPDIR") "/tmp")))
+-    (string-append dir "/guile-test-socket-"
+-                   (number->string (current-time)) "-"
+-                   (number->string (random 100000)))))
++  ;; Return a temporary file name, assuming the current directory is %TMPDIR.
++  (string-append "guile-test-socket-"
++                 (number->string (current-time)) "-"
++                 (number->string (random 100000))))
+ 
+ 
+ (if (defined? 'AF_UNIX)
+@@ -320,3 +335,91 @@
+ 
+ 	#t)))
+ 
++
++(if (defined? 'AF_INET6)
++    (with-test-prefix "AF_INET6/SOCK_STREAM"
++
++      ;; testing `bind', `listen' and `connect' on stream-oriented sockets
++
++      (let ((server-socket (socket AF_INET6 SOCK_STREAM 0))
++	    (server-bound? #f)
++	    (server-listening? #f)
++	    (server-pid #f)
++	    (ipv6-addr 1)		; ::1
++	    (server-port 8889)
++	    (client-port 9998))
++
++	(pass-if "bind"
++	  (catch 'system-error
++	    (lambda ()
++	      (bind server-socket AF_INET6 ipv6-addr server-port)
++	      (set! server-bound? #t)
++	      #t)
++	    (lambda args
++	      (let ((errno (system-error-errno args)))
++		(cond ((= errno EADDRINUSE) (throw 'unresolved))
++		      (else (apply throw args)))))))
++
++	(pass-if "bind/sockaddr"
++	  (let* ((sock (socket AF_INET6 SOCK_STREAM 0))
++		 (sockaddr (make-socket-address AF_INET6 ipv6-addr client-port)))
++	    (catch 'system-error
++	      (lambda ()
++		(bind sock sockaddr)
++		#t)
++	      (lambda args
++		(let ((errno (system-error-errno args)))
++		  (cond ((= errno EADDRINUSE) (throw 'unresolved))
++			(else (apply throw args))))))))
++
++	(pass-if "listen"
++	  (if (not server-bound?)
++	      (throw 'unresolved)
++	      (begin
++		(listen server-socket 123)
++		(set! server-listening? #t)
++		#t)))
++
++	(if server-listening?
++	    (let ((pid (primitive-fork)))
++	      ;; Spawn a server process.
++	      (case pid
++		((-1) (throw 'unresolved))
++		((0)   ;; the kid:  serve two connections and exit
++		 (let serve ((conn
++			      (false-if-exception (accept server-socket)))
++			     (count 1))
++		   (if (not conn)
++		       (exit 1)
++		       (if (> count 0)
++			   (serve (false-if-exception (accept server-socket))
++				  (- count 1)))))
++		 (exit 0))
++		(else  ;; the parent
++		 (set! server-pid pid)
++		 #t))))
++
++	(pass-if "connect"
++	  (if (not server-pid)
++	      (throw 'unresolved)
++	      (let ((s (socket AF_INET6 SOCK_STREAM 0)))
++		(connect s AF_INET6 ipv6-addr server-port)
++		#t)))
++
++	(pass-if "connect/sockaddr"
++	  (if (not server-pid)
++	      (throw 'unresolved)
++	      (let ((s (socket AF_INET6 SOCK_STREAM 0)))
++		(connect s (make-socket-address AF_INET6 ipv6-addr server-port))
++		#t)))
++
++	(pass-if "accept"
++	  (if (not server-pid)
++	      (throw 'unresolved)
++	      (let ((status (cdr (waitpid server-pid))))
++		(eq? 0 (status:exit-val status)))))
++
++	#t)))
++
++;; Switch back to the previous directory.
++(false-if-exception (chdir %curdir))
diff --git a/meta-oe/recipes-support/guile/guile-native.inc b/meta-oe/recipes-support/guile/guile-native.inc
new file mode 100644
index 0000000000..831e088134
--- /dev/null
+++ b/meta-oe/recipes-support/guile/guile-native.inc
@@ -0,0 +1,12 @@
+SECTION = "unknown"
+LICENSE = "GPL"
+DEPENDS = "gettext-native gmp-native"
+
+inherit autotools native
+
+S="${WORKDIR}/guile-${PV}"
+
+do_configure_append() {
+        find ${S} -name Makefile | xargs sed -i s:'-Werror':'':g
+}
+
diff --git a/meta-oe/recipes-support/guile/guile-native_1.8.7.bb b/meta-oe/recipes-support/guile/guile-native_1.8.7.bb
new file mode 100644
index 0000000000..aa4fbb0394
--- /dev/null
+++ b/meta-oe/recipes-support/guile/guile-native_1.8.7.bb
@@ -0,0 +1,8 @@
+require guile-native.inc
+SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \
+           file://configure-fix.patch \
+           file://cpp-linemarkers.patch \
+          "
+
+SRC_URI[md5sum] = "991b5b3efcbbc3f7507d05bc42f80a5e"
+SRC_URI[sha256sum] = "bfee6339d91955a637e7f541d96f5b1d53271b42bb4a37b8867d186a6c66f0b3"
diff --git a/meta-oe/recipes-support/guile/guile.inc b/meta-oe/recipes-support/guile/guile.inc
new file mode 100644
index 0000000000..f015965902
--- /dev/null
+++ b/meta-oe/recipes-support/guile/guile.inc
@@ -0,0 +1,46 @@
+DESCRIPTION = "Guile is an interpreter for the Scheme programming language, \
+packaged as a library which can be incorporated into your programs."
+HOMEPAGE = "http://www.gnu.org/software/guile/guile.html"
+SECTION = "devel/scheme"
+DEPENDS = "guile-native gmp libtool"
+LICENSE = "GPL"
+PACKAGES =+ "${PN}-el"
+FILES_${PN}-el = "${datadir}/emacs"
+DESCRIPTION_${PN}-el = "Emacs lisp files for Guile"
+
+inherit autotools
+
+acpaths = "-I ${S}/guile-config"
+
+EXTRA_OECONF = " \
+		--without-threads \
+		--without-included-ltdl \
+               "		
+
+do_compile() {
+	for i in $(find ${S} -name "Makefile") ; do
+		sed -i -e s:-Werror::g $i
+	done
+
+	(cd libguile; oe_runmake CC="${BUILD_CC}" CFLAGS="${BUILD_CFLAGS}" LDFLAGS="${BUILD_LDFLAGS}" guile_filter_doc_snarfage)
+	oe_runmake preinstguile="`which guile`"
+        
+        sed -i -e s:${STAGING_DIR_TARGET}::g \
+               -e s:/${TARGET_SYS}::g \
+               -e s:-L/usr/lib::g \
+               -e s:-isystem/usr/include::g \
+               -e s:,/usr/lib:,\$\{libdir\}:g \
+                  guile-1.8.pc
+}
+
+SYSROOT_PREPROCESS_FUNCS = "guile_cross_config"
+
+guile_cross_config() {
+	# Create guile-config returning target values instead of native values
+	install -d ${SYSROOT_DESTDIR}${STAGING_BINDIR_CROSS}
+	echo '#!'`which guile`$' \\\n-e main -s\n!#\n(define %guile-build-info '\'\( >guile-config.cross
+	sed -n $'s:-isystem[^ ]* ::;s:-Wl,-rpath-link,[^ ]* ::;s:^[ \t]*{[ \t]*":  (:;s:",[ \t]*": . ":;s:" *}, *\\\\:"):;/^  (/p' <libguile/libpath.h >>guile-config.cross
+	echo '))' >>guile-config.cross
+	cat guile-config/guile-config >>guile-config.cross
+	install guile-config.cross ${SYSROOT_DESTDIR}${STAGING_BINDIR_CROSS}/guile-config
+}
diff --git a/meta-oe/recipes-support/guile/guile_1.8.7.bb b/meta-oe/recipes-support/guile/guile_1.8.7.bb
new file mode 100644
index 0000000000..8b3a80d91d
--- /dev/null
+++ b/meta-oe/recipes-support/guile/guile_1.8.7.bb
@@ -0,0 +1,12 @@
+require guile.inc
+
+PR = "r1"
+
+SRC_URI = "http://ftp.gnu.org/pub/gnu/guile/guile-${PV}.tar.gz \
+           file://configure-fix.patch \
+           file://18.diff \
+          "
+
+
+SRC_URI[md5sum] = "991b5b3efcbbc3f7507d05bc42f80a5e"
+SRC_URI[sha256sum] = "bfee6339d91955a637e7f541d96f5b1d53271b42bb4a37b8867d186a6c66f0b3"
diff --git a/meta-oe/recipes-support/htop/htop/remove-proc-test.patch b/meta-oe/recipes-support/htop/htop/remove-proc-test.patch
new file mode 100644
index 0000000000..3185fdd1f4
--- /dev/null
+++ b/meta-oe/recipes-support/htop/htop/remove-proc-test.patch
@@ -0,0 +1,13 @@
+--- htop-0.6.6/configure.ac	2007-05-21 13:06:15.000000000 -0500
++++ htop-0.6.6-cross/configure.ac	2007-11-16 14:12:16.000000000 -0600
+@@ -58,8 +58,8 @@
+    fi,
+    AC_DEFINE(PROCDIR, "/proc", [Path of proc filesystem]))
+ 
+-AC_CHECK_FILE($PROCDIR/stat,,AC_MSG_ERROR(Cannot find /proc/stat. Make sure you have a Linux-compatible /proc filesystem mounted. See the file README for help.))
+-AC_CHECK_FILE($PROCDIR/meminfo,,AC_MSG_ERROR(Cannot find /proc/meminfo. Make sure you have a Linux-compatible /proc filesystem mounted. See the file README for help.))
++#AC_CHECK_FILE($PROCDIR/stat,,AC_MSG_ERROR(Cannot find /proc/stat. Make sure you have a Linux-compatible /proc filesystem mounted. See the file README for help.))
++#AC_CHECK_FILE($PROCDIR/meminfo,,AC_MSG_ERROR(Cannot find /proc/meminfo. Make sure you have a Linux-compatible /proc filesystem mounted. See the file README for help.))
+ 
+ AC_CONFIG_FILES([Makefile])
+ AC_OUTPUT
diff --git a/meta-oe/recipes-support/htop/htop_0.9.bb b/meta-oe/recipes-support/htop/htop_0.9.bb
new file mode 100644
index 0000000000..eb207aabe6
--- /dev/null
+++ b/meta-oe/recipes-support/htop/htop_0.9.bb
@@ -0,0 +1,19 @@
+DESCRIPTION = "htop process monitor"
+HOMEPAGE = "http://htop.sf.net"
+SECTION = "console/utils"
+PRIORITY = "optional"
+LICENSE = "GPLv2"
+
+LIC_FILES_CHKSUM = "file://COPYING;md5=c312653532e8e669f30e5ec8bdc23be3"
+
+DEPENDS = "ncurses"
+RDEPENDS_${PN} = "ncurses-terminfo"
+
+SRC_URI = "${SOURCEFORGE_MIRROR}/htop/htop-${PV}.tar.gz \
+           file://remove-proc-test.patch"
+
+inherit autotools
+
+SRC_URI[md5sum] = "7c5507f35f363f3f40183a2ba3c561f8"
+SRC_URI[sha256sum] = "4de65c38e1886bccd30ed692b30eb9bf195240680781bfe1eaf5faf84ee6fbfd"
+
diff --git a/meta-oe/recipes-support/libgcrypt/libgcrypt.inc b/meta-oe/recipes-support/libgcrypt/libgcrypt.inc
new file mode 100644
index 0000000000..da882dcc7e
--- /dev/null
+++ b/meta-oe/recipes-support/libgcrypt/libgcrypt.inc
@@ -0,0 +1,33 @@
+DESCRIPTION = "A general purpose cryptographic library based on the code from GnuPG"
+HOMEPAGE = "http://directory.fsf.org/project/libgcrypt/"
+BUGTRACKER = "https://bugs.g10code.com/gnupg/index"
+SECTION = "libs"
+PRIORITY = "optional"
+
+BBCLASSEXTEND = "native"
+
+# helper program gcryptrnd and getrandom are under GPL, rest LGPL
+LICENSE = "GPLv2+ & LGPLv2.1+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=94d55d512a9ba36caa9b7df079bae19f \
+                    file://COPYING.LIB;md5=bbb461211a33b134d42ed5ee802b37ff"
+
+DEPENDS = "libgpg-error"
+
+SRC_URI = "ftp://ftp.gnupg.org/gcrypt/libgcrypt/libgcrypt-${PV}.tar.gz \
+           file://add-pkgconfig-support.patch"
+
+inherit autotools binconfig pkgconfig
+
+EXTRA_OECONF = "--without-pth --disable-asm --with-capabilities"
+
+# libgcrypt.pc is added locally and thus installed here
+do_install_append() {
+	install -d ${D}/${libdir}/pkgconfig
+	install -m 0644 ${S}/src/libgcrypt.pc ${D}/${libdir}/pkgconfig/
+}
+
+ARM_INSTRUCTION_SET = "arm"
+
+# move libgcrypt-config into -dev package
+FILES_${PN} = "${libdir}/lib*.so.*"
+FILES_${PN}-dev += "${bindir} ${libdir}/pkgconfig/*.pc"
diff --git a/meta-oe/recipes-support/libgcrypt/libgcrypt/add-pkgconfig-support.patch b/meta-oe/recipes-support/libgcrypt/libgcrypt/add-pkgconfig-support.patch
new file mode 100644
index 0000000000..24a59787a2
--- /dev/null
+++ b/meta-oe/recipes-support/libgcrypt/libgcrypt/add-pkgconfig-support.patch
@@ -0,0 +1,49 @@
+Index: libgcrypt-1.2.4/configure.ac
+===================================================================
+--- libgcrypt-1.2.4.orig/configure.ac	2008-03-19 22:14:50.000000000 +0000
++++ libgcrypt-1.2.4/configure.ac	2008-03-19 22:14:58.000000000 +0000
+@@ -807,6 +807,7 @@
+ doc/Makefile
+ src/Makefile
+ src/gcrypt.h
++src/libgcrypt.pc
+ src/libgcrypt-config
+ tests/Makefile
+ w32-dll/Makefile
+Index: libgcrypt-1.2.4/src/libgcrypt.pc.in
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ libgcrypt-1.2.4/src/libgcrypt.pc.in	2008-03-19 22:14:58.000000000 +0000
+@@ -0,0 +1,32 @@
++# Process this file with autoconf to produce a pkg-config metadata file.
++# Copyright (C) 2002, 2003, 2004, 2005, 2006 Free Software Foundation
++# Author: Simon Josefsson
++#
++# This file is free software; as a special exception the author gives
++# unlimited permission to copy and/or distribute it, with or without
++# modifications, as long as this notice is preserved.
++#
++# This file is distributed in the hope that it will be useful, but
++# WITHOUT ANY WARRANTY, to the extent permitted by law; without even the
++# implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
++
++prefix=@prefix@
++exec_prefix=@exec_prefix@
++libdir=@libdir@
++includedir=@includedir@
++
++# API info
++api_version=@LIBGCRYPT_CONFIG_API_VERSION@
++
++# Misc information.
++symmetric_ciphers=@LIBGCRYPT_CIPHERS@
++asymmetric_ciphers=@LIBGCRYPT_PUBKEY_CIPHERS@
++digests=@LIBGCRYPT_DIGESTS@
++
++Name: libgcrypt
++Description: GNU crypto library
++URL: http://www.gnupg.org
++Version: @VERSION@
++Libs: -L${libdir} -lgcrypt
++Libs.private: -L${libdir} -lgpg-error
++Cflags: -I${includedir} 
diff --git a/meta-oe/recipes-support/libgcrypt/libgcrypt_1.4.6.bb b/meta-oe/recipes-support/libgcrypt/libgcrypt_1.4.6.bb
new file mode 100644
index 0000000000..a592437913
--- /dev/null
+++ b/meta-oe/recipes-support/libgcrypt/libgcrypt_1.4.6.bb
@@ -0,0 +1,3 @@
+require libgcrypt.inc
+
+PR = "r0"
diff --git a/meta-oe/recipes-support/libgpg-error/libgpg-error-1.8/pkgconfig.patch b/meta-oe/recipes-support/libgpg-error/libgpg-error-1.8/pkgconfig.patch
new file mode 100644
index 0000000000..49e47d874e
--- /dev/null
+++ b/meta-oe/recipes-support/libgpg-error/libgpg-error-1.8/pkgconfig.patch
@@ -0,0 +1,53 @@
+
+#
+# Patch managed by http://www.mn-logistik.de/unsupported/pxa250/patcher
+#
+
+Index: libgpg-error-1.8/configure.ac
+===================================================================
+--- libgpg-error-1.8.orig/configure.ac	2010-05-06 06:01:08.000000000 -0700
++++ libgpg-error-1.8/configure.ac	2010-07-21 02:20:20.923261305 -0700
+@@ -140,6 +140,7 @@
+ AC_SUBST(GPG_ERROR_CONFIG_CFLAGS)
+ AC_SUBST(GPG_ERROR_CONFIG_ISUBDIRAFTER)
+ AC_CONFIG_FILES([src/gpg-error-config], [chmod +x src/gpg-error-config])
++AC_CONFIG_FILES([src/gpg-error.pc])
+ 
+ 
+ # Special defines for certain platforms
+Index: libgpg-error-1.8/src/Makefile.am
+===================================================================
+--- libgpg-error-1.8.orig/src/Makefile.am	2010-04-14 02:16:44.000000000 -0700
++++ libgpg-error-1.8/src/Makefile.am	2010-07-21 02:22:36.655012496 -0700
+@@ -37,13 +37,15 @@
+ bin_SCRIPTS = gpg-error-config
+ m4datadir = $(datadir)/aclocal
+ m4data_DATA = gpg-error.m4
++pkgconfigdir = $(libdir)/pkgconfig
++pkgconfig_DATA = gpg-error.pc
+ 
+ EXTRA_DIST = mkstrtable.awk err-sources.h.in err-codes.h.in \
+ 	mkerrnos.awk errnos.in README \
+ 	mkerrcodes.awk mkerrcodes1.awk mkerrcodes2.awk mkerrcodes.c \
+ 	mkheader.awk gpg-error.h.in mkw32errmap.c w32-add.h w32ce-add.h \
+ 	err-sources.h err-codes.h gpg-error-config.in gpg-error.m4 \
+-	gpg-error.def.in versioninfo.rc.in
++	gpg-error.def.in versioninfo.rc.in gpg-error.pc.in
+ 
+ BUILT_SOURCES = err-sources.h err-codes.h code-to-errno.h code-from-errno.h \
+ 	err-sources-sym.h err-codes-sym.h errnos-sym.h gpg-error.h \
+Index: libgpg-error-1.8/src/gpg-error.pc.in
+===================================================================
+--- /dev/null	1970-01-01 00:00:00.000000000 +0000
++++ libgpg-error-1.8/src/gpg-error.pc.in	2010-07-21 02:20:20.923261305 -0700
+@@ -0,0 +1,10 @@
++prefix=@prefix@
++exec_prefix=@exec_prefix@
++libdir=@libdir@
++includedir=@includedir@
++
++Name: gpg-error
++Description: a library that defines common error values for all GnuPG components
++Version: @VERSION@
++Libs: -L{libdir} -lgpg-error
++Cflags: -I${includedir}
diff --git a/meta-oe/recipes-support/libgpg-error/libgpg-error_1.8.bb b/meta-oe/recipes-support/libgpg-error/libgpg-error_1.8.bb
new file mode 100644
index 0000000000..5f6b72cd50
--- /dev/null
+++ b/meta-oe/recipes-support/libgpg-error/libgpg-error_1.8.bb
@@ -0,0 +1,26 @@
+DESCRIPTION = "a small library that defines common error values for all GnuPG components"
+HOMEPAGE = "http://www.gnupg.org/related_software/libgpg-error/"
+BUGTRACKER = "https://bugs.g10code.com/gnupg/index"
+
+BBCLASSEXTEND = "native"
+
+LICENSE = "GPLv2+ & LGPLv2.1+"
+LIC_FILES_CHKSUM = "file://COPYING;md5=59530bdf33659b29e73d4adb9f9f6552 \
+                    file://COPYING.LIB;md5=2d5025d4aa3495befef8f17206a5b0a1 \
+                    file://src/gpg-error.h;endline=23;md5=83c16c8f5cea85affa1ff270a6f4fcff \
+                    file://src/init.c;endline=20;md5=b69742f2a8827d494c6f6a4b1768416c"
+
+
+SECTION = "libs"
+LICENSE = "GPLv2+ & LGPLv2.1+"
+DEPENDS = "gettext"
+PR = "r0"
+
+SRC_URI = "ftp://ftp.gnupg.org/gcrypt/libgpg-error/libgpg-error-${PV}.tar.bz2 \
+           file://pkgconfig.patch;"
+
+# move libgpg-error-config into -dev package
+FILES_${PN} = "${libdir}/lib*.so.*"
+FILES_${PN}-dev += "${bindir}/*"
+
+inherit autotools binconfig pkgconfig
diff --git a/meta-oe/recipes-support/libusb/libusb-compat_0.1.3.bbappend b/meta-oe/recipes-support/libusb/libusb-compat_0.1.3.bbappend
new file mode 100644
index 0000000000..7de23617db
--- /dev/null
+++ b/meta-oe/recipes-support/libusb/libusb-compat_0.1.3.bbappend
@@ -0,0 +1,4 @@
+PROVIDES += "virtual/libusb0"
+
+inherit lib_package
+
diff --git a/meta-oe/recipes-support/mysql/files/autofoo.patch b/meta-oe/recipes-support/mysql/files/autofoo.patch
new file mode 100644
index 0000000000..669393a23b
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/files/autofoo.patch
@@ -0,0 +1,319 @@
+diff -aurp mysql-4.1.22.old/acinclude.m4 mysql-4.1.22/acinclude.m4
+--- mysql-4.1.22.old/acinclude.m4	2008-09-18 13:00:13.000000000 -0500
++++ mysql-4.1.22/acinclude.m4	2008-09-18 12:58:41.000000000 -0500
+@@ -1,5 +1,88 @@
+ # Local macros for automake & autoconf
+ 
++AH_TEMPLATE([SPRINTF_RETURNS_INT], [sprintf returns an int])
++AH_TEMPLATE([SPRINTF_RETURNS_PTR], [sprintf returns a char *])
++AH_TEMPLATE([SPRINTF_RETURNS_GARBAGE], [sprintf returns something unknown to us])
++
++AC_DEFUN([MYSQL_SPRINTF_RET], [
++  AC_CACHE_CHECK([return type of sprintf],
++	         [mysql_cv_func_sprintf_ret], [
++    old_CFLAGS="$CFLAGS"
++    CFLAGS="$CFLAGS -Werror"
++    AC_COMPILE_IFELSE([
++#include <stdio.h>
++int sprintf(char *str, const char *format, ...);
++      ], [mysql_cv_func_sprintf_ret=int],
++      AC_COMPILE_IFELSE([
++#include <stdio.h>
++char * sprintf(char *str, const char *format, ...);
++        ], [mysql_cv_func_sprintf_ret=ptr],
++	[mysql_cv_func_sprintf_ret=unknown])
++    )
++    CFLAGS="$old_CFLAGS"
++  ])
++  if test x"$mysql_cv_func_sprintf_ret" = "xint"; then
++    AC_DEFINE([SPRINTF_RETURNS_INT], [1])
++  elif test x"$mysql_cv_func_sprintf_ret" = "xptr"; then
++    AC_DEFINE([SPRINTF_RETURNS_PTR], [1])
++  else
++    AC_DEFINE([SPRINTF_RETURNS_GARBAGE], [1])
++  fi
++])
++
++# _MYSQL_FUNC_ATOMIC_ADD
++# ----------------------
++# Check for Linux specific atomic_add function
++AC_DEFUN([_MYSQL_FUNC_ATOMIC_ADD],
++[AC_CACHE_CHECK([for atomic_add], [mysql_cv_func_atomic_add],
++[AC_RUN_IFELSE([AC_LANG_PROGRAM([[#include <asm/atomic.h>]],
++                                [
++int main()
++{
++  atomic_t v;
++
++  atomic_set(&v, 23);
++  atomic_add(5, &v);
++  return atomic_read(&v) == 28 ? 0 : -1;
++}
++				])],
++                   [mysql_cv_func_atomic_add=yes],
++                   [mysql_cv_func_atomic_add=no])])
++  if test x"$mysql_func_atomic_add" = "xyes"; then
++    AC_DEFINE([HAVE_ATOMIC_ADD], [1])
++  fi[]dnl
++])# _MYSQL_FUNC_ATOMIC_ADD
++
++# _MYSQL_FUNC_ATOMIC_SUB
++# ----------------------
++# Check for Linux specific atomic_sub function
++AC_DEFUN([_MYSQL_FUNC_ATOMIC_SUB],
++[AC_CACHE_CHECK([for atomic_sub], [mysql_cv_func_atomic_sub],
++[AC_RUN_IFELSE([AC_LANG_PROGRAM([[#include <asm/atomic.h>]],
++                                [
++int main()
++{
++  atomic_t v;
++
++  atomic_set(&v, 23);
++  atomic_sub(5, &v);
++  return atomic_read(&v) == 18 ? 0 : -1;
++}
++				])],
++                   [mysql_cv_func_atomic_sub=yes],
++                   [mysql_cv_func_atomic_sub=no])])
++  if test x"$mysql_func_atomic_sub" = "xyes"; then
++    AC_DEFINE([HAVE_ATOMIC_SUB], [1])
++  fi[]dnl
++])# _MYSQL_FUNC_ATOMIC_SUB
++
++# MYSQL_FUNCS_ATOMIC
++# ------------------
++# Check for Linux specific atomic add and sub functions
++AC_DEFUN([MYSQL_FUNCS_ATOMIC], [
++  AC_REQUIRE([_MYSQL_FUNC_ATOMIC_ADD])dnl
++  AC_REQUIRE([_MYSQL_FUNC_ATOMIC_SUB])dnl
++])# MYSQL_FUNCS_ATOMIC
+ 
+ AC_DEFUN([MYSQL_CHECK_READLINE_DECLARES_HIST_ENTRY], [
+     AC_CACHE_CHECK([HIST_ENTRY is declared in readline/readline.h], mysql_cv_hist_entry_declared,
+@@ -344,7 +427,7 @@ dnl ------------------------------------
+ AC_DEFUN([MYSQL_CHECK_ULONG],
+ [AC_MSG_CHECKING(for type ulong)
+ AC_CACHE_VAL(ac_cv_ulong,
+-[AC_TRY_RUN([#include <stdio.h>
++[AC_TRY_LINK([#include <stdio.h>
+ #include <sys/types.h>
+ main()
+ {
+@@ -362,7 +445,7 @@ fi
+ AC_DEFUN([MYSQL_CHECK_UCHAR],
+ [AC_MSG_CHECKING(for type uchar)
+ AC_CACHE_VAL(ac_cv_uchar,
+-[AC_TRY_RUN([#include <stdio.h>
++[AC_TRY_LINK([#include <stdio.h>
+ #include <sys/types.h>
+ main()
+ {
+@@ -380,7 +463,7 @@ fi
+ AC_DEFUN([MYSQL_CHECK_UINT],
+ [AC_MSG_CHECKING(for type uint)
+ AC_CACHE_VAL(ac_cv_uint,
+-[AC_TRY_RUN([#include <stdio.h>
++[AC_TRY_LINK([#include <stdio.h>
+ #include <sys/types.h>
+ main()
+ {
+@@ -399,7 +482,7 @@ fi
+ AC_DEFUN([MYSQL_CHECK_IN_ADDR_T],
+ [AC_MSG_CHECKING(for type in_addr_t)
+ AC_CACHE_VAL(ac_cv_in_addr_t,
+-[AC_TRY_RUN([#include <stdio.h>
++[AC_TRY_LINK([#include <stdio.h>
+ #include <sys/types.h>
+ #include <sys/socket.h>
+ #include <netinet/in.h>
+@@ -460,7 +543,7 @@ fi
+ AC_DEFUN([MYSQL_CHECK_FP_EXCEPT],
+ [AC_MSG_CHECKING(for type fp_except)
+ AC_CACHE_VAL(ac_cv_fp_except,
+-[AC_TRY_RUN([#include <stdio.h>
++[AC_TRY_LINK([#include <stdio.h>
+ #include <sys/types.h>
+ #include <ieeefp.h>
+ main()
+diff -aurp mysql-4.1.22.old/configure.in mysql-4.1.22/configure.in
+--- mysql-4.1.22.old/configure.in	2008-09-18 13:00:14.000000000 -0500
++++ mysql-4.1.22/configure.in	2008-09-18 12:54:00.000000000 -0500
+@@ -236,8 +236,6 @@ then
+ else
+   AC_PATH_PROG(AS, as, as)
+ fi
+-# Still need ranlib for readline; local static use only so no libtool.
+-AC_PROG_RANLIB
+ # We use libtool
+ #AC_LIBTOOL_WIN32_DLL
+ AC_PROG_LIBTOOL
+@@ -258,44 +256,7 @@ AC_PROG_YACC
+ AC_CHECK_PROG(PDFMANUAL, pdftex, manual.pdf)
+ AC_CHECK_PROG(DVIS,      tex,    manual.dvi)
+ 
+-AC_MSG_CHECKING("return type of sprintf")
+-
+-#check the return type of sprintf
+-case $SYSTEM_TYPE in
+-  *netware*)
+-    AC_DEFINE(SPRINTF_RETURNS_INT, [1]) AC_MSG_RESULT("int")
+-    ;;
+-  *)
+-AC_TRY_RUN([
+-  int main()
+-    {
+-      char* s = "hello";
+-      char buf[6];
+-      if((int)sprintf(buf, s) == strlen(s))
+-	return 0;
+-      
+-      return -1;
+-     }
+-   ],
+-   [AC_DEFINE(SPRINTF_RETURNS_INT, [1], [POSIX sprintf])
+-   AC_MSG_RESULT("int")],
+-   [AC_TRY_RUN([
+- int main()
+-   {
+-     char* s = "hello";
+-     char buf[6];
+-     if((char*)sprintf(buf,s) == buf + strlen(s))
+-       return 0;
+-     return -1;
+-   }           ],
+-               [AC_DEFINE(SPRINTF_RETURNS_PTR, [1], [Broken sprintf])
+-                AC_MSG_RESULT("ptr")],
+-               [AC_DEFINE(SPRINTF_RETURNS_GARBAGE, [1], [Broken sprintf])
+-                AC_MSG_RESULT("garbage")])
+-   ])
+-    ;;
+-esac
+-
++MYSQL_SPRINTF_RET
+ 
+ # option, cache_name, variable,
+ # code to execute if yes, code to exectute if fail
+@@ -878,47 +839,7 @@ struct request_info *req;
+ AC_SUBST(WRAPLIBS)
+ 
+ if test "$TARGET_LINUX" = "true"; then
+-  AC_MSG_CHECKING([for atomic operations])
+-
+-  AC_LANG_SAVE
+-  AC_LANG_CPLUSPLUS
+-
+-  atom_ops=
+-  AC_TRY_RUN([
+-#include <asm/atomic.h>
+-int main()
+-{
+-  atomic_t v;
+-
+-  atomic_set(&v, 23);
+-  atomic_add(5, &v);
+-  return atomic_read(&v) == 28 ? 0 : -1;
+-}
+-  ],
+-  [AC_DEFINE([HAVE_ATOMIC_ADD], [1],
+-             [atomic_add() from <asm/atomic.h> (Linux only)])
+-   atom_ops="${atom_ops}atomic_add "],
+-  )
+-  AC_TRY_RUN([
+-#include <asm/atomic.h>
+-int main()
+-{
+-  atomic_t v;
+-
+-  atomic_set(&v, 23);
+-  atomic_sub(5, &v);
+-  return atomic_read(&v) == 18 ? 0 : -1;
+-}
+-  ],
+-  [AC_DEFINE([HAVE_ATOMIC_SUB], [1],
+-             [atomic_sub() from <asm/atomic.h> (Linux only)])
+-   atom_ops="${atom_ops}atomic_sub "],
+-  )
+-
+-  if test -z "$atom_ops"; then atom_ops="no"; fi
+-  AC_MSG_RESULT($atom_ops)
+-
+-  AC_LANG_RESTORE
++  MYSQL_FUNC_ATOMIC
+ 
+   AC_ARG_WITH(pstack,
+     [  --with-pstack           Use the pstack backtrace library],
+@@ -971,13 +892,13 @@ fi
+ # Later in this script LIBS will be augmented with a threads library.
+ NON_THREADED_LIBS="$LIBS"
+ 
+-AC_MSG_CHECKING([for int8])
++AC_CACHE_CHECK([for int8], [mysql_cv_type_int8], [
+ case $SYSTEM_TYPE in
+   *netware)
+     AC_MSG_RESULT([no])
+     ;;
+   *)
+-AC_TRY_RUN([
++AC_LINK_IFELSE([AC_LANG_PROGRAM([[
+ #ifdef HAVE_STDLIB_H
+ #include <stdlib.h>
+ #endif
+@@ -988,22 +909,21 @@ AC_TRY_RUN([
+ 
+ #ifdef HAVE_SYS_TYPES_H
+ #include <sys/types.h>
+-#endif
+-
++#endif]], [
+ int main()
+ {
+   int8 i;
+   return 0;
+-}
+-],
+-[AC_DEFINE([HAVE_INT_8_16_32], [1],
+-           [whether int8, int16 and int32 types exist])
+-AC_MSG_RESULT([yes])],
+-[AC_MSG_RESULT([no])]
+-)
++}])], [mysql_cv_type_int8=yes], [mysql_cv_type_int8=no])
+     ;;
+ esac
+ 
++if test x"$mysql_cv_type_int8" = "xyes"; then
++  AC_DEFINE([HAVE_INT_8_16_32], [1],
++           [whether int8, int16 and int32 types exist])
++fi
++])
++
+ #
+ # Some system specific hacks
+ #
+@@ -1814,7 +1734,7 @@ then
+   AC_MSG_ERROR("MySQL needs a long long type.")
+ fi
+ # off_t is not a builtin type
+-MYSQL_CHECK_SIZEOF(off_t, 4)
++AC_CHECK_SIZEOF(off_t, 4)
+ if test "$ac_cv_sizeof_off_t" -eq 0
+ then
+   AC_MSG_ERROR("MySQL needs a off_t type.")
+diff -aurp mysql-4.1.22.old/innobase/configure.in mysql-4.1.22/innobase/configure.in
+--- mysql-4.1.22.old/innobase/configure.in	2008-09-18 13:00:14.000000000 -0500
++++ mysql-4.1.22/innobase/configure.in	2008-09-18 12:55:39.000000000 -0500
+@@ -3,6 +3,7 @@ AC_INIT
+ AC_CANONICAL_SYSTEM
+ AM_MAINTAINER_MODE
+ AM_CONFIG_HEADER(ib_config.h)
++AC_CONFIG_AUX_DIR([..])
+ AM_INIT_AUTOMAKE(ib, 0.90)
+ 
+ # This is need before AC_PROG_CC
+@@ -32,7 +33,6 @@ CFLAGS="$CFLAGS "
+ CXXFLAGS="$CXXFLAGS "
+ 
+ AC_PROG_CC
+-AC_PROG_RANLIB
+ AC_PROG_INSTALL
+ AC_PROG_LIBTOOL
+ AC_CHECK_HEADERS(aio.h sched.h)
diff --git a/meta-oe/recipes-support/mysql/files/configure-ps-cache-check.patch b/meta-oe/recipes-support/mysql/files/configure-ps-cache-check.patch
new file mode 100644
index 0000000000..3b5b3fd063
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/files/configure-ps-cache-check.patch
@@ -0,0 +1,27 @@
+Index: mysql-4.1.22/configure.in
+===================================================================
+--- mysql-4.1.22.orig/configure.in	2009-01-28 16:33:28.000000000 +0000
++++ mysql-4.1.22/configure.in	2009-01-28 16:43:26.000000000 +0000
+@@ -471,8 +471,8 @@
+ 
+ # Lock for PS
+ AC_PATH_PROG(PS, ps, ps)
+-AC_MSG_CHECKING("how to check if pid exists")
+-PS=$ac_cv_path_PS
++AC_CACHE_CHECK([how to check if pid exists], [ac_cv_FIND_PROC],
++[
+ # Linux style
+ if $PS p $$ 2> /dev/null | grep $0 > /dev/null
+ then
+@@ -511,8 +511,9 @@
+       AC_MSG_ERROR([Could not find the right ps switches. Which OS is this ?. See the Installation chapter in the Reference Manual.])
+   esac
+ fi
+-AC_SUBST(FIND_PROC)
+-AC_MSG_RESULT("$FIND_PROC")
++ac_cv_FIND_PROC="$FIND_PROC"
++])
++AC_SUBST([FIND_PROC], [$ac_cv_FIND_PROC])
+ 
+ # Check if a pid is valid
+ AC_PATH_PROG(KILL, kill, kill)
diff --git a/meta-oe/recipes-support/mysql/files/fix_host_path.patch b/meta-oe/recipes-support/mysql/files/fix_host_path.patch
new file mode 100644
index 0000000000..4f69cd5198
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/files/fix_host_path.patch
@@ -0,0 +1,37 @@
+--- mysql-4.1.22/configure.in.old	2008-09-18 20:11:15.000000000 -0500
++++ mysql-4.1.22/configure.in	2008-09-18 20:12:28.000000000 -0500
+@@ -456,9 +456,9 @@ else
+   fi
+ fi
+ 
+-AC_SUBST(HOSTNAME)
+-AC_SUBST(PERL)
+-AC_SUBST(PERL5)
++AC_SUBST(HOSTNAME,/bin/hostname)
++AC_SUBST(PERL,$(bindir)/perl)
++AC_SUBST(PERL5,$(bindir)/perl)
+ 
+ # for build ndb docs
+ 
+@@ -516,16 +516,17 @@ AC_MSG_RESULT("$FIND_PROC")
+ 
+ # Check if a pid is valid
+ AC_PATH_PROG(KILL, kill, kill)
++AC_SUBST(KILL,/bin/kill)
+ AC_MSG_CHECKING("for kill switches")
+-if $ac_cv_path_KILL -0 $$
++if $KILL -0 $$
+ then
+-  CHECK_PID="$ac_cv_path_KILL -0 \$\$PID > /dev/null 2> /dev/null"
++  CHECK_PID="$KILL -0 \$\$PID > /dev/null 2> /dev/null"
+ elif kill -s 0 $$
+ then
+-  CHECK_PID="$ac_cv_path_KILL -s 0 \$\$PID > /dev/null 2> /dev/null"
++  CHECK_PID="$KILL -s 0 \$\$PID > /dev/null 2> /dev/null"
+ else
+   AC_MSG_WARN([kill -0 to check for pid seems to fail])
+-    CHECK_PID="$ac_cv_path_KILL -s SIGCONT \$\$PID > /dev/null 2> /dev/null"
++    CHECK_PID="$KILL -s SIGCONT \$\$PID > /dev/null 2> /dev/null"
+ fi
+ AC_SUBST(CHECK_PID)
+ AC_MSG_RESULT("$CHECK_PID")
diff --git a/meta-oe/recipes-support/mysql/files/my.cnf b/meta-oe/recipes-support/mysql/files/my.cnf
new file mode 100644
index 0000000000..85560ebf5c
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/files/my.cnf
@@ -0,0 +1,21 @@
+[client]
+#password					= password
+port						= 3306
+socket						= /tmp/mysql.sock
+
+[mysqld_safe]
+err-log						= /var/log/mysql.err
+
+[mysqld]
+user 						= mysql
+port 						= 3306
+socket 						= /tmp/mysql.sock
+pid-file 					= /var/lib/mysql/mysqld.pid
+log-error 					= /var/log/mysqld.err
+basedir 					= /usr
+datadir 					= /var/mysql
+skip-locking
+skip-innodb
+skip-networking
+bind-address					= localhost
+
diff --git a/meta-oe/recipes-support/mysql/files/mysqld.sh b/meta-oe/recipes-support/mysql/files/mysqld.sh
new file mode 100644
index 0000000000..479ebdb257
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/files/mysqld.sh
@@ -0,0 +1,24 @@
+# MySQL init script
+
+. /etc/default/rcS
+
+case "$1" in
+	start)
+		/usr/bin/mysqld_safe &
+		;;
+	stop)
+		if test -f /var/lib/mysql/mysqld.pid ; then
+			PID=`cat /var/lib/mysql/mysqld.pid`
+			kill $PID
+		fi
+		;;
+	restart)
+		$0 stop
+		$0 start
+		;;
+	*)
+		echo "Usage: /etc/init.d/mysqld {start|stop|restart}"
+		;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-support/mysql/mysql5-native_5.1.40.bb b/meta-oe/recipes-support/mysql/mysql5-native_5.1.40.bb
new file mode 100644
index 0000000000..800178330b
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5-native_5.1.40.bb
@@ -0,0 +1,28 @@
+require mysql5_${PV}.inc
+inherit native
+PR ="r2"
+
+SRC_URI = "http://downloads.mysql.com/archives/mysql-5.1/mysql-${PV}.tar.gz \
+           file://fix-abi-check-gcc45.patch"
+
+RDEPENDS_${PN} = ""
+PACKAGES = ""
+DEPENDS = "ncurses-native"
+EXTRA_OEMAKE = ""
+EXTRA_OECONF = " --with-embedded-server "
+
+do_install() {
+        oe_runmake 'DESTDIR=${D}' install
+        mv -f ${D}${libdir}/mysql/* ${D}${libdir}
+        rmdir ${D}${libdir}/mysql
+
+        install -d ${D}${bindir}
+        install -m 0755 sql/gen_lex_hash ${D}${bindir}/
+}
+
+NATIVE_INSTALL_WORKS = "1"
+
+PSTAGING_DISABLED = "1"
+
+SRC_URI[md5sum] = "32e7373c16271606007374396e6742ad"
+SRC_URI[sha256sum] = "2b0737b84e7b42c9e54c9658d23bfaee1189cd5955f26b10bdb862761d0f0432"
diff --git a/meta-oe/recipes-support/mysql/mysql5/Makefile.am.patch b/meta-oe/recipes-support/mysql/mysql5/Makefile.am.patch
new file mode 100644
index 0000000000..33fd17acd4
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/Makefile.am.patch
@@ -0,0 +1,19 @@
+Index: mysql-5.1.40/sql/Makefile.am
+===================================================================
+--- mysql-5.1.40.orig/sql/Makefile.am
++++ mysql-5.1.40/sql/Makefile.am
+@@ -174,10 +174,10 @@ link_sources:
+ # This generates lex_hash.h
+ # NOTE Built sources should depend on their sources not the tool
+ # this avoid the rebuild of the built files in a source dist
+-lex_hash.h:	gen_lex_hash.cc lex.h
+-		$(MAKE) $(AM_MAKEFLAGS) gen_lex_hash$(EXEEXT)
+-		./gen_lex_hash$(EXEEXT) > $@-t
+-		$(MV) $@-t $@
++GEN_LEX_HASH = ./gen_lex_hash$(EXEEXT)
++
++lex_hash.h:	gen_lex_hash$(EXEEXT)
++		$(GEN_LEX_HASH) > $@
+ 
+ # For testing of udf_example.so
+ udf_example_la_SOURCES= udf_example.c
diff --git a/meta-oe/recipes-support/mysql/mysql5/configure-ps-cache-check.patch b/meta-oe/recipes-support/mysql/mysql5/configure-ps-cache-check.patch
new file mode 100644
index 0000000000..3b5b3fd063
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/configure-ps-cache-check.patch
@@ -0,0 +1,27 @@
+Index: mysql-4.1.22/configure.in
+===================================================================
+--- mysql-4.1.22.orig/configure.in	2009-01-28 16:33:28.000000000 +0000
++++ mysql-4.1.22/configure.in	2009-01-28 16:43:26.000000000 +0000
+@@ -471,8 +471,8 @@
+ 
+ # Lock for PS
+ AC_PATH_PROG(PS, ps, ps)
+-AC_MSG_CHECKING("how to check if pid exists")
+-PS=$ac_cv_path_PS
++AC_CACHE_CHECK([how to check if pid exists], [ac_cv_FIND_PROC],
++[
+ # Linux style
+ if $PS p $$ 2> /dev/null | grep $0 > /dev/null
+ then
+@@ -511,8 +511,9 @@
+       AC_MSG_ERROR([Could not find the right ps switches. Which OS is this ?. See the Installation chapter in the Reference Manual.])
+   esac
+ fi
+-AC_SUBST(FIND_PROC)
+-AC_MSG_RESULT("$FIND_PROC")
++ac_cv_FIND_PROC="$FIND_PROC"
++])
++AC_SUBST([FIND_PROC], [$ac_cv_FIND_PROC])
+ 
+ # Check if a pid is valid
+ AC_PATH_PROG(KILL, kill, kill)
diff --git a/meta-oe/recipes-support/mysql/mysql5/configure.in.patch b/meta-oe/recipes-support/mysql/mysql5/configure.in.patch
new file mode 100644
index 0000000000..3edc5f3c21
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/configure.in.patch
@@ -0,0 +1,54 @@
+Index: mysql-5.1.40/configure.in
+===================================================================
+--- mysql-5.1.40.orig/configure.in
++++ mysql-5.1.40/configure.in
+@@ -226,8 +226,6 @@ else
+   AC_PATH_PROG(AS, as, as)
+ fi
+ 
+-# Still need ranlib for readline; local static use only so no libtool.
+-AC_PROG_RANLIB
+ # We use libtool
+ #AC_LIBTOOL_WIN32_DLL
+ AC_PROG_LIBTOOL
+@@ -255,39 +253,7 @@ AC_CHECK_PROGS(YACC, ['bison -y -p MYSQL
+ AC_CHECK_PROG(PDFMANUAL, pdftex, manual.pdf)
+ AC_CHECK_PROG(DVIS,      tex,    manual.dvi)
+ 
+-#check the return type of sprintf
+-AC_MSG_CHECKING("return type of sprintf")
+-AC_TRY_RUN([
+-  int main()
+-    {
+-      char* s = "hello";
+-      char buf[6];
+-      if((int)sprintf(buf, s) == strlen(s))
+-	return 0;
+-      
+-      return -1;
+-     }
+-   ],
+-   [AC_DEFINE(SPRINTF_RETURNS_INT, [1], [POSIX sprintf])
+-   AC_MSG_RESULT("int")],
+-   [AC_TRY_RUN([
+- int main()
+-   {
+-     char* s = "hello";
+-     char buf[6];
+-     if((char*)sprintf(buf,s) == buf + strlen(s))
+-       return 0;
+-     return -1;
+-   }           ],
+-               [AC_DEFINE(SPRINTF_RETURNS_PTR, [1], [Broken sprintf])
+-                AC_MSG_RESULT("ptr")],
+-               [AC_DEFINE(SPRINTF_RETURNS_GARBAGE, [1], [Broken sprintf])
+-                AC_MSG_RESULT("garbage")]
+-   )],
+-   # Cross compile, assume POSIX
+-   [AC_DEFINE(SPRINTF_RETURNS_INT, [1], [POSIX sprintf])
+-    AC_MSG_RESULT("int (we assume)")]
+-)
++MYSQL_SPRINTF_RET
+ 
+ AC_PATH_PROG(uname_prog, uname, no)
+ 
diff --git a/meta-oe/recipes-support/mysql/mysql5/fix-abi-check-gcc45.patch b/meta-oe/recipes-support/mysql/mysql5/fix-abi-check-gcc45.patch
new file mode 100644
index 0000000000..58812c1f1a
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/fix-abi-check-gcc45.patch
@@ -0,0 +1,77 @@
+From: Date: July 20 2010 7:44pm
+Subject: bzr commit into mysql-5.1-bugteam branch (davi:3493) Bug#52514
+List-Archive: http://lists.mysql.com/commits/113968
+X-Bug: 52514
+MIME-Version: 1.0
+Content-Type: multipart/mixed; boundary="===============9147207462624717749=="
+
+--===============9147207462624717749==
+MIME-Version: 1.0
+Content-Type: text/plain; charset="us-ascii"
+Content-Transfer-Encoding: 7bit
+Content-Disposition: inline
+
+# At a local mysql-5.1-bugteam repository of davi
+
+ 3493 Davi Arnaut	2010-07-20
+      Bug#52514: mysql 5.1 do_abi_check does not compile w/ gcc4.5
+                 due to GCC preprocessor change
+            
+      The problem is that newer GCC versions treats missing headers
+      as fatal errors. The solution is to use a guard macro to prevent
+      the inclusion of system headers when checking the ABI with the
+      C Preprocessor.
+      
+      Reference: http://gcc.gnu.org/bugzilla/show_bug.cgi?id=15638
+                 http://gcc.gnu.org/bugzilla/show_bug.cgi?id=44836
+     @ Makefile.am
+        Define guard macro.
+     @ configure.in
+        Remove workaround.
+     @ include/mysql.h
+        Guard the header inclusion.
+     @ include/mysql.h.pp
+        Header is not included anymore.
+
+    modified:
+      Makefile.am
+      configure.in
+      include/mysql.h
+      include/mysql.h.pp
+=== modified file 'Makefile.am'
+Index: mysql-5.1.40/Makefile.am
+===================================================================
+--- mysql-5.1.40.orig/Makefile.am	2009-10-07 01:46:13.000000000 +0800
++++ mysql-5.1.40/Makefile.am	2010-08-17 20:07:24.843148001 +0800
+@@ -312,7 +312,7 @@
+ do_abi_check:
+ 	set -ex; \
+ 	for file in $(abi_headers); do \
+-	         @CC@ -E -nostdinc -dI \
++	         @CC@ -E -nostdinc -dI -DMYSQL_ABI_CHECK \
+ 	                  -I$(top_srcdir)/include \
+ 	                  -I$(top_srcdir)/include/mysql \
+ 	                  -I$(top_srcdir)/sql \
+Index: mysql-5.1.40/include/mysql.h
+===================================================================
+--- mysql-5.1.40.orig/include/mysql.h	2009-10-07 01:46:50.000000000 +0800
++++ mysql-5.1.40/include/mysql.h	2010-08-17 20:07:24.843148001 +0800
+@@ -44,7 +44,9 @@
+ #endif
+ 
+ #ifndef _global_h				/* If not standard header */
++#ifndef MYSQL_ABI_CHECK
+ #include <sys/types.h>
++#endif
+ #ifdef __LCC__
+ #include <winsock2.h>				/* For windows */
+ #endif
+Index: mysql-5.1.40/include/mysql.h.pp
+===================================================================
+--- mysql-5.1.40.orig/include/mysql.h.pp	2009-10-07 01:46:50.000000000 +0800
++++ mysql-5.1.40/include/mysql.h.pp	2010-08-17 20:07:24.843148001 +0800
+@@ -1,4 +1,3 @@
+-#include <sys/types.h>
+ typedef char my_bool;
+ typedef int my_socket;
+ #include "mysql_version.h"
diff --git a/meta-oe/recipes-support/mysql/mysql5/fix_host_path.patch b/meta-oe/recipes-support/mysql/mysql5/fix_host_path.patch
new file mode 100644
index 0000000000..4f69cd5198
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/fix_host_path.patch
@@ -0,0 +1,37 @@
+--- mysql-4.1.22/configure.in.old	2008-09-18 20:11:15.000000000 -0500
++++ mysql-4.1.22/configure.in	2008-09-18 20:12:28.000000000 -0500
+@@ -456,9 +456,9 @@ else
+   fi
+ fi
+ 
+-AC_SUBST(HOSTNAME)
+-AC_SUBST(PERL)
+-AC_SUBST(PERL5)
++AC_SUBST(HOSTNAME,/bin/hostname)
++AC_SUBST(PERL,$(bindir)/perl)
++AC_SUBST(PERL5,$(bindir)/perl)
+ 
+ # for build ndb docs
+ 
+@@ -516,16 +516,17 @@ AC_MSG_RESULT("$FIND_PROC")
+ 
+ # Check if a pid is valid
+ AC_PATH_PROG(KILL, kill, kill)
++AC_SUBST(KILL,/bin/kill)
+ AC_MSG_CHECKING("for kill switches")
+-if $ac_cv_path_KILL -0 $$
++if $KILL -0 $$
+ then
+-  CHECK_PID="$ac_cv_path_KILL -0 \$\$PID > /dev/null 2> /dev/null"
++  CHECK_PID="$KILL -0 \$\$PID > /dev/null 2> /dev/null"
+ elif kill -s 0 $$
+ then
+-  CHECK_PID="$ac_cv_path_KILL -s 0 \$\$PID > /dev/null 2> /dev/null"
++  CHECK_PID="$KILL -s 0 \$\$PID > /dev/null 2> /dev/null"
+ else
+   AC_MSG_WARN([kill -0 to check for pid seems to fail])
+-    CHECK_PID="$ac_cv_path_KILL -s SIGCONT \$\$PID > /dev/null 2> /dev/null"
++    CHECK_PID="$KILL -s SIGCONT \$\$PID > /dev/null 2> /dev/null"
+ fi
+ AC_SUBST(CHECK_PID)
+ AC_MSG_RESULT("$CHECK_PID")
diff --git a/meta-oe/recipes-support/mysql/mysql5/misc.m4.patch b/meta-oe/recipes-support/mysql/mysql5/misc.m4.patch
new file mode 100644
index 0000000000..7b0acff21c
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/misc.m4.patch
@@ -0,0 +1,13 @@
+Index: mysql-5.1.40/config/ac-macros/misc.m4
+===================================================================
+--- mysql-5.1.40.orig/config/ac-macros/misc.m4
++++ mysql-5.1.40/config/ac-macros/misc.m4
+@@ -476,7 +476,7 @@ AC_DEFUN([MYSQL_STACK_DIRECTION],
+  {
+    exit (find_stack_direction() < 0);
+  }], ac_cv_c_stack_direction=1, ac_cv_c_stack_direction=-1,
+-   ac_cv_c_stack_direction=)])
++   ac_cv_c_stack_direction=0)])
+  AC_DEFINE_UNQUOTED(STACK_DIRECTION, $ac_cv_c_stack_direction)
+ ])dnl
+ 
diff --git a/meta-oe/recipes-support/mysql/mysql5/my.cnf b/meta-oe/recipes-support/mysql/mysql5/my.cnf
new file mode 100644
index 0000000000..7f557e4250
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/my.cnf
@@ -0,0 +1,21 @@
+[client]
+#password					= password
+port						= 3306
+socket						= /tmp/mysql.sock
+
+[mysqld_safe]
+err-log						= /var/log/mysql.err
+
+[mysqld]
+user 						= mysql
+port 						= 3306
+socket 						= /tmp/mysql.sock
+pid-file 					= /var/lib/mysql/mysqld.pid
+log-error 					= /var/log/mysqld.err
+basedir 					= /usr
+datadir 					= /var/mysql
+skip-locking
+loose-skip-innodb
+skip-networking
+bind-address					= localhost
+
diff --git a/meta-oe/recipes-support/mysql/mysql5/mysqld.sh b/meta-oe/recipes-support/mysql/mysql5/mysqld.sh
new file mode 100644
index 0000000000..479ebdb257
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/mysqld.sh
@@ -0,0 +1,24 @@
+# MySQL init script
+
+. /etc/default/rcS
+
+case "$1" in
+	start)
+		/usr/bin/mysqld_safe &
+		;;
+	stop)
+		if test -f /var/lib/mysql/mysqld.pid ; then
+			PID=`cat /var/lib/mysql/mysqld.pid`
+			kill $PID
+		fi
+		;;
+	restart)
+		$0 stop
+		$0 start
+		;;
+	*)
+		echo "Usage: /etc/init.d/mysqld {start|stop|restart}"
+		;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-support/mysql/mysql5/plug.in.patch b/meta-oe/recipes-support/mysql/mysql5/plug.in.patch
new file mode 100644
index 0000000000..70c39fa7a3
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5/plug.in.patch
@@ -0,0 +1,40 @@
+Index: mysql-5.1.40/storage/innodb_plugin/plug.in
+===================================================================
+--- mysql-5.1.40.orig/storage/innodb_plugin/plug.in
++++ mysql-5.1.40/storage/innodb_plugin/plug.in
+@@ -63,35 +63,6 @@ MYSQL_PLUGIN_ACTIONS(innodb_plugin,  [
+ 		;;
+   esac
+   AC_SUBST(INNODB_DYNAMIC_CFLAGS)
+-  AC_MSG_CHECKING(whether pthread_t can be used by GCC atomic builtins)
+-  AC_TRY_RUN(
+-    [
+-      #include <pthread.h>
+-      #include <string.h>
+-
+-      int main(int argc, char** argv) {
+-        pthread_t       x1;
+-        pthread_t       x2;
+-        pthread_t       x3;
+-
+-	memset(&x1, 0x0, sizeof(x1));
+-	memset(&x2, 0x0, sizeof(x2));
+-	memset(&x3, 0x0, sizeof(x3));
+-
+-        __sync_bool_compare_and_swap(&x1, x2, x3);
+-
+-        return(0);
+-      }
+-    ],
+-    [
+-      AC_DEFINE([HAVE_ATOMIC_PTHREAD_T], [1],
+-                [pthread_t can be used by GCC atomic builtins])
+-      AC_MSG_RESULT(yes)
+-    ],
+-    [
+-      AC_MSG_RESULT(no)
+-    ]
+-    )
+ 
+   # Try using solaris atomics on SunOS if GCC atomics are not available
+   AC_CHECK_DECLS(
diff --git a/meta-oe/recipes-support/mysql/mysql5_5.1.40.bb b/meta-oe/recipes-support/mysql/mysql5_5.1.40.bb
new file mode 100644
index 0000000000..5229312dce
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5_5.1.40.bb
@@ -0,0 +1,6 @@
+require ${PN}_${PV}.inc
+
+DEPENDS += mysql5-native
+
+SRC_URI[md5sum] = "32e7373c16271606007374396e6742ad"
+SRC_URI[sha256sum] = "2b0737b84e7b42c9e54c9658d23bfaee1189cd5955f26b10bdb862761d0f0432"
diff --git a/meta-oe/recipes-support/mysql/mysql5_5.1.40.inc b/meta-oe/recipes-support/mysql/mysql5_5.1.40.inc
new file mode 100644
index 0000000000..348f4e38d2
--- /dev/null
+++ b/meta-oe/recipes-support/mysql/mysql5_5.1.40.inc
@@ -0,0 +1,172 @@
+DESCRIPTION = "The MySQL Open Source Database System"
+HOMEPAGE = "http://www.mysql.com/"
+SECTION = "libs"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://COPYING;md5=477ab0a4c8ca64b482b3f2a365d0fdfa"
+
+DEPENDS = "ncurses"
+PR = "r5"
+
+SRC_URI = "http://downloads.mysql.com/archives/mysql-5.1/mysql-${PV}.tar.gz \
+           file://configure.in.patch \
+           file://plug.in.patch \
+           file://misc.m4.patch \
+           file://Makefile.am.patch \
+           file://fix_host_path.patch \
+	   file://configure-ps-cache-check.patch \
+           file://fix-abi-check-gcc45.patch \
+           file://my.cnf \
+           file://mysqld.sh"
+
+S = "${WORKDIR}/mysql-${PV}"
+
+BINCONFIG_GLOB = "mysql_config"
+
+inherit autotools binconfig update-rc.d
+
+INITSCRIPT_PACKAGES = "${PN}-server"
+INITSCRIPT_NAME = "mysqld"
+INITSCRIPT_PARAMS = "start 45 S . stop 45 0 6 1 ."
+
+export ac_cv_path_PS=/bin/ps
+export ac_cv_FIND_PROC="/bin/ps p \$\$PID | grep -v grep | grep mysqld > /dev/null"
+PARALLEL_MAKE = " "
+EXTRA_OEMAKE = "'GEN_LEX_HASH=${STAGING_BINDIR_NATIVE}/gen_lex_hash'"
+EXTRA_OECONF = " --with-atomic-ops=up --with-embedded-server --prefix=/usr --sysconfdir=/etc/mysql --localstatedir=/var/mysql --disable-dependency-tracking --without-raid --without-debug --with-low-memory --without-query-cache --without-man --without-docs --without-innodb "
+
+do_configure_append() {
+     sed -i /comp_err/d ${S}/sql/share/Makefile
+}
+
+SYSROOT_PREPROCESS_FUNCS += "mysql5_sysroot_preprocess"
+
+# We need to append this so it runs *after* binconfig's preprocess function
+mysql5_sysroot_preprocess () {
+	sed -i -es,^pkgincludedir=\'/usr/include/mysql\',pkgincludedir=\'${STAGING_INCDIR}\', ${SYSROOT_DESTDIR}${bindir_crossscripts}/mysql_config
+	sed -i -es,^pkglibdir=\'/usr/lib/mysql\',pkglibdir=\'${STAGING_LIBDIR}\', ${SYSROOT_DESTDIR}${bindir_crossscripts}/mysql_config
+}
+
+do_install() {
+	oe_runmake 'DESTDIR=${D}' install
+	mv -f ${D}${libdir}/mysql/* ${D}${libdir}
+	rmdir ${D}${libdir}/mysql
+
+	install -d ${D}/etc/init.d
+	install -m 0644 ${WORKDIR}/my.cnf ${D}/etc/
+	install -m 0755 ${WORKDIR}/mysqld.sh ${D}/etc/init.d/mysqld
+}
+
+pkg_postinst_mysql5-server () {
+	if [ "x$D" != "x" ]; then
+		exit 1
+	fi
+
+	grep mysql /etc/passwd || adduser --disabled-password --home=/var/mysql --ingroup nogroup mysql
+
+	#Install the database
+	test -d /usr/bin || mkdir -p /usr/bin
+	test -e /usr/bin/hostname || ln -s /bin/hostname /usr/bin/hostname
+	mkdir /var/lib/mysql
+	chown mysql.nogroup /var/lib/mysql
+
+	mysql_install_db
+
+}
+
+pkg_postrm_mysql5-server () {
+	grep mysql /etc/passwd && deluser mysql
+}
+
+PACKAGES = "${PN}-dbg ${PN} \
+libmysqlclient-r libmysqlclient-r-dev libmysqlclient-r-dbg \
+libmysqlclient libmysqlclient-dev libmysqlclient-dbg \
+${PN}-client ${PN}-server ${PN}-leftovers"
+CONFFILES_${PN}-server += "${sysconfdir}/my.cnf"
+
+FILES_${PN} = " "
+RDEPENDS_${PN} = "${PN}-client ${PN}-server"
+ALLOW_EMPTY_${PN} = "1"
+
+FILES_libmysqlclient = "${libdir}/libmysqlclient.so.*"
+FILES_libmysqlclient-dev = " \
+${includedir}/mysql/ \
+${libdir}/lib* \
+${libdir}/plugin/* \
+${sysconfdir}/aclocal \
+${bindir}/mysql_config"
+FILES_libmysqlclient-dbg = "${libdir}/plugin/.debug/ \
+/usr/mysql-test/lib/My/SafeProcess/.debug/my_safe_process"
+
+FILES_libmysqlclient-r = "${libdir}/libmysqlclient_r.so.*"
+FILES_libmysqlclient-r-dev = "${libdir}/libmysqlclient_r.*"
+FILES_libmysqlclient-r-dbg = "${libdir}/plugin/.debuglibmysqlclient_r.so.*"
+
+FILES_${PN}-client = "\
+${bindir}/myisam_ftdump \
+${bindir}/mysql \
+${bindir}/mysql_client_test \
+${bindir}/mysql_client_test_embedded \
+${bindir}/mysql_find_rows \
+${bindir}/mysql_fix_extensions \
+${bindir}/mysql_waitpid \
+${bindir}/mysqlaccess \
+${bindir}/mysqladmin \
+${bindir}/mysqlbug \
+${bindir}/mysqlcheck \
+${bindir}/mysqldump \
+${bindir}/mysqldumpslow \
+${bindir}/mysqlimport \
+${bindir}/mysqlshow \
+${bindir}/mysqlslap \
+${bindir}/mysqltest_embedded \
+${libexecdir}/mysqlmanager"
+
+FILES_${PN}-server = "\
+${bindir}/comp_err \
+${bindir}/isamchk \
+${bindir}/isamlog \
+${bindir}/msql2mysql \
+${bindir}/my_print_defaults \
+${bindir}/myisamchk \
+${bindir}/myisamlog \
+${bindir}/myisampack \
+${bindir}/mysql_convert_table_format \
+${bindir}/mysql_fix_privilege_tables \
+${bindir}/mysql_install_db \
+${bindir}/mysql_secure_installation \
+${bindir}/mysql_setpermission \
+${bindir}/mysql_tzinfo_to_sql \
+${bindir}/mysql_upgrade \
+${bindir}/mysql_zap \
+${bindir}/mysqlbinlog \
+${bindir}/mysqld_multi \
+${bindir}/mysqld_safe \
+${bindir}/mysqlhotcopy \
+${bindir}/mysqltest \
+${bindir}/ndb_delete_all \
+${bindir}/ndb_desc \
+${bindir}/ndb_drop_index \
+${bindir}/ndb_drop_table \
+${bindir}/ndb_mgm \
+${bindir}/ndb_restore \
+${bindir}/ndb_select_all \
+${bindir}/ndb_select_count \
+${bindir}/ndb_show_tables \
+${bindir}/ndb_waiter \
+${bindir}/pack_isam \
+${bindir}/perror \
+${bindir}/replace \
+${bindir}/resolve_stack_dump \
+${bindir}/resolveip \
+${libexecdir}/mysqld \
+${sbindir}/mysqld \
+${sbindir}/ndb_cpcd \
+${sbindir}/ndbd \
+${sbindir}/ndb_mgmd \
+${datadir}/mysql/ \
+${localstatedir}/mysql/ \
+${sysconfdir}/init.d \
+${sysconfdir}/my.cnf"
+
+DESCRIPTION_${PN}-leftovers = "unpackaged and probably unneeded files for ${PN}"
+FILES_${PN}-leftovers = "/"
diff --git a/meta-oe/recipes-support/ntp/files/hipox/ntp.conf b/meta-oe/recipes-support/ntp/files/hipox/ntp.conf
new file mode 100644
index 0000000000..57e585c175
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/hipox/ntp.conf
@@ -0,0 +1,13 @@
+# This is the most basic ntp configuration file
+# The driftfile must remain in a place specific to this
+# machine - it records the machine specific clock error
+driftfile /etc/ntp.drift
+# This obtains a random server which will be close
+# (in IP terms) to the machine.  Add other servers
+# as required, or change this.
+#server pool.ntp.org
+# Using local hardware clock as fallback
+server 127.127.1.0
+fudge 127.127.1.0 stratum 14
+# Defining a default security setting
+restrict default nomodify nopeer
diff --git a/meta-oe/recipes-support/ntp/files/hipox/ntpd b/meta-oe/recipes-support/ntp/files/hipox/ntpd
new file mode 100755
index 0000000000..7d2cd34cdf
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/hipox/ntpd
@@ -0,0 +1,62 @@
+#! /bin/sh
+#
+# ntpd	init.d script for ntpdc from ntp.isc.org
+test -x /usr/bin/ntpd -a -r /etc/ntp.conf || exit 0
+# rcS contains TICKADJ
+test -r /etc/default/rcS && . /etc/default/rcS
+
+# Functions to do individual actions
+settick(){
+  	# If TICKADJ is set we *must* adjust it before we start, because the
+	# driftfile relies on the correct setting
+	test -n "$TICKADJ" -a -x /usr/bin/tickadj && {
+		echo -n "Setting tick to $TICKADJ: "
+		/usr/bin/tickadj "$TICKADJ"
+		echo "done"
+	}
+}
+startdaemon(){
+	# The -g option allows ntpd to step the time to correct it just
+	# once.  The daemon will exit if the clock drifts too much after
+	# this.  If ntpd seems to disappear after a while assume TICKADJ
+	# above is set to a totally incorrect value.
+	echo -n "Starting ntpd: "
+	start-stop-daemon --start -x /usr/bin/ntpd -- -p /var/run/ntp.pid "$@"
+	echo "done"
+}
+stopdaemon(){
+	echo -n "Stopping ntpd: "
+	start-stop-daemon --stop -p /var/run/ntp.pid
+	echo "done"
+}
+
+case "$1" in
+  start)
+  	settick
+	startdaemon -g -x
+	;;
+  stop)
+  	stopdaemon
+	;;
+  force-reload)
+  	stopdaemon
+  	settick
+	startdaemon -g -x
+	;;
+  restart)
+  	# Don't reset the tick here
+	stopdaemon
+	startdaemon -g -x
+	;;
+  reload)
+  	# Must do this by hand, but don't do -g
+	stopdaemon
+	startdaemon -x
+	;;
+  *)
+	echo "Usage: ntpd { start | stop | restart | reload }" >&2
+	exit 1
+	;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-support/ntp/files/ntp b/meta-oe/recipes-support/ntp/files/ntp
new file mode 100755
index 0000000000..e91a52869a
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/ntp
@@ -0,0 +1,31 @@
+#! /bin/sh
+
+FLAGS="defaults 23"
+
+test -f /usr/bin/ntpd || exit 0
+
+case "$1" in
+	start)
+		echo -n "Starting NTP server: ntpd"
+  		start-stop-daemon --start --quiet --exec /usr/bin/ntpd
+		echo "."
+  		;;
+	stop)
+		echo -n "Stopping NTP server: ntpd"
+  		start-stop-daemon --stop --quiet --exec /usr/bin/ntpd
+		echo "."
+  		;;
+	restart|force-reload)
+		echo -n "Restarting NTP server: ntpd... "
+  		start-stop-daemon --stop --quiet --exec /usr/bin/ntpd
+  		sleep 2
+  		start-stop-daemon --start --quiet --exec /usr/bin/ntpd
+		echo "done."
+  		;;
+	*)
+  		echo "Usage: /etc/init.d/ntp {start|stop|restart|force-reload}"
+  		exit 1
+		;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-support/ntp/files/ntp-4.2.4_p6-nano.patch b/meta-oe/recipes-support/ntp/files/ntp-4.2.4_p6-nano.patch
new file mode 100644
index 0000000000..cb1e2f7341
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/ntp-4.2.4_p6-nano.patch
@@ -0,0 +1,17 @@
+--- a/include/ntp_syscall.h.orig	2009-05-19 16:44:55.048156467 -0400
++++ b/include/ntp_syscall.h	2009-05-19 16:46:19.293323686 -0400
+@@ -14,6 +14,14 @@
+ # include <sys/timex.h>
+ #endif
+ 
++#if defined(ADJ_NANO) && !defined(MOD_NANO)
++#define MOD_NANO ADJ_NANO
++#endif
++
++#if defined(ADJ_TAI) && !defined(MOD_TAI)
++#define MOD_TAI ADJ_TAI
++#endif
++
+ #ifndef NTP_SYSCALLS_LIBC
+ #ifdef NTP_SYSCALLS_STD
+ # define ntp_adjtime(t)		syscall(SYS_ntp_adjtime, (t))
diff --git a/meta-oe/recipes-support/ntp/files/ntp.conf b/meta-oe/recipes-support/ntp/files/ntp.conf
new file mode 100644
index 0000000000..02a44b0d01
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/ntp.conf
@@ -0,0 +1,13 @@
+# This is the most basic ntp configuration file
+# The driftfile must remain in a place specific to this
+# machine - it records the machine specific clock error
+driftfile /etc/ntp.drift
+# This obtains a random server which will be close
+# (in IP terms) to the machine.  Add other servers
+# as required, or change this.
+server pool.ntp.org
+# Using local hardware clock as fallback
+server 127.127.1.0
+fudge 127.127.1.0 stratum 14
+# Defining a default security setting
+restrict default nomodify nopeer
diff --git a/meta-oe/recipes-support/ntp/files/ntpd b/meta-oe/recipes-support/ntp/files/ntpd
new file mode 100755
index 0000000000..ae50f135d0
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/ntpd
@@ -0,0 +1,62 @@
+#! /bin/sh
+#
+# ntpd	init.d script for ntpdc from ntp.isc.org
+test -x /usr/bin/ntpd -a -r /etc/ntp.conf || exit 0
+# rcS contains TICKADJ
+test -r /etc/default/rcS && . /etc/default/rcS
+
+# Functions to do individual actions
+settick(){
+  	# If TICKADJ is set we *must* adjust it before we start, because the
+	# driftfile relies on the correct setting
+	test -n "$TICKADJ" -a -x /usr/bin/tickadj && {
+		echo -n "Setting tick to $TICKADJ: "
+		/usr/bin/tickadj "$TICKADJ"
+		echo "done"
+	}
+}
+startdaemon(){
+	# The -g option allows ntpd to step the time to correct it just
+	# once.  The daemon will exit if the clock drifts too much after
+	# this.  If ntpd seems to disappear after a while assume TICKADJ
+	# above is set to a totally incorrect value.
+	echo -n "Starting ntpd: "
+	start-stop-daemon --start -x /usr/bin/ntpd -- -p /var/run/ntp.pid "$@"
+	echo "done"
+}
+stopdaemon(){
+	echo -n "Stopping ntpd: "
+	start-stop-daemon --stop -p /var/run/ntp.pid
+	echo "done"
+}
+
+case "$1" in
+  start)
+  	settick
+	startdaemon -g
+	;;
+  stop)
+  	stopdaemon
+	;;
+  force-reload)
+  	stopdaemon
+  	settick
+	startdaemon -g
+	;;
+  restart)
+  	# Don't reset the tick here
+	stopdaemon
+	startdaemon -g
+	;;
+  reload)
+  	# Must do this by hand, but don't do -g
+	stopdaemon
+	startdaemon
+	;;
+  *)
+	echo "Usage: ntpd { start | stop | restart | reload }" >&2
+	exit 1
+	;;
+esac
+
+exit 0
diff --git a/meta-oe/recipes-support/ntp/files/ntpdate b/meta-oe/recipes-support/ntp/files/ntpdate
new file mode 100755
index 0000000000..784b029ad5
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/ntpdate
@@ -0,0 +1,49 @@
+#!/bin/sh
+
+PATH=/sbin:/bin:/usr/bin
+
+test -x /usr/bin/ntpdate || exit 0
+
+if test -f /etc/default/ntpdate ; then
+. /etc/default/ntpdate
+else
+NTPSERVERS="pool.ntp.org"
+fi
+
+test -n "$NTPSERVERS" || exit 0
+
+# This is a heuristic:  The idea is that if a static interface is brought
+# up, that is a major event, and we can put in some extra effort to fix
+# the system time.  Feel free to change this, especially if you regularly
+# bring up new network interfaces.
+if [ "$METHOD" = static ]; then
+	OPTS="-b"
+fi
+
+if [ "$METHOD" = loopback ]; then
+	exit 0
+fi
+
+(
+
+LOCKFILE=/var/lock/ntpdate
+
+# Avoid running more than one at a time
+if [ -x /usr/bin/lockfile-create ]; then
+	lockfile-create $LOCKFILE
+	lockfile-touch $LOCKFILE &
+	LOCKTOUCHPID="$!"
+fi
+
+if /usr/bin/ntpdate -s $OPTS $NTPSERVERS 2>/dev/null; then
+	if [ "$UPDATE_HWCLOCK" = "yes" ]; then
+		hwclock --systohc || :
+	fi
+fi
+
+if [ -x /usr/bin/lockfile-create ] ; then
+	kill $LOCKTOUCHPID
+	lockfile-remove $LOCKFILE
+fi
+
+) &
diff --git a/meta-oe/recipes-support/ntp/files/tickadj.c.patch b/meta-oe/recipes-support/ntp/files/tickadj.c.patch
new file mode 100644
index 0000000000..9ef9de9e1f
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/files/tickadj.c.patch
@@ -0,0 +1,32 @@
+Index: ntp-4.2.2p3-r0/ntp-4.2.2p3/util/tickadj.c
+===================================================================
+--- ntp-4.2.2p3/util/tickadj.c	2004-02-25 06:58:33.000000000 +0100
++++ ntp-4.2.2p3/util/tickadj.c	2007-07-07 01:00:54.000000000 +0200
+@@ -21,7 +21,8 @@
+ # include <unistd.h>
+ #endif /* HAVE_UNISTD_H */
+ 
+-#ifdef HAVE___ADJTIMEX		/* Linux */
++/* proper handling here has been moved to upstream ntp bugzilla */
++#ifdef linux
+ 
+ #include <sys/timex.h>
+ struct timex txc;
+@@ -91,7 +92,7 @@
+ 	}
+ 
+ 	if (!errflg) {
+-		if (__adjtimex(&txc) < 0)
++		if (adjtimex(&txc) < 0)
+ 			perror("adjtimex");
+ 		else if (!quiet)
+ 			printf("tick     = %ld\ntick_adj = %d\n",
+@@ -146,7 +147,7 @@
+ #endif
+ 	}
+     
+-	if (__adjtimex(&txc) < 0)
++	if (adjtimex(&txc) < 0)
+ 	{
+ 		perror("adjtimex");
+ 	}
diff --git a/meta-oe/recipes-support/ntp/ntp-ssl_4.2.6p3.bb b/meta-oe/recipes-support/ntp/ntp-ssl_4.2.6p3.bb
new file mode 100644
index 0000000000..a158990792
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/ntp-ssl_4.2.6p3.bb
@@ -0,0 +1,11 @@
+require ntp_${PV}.bb
+DEPENDS = "openssl"
+
+S = "${WORKDIR}/ntp-${PV}"
+
+EXTRA_OECONF = "--with-openssl-libdir=${STAGING_LIBDIR} \
+	        --with-openssl-incdir=${STAGING_INCDIR}/openssl"
+
+
+SRC_URI[md5sum] = "98e16c7aa4ecd4c004b51bff18962e95"
+SRC_URI[sha256sum] = "9f4a5271a285d390c9225e3ea28f70049ea377d30fc6de4659007cfff278671a"
diff --git a/meta-oe/recipes-support/ntp/ntp.inc b/meta-oe/recipes-support/ntp/ntp.inc
new file mode 100644
index 0000000000..c72e40e79c
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/ntp.inc
@@ -0,0 +1,33 @@
+DESCRIPTION = "The Network Time Protocol (NTP) is used to \
+synchronize the time of a computer client or server to \
+another server or reference time source, such as a radio \
+or satellite receiver or modem."
+HOMEPAGE = "http://ntp.isc.org/bin/view/Main/WebHome"
+SECTION = "console/network"
+PRIORITY = "optional"
+LICENSE = "ntp"
+LIC_FILES_CHKSUM = "file://COPYRIGHT;md5=fea4b50c33b18c2194b4b1c9ca512670"
+RSUGGESTS_${PN} = "iana-etc"
+
+SRC_URI = "http://www.eecis.udel.edu/~ntp/ntp_spool/ntp4/ntp-4.2/${P}.tar.gz \
+	file://ipv6only-workaround.patch \
+	file://ntpd \
+	file://ntp.conf \
+	file://ntpdate"
+
+inherit autotools update-rc.d
+
+INITSCRIPT_NAME = "ntpd"
+# No dependencies, so just go in at the standard level (20)
+INITSCRIPT_PARAMS = "defaults"
+
+# The ac_cv_header_readline_history is to stop ntpdc depending on either
+# readline or curses
+EXTRA_OECONF = "--without-openssl --without-crypto ac_cv_header_readline_history_h=no"
+CFLAGS_append = " -DPTYS_ARE_GETPT -DPTYS_ARE_SEARCHED"
+
+PACKAGES += "ntpdate ${PN}-bin ${PN}-tickadj ${PN}-utils"
+# NOTE: you don't need ntpdate, use "ntpdc -q -g -x"
+
+# This should use rc.update
+FILES_ntpdate = "${bindir}/ntpdate ${sysconfdir}/init.d/ntpdate"
diff --git a/meta-oe/recipes-support/ntp/ntp_4.2.6p3.bb b/meta-oe/recipes-support/ntp/ntp_4.2.6p3.bb
new file mode 100644
index 0000000000..f64f6f6d92
--- /dev/null
+++ b/meta-oe/recipes-support/ntp/ntp_4.2.6p3.bb
@@ -0,0 +1,46 @@
+require ntp.inc
+
+PR = "r1"
+
+SRC_URI = "http://www.eecis.udel.edu/~ntp/ntp_spool/ntp4/ntp-4.2/${P}.tar.gz \
+        file://tickadj.c.patch \
+        file://ntp-4.2.4_p6-nano.patch \
+        file://ntpd \
+        file://ntp.conf \
+        file://ntpdate"
+
+SRC_URI[md5sum] = "59876a9009b098ff59767ee45a88ebd2"
+SRC_URI[sha256sum] = "6e84d4ddfa14b911c3ed88463af10867e1fa9b287e7b34d8a02e78be85a7c40e"
+
+EXTRA_OECONF += " --with-net-snmp-config=no --without-ntpsnmpd" 
+
+do_install_append() {
+        install -d ${D}/${sysconfdir}/init.d
+        install -m 644 ${WORKDIR}/ntp.conf ${D}/${sysconfdir}
+        install -m 755 ${WORKDIR}/ntpd ${D}/${sysconfdir}/init.d
+        install -d ${D}/${sysconfdir}/network/if-up.d
+        install -m 755 ${WORKDIR}/ntpdate ${D}/${sysconfdir}/network/if-up.d
+}
+
+FILES_${PN}-bin = "${bindir}/ntp-wait ${bindir}/ntpdc ${bindir}/ntpq ${bindir}/ntptime ${bindir}/ntptrace"
+FILES_${PN} = "${bindir}/ntpd ${sysconfdir}/ntp.conf ${sysconfdir}/init.d/ntpd"
+FILES_${PN}-tickadj = "${bindir}/tickadj"
+FILES_ntp-utils = "${bindir}/*"
+FILES_ntpdate = "${bindir}/ntpdate ${sysconfdir}/network/if-up.d/ntpdate"
+
+# ntp originally includes tickadj. It's split off for inclusion in small firmware images on platforms
+# with wonky clocks (e.g. OpenSlug)
+RDEPENDS_${PN} = "${PN}-tickadj"
+
+pkg_postinst_ntpdate() {
+if test "x$D" != "x"; then
+        exit 1
+else
+        if ! grep -q -s ntpdate /var/spool/cron/root; then
+                echo "adding crontab"
+                test -d /var/spool/cron || mkdir -p /var/spool/cron
+                echo "30 * * * *    /usr/bin/ntpdate -b -s -u pool.ntp.org" >> /var/spool/cron/root
+        fi
+fi
+}
+
diff --git a/meta-oe/recipes-support/postgresql/files/no-ecpg-test.patch b/meta-oe/recipes-support/postgresql/files/no-ecpg-test.patch
new file mode 100644
index 0000000000..c0f28f4258
--- /dev/null
+++ b/meta-oe/recipes-support/postgresql/files/no-ecpg-test.patch
@@ -0,0 +1,12 @@
+diff --git a/src/interfaces/ecpg/Makefile b/src/interfaces/ecpg/Makefile
+index dcd578f..1428423 100644
+--- a/src/interfaces/ecpg/Makefile
++++ b/src/interfaces/ecpg/Makefile
+@@ -8,7 +8,6 @@ all install installdirs uninstall dep depend distprep:
+ 	$(MAKE) -C ecpglib $@
+ 	$(MAKE) -C compatlib $@
+ 	$(MAKE) -C preproc $@
+-	$(MAKE) -C test $@
+ 
+ clean distclean maintainer-clean:
+ 	-$(MAKE) -C include $@
diff --git a/meta-oe/recipes-support/postgresql/postgresql-8.4.4/remove.autoconf.version.check.patch b/meta-oe/recipes-support/postgresql/postgresql-8.4.4/remove.autoconf.version.check.patch
new file mode 100644
index 0000000000..d027061d89
--- /dev/null
+++ b/meta-oe/recipes-support/postgresql/postgresql-8.4.4/remove.autoconf.version.check.patch
@@ -0,0 +1,15 @@
+Index: postgresql-8.4.4/configure.in
+===================================================================
+--- postgresql-8.4.4.orig/configure.in
++++ postgresql-8.4.4/configure.in
+@@ -19,10 +19,6 @@ m4_pattern_forbid(^PGAC_)dnl to catch un
+ 
+ AC_INIT([PostgreSQL], [8.4.4], [pgsql-bugs@postgresql.org])
+ 
+-m4_if(m4_defn([m4_PACKAGE_VERSION]), [2.61], [], [m4_fatal([Autoconf version 2.61 is required.
+-Untested combinations of 'autoconf' and PostgreSQL versions are not
+-recommended.  You can remove the check from 'configure.in' but it is then
+-your responsibility whether the result works or not.])])
+ AC_COPYRIGHT([Copyright (c) 1996-2009, PostgreSQL Global Development Group])
+ AC_CONFIG_SRCDIR([src/backend/access/common/heaptuple.c])
+ AC_CONFIG_AUX_DIR(config)
diff --git a/meta-oe/recipes-support/postgresql/postgresql.inc b/meta-oe/recipes-support/postgresql/postgresql.inc
new file mode 100644
index 0000000000..edad3bcc5b
--- /dev/null
+++ b/meta-oe/recipes-support/postgresql/postgresql.inc
@@ -0,0 +1,66 @@
+DESCRIPTION = "PostgreSQL is a powerful, open source relational database system."
+HOMEPAGE = "http://www.postgresql.com"
+LICENSE = "BSD"
+
+DEPENDS = "zlib readline tzcode-native"
+
+ARM_INSTRUCTION_SET = "arm"
+
+#WARNING: this recipe assumes you have the timezone compiler present in /usr/sbin/zic
+
+SRC_URI = "ftp://ftp-archives.postgresql.org/pub/source/v${PV}/${P}.tar.bz2"
+
+LEAD_SONAME = "libpq.so"
+
+# LDFLAGS for shared libraries
+export LDFLAGS_SL = "${LDFLAGS}"
+
+inherit autotools pkgconfig
+
+do_compile_append() {
+         cp /usr/sbin/zic ${S}/src/timezone/
+}
+
+PACKAGES =+ "${PN}-client ${PN}-server-dev ${PN}-timezone \
+             libecpg-compat-dbg libecpg-compat \
+             libecpg-dbg libecpg libecpg-dev \
+             libpq-dbg libpq libpq-dev \ 
+             libpgtypes-dbg libpgtypes "
+
+FILES_${PN}-client = "${bindir}/clusterdb \
+                ${bindir}/createdb \
+                ${bindir}/createlang \
+                ${bindir}/createuser \
+                ${bindir}/dropdb \
+                ${bindir}/droplang \
+                ${bindir}/dropuser \
+                ${bindir}/pg_dump \
+                ${bindir}/pg_dumpall \
+                ${bindir}/pg_restore \
+                ${bindir}/psql \
+                ${bindir}/reindexdb \
+                ${bindir}/vacuumdb \
+                ${bindir}/vacuumlo \
+                ${datadir}/${PN}/psqlrc.sample"
+
+FILES_${PN}-doc += "${prefix}/doc/"
+FILES_${PN}-timezone = "${datadir}/${PN}/timezone"
+FILES_${PN}-server-dev = "${includedir}/${PN}/server"
+
+FILES_libecpg = "${libdir}/libecpg*.so.*"
+FILES_libecpg-dbg = "${libdir}/.debug/libecpg*"
+FILES_libecpg-dev = "${libdir}/libecpg*.a ${libdir}/libecpg*.so \
+                     ${libdir}/libpgtypes*.a ${libdir}/libpgtypes*.so \
+                     ${includedir}/ecpg*.h ${includedir}/${PN}/ecpg*.h \
+                     ${includedir}/pgtypes*.h ${includedir}/${PN}/informix \
+                     ${includedir}/sql3types.h ${includedir}/sqlca.h"
+
+FILES_libpq = "${libdir}/libpq*.so.*"
+FILES_libpq-dbg = "${libdir}/.debug/libpq* ${libdir}/${PN}/pgxs/src/test/regress/.debug/*"
+FILES_libpq-dev = "${libdir}/libpq*.a ${libdir}/libpq*.so ${libdir}/libpgport.a \
+                   ${includedir}"
+
+FILES_libecpg-compat = "${libdir}/libecpg_compat*.so.*"
+FILES_libecpg-compat-dbg = "${libdir}/.debug/libecpg_compat*"
+FILES_libpgtypes = "${libdir}/libpgtypes*.so.*"
+FILES_libpgtypes-dbg = "${libdir}/.debug/libpgtypes*"
diff --git a/meta-oe/recipes-support/postgresql/postgresql_8.4.4.bb b/meta-oe/recipes-support/postgresql/postgresql_8.4.4.bb
new file mode 100644
index 0000000000..d0f5078498
--- /dev/null
+++ b/meta-oe/recipes-support/postgresql/postgresql_8.4.4.bb
@@ -0,0 +1,11 @@
+require postgresql.inc
+
+LIC_FILES_CHKSUM = "file://COPYRIGHT;md5=29b81b066680be9ffd98cb9d2afb9de6"
+
+DEFAULT_PREFERENCE = "-1"
+
+SRC_URI = "ftp://ftp.postgresql.org/pub/source/v${PV}/${P}.tar.bz2 \
+           file://remove.autoconf.version.check.patch"
+
+SRC_URI[md5sum] = "4bf2448ad965bca3940df648c02194df"
+SRC_URI[sha256sum] = "e66b398d565f7fb16d8ae58ae72881dcd3dbb1b88f532bbe1c2d1284812be37e"
diff --git a/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_build_dynamic.patch b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_build_dynamic.patch
new file mode 100644
index 0000000000..914422f1df
--- /dev/null
+++ b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_build_dynamic.patch
@@ -0,0 +1,32 @@
+diff -urN sqlite-2.8.17.orig/main.mk sqlite-2.8.17/main.mk
+--- sqlite-2.8.17.orig/main.mk	2005-04-23 22:43:23.000000000 +0000
++++ sqlite-2.8.17/main.mk	2009-04-02 20:10:36.000000000 +0000
+@@ -139,7 +139,7 @@
+ # This is the default Makefile target.  The objects listed here
+ # are what get build when you type just "make" with no arguments.
+ #
+-all:	sqlite.h config.h libsqlite.a sqlite$(EXE)
++all:   sqlite.h config.h libsqlite.so sqlite$(EXE)
+ 
+ # Generate the file "last_change" which contains the date of change
+ # of the most recently modified source code file
+@@ -148,13 +148,12 @@
+ 	cat $(SRC) | grep '$$Id: ' | sort +4 | tail -1 \
+           | awk '{print $$5,$$6}' >last_change
+ 
+-libsqlite.a:	$(LIBOBJ)
+-	$(AR) libsqlite.a $(LIBOBJ)
+-	$(RANLIB) libsqlite.a
+-
+-sqlite$(EXE):	$(TOP)/src/shell.c libsqlite.a sqlite.h
+-	$(TCCX) $(READLINE_FLAGS) -o sqlite$(EXE) $(TOP)/src/shell.c \
+-		libsqlite.a $(LIBREADLINE) $(THREADLIB)
++libsqlite.so:	$(LIBOBJ)
++	$(CC) $(LDFLAGS) -shared -o libsqlite.so -Wl,-soname,libsqlite.so.0 $(LIBOBJ)
++
++sqlite$(EXE):	$(TOP)/src/shell.c libsqlite.so sqlite.h
++	$(TCCX) $(LDFLAGS) $(READLINE_FLAGS) -o sqlite$(EXE) $(TOP)/src/shell.c \
++		-lsqlite $(LIBREADLINE) $(THREADLIB)
+ 
+ sqlite_analyzer$(EXE):	$(TOP)/src/tclsqlite.c libsqlite.a $(TESTSRC) \
+ 			$(TOP)/tool/spaceanal.tcl
diff --git a/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_no_tcl.patch b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_no_tcl.patch
new file mode 100644
index 0000000000..b84b6486ef
--- /dev/null
+++ b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/mainmk_no_tcl.patch
@@ -0,0 +1,20 @@
+diff -bur sqlite-2.8.17~orig/main.mk sqlite-2.8.17/main.mk
+--- sqlite-2.8.17~orig/main.mk	2006-02-13 04:09:33.000000000 -0600
++++ sqlite-2.8.17/main.mk	2006-02-13 04:15:42.000000000 -0600
+@@ -58,7 +58,7 @@
+          expr.o func.o hash.o insert.o \
+          main.o opcodes.o os.o pager.o parse.o pragma.o printf.o random.o \
+          select.o table.o tokenize.o trigger.o update.o util.o \
+-         vacuum.o vdbe.o vdbeaux.o where.o tclsqlite.o
++         vacuum.o vdbe.o vdbeaux.o where.o
+ 
+ # All of the source code files.
+ #
+@@ -91,7 +91,6 @@
+   $(TOP)/src/sqlite.h.in \
+   $(TOP)/src/sqliteInt.h \
+   $(TOP)/src/table.c \
+-  $(TOP)/src/tclsqlite.c \
+   $(TOP)/src/tokenize.c \
+   $(TOP)/src/trigger.c \
+   $(TOP)/src/update.c \
diff --git a/meta-oe/recipes-support/sqlite/sqlite-2.8.17/sqlite.pc b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/sqlite.pc
new file mode 100644
index 0000000000..6bc742eecb
--- /dev/null
+++ b/meta-oe/recipes-support/sqlite/sqlite-2.8.17/sqlite.pc
@@ -0,0 +1,12 @@
+# Package Information for pkg-config
+
+prefix=/usr
+exec_prefix=${prefix}
+libdir=${exec_prefix}/lib
+includedir=${prefix}/include
+
+Name: SQLite
+Description: SQL database engine
+Version: 2.8.17
+Libs: -L${libdir} -lsqlite
+Cflags: -I${includedir}
diff --git a/meta-oe/recipes-support/sqlite/sqlite_2.8.17.bb b/meta-oe/recipes-support/sqlite/sqlite_2.8.17.bb
new file mode 100644
index 0000000000..75678f6292
--- /dev/null
+++ b/meta-oe/recipes-support/sqlite/sqlite_2.8.17.bb
@@ -0,0 +1,60 @@
+DESCRIPTION = "An Embeddable SQL Database Engine"
+HOMEPAGE = "http://www.sqlite.org/"
+SECTION = "libs"
+PRIORITY = "optional"
+DEPENDS = "readline ncurses"
+LICENSE = "PD"
+LIC_FILES_CHKSUM = "file://src/main.c;beginline=1;endline=10;md5=e98469a8efa024a38ad5b2e4b92f4a96"
+
+PR = "r7"
+
+SRC_URI = "http://www.hwaci.com/sw/sqlite/sqlite-${PV}.tar.gz \
+       file://mainmk_build_dynamic.patch \
+       file://mainmk_no_tcl.patch \
+       file://sqlite.pc"
+
+SOURCES = "attach.o auth.o btree.o btree_rb.o build.o copy.o date.o delete.o \
+           expr.o func.o hash.o insert.o main.o opcodes.o os.o pager.o \
+           parse.o pragma.o printf.o random.o select.o table.o tokenize.o \
+           trigger.o update.o util.o vacuum.o vdbe.o vdbeaux.o where.o"
+
+inherit autotools pkgconfig
+
+do_configure() {
+    echo "main.mk is patched, no need to configure"
+    # make pkgconfig.bbclass pick this up
+    mv ${WORKDIR}/sqlite.pc ${S}
+}
+
+do_compile() {
+	oe_runmake -f Makefile.linux-gcc \
+                   TOP="${S}" \
+                   BCC="${BUILD_CC}" \
+                   TCC="${CC}" \
+                   OPTS="-fPIC -D'INTPTR_TYPE=int'" \
+                   TCL_FLAGS= LIBTCL= \
+                   READLINE_FLAGS="-DHAVE_READLINE=1 -I${STAGING_INCDIR}" \
+                   LIBREADLINE="-L. -L${STAGING_LIBDIR} -lreadline -lncurses"
+}
+
+do_install() {
+	install -d ${D}${libdir} ${D}${bindir}
+	install sqlite ${D}${bindir}
+	install -m 0755 libsqlite.so ${D}${libdir}/libsqlite.so.0.8.6
+	ln -sf libsqlite.so.0.8.6 ${D}${libdir}/libsqlite.so
+        ln -sf libsqlite.so.0.8.6 ${D}${libdir}/libsqlite.so.0
+        ln -sf libsqlite.so.0.8.6 ${D}${libdir}/libsqlite.so.0.8
+        install -d ${D}${includedir}
+        install -m 0644 sqlite.h ${D}${includedir}/sqlite.h
+        install -d ${D}${libdir}/pkgconfig
+        install -m 0644 ${S}/sqlite.pc ${D}${libdir}/pkgconfig/sqlite.pc
+}
+
+PACKAGES += "${PN}-bin"
+FILES_${PN}-bin = "${bindir}/*"
+FILES_${PN} = "${libdir}/*.so.*"
+
+SRC_URI[md5sum] = "838dbac20b56d2c4292e98848505a05b"
+SRC_URI[sha256sum] = "3f35ebfb67867fb5b583a03e480f900206af637efe7179b32294a6a0cf806f37"
+
+BBCLASSEXTEND = "native"