diff options
Diffstat (limited to 'meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch')
| -rw-r--r-- | meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch | 191 |
1 files changed, 191 insertions, 0 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch new file mode 100644 index 0000000000..f603fcadba --- /dev/null +++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99388.patch @@ -0,0 +1,191 @@ +2010-09-13 Andrew Stubbs <ams@codesourcery.com> + + Backport from FSF: + + 2010-09-13 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * config/arm/arm.md: (define_attr "conds"): Update comment. + * config/arm/sync.md (arm_sync_compare_and_swapsi): Change + conds attribute to clob. + (arm_sync_compare_and_swapsi): Likewise. + (arm_sync_compare_and_swap<mode>): Likewise. + (arm_sync_lock_test_and_setsi): Likewise. + (arm_sync_lock_test_and_set<mode>): Likewise. + (arm_sync_new_<sync_optab>si): Likewise. + (arm_sync_new_nandsi): Likewise. + (arm_sync_new_<sync_optab><mode>): Likewise. + (arm_sync_new_nand<mode>): Likewise. + (arm_sync_old_<sync_optab>si): Likewise. + (arm_sync_old_nandsi): Likewise. + (arm_sync_old_<sync_optab><mode>): Likewise. + (arm_sync_old_nand<mode>): Likewise. + + 2010-09-13 Marcus Shawcroft <marcus.shawcroft@arm.com> + + * gcc.target/arm/sync-1.c: New. + + 2010-09-10 Andrew Stubbs <ams@codesourcery.com> + + gcc/ + +=== modified file 'gcc/config/arm/arm.md' +--- old/gcc/config/arm/arm.md 2010-09-09 15:03:00 +0000 ++++ new/gcc/config/arm/arm.md 2010-09-13 15:39:11 +0000 +@@ -352,10 +352,11 @@ + ; CLOB means that the condition codes are altered in an undefined manner, if + ; they are altered at all + ; +-; UNCONDITIONAL means the instions can not be conditionally executed. ++; UNCONDITIONAL means the instruction can not be conditionally executed and ++; that the instruction does not use or alter the condition codes. + ; +-; NOCOND means that the condition codes are neither altered nor affect the +-; output of this insn ++; NOCOND means that the instruction does not use or alter the condition ++; codes but can be converted into a conditionally exectuted instruction. + + (define_attr "conds" "use,set,clob,unconditional,nocond" + (if_then_else (eq_attr "type" "call") + +=== modified file 'gcc/config/arm/sync.md' +--- old/gcc/config/arm/sync.md 2010-09-09 15:18:16 +0000 ++++ new/gcc/config/arm/sync.md 2010-09-13 15:39:11 +0000 +@@ -300,7 +300,7 @@ + (set_attr "sync_new_value" "3") + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "4") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_compare_and_swap<mode>" +@@ -327,7 +327,7 @@ + (set_attr "sync_new_value" "3") + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "4") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_lock_test_and_setsi" +@@ -348,7 +348,7 @@ + (set_attr "sync_new_value" "2") + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_lock_test_and_set<mode>" +@@ -369,7 +369,7 @@ + (set_attr "sync_new_value" "2") + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_new_<sync_optab>si" +@@ -394,7 +394,7 @@ + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") + (set_attr "sync_op" "<sync_optab>") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_new_nandsi" +@@ -419,7 +419,7 @@ + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") + (set_attr "sync_op" "nand") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_new_<sync_optab><mode>" +@@ -445,7 +445,7 @@ + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") + (set_attr "sync_op" "<sync_optab>") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_new_nand<mode>" +@@ -472,7 +472,7 @@ + (set_attr "sync_t1" "0") + (set_attr "sync_t2" "3") + (set_attr "sync_op" "nand") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_old_<sync_optab>si" +@@ -498,7 +498,7 @@ + (set_attr "sync_t1" "3") + (set_attr "sync_t2" "4") + (set_attr "sync_op" "<sync_optab>") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_old_nandsi" +@@ -524,7 +524,7 @@ + (set_attr "sync_t1" "3") + (set_attr "sync_t2" "4") + (set_attr "sync_op" "nand") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_old_<sync_optab><mode>" +@@ -551,7 +551,7 @@ + (set_attr "sync_t1" "3") + (set_attr "sync_t2" "4") + (set_attr "sync_op" "<sync_optab>") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "arm_sync_old_nand<mode>" +@@ -578,7 +578,7 @@ + (set_attr "sync_t1" "3") + (set_attr "sync_t2" "4") + (set_attr "sync_op" "nand") +- (set_attr "conds" "nocond") ++ (set_attr "conds" "clob") + (set_attr "predicable" "no")]) + + (define_insn "*memory_barrier" + +=== added file 'gcc/testsuite/gcc.target/arm/sync-1.c' +--- old/gcc/testsuite/gcc.target/arm/sync-1.c 1970-01-01 00:00:00 +0000 ++++ new/gcc/testsuite/gcc.target/arm/sync-1.c 2010-09-13 15:39:11 +0000 +@@ -0,0 +1,25 @@ ++/* { dg-do run } */ ++/* { dg-options "-O2 -march=armv7-a" } */ ++ ++volatile int mem; ++ ++int ++bar (int x, int y) ++{ ++ if (x) ++ __sync_fetch_and_add(&mem, y); ++ return 0; ++} ++ ++extern void abort (void); ++ ++int ++main (int argc, char *argv[]) ++{ ++ mem = 0; ++ bar (0, 1); ++ bar (1, 1); ++ if (mem != 1) ++ abort (); ++ return 0; ++} + |