diff options
Diffstat (limited to 'meta-multimedia/recipes-mediacentre/xbmc/xbmc')
3 files changed, 197 insertions, 0 deletions
diff --git a/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0001-configure-don-t-run-python-distutils-to-find-STAGING.patch b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0001-configure-don-t-run-python-distutils-to-find-STAGING.patch new file mode 100644 index 0000000000..dfc3959a1f --- /dev/null +++ b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0001-configure-don-t-run-python-distutils-to-find-STAGING.patch @@ -0,0 +1,31 @@ +From 0dce5a2abd9f42876616c35772a4d71c5399543c Mon Sep 17 00:00:00 2001 +From: Koen Kooi <koen@dominion.thruhere.net> +Date: Sat, 17 Dec 2011 11:38:15 +0100 +Subject: [PATCH 1/4] configure: don't run python distutils to find STAGING_INCDIR/python, it is not safe for per-machine sysroots + +Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> +--- + m4/ax_python_devel.m4 | 7 +------ + 1 files changed, 1 insertions(+), 6 deletions(-) + +diff --git a/m4/ax_python_devel.m4 b/m4/ax_python_devel.m4 +index adbd207..dee70f6 100644 +--- a/m4/ax_python_devel.m4 ++++ b/m4/ax_python_devel.m4 +@@ -151,12 +151,7 @@ $ac_distutils_result]) + # + AC_MSG_CHECKING([for Python include path]) + if test -z "$PYTHON_CPPFLAGS"; then +- python_path=`$PYTHON -c "import distutils.sysconfig; \ +- print (distutils.sysconfig.get_python_inc ());"` +- if test -n "${python_path}"; then +- python_path="-I$python_path" +- fi +- PYTHON_CPPFLAGS=$python_path ++ PYTHON_CPPFLAGS="-I${STAGING_INCDIR}/${PYTHON_DIR}" + fi + AC_MSG_RESULT([$PYTHON_CPPFLAGS]) + AC_SUBST([PYTHON_CPPFLAGS]) +-- +1.7.2.5 + diff --git a/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0002-Revert-fixed-ios-Add-memory-barriers-to-atomic-Add-S.patch b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0002-Revert-fixed-ios-Add-memory-barriers-to-atomic-Add-S.patch new file mode 100644 index 0000000000..e0a4037bc5 --- /dev/null +++ b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0002-Revert-fixed-ios-Add-memory-barriers-to-atomic-Add-S.patch @@ -0,0 +1,97 @@ +From 7b2a8a7869d257cba35f53f6d877877c29cdac27 Mon Sep 17 00:00:00 2001 +From: Paul Menzel <paulepanter@users.sourceforge.net> +Date: Sun, 14 Aug 2011 21:53:47 +0200 +Subject: [PATCH 2/4] Revert "fixed:[ios] Add memory barriers to atomic Add/Subtract and Increment/Decrement functions to ensure synchronized accesses." + +This reverts commit 9a10c48710df79118e39e9b3bb0a15bf1fe694d1. + +The build (OpenEmbedded `angstrom-2010.x` for `MACHINE = "beagleboard") fails with the following error. + + make -C xbmc/threads + make[1]: Entering directory `/oe/build-angstrom-next/angstrom-dev/work/armv7a-angstrom-linux-gnueabi/xbmc-10.05-r11+gitr0+9a10c48710df79118e39e9b3bb0a15bf1fe694d1/git/xbmc/threads' + CPP Atomics.o + /tmp/ccIzTm3L.s: Assembler messages: + /tmp/ccIzTm3L.s:40: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:48: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:76: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:83: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:111: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:118: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:145: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:152: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:180: Error: garbage following instruction -- `dmb ish' + /tmp/ccIzTm3L.s:187: Error: garbage following instruction -- `dmb ish' + make[1]: *** [Atomics.o] Error 1 + make[1]: Leaving directory `/oe/build-angstrom-next/angstrom-dev/work/armv7a-angstrom-linux-gnueabi/xbmc-10.05-r11+gitr0+9a10c48710df79118e39e9b3bb0a15bf1fe694d1/git/xbmc/threads' + make: *** [xbmc/threads/threads.a] Error 2 +--- + xbmc/threads/Atomics.cpp | 8 -------- + 1 files changed, 0 insertions(+), 8 deletions(-) + +diff --git a/xbmc/threads/Atomics.cpp b/xbmc/threads/Atomics.cpp +index 5b09f18..0a98a7e 100644 +--- a/xbmc/threads/Atomics.cpp ++++ b/xbmc/threads/Atomics.cpp +@@ -194,14 +194,12 @@ long AtomicIncrement(volatile long* pAddr) + { + register long val; + asm volatile ( +- "dmb ish \n" // Memory barrier. Make sure all memory accesses appearing before this complete before any that appear after + "1: \n" + "ldrex %0, [%1] \n" // (val = *pAddr) + "add %0, #1 \n" // (val += 1) + "strex r1, %0, [%1] \n" + "cmp r1, #0 \n" + "bne 1b \n" +- "dmb ish \n" // Memory barrier. + : "=&r" (val) + : "r"(pAddr) + : "r1" +@@ -273,14 +271,12 @@ long AtomicAdd(volatile long* pAddr, long amount) + { + register long val; + asm volatile ( +- "dmb ish \n" // Memory barrier. Make sure all memory accesses appearing before this complete before any that appear after + "1: \n" + "ldrex %0, [%1] \n" // (val = *pAddr) + "add %0, %2 \n" // (val += amount) + "strex r1, %0, [%1] \n" + "cmp r1, #0 \n" + "bne 1b \n" +- "dmb ish \n" // Memory barrier. + : "=&r" (val) + : "r"(pAddr), "r"(amount) + : "r1" +@@ -351,14 +347,12 @@ long AtomicDecrement(volatile long* pAddr) + { + register long val; + asm volatile ( +- "dmb ish \n" // Memory barrier. Make sure all memory accesses appearing before this complete before any that appear after + "1: \n" + "ldrex %0, [%1] \n" // (val = *pAddr) + "sub %0, #1 \n" // (val -= 1) + "strex r1, %0, [%1] \n" + "cmp r1, #0 \n" + "bne 1b \n" +- "dmb ish \n" // Memory barrier. + : "=&r" (val) + : "r"(pAddr) + : "r1" +@@ -431,14 +425,12 @@ long AtomicSubtract(volatile long* pAddr, long amount) + { + register long val; + asm volatile ( +- "dmb ish \n" // Memory barrier. Make sure all memory accesses appearing before this complete before any that appear after + "1: \n" + "ldrex %0, [%1] \n" // (val = *pAddr) + "sub %0, %2 \n" // (val -= amount) + "strex r1, %0, [%1] \n" + "cmp r1, #0 \n" + "bne 1b \n" +- "dmb ish \n" // Memory barrier. + : "=&r" (val) + : "r"(pAddr), "r"(amount) + : "r1" +-- +1.7.2.5 + diff --git a/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0003-Revert-fixed-ios-Add-memory-barriers-to-cas-assembly.patch b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0003-Revert-fixed-ios-Add-memory-barriers-to-cas-assembly.patch new file mode 100644 index 0000000000..629017b7b4 --- /dev/null +++ b/meta-multimedia/recipes-mediacentre/xbmc/xbmc/0003-Revert-fixed-ios-Add-memory-barriers-to-cas-assembly.patch @@ -0,0 +1,69 @@ +From aaae1616a09d359b52e929f944ca0ceb4bb7f831 Mon Sep 17 00:00:00 2001 +From: Paul Menzel <paulepanter@users.sourceforge.net> +Date: Sun, 14 Aug 2011 21:55:09 +0200 +Subject: [PATCH 3/4] Revert "fixed:[ios] Add memory barriers to cas() assembly to ensure alignment of memory accesses." + +This reverts commit 92bab651e2253d172879995b50985645b77fecd2. + +The build (OpenEmbedded `angstrom-2010.x` for `MACHINE = "beagleboard") fails with the following error. + + CPP Atomics.o + make[1]: Entering directory `/oe/build-angstrom-next/angstrom-dev/work/armv7a-angstrom-linux-gnueabi/xbmc-10.05-r11+gitr0+92bab651e2253d172879995b50985645b77fecd2/git/xbmc/windows' + CPP GUIMediaWindow.o + /tmp/ccrsywuV.s: Assembler messages: + /tmp/ccrsywuV.s:40: Error: garbage following instruction -- `dmb ish' + /tmp/ccrsywuV.s:48: Error: garbage following instruction -- `dmb ish' + make[1]: *** [Atomics.o] Error 1 + make[1]: Leaving directory `/oe/build-angstrom-next/angstrom-dev/work/armv7a-angstrom-linux-gnueabi/xbmc-10.05-r11+gitr0+92bab651e2253d172879995b50985645b77fecd2/git/xbmc/threads' + make: *** [xbmc/threads/threads.a] Error 2 +--- + xbmc/threads/Atomics.cpp | 33 ++++++++++++++++----------------- + 1 files changed, 16 insertions(+), 17 deletions(-) + +diff --git a/xbmc/threads/Atomics.cpp b/xbmc/threads/Atomics.cpp +index 0a98a7e..0967eb2 100644 +--- a/xbmc/threads/Atomics.cpp ++++ b/xbmc/threads/Atomics.cpp +@@ -49,23 +49,22 @@ long cas(volatile long *pAddr, long expectedVal, long swapVal) + #elif defined(__arm__) + long cas(volatile long* pAddr, long expectedVal, long swapVal) + { +- register long prev; +- asm volatile ( +- "dmb ish \n" // Memory barrier. Make sure all memory accesses appearing before this complete before any that appear after +- "1: \n" +- "ldrex %0, [%1] \n" // Load the current value of *pAddr(%1) into prev (%0) and lock pAddr, +- "cmp %0, %2 \n" // Verify that the current value (%0) == old value (%2) +- "bne 2f \n" // Bail if the two values are not equal [not as expected] +- "strex r1, %3, [%1] \n" +- "cmp r1, #0 \n" +- "bne 1b \n" +- "dmb ish \n" // Memory barrier. +- "2: \n" +- : "=&r" (prev) +- : "r"(pAddr), "r"(expectedVal),"r"(swapVal) +- : "r1" +- ); +- return prev; ++ return(__sync_val_compare_and_swap(pAddr, expectedVal, swapVal)); ++// register long prev; ++// asm volatile ( ++// "1: \n" ++// "ldrex %0, [%1] \n" /* Load the current value of *pAddr(%1) into prev (%0) and lock pAddr, */ ++// "cmp %0, %2 \n" /* Verify that the current value (%0) == old value (%2) */ ++// "bne 2f \n" /* Bail if the two values are not equal [not as expected] */ ++// "strex r1, %3, [%1] \n" ++// "cmp r1, #0 \n" ++// "bne 1b \n" ++// "2: " ++// : "=&r" (prev) ++// : "r"(pAddr), "r"(expectedVal),"r"(swapVal) ++// : "r1" ++// ); ++// return prev; + } + + #elif defined(__mips__) +-- +1.7.2.5 + |