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author | Koen Kooi <koen@dominion.thruhere.net> | 2012-03-23 08:22:26 +0100 |
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committer | Koen Kooi <koen@dominion.thruhere.net> | 2012-03-24 07:35:22 +0100 |
commit | ff0f815593c33f1a82ba4d1cbe41e6b987da1f47 (patch) | |
tree | 22b43fa2e84f25cc948df79f9e9de07e8ec57418 /toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch | |
parent | 6b22bd198a87b5f113971d8fcd0e7211cd143c7d (diff) | |
download | meta-openembedded-contrib-ff0f815593c33f1a82ba4d1cbe41e6b987da1f47.tar.gz |
toolchain-layer: move binutils and gcc from meta-oe into here
Acked-by: Martin Jansa <Martin.Jansa@gmail.com>
Acked-by: Eric BĂ©nard <eric@eukrea.com>
Acked-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Diffstat (limited to 'toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch')
-rw-r--r-- | toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch new file mode 100644 index 0000000000..8aa06cc510 --- /dev/null +++ b/toolchain-layer/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99454.patch @@ -0,0 +1,46 @@ +2010-12-18 Andrew Stubbs <ams@codesourcery.com> + + Backport from mainline: + + gcc/ + 2010-12-17 Andrew Stubbs <ams@codesourcery.com> + + * config/arm/arm.md (maddhisi4, *maddhidi4): Use the canonical + operand order for plus. + Drop redundant % from constraints. + +=== modified file 'gcc/config/arm/arm.md' +--- old/gcc/config/arm/arm.md 2010-11-11 11:12:14 +0000 ++++ new/gcc/config/arm/arm.md 2011-01-05 11:42:19 +0000 +@@ -1791,11 +1791,11 @@ + + (define_insn "maddhisi4" + [(set (match_operand:SI 0 "s_register_operand" "=r") +- (plus:SI (match_operand:SI 3 "s_register_operand" "r") +- (mult:SI (sign_extend:SI +- (match_operand:HI 1 "s_register_operand" "%r")) ++ (plus:SI (mult:SI (sign_extend:SI ++ (match_operand:HI 1 "s_register_operand" "r")) + (sign_extend:SI +- (match_operand:HI 2 "s_register_operand" "r")))))] ++ (match_operand:HI 2 "s_register_operand" "r"))) ++ (match_operand:SI 3 "s_register_operand" "r")))] + "TARGET_DSP_MULTIPLY" + "smlabb%?\\t%0, %1, %2, %3" + [(set_attr "insn" "smlaxy") +@@ -1805,11 +1805,11 @@ + (define_insn "*maddhidi4" + [(set (match_operand:DI 0 "s_register_operand" "=r") + (plus:DI +- (match_operand:DI 3 "s_register_operand" "0") + (mult:DI (sign_extend:DI +- (match_operand:HI 1 "s_register_operand" "%r")) ++ (match_operand:HI 1 "s_register_operand" "r")) + (sign_extend:DI +- (match_operand:HI 2 "s_register_operand" "r")))))] ++ (match_operand:HI 2 "s_register_operand" "r"))) ++ (match_operand:DI 3 "s_register_operand" "0")))] + "TARGET_DSP_MULTIPLY" + "smlalbb%?\\t%Q0, %R0, %1, %2" + [(set_attr "insn" "smlalxy") + |