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authorKoen Kooi <koen@dominion.thruhere.net>2011-03-17 21:41:22 +0100
committerKoen Kooi <koen@dominion.thruhere.net>2011-03-17 21:41:22 +0100
commitc58cc7d3796dcee6e93885c835ed04cb566abeb2 (patch)
tree3eea4d4ef6a4ef79e0f4e025d7012c1a5cc38835 /meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
parenteec6ab97f712e06eb52c9f7c99e19ffab3ce9d74 (diff)
downloadmeta-openembedded-contrib-c58cc7d3796dcee6e93885c835ed04cb566abeb2.tar.gz
move layer into meta-oe in preparation for future splits
As per TSC decision Signed-off-by: Koen Kooi <koen@dominion.thruhere.net>
Diffstat (limited to 'meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch')
-rw-r--r--meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch45
1 files changed, 45 insertions, 0 deletions
diff --git a/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
new file mode 100644
index 0000000000..d8df57a448
--- /dev/null
+++ b/meta-oe/recipes-devtools/gcc/gcc-4.5/linaro/gcc-4.5-linaro-r99393.patch
@@ -0,0 +1,45 @@
+2010-09-13 Chung-Lin Tang <cltang@codesourcery.com>
+
+ Backport from mainline:
+
+ 2010-09-12 Bernd Schmidt <bernds@codesourcery.com>
+
+ gcc/
+ * config/arm/arm.md (arm_ashldi3_1bit, arm_ashrdi3_1bit,
+ arm_lshrdi3_1bit): Put earlyclobber on the right alternative.
+
+ 2010-09-10 Nathan Froyd <froydnj@codesourcery.com>
+
+ Issue #9120
+
+=== modified file 'gcc/config/arm/arm.md'
+--- old/gcc/config/arm/arm.md 2010-09-13 15:39:11 +0000
++++ new/gcc/config/arm/arm.md 2010-09-15 16:55:55 +0000
+@@ -3295,7 +3295,7 @@
+ )
+
+ (define_insn "arm_ashldi3_1bit"
+- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
++ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
+ (ashift:DI (match_operand:DI 1 "s_register_operand" "0,r")
+ (const_int 1)))
+ (clobber (reg:CC CC_REGNUM))]
+@@ -3354,7 +3354,7 @@
+ )
+
+ (define_insn "arm_ashrdi3_1bit"
+- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
++ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
+ (ashiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
+ (const_int 1)))
+ (clobber (reg:CC CC_REGNUM))]
+@@ -3410,7 +3410,7 @@
+ )
+
+ (define_insn "arm_lshrdi3_1bit"
+- [(set (match_operand:DI 0 "s_register_operand" "=&r,r")
++ [(set (match_operand:DI 0 "s_register_operand" "=r,&r")
+ (lshiftrt:DI (match_operand:DI 1 "s_register_operand" "0,r")
+ (const_int 1)))
+ (clobber (reg:CC CC_REGNUM))]
+