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2018-03-25site/risc-v: Cache common variables to build libIDLKhem Raj
These variables force runtime tests during configure they are already cached for other architectures Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2018-03-15site/riscv: Shunt the realloc configure test for startup-notificationKhem Raj
Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
2017-11-05site: Add riscv32 and riscv64Khem Raj
Signed-off-by: Khem Raj <raj.khem@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>