diff options
Diffstat (limited to 'meta/recipes-devtools/gcc')
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-10.2.inc (renamed from meta/recipes-devtools/gcc/gcc-9.2.inc) | 64 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/0020-gcc-4.8-won-t-build-with-disable-dependency-tracking.patch | 54 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/0030-libgcc-Add-knob-to-use-ldbl-128-on-ppc.patch | 79 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/0037-Fix-up-libsanitizer-build-with-master-glibc.patch | 70 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-14250.patch | 44 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_1.patch | 521 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_2.patch | 77 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_3.patch | 62 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch | 95 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-configure-common.inc | 1 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-cross-canadian.inc | 31 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-cross-canadian_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-cross-canadian_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-cross.inc | 4 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-cross_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-cross_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-crosssdk_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-crosssdk_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-runtime.inc | 23 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-runtime_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-runtime_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-sanitizers_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-sanitizers_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-source_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc-source_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc-target.inc | 18 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0001-aarch64-Fix-up-__aarch64_cas16_acq_rel-fallback.patch | 66 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch | 202 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch) | 15 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0002-aarch64-Introduce-SLS-mitigation-for-RET-and-BR-inst.patch | 607 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0002-gcc-poison-system-directories.patch) | 47 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0003-aarch64-Mitigate-SLS-for-BLR-instruction.patch | 658 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0004-64-bit-multilib-hack.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0004-64-bit-multilib-hack.patch) | 15 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0005-optional-libstdc.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0005-optional-libstdc.patch) | 29 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0006-COLLECT_GCC_OPTIONS.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0006-COLLECT_GCC_OPTIONS.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch) | 20 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0008-fortran-cross-compile-hack.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0008-fortran-cross-compile-hack.patch) | 15 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0009-cpp-honor-sysroot.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0009-cpp-honor-sysroot.patch) | 13 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0010-MIPS64-Default-to-N64-ABI.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0010-MIPS64-Default-to-N64-ABI.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch) | 28 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0012-gcc-Fix-argument-list-too-long-error.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0012-gcc-Fix-argument-list-too-long-error.patch) | 17 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0013-Disable-sdt.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0013-Disable-sdt.patch) | 23 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0014-libtool.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0014-libtool.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch) | 25 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0018-export-CPP.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0018-export-CPP.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0019-Ensure-target-gcc-headers-can-be-included.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0019-Ensure-target-gcc-headers-can-be-included.patch) | 16 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0020-Don-t-search-host-directory-during-relink-if-inst_pr.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0021-Don-t-search-host-directory-during-relink-if-inst_pr.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0021-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0022-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0022-aarch64-Add-support-for-musl-ldso.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0023-aarch64-Add-support-for-musl-ldso.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0023-libcc1-fix-libcc1-s-install-path-and-rpath.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0024-libcc1-fix-libcc1-s-install-path-and-rpath.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0024-handle-sysroot-support-for-nativesdk-gcc.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0025-handle-sysroot-support-for-nativesdk-gcc.patch) | 112 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0025-Search-target-sysroot-gcc-version-specific-dirs-with.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0026-Search-target-sysroot-gcc-version-specific-dirs-with.patch) | 13 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0026-Fix-various-_FOR_BUILD-and-related-variables.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0027-Fix-various-_FOR_BUILD-and-related-variables.patch) | 27 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0027-nios2-Define-MUSL_DYNAMIC_LINKER.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0028-nios2-Define-MUSL_DYNAMIC_LINKER.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0028-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0029-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch) | 15 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0029-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0031-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0030-sync-gcc-stddef.h-with-musl.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0033-sync-gcc-stddef.h-with-musl.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0031-fix-segmentation-fault-in-precompiled-header-generat.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0034-fix-segmentation-fault-in-precompiled-header-generat.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0032-Fix-for-testsuite-failure.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0035-Fix-for-testsuite-failure.patch) | 9 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0033-Re-introduce-spe-commandline-options.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0036-Re-introduce-spe-commandline-options.patch) | 11 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0034-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch (renamed from meta/recipes-devtools/gcc/gcc-9.2/0032-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch) | 29 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0035-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch | 182 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0036-mingw32-Enable-operation_not_supported.patch | 26 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc/0037-libatomic-Do-not-enforce-march-on-aarch64.patch | 42 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/gcc_10.2.bb (renamed from meta/recipes-devtools/gcc/gcc_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/libgcc-initial_10.2.bb (renamed from meta/recipes-devtools/gcc/libgcc-initial_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/libgcc_10.2.bb (renamed from meta/recipes-devtools/gcc/libgcc_9.2.bb) | 0 | ||||
| -rw-r--r-- | meta/recipes-devtools/gcc/libgfortran_10.2.bb (renamed from meta/recipes-devtools/gcc/libgfortran_9.2.bb) | 0 |
65 files changed, 2126 insertions, 1428 deletions
diff --git a/meta/recipes-devtools/gcc/gcc-9.2.inc b/meta/recipes-devtools/gcc/gcc-10.2.inc index 2bae85afe3..7625af5110 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2.inc +++ b/meta/recipes-devtools/gcc/gcc-10.2.inc @@ -2,13 +2,13 @@ require gcc-common.inc # Third digit in PV should be incremented after a minor release -PV = "9.2.0" +PV = "10.2.0" # BINV should be incremented to a revision after a minor gcc release -BINV = "9.2.0" +BINV = "10.2.0" -FILESEXTRAPATHS =. "${FILE_DIRNAME}/gcc-9.2:${FILE_DIRNAME}/gcc-9.2/backport:" +FILESEXTRAPATHS =. "${FILE_DIRNAME}/gcc:${FILE_DIRNAME}/gcc/backport:" DEPENDS =+ "mpfr gmp libmpc zlib flex-native" NATIVEDEPS = "mpfr-native gmp-native libmpc-native zlib-native flex-native" @@ -24,8 +24,8 @@ LIC_FILES_CHKSUM = "\ " BASEURI ?= "${GNU_MIRROR}/gcc/gcc-${PV}/gcc-${PV}.tar.xz" -#RELEASE ?= "5a5ca2d" -#BASEURI ?= "https://repo.or.cz/official-gcc.git/snapshot/${RELEASE}.tar.gz;downloadfilename=gcc-${RELEASE}.tar.gz" +#RELEASE ?= "93a49d2d2292893b9b7f38132df949c70942838c" +#BASEURI ?= "https://github.com/gcc-mirror/gcc/archive/${RELEASE}.zip;downloadfilename=gcc-${PV}-${RELEASE}.zip" SRC_URI = "\ ${BASEURI} \ file://0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch \ @@ -47,36 +47,34 @@ SRC_URI = "\ file://0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch \ file://0018-export-CPP.patch \ file://0019-Ensure-target-gcc-headers-can-be-included.patch \ - file://0020-gcc-4.8-won-t-build-with-disable-dependency-tracking.patch \ - file://0021-Don-t-search-host-directory-during-relink-if-inst_pr.patch \ - file://0022-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch \ - file://0023-aarch64-Add-support-for-musl-ldso.patch \ - file://0024-libcc1-fix-libcc1-s-install-path-and-rpath.patch \ - file://0025-handle-sysroot-support-for-nativesdk-gcc.patch \ - file://0026-Search-target-sysroot-gcc-version-specific-dirs-with.patch \ - file://0027-Fix-various-_FOR_BUILD-and-related-variables.patch \ - file://0028-nios2-Define-MUSL_DYNAMIC_LINKER.patch \ - file://0029-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch \ - file://0030-libgcc-Add-knob-to-use-ldbl-128-on-ppc.patch \ - file://0031-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch \ - file://0032-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch \ - file://0033-sync-gcc-stddef.h-with-musl.patch \ - file://0034-fix-segmentation-fault-in-precompiled-header-generat.patch \ - file://0035-Fix-for-testsuite-failure.patch \ - file://0036-Re-introduce-spe-commandline-options.patch \ - file://0037-Fix-up-libsanitizer-build-with-master-glibc.patch \ - file://CVE-2019-14250.patch \ - file://CVE-2019-15847_1.patch \ - file://CVE-2019-15847_2.patch \ - file://CVE-2019-15847_3.patch \ - file://re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch \ + file://0020-Don-t-search-host-directory-during-relink-if-inst_pr.patch \ + file://0021-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch \ + file://0022-aarch64-Add-support-for-musl-ldso.patch \ + file://0023-libcc1-fix-libcc1-s-install-path-and-rpath.patch \ + file://0024-handle-sysroot-support-for-nativesdk-gcc.patch \ + file://0025-Search-target-sysroot-gcc-version-specific-dirs-with.patch \ + file://0026-Fix-various-_FOR_BUILD-and-related-variables.patch \ + file://0027-nios2-Define-MUSL_DYNAMIC_LINKER.patch \ + file://0028-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch \ + file://0029-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch \ + file://0030-sync-gcc-stddef.h-with-musl.patch \ + file://0031-fix-segmentation-fault-in-precompiled-header-generat.patch \ + file://0032-Fix-for-testsuite-failure.patch \ + file://0033-Re-introduce-spe-commandline-options.patch \ + file://0034-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch \ + file://0035-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch \ + file://0036-mingw32-Enable-operation_not_supported.patch \ + file://0037-libatomic-Do-not-enforce-march-on-aarch64.patch \ + file://0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch \ + file://0002-aarch64-Introduce-SLS-mitigation-for-RET-and-BR-inst.patch \ + file://0003-aarch64-Mitigate-SLS-for-BLR-instruction.patch \ + file://0001-aarch64-Fix-up-__aarch64_cas16_acq_rel-fallback.patch \ " -S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" -SRC_URI[md5sum] = "3818ad8600447f05349098232c2ddc78" -SRC_URI[sha256sum] = "ea6ef08f121239da5695f76c9b33637a118dcf63e24164422231917fa61fb206" +SRC_URI[sha256sum] = "b8dd4368bb9c7f0b98188317ee0254dd8cc99d1e3a18d0ff146c855fe16c1d8c" +S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" # For dev release snapshotting -#S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/official-gcc-${RELEASE}" +#S = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${RELEASE}" #B = "${WORKDIR}/gcc-${PV}/build.${HOST_SYS}.${TARGET_SYS}" # Language Overrides @@ -92,7 +90,6 @@ EXTRA_OECONF_BASE = "\ ${SSP} \ --enable-libitm \ --disable-bootstrap \ - --disable-libmudflap \ --with-system-zlib \ ${@'--with-linker-hash-style=${LINKER_HASH_STYLE}' if '${LINKER_HASH_STYLE}' else ''} \ --enable-linker-build-id \ @@ -104,7 +101,6 @@ EXTRA_OECONF_BASE = "\ " EXTRA_OECONF_INITIAL = "\ - --disable-libmudflap \ --disable-libgomp \ --disable-libitm \ --disable-libquadmath \ diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0020-gcc-4.8-won-t-build-with-disable-dependency-tracking.patch b/meta/recipes-devtools/gcc/gcc-9.2/0020-gcc-4.8-won-t-build-with-disable-dependency-tracking.patch deleted file mode 100644 index b0f96d06d4..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/0020-gcc-4.8-won-t-build-with-disable-dependency-tracking.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 83bcd4cc47ae63971c888c117abd00dfd506532c Mon Sep 17 00:00:00 2001 -From: Khem Raj <raj.khem@gmail.com> -Date: Fri, 20 Feb 2015 11:17:19 +0000 -Subject: [PATCH 20/36] gcc 4.8+ won't build with --disable-dependency-tracking - -since the *.Ppo files don't get created unless --enable-dependency-tracking is true. - -This patch ensures we only use those compiler options when its enabled. - -Upstream-Status: Submitted - -(Problem was already reported upstream, attached this patch there -http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55930) - -RP -2012/09/22 - -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - libatomic/Makefile.am | 3 ++- - libatomic/Makefile.in | 3 ++- - 2 files changed, 4 insertions(+), 2 deletions(-) - -diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am -index c1b7c73934a..ef43d62c07a 100644 ---- a/libatomic/Makefile.am -+++ b/libatomic/Makefile.am -@@ -101,7 +101,8 @@ PAT_S = $(word 3,$(PAT_SPLIT)) - IFUNC_DEF = -DIFUNC_ALT=$(PAT_S) - IFUNC_OPT = $(word $(PAT_S),$(IFUNC_OPTIONS)) - --M_DEPS = -MT $@ -MD -MP -MF $(DEPDIR)/$(@F).Ppo -+@AMDEP_TRUE@M_DEPS = -MT $@ -MD -MP -MF $(DEPDIR)/$(@F).Ppo -+@AMDEP_FALSE@M_DEPS = - M_SIZE = -DN=$(PAT_N) - M_IFUNC = $(if $(PAT_S),$(IFUNC_DEF) $(IFUNC_OPT)) - M_FILE = $(PAT_BASE)_n.c -diff --git a/libatomic/Makefile.in b/libatomic/Makefile.in -index 29324e3e0ac..d5cdb4259ef 100644 ---- a/libatomic/Makefile.in -+++ b/libatomic/Makefile.in -@@ -414,7 +414,8 @@ PAT_N = $(word 2,$(PAT_SPLIT)) - PAT_S = $(word 3,$(PAT_SPLIT)) - IFUNC_DEF = -DIFUNC_ALT=$(PAT_S) - IFUNC_OPT = $(word $(PAT_S),$(IFUNC_OPTIONS)) --M_DEPS = -MT $@ -MD -MP -MF $(DEPDIR)/$(@F).Ppo -+@AMDEP_TRUE@M_DEPS = -MT $@ -MD -MP -MF $(DEPDIR)/$(@F).Ppo -+@AMDEP_FALSE@M_DEPS = - M_SIZE = -DN=$(PAT_N) - M_IFUNC = $(if $(PAT_S),$(IFUNC_DEF) $(IFUNC_OPT)) - M_FILE = $(PAT_BASE)_n.c --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0030-libgcc-Add-knob-to-use-ldbl-128-on-ppc.patch b/meta/recipes-devtools/gcc/gcc-9.2/0030-libgcc-Add-knob-to-use-ldbl-128-on-ppc.patch deleted file mode 100644 index 38eab5a083..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/0030-libgcc-Add-knob-to-use-ldbl-128-on-ppc.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 47467f3ab0fb2f2fcede81060fe8bb339d0909eb Mon Sep 17 00:00:00 2001 -From: Szabolcs Nagy <nsz@port70.net> -Date: Wed, 28 Feb 2018 00:54:05 +0000 -Subject: [PATCH 10/12] ldbl128 config - -Upstream-Status: Pending - -Signed-off-by: Khem Raj <raj.khem@gmail.com> ---- - gcc/configure | 13 +++++++++++++ - gcc/configure.ac | 16 ++++++++++++++-- - 2 files changed, 27 insertions(+), 2 deletions(-) - -diff --git a/gcc/configure b/gcc/configure -index 6121e163259..07ff8597d48 100755 ---- a/gcc/configure -+++ b/gcc/configure -@@ -29309,6 +29309,15 @@ if test "${with_long_double_128+set}" = set; then : - withval=$with_long_double_128; gcc_cv_target_ldbl128="$with_long_double_128" - else - -+ case "$target" in -+ s390*-*-linux-musl*) -+ gcc_cv_target_ldbl128=yes -+ ;; -+ powerpc*-*-linux-musl*) -+ gcc_cv_target_ldbl128=no -+ ;; -+ *) -+ - if test $glibc_version_major -gt 2 \ - || ( test $glibc_version_major -eq 2 && test $glibc_version_minor -ge 4 ); then : - gcc_cv_target_ldbl128=yes -@@ -29320,6 +29329,10 @@ else - && gcc_cv_target_ldbl128=yes - - fi -+ -+ ;; -+ esac -+ - fi - - ;; -diff --git a/gcc/configure.ac b/gcc/configure.ac -index b066cc609e1..6c15ed898c0 100644 ---- a/gcc/configure.ac -+++ b/gcc/configure.ac -@@ -5971,13 +5971,25 @@ case "$target" in - AC_ARG_WITH(long-double-128, - [AS_HELP_STRING([--with-long-double-128], - [use 128-bit long double by default])], -- gcc_cv_target_ldbl128="$with_long_double_128", -+ gcc_cv_target_ldbl128="$with_long_double_128", [ -+ case "$target" in -+ s390*-*-linux-musl*) -+ gcc_cv_target_ldbl128=yes -+ ;; -+ powerpc*-*-linux-musl*) -+ gcc_cv_target_ldbl128=no -+ ;; -+ *)] - [GCC_GLIBC_VERSION_GTE_IFELSE([2], [4], [gcc_cv_target_ldbl128=yes], [ - [gcc_cv_target_ldbl128=no - grep '^[ ]*#[ ]*define[ ][ ]*__LONG_DOUBLE_MATH_OPTIONAL' \ - $target_header_dir/bits/wordsize.h > /dev/null 2>&1 \ - && gcc_cv_target_ldbl128=yes -- ]])]) -+ ]])] -+ [ -+ ;; -+ esac -+ ]) - ;; - esac - if test x$gcc_cv_target_ldbl128 = xyes; then --- -2.17.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0037-Fix-up-libsanitizer-build-with-master-glibc.patch b/meta/recipes-devtools/gcc/gcc-9.2/0037-Fix-up-libsanitizer-build-with-master-glibc.patch deleted file mode 100644 index abe074c289..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/0037-Fix-up-libsanitizer-build-with-master-glibc.patch +++ /dev/null @@ -1,70 +0,0 @@ -From 7ed24d12664319f34625a12fd8c0f729a0e71f5c Mon Sep 17 00:00:00 2001 -From: Auto Builder <ab@rdk> -Date: Sun, 22 Dec 2019 02:58:24 +0000 -Subject: [PATCH] Fix up libsanitizer build with master glibc - -2019-11-26 Jakub Jelinek <jakub@redhat.com> - - PR sanitizer/92154 - * sanitizer_common/sanitizer_platform_limits_posix.h: Cherry-pick - llvm-project revision 947f9692440836dcb8d88b74b69dd379d85974ce. - * sanitizer_common/sanitizer_platform_limits_posix.cpp: Likewise. - -Upstream-Status: Backport [https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=b02486e0951bc0ed38310a03be73e479fc6f3e7a;hp=3feeac76ffc38427de2d7d086e2928e63eee2d44] -Signed-off-by: Auto Builder <ab@rdk> ---- - .../sanitizer_platform_limits_posix.cc | 5 +++-- - .../sanitizer_platform_limits_posix.h | 15 +-------------- - 2 files changed, 4 insertions(+), 16 deletions(-) - -diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc -index 6cd4a5bac..d823a1219 100644 ---- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc -+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.cc -@@ -1156,8 +1156,9 @@ CHECK_SIZE_AND_OFFSET(ipc_perm, uid); - CHECK_SIZE_AND_OFFSET(ipc_perm, gid); - CHECK_SIZE_AND_OFFSET(ipc_perm, cuid); - CHECK_SIZE_AND_OFFSET(ipc_perm, cgid); --#if !defined(__aarch64__) || !SANITIZER_LINUX || __GLIBC_PREREQ (2, 21) --/* On aarch64 glibc 2.20 and earlier provided incorrect mode field. */ -+#if !SANITIZER_LINUX || __GLIBC_PREREQ (2, 31) -+/* glibc 2.30 and earlier provided 16-bit mode field instead of 32-bit -+ on many architectures. */ - CHECK_SIZE_AND_OFFSET(ipc_perm, mode); - #endif - -diff --git a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h -index 73af92af1..6a673a7c9 100644 ---- a/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h -+++ b/libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h -@@ -211,26 +211,13 @@ namespace __sanitizer { - u64 __unused1; - u64 __unused2; - #elif defined(__sparc__) --#if defined(__arch64__) - unsigned mode; -- unsigned short __pad1; --#else -- unsigned short __pad1; -- unsigned short mode; - unsigned short __pad2; --#endif - unsigned short __seq; - unsigned long long __unused1; - unsigned long long __unused2; --#elif defined(__mips__) || defined(__aarch64__) || defined(__s390x__) -- unsigned int mode; -- unsigned short __seq; -- unsigned short __pad1; -- unsigned long __unused1; -- unsigned long __unused2; - #else -- unsigned short mode; -- unsigned short __pad1; -+ unsigned int mode; - unsigned short __seq; - unsigned short __pad2; - #if defined(__x86_64__) && !defined(_LP64) --- -2.17.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-14250.patch b/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-14250.patch deleted file mode 100644 index 65ea34558a..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-14250.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 517b211a3d78366ca8d5929f580e8ca72fd2c004 Mon Sep 17 00:00:00 2001 -From: rguenth <rguenth@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Thu, 25 Jul 2019 10:46:54 +0000 -Subject: [PATCH] 2019-07-25 Richard Biener <rguenther@suse.de> - - PR lto/90924 - Backport from mainline - 2019-07-12 Ren Kimura <rkx1209dev@gmail.com> - - * simple-object-elf.c (simple_object_elf_match): Check zero value - shstrndx. - - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@273793 138bc75d-0d04-0410-961f-82ee72b054a4 - -Upstream-Status: Backport -Affectes: < 9.2 -CVE: CVE-2019-14250 -Dropped changelog -Signed-off-by: Armin Kuster <Akustre@mvista.com> - ---- - libiberty/simple-object-elf.c | 8 ++++++++ - 2 files changed, 17 insertions(+) - -Index: gcc-9.2.0/libiberty/simple-object-elf.c -=================================================================== ---- gcc-9.2.0.orig/libiberty/simple-object-elf.c -+++ gcc-9.2.0/libiberty/simple-object-elf.c -@@ -557,6 +557,14 @@ simple_object_elf_match (unsigned char h - return NULL; - } - -+ if (eor->shstrndx == 0) -+ { -+ *errmsg = "invalid ELF shstrndx == 0"; -+ *err = 0; -+ XDELETE (eor); -+ return NULL; -+ } -+ - return (void *) eor; - } - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_1.patch b/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_1.patch deleted file mode 100644 index 227fd47c95..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_1.patch +++ /dev/null @@ -1,521 +0,0 @@ -From 8c61566116d23063ff597271884f8e00d94ab1a1 Mon Sep 17 00:00:00 2001 -From: segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Fri, 30 Aug 2019 13:48:48 +0000 -Subject: [PATCH] Backport from trunk 2019-08-22 Segher Boessenkool - <segher@kernel.crashing.org> - - * config/rs6000/altivec.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32, - UNSPEC_DARN_RAW, UNSPEC_CMPRB, UNSPEC_CMPRB2, UNSPEC_CMPEQB; move to... - * config/rs6000/rs6000.md (unspec): ... here. - * config/rs6000/altivec.md (darn_32, darn_raw, darn, cmprb, - *cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal, - cmpeqb, *cmpeqb_internal): Delete, move to... - * config/rs6000/rs6000.md (darn_32, darn_raw, darn, cmprb, - *cmprb_internal, setb_signed, setb_unsigned, cmprb2, *cmprb2_internal, - cmpeqb, *cmpeqb_internal): ... here. - - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@275170 138bc75d-0d04-0410-961f-82ee72b054a4 - -Upstream-Status: Backport -CVE: CVE-2019-15847 p1 -Affects <= 9.2.0 -Dropped Changelog changes -Signed-off-by: Armin Kuster <akuster@mvista.com> - ---- - gcc/config/rs6000/altivec.md | 223 ---------------------------------- - gcc/config/rs6000/rs6000.md | 224 +++++++++++++++++++++++++++++++++++ - 3 files changed, 239 insertions(+), 223 deletions(-) - -Index: gcc-9.2.0/gcc/config/rs6000/altivec.md -=================================================================== ---- gcc-9.2.0.orig/gcc/config/rs6000/altivec.md -+++ gcc-9.2.0/gcc/config/rs6000/altivec.md -@@ -80,9 +80,6 @@ - UNSPEC_VUPKHPX - UNSPEC_VUPKLPX - UNSPEC_CONVERT_4F32_8I16 -- UNSPEC_DARN -- UNSPEC_DARN_32 -- UNSPEC_DARN_RAW - UNSPEC_DST - UNSPEC_DSTT - UNSPEC_DSTST -@@ -161,9 +158,6 @@ - UNSPEC_BCDADD - UNSPEC_BCDSUB - UNSPEC_BCD_OVERFLOW -- UNSPEC_CMPRB -- UNSPEC_CMPRB2 -- UNSPEC_CMPEQB - UNSPEC_VRLMI - UNSPEC_VRLNM - ]) -@@ -4101,223 +4095,6 @@ - "bcd<bcd_add_sub>. %0,%1,%2,%3" - [(set_attr "type" "vecsimple")]) - --(define_insn "darn_32" -- [(set (match_operand:SI 0 "register_operand" "=r") -- (unspec:SI [(const_int 0)] UNSPEC_DARN_32))] -- "TARGET_P9_MISC" -- "darn %0,0" -- [(set_attr "type" "integer")]) -- --(define_insn "darn_raw" -- [(set (match_operand:DI 0 "register_operand" "=r") -- (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))] -- "TARGET_P9_MISC && TARGET_64BIT" -- "darn %0,2" -- [(set_attr "type" "integer")]) -- --(define_insn "darn" -- [(set (match_operand:DI 0 "register_operand" "=r") -- (unspec:DI [(const_int 0)] UNSPEC_DARN))] -- "TARGET_P9_MISC && TARGET_64BIT" -- "darn %0,1" -- [(set_attr "type" "integer")]) -- --;; Test byte within range. --;; --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the range specified by operand 2. --;; The bytes of operand 2 are organized as xx:xx:hi:lo. --;; --;; Return in target register operand 0 a value of 1 if lo <= vv and --;; vv <= hi. Otherwise, set register operand 0 to 0. --;; --;; Though the instructions to which this expansion maps operate on --;; 64-bit registers, the current implementation only operates on --;; SI-mode operands as the high-order bits provide no information --;; that is not already available in the low-order bits. To avoid the --;; costs of data widening operations, future enhancements might allow --;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. --(define_expand "cmprb" -- [(set (match_dup 3) -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:SI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPRB)) -- (set (match_operand:SI 0 "gpc_reg_operand" "=r") -- (if_then_else:SI (lt (match_dup 3) -- (const_int 0)) -- (const_int -1) -- (if_then_else (gt (match_dup 3) -- (const_int 0)) -- (const_int 1) -- (const_int 0))))] -- "TARGET_P9_MISC" --{ -- operands[3] = gen_reg_rtx (CCmode); --}) -- --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the range specified by operand 2. --;; The bytes of operand 2 are organized as xx:xx:hi:lo. --;; --;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if --;; lo <= vv and vv <= hi. Otherwise, set the GT bit to 0. The other --;; 3 bits of the target CR register are all set to 0. --(define_insn "*cmprb_internal" -- [(set (match_operand:CC 0 "cc_reg_operand" "=y") -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:SI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPRB))] -- "TARGET_P9_MISC" -- "cmprb %0,0,%1,%2" -- [(set_attr "type" "logical")]) -- --;; Set operand 0 register to -1 if the LT bit (0x8) of condition --;; register operand 1 is on. Otherwise, set operand 0 register to 1 --;; if the GT bit (0x4) of condition register operand 1 is on. --;; Otherwise, set operand 0 to 0. Note that the result stored into --;; register operand 0 is non-zero iff either the LT or GT bits are on --;; within condition register operand 1. --(define_insn "setb_signed" -- [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -- (if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y") -- (const_int 0)) -- (const_int -1) -- (if_then_else (gt (match_dup 1) -- (const_int 0)) -- (const_int 1) -- (const_int 0))))] -- "TARGET_P9_MISC" -- "setb %0,%1" -- [(set_attr "type" "logical")]) -- --(define_insn "setb_unsigned" -- [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -- (if_then_else:SI (ltu (match_operand:CCUNS 1 "cc_reg_operand" "y") -- (const_int 0)) -- (const_int -1) -- (if_then_else (gtu (match_dup 1) -- (const_int 0)) -- (const_int 1) -- (const_int 0))))] -- "TARGET_P9_MISC" -- "setb %0,%1" -- [(set_attr "type" "logical")]) -- --;; Test byte within two ranges. --;; --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the range specified by operand 2. --;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2. --;; --;; Return in target register operand 0 a value of 1 if (lo_1 <= vv and --;; vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2). Otherwise, set register --;; operand 0 to 0. --;; --;; Though the instructions to which this expansion maps operate on --;; 64-bit registers, the current implementation only operates on --;; SI-mode operands as the high-order bits provide no information --;; that is not already available in the low-order bits. To avoid the --;; costs of data widening operations, future enhancements might allow --;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. --(define_expand "cmprb2" -- [(set (match_dup 3) -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:SI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPRB2)) -- (set (match_operand:SI 0 "gpc_reg_operand" "=r") -- (if_then_else:SI (lt (match_dup 3) -- (const_int 0)) -- (const_int -1) -- (if_then_else (gt (match_dup 3) -- (const_int 0)) -- (const_int 1) -- (const_int 0))))] -- "TARGET_P9_MISC" --{ -- operands[3] = gen_reg_rtx (CCmode); --}) -- --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the ranges specified by operand 2. --;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2. --;; --;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if --;; (lo_1 <= vv and vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2). --;; Otherwise, set the GT bit to 0. The other 3 bits of the target --;; CR register are all set to 0. --(define_insn "*cmprb2_internal" -- [(set (match_operand:CC 0 "cc_reg_operand" "=y") -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:SI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPRB2))] -- "TARGET_P9_MISC" -- "cmprb %0,1,%1,%2" -- [(set_attr "type" "logical")]) -- --;; Test byte membership within set of 8 bytes. --;; --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the set specified by operand 2. --;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7. --;; --;; Return in target register operand 0 a value of 1 if vv equals one --;; of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise, set --;; register operand 0 to 0. Note that the 8 byte values held within --;; operand 2 need not be unique. --;; --;; Though the instructions to which this expansion maps operate on --;; 64-bit registers, the current implementation requires that operands --;; 0 and 1 have mode SI as the high-order bits provide no information --;; that is not already available in the low-order bits. To avoid the --;; costs of data widening operations, future enhancements might allow --;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. --(define_expand "cmpeqb" -- [(set (match_dup 3) -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:DI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPEQB)) -- (set (match_operand:SI 0 "gpc_reg_operand" "=r") -- (if_then_else:SI (lt (match_dup 3) -- (const_int 0)) -- (const_int -1) -- (if_then_else (gt (match_dup 3) -- (const_int 0)) -- (const_int 1) -- (const_int 0))))] -- "TARGET_P9_MISC && TARGET_64BIT" --{ -- operands[3] = gen_reg_rtx (CCmode); --}) -- --;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx --;; represents a byte whose value is ignored in this context and --;; vv, the least significant byte, holds the byte value that is to --;; be tested for membership within the set specified by operand 2. --;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7. --;; --;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if vv --;; equals one of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise, --;; set the GT bit to zero. The other 3 bits of the target CR register --;; are all set to 0. --(define_insn "*cmpeqb_internal" -- [(set (match_operand:CC 0 "cc_reg_operand" "=y") -- (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -- (match_operand:DI 2 "gpc_reg_operand" "r")] -- UNSPEC_CMPEQB))] -- "TARGET_P9_MISC && TARGET_64BIT" -- "cmpeqb %0,%1,%2" -- [(set_attr "type" "logical")]) -- - (define_expand "bcd<bcd_add_sub>_<code>" - [(parallel [(set (reg:CCFP CR6_REGNO) - (compare:CCFP -Index: gcc-9.2.0/gcc/config/rs6000/rs6000.md -=================================================================== ---- gcc-9.2.0.orig/gcc/config/rs6000/rs6000.md -+++ gcc-9.2.0/gcc/config/rs6000/rs6000.md -@@ -137,6 +137,12 @@ - UNSPEC_LSQ - UNSPEC_FUSION_GPR - UNSPEC_STACK_CHECK -+ UNSPEC_DARN -+ UNSPEC_DARN_32 -+ UNSPEC_DARN_RAW -+ UNSPEC_CMPRB -+ UNSPEC_CMPRB2 -+ UNSPEC_CMPEQB - UNSPEC_ADD_ROUND_TO_ODD - UNSPEC_SUB_ROUND_TO_ODD - UNSPEC_MUL_ROUND_TO_ODD -@@ -14322,7 +14328,225 @@ - "xscmpuqp %0,%1,%2" - [(set_attr "type" "veccmp") - (set_attr "size" "128")]) -+ -+;; Miscellaneous ISA 3.0 (power9) instructions -+ -+(define_insn "darn_32" -+ [(set (match_operand:SI 0 "register_operand" "=r") -+ (unspec:SI [(const_int 0)] UNSPEC_DARN_32))] -+ "TARGET_P9_MISC" -+ "darn %0,0" -+ [(set_attr "type" "integer")]) -+ -+(define_insn "darn_raw" -+ [(set (match_operand:DI 0 "register_operand" "=r") -+ (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))] -+ "TARGET_P9_MISC && TARGET_64BIT" -+ "darn %0,2" -+ [(set_attr "type" "integer")]) -+ -+(define_insn "darn" -+ [(set (match_operand:DI 0 "register_operand" "=r") -+ (unspec:DI [(const_int 0)] UNSPEC_DARN))] -+ "TARGET_P9_MISC && TARGET_64BIT" -+ "darn %0,1" -+ [(set_attr "type" "integer")]) -+ -+;; Test byte within range. -+;; -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the range specified by operand 2. -+;; The bytes of operand 2 are organized as xx:xx:hi:lo. -+;; -+;; Return in target register operand 0 a value of 1 if lo <= vv and -+;; vv <= hi. Otherwise, set register operand 0 to 0. -+;; -+;; Though the instructions to which this expansion maps operate on -+;; 64-bit registers, the current implementation only operates on -+;; SI-mode operands as the high-order bits provide no information -+;; that is not already available in the low-order bits. To avoid the -+;; costs of data widening operations, future enhancements might allow -+;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. -+(define_expand "cmprb" -+ [(set (match_dup 3) -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:SI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPRB)) -+ (set (match_operand:SI 0 "gpc_reg_operand" "=r") -+ (if_then_else:SI (lt (match_dup 3) -+ (const_int 0)) -+ (const_int -1) -+ (if_then_else (gt (match_dup 3) -+ (const_int 0)) -+ (const_int 1) -+ (const_int 0))))] -+ "TARGET_P9_MISC" -+{ -+ operands[3] = gen_reg_rtx (CCmode); -+}) -+ -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the range specified by operand 2. -+;; The bytes of operand 2 are organized as xx:xx:hi:lo. -+;; -+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if -+;; lo <= vv and vv <= hi. Otherwise, set the GT bit to 0. The other -+;; 3 bits of the target CR register are all set to 0. -+(define_insn "*cmprb_internal" -+ [(set (match_operand:CC 0 "cc_reg_operand" "=y") -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:SI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPRB))] -+ "TARGET_P9_MISC" -+ "cmprb %0,0,%1,%2" -+ [(set_attr "type" "logical")]) -+ -+;; Set operand 0 register to -1 if the LT bit (0x8) of condition -+;; register operand 1 is on. Otherwise, set operand 0 register to 1 -+;; if the GT bit (0x4) of condition register operand 1 is on. -+;; Otherwise, set operand 0 to 0. Note that the result stored into -+;; register operand 0 is non-zero iff either the LT or GT bits are on -+;; within condition register operand 1. -+(define_insn "setb_signed" -+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -+ (if_then_else:SI (lt (match_operand:CC 1 "cc_reg_operand" "y") -+ (const_int 0)) -+ (const_int -1) -+ (if_then_else (gt (match_dup 1) -+ (const_int 0)) -+ (const_int 1) -+ (const_int 0))))] -+ "TARGET_P9_MISC" -+ "setb %0,%1" -+ [(set_attr "type" "logical")]) - -+(define_insn "setb_unsigned" -+ [(set (match_operand:SI 0 "gpc_reg_operand" "=r") -+ (if_then_else:SI (ltu (match_operand:CCUNS 1 "cc_reg_operand" "y") -+ (const_int 0)) -+ (const_int -1) -+ (if_then_else (gtu (match_dup 1) -+ (const_int 0)) -+ (const_int 1) -+ (const_int 0))))] -+ "TARGET_P9_MISC" -+ "setb %0,%1" -+ [(set_attr "type" "logical")]) -+ -+;; Test byte within two ranges. -+;; -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the range specified by operand 2. -+;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2. -+;; -+;; Return in target register operand 0 a value of 1 if (lo_1 <= vv and -+;; vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2). Otherwise, set register -+;; operand 0 to 0. -+;; -+;; Though the instructions to which this expansion maps operate on -+;; 64-bit registers, the current implementation only operates on -+;; SI-mode operands as the high-order bits provide no information -+;; that is not already available in the low-order bits. To avoid the -+;; costs of data widening operations, future enhancements might allow -+;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. -+(define_expand "cmprb2" -+ [(set (match_dup 3) -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:SI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPRB2)) -+ (set (match_operand:SI 0 "gpc_reg_operand" "=r") -+ (if_then_else:SI (lt (match_dup 3) -+ (const_int 0)) -+ (const_int -1) -+ (if_then_else (gt (match_dup 3) -+ (const_int 0)) -+ (const_int 1) -+ (const_int 0))))] -+ "TARGET_P9_MISC" -+{ -+ operands[3] = gen_reg_rtx (CCmode); -+}) -+ -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the ranges specified by operand 2. -+;; The bytes of operand 2 are organized as hi_1:lo_1:hi_2:lo_2. -+;; -+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if -+;; (lo_1 <= vv and vv <= hi_1) or if (lo_2 <= vv and vv <= hi_2). -+;; Otherwise, set the GT bit to 0. The other 3 bits of the target -+;; CR register are all set to 0. -+(define_insn "*cmprb2_internal" -+ [(set (match_operand:CC 0 "cc_reg_operand" "=y") -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:SI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPRB2))] -+ "TARGET_P9_MISC" -+ "cmprb %0,1,%1,%2" -+ [(set_attr "type" "logical")]) -+ -+;; Test byte membership within set of 8 bytes. -+;; -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the set specified by operand 2. -+;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7. -+;; -+;; Return in target register operand 0 a value of 1 if vv equals one -+;; of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise, set -+;; register operand 0 to 0. Note that the 8 byte values held within -+;; operand 2 need not be unique. -+;; -+;; Though the instructions to which this expansion maps operate on -+;; 64-bit registers, the current implementation requires that operands -+;; 0 and 1 have mode SI as the high-order bits provide no information -+;; that is not already available in the low-order bits. To avoid the -+;; costs of data widening operations, future enhancements might allow -+;; DI mode for operand 0 and/or might allow operand 1 to be QI mode. -+(define_expand "cmpeqb" -+ [(set (match_dup 3) -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:DI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPEQB)) -+ (set (match_operand:SI 0 "gpc_reg_operand" "=r") -+ (if_then_else:SI (lt (match_dup 3) -+ (const_int 0)) -+ (const_int -1) -+ (if_then_else (gt (match_dup 3) -+ (const_int 0)) -+ (const_int 1) -+ (const_int 0))))] -+ "TARGET_P9_MISC && TARGET_64BIT" -+{ -+ operands[3] = gen_reg_rtx (CCmode); -+}) -+ -+;; The bytes of operand 1 are organized as xx:xx:xx:vv, where xx -+;; represents a byte whose value is ignored in this context and -+;; vv, the least significant byte, holds the byte value that is to -+;; be tested for membership within the set specified by operand 2. -+;; The bytes of operand 2 are organized as e0:e1:e2:e3:e4:e5:e6:e7. -+;; -+;; Set bit 1 (the GT bit, 0x4) of CR register operand 0 to 1 if vv -+;; equals one of the values e0, e1, e2, e3, e4, e5, e6, or e7. Otherwise, -+;; set the GT bit to zero. The other 3 bits of the target CR register -+;; are all set to 0. -+(define_insn "*cmpeqb_internal" -+ [(set (match_operand:CC 0 "cc_reg_operand" "=y") -+ (unspec:CC [(match_operand:SI 1 "gpc_reg_operand" "r") -+ (match_operand:DI 2 "gpc_reg_operand" "r")] -+ UNSPEC_CMPEQB))] -+ "TARGET_P9_MISC && TARGET_64BIT" -+ "cmpeqb %0,%1,%2" -+ [(set_attr "type" "logical")]) - - - (include "sync.md") diff --git a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_2.patch b/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_2.patch deleted file mode 100644 index de7a83c23f..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_2.patch +++ /dev/null @@ -1,77 +0,0 @@ -From 87bc784a7ca3a43182f7272241597a50d7491342 Mon Sep 17 00:00:00 2001 -From: segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Fri, 30 Aug 2019 13:51:26 +0000 -Subject: [PATCH] Backport from trunk 2019-08-22 Segher Boessenkool - <segher@kernel.crashing.org> - - PR target/91481 - * config/rs6000/rs6000.md (unspec): Delete UNSPEC_DARN, UNSPEC_DARN_32, - and UNSPEC_DARN_RAW. - (unspecv): New enumerator values UNSPECV_DARN, UNSPECV_DARN_32, and - UNSPECV_DARN_RAW. - (darn_32): Use an unspec_volatile, and UNSPECV_DARN_32. - (darn_raw): Use an unspec_volatile, and UNSPECV_DARN_RAW. - (darn): Use an unspec_volatile, and UNSPECV_DARN. - - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@275175 138bc75d-0d04-0410-961f-82ee72b054a4 - -Upstream-Status: Backport -CVE: CVE-2019-15847 p2 -Affects <= 9.2.0 -Dropped Changelog changes -Signed-off-by: Armin Kuster <akuster@mvista.com> - ---- - gcc/config/rs6000/rs6000.md | 12 ++++++------ - 2 files changed, 20 insertions(+), 6 deletions(-) - -Index: gcc-9.2.0/gcc/config/rs6000/rs6000.md -=================================================================== ---- gcc-9.2.0.orig/gcc/config/rs6000/rs6000.md -+++ gcc-9.2.0/gcc/config/rs6000/rs6000.md -@@ -137,9 +137,6 @@ - UNSPEC_LSQ - UNSPEC_FUSION_GPR - UNSPEC_STACK_CHECK -- UNSPEC_DARN -- UNSPEC_DARN_32 -- UNSPEC_DARN_RAW - UNSPEC_CMPRB - UNSPEC_CMPRB2 - UNSPEC_CMPEQB -@@ -170,6 +167,9 @@ - UNSPECV_EH_RR ; eh_reg_restore - UNSPECV_ISYNC ; isync instruction - UNSPECV_MFTB ; move from time base -+ UNSPECV_DARN ; darn 1 (deliver a random number) -+ UNSPECV_DARN_32 ; darn 2 -+ UNSPECV_DARN_RAW ; darn 0 - UNSPECV_NLGR ; non-local goto receiver - UNSPECV_MFFS ; Move from FPSCR - UNSPECV_MFFSL ; Move from FPSCR light instruction version -@@ -14333,21 +14333,21 @@ - - (define_insn "darn_32" - [(set (match_operand:SI 0 "register_operand" "=r") -- (unspec:SI [(const_int 0)] UNSPEC_DARN_32))] -+ (unspec_volatile:SI [(const_int 0)] UNSPECV_DARN_32))] - "TARGET_P9_MISC" - "darn %0,0" - [(set_attr "type" "integer")]) - - (define_insn "darn_raw" - [(set (match_operand:DI 0 "register_operand" "=r") -- (unspec:DI [(const_int 0)] UNSPEC_DARN_RAW))] -+ (unspec_volatile:DI [(const_int 0)] UNSPECV_DARN_RAW))] - "TARGET_P9_MISC && TARGET_64BIT" - "darn %0,2" - [(set_attr "type" "integer")]) - - (define_insn "darn" - [(set (match_operand:DI 0 "register_operand" "=r") -- (unspec:DI [(const_int 0)] UNSPEC_DARN))] -+ (unspec_volatile:DI [(const_int 0)] UNSPECV_DARN))] - "TARGET_P9_MISC && TARGET_64BIT" - "darn %0,1" - [(set_attr "type" "integer")]) diff --git a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_3.patch b/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_3.patch deleted file mode 100644 index ba7130ca7d..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/CVE-2019-15847_3.patch +++ /dev/null @@ -1,62 +0,0 @@ -From dc4c8dd9dbe70740ec7a684b0f35620249fb036a Mon Sep 17 00:00:00 2001 -From: segher <segher@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Fri, 30 Aug 2019 13:53:11 +0000 -Subject: [PATCH] Backport from trunk 2019-08-23 Segher Boessenkool - <segher@kernel.crashing.org> - -gcc/testsuite/ - PR target/91481 - * gcc.target/powerpc/darn-3.c: New testcase. - - -git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-9-branch@275176 138bc75d-0d04-0410-961f-82ee72b054a4 - -Upstream-Status: Backport -CVE: CVE-2019-15847 p3 -Affects <= 9.2.0 -Dropped Changelog changes -Signed-off-by: Armin Kuster <akuster@mvista.com> - ---- - gcc/testsuite/ChangeLog | 6 ++++++ - gcc/testsuite/gcc.target/powerpc/darn-3.c | 16 ++++++++++++++++ - 2 files changed, 22 insertions(+) - create mode 100644 gcc/testsuite/gcc.target/powerpc/darn-3.c - -Index: gcc-9.2.0/gcc/testsuite/gcc.target/powerpc/darn-3.c -=================================================================== ---- /dev/null -+++ gcc-9.2.0/gcc/testsuite/gcc.target/powerpc/darn-3.c -@@ -0,0 +1,16 @@ -+/* { dg-do compile { target { powerpc*-*-* } } } */ -+/* { dg-skip-if "" { powerpc*-*-aix* } } */ -+/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ -+ -+static int darn32(void) { return __builtin_darn_32(); } -+ -+int four(void) -+{ -+ int sum = 0; -+ int i; -+ for (i = 0; i < 4; i++) -+ sum += darn32(); -+ return sum; -+} -+ -+/* { dg-final { scan-assembler-times {(?n)\mdarn .*,0\M} 4 } } */ -Index: gcc-9.2.0/gcc/testsuite/ChangeLog -=================================================================== ---- gcc-9.2.0.orig/gcc/testsuite/ChangeLog -+++ gcc-9.2.0/gcc/testsuite/ChangeLog -@@ -1,3 +1,11 @@ -+2019-08-30 Segher Boessenkool <segher@kernel.crashing.org> -+ -+ Backport from trunk -+ 2019-08-23 Segher Boessenkool <segher@kernel.crashing.org> -+ -+ PR target/91481 -+ * gcc.target/powerpc/darn-3.c: New testcase. -+ - 2019-08-12 Release Manager - - * GCC 9.2.0 released. diff --git a/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch b/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch deleted file mode 100644 index c37e0bb9dd..0000000000 --- a/meta/recipes-devtools/gcc/gcc-9.2/re-PR-target-91102-aarch64-ICE-on-Linux-kernel-with-.patch +++ /dev/null @@ -1,95 +0,0 @@ -From efb0ee06f5c0186c2d1442ecd4dbbd55dbd97b44 Mon Sep 17 00:00:00 2001 -From: Vladimir Makarov <vmakarov@redhat.com> -Date: Wed, 10 Jul 2019 16:07:10 +0000 -Subject: [PATCH] re PR target/91102 (aarch64 ICE on Linux kernel with -Os - starting with r270266) - -2019-07-10 Vladimir Makarov <vmakarov@redhat.com> - - PR target/91102 - * lra-constraints.c (process_alt_operands): Don't match user - defined regs only if they are early clobbers. - -2019-07-10 Vladimir Makarov <vmakarov@redhat.com> - - PR target/91102 - * gcc.target/aarch64/pr91102.c: New test. - -From-SVN: r273357 -Upstream-Status: Backport [https://github.com/gcc-mirror/gcc/commit/613caed2feb9cfc8158308670b59df3d031ec629] -[takondra: dropped conflicting ChangeLog changes] -Signed-off-by: Taras Kondratiuk <takondra@cisco.com> ---- - gcc/lra-constraints.c | 17 ++++++++++---- - gcc/testsuite/gcc.target/aarch64/pr91102.c | 26 ++++++++++++++++++++++ - 2 files changed, 39 insertions(+), 4 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/pr91102.c - -diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c -index cf33da8013e4..6382dbf852b6 100644 ---- a/gcc/lra-constraints.c -+++ b/gcc/lra-constraints.c -@@ -2172,8 +2172,9 @@ process_alt_operands (int only_alternative) - else - { - /* Operands don't match. If the operands are -- different user defined explicit hard registers, -- then we cannot make them match. */ -+ different user defined explicit hard -+ registers, then we cannot make them match -+ when one is early clobber operand. */ - if ((REG_P (*curr_id->operand_loc[nop]) - || SUBREG_P (*curr_id->operand_loc[nop])) - && (REG_P (*curr_id->operand_loc[m]) -@@ -2192,9 +2193,17 @@ process_alt_operands (int only_alternative) - && REG_P (m_reg) - && HARD_REGISTER_P (m_reg) - && REG_USERVAR_P (m_reg)) -- break; -+ { -+ int i; -+ -+ for (i = 0; i < early_clobbered_regs_num; i++) -+ if (m == early_clobbered_nops[i]) -+ break; -+ if (i < early_clobbered_regs_num -+ || early_clobber_p) -+ break; -+ } - } -- - /* Both operands must allow a reload register, - otherwise we cannot make them match. */ - if (curr_alt[m] == NO_REGS) -diff --git a/gcc/testsuite/gcc.target/aarch64/pr91102.c b/gcc/testsuite/gcc.target/aarch64/pr91102.c -new file mode 100644 -index 000000000000..70b99045a48e ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/pr91102.c -@@ -0,0 +1,26 @@ -+/* PR target/91102 */ -+/* { dg-do compile } */ -+/* { dg-options "-O2" } */ -+ -+int -+foo (long d, long l) -+{ -+ register long e asm ("x1") = d; -+ register long f asm("x2") = l; -+ asm ("" : : "r" (e), "r" (f)); -+ return 3; -+} -+ -+struct T { int i; int j; }; -+union S { long h; struct T t; }; -+ -+void -+bar (union S b) -+{ -+ while (1) -+ { -+ union S c = b; -+ c.t.j++; -+ b.h = foo (b.h, c.h); -+ } -+} diff --git a/meta/recipes-devtools/gcc/gcc-configure-common.inc b/meta/recipes-devtools/gcc/gcc-configure-common.inc index bb4f6923f2..a64c4caf00 100644 --- a/meta/recipes-devtools/gcc/gcc-configure-common.inc +++ b/meta/recipes-devtools/gcc/gcc-configure-common.inc @@ -33,6 +33,7 @@ EXTRA_OECONF = "\ --enable-libstdcxx-pch \ --program-prefix=${TARGET_PREFIX} \ --without-local-prefix \ + --disable-install-libiberty \ ${EXTRA_OECONF_BASE} \ ${EXTRA_OECONF_GCC_FLOAT} \ ${EXTRA_OECONF_PATHS} \ diff --git a/meta/recipes-devtools/gcc/gcc-cross-canadian.inc b/meta/recipes-devtools/gcc/gcc-cross-canadian.inc index 4aac345bec..d3875c94d3 100644 --- a/meta/recipes-devtools/gcc/gcc-cross-canadian.inc +++ b/meta/recipes-devtools/gcc/gcc-cross-canadian.inc @@ -106,13 +106,7 @@ do_install () { rm -f ${D}${bindir}/*c++ # We don't care about the gcc-<version> copies - rm -f ${D}${bindir}/*gcc-?.?* - - # We use libiberty from binutils - rm -f ${D}${prefix}/${TARGET_SYS}/lib/libiberty.a - # Not sure where the strange paths come from - rm -f ${D}${libdir}/../lib/libiberty.a - rm -f ${D}${libdir}/libiberty.a + rm -f ${D}${bindir}/*gcc-${BINV}* # Cleanup empty directories which are not shipped # we use rmdir instead of 'rm -f' to ensure the non empty directories are not deleted @@ -145,6 +139,29 @@ do_install () { chown -R root:root ${D} cross_canadian_bindirlinks + + for i in linux ${CANADIANEXTRAOS} + do + for v in ${CANADIANEXTRAVENDOR} + do + d=${D}${bindir}/../${TARGET_ARCH}$v-$i + install -d $d + for j in ${TARGET_PREFIX}gcc${EXEEXT} ${TARGET_PREFIX}g++${EXEEXT} + do + p=${TARGET_ARCH}$v-$i-`echo $j | sed -e s,${TARGET_PREFIX},,` + case $i in + *musl*) + rm -rf $d/$p + echo "#!/usr/bin/env sh" > $d/$p + echo "exec \`dirname \$0\`/../${TARGET_SYS}/$j -mmusl \$@" >> $d/$p + chmod 0755 $d/$p + ;; + *) + ;; + esac + done + done + done } ELFUTILS = "nativesdk-elfutils" diff --git a/meta/recipes-devtools/gcc/gcc-cross-canadian_9.2.bb b/meta/recipes-devtools/gcc/gcc-cross-canadian_10.2.bb index bf53c5cd78..bf53c5cd78 100644 --- a/meta/recipes-devtools/gcc/gcc-cross-canadian_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-cross-canadian_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-cross.inc b/meta/recipes-devtools/gcc/gcc-cross.inc index c68cdd5dc4..6fa8c274cd 100644 --- a/meta/recipes-devtools/gcc/gcc-cross.inc +++ b/meta/recipes-devtools/gcc/gcc-cross.inc @@ -117,10 +117,6 @@ do_install () { cp ${S}/libquadmath/quadmath.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ cp ${S}/libquadmath/quadmath_weak.h ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include/ - # We use libiberty from binutils - find ${D}${exec_prefix}/lib -name libiberty.a | xargs rm -f - find ${D}${exec_prefix}/lib -name libiberty.h | xargs rm -f - find ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/include-fixed -type f -not -name "README" -not -name limits.h -not -name syslimits.h | xargs rm -f } diff --git a/meta/recipes-devtools/gcc/gcc-cross_9.2.bb b/meta/recipes-devtools/gcc/gcc-cross_10.2.bb index b43cca0c52..b43cca0c52 100644 --- a/meta/recipes-devtools/gcc/gcc-cross_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-cross_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-crosssdk_9.2.bb b/meta/recipes-devtools/gcc/gcc-crosssdk_10.2.bb index 40a6c4feff..40a6c4feff 100644 --- a/meta/recipes-devtools/gcc/gcc-crosssdk_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-crosssdk_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-runtime.inc b/meta/recipes-devtools/gcc/gcc-runtime.inc index b2c5d43bd4..9dcce26536 100644 --- a/meta/recipes-devtools/gcc/gcc-runtime.inc +++ b/meta/recipes-devtools/gcc/gcc-runtime.inc @@ -20,6 +20,9 @@ EXTRA_OECONF_append_libc-newlib = " --with-newlib" # Disable ifuncs for libatomic on arm conflicts -march/-mcpu EXTRA_OECONF_append_arm = " libat_cv_have_ifunc=no " +EXTRA_OECONF_append_armeb = " libat_cv_have_ifunc=no " + +DISABLE_STATIC_class-nativesdk ?= "" # Newlib does not support symbol versioning on libsdtcc++ SYMVERS_CONF_libc-newlib = "" @@ -44,7 +47,6 @@ RUNTIMETARGET = "${RUNTIMELIBSSP} libstdc++-v3 libgomp libatomic ${RUNTIMELIBITM RUNTIMETARGET_libc-newlib = "libstdc++-v3" # libiberty -# libmudflap # libgfortran needs separate recipe due to libquadmath dependency SLIB = "${TMPDIR}/work-shared/gcc-${PV}-${PR}/gcc-${PV}" @@ -136,6 +138,10 @@ do_install_append_class-target () { ln -s ../${TARGET_SYS}/ext ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR_MULTILIB_ORIGINAL}-${TARGET_OS}/ext fi + if [ "${TARGET_ARCH}" == "x86_64" -a "${MULTILIB_VARIANTS}" != "" ];then + ln -sf ../${X86ARCH32}${TARGET_VENDOR}-${TARGET_OS} ${D}${includedir}/c++/${BINV}/${TARGET_ARCH}${TARGET_VENDOR}-${TARGET_OS}/32 + fi + if [ "${TCLIBC}" != "glibc" ]; then case "${TARGET_OS}" in "linux-musl" | "linux-*spe") extra_target_os="linux";; @@ -164,9 +170,6 @@ PACKAGES = "\ libssp \ libssp-dev \ libssp-staticdev \ - libmudflap \ - libmudflap-dev \ - libmudflap-staticdev \ libquadmath \ libquadmath-dev \ libquadmath-staticdev \ @@ -239,23 +242,13 @@ SUMMARY_libquadmath-dev = "GNU quad-precision math library - development files" FILES_libquadmath-staticdev = "${libdir}/libquadmath.a" SUMMARY_libquadmath-staticdev = "GNU quad-precision math library - static development files" -# NOTE: mudflap has been removed as of gcc 4.9 and has been superseded by the address sanitiser -FILES_libmudflap = "${libdir}/libmudflap*.so.*" -SUMMARY_libmudflap = "Pointer debugging library for gcc" -FILES_libmudflap-dev = "\ - ${libdir}/libmudflap*.so \ - ${libdir}/libmudflap.la \ -" -SUMMARY_libmudflap-dev = "Pointer debugging library for gcc - development files" -FILES_libmudflap-staticdev = "${libdir}/libmudflap.a" -SUMMARY_libmudflap-staticdev = "Pointer debugging library for gcc - static development files" - FILES_libgomp = "${libdir}/libgomp*${SOLIBS}" SUMMARY_libgomp = "GNU OpenMP parallel programming library" FILES_libgomp-dev = "\ ${libdir}/libgomp*${SOLIBSDEV} \ ${libdir}/libgomp*.la \ ${libdir}/libgomp.spec \ + ${libdir}/${TARGET_SYS}/${BINV}/include/acc_prof.h \ ${libdir}/${TARGET_SYS}/${BINV}/include/omp.h \ ${libdir}/${TARGET_SYS}/${BINV}/include/openacc.h \ " diff --git a/meta/recipes-devtools/gcc/gcc-runtime_9.2.bb b/meta/recipes-devtools/gcc/gcc-runtime_10.2.bb index dd430b57eb..dd430b57eb 100644 --- a/meta/recipes-devtools/gcc/gcc-runtime_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-runtime_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-sanitizers_9.2.bb b/meta/recipes-devtools/gcc/gcc-sanitizers_10.2.bb index f3c7058114..f3c7058114 100644 --- a/meta/recipes-devtools/gcc/gcc-sanitizers_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-sanitizers_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-source_9.2.bb b/meta/recipes-devtools/gcc/gcc-source_10.2.bb index b890fa33ea..b890fa33ea 100644 --- a/meta/recipes-devtools/gcc/gcc-source_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc-source_10.2.bb diff --git a/meta/recipes-devtools/gcc/gcc-target.inc b/meta/recipes-devtools/gcc/gcc-target.inc index 18d078db0a..1e25dad86b 100644 --- a/meta/recipes-devtools/gcc/gcc-target.inc +++ b/meta/recipes-devtools/gcc/gcc-target.inc @@ -15,10 +15,11 @@ EXTRA_OECONF_append_linuxstdbase = " --enable-clocale=gnu" ARMFPARCHEXT ?= "" -EXTRA_OECONF_append_armv6 = " --with-arch=armv6${ARMFPARCHEXT}" -EXTRA_OECONF_append_armv7a = " --with-arch=armv7-a${ARMFPARCHEXT}" -EXTRA_OECONF_append_armv7ve = " --with-arch=armv7ve${ARMFPARCHEXT}" -EXTRA_OECONF_append_arc = " --with-cpu=${TUNE_PKGARCH}" +EXTRA_OECONF_append_armv6_class-target = " --with-arch=armv6${ARMFPARCHEXT}" +EXTRA_OECONF_append_armv7a_class-target = " --with-arch=armv7-a${ARMFPARCHEXT}" +EXTRA_OECONF_append_armv7ve_class-target = " --with-arch=armv7ve${ARMFPARCHEXT}" +EXTRA_OECONF_append_arc_class-target = " --with-cpu=${TUNE_PKGARCH}" +EXTRA_OECONF_append_x86-64_class-target = " --with-arch=native" # libcc1 requres gcc_cv_objdump when cross build, but gcc_cv_objdump is # set in subdir gcc, so subdir libcc1 can't use it, export it here to @@ -41,6 +42,7 @@ PACKAGES = "\ FILES_${PN} = "\ ${bindir}/${TARGET_PREFIX}gcc* \ + ${bindir}/${TARGET_PREFIX}lto* \ ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/collect2* \ ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/cc1plus \ ${libexecdir}/gcc/${TARGET_SYS}/${BINV}/lto* \ @@ -179,6 +181,10 @@ do_install () { # Cleanup manpages.. rm -rf ${D}${mandir}/man7 + # Don't package details about the build host + rm -f ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/plugin/include/auto-build.h + rm -f ${D}${libdir}/gcc/${TARGET_SYS}/${BINV}/plugin/include/bconfig.h + cd ${D}${bindir} # We care about g++ not c++ @@ -187,10 +193,6 @@ do_install () { # We don't care about the gcc-<version> ones for this rm -f *gcc-?.?* - # We use libiberty from binutils - find ${D}${libdir} -name libiberty.a | xargs rm -f - find ${D}${libdir} -name libiberty.h | xargs rm -f - # Not sure why we end up with these but we don't want them... rm -f ${TARGET_PREFIX}${TARGET_PREFIX}* diff --git a/meta/recipes-devtools/gcc/gcc/0001-aarch64-Fix-up-__aarch64_cas16_acq_rel-fallback.patch b/meta/recipes-devtools/gcc/gcc/0001-aarch64-Fix-up-__aarch64_cas16_acq_rel-fallback.patch new file mode 100644 index 0000000000..c060accd99 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0001-aarch64-Fix-up-__aarch64_cas16_acq_rel-fallback.patch @@ -0,0 +1,66 @@ +Upstream-Status: Backport +Signed-off-by: Ross Burton <ross.burton@arm.com> + +From fd2ec4542fd2975e6d3f2f1c1a2639945a84f9e1 Mon Sep 17 00:00:00 2001 +From: Jakub Jelinek <jakub@redhat.com> +Date: Mon, 3 Aug 2020 22:55:28 +0200 +Subject: [PATCH] aarch64: Fix up __aarch64_cas16_acq_rel fallback + +As mentioned in the PR, the fallback path when LSE is unavailable writes +incorrect registers to the memory if the previous content compares equal +to x0, x1 - it writes copy of x0, x1 from the start of function, but it +should write x2, x3. + +2020-08-03 Jakub Jelinek <jakub@redhat.com> + + PR target/96402 + * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead + of x(tmp0), x(tmp1) in STXP arguments. + + * gcc.target/aarch64/pr96402.c: New test. + +(cherry picked from commit 90b43856fdff7d96d93d22970eca8a86c56e0ddc) +--- + gcc/testsuite/gcc.target/aarch64/pr96402.c | 16 ++++++++++++++++ + libgcc/config/aarch64/lse.S | 2 +- + 2 files changed, 17 insertions(+), 1 deletion(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/pr96402.c + +diff --git a/gcc/testsuite/gcc.target/aarch64/pr96402.c b/gcc/testsuite/gcc.target/aarch64/pr96402.c +new file mode 100644 +index 00000000000..fa2dddfac15 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/pr96402.c +@@ -0,0 +1,16 @@ ++/* PR target/96402 */ ++/* { dg-do run { target int128 } } */ ++/* { dg-options "-moutline-atomics" } */ ++ ++int ++main () ++{ ++ __int128 a = 0; ++ __sync_val_compare_and_swap (&a, (__int128) 0, (__int128) 1); ++ if (a != 1) ++ __builtin_abort (); ++ __sync_val_compare_and_swap (&a, (__int128) 1, (((__int128) 0xdeadbeeffeedbac1ULL) << 64) | 0xabadcafe00c0ffeeULL); ++ if (a != ((((__int128) 0xdeadbeeffeedbac1ULL) << 64) | 0xabadcafe00c0ffeeULL)) ++ __builtin_abort (); ++ return 0; ++} +diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S +index 64691c601c1..c8fbfbce4fd 100644 +--- a/libgcc/config/aarch64/lse.S ++++ b/libgcc/config/aarch64/lse.S +@@ -203,7 +203,7 @@ STARTFN NAME(cas) + cmp x0, x(tmp0) + ccmp x1, x(tmp1), #0, eq + bne 1f +- STXP w(tmp2), x(tmp0), x(tmp1), [x4] ++ STXP w(tmp2), x2, x3, [x4] + cbnz w(tmp2), 0b + 1: ret + +-- +2.26.2 + diff --git a/meta/recipes-devtools/gcc/gcc/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch b/meta/recipes-devtools/gcc/gcc/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch new file mode 100644 index 0000000000..73de4c7590 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0001-aarch64-New-Straight-Line-Speculation-SLS-mitigation.patch @@ -0,0 +1,202 @@ +CVE: CVE-2020-13844 +Upstream-Status: Backport +Signed-off-by: Ross Burton <ross.burton@arm.com> + +From 1ff243934ac443b5f58cd02a5012ce58ecc31fb2 Mon Sep 17 00:00:00 2001 +From: Matthew Malcomson <matthew.malcomson@arm.com> +Date: Thu, 9 Jul 2020 09:11:58 +0100 +Subject: [PATCH 1/3] aarch64: New Straight Line Speculation (SLS) mitigation + flags + +Here we introduce the flags that will be used for straight line speculation. + +The new flag introduced is `-mharden-sls=`. +This flag can take arguments of `none`, `all`, or a comma seperated list of one +or more of `retbr` or `blr`. +`none` indicates no special mitigation of the straight line speculation +vulnerability. +`all` requests all mitigations currently implemented. +`retbr` requests that the RET and BR instructions have a speculation barrier +inserted after them. +`blr` requests that BLR instructions are replaced by a BL to a function stub +using a BR with a speculation barrier after it. + +Setting this on a per-function basis using attributes or the like is not +enabled, but may be in the future. + +gcc/ChangeLog: + +2020-06-02 Matthew Malcomson <matthew.malcomson@arm.com> + + * config/aarch64/aarch64-protos.h (aarch64_harden_sls_retbr_p): + New. + (aarch64_harden_sls_blr_p): New. + * config/aarch64/aarch64.c (enum aarch64_sls_hardening_type): + New. + (aarch64_harden_sls_retbr_p): New. + (aarch64_harden_sls_blr_p): New. + (aarch64_validate_sls_mitigation): New. + (aarch64_override_options): Parse options for SLS mitigation. + * config/aarch64/aarch64.opt (-mharden-sls): New option. + * doc/invoke.texi: Document new option. +--- + gcc/config/aarch64/aarch64-protos.h | 3 ++ + gcc/config/aarch64/aarch64.c | 76 +++++++++++++++++++++++++++++++++++++ + gcc/config/aarch64/aarch64.opt | 4 ++ + gcc/doc/invoke.texi | 12 ++++++ + 4 files changed, 95 insertions(+) + +diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h +index 723d9ba..eb5f4b4 100644 +--- a/gcc/config/aarch64/aarch64-protos.h ++++ b/gcc/config/aarch64/aarch64-protos.h +@@ -781,4 +781,7 @@ extern const atomic_ool_names aarch64_ool_ldeor_names; + + tree aarch64_resolve_overloaded_builtin_general (location_t, tree, void *); + ++extern bool aarch64_harden_sls_retbr_p (void); ++extern bool aarch64_harden_sls_blr_p (void); ++ + #endif /* GCC_AARCH64_PROTOS_H */ +diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c +index b86434a..437a9cf 100644 +--- a/gcc/config/aarch64/aarch64.c ++++ b/gcc/config/aarch64/aarch64.c +@@ -14494,6 +14494,79 @@ aarch64_validate_mcpu (const char *str, const struct processor **res, + return false; + } + ++/* Straight line speculation indicators. */ ++enum aarch64_sls_hardening_type ++{ ++ SLS_NONE = 0, ++ SLS_RETBR = 1, ++ SLS_BLR = 2, ++ SLS_ALL = 3, ++}; ++static enum aarch64_sls_hardening_type aarch64_sls_hardening; ++ ++/* Return whether we should mitigatate Straight Line Speculation for the RET ++ and BR instructions. */ ++bool ++aarch64_harden_sls_retbr_p (void) ++{ ++ return aarch64_sls_hardening & SLS_RETBR; ++} ++ ++/* Return whether we should mitigatate Straight Line Speculation for the BLR ++ instruction. */ ++bool ++aarch64_harden_sls_blr_p (void) ++{ ++ return aarch64_sls_hardening & SLS_BLR; ++} ++ ++/* As of yet we only allow setting these options globally, in the future we may ++ allow setting them per function. */ ++static void ++aarch64_validate_sls_mitigation (const char *const_str) ++{ ++ char *token_save = NULL; ++ char *str = NULL; ++ ++ if (strcmp (const_str, "none") == 0) ++ { ++ aarch64_sls_hardening = SLS_NONE; ++ return; ++ } ++ if (strcmp (const_str, "all") == 0) ++ { ++ aarch64_sls_hardening = SLS_ALL; ++ return; ++ } ++ ++ char *str_root = xstrdup (const_str); ++ str = strtok_r (str_root, ",", &token_save); ++ if (!str) ++ error ("invalid argument given to %<-mharden-sls=%>"); ++ ++ int temp = SLS_NONE; ++ while (str) ++ { ++ if (strcmp (str, "blr") == 0) ++ temp |= SLS_BLR; ++ else if (strcmp (str, "retbr") == 0) ++ temp |= SLS_RETBR; ++ else if (strcmp (str, "none") == 0 || strcmp (str, "all") == 0) ++ { ++ error ("%<%s%> must be by itself for %<-mharden-sls=%>", str); ++ break; ++ } ++ else ++ { ++ error ("invalid argument %<%s%> for %<-mharden-sls=%>", str); ++ break; ++ } ++ str = strtok_r (NULL, ",", &token_save); ++ } ++ aarch64_sls_hardening = (aarch64_sls_hardening_type) temp; ++ free (str_root); ++} ++ + /* Parses CONST_STR for branch protection features specified in + aarch64_branch_protect_types, and set any global variables required. Returns + the parsing result and assigns LAST_STR to the last processed token from +@@ -14738,6 +14811,9 @@ aarch64_override_options (void) + selected_arch = NULL; + selected_tune = NULL; + ++ if (aarch64_harden_sls_string) ++ aarch64_validate_sls_mitigation (aarch64_harden_sls_string); ++ + if (aarch64_branch_protection_string) + aarch64_validate_mbranch_protection (aarch64_branch_protection_string); + +diff --git a/gcc/config/aarch64/aarch64.opt b/gcc/config/aarch64/aarch64.opt +index d99d14c..5170361 100644 +--- a/gcc/config/aarch64/aarch64.opt ++++ b/gcc/config/aarch64/aarch64.opt +@@ -71,6 +71,10 @@ mgeneral-regs-only + Target Report RejectNegative Mask(GENERAL_REGS_ONLY) Save + Generate code which uses only the general registers. + ++mharden-sls= ++Target RejectNegative Joined Var(aarch64_harden_sls_string) ++Generate code to mitigate against straight line speculation. ++ + mfix-cortex-a53-835769 + Target Report Var(aarch64_fix_a53_err835769) Init(2) Save + Workaround for ARM Cortex-A53 Erratum number 835769. +diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi +index a2794a6..bd5b77a 100644 +--- a/gcc/doc/invoke.texi ++++ b/gcc/doc/invoke.texi +@@ -696,6 +696,7 @@ Objective-C and Objective-C++ Dialects}. + -msign-return-address=@var{scope} @gol + -mbranch-protection=@var{none}|@var{standard}|@var{pac-ret}[+@var{leaf} + +@var{b-key}]|@var{bti} @gol ++-mharden-sls=@var{opts} @gol + -march=@var{name} -mcpu=@var{name} -mtune=@var{name} @gol + -moverride=@var{string} -mverbose-cost-dump @gol + -mstack-protector-guard=@var{guard} -mstack-protector-guard-reg=@var{sysreg} @gol +@@ -17065,6 +17066,17 @@ functions. The optional argument @samp{b-key} can be used to sign the functions + with the B-key instead of the A-key. + @samp{bti} turns on branch target identification mechanism. + ++@item -mharden-sls=@var{opts} ++@opindex mharden-sls ++Enable compiler hardening against straight line speculation (SLS). ++@var{opts} is a comma-separated list of the following options: ++@table @samp ++@item retbr ++@item blr ++@end table ++In addition, @samp{-mharden-sls=all} enables all SLS hardening while ++@samp{-mharden-sls=none} disables all SLS hardening. ++ + @item -msve-vector-bits=@var{bits} + @opindex msve-vector-bits + Specify the number of bits in an SVE vector register. This option only has +-- +2.7.4 + diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch b/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch index 9065c304b5..82ae9f8d14 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch +++ b/meta/recipes-devtools/gcc/gcc/0001-gcc-4.3.1-ARCH_FLAGS_FOR_TARGET.patch @@ -1,7 +1,7 @@ -From 863325ec3c6eb4987be63509ac407b2d13617342 Mon Sep 17 00:00:00 2001 +From f2a5dc3bc7e5727d6bf77e1c6e8a31a6f000883d Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 08:37:11 +0400 -Subject: [PATCH 01/36] gcc-4.3.1: ARCH_FLAGS_FOR_TARGET +Subject: [PATCH] gcc-4.3.1: ARCH_FLAGS_FOR_TARGET Signed-off-by: Khem Raj <raj.khem@gmail.com> @@ -12,10 +12,10 @@ Upstream-Status: Inappropriate [embedded specific] 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configure b/configure -index abd93a990a9..b121088d778 100755 +index 4cc938ebb7d..226a64939d1 100755 --- a/configure +++ b/configure -@@ -7603,7 +7603,7 @@ fi +@@ -7722,7 +7722,7 @@ fi # for target_alias and gcc doesn't manage it consistently. target_configargs="--cache-file=./config.cache ${target_configargs}" @@ -25,10 +25,10 @@ index abd93a990a9..b121088d778 100755 *" newlib "*) case " $target_configargs " in diff --git a/configure.ac b/configure.ac -index 9db4fd14aa2..aad93c4d183 100644 +index c78d9cbea62..f024f4bac9b 100644 --- a/configure.ac +++ b/configure.ac -@@ -3119,7 +3119,7 @@ fi +@@ -3227,7 +3227,7 @@ fi # for target_alias and gcc doesn't manage it consistently. target_configargs="--cache-file=./config.cache ${target_configargs}" @@ -37,6 +37,3 @@ index 9db4fd14aa2..aad93c4d183 100644 case " $target_configdirs " in *" newlib "*) case " $target_configargs " in --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc/0002-aarch64-Introduce-SLS-mitigation-for-RET-and-BR-inst.patch b/meta/recipes-devtools/gcc/gcc/0002-aarch64-Introduce-SLS-mitigation-for-RET-and-BR-inst.patch new file mode 100644 index 0000000000..823cc8b668 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0002-aarch64-Introduce-SLS-mitigation-for-RET-and-BR-inst.patch @@ -0,0 +1,607 @@ +Upstream-Status: Backport +Signed-off-by: Ross Burton <ross.burton@arm.com> + +From b1204d16e1ec96a4aa89e44de8990e2499ffdb22 Mon Sep 17 00:00:00 2001 +From: Matthew Malcomson <matthew.malcomson@arm.com> +Date: Thu, 9 Jul 2020 09:11:59 +0100 +Subject: [PATCH 2/3] aarch64: Introduce SLS mitigation for RET and BR + instructions + +Instructions following RET or BR are not necessarily executed. In order +to avoid speculation past RET and BR we can simply append a speculation +barrier. + +Since these speculation barriers will not be architecturally executed, +they are not expected to add a high performance penalty. + +The speculation barrier is to be SB when targeting architectures which +have this enabled, and DSB SY + ISB otherwise. + +We add tests for each of the cases where such an instruction was seen. + +This is implemented by modifying each machine description pattern that +emits either a RET or a BR instruction. We choose not to use something +like `TARGET_ASM_FUNCTION_EPILOGUE` since it does not affect the +`indirect_jump`, `jump`, `sibcall_insn` and `sibcall_value_insn` +patterns and we find it preferable to implement the functionality in the +same way for every pattern. + +There is one particular case which is slightly tricky. The +implementation of TARGET_ASM_TRAMPOLINE_TEMPLATE uses a BR which needs +to be mitigated against. The trampoline template is used *once* per +compilation unit, and the TRAMPOLINE_SIZE is exposed to the user via the +builtin macro __LIBGCC_TRAMPOLINE_SIZE__. +In the future we may implement function specific attributes to turn on +and off hardening on a per-function basis. +The fixed nature of the trampoline described above implies it will be +safer to ensure this speculation barrier is always used. + +Testing: + Bootstrap and regtest done on aarch64-none-linux + Used a temporary hack(1) to use these options on every test in the + testsuite and a script to check that the output never emitted an + unmitigated RET or BR. + +1) Temporary hack was a change to the testsuite to always use +`-save-temps` and run a script on the assembly output of those +compilations which produced one to ensure every RET or BR is immediately +followed by a speculation barrier. + +gcc/ChangeLog: + + * config/aarch64/aarch64-protos.h (aarch64_sls_barrier): New. + * config/aarch64/aarch64.c (aarch64_output_casesi): Emit + speculation barrier after BR instruction if needs be. + (aarch64_trampoline_init): Handle ptr_mode value & adjust size + of code copied. + (aarch64_sls_barrier): New. + (aarch64_asm_trampoline_template): Add needed barriers. + * config/aarch64/aarch64.h (AARCH64_ISA_SB): New. + (TARGET_SB): New. + (TRAMPOLINE_SIZE): Account for barrier. + * config/aarch64/aarch64.md (indirect_jump, *casesi_dispatch, + simple_return, *do_return, *sibcall_insn, *sibcall_value_insn): + Emit barrier if needs be, also account for possible barrier using + "sls_length" attribute. + (sls_length): New attribute. + (length): Determine default using any non-default sls_length + value. + +gcc/testsuite/ChangeLog: + + * gcc.target/aarch64/sls-mitigation/sls-miti-retbr.c: New test. + * gcc.target/aarch64/sls-mitigation/sls-miti-retbr-pacret.c: + New test. + * gcc.target/aarch64/sls-mitigation/sls-mitigation.exp: New file. + * lib/target-supports.exp (check_effective_target_aarch64_asm_sb_ok): + New proc. +--- + gcc/config/aarch64/aarch64-protos.h | 1 + + gcc/config/aarch64/aarch64.c | 41 ++++++- + gcc/config/aarch64/aarch64.h | 10 +- + gcc/config/aarch64/aarch64.md | 76 +++++++++---- + .../aarch64/sls-mitigation/sls-miti-retbr-pacret.c | 21 ++++ + .../aarch64/sls-mitigation/sls-miti-retbr.c | 119 +++++++++++++++++++++ + .../aarch64/sls-mitigation/sls-mitigation.exp | 73 +++++++++++++ + gcc/testsuite/lib/target-supports.exp | 2 +- + 8 files changed, 318 insertions(+), 25 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr-pacret.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-mitigation.exp + +diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h +index eb5f4b4..ee0ffde 100644 +--- a/gcc/config/aarch64/aarch64-protos.h ++++ b/gcc/config/aarch64/aarch64-protos.h +@@ -781,6 +781,7 @@ extern const atomic_ool_names aarch64_ool_ldeor_names; + + tree aarch64_resolve_overloaded_builtin_general (location_t, tree, void *); + ++const char *aarch64_sls_barrier (int); + extern bool aarch64_harden_sls_retbr_p (void); + extern bool aarch64_harden_sls_blr_p (void); + +diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c +index 437a9cf..44e3d1f 100644 +--- a/gcc/config/aarch64/aarch64.c ++++ b/gcc/config/aarch64/aarch64.c +@@ -10852,8 +10852,8 @@ aarch64_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) + static void + aarch64_asm_trampoline_template (FILE *f) + { +- int offset1 = 16; +- int offset2 = 20; ++ int offset1 = 24; ++ int offset2 = 28; + + if (aarch64_bti_enabled ()) + { +@@ -10876,6 +10876,17 @@ aarch64_asm_trampoline_template (FILE *f) + } + asm_fprintf (f, "\tbr\t%s\n", reg_names [IP1_REGNUM]); + ++ /* We always emit a speculation barrier. ++ This is because the same trampoline template is used for every nested ++ function. Since nested functions are not particularly common or ++ performant we don't worry too much about the extra instructions to copy ++ around. ++ This is not yet a problem, since we have not yet implemented function ++ specific attributes to choose between hardening against straight line ++ speculation or not, but such function specific attributes are likely to ++ happen in the future. */ ++ asm_fprintf (f, "\tdsb\tsy\n\tisb\n"); ++ + /* The trampoline needs an extra padding instruction. In case if BTI is + enabled the padding instruction is replaced by the BTI instruction at + the beginning. */ +@@ -10890,10 +10901,14 @@ static void + aarch64_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) + { + rtx fnaddr, mem, a_tramp; +- const int tramp_code_sz = 16; ++ const int tramp_code_sz = 24; + + /* Don't need to copy the trailing D-words, we fill those in below. */ +- emit_block_move (m_tramp, assemble_trampoline_template (), ++ /* We create our own memory address in Pmode so that `emit_block_move` can ++ use parts of the backend which expect Pmode addresses. */ ++ rtx temp = convert_memory_address (Pmode, XEXP (m_tramp, 0)); ++ emit_block_move (gen_rtx_MEM (BLKmode, temp), ++ assemble_trampoline_template (), + GEN_INT (tramp_code_sz), BLOCK_OP_NORMAL); + mem = adjust_address (m_tramp, ptr_mode, tramp_code_sz); + fnaddr = XEXP (DECL_RTL (fndecl), 0); +@@ -11084,6 +11099,8 @@ aarch64_output_casesi (rtx *operands) + output_asm_insn (buf, operands); + output_asm_insn (patterns[index][1], operands); + output_asm_insn ("br\t%3", operands); ++ output_asm_insn (aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()), ++ operands); + assemble_label (asm_out_file, label); + return ""; + } +@@ -22924,6 +22941,22 @@ aarch64_file_end_indicate_exec_stack () + #undef GNU_PROPERTY_AARCH64_FEATURE_1_BTI + #undef GNU_PROPERTY_AARCH64_FEATURE_1_AND + ++/* Helper function for straight line speculation. ++ Return what barrier should be emitted for straight line speculation ++ mitigation. ++ When not mitigating against straight line speculation this function returns ++ an empty string. ++ When mitigating against straight line speculation, use: ++ * SB when the v8.5-A SB extension is enabled. ++ * DSB+ISB otherwise. */ ++const char * ++aarch64_sls_barrier (int mitigation_required) ++{ ++ return mitigation_required ++ ? (TARGET_SB ? "sb" : "dsb\tsy\n\tisb") ++ : ""; ++} ++ + /* Target-specific selftests. */ + + #if CHECKING_P +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 1ce23c6..c21015f 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -281,6 +281,7 @@ extern unsigned aarch64_architecture_version; + #define AARCH64_ISA_F32MM (aarch64_isa_flags & AARCH64_FL_F32MM) + #define AARCH64_ISA_F64MM (aarch64_isa_flags & AARCH64_FL_F64MM) + #define AARCH64_ISA_BF16 (aarch64_isa_flags & AARCH64_FL_BF16) ++#define AARCH64_ISA_SB (aarch64_isa_flags & AARCH64_FL_SB) + + /* Crypto is an optional extension to AdvSIMD. */ + #define TARGET_CRYPTO (TARGET_SIMD && AARCH64_ISA_CRYPTO) +@@ -378,6 +379,9 @@ extern unsigned aarch64_architecture_version; + #define TARGET_FIX_ERR_A53_835769_DEFAULT 1 + #endif + ++/* SB instruction is enabled through +sb. */ ++#define TARGET_SB (AARCH64_ISA_SB) ++ + /* Apply the workaround for Cortex-A53 erratum 835769. */ + #define TARGET_FIX_ERR_A53_835769 \ + ((aarch64_fix_a53_err835769 == 2) \ +@@ -1058,8 +1062,10 @@ typedef struct + + #define RETURN_ADDR_RTX aarch64_return_addr + +-/* BTI c + 3 insns + 2 pointer-sized entries. */ +-#define TRAMPOLINE_SIZE (TARGET_ILP32 ? 24 : 32) ++/* BTI c + 3 insns ++ + sls barrier of DSB + ISB. ++ + 2 pointer-sized entries. */ ++#define TRAMPOLINE_SIZE (24 + (TARGET_ILP32 ? 8 : 16)) + + /* Trampolines contain dwords, so must be dword aligned. */ + #define TRAMPOLINE_ALIGNMENT 64 +diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md +index 8c8be3c..dda04ee 100644 +--- a/gcc/config/aarch64/aarch64.md ++++ b/gcc/config/aarch64/aarch64.md +@@ -407,10 +407,25 @@ + ;; Attribute that specifies whether the alternative uses MOVPRFX. + (define_attr "movprfx" "no,yes" (const_string "no")) + ++;; Attribute to specify that an alternative has the length of a single ++;; instruction plus a speculation barrier. ++(define_attr "sls_length" "none,retbr,casesi" (const_string "none")) ++ + (define_attr "length" "" + (cond [(eq_attr "movprfx" "yes") + (const_int 8) +- ] (const_int 4))) ++ ++ (eq_attr "sls_length" "retbr") ++ (cond [(match_test "!aarch64_harden_sls_retbr_p ()") (const_int 4) ++ (match_test "TARGET_SB") (const_int 8)] ++ (const_int 12)) ++ ++ (eq_attr "sls_length" "casesi") ++ (cond [(match_test "!aarch64_harden_sls_retbr_p ()") (const_int 16) ++ (match_test "TARGET_SB") (const_int 20)] ++ (const_int 24)) ++ ] ++ (const_int 4))) + + ;; Strictly for compatibility with AArch32 in pipeline models, since AArch64 has + ;; no predicated insns. +@@ -447,8 +462,12 @@ + (define_insn "indirect_jump" + [(set (pc) (match_operand:DI 0 "register_operand" "r"))] + "" +- "br\\t%0" +- [(set_attr "type" "branch")] ++ { ++ output_asm_insn ("br\\t%0", operands); ++ return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()); ++ } ++ [(set_attr "type" "branch") ++ (set_attr "sls_length" "retbr")] + ) + + (define_insn "jump" +@@ -765,7 +784,7 @@ + "* + return aarch64_output_casesi (operands); + " +- [(set_attr "length" "16") ++ [(set_attr "sls_length" "casesi") + (set_attr "type" "branch")] + ) + +@@ -844,18 +863,23 @@ + [(return)] + "" + { ++ const char *ret = NULL; + if (aarch64_return_address_signing_enabled () + && TARGET_ARMV8_3 + && !crtl->calls_eh_return) + { + if (aarch64_ra_sign_key == AARCH64_KEY_B) +- return "retab"; ++ ret = "retab"; + else +- return "retaa"; ++ ret = "retaa"; + } +- return "ret"; ++ else ++ ret = "ret"; ++ output_asm_insn (ret, operands); ++ return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()); + } +- [(set_attr "type" "branch")] ++ [(set_attr "type" "branch") ++ (set_attr "sls_length" "retbr")] + ) + + (define_expand "return" +@@ -867,8 +891,12 @@ + (define_insn "simple_return" + [(simple_return)] + "" +- "ret" +- [(set_attr "type" "branch")] ++ { ++ output_asm_insn ("ret", operands); ++ return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()); ++ } ++ [(set_attr "type" "branch") ++ (set_attr "sls_length" "retbr")] + ) + + (define_insn "*cb<optab><mode>1" +@@ -1066,10 +1094,16 @@ + (unspec:DI [(match_operand:DI 2 "const_int_operand")] UNSPEC_CALLEE_ABI) + (return)] + "SIBLING_CALL_P (insn)" +- "@ +- br\\t%0 +- b\\t%c0" +- [(set_attr "type" "branch, branch")] ++ { ++ if (which_alternative == 0) ++ { ++ output_asm_insn ("br\\t%0", operands); ++ return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()); ++ } ++ return "b\\t%c0"; ++ } ++ [(set_attr "type" "branch, branch") ++ (set_attr "sls_length" "retbr,none")] + ) + + (define_insn "*sibcall_value_insn" +@@ -1080,10 +1114,16 @@ + (unspec:DI [(match_operand:DI 3 "const_int_operand")] UNSPEC_CALLEE_ABI) + (return)] + "SIBLING_CALL_P (insn)" +- "@ +- br\\t%1 +- b\\t%c1" +- [(set_attr "type" "branch, branch")] ++ { ++ if (which_alternative == 0) ++ { ++ output_asm_insn ("br\\t%1", operands); ++ return aarch64_sls_barrier (aarch64_harden_sls_retbr_p ()); ++ } ++ return "b\\t%c1"; ++ } ++ [(set_attr "type" "branch, branch") ++ (set_attr "sls_length" "retbr,none")] + ) + + ;; Call subroutine returning any type. +diff --git a/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr-pacret.c b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr-pacret.c +new file mode 100644 +index 0000000..fa1887a +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr-pacret.c +@@ -0,0 +1,21 @@ ++/* Avoid ILP32 since pacret is only available for LP64 */ ++/* { dg-do compile { target { ! ilp32 } } } */ ++/* { dg-additional-options "-mharden-sls=retbr -mbranch-protection=pac-ret -march=armv8.3-a" } */ ++ ++/* Testing the do_return pattern for retaa and retab. */ ++long retbr_subcall(void); ++long retbr_do_return_retaa(void) ++{ ++ return retbr_subcall()+1; ++} ++ ++__attribute__((target("branch-protection=pac-ret+b-key"))) ++long retbr_do_return_retab(void) ++{ ++ return retbr_subcall()+1; ++} ++ ++/* Ensure there are no BR or RET instructions which are not directly followed ++ by a speculation barrier. */ ++/* { dg-final { scan-assembler-not {\t(br|ret|retaa|retab)\tx[0-9][0-9]?\n\t(?!dsb\tsy\n\tisb)} } } */ ++/* { dg-final { scan-assembler-not {ret\t} } } */ +diff --git a/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr.c b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr.c +new file mode 100644 +index 0000000..76b8d03 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-retbr.c +@@ -0,0 +1,119 @@ ++/* We ensure that -Wpedantic is off since it complains about the trampolines ++ we explicitly want to test. */ ++/* { dg-additional-options "-mharden-sls=retbr -Wno-pedantic " } */ ++/* ++ Ensure that the SLS hardening of RET and BR leaves no unprotected RET/BR ++ instructions. ++ */ ++typedef int (foo) (int, int); ++typedef void (bar) (int, int); ++struct sls_testclass { ++ foo *x; ++ bar *y; ++ int left; ++ int right; ++}; ++ ++int ++retbr_sibcall_value_insn (struct sls_testclass x) ++{ ++ return x.x(x.left, x.right); ++} ++ ++void ++retbr_sibcall_insn (struct sls_testclass x) ++{ ++ x.y(x.left, x.right); ++} ++ ++/* Aim to test two different returns. ++ One that introduces a tail call in the middle of the function, and one that ++ has a normal return. */ ++int ++retbr_multiple_returns (struct sls_testclass x) ++{ ++ int temp; ++ if (x.left % 10) ++ return x.x(x.left, 100); ++ else if (x.right % 20) ++ { ++ return x.x(x.left * x.right, 100); ++ } ++ temp = x.left % x.right; ++ temp *= 100; ++ temp /= 2; ++ return temp % 3; ++} ++ ++void ++retbr_multiple_returns_void (struct sls_testclass x) ++{ ++ if (x.left % 10) ++ { ++ x.y(x.left, 100); ++ } ++ else if (x.right % 20) ++ { ++ x.y(x.left * x.right, 100); ++ } ++ return; ++} ++ ++/* Testing the casesi jump via register. */ ++__attribute__ ((optimize ("Os"))) ++int ++retbr_casesi_dispatch (struct sls_testclass x) ++{ ++ switch (x.left) ++ { ++ case -5: ++ return -2; ++ case -3: ++ return -1; ++ case 0: ++ return 0; ++ case 3: ++ return 1; ++ case 5: ++ break; ++ default: ++ __builtin_unreachable (); ++ } ++ return x.right; ++} ++ ++/* Testing the BR in trampolines is mitigated against. */ ++void f1 (void *); ++void f3 (void *, void (*)(void *)); ++void f2 (void *); ++ ++int ++retbr_trampolines (void *a, int b) ++{ ++ if (!b) ++ { ++ f1 (a); ++ return 1; ++ } ++ if (b) ++ { ++ void retbr_tramp_internal (void *c) ++ { ++ if (c == a) ++ f2 (c); ++ } ++ f3 (a, retbr_tramp_internal); ++ } ++ return 0; ++} ++ ++/* Testing the indirect_jump pattern. */ ++void ++retbr_indirect_jump (int *buf) ++{ ++ __builtin_longjmp(buf, 1); ++} ++ ++/* Ensure there are no BR or RET instructions which are not directly followed ++ by a speculation barrier. */ ++/* { dg-final { scan-assembler-not {\t(br|ret|retaa|retab)\tx[0-9][0-9]?\n\t(?!dsb\tsy\n\tisb|sb)} } } */ +diff --git a/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-mitigation.exp b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-mitigation.exp +new file mode 100644 +index 0000000..8122503 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-mitigation.exp +@@ -0,0 +1,73 @@ ++# Regression driver for SLS mitigation on AArch64. ++# Copyright (C) 2020 Free Software Foundation, Inc. ++# Contributed by ARM Ltd. ++# ++# This file is part of GCC. ++# ++# GCC is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by ++# the Free Software Foundation; either version 3, or (at your option) ++# any later version. ++# ++# GCC is distributed in the hope that it will be useful, but ++# WITHOUT ANY WARRANTY; without even the implied warranty of ++# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++# General Public License for more details. ++# ++# You should have received a copy of the GNU General Public License ++# along with GCC; see the file COPYING3. If not see ++# <http://www.gnu.org/licenses/>. */ ++ ++# Exit immediately if this isn't an AArch64 target. ++if {![istarget aarch64*-*-*] } then { ++ return ++} ++ ++# Load support procs. ++load_lib gcc-dg.exp ++load_lib torture-options.exp ++ ++# If a testcase doesn't have special options, use these. ++global DEFAULT_CFLAGS ++if ![info exists DEFAULT_CFLAGS] then { ++ set DEFAULT_CFLAGS " " ++} ++ ++# Initialize `dg'. ++dg-init ++torture-init ++ ++# Use different architectures as well as the normal optimisation options. ++# (i.e. use both SB and DSB+ISB barriers). ++ ++set save-dg-do-what-default ${dg-do-what-default} ++# Main loop. ++# Run with torture tests (i.e. a bunch of different optimisation levels) just ++# to increase test coverage. ++set dg-do-what-default assemble ++gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ ++ "-save-temps" $DEFAULT_CFLAGS ++ ++# Run the same tests but this time with SB extension. ++# Since not all supported assemblers will support that extension we decide ++# whether to assemble or just compile based on whether the extension is ++# supported for the available assembler. ++ ++set templist {} ++foreach x $DG_TORTURE_OPTIONS { ++ lappend templist "$x -march=armv8.3-a+sb " ++ lappend templist "$x -march=armv8-a+sb " ++} ++set-torture-options $templist ++if { [check_effective_target_aarch64_asm_sb_ok] } { ++ set dg-do-what-default assemble ++} else { ++ set dg-do-what-default compile ++} ++gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \ ++ "-save-temps" $DEFAULT_CFLAGS ++set dg-do-what-default ${save-dg-do-what-default} ++ ++# All done. ++torture-finish ++dg-finish +diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp +index 8a186dd..9d2e093 100644 +--- a/gcc/testsuite/lib/target-supports.exp ++++ b/gcc/testsuite/lib/target-supports.exp +@@ -9432,7 +9432,7 @@ proc check_effective_target_aarch64_tiny { } { + # various architecture extensions via the .arch_extension pseudo-op. + + foreach { aarch64_ext } { "fp" "simd" "crypto" "crc" "lse" "dotprod" "sve" +- "i8mm" "f32mm" "f64mm" "bf16" } { ++ "i8mm" "f32mm" "f64mm" "bf16" "sb" } { + eval [string map [list FUNC $aarch64_ext] { + proc check_effective_target_aarch64_asm_FUNC_ok { } { + if { [istarget aarch64*-*-*] } { +-- +2.7.4 + diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0002-gcc-poison-system-directories.patch b/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch index a1116e7509..30a8486016 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0002-gcc-poison-system-directories.patch +++ b/meta/recipes-devtools/gcc/gcc/0002-gcc-poison-system-directories.patch @@ -1,7 +1,7 @@ -From 68e78bc15de215fa15c7d8b56bd2e2b0539b34fa Mon Sep 17 00:00:00 2001 +From 74cc21f474402cf3578e37e1d7a1a22bbd070f6a Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 08:59:00 +0400 -Subject: [PATCH 02/36] gcc: poison-system-directories +Subject: [PATCH] gcc: poison-system-directories Add /sw/include and /opt/include based on the original zecke-no-host-includes.patch patch. The original patch checked for @@ -26,10 +26,10 @@ Upstream-Status: Pending 7 files changed, 68 insertions(+) diff --git a/gcc/common.opt b/gcc/common.opt -index d342c4f3749..c64fd4a6c50 100644 +index 65a82410abc..415f38fa1f4 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -684,6 +684,10 @@ Wreturn-local-addr +@@ -682,6 +682,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -41,10 +41,10 @@ index d342c4f3749..c64fd4a6c50 100644 Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. diff --git a/gcc/config.in b/gcc/config.in -index a718ceaf3da..5713342efb1 100644 +index 809e7b26823..5adeaeed36b 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -200,6 +200,12 @@ +@@ -224,6 +224,12 @@ #endif @@ -58,10 +58,10 @@ index a718ceaf3da..5713342efb1 100644 optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ diff --git a/gcc/configure b/gcc/configure -index 481071b4265..a6ea3a8a84c 100755 +index cd3d9516fce..8de766a942c 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -995,6 +995,7 @@ with_system_zlib +@@ -1010,6 +1010,7 @@ with_system_zlib enable_maintainer_mode enable_link_mutex enable_version_specific_runtime_libs @@ -69,7 +69,7 @@ index 481071b4265..a6ea3a8a84c 100755 enable_plugin enable_host_shared enable_libquadmath_support -@@ -1748,6 +1749,8 @@ Optional Features: +@@ -1766,6 +1767,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -78,7 +78,7 @@ index 481071b4265..a6ea3a8a84c 100755 --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries --disable-libquadmath-support -@@ -29750,6 +29753,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : +@@ -30235,6 +30238,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -99,10 +99,10 @@ index 481071b4265..a6ea3a8a84c 100755 diff --git a/gcc/configure.ac b/gcc/configure.ac -index ce2825580c6..d42bbd4fd1c 100644 +index 0de3b4bf97b..8bfd6feb780 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -6378,6 +6378,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -6595,6 +6595,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -120,18 +120,18 @@ index ce2825580c6..d42bbd4fd1c 100644 AC_SUBST(subdirs) AC_SUBST(srcdir) diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index 6ef36ce02aa..09414d8cc05 100644 +index f98161391a0..f12d8d12150 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -332,6 +332,7 @@ Objective-C and Objective-C++ Dialects}. - -Wpacked -Wpacked-bitfield-compat -Wpacked-not-aligned -Wpadded @gol +@@ -348,6 +348,7 @@ Objective-C and Objective-C++ Dialects}. + -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded @gol -Wparentheses -Wno-pedantic-ms-format @gol - -Wplacement-new -Wplacement-new=@var{n} @gol + -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @gol +-Wno-poison-system-directories @gol - -Wpointer-arith -Wpointer-compare -Wno-pointer-to-int-cast @gol -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls @gol - -Wrestrict -Wno-return-local-addr @gol -@@ -6289,6 +6290,14 @@ made up of data only and thus requires no special treatment. But, for + -Wrestrict -Wno-return-local-addr -Wreturn-type @gol + -Wno-scalar-storage-order -Wsequence-point @gol +@@ -6924,6 +6925,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -147,10 +147,10 @@ index 6ef36ce02aa..09414d8cc05 100644 @opindex Wfloat-equal @opindex Wno-float-equal diff --git a/gcc/gcc.c b/gcc/gcc.c -index 4f57765b012..a2601a6bb06 100644 +index 9f790db0daf..b2200c5185a 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -1042,6 +1042,8 @@ proper position among the other output files. */ +@@ -1041,6 +1041,8 @@ proper position among the other output files. */ "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ @@ -160,7 +160,7 @@ index 4f57765b012..a2601a6bb06 100644 VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ diff --git a/gcc/incpath.c b/gcc/incpath.c -index bcbe2082905..5752298bbf2 100644 +index 8a2bda00f80..9098ab044ab 100644 --- a/gcc/incpath.c +++ b/gcc/incpath.c @@ -26,6 +26,7 @@ @@ -198,6 +198,3 @@ index bcbe2082905..5752298bbf2 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc/0003-aarch64-Mitigate-SLS-for-BLR-instruction.patch b/meta/recipes-devtools/gcc/gcc/0003-aarch64-Mitigate-SLS-for-BLR-instruction.patch new file mode 100644 index 0000000000..716a367172 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0003-aarch64-Mitigate-SLS-for-BLR-instruction.patch @@ -0,0 +1,658 @@ +Upstream-Status: Backport +Signed-off-by: Ross Burton <ross.burton@arm.com> + +From a5e7efc40ed841934c1d913f39476afa17d8e5f7 Mon Sep 17 00:00:00 2001 +From: Matthew Malcomson <matthew.malcomson@arm.com> +Date: Thu, 9 Jul 2020 09:11:59 +0100 +Subject: [PATCH 3/3] aarch64: Mitigate SLS for BLR instruction + +This patch introduces the mitigation for Straight Line Speculation past +the BLR instruction. + +This mitigation replaces BLR instructions with a BL to a stub which uses +a BR to jump to the original value. These function stubs are then +appended with a speculation barrier to ensure no straight line +speculation happens after these jumps. + +When optimising for speed we use a set of stubs for each function since +this should help the branch predictor make more accurate predictions +about where a stub should branch. + +When optimising for size we use one set of stubs for all functions. +This set of stubs can have human readable names, and we are using +`__call_indirect_x<N>` for register x<N>. + +When BTI branch protection is enabled the BLR instruction can jump to a +`BTI c` instruction using any register, while the BR instruction can +only jump to a `BTI c` instruction using the x16 or x17 registers. +Hence, in order to ensure this transformation is safe we mov the value +of the original register into x16 and use x16 for the BR. + +As an example when optimising for size: +a + BLR x0 +instruction would get transformed to something like + BL __call_indirect_x0 +where __call_indirect_x0 labels a thunk that contains +__call_indirect_x0: + MOV X16, X0 + BR X16 + <speculation barrier> + +The first version of this patch used local symbols specific to a +compilation unit to try and avoid relocations. +This was mistaken since functions coming from the same compilation unit +can still be in different sections, and the assembler will insert +relocations at jumps between sections. + +On any relocation the linker is permitted to emit a veneer to handle +jumps between symbols that are very far apart. The registers x16 and +x17 may be clobbered by these veneers. +Hence the function stubs cannot rely on the values of x16 and x17 being +the same as just before the function stub is called. + +Similar can be said for the hot/cold partitioning of single functions, +so function-local stubs have the same restriction. + +This updated version of the patch never emits function stubs for x16 and +x17, and instead forces other registers to be used. + +Given the above, there is now no benefit to local symbols (since they +are not enough to avoid dealing with linker intricacies). This patch +now uses global symbols with hidden visibility each stored in their own +COMDAT section. This means stubs can be shared between compilation +units while still avoiding the PLT indirection. + +This patch also removes the `__call_indirect_x30` stub (and +function-local equivalent) which would simply jump back to the original +location. + +The function-local stubs are emitted to the assembly output file in one +chunk, which means we need not add the speculation barrier directly +after each one. +This is because we know for certain that the instructions directly after +the BR in all but the last function stub will be from another one of +these stubs and hence will not contain a speculation gadget. +Instead we add a speculation barrier at the end of the sequence of +stubs. + +The global stubs are emitted in COMDAT/.linkonce sections by +themselves so that the linker can remove duplicates from multiple object +files. This means they are not emitted in one chunk, and each one must +include the speculation barrier. + +Another difference is that since the global stubs are shared across +compilation units we do not know that all functions will be targeting an +architecture supporting the SB instruction. +Rather than provide multiple stubs for each architecture, we provide a +stub that will work for all architectures -- using the DSB+ISB barrier. + +This mitigation does not apply for BLR instructions in the following +places: +- Some accesses to thread-local variables use a code sequence with a BLR + instruction. This code sequence is part of the binary interface between + compiler and linker. If this BLR instruction needs to be mitigated, it'd + probably be best to do so in the linker. It seems that the code sequence + for thread-local variable access is unlikely to lead to a Spectre Revalation + Gadget. +- PLT stubs are produced by the linker and each contain a BLR instruction. + It seems that at most only after the last PLT stub a Spectre Revalation + Gadget might appear. + +Testing: + Bootstrap and regtest on AArch64 + (with BOOT_CFLAGS="-mharden-sls=retbr,blr") + Used a temporary hack(1) in gcc-dg.exp to use these options on every + test in the testsuite, a slight modification to emit the speculation + barrier after every function stub, and a script to check that the + output never emitted a BLR, or unmitigated BR or RET instruction. + Similar on an aarch64-none-elf cross-compiler. + +1) Temporary hack emitted a speculation barrier at the end of every stub +function, and used a script to ensure that: + a) Every RET or BR is immediately followed by a speculation barrier. + b) No BLR instruction is emitted by compiler. + +gcc/ChangeLog: + + * config/aarch64/aarch64-protos.h (aarch64_indirect_call_asm): + New declaration. + * config/aarch64/aarch64.c (aarch64_regno_regclass): Handle new + stub registers class. + (aarch64_class_max_nregs): Likewise. + (aarch64_register_move_cost): Likewise. + (aarch64_sls_shared_thunks): Global array to store stub labels. + (aarch64_sls_emit_function_stub): New. + (aarch64_create_blr_label): New. + (aarch64_sls_emit_blr_function_thunks): New. + (aarch64_sls_emit_shared_blr_thunks): New. + (aarch64_asm_file_end): New. + (aarch64_indirect_call_asm): New. + (TARGET_ASM_FILE_END): Use aarch64_asm_file_end. + (TARGET_ASM_FUNCTION_EPILOGUE): Use + aarch64_sls_emit_blr_function_thunks. + * config/aarch64/aarch64.h (STB_REGNUM_P): New. + (enum reg_class): Add STUB_REGS class. + (machine_function): Introduce `call_via` array for + function-local stub labels. + * config/aarch64/aarch64.md (*call_insn, *call_value_insn): Use + aarch64_indirect_call_asm to emit code when hardening BLR + instructions. + * config/aarch64/constraints.md (Ucr): New constraint + representing registers for indirect calls. Is GENERAL_REGS + usually, and STUB_REGS when hardening BLR instruction against + SLS. + * config/aarch64/predicates.md (aarch64_general_reg): STUB_REGS class + is also a general register. + +gcc/testsuite/ChangeLog: + + * gcc.target/aarch64/sls-mitigation/sls-miti-blr-bti.c: New test. + * gcc.target/aarch64/sls-mitigation/sls-miti-blr.c: New test. +--- + gcc/config/aarch64/aarch64-protos.h | 1 + + gcc/config/aarch64/aarch64.c | 225 ++++++++++++++++++++- + gcc/config/aarch64/aarch64.h | 15 ++ + gcc/config/aarch64/aarch64.md | 11 +- + gcc/config/aarch64/constraints.md | 9 + + gcc/config/aarch64/predicates.md | 3 +- + .../aarch64/sls-mitigation/sls-miti-blr-bti.c | 40 ++++ + .../aarch64/sls-mitigation/sls-miti-blr.c | 33 +++ + 8 files changed, 328 insertions(+), 9 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr-bti.c + create mode 100644 gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr.c + +diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h +index ee0ffde..839f801 100644 +--- a/gcc/config/aarch64/aarch64-protos.h ++++ b/gcc/config/aarch64/aarch64-protos.h +@@ -782,6 +782,7 @@ extern const atomic_ool_names aarch64_ool_ldeor_names; + tree aarch64_resolve_overloaded_builtin_general (location_t, tree, void *); + + const char *aarch64_sls_barrier (int); ++const char *aarch64_indirect_call_asm (rtx); + extern bool aarch64_harden_sls_retbr_p (void); + extern bool aarch64_harden_sls_blr_p (void); + +diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c +index 2389d49..0f7bba3 100644 +--- a/gcc/config/aarch64/aarch64.c ++++ b/gcc/config/aarch64/aarch64.c +@@ -10605,6 +10605,9 @@ aarch64_label_mentioned_p (rtx x) + enum reg_class + aarch64_regno_regclass (unsigned regno) + { ++ if (STUB_REGNUM_P (regno)) ++ return STUB_REGS; ++ + if (GP_REGNUM_P (regno)) + return GENERAL_REGS; + +@@ -10939,6 +10942,7 @@ aarch64_class_max_nregs (reg_class_t regclass, machine_mode mode) + unsigned int nregs, vec_flags; + switch (regclass) + { ++ case STUB_REGS: + case TAILCALL_ADDR_REGS: + case POINTER_REGS: + case GENERAL_REGS: +@@ -13155,10 +13159,12 @@ aarch64_register_move_cost (machine_mode mode, + = aarch64_tune_params.regmove_cost; + + /* Caller save and pointer regs are equivalent to GENERAL_REGS. */ +- if (to == TAILCALL_ADDR_REGS || to == POINTER_REGS) ++ if (to == TAILCALL_ADDR_REGS || to == POINTER_REGS ++ || to == STUB_REGS) + to = GENERAL_REGS; + +- if (from == TAILCALL_ADDR_REGS || from == POINTER_REGS) ++ if (from == TAILCALL_ADDR_REGS || from == POINTER_REGS ++ || from == STUB_REGS) + from = GENERAL_REGS; + + /* Make RDFFR very expensive. In particular, if we know that the FFR +@@ -22957,6 +22963,215 @@ aarch64_sls_barrier (int mitigation_required) + : ""; + } + ++static GTY (()) tree aarch64_sls_shared_thunks[30]; ++static GTY (()) bool aarch64_sls_shared_thunks_needed = false; ++const char *indirect_symbol_names[30] = { ++ "__call_indirect_x0", ++ "__call_indirect_x1", ++ "__call_indirect_x2", ++ "__call_indirect_x3", ++ "__call_indirect_x4", ++ "__call_indirect_x5", ++ "__call_indirect_x6", ++ "__call_indirect_x7", ++ "__call_indirect_x8", ++ "__call_indirect_x9", ++ "__call_indirect_x10", ++ "__call_indirect_x11", ++ "__call_indirect_x12", ++ "__call_indirect_x13", ++ "__call_indirect_x14", ++ "__call_indirect_x15", ++ "", /* "__call_indirect_x16", */ ++ "", /* "__call_indirect_x17", */ ++ "__call_indirect_x18", ++ "__call_indirect_x19", ++ "__call_indirect_x20", ++ "__call_indirect_x21", ++ "__call_indirect_x22", ++ "__call_indirect_x23", ++ "__call_indirect_x24", ++ "__call_indirect_x25", ++ "__call_indirect_x26", ++ "__call_indirect_x27", ++ "__call_indirect_x28", ++ "__call_indirect_x29", ++}; ++ ++/* Function to create a BLR thunk. This thunk is used to mitigate straight ++ line speculation. Instead of a simple BLR that can be speculated past, ++ we emit a BL to this thunk, and this thunk contains a BR to the relevant ++ register. These thunks have the relevant speculation barries put after ++ their indirect branch so that speculation is blocked. ++ ++ We use such a thunk so the speculation barriers are kept off the ++ architecturally executed path in order to reduce the performance overhead. ++ ++ When optimizing for size we use stubs shared by the linked object. ++ When optimizing for performance we emit stubs for each function in the hope ++ that the branch predictor can better train on jumps specific for a given ++ function. */ ++rtx ++aarch64_sls_create_blr_label (int regnum) ++{ ++ gcc_assert (STUB_REGNUM_P (regnum)); ++ if (optimize_function_for_size_p (cfun)) ++ { ++ /* For the thunks shared between different functions in this compilation ++ unit we use a named symbol -- this is just for users to more easily ++ understand the generated assembly. */ ++ aarch64_sls_shared_thunks_needed = true; ++ const char *thunk_name = indirect_symbol_names[regnum]; ++ if (aarch64_sls_shared_thunks[regnum] == NULL) ++ { ++ /* Build a decl representing this function stub and record it for ++ later. We build a decl here so we can use the GCC machinery for ++ handling sections automatically (through `get_named_section` and ++ `make_decl_one_only`). That saves us a lot of trouble handling ++ the specifics of different output file formats. */ ++ tree decl = build_decl (BUILTINS_LOCATION, FUNCTION_DECL, ++ get_identifier (thunk_name), ++ build_function_type_list (void_type_node, ++ NULL_TREE)); ++ DECL_RESULT (decl) = build_decl (BUILTINS_LOCATION, RESULT_DECL, ++ NULL_TREE, void_type_node); ++ TREE_PUBLIC (decl) = 1; ++ TREE_STATIC (decl) = 1; ++ DECL_IGNORED_P (decl) = 1; ++ DECL_ARTIFICIAL (decl) = 1; ++ make_decl_one_only (decl, DECL_ASSEMBLER_NAME (decl)); ++ resolve_unique_section (decl, 0, false); ++ aarch64_sls_shared_thunks[regnum] = decl; ++ } ++ ++ return gen_rtx_SYMBOL_REF (Pmode, thunk_name); ++ } ++ ++ if (cfun->machine->call_via[regnum] == NULL) ++ cfun->machine->call_via[regnum] ++ = gen_rtx_LABEL_REF (Pmode, gen_label_rtx ()); ++ return cfun->machine->call_via[regnum]; ++} ++ ++/* Helper function for aarch64_sls_emit_blr_function_thunks and ++ aarch64_sls_emit_shared_blr_thunks below. */ ++static void ++aarch64_sls_emit_function_stub (FILE *out_file, int regnum) ++{ ++ /* Save in x16 and branch to that function so this transformation does ++ not prevent jumping to `BTI c` instructions. */ ++ asm_fprintf (out_file, "\tmov\tx16, x%d\n", regnum); ++ asm_fprintf (out_file, "\tbr\tx16\n"); ++} ++ ++/* Emit all BLR stubs for this particular function. ++ Here we emit all the BLR stubs needed for the current function. Since we ++ emit these stubs in a consecutive block we know there will be no speculation ++ gadgets between each stub, and hence we only emit a speculation barrier at ++ the end of the stub sequences. ++ ++ This is called in the TARGET_ASM_FUNCTION_EPILOGUE hook. */ ++void ++aarch64_sls_emit_blr_function_thunks (FILE *out_file) ++{ ++ if (! aarch64_harden_sls_blr_p ()) ++ return; ++ ++ bool any_functions_emitted = false; ++ /* We must save and restore the current function section since this assembly ++ is emitted at the end of the function. This means it can be emitted *just ++ after* the cold section of a function. That cold part would be emitted in ++ a different section. That switch would trigger a `.cfi_endproc` directive ++ to be emitted in the original section and a `.cfi_startproc` directive to ++ be emitted in the new section. Switching to the original section without ++ restoring would mean that the `.cfi_endproc` emitted as a function ends ++ would happen in a different section -- leaving an unmatched ++ `.cfi_startproc` in the cold text section and an unmatched `.cfi_endproc` ++ in the standard text section. */ ++ section *save_text_section = in_section; ++ switch_to_section (function_section (current_function_decl)); ++ for (int regnum = 0; regnum < 30; ++regnum) ++ { ++ rtx specu_label = cfun->machine->call_via[regnum]; ++ if (specu_label == NULL) ++ continue; ++ ++ targetm.asm_out.print_operand (out_file, specu_label, 0); ++ asm_fprintf (out_file, ":\n"); ++ aarch64_sls_emit_function_stub (out_file, regnum); ++ any_functions_emitted = true; ++ } ++ if (any_functions_emitted) ++ /* Can use the SB if needs be here, since this stub will only be used ++ by the current function, and hence for the current target. */ ++ asm_fprintf (out_file, "\t%s\n", aarch64_sls_barrier (true)); ++ switch_to_section (save_text_section); ++} ++ ++/* Emit shared BLR stubs for the current compilation unit. ++ Over the course of compiling this unit we may have converted some BLR ++ instructions to a BL to a shared stub function. This is where we emit those ++ stub functions. ++ This function is for the stubs shared between different functions in this ++ compilation unit. We share when optimizing for size instead of speed. ++ ++ This function is called through the TARGET_ASM_FILE_END hook. */ ++void ++aarch64_sls_emit_shared_blr_thunks (FILE *out_file) ++{ ++ if (! aarch64_sls_shared_thunks_needed) ++ return; ++ ++ for (int regnum = 0; regnum < 30; ++regnum) ++ { ++ tree decl = aarch64_sls_shared_thunks[regnum]; ++ if (!decl) ++ continue; ++ ++ const char *name = indirect_symbol_names[regnum]; ++ switch_to_section (get_named_section (decl, NULL, 0)); ++ ASM_OUTPUT_ALIGN (out_file, 2); ++ targetm.asm_out.globalize_label (out_file, name); ++ /* Only emits if the compiler is configured for an assembler that can ++ handle visibility directives. */ ++ targetm.asm_out.assemble_visibility (decl, VISIBILITY_HIDDEN); ++ ASM_OUTPUT_TYPE_DIRECTIVE (out_file, name, "function"); ++ ASM_OUTPUT_LABEL (out_file, name); ++ aarch64_sls_emit_function_stub (out_file, regnum); ++ /* Use the most conservative target to ensure it can always be used by any ++ function in the translation unit. */ ++ asm_fprintf (out_file, "\tdsb\tsy\n\tisb\n"); ++ ASM_DECLARE_FUNCTION_SIZE (out_file, name, decl); ++ } ++} ++ ++/* Implement TARGET_ASM_FILE_END. */ ++void ++aarch64_asm_file_end () ++{ ++ aarch64_sls_emit_shared_blr_thunks (asm_out_file); ++ /* Since this function will be called for the ASM_FILE_END hook, we ensure ++ that what would be called otherwise (e.g. `file_end_indicate_exec_stack` ++ for FreeBSD) still gets called. */ ++#ifdef TARGET_ASM_FILE_END ++ TARGET_ASM_FILE_END (); ++#endif ++} ++ ++const char * ++aarch64_indirect_call_asm (rtx addr) ++{ ++ gcc_assert (REG_P (addr)); ++ if (aarch64_harden_sls_blr_p ()) ++ { ++ rtx stub_label = aarch64_sls_create_blr_label (REGNO (addr)); ++ output_asm_insn ("bl\t%0", &stub_label); ++ } ++ else ++ output_asm_insn ("blr\t%0", &addr); ++ return ""; ++} ++ + /* Target-specific selftests. */ + + #if CHECKING_P +@@ -23507,6 +23722,12 @@ aarch64_libgcc_floating_mode_supported_p + #undef TARGET_MD_ASM_ADJUST + #define TARGET_MD_ASM_ADJUST arm_md_asm_adjust + ++#undef TARGET_ASM_FILE_END ++#define TARGET_ASM_FILE_END aarch64_asm_file_end ++ ++#undef TARGET_ASM_FUNCTION_EPILOGUE ++#define TARGET_ASM_FUNCTION_EPILOGUE aarch64_sls_emit_blr_function_thunks ++ + struct gcc_target targetm = TARGET_INITIALIZER; + + #include "gt-aarch64.h" +diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h +index 8e0fc37..7331450 100644 +--- a/gcc/config/aarch64/aarch64.h ++++ b/gcc/config/aarch64/aarch64.h +@@ -643,6 +643,16 @@ extern unsigned aarch64_architecture_version; + #define GP_REGNUM_P(REGNO) \ + (((unsigned) (REGNO - R0_REGNUM)) <= (R30_REGNUM - R0_REGNUM)) + ++/* Registers known to be preserved over a BL instruction. This consists of the ++ GENERAL_REGS without x16, x17, and x30. The x30 register is changed by the ++ BL instruction itself, while the x16 and x17 registers may be used by ++ veneers which can be inserted by the linker. */ ++#define STUB_REGNUM_P(REGNO) \ ++ (GP_REGNUM_P (REGNO) \ ++ && (REGNO) != R16_REGNUM \ ++ && (REGNO) != R17_REGNUM \ ++ && (REGNO) != R30_REGNUM) \ ++ + #define FP_REGNUM_P(REGNO) \ + (((unsigned) (REGNO - V0_REGNUM)) <= (V31_REGNUM - V0_REGNUM)) + +@@ -667,6 +677,7 @@ enum reg_class + { + NO_REGS, + TAILCALL_ADDR_REGS, ++ STUB_REGS, + GENERAL_REGS, + STACK_REG, + POINTER_REGS, +@@ -689,6 +700,7 @@ enum reg_class + { \ + "NO_REGS", \ + "TAILCALL_ADDR_REGS", \ ++ "STUB_REGS", \ + "GENERAL_REGS", \ + "STACK_REG", \ + "POINTER_REGS", \ +@@ -708,6 +720,7 @@ enum reg_class + { \ + { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \ + { 0x00030000, 0x00000000, 0x00000000 }, /* TAILCALL_ADDR_REGS */\ ++ { 0x3ffcffff, 0x00000000, 0x00000000 }, /* STUB_REGS */ \ + { 0x7fffffff, 0x00000000, 0x00000003 }, /* GENERAL_REGS */ \ + { 0x80000000, 0x00000000, 0x00000000 }, /* STACK_REG */ \ + { 0xffffffff, 0x00000000, 0x00000003 }, /* POINTER_REGS */ \ +@@ -862,6 +875,8 @@ typedef struct GTY (()) machine_function + struct aarch64_frame frame; + /* One entry for each hard register. */ + bool reg_is_wrapped_separately[LAST_SAVED_REGNUM]; ++ /* One entry for each general purpose register. */ ++ rtx call_via[SP_REGNUM]; + bool label_is_assembled; + } machine_function; + #endif +diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md +index dda04ee..43da754 100644 +--- a/gcc/config/aarch64/aarch64.md ++++ b/gcc/config/aarch64/aarch64.md +@@ -1022,16 +1022,15 @@ + ) + + (define_insn "*call_insn" +- [(call (mem:DI (match_operand:DI 0 "aarch64_call_insn_operand" "r, Usf")) ++ [(call (mem:DI (match_operand:DI 0 "aarch64_call_insn_operand" "Ucr, Usf")) + (match_operand 1 "" "")) + (unspec:DI [(match_operand:DI 2 "const_int_operand")] UNSPEC_CALLEE_ABI) + (clobber (reg:DI LR_REGNUM))] + "" + "@ +- blr\\t%0 ++ * return aarch64_indirect_call_asm (operands[0]); + bl\\t%c0" +- [(set_attr "type" "call, call")] +-) ++ [(set_attr "type" "call, call")]) + + (define_expand "call_value" + [(parallel +@@ -1050,13 +1049,13 @@ + + (define_insn "*call_value_insn" + [(set (match_operand 0 "" "") +- (call (mem:DI (match_operand:DI 1 "aarch64_call_insn_operand" "r, Usf")) ++ (call (mem:DI (match_operand:DI 1 "aarch64_call_insn_operand" "Ucr, Usf")) + (match_operand 2 "" ""))) + (unspec:DI [(match_operand:DI 3 "const_int_operand")] UNSPEC_CALLEE_ABI) + (clobber (reg:DI LR_REGNUM))] + "" + "@ +- blr\\t%1 ++ * return aarch64_indirect_call_asm (operands[1]); + bl\\t%c1" + [(set_attr "type" "call, call")] + ) +diff --git a/gcc/config/aarch64/constraints.md b/gcc/config/aarch64/constraints.md +index d993268..8cc6f50 100644 +--- a/gcc/config/aarch64/constraints.md ++++ b/gcc/config/aarch64/constraints.md +@@ -24,6 +24,15 @@ + (define_register_constraint "Ucs" "TAILCALL_ADDR_REGS" + "@internal Registers suitable for an indirect tail call") + ++(define_register_constraint "Ucr" ++ "aarch64_harden_sls_blr_p () ? STUB_REGS : GENERAL_REGS" ++ "@internal Registers to be used for an indirect call. ++ This is usually the general registers, but when we are hardening against ++ Straight Line Speculation we disallow x16, x17, and x30 so we can use ++ indirection stubs. These indirection stubs cannot use the above registers ++ since they will be reached by a BL that may have to go through a linker ++ veneer.") ++ + (define_register_constraint "w" "FP_REGS" + "Floating point and SIMD vector registers.") + +diff --git a/gcc/config/aarch64/predicates.md b/gcc/config/aarch64/predicates.md +index 215fcec..1754b1e 100644 +--- a/gcc/config/aarch64/predicates.md ++++ b/gcc/config/aarch64/predicates.md +@@ -32,7 +32,8 @@ + + (define_predicate "aarch64_general_reg" + (and (match_operand 0 "register_operand") +- (match_test "REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS"))) ++ (match_test "REGNO_REG_CLASS (REGNO (op)) == STUB_REGS ++ || REGNO_REG_CLASS (REGNO (op)) == GENERAL_REGS"))) + + ;; Return true if OP a (const_int 0) operand. + (define_predicate "const0_operand" +diff --git a/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr-bti.c b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr-bti.c +new file mode 100644 +index 0000000..b1fb754 +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr-bti.c +@@ -0,0 +1,40 @@ ++/* { dg-do compile } */ ++/* { dg-additional-options "-mharden-sls=blr -mbranch-protection=bti" } */ ++/* ++ Ensure that the SLS hardening of BLR leaves no BLR instructions. ++ Here we also check that there are no BR instructions with anything except an ++ x16 or x17 register. This is because a `BTI c` instruction can be branched ++ to using a BLR instruction using any register, but can only be branched to ++ with a BR using an x16 or x17 register. ++ */ ++typedef int (foo) (int, int); ++typedef void (bar) (int, int); ++struct sls_testclass { ++ foo *x; ++ bar *y; ++ int left; ++ int right; ++}; ++ ++/* We test both RTL patterns for a call which returns a value and a call which ++ does not. */ ++int blr_call_value (struct sls_testclass x) ++{ ++ int retval = x.x(x.left, x.right); ++ if (retval % 10) ++ return 100; ++ return 9; ++} ++ ++int blr_call (struct sls_testclass x) ++{ ++ x.y(x.left, x.right); ++ if (x.left % 10) ++ return 100; ++ return 9; ++} ++ ++/* { dg-final { scan-assembler-not {\tblr\t} } } */ ++/* { dg-final { scan-assembler-not {\tbr\tx(?!16|17)} } } */ ++/* { dg-final { scan-assembler {\tbr\tx(16|17)} } } */ ++ +diff --git a/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr.c b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr.c +new file mode 100644 +index 0000000..88bafff +--- /dev/null ++++ b/gcc/testsuite/gcc.target/aarch64/sls-mitigation/sls-miti-blr.c +@@ -0,0 +1,33 @@ ++/* { dg-additional-options "-mharden-sls=blr -save-temps" } */ ++/* Ensure that the SLS hardening of BLR leaves no BLR instructions. ++ We only test that all BLR instructions have been removed, not that the ++ resulting code makes sense. */ ++typedef int (foo) (int, int); ++typedef void (bar) (int, int); ++struct sls_testclass { ++ foo *x; ++ bar *y; ++ int left; ++ int right; ++}; ++ ++/* We test both RTL patterns for a call which returns a value and a call which ++ does not. */ ++int blr_call_value (struct sls_testclass x) ++{ ++ int retval = x.x(x.left, x.right); ++ if (retval % 10) ++ return 100; ++ return 9; ++} ++ ++int blr_call (struct sls_testclass x) ++{ ++ x.y(x.left, x.right); ++ if (x.left % 10) ++ return 100; ++ return 9; ++} ++ ++/* { dg-final { scan-assembler-not {\tblr\t} } } */ ++/* { dg-final { scan-assembler {\tbr\tx[0-9][0-9]?} } } */ +-- +2.7.4 + diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch b/meta/recipes-devtools/gcc/gcc/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch index 23039d2123..27237feb5a 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch +++ b/meta/recipes-devtools/gcc/gcc/0003-gcc-4.3.3-SYSROOT_CFLAGS_FOR_TARGET.patch @@ -1,7 +1,7 @@ -From f8d60c4114acb92361c7b2f4a4561d4661e8da9d Mon Sep 17 00:00:00 2001 +From 6e3395c0bc933bdc3242d1dead4896d0aa4e11a8 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:08:31 +0400 -Subject: [PATCH 03/36] gcc-4.3.3: SYSROOT_CFLAGS_FOR_TARGET +Subject: [PATCH] gcc-4.3.3: SYSROOT_CFLAGS_FOR_TARGET Before committing, I noticed that PR/32161 was marked as a dup of PR/32009, but my previous patch did not fix it. @@ -26,10 +26,10 @@ Upstream-Status: Pending 1 file changed, 32 insertions(+) diff --git a/configure b/configure -index b121088d778..93aae5bb26f 100755 +index 226a64939d1..b31dc137fc9 100755 --- a/configure +++ b/configure -@@ -6864,6 +6864,38 @@ fi +@@ -6971,6 +6971,38 @@ fi @@ -68,6 +68,3 @@ index b121088d778..93aae5bb26f 100755 # Handle --with-headers=XXX. If the value is not "yes", the contents of # the named directory are copied to $(tooldir)/sys-include. if test x"${with_headers}" != x && test x"${with_headers}" != xno ; then --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0004-64-bit-multilib-hack.patch b/meta/recipes-devtools/gcc/gcc/0004-64-bit-multilib-hack.patch index a79c40c1aa..7c751bef65 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0004-64-bit-multilib-hack.patch +++ b/meta/recipes-devtools/gcc/gcc/0004-64-bit-multilib-hack.patch @@ -1,7 +1,7 @@ -From c2081c51db589471ea713870c72f13999abda815 Mon Sep 17 00:00:00 2001 +From 85a7c5aeb82ed61e6ef6d8e061b9da9e6a4a652c Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:10:06 +0400 -Subject: [PATCH 04/36] 64-bit multilib hack. +Subject: [PATCH] 64-bit multilib hack. GCC has internal multilib handling code but it assumes a very specific rigid directory layout. The build system implementation of multilib layout is very generic and allows @@ -37,7 +37,7 @@ Signed-off-by: Mark Hatle <mark.hatle@windriver.com> 5 files changed, 15 insertions(+), 20 deletions(-) diff --git a/gcc/config/aarch64/t-aarch64-linux b/gcc/config/aarch64/t-aarch64-linux -index 5ad670ba2ce..e26019e7157 100644 +index 83e59e33b85..b1356be1fb4 100644 --- a/gcc/config/aarch64/t-aarch64-linux +++ b/gcc/config/aarch64/t-aarch64-linux @@ -21,8 +21,8 @@ @@ -54,7 +54,7 @@ index 5ad670ba2ce..e26019e7157 100644 -MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) +#MULTILIB_OSDIRNAMES += mabi.ilp32=../libilp32$(call if_multiarch,:aarch64$(AARCH_BE)-linux-gnu_ilp32) diff --git a/gcc/config/i386/t-linux64 b/gcc/config/i386/t-linux64 -index c686ab2f0d2..c82b60dadcd 100644 +index 1171e218578..5e057b7e5db 100644 --- a/gcc/config/i386/t-linux64 +++ b/gcc/config/i386/t-linux64 @@ -32,7 +32,5 @@ @@ -68,7 +68,7 @@ index c686ab2f0d2..c82b60dadcd 100644 +MULTILIB_DIRNAMES = . . +MULTILIB_OSDIRNAMES = ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) diff --git a/gcc/config/mips/t-linux64 b/gcc/config/mips/t-linux64 -index 3a2ff700d7d..13ef19576b5 100644 +index ceb58d3b5f3..43fe2bf28ab 100644 --- a/gcc/config/mips/t-linux64 +++ b/gcc/config/mips/t-linux64 @@ -17,10 +17,6 @@ @@ -98,7 +98,7 @@ index 216d2776a18..e4d817621fc 100644 +#MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_OSDIRNAMES := ../$(shell basename $(base_libdir)) ../$(shell basename $(base_libdir)) diff --git a/gcc/config/rs6000/t-linux64 b/gcc/config/rs6000/t-linux64 -index f3c6e2be1d9..bd0393155fa 100644 +index 264a7e27524..dc9d440f66b 100644 --- a/gcc/config/rs6000/t-linux64 +++ b/gcc/config/rs6000/t-linux64 @@ -26,10 +26,9 @@ @@ -114,6 +114,3 @@ index f3c6e2be1d9..bd0393155fa 100644 rs6000-linux.o: $(srcdir)/config/rs6000/rs6000-linux.c $(COMPILE) $< --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0005-optional-libstdc.patch b/meta/recipes-devtools/gcc/gcc/0005-optional-libstdc.patch index f4fac91467..4020c9e3cf 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0005-optional-libstdc.patch +++ b/meta/recipes-devtools/gcc/gcc/0005-optional-libstdc.patch @@ -1,7 +1,7 @@ -From e7e504f4a90cfa395e7f8ee779f8c3ed687802ca Mon Sep 17 00:00:00 2001 +From 6ddfb0bfcd1eea71acd37ab06f7a4510b9f1d12b Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:12:56 +0400 -Subject: [PATCH 05/36] optional libstdc +Subject: [PATCH] optional libstdc gcc-runtime builds libstdc++ separately from gcc-cross-*. Its configure tests using g++ will not run correctly since by default the linker will try to link against libstdc++ @@ -25,10 +25,10 @@ Upstream-Status: Inappropriate [embedded specific] 4 files changed, 37 insertions(+), 1 deletion(-) diff --git a/gcc/c-family/c.opt b/gcc/c-family/c.opt -index 916cc67b453..41619fa591c 100644 +index c49da99d395..35f712e2c84 100644 --- a/gcc/c-family/c.opt +++ b/gcc/c-family/c.opt -@@ -1952,6 +1952,10 @@ nostdinc++ +@@ -2025,6 +2025,10 @@ nostdinc++ C++ ObjC++ Do not search standard system include directories for C++. @@ -40,7 +40,7 @@ index 916cc67b453..41619fa591c 100644 C ObjC C++ ObjC++ Joined Separate ; Documented in common.opt diff --git a/gcc/cp/g++spec.c b/gcc/cp/g++spec.c -index 6c4574a837d..0e2657f00ee 100644 +index 0ab63bcd211..7b081e9e4f0 100644 --- a/gcc/cp/g++spec.c +++ b/gcc/cp/g++spec.c @@ -137,6 +137,7 @@ lang_specific_driver (struct cl_decoded_option **in_decoded_options, @@ -52,10 +52,10 @@ index 6c4574a837d..0e2657f00ee 100644 library = -1; break; diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index 09414d8cc05..a43969bc9f0 100644 +index f12d8d12150..cf6cb428e7d 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -228,6 +228,9 @@ in the following sections. +@@ -230,6 +230,9 @@ in the following sections. -fno-weak -nostdinc++ @gol -fvisibility-inlines-hidden @gol -fvisibility-ms-compat @gol @@ -63,9 +63,9 @@ index 09414d8cc05..a43969bc9f0 100644 +-fvtv-counts -fvtv-debug @gol +-nostdlib++ @gol -fext-numeric-literals @gol - -Wabi=@var{n} -Wabi-tag -Wconversion-null -Wctor-dtor-privacy @gol - -Wdelete-non-virtual-dtor -Wdeprecated-copy -Wdeprecated-copy-dtor @gol -@@ -538,7 +541,7 @@ Objective-C and Objective-C++ Dialects}. + -Wabi-tag -Wcatch-value -Wcatch-value=@var{n} @gol + -Wno-class-conversion -Wclass-memaccess @gol +@@ -599,7 +602,7 @@ Objective-C and Objective-C++ Dialects}. -pie -pthread -r -rdynamic @gol -s -static -static-pie -static-libgcc -static-libstdc++ @gol -static-libasan -static-libtsan -static-liblsan -static-libubsan @gol @@ -74,7 +74,7 @@ index 09414d8cc05..a43969bc9f0 100644 -T @var{script} -Wl,@var{option} -Xlinker @var{option} @gol -u @var{symbol} -z @var{keyword}} -@@ -13312,6 +13315,33 @@ Specify that the program entry point is @var{entry}. The argument is +@@ -14407,6 +14410,33 @@ Specify that the program entry point is @var{entry}. The argument is interpreted by the linker; the GNU linker accepts either a symbol name or an address. @@ -109,10 +109,10 @@ index 09414d8cc05..a43969bc9f0 100644 @opindex pie Produce a dynamically linked position independent executable on targets diff --git a/gcc/gcc.c b/gcc/gcc.c -index a2601a6bb06..cd6c6fc95db 100644 +index b2200c5185a..f8be58ce0a6 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -1052,6 +1052,7 @@ proper position among the other output files. */ +@@ -1051,6 +1051,7 @@ proper position among the other output files. */ %(mflib) " STACK_SPLIT_SPEC "\ %{fprofile-arcs|fprofile-generate*|coverage:-lgcov} " SANITIZER_SPEC " \ %{!nostdlib:%{!r:%{!nodefaultlibs:%(link_ssp) %(link_gcc_c_sequence)}}}\ @@ -120,6 +120,3 @@ index a2601a6bb06..cd6c6fc95db 100644 %{!nostdlib:%{!r:%{!nostartfiles:%E}}} %{T*} \n%(post_link) }}}}}}" #endif --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0006-COLLECT_GCC_OPTIONS.patch b/meta/recipes-devtools/gcc/gcc/0006-COLLECT_GCC_OPTIONS.patch index 9f7e603f8c..9fbbe80703 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0006-COLLECT_GCC_OPTIONS.patch +++ b/meta/recipes-devtools/gcc/gcc/0006-COLLECT_GCC_OPTIONS.patch @@ -1,7 +1,7 @@ -From b9260cd3ac26b0302824ed466a548464c864d95f Mon Sep 17 00:00:00 2001 +From a6c90d3a9c5010b4aa7cc30467cf81ca7e0f430e Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:16:28 +0400 -Subject: [PATCH 06/36] COLLECT_GCC_OPTIONS +Subject: [PATCH] COLLECT_GCC_OPTIONS This patch adds --sysroot into COLLECT_GCC_OPTIONS which is used to invoke collect2. @@ -14,10 +14,10 @@ Upstream-Status: Pending 1 file changed, 9 insertions(+) diff --git a/gcc/gcc.c b/gcc/gcc.c -index cd6c6fc95db..7da9c5d457b 100644 +index f8be58ce0a6..48b0f9dde81 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -4804,6 +4804,15 @@ set_collect_gcc_options (void) +@@ -4806,6 +4806,15 @@ set_collect_gcc_options (void) sizeof ("COLLECT_GCC_OPTIONS=") - 1); first_time = TRUE; @@ -33,6 +33,3 @@ index cd6c6fc95db..7da9c5d457b 100644 for (i = 0; (int) i < n_switches; i++) { const char *const *args; --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch b/meta/recipes-devtools/gcc/gcc/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch index 28f8fc2674..a764bdd0f4 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch +++ b/meta/recipes-devtools/gcc/gcc/0007-Use-the-defaults.h-in-B-instead-of-S-and-t-oe-in-B.patch @@ -1,8 +1,7 @@ -From 88e728dad53d48c4a19f15e19f66fd23f4820b4a Mon Sep 17 00:00:00 2001 +From 5670d4489f119d2da661734895ac0be99b606d1b Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:17:25 +0400 -Subject: [PATCH 07/36] Use the defaults.h in ${B} instead of ${S}, and t-oe in - ${B} +Subject: [PATCH] Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B} Use the defaults.h in ${B} instead of ${S}, and t-oe in ${B}, so that the source can be shared between gcc-cross-initial, @@ -27,7 +26,7 @@ Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com> 4 files changed, 7 insertions(+), 7 deletions(-) diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 5f43d9de00e..41f0f592ff4 100644 +index 543b477ff18..a67d2cc18d6 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -540,7 +540,7 @@ TARGET_SYSTEM_ROOT = @TARGET_SYSTEM_ROOT@ @@ -40,10 +39,10 @@ index 5f43d9de00e..41f0f592ff4 100644 TM_MULTILIB_CONFIG=@TM_MULTILIB_CONFIG@ TM_MULTILIB_EXCEPTIONS_CONFIG=@TM_MULTILIB_EXCEPTIONS_CONFIG@ diff --git a/gcc/configure b/gcc/configure -index a6ea3a8a84c..e3bcf8abe9a 100755 +index 8de766a942c..b26e8fc7fee 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -12341,8 +12341,8 @@ for f in $tm_file; do +@@ -12705,8 +12705,8 @@ for f in $tm_file; do tm_include_list="${tm_include_list} $f" ;; defaults.h ) @@ -55,10 +54,10 @@ index a6ea3a8a84c..e3bcf8abe9a 100755 * ) tm_file_list="${tm_file_list} \$(srcdir)/config/$f" diff --git a/gcc/configure.ac b/gcc/configure.ac -index d42bbd4fd1c..2ebc377a74d 100644 +index 8bfd6feb780..26fa46802c7 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -1968,8 +1968,8 @@ for f in $tm_file; do +@@ -2138,8 +2138,8 @@ for f in $tm_file; do tm_include_list="${tm_include_list} $f" ;; defaults.h ) @@ -70,7 +69,7 @@ index d42bbd4fd1c..2ebc377a74d 100644 * ) tm_file_list="${tm_file_list} \$(srcdir)/config/$f" diff --git a/gcc/mkconfig.sh b/gcc/mkconfig.sh -index 308b87d0cc1..19068cbc24a 100644 +index d2c677a4a42..d03852481cb 100644 --- a/gcc/mkconfig.sh +++ b/gcc/mkconfig.sh @@ -77,7 +77,7 @@ if [ -n "$HEADERS" ]; then @@ -91,6 +90,3 @@ index 308b87d0cc1..19068cbc24a 100644 fi # Add multiple inclusion protection guard, part two. --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0008-fortran-cross-compile-hack.patch b/meta/recipes-devtools/gcc/gcc/0008-fortran-cross-compile-hack.patch index 24e3abe0bb..714db3bef5 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0008-fortran-cross-compile-hack.patch +++ b/meta/recipes-devtools/gcc/gcc/0008-fortran-cross-compile-hack.patch @@ -1,7 +1,7 @@ -From 010f09f2963ede24e85134e5fab2fa627a9afa05 Mon Sep 17 00:00:00 2001 +From f05062625e7a4751be723595a2f7a4b7fbeff311 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:20:01 +0400 -Subject: [PATCH 08/36] fortran cross-compile hack. +Subject: [PATCH] fortran cross-compile hack. * Fortran would have searched for arm-angstrom-gnueabi-gfortran but would have used used gfortan. For gcc_4.2.2.bb we want to use the gfortran compiler from our cross @@ -16,10 +16,10 @@ Upstream-Status: Inappropriate [embedded specific] 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/libgfortran/configure b/libgfortran/configure -index 60867b93d0e..3fc9fca5b7b 100755 +index b4cf854ddb3..e8e0ac3b1cf 100755 --- a/libgfortran/configure +++ b/libgfortran/configure -@@ -13071,7 +13071,7 @@ esac +@@ -13090,7 +13090,7 @@ esac # We need gfortran to compile parts of the library #AC_PROG_FC(gfortran) @@ -29,10 +29,10 @@ index 60867b93d0e..3fc9fca5b7b 100755 ac_compile='$FC -c $FCFLAGS $ac_fcflags_srcext conftest.$ac_ext >&5' ac_link='$FC -o conftest$ac_exeext $FCFLAGS $LDFLAGS $ac_fcflags_srcext conftest.$ac_ext $LIBS >&5' diff --git a/libgfortran/configure.ac b/libgfortran/configure.ac -index 7cfce28ab69..6cd515ee1a4 100644 +index 711dc60ff78..3c9bbfbf47d 100644 --- a/libgfortran/configure.ac +++ b/libgfortran/configure.ac -@@ -250,7 +250,7 @@ AC_SUBST(enable_static) +@@ -258,7 +258,7 @@ AC_SUBST(enable_static) # We need gfortran to compile parts of the library #AC_PROG_FC(gfortran) @@ -41,6 +41,3 @@ index 7cfce28ab69..6cd515ee1a4 100644 AC_PROG_FC(gfortran) # extra LD Flags which are required for targets --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0009-cpp-honor-sysroot.patch b/meta/recipes-devtools/gcc/gcc/0009-cpp-honor-sysroot.patch index 6af0a0124a..8ad6853d81 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0009-cpp-honor-sysroot.patch +++ b/meta/recipes-devtools/gcc/gcc/0009-cpp-honor-sysroot.patch @@ -1,7 +1,7 @@ -From 45e9cd39d9c62454d46b9e9473a0c1034ceca15d Mon Sep 17 00:00:00 2001 +From 1d76de7f1f5c99f1fa1a4b14aedad3d702e4e136 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:22:00 +0400 -Subject: [PATCH 09/36] cpp: honor sysroot. +Subject: [PATCH] cpp: honor sysroot. Currently, if the gcc toolchain is relocated and installed from sstate, then you try and compile preprocessed source (.i or .ii files), the compiler will try and access the builtin sysroot location @@ -26,7 +26,7 @@ Upstream-Status: Pending 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/gcc/cp/lang-specs.h b/gcc/cp/lang-specs.h -index c6e42eda283..e1ddf066467 100644 +index 0ad4a33b93e..16c744f4f90 100644 --- a/gcc/cp/lang-specs.h +++ b/gcc/cp/lang-specs.h @@ -66,5 +66,5 @@ along with GCC; see the file COPYING3. If not see @@ -37,10 +37,10 @@ index c6e42eda283..e1ddf066467 100644 + " cc1plus -fpreprocessed %i %I %(cc1_options) %2" " %{!fsyntax-only:%(invoke_as)}}}}", 0, 0, 0}, diff --git a/gcc/gcc.c b/gcc/gcc.c -index 7da9c5d457b..4e7c45b268c 100644 +index 48b0f9dde81..c87f603955f 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -1349,7 +1349,7 @@ static const struct compiler default_compilers[] = +@@ -1348,7 +1348,7 @@ static const struct compiler default_compilers[] = %W{o*:--output-pch=%*}}%V}}}}}}}", 0, 0, 0}, {".i", "@cpp-output", 0, 0, 0}, {"@cpp-output", @@ -49,6 +49,3 @@ index 7da9c5d457b..4e7c45b268c 100644 {".s", "@assembler", 0, 0, 0}, {"@assembler", "%{!M:%{!MM:%{!E:%{!S:as %(asm_debug) %(asm_options) %i %A }}}}", 0, 0, 0}, --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0010-MIPS64-Default-to-N64-ABI.patch b/meta/recipes-devtools/gcc/gcc/0010-MIPS64-Default-to-N64-ABI.patch index bc0c6d5bed..625e2d8709 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0010-MIPS64-Default-to-N64-ABI.patch +++ b/meta/recipes-devtools/gcc/gcc/0010-MIPS64-Default-to-N64-ABI.patch @@ -1,7 +1,7 @@ -From 1ff4108d707b34e399e9dc418ad1ecc42f72676d Mon Sep 17 00:00:00 2001 +From 4fad4433c96bc9d0d9d124f9674fb3389f6f426e Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:23:08 +0400 -Subject: [PATCH 10/36] MIPS64: Default to N64 ABI +Subject: [PATCH] MIPS64: Default to N64 ABI MIPS64 defaults to n32 ABI, this patch makes it so that it defaults to N64 ABI @@ -14,10 +14,10 @@ Upstream-Status: Inappropriate [OE config specific] 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/gcc/config.gcc b/gcc/config.gcc -index ddd3b8f4d9d..fdfc0bd3e82 100644 +index cf1a87e2efd..37c4221a39f 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc -@@ -2282,29 +2282,29 @@ mips*-*-linux*) # Linux MIPS, either endian. +@@ -2511,29 +2511,29 @@ mips*-*-linux*) # Linux MIPS, either endian. default_mips_arch=mips32 ;; mips64el-st-linux-gnu) @@ -52,6 +52,3 @@ index ddd3b8f4d9d..fdfc0bd3e82 100644 enable_mips_multilibs="yes" ;; esac --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch b/meta/recipes-devtools/gcc/gcc/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch index 66fb24d4cd..e357976330 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch +++ b/meta/recipes-devtools/gcc/gcc/0011-Define-GLIBC_DYNAMIC_LINKER-and-UCLIBC_DYNAMIC_LINKE.patch @@ -1,4 +1,4 @@ -From 72fc3975bcd720b2f8040fa87cd23d3db4c5975a Mon Sep 17 00:00:00 2001 +From 8fc016a53c22c19feccbfa13ebdf19090dc67058 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:24:50 +0400 Subject: [PATCH] Define GLIBC_DYNAMIC_LINKER and UCLIBC_DYNAMIC_LINKER @@ -31,7 +31,7 @@ Upstream-Status: Inappropriate [OE configuration] 12 files changed, 29 insertions(+), 34 deletions(-) diff --git a/gcc/config/alpha/linux-elf.h b/gcc/config/alpha/linux-elf.h -index 824861befec..6afacce3292 100644 +index e25fcac3c59..01aca0c6542 100644 --- a/gcc/config/alpha/linux-elf.h +++ b/gcc/config/alpha/linux-elf.h @@ -23,8 +23,8 @@ along with GCC; see the file COPYING3. If not see @@ -46,7 +46,7 @@ index 824861befec..6afacce3292 100644 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}" #elif DEFAULT_LIBC == LIBC_GLIBC diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index 66ec0ea3980..e4ade2e2ab0 100644 +index 5bdcfa0c5d3..0c0332f317f 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h @@ -65,8 +65,8 @@ @@ -61,7 +61,7 @@ index 66ec0ea3980..e4ade2e2ab0 100644 #define GLIBC_DYNAMIC_LINKER \ diff --git a/gcc/config/arm/linux-elf.h b/gcc/config/arm/linux-elf.h -index 9a360defd21..98f6e960b64 100644 +index 0ec3aa53189..abfa9566d74 100644 --- a/gcc/config/arm/linux-elf.h +++ b/gcc/config/arm/linux-elf.h @@ -60,7 +60,7 @@ @@ -74,7 +74,7 @@ index 9a360defd21..98f6e960b64 100644 #define LINUX_TARGET_LINK_SPEC "%{h*} \ %{static:-Bstatic} \ diff --git a/gcc/config/i386/linux.h b/gcc/config/i386/linux.h -index 9a6e2d99896..31efbb73016 100644 +index 9f823f125ed..e0390b7d5e3 100644 --- a/gcc/config/i386/linux.h +++ b/gcc/config/i386/linux.h @@ -20,7 +20,7 @@ along with GCC; see the file COPYING3. If not see @@ -87,7 +87,7 @@ index 9a6e2d99896..31efbb73016 100644 #undef MUSL_DYNAMIC_LINKER #define MUSL_DYNAMIC_LINKER "/lib/ld-musl-i386.so.1" diff --git a/gcc/config/i386/linux64.h b/gcc/config/i386/linux64.h -index c08221c4210..dbb474d792b 100644 +index 6cb68d1ccfa..7de09ec857c 100644 --- a/gcc/config/i386/linux64.h +++ b/gcc/config/i386/linux64.h @@ -27,9 +27,9 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see @@ -104,7 +104,7 @@ index c08221c4210..dbb474d792b 100644 #undef MUSL_DYNAMIC_LINKER32 #define MUSL_DYNAMIC_LINKER32 "/lib/ld-musl-i386.so.1" diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index c3c4a219e67..4b05d8e93d1 100644 +index 95654bcdb5a..0c1a8118a26 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h @@ -94,10 +94,10 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see @@ -123,7 +123,7 @@ index c3c4a219e67..4b05d8e93d1 100644 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker" #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64" diff --git a/gcc/config/mips/linux.h b/gcc/config/mips/linux.h -index 6f79ac9c01a..25de96f9561 100644 +index 54446e58e5f..4786ee304c1 100644 --- a/gcc/config/mips/linux.h +++ b/gcc/config/mips/linux.h @@ -22,20 +22,20 @@ along with GCC; see the file COPYING3. If not see @@ -154,7 +154,7 @@ index 6f79ac9c01a..25de96f9561 100644 #undef MUSL_DYNAMIC_LINKER32 #define MUSL_DYNAMIC_LINKER32 \ diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index 58dd18b89f3..112ba9cd764 100644 +index 4afef7c228c..01997330741 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h @@ -22,7 +22,7 @@ along with GCC; see the file COPYING3. If not see @@ -167,10 +167,10 @@ index 58dd18b89f3..112ba9cd764 100644 #define MUSL_ABI_SUFFIX \ "%{mabi=ilp32:-sf}" \ diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index 9946d3fed94..45a9a7cae59 100644 +index 34776c8421e..967c1c43c63 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h -@@ -423,24 +423,19 @@ extern int dot_symbols; +@@ -419,24 +419,19 @@ extern int dot_symbols; #undef LINK_OS_DEFAULT_SPEC #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)" @@ -201,7 +201,7 @@ index 9946d3fed94..45a9a7cae59 100644 #undef DEFAULT_ASM_ENDIAN #if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN) diff --git a/gcc/config/sh/linux.h b/gcc/config/sh/linux.h -index c9897b7aca5..82f275319cc 100644 +index c1d0441d488..81373eb8336 100644 --- a/gcc/config/sh/linux.h +++ b/gcc/config/sh/linux.h @@ -64,7 +64,7 @@ along with GCC; see the file COPYING3. If not see @@ -214,7 +214,7 @@ index c9897b7aca5..82f275319cc 100644 #undef SUBTARGET_LINK_EMUL_SUFFIX #define SUBTARGET_LINK_EMUL_SUFFIX "%{mfdpic:_fd;:_linux}" diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h -index 08476f1d94d..80440e712ad 100644 +index 81201e67a2f..8b6fc577594 100644 --- a/gcc/config/sparc/linux.h +++ b/gcc/config/sparc/linux.h @@ -84,7 +84,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv); @@ -227,7 +227,7 @@ index 08476f1d94d..80440e712ad 100644 #undef LINK_SPEC #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \ diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h -index 789d1df4bd5..b920c680fb1 100644 +index a1a0efd8f28..85d1084afc2 100644 --- a/gcc/config/sparc/linux64.h +++ b/gcc/config/sparc/linux64.h @@ -84,8 +84,8 @@ along with GCC; see the file COPYING3. If not see diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0012-gcc-Fix-argument-list-too-long-error.patch b/meta/recipes-devtools/gcc/gcc/0012-gcc-Fix-argument-list-too-long-error.patch index 60539795c5..88e1715b5c 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0012-gcc-Fix-argument-list-too-long-error.patch +++ b/meta/recipes-devtools/gcc/gcc/0012-gcc-Fix-argument-list-too-long-error.patch @@ -1,7 +1,7 @@ -From 2cb227cd8069c73242286f64183fb203f8d2618a Mon Sep 17 00:00:00 2001 +From a22d1264049d29b90663cf5667049ae6f9b7a5ce Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:26:37 +0400 -Subject: [PATCH 12/36] gcc: Fix argument list too long error. +Subject: [PATCH] gcc: Fix argument list too long error. There would be an "Argument list too long" error when the build directory is longer than 200, this is caused by: @@ -17,24 +17,25 @@ $(sort list) doesn't need this. Signed-off-by: Robert Yang <liezhi.yang@windriver.com> Signed-off-by: Khem Raj <raj.khem@gmail.com> +RP: gcc then added *.h and *.def additions to this list, breaking the original +fix. Add the sort to the original gcc code, leaving the tr+sort to fix the original +issue but include the new files too as reported by Zhuang <qiuguang.zqg@alibaba-inc.com> + Upstream-Status: Pending --- gcc/Makefile.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 41f0f592ff4..0064a282488 100644 +index a67d2cc18d6..480c9366418 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in -@@ -3537,7 +3537,7 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype +@@ -3606,7 +3606,7 @@ install-plugin: installdirs lang.install-plugin s-header-vars install-gengtype # We keep the directory structure for files in config or c-family and .def # files. All other files are flattened to a single directory. $(mkinstalldirs) $(DESTDIR)$(plugin_includedir) - headers=`echo $(PLUGIN_HEADERS) $$(cd $(srcdir); echo *.h *.def) | tr ' ' '\012' | sort -u`; \ -+ headers="$(sort $(PLUGIN_HEADERS) $$(cd $(srcdir); echo *.h *.def))"; \ ++ headers=`echo $(sort $(PLUGIN_HEADERS)) $$(cd $(srcdir); echo *.h *.def) | tr ' ' '\012' | sort -u`; \ srcdirstrip=`echo "$(srcdir)" | sed 's/[].[^$$\\*|]/\\\\&/g'`; \ for file in $$headers; do \ if [ -f $$file ] ; then \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0013-Disable-sdt.patch b/meta/recipes-devtools/gcc/gcc/0013-Disable-sdt.patch index a21a63c617..207cdb57af 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0013-Disable-sdt.patch +++ b/meta/recipes-devtools/gcc/gcc/0013-Disable-sdt.patch @@ -1,7 +1,7 @@ -From aea5ffa9d704f4eb8fa93366884d3c26a1dbec49 Mon Sep 17 00:00:00 2001 +From fa47586935a18ecfc2ad5586802e326e21741b7b Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:28:10 +0400 -Subject: [PATCH 13/36] Disable sdt. +Subject: [PATCH] Disable sdt. We don't list dtrace in DEPENDS so we shouldn't be depending on this header. It may or may not exist from preivous builds though. To be determinstic, disable @@ -25,10 +25,10 @@ Upstream-Status: Inappropriate [hack] 4 files changed, 19 insertions(+), 19 deletions(-) diff --git a/gcc/configure b/gcc/configure -index e3bcf8abe9a..1f1d22ca666 100755 +index b26e8fc7fee..6080f86145e 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -29332,12 +29332,12 @@ fi +@@ -29789,12 +29789,12 @@ fi { $as_echo "$as_me:${as_lineno-$LINENO}: checking sys/sdt.h in the target C library" >&5 $as_echo_n "checking sys/sdt.h in the target C library... " >&6; } have_sys_sdt_h=no @@ -48,10 +48,10 @@ index e3bcf8abe9a..1f1d22ca666 100755 $as_echo "$have_sys_sdt_h" >&6; } diff --git a/gcc/configure.ac b/gcc/configure.ac -index 2ebc377a74d..ddc85197588 100644 +index 26fa46802c7..42be5252778 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -5995,15 +5995,15 @@ fi +@@ -6190,15 +6190,15 @@ fi AC_SUBST([enable_default_ssp]) # Test for <sys/sdt.h> on the target. @@ -77,10 +77,10 @@ index 2ebc377a74d..ddc85197588 100644 # Check if TFmode long double should be used by default or not. # Some glibc targets used DFmode long double, but with glibc 2.4 diff --git a/libstdc++-v3/configure b/libstdc++-v3/configure -index 5acf79cba54..191bc6c5796 100755 +index 9f9c5a2419a..71ed13b815b 100755 --- a/libstdc++-v3/configure +++ b/libstdc++-v3/configure -@@ -22085,11 +22085,11 @@ ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +@@ -22615,11 +22615,11 @@ ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' ac_compiler_gnu=$ac_cv_c_compiler_gnu @@ -96,10 +96,10 @@ index 5acf79cba54..191bc6c5796 100755 $as_echo "$glibcxx_cv_sys_sdt_h" >&6; } diff --git a/libstdc++-v3/configure.ac b/libstdc++-v3/configure.ac -index dadd8827b49..6b1ce9957d3 100644 +index 699e55fd829..5c7a7bda439 100644 --- a/libstdc++-v3/configure.ac +++ b/libstdc++-v3/configure.ac -@@ -230,7 +230,7 @@ GLIBCXX_CHECK_SC_NPROCESSORS_ONLN +@@ -241,7 +241,7 @@ GLIBCXX_CHECK_SC_NPROCESSORS_ONLN GLIBCXX_CHECK_SC_NPROC_ONLN GLIBCXX_CHECK_PTHREADS_NUM_PROCESSORS_NP GLIBCXX_CHECK_SYSCTL_HW_NCPU @@ -108,6 +108,3 @@ index dadd8827b49..6b1ce9957d3 100644 # Check for available headers. AC_CHECK_HEADERS([endian.h execinfo.h float.h fp.h ieeefp.h inttypes.h \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0014-libtool.patch b/meta/recipes-devtools/gcc/gcc/0014-libtool.patch index 7a8f3afecf..f4e70c3b18 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0014-libtool.patch +++ b/meta/recipes-devtools/gcc/gcc/0014-libtool.patch @@ -1,7 +1,7 @@ -From 6c4d0c303ebc3e1c7e554d54a8bb807d77ed41fd Mon Sep 17 00:00:00 2001 +From 6ecd478881468934444ff85611fd43f7033b1e81 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:29:11 +0400 -Subject: [PATCH 14/36] libtool +Subject: [PATCH] libtool libstdc++ from gcc-runtime gets created with -rpath=/usr/lib/../lib for qemux86-64 when running on am x86_64 build host. @@ -23,7 +23,7 @@ Upstream-Status: Pending 1 file changed, 4 insertions(+) diff --git a/ltmain.sh b/ltmain.sh -index 79f9ba89af5..8e222f7c16b 100644 +index 70990740b6c..ee938056bef 100644 --- a/ltmain.sh +++ b/ltmain.sh @@ -6359,6 +6359,10 @@ func_mode_link () @@ -37,6 +37,3 @@ index 79f9ba89af5..8e222f7c16b 100644 oldlibs= if test -z "$rpath"; then --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch b/meta/recipes-devtools/gcc/gcc/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch index d06ae27028..bc2674abcc 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch +++ b/meta/recipes-devtools/gcc/gcc/0015-gcc-armv4-pass-fix-v4bx-to-linker-to-support-EABI.patch @@ -1,7 +1,7 @@ -From c5662ff1e7dea2291b9cb7a83cfff3001dd31f53 Mon Sep 17 00:00:00 2001 +From de4427fa49c07dc651ee6ceaf5c5078700ca3b08 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:30:32 +0400 -Subject: [PATCH 15/36] gcc: armv4: pass fix-v4bx to linker to support EABI. +Subject: [PATCH] gcc: armv4: pass fix-v4bx to linker to support EABI. The LINK_SPEC for linux gets overwritten by linux-eabi.h which means the value of TARGET_FIX_V4BX_SPEC gets lost and as a result @@ -19,12 +19,12 @@ Upstream-Status: Pending 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/gcc/config/arm/linux-eabi.h b/gcc/config/arm/linux-eabi.h -index e4ade2e2ab0..108863f69d2 100644 +index 0c0332f317f..7b3769e8459 100644 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h @@ -91,10 +91,14 @@ #define MUSL_DYNAMIC_LINKER \ - "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1" + "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}%{mfdpic:-fdpic}.so.1" +/* For armv4 we pass --fix-v4bx to linker to support EABI */ +#undef TARGET_FIX_V4BX_SPEC @@ -38,6 +38,3 @@ index e4ade2e2ab0..108863f69d2 100644 LINUX_OR_ANDROID_LD (LINUX_TARGET_LINK_SPEC, \ LINUX_TARGET_LINK_SPEC " " ANDROID_LINK_SPEC) --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch b/meta/recipes-devtools/gcc/gcc/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch index 310caec4a1..1dc4bb859a 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch +++ b/meta/recipes-devtools/gcc/gcc/0016-Use-the-multilib-config-files-from-B-instead-of-usin.patch @@ -1,8 +1,8 @@ -From e3b693b9d6dc9496f7c98a13b28182d23084215c Mon Sep 17 00:00:00 2001 +From 6b363c2c1c089ee900efa6013aefba1003840a37 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 29 Mar 2013 09:33:04 +0400 -Subject: [PATCH 16/36] Use the multilib config files from ${B} instead of - using the ones from ${S} +Subject: [PATCH] Use the multilib config files from ${B} instead of using the + ones from ${S} Use the multilib config files from ${B} instead of using the ones from ${S} so that the source can be shared between gcc-cross-initial, @@ -18,10 +18,10 @@ Upstream-Status: Inappropriate [configuration] 2 files changed, 36 insertions(+), 8 deletions(-) diff --git a/gcc/configure b/gcc/configure -index 1f1d22ca666..911de2cf017 100755 +index 6080f86145e..825a9652329 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -12321,10 +12321,20 @@ done +@@ -12685,10 +12685,20 @@ done tmake_file_= for f in ${tmake_file} do @@ -44,9 +44,9 @@ index 1f1d22ca666..911de2cf017 100755 + ;; + esac done - tmake_file="${tmake_file_}" + tmake_file="${tmake_file_}${omp_device_property_tmake_file}" -@@ -12335,6 +12345,10 @@ tm_file_list="options.h" +@@ -12699,6 +12709,10 @@ tm_file_list="options.h" tm_include_list="options.h insn-constants.h" for f in $tm_file; do case $f in @@ -58,10 +58,10 @@ index 1f1d22ca666..911de2cf017 100755 f=`echo $f | sed 's/^..//'` tm_file_list="${tm_file_list} $f" diff --git a/gcc/configure.ac b/gcc/configure.ac -index ddc85197588..b413ae9bf25 100644 +index 42be5252778..6099eb3251f 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -1948,10 +1948,20 @@ done +@@ -2118,10 +2118,20 @@ done tmake_file_= for f in ${tmake_file} do @@ -84,9 +84,9 @@ index ddc85197588..b413ae9bf25 100644 + ;; + esac done - tmake_file="${tmake_file_}" + tmake_file="${tmake_file_}${omp_device_property_tmake_file}" -@@ -1962,6 +1972,10 @@ tm_file_list="options.h" +@@ -2132,6 +2142,10 @@ tm_file_list="options.h" tm_include_list="options.h insn-constants.h" for f in $tm_file; do case $f in @@ -97,6 +97,3 @@ index ddc85197588..b413ae9bf25 100644 ./* ) f=`echo $f | sed 's/^..//'` tm_file_list="${tm_file_list} $f" --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch b/meta/recipes-devtools/gcc/gcc/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch index ad1d1d4eb0..05f12847e9 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch +++ b/meta/recipes-devtools/gcc/gcc/0017-Avoid-using-libdir-from-.la-which-usually-points-to-.patch @@ -1,8 +1,8 @@ -From 09d9ccc1d471020949d1285a5276f17504fd60dd Mon Sep 17 00:00:00 2001 +From 08752c2f1d21553301bee5757c453c6a36cbe03c Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 20 Feb 2015 09:39:38 +0000 -Subject: [PATCH 17/36] Avoid using libdir from .la which usually points to a - host path +Subject: [PATCH] Avoid using libdir from .la which usually points to a host + path Upstream-Status: Inappropriate [embedded specific] @@ -13,7 +13,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 3 insertions(+) diff --git a/ltmain.sh b/ltmain.sh -index 8e222f7c16b..0a93b4e5c3b 100644 +index ee938056bef..9ebc7e3d1e0 100644 --- a/ltmain.sh +++ b/ltmain.sh @@ -5628,6 +5628,9 @@ func_mode_link () @@ -26,6 +26,3 @@ index 8e222f7c16b..0a93b4e5c3b 100644 dir="$libdir" absdir="$libdir" fi --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0018-export-CPP.patch b/meta/recipes-devtools/gcc/gcc/0018-export-CPP.patch index 0f728ec542..886a1221d3 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0018-export-CPP.patch +++ b/meta/recipes-devtools/gcc/gcc/0018-export-CPP.patch @@ -1,7 +1,7 @@ -From 987338cd847a723de533bb317e452a60b1e52165 Mon Sep 17 00:00:00 2001 +From 5c3d66378c7ff60ca11a875aa4aa6f8a8529d43a Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 20 Feb 2015 09:40:59 +0000 -Subject: [PATCH 18/36] export CPP +Subject: [PATCH] export CPP The OE environment sets and exports CPP as being the target gcc. When building gcc-cross-canadian for a mingw targetted sdk, the following can be found @@ -37,7 +37,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+) diff --git a/Makefile.in b/Makefile.in -index 64e091ba71d..255822e3f27 100644 +index 36e369df6e7..c717903bb13 100644 --- a/Makefile.in +++ b/Makefile.in @@ -149,6 +149,7 @@ BUILD_EXPORTS = \ @@ -48,6 +48,3 @@ index 64e091ba71d..255822e3f27 100644 CFLAGS="$(CFLAGS_FOR_BUILD)"; export CFLAGS; \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ CXX="$(CXX_FOR_BUILD)"; export CXX; \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0019-Ensure-target-gcc-headers-can-be-included.patch b/meta/recipes-devtools/gcc/gcc/0019-Ensure-target-gcc-headers-can-be-included.patch index 53f9e99d07..2797b2c22d 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0019-Ensure-target-gcc-headers-can-be-included.patch +++ b/meta/recipes-devtools/gcc/gcc/0019-Ensure-target-gcc-headers-can-be-included.patch @@ -1,7 +1,7 @@ -From d27ba49e2e5c608c43265462d6831363cc7f565b Mon Sep 17 00:00:00 2001 +From 378b752c5d9a3dba4e58cdadf8b4b4f34ea99a76 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 20 Feb 2015 10:25:11 +0000 -Subject: [PATCH 19/36] Ensure target gcc headers can be included +Subject: [PATCH] Ensure target gcc headers can be included There are a few headers installed as part of the OpenEmbedded gcc-runtime target (omp.h, ssp/*.h). Being installed from a recipe @@ -18,10 +18,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> --- gcc/Makefile.in | 2 ++ gcc/cppdefault.c | 4 ++++ - gcc/defaults.h | 9 +++++++++ - gcc/gcc.c | 7 ------- - 4 files changed, 15 insertions(+), 7 deletions(-) + 2 files changed, 6 insertions(+) +diff --git a/gcc/Makefile.in b/gcc/Makefile.in +index 480c9366418..011c7ac2db6 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -618,6 +618,7 @@ libexecdir = @libexecdir@ @@ -32,7 +32,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> # Directory in which the compiler finds executables libexecsubdir = $(libexecdir)/gcc/$(real_target_noncanonical)/$(version)$(accel_dir_suffix) # Directory in which all plugin resources are installed -@@ -2866,6 +2867,7 @@ CFLAGS-intl.o += -DLOCALEDIR=\"$(localed +@@ -2946,6 +2947,7 @@ CFLAGS-intl.o += -DLOCALEDIR=\"$(localedir)\" PREPROCESSOR_DEFINES = \ -DGCC_INCLUDE_DIR=\"$(libsubdir)/include\" \ @@ -40,9 +40,11 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> -DFIXED_INCLUDE_DIR=\"$(libsubdir)/include-fixed\" \ -DGPLUSPLUS_INCLUDE_DIR=\"$(gcc_gxx_include_dir)\" \ -DGPLUSPLUS_INCLUDE_DIR_ADD_SYSROOT=$(gcc_gxx_include_dir_add_sysroot) \ +diff --git a/gcc/cppdefault.c b/gcc/cppdefault.c +index af38cc494ea..2f43b88a0c3 100644 --- a/gcc/cppdefault.c +++ b/gcc/cppdefault.c -@@ -59,6 +59,10 @@ const struct default_include cpp_include +@@ -59,6 +59,10 @@ const struct default_include cpp_include_defaults[] /* This is the dir for gcc's private headers. */ { GCC_INCLUDE_DIR, "GCC", 0, 0, 0, 0 }, #endif diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0021-Don-t-search-host-directory-during-relink-if-inst_pr.patch b/meta/recipes-devtools/gcc/gcc/0020-Don-t-search-host-directory-during-relink-if-inst_pr.patch index f36ca29b9e..c3baf8b451 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0021-Don-t-search-host-directory-during-relink-if-inst_pr.patch +++ b/meta/recipes-devtools/gcc/gcc/0020-Don-t-search-host-directory-during-relink-if-inst_pr.patch @@ -1,8 +1,8 @@ -From 667cc8d43e8fb4ac09654ee408da482f96b09580 Mon Sep 17 00:00:00 2001 +From 870e805d705d99d9b9d7dbd09727f9c1d2ad9c1d Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 3 Mar 2015 08:21:19 +0000 -Subject: [PATCH 21/36] Don't search host directory during "relink" if - $inst_prefix is provided +Subject: [PATCH] Don't search host directory during "relink" if $inst_prefix + is provided http://lists.gnu.org/archive/html/libtool-patches/2011-01/msg00026.html @@ -14,7 +14,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/ltmain.sh b/ltmain.sh -index 0a93b4e5c3b..6de6ed2f9a0 100644 +index 9ebc7e3d1e0..7ea79fa8be6 100644 --- a/ltmain.sh +++ b/ltmain.sh @@ -6004,12 +6004,13 @@ func_mode_link () @@ -33,6 +33,3 @@ index 0a93b4e5c3b..6de6ed2f9a0 100644 ;; esac fi --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0022-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch b/meta/recipes-devtools/gcc/gcc/0021-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch index d5b9150023..abee48669d 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0022-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch +++ b/meta/recipes-devtools/gcc/gcc/0021-Use-SYSTEMLIBS_DIR-replacement-instead-of-hardcoding.patch @@ -1,7 +1,7 @@ -From 279c4de48e3fd61e2f268787ed3f1d69ed9224f8 Mon Sep 17 00:00:00 2001 +From aba42de763a619355471efd1573561b0cbf51162 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 28 Apr 2015 23:15:27 -0700 -Subject: [PATCH 22/36] Use SYSTEMLIBS_DIR replacement instead of hardcoding +Subject: [PATCH] Use SYSTEMLIBS_DIR replacement instead of hardcoding base_libdir Upstream-Status: Pending @@ -12,7 +12,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h -index 5e8b34ded03..7e628bf661e 100644 +index e587e2e9ad6..ddc62895693 100644 --- a/gcc/config/aarch64/aarch64-linux.h +++ b/gcc/config/aarch64/aarch64-linux.h @@ -21,7 +21,7 @@ @@ -24,6 +24,3 @@ index 5e8b34ded03..7e628bf661e 100644 #undef MUSL_DYNAMIC_LINKER #define MUSL_DYNAMIC_LINKER "/lib/ld-musl-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1" --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0023-aarch64-Add-support-for-musl-ldso.patch b/meta/recipes-devtools/gcc/gcc/0022-aarch64-Add-support-for-musl-ldso.patch index f811306c31..c55b66d4ba 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0023-aarch64-Add-support-for-musl-ldso.patch +++ b/meta/recipes-devtools/gcc/gcc/0022-aarch64-Add-support-for-musl-ldso.patch @@ -1,7 +1,7 @@ -From 1277d12058334087443828dfd57d44e3b1dfcc9a Mon Sep 17 00:00:00 2001 +From d63820a78d92f302410358293546f01c7ad17bd8 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 28 Apr 2015 23:18:39 -0700 -Subject: [PATCH 23/36] aarch64: Add support for musl ldso +Subject: [PATCH] aarch64: Add support for musl ldso Upstream-Status: Pending @@ -11,7 +11,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/aarch64/aarch64-linux.h b/gcc/config/aarch64/aarch64-linux.h -index 7e628bf661e..1717cbe5471 100644 +index ddc62895693..b301825313a 100644 --- a/gcc/config/aarch64/aarch64-linux.h +++ b/gcc/config/aarch64/aarch64-linux.h @@ -24,7 +24,7 @@ @@ -23,6 +23,3 @@ index 7e628bf661e..1717cbe5471 100644 #undef ASAN_CC1_SPEC #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}" --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0024-libcc1-fix-libcc1-s-install-path-and-rpath.patch b/meta/recipes-devtools/gcc/gcc/0023-libcc1-fix-libcc1-s-install-path-and-rpath.patch index 298b0962f6..80c4d2292c 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0024-libcc1-fix-libcc1-s-install-path-and-rpath.patch +++ b/meta/recipes-devtools/gcc/gcc/0023-libcc1-fix-libcc1-s-install-path-and-rpath.patch @@ -1,7 +1,7 @@ -From 4a0487ad75accd780dd155aa59086cc4b11cfc47 Mon Sep 17 00:00:00 2001 +From 3474e16ad4ea8cf4e0e330568e3bc9039e723dce Mon Sep 17 00:00:00 2001 From: Robert Yang <liezhi.yang@windriver.com> Date: Sun, 5 Jul 2015 20:25:18 -0700 -Subject: [PATCH 24/36] libcc1: fix libcc1's install path and rpath +Subject: [PATCH] libcc1: fix libcc1's install path and rpath * Install libcc1.so and libcc1plugin.so into $(libexecdir)/gcc/$(target_noncanonical)/$(gcc_version), as what we @@ -20,7 +20,7 @@ Signed-off-by: Robert Yang <liezhi.yang@windriver.com> 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/libcc1/Makefile.am b/libcc1/Makefile.am -index 72c6aead475..42a87740b31 100644 +index c005b0dad4a..ec31d35b7b9 100644 --- a/libcc1/Makefile.am +++ b/libcc1/Makefile.am @@ -37,8 +37,8 @@ libiberty = $(if $(wildcard $(libiberty_noasan)),$(Wc)$(libiberty_noasan), \ @@ -49,6 +49,3 @@ index 7104b649026..2103c477468 100644 @ENABLE_PLUGIN_TRUE@plugin_LTLIBRARIES = libcc1plugin.la libcp1plugin.la @ENABLE_PLUGIN_TRUE@cc1lib_LTLIBRARIES = libcc1.la shared_source = callbacks.cc callbacks.hh connection.cc connection.hh \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0025-handle-sysroot-support-for-nativesdk-gcc.patch b/meta/recipes-devtools/gcc/gcc/0024-handle-sysroot-support-for-nativesdk-gcc.patch index 2e7a444b58..1a65ece7bf 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0025-handle-sysroot-support-for-nativesdk-gcc.patch +++ b/meta/recipes-devtools/gcc/gcc/0024-handle-sysroot-support-for-nativesdk-gcc.patch @@ -1,7 +1,7 @@ -From a183c82ea2af934a8d30055a791dc1d80c9067a9 Mon Sep 17 00:00:00 2001 +From bb1f359e34649516e61305e9748534cce7e0ee70 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 7 Dec 2015 23:39:54 +0000 -Subject: [PATCH 25/36] handle sysroot support for nativesdk-gcc +Subject: [PATCH] handle sysroot support for nativesdk-gcc Being able to build a nativesdk gcc is useful, particularly in cases where the host compiler may be of an incompatible version (or a 32 @@ -32,18 +32,33 @@ implementation.) Signed-off-by: Mark Hatle <mark.hatle@kernel.crashing.org> --- - c-family/c-opts.c | 4 +-- - cppdefault.c | 63 +++++++++++++++++++++++++++++++++--------------------- - cppdefault.h | 13 ++++------- - gcc.c | 20 ++++++++++++----- - incpath.c | 12 +++++----- - prefix.c | 4 +-- - 6 files changed, 68 insertions(+), 48 deletions(-) + gcc/c-family/c-opts.c | 4 +-- + gcc/cppdefault.c | 63 ++++++++++++++++++++++++++----------------- + gcc/cppdefault.h | 13 ++++----- + gcc/gcc.c | 20 +++++++++----- + gcc/incpath.c | 12 ++++----- + gcc/prefix.c | 6 +++-- + 6 files changed, 70 insertions(+), 48 deletions(-) -Index: gcc-9.2.0/gcc/cppdefault.c -=================================================================== ---- gcc-9.2.0.orig/gcc/cppdefault.c -+++ gcc-9.2.0/gcc/cppdefault.c +diff --git a/gcc/c-family/c-opts.c b/gcc/c-family/c-opts.c +index 58ba0948e79..806bbcfb7a5 100644 +--- a/gcc/c-family/c-opts.c ++++ b/gcc/c-family/c-opts.c +@@ -1409,8 +1409,8 @@ add_prefixed_path (const char *suffix, incpath_kind chain) + size_t prefix_len, suffix_len; + + suffix_len = strlen (suffix); +- prefix = iprefix ? iprefix : cpp_GCC_INCLUDE_DIR; +- prefix_len = iprefix ? strlen (iprefix) : cpp_GCC_INCLUDE_DIR_len; ++ prefix = iprefix ? iprefix : GCC_INCLUDE_DIRVAR; ++ prefix_len = iprefix ? strlen (iprefix) : strlen(GCC_INCLUDE_DIRVAR) - 7; + + path = (char *) xmalloc (prefix_len + suffix_len + 1); + memcpy (path, prefix, prefix_len); +diff --git a/gcc/cppdefault.c b/gcc/cppdefault.c +index 2f43b88a0c3..6b6be04686c 100644 +--- a/gcc/cppdefault.c ++++ b/gcc/cppdefault.c @@ -35,6 +35,30 @@ # undef CROSS_INCLUDE_DIR #endif @@ -75,7 +90,7 @@ Index: gcc-9.2.0/gcc/cppdefault.c const struct default_include cpp_include_defaults[] #ifdef INCLUDE_DEFAULTS = INCLUDE_DEFAULTS; -@@ -42,38 +66,38 @@ const struct default_include cpp_include +@@ -42,38 +66,38 @@ const struct default_include cpp_include_defaults[] = { #ifdef GPLUSPLUS_INCLUDE_DIR /* Pick up GNU C++ generic include files. */ @@ -123,7 +138,7 @@ Index: gcc-9.2.0/gcc/cppdefault.c /* A multilib suffix needs adding if different multilibs use different headers. */ #ifdef SYSROOT_HEADERS_SUFFIX_SPEC -@@ -85,33 +109,24 @@ const struct default_include cpp_include +@@ -85,33 +109,24 @@ const struct default_include cpp_include_defaults[] #endif #ifdef CROSS_INCLUDE_DIR /* One place the target system's headers might be. */ @@ -163,10 +178,10 @@ Index: gcc-9.2.0/gcc/cppdefault.c /* This value is set by cpp_relocated at runtime */ const char *gcc_exec_prefix; -Index: gcc-9.2.0/gcc/cppdefault.h -=================================================================== ---- gcc-9.2.0.orig/gcc/cppdefault.h -+++ gcc-9.2.0/gcc/cppdefault.h +diff --git a/gcc/cppdefault.h b/gcc/cppdefault.h +index a681264f75e..5e10a2fa140 100644 +--- a/gcc/cppdefault.h ++++ b/gcc/cppdefault.h @@ -33,7 +33,8 @@ struct default_include @@ -198,11 +213,11 @@ Index: gcc-9.2.0/gcc/cppdefault.h /* The run-time execution prefix. This is typically the lib/gcc subdirectory of the actual installation. */ extern const char *gcc_exec_prefix; -Index: gcc-9.2.0/gcc/gcc.c -=================================================================== ---- gcc-9.2.0.orig/gcc/gcc.c -+++ gcc-9.2.0/gcc/gcc.c -@@ -253,6 +253,8 @@ FILE *report_times_to_file = NULL; +diff --git a/gcc/gcc.c b/gcc/gcc.c +index c87f603955f..535d5c3bb65 100644 +--- a/gcc/gcc.c ++++ b/gcc/gcc.c +@@ -252,6 +252,8 @@ FILE *report_times_to_file = NULL; #endif static const char *target_system_root = DEFAULT_TARGET_SYSTEM_ROOT; @@ -211,7 +226,7 @@ Index: gcc-9.2.0/gcc/gcc.c /* Nonzero means pass the updated target_system_root to the compiler. */ static int target_system_root_changed; -@@ -527,6 +529,7 @@ or with constant text in a single argume +@@ -526,6 +528,7 @@ or with constant text in a single argument. %G process LIBGCC_SPEC as a spec. %R Output the concatenation of target_system_root and target_sysroot_suffix. @@ -219,7 +234,7 @@ Index: gcc-9.2.0/gcc/gcc.c %S process STARTFILE_SPEC as a spec. A capital S is actually used here. %E process ENDFILE_SPEC as a spec. A capital E is actually used here. %C process CPP_SPEC as a spec. -@@ -1500,10 +1503,10 @@ static const char *gcc_libexec_prefix; +@@ -1499,10 +1502,10 @@ static const char *gcc_libexec_prefix; gcc_exec_prefix is set because, in that case, we know where the compiler has been installed, and use paths relative to that location instead. */ @@ -234,7 +249,7 @@ Index: gcc-9.2.0/gcc/gcc.c /* For native compilers, these are well-known paths containing components that may be provided by the system. For cross -@@ -1511,9 +1514,9 @@ static const char *const standard_startf +@@ -1510,9 +1513,9 @@ static const char *const standard_startfile_prefix = STANDARD_STARTFILE_PREFIX; static const char *md_exec_prefix = MD_EXEC_PREFIX; static const char *md_startfile_prefix = MD_STARTFILE_PREFIX; static const char *md_startfile_prefix_1 = MD_STARTFILE_PREFIX_1; @@ -246,7 +261,7 @@ Index: gcc-9.2.0/gcc/gcc.c = STANDARD_STARTFILE_PREFIX_2; /* A relative path to be used in finding the location of tools -@@ -5922,6 +5925,11 @@ do_spec_1 (const char *spec, int inswitc +@@ -5952,6 +5955,11 @@ do_spec_1 (const char *spec, int inswitch, const char *soft_matched_part) } break; @@ -258,26 +273,11 @@ Index: gcc-9.2.0/gcc/gcc.c case 'S': value = do_spec_1 (startfile_spec, 0, NULL); if (value != 0) -Index: gcc-9.2.0/gcc/c-family/c-opts.c -=================================================================== ---- gcc-9.2.0.orig/gcc/c-family/c-opts.c -+++ gcc-9.2.0/gcc/c-family/c-opts.c -@@ -1382,8 +1382,8 @@ add_prefixed_path (const char *suffix, i - size_t prefix_len, suffix_len; - - suffix_len = strlen (suffix); -- prefix = iprefix ? iprefix : cpp_GCC_INCLUDE_DIR; -- prefix_len = iprefix ? strlen (iprefix) : cpp_GCC_INCLUDE_DIR_len; -+ prefix = iprefix ? iprefix : GCC_INCLUDE_DIRVAR; -+ prefix_len = iprefix ? strlen (iprefix) : strlen(GCC_INCLUDE_DIRVAR) - 7; - - path = (char *) xmalloc (prefix_len + suffix_len + 1); - memcpy (path, prefix, prefix_len); -Index: gcc-9.2.0/gcc/incpath.c -=================================================================== ---- gcc-9.2.0.orig/gcc/incpath.c -+++ gcc-9.2.0/gcc/incpath.c -@@ -131,7 +131,7 @@ add_standard_paths (const char *sysroot, +diff --git a/gcc/incpath.c b/gcc/incpath.c +index 9098ab044ab..bfad4ebe382 100644 +--- a/gcc/incpath.c ++++ b/gcc/incpath.c +@@ -131,7 +131,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, int relocated = cpp_relocated (); size_t len; @@ -286,7 +286,7 @@ Index: gcc-9.2.0/gcc/incpath.c { /* Look for directories that start with the standard prefix. "Translate" them, i.e. replace /usr/local/lib/gcc... with -@@ -145,7 +145,7 @@ add_standard_paths (const char *sysroot, +@@ -145,7 +145,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, now. */ if (sysroot && p->add_sysroot) continue; @@ -295,7 +295,7 @@ Index: gcc-9.2.0/gcc/incpath.c { char *str = concat (iprefix, p->fname + len, NULL); if (p->multilib == 1 && imultilib) -@@ -185,7 +185,7 @@ add_standard_paths (const char *sysroot, +@@ -185,7 +185,7 @@ add_standard_paths (const char *sysroot, const char *iprefix, free (sysroot_no_trailing_dir_separator); } else if (!p->add_sysroot && relocated @@ -304,7 +304,7 @@ Index: gcc-9.2.0/gcc/incpath.c { static const char *relocated_prefix; char *ostr; -@@ -202,12 +202,12 @@ add_standard_paths (const char *sysroot, +@@ -202,12 +202,12 @@ add_standard_paths (const char *sysroot, const char *iprefix, dummy = concat (gcc_exec_prefix, "dummy", NULL); relocated_prefix = make_relative_prefix (dummy, @@ -320,11 +320,11 @@ Index: gcc-9.2.0/gcc/incpath.c NULL); str = update_path (ostr, p->component); free (ostr); -Index: gcc-9.2.0/gcc/prefix.c -=================================================================== ---- gcc-9.2.0.orig/gcc/prefix.c -+++ gcc-9.2.0/gcc/prefix.c -@@ -72,7 +72,9 @@ License along with GCC; see the file COP +diff --git a/gcc/prefix.c b/gcc/prefix.c +index 1a403e535bd..3257ed3cd3e 100644 +--- a/gcc/prefix.c ++++ b/gcc/prefix.c +@@ -72,7 +72,9 @@ License along with GCC; see the file COPYING3. If not see #include "prefix.h" #include "common/common-target.h" diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0026-Search-target-sysroot-gcc-version-specific-dirs-with.patch b/meta/recipes-devtools/gcc/gcc/0025-Search-target-sysroot-gcc-version-specific-dirs-with.patch index fde206eb71..abf1f8491f 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0026-Search-target-sysroot-gcc-version-specific-dirs-with.patch +++ b/meta/recipes-devtools/gcc/gcc/0025-Search-target-sysroot-gcc-version-specific-dirs-with.patch @@ -1,7 +1,7 @@ -From dab4db14e319f3239a2b4c7d1fbf2971936e27ba Mon Sep 17 00:00:00 2001 +From 9c0c73ee48dbee2aad57f4dcdad1b7b74e77b944 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 7 Dec 2015 23:41:45 +0000 -Subject: [PATCH 26/36] Search target sysroot gcc version specific dirs with +Subject: [PATCH] Search target sysroot gcc version specific dirs with multilib. We install the gcc libraries (such as crtbegin.p) into @@ -51,10 +51,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/gcc/gcc.c b/gcc/gcc.c -index db0e2934038..1c21d1b08eb 100644 +index 535d5c3bb65..04647ae812d 100644 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -2610,7 +2610,7 @@ for_each_path (const struct path_prefix *paths, +@@ -2616,7 +2616,7 @@ for_each_path (const struct path_prefix *paths, if (path == NULL) { len = paths->max_len + extra_space + 1; @@ -63,7 +63,7 @@ index db0e2934038..1c21d1b08eb 100644 path = XNEWVEC (char, len); } -@@ -2622,6 +2622,33 @@ for_each_path (const struct path_prefix *paths, +@@ -2628,6 +2628,33 @@ for_each_path (const struct path_prefix *paths, /* Look first in MACHINE/VERSION subdirectory. */ if (!skip_multi_dir) { @@ -97,6 +97,3 @@ index db0e2934038..1c21d1b08eb 100644 memcpy (path + len, multi_suffix, suffix_len + 1); ret = callback (path, callback_info); if (ret) --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0027-Fix-various-_FOR_BUILD-and-related-variables.patch b/meta/recipes-devtools/gcc/gcc/0026-Fix-various-_FOR_BUILD-and-related-variables.patch index 5d89e8e7e2..97bf2f3a73 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0027-Fix-various-_FOR_BUILD-and-related-variables.patch +++ b/meta/recipes-devtools/gcc/gcc/0026-Fix-various-_FOR_BUILD-and-related-variables.patch @@ -1,7 +1,7 @@ -From 8e84bb09d2b7a60487a30e438bb109f31c2c254b Mon Sep 17 00:00:00 2001 +From 3a003af8804dda90fdf4862eca5f66cb12faaf02 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Mon, 7 Dec 2015 23:42:45 +0000 -Subject: [PATCH 27/36] Fix various _FOR_BUILD and related variables +Subject: [PATCH] Fix various _FOR_BUILD and related variables When doing a FOR_BUILD thing, you have to override CFLAGS with CFLAGS_FOR_BUILD. And if you use C++, you also have to override @@ -26,7 +26,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 5 files changed, 14 insertions(+), 3 deletions(-) diff --git a/Makefile.in b/Makefile.in -index 255822e3f27..9dc0dff0474 100644 +index c717903bb13..5abc649868d 100644 --- a/Makefile.in +++ b/Makefile.in @@ -152,6 +152,7 @@ BUILD_EXPORTS = \ @@ -55,7 +55,7 @@ index 255822e3f27..9dc0dff0474 100644 ADA_CFLAGS="$(ADA_CFLAGS)"; export ADA_CFLAGS; \ CFLAGS="$(CFLAGS)"; export CFLAGS; \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ -@@ -775,6 +780,7 @@ BASE_FLAGS_TO_PASS = \ +@@ -776,6 +781,7 @@ BASE_FLAGS_TO_PASS = \ "CC_FOR_BUILD=$(CC_FOR_BUILD)" \ "CFLAGS_FOR_BUILD=$(CFLAGS_FOR_BUILD)" \ "CXX_FOR_BUILD=$(CXX_FOR_BUILD)" \ @@ -64,7 +64,7 @@ index 255822e3f27..9dc0dff0474 100644 "FLEX=$(FLEX)" \ "INSTALL=$(INSTALL)" \ diff --git a/Makefile.tpl b/Makefile.tpl -index 41cae58a267..d3f6b79acdc 100644 +index efed1511750..778beb705b4 100644 --- a/Makefile.tpl +++ b/Makefile.tpl @@ -154,6 +154,7 @@ BUILD_EXPORTS = \ @@ -94,7 +94,7 @@ index 41cae58a267..d3f6b79acdc 100644 CFLAGS="$(CFLAGS)"; export CFLAGS; \ CONFIG_SHELL="$(SHELL)"; export CONFIG_SHELL; \ diff --git a/gcc/Makefile.in b/gcc/Makefile.in -index 21472745c2c..8c93f03ffdc 100644 +index 011c7ac2db6..2f1165f7b5e 100644 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in @@ -805,7 +805,7 @@ BUILD_LDFLAGS=@BUILD_LDFLAGS@ @@ -107,10 +107,10 @@ index 21472745c2c..8c93f03ffdc 100644 # Actual name to use when installing a native compiler. GCC_INSTALL_NAME := $(shell echo gcc|sed '$(program_transform_name)') diff --git a/gcc/configure b/gcc/configure -index 911de2cf017..325ace34cdf 100755 +index 825a9652329..ff46cf58960 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -11965,7 +11965,7 @@ else +@@ -12314,7 +12314,7 @@ else CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \ @@ -118,12 +118,12 @@ index 911de2cf017..325ace34cdf 100755 + GMPINC="" CPPFLAGS="${CPPFLAGS_FOR_BUILD} -DGENERATOR_FILE" \ ${realsrcdir}/configure \ --enable-languages=${enable_languages-all} \ - --target=$target_alias --host=$build_alias --build=$build_alias + ${enable_obsolete+--enable-obsolete="$enable_obsolete"} \ diff --git a/gcc/configure.ac b/gcc/configure.ac -index b413ae9bf25..72a6c95121b 100644 +index 6099eb3251f..b3c345b61dc 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -1743,7 +1743,7 @@ else +@@ -1898,7 +1898,7 @@ else CC="${CC_FOR_BUILD}" CFLAGS="${CFLAGS_FOR_BUILD}" \ CXX="${CXX_FOR_BUILD}" CXXFLAGS="${CXXFLAGS_FOR_BUILD}" \ LD="${LD_FOR_BUILD}" LDFLAGS="${LDFLAGS_FOR_BUILD}" \ @@ -131,7 +131,4 @@ index b413ae9bf25..72a6c95121b 100644 + GMPINC="" CPPFLAGS="${CPPFLAGS_FOR_BUILD} -DGENERATOR_FILE" \ ${realsrcdir}/configure \ --enable-languages=${enable_languages-all} \ - --target=$target_alias --host=$build_alias --build=$build_alias --- -2.22.1 - + ${enable_obsolete+--enable-obsolete="$enable_obsolete"} \ diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0028-nios2-Define-MUSL_DYNAMIC_LINKER.patch b/meta/recipes-devtools/gcc/gcc/0027-nios2-Define-MUSL_DYNAMIC_LINKER.patch index 84d92a337e..3cd75b7183 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0028-nios2-Define-MUSL_DYNAMIC_LINKER.patch +++ b/meta/recipes-devtools/gcc/gcc/0027-nios2-Define-MUSL_DYNAMIC_LINKER.patch @@ -1,7 +1,7 @@ -From 5647f773e28b528a67800ef06ca44730f9f5dc7e Mon Sep 17 00:00:00 2001 +From 4e53d0ae70af85af0e112a48a3e4dfe4c39f4a8d Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 2 Feb 2016 10:26:10 -0800 -Subject: [PATCH 28/36] nios2: Define MUSL_DYNAMIC_LINKER +Subject: [PATCH] nios2: Define MUSL_DYNAMIC_LINKER Upstream-Status: Pending @@ -12,7 +12,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+) diff --git a/gcc/config/nios2/linux.h b/gcc/config/nios2/linux.h -index 698734add35..eeee60ecfea 100644 +index 4bdcdcca1f0..e7943a9d640 100644 --- a/gcc/config/nios2/linux.h +++ b/gcc/config/nios2/linux.h @@ -30,6 +30,7 @@ @@ -23,6 +23,3 @@ index 698734add35..eeee60ecfea 100644 #undef LINK_SPEC #define LINK_SPEC LINK_SPEC_ENDIAN \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0029-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch b/meta/recipes-devtools/gcc/gcc/0028-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch index d19e5a08b9..2a6769a82e 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0029-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch +++ b/meta/recipes-devtools/gcc/gcc/0028-Add-ssp_nonshared-to-link-commandline-for-musl-targe.patch @@ -1,7 +1,7 @@ -From 474043ca7a064ca7b0a32308a0ed6f7c546f17b2 Mon Sep 17 00:00:00 2001 +From 5db0404eb770ac477fd99d444226bcf021067584 Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Tue, 27 Jun 2017 18:10:54 -0700 -Subject: [PATCH 29/36] Add ssp_nonshared to link commandline for musl targets +Subject: [PATCH] Add ssp_nonshared to link commandline for musl targets when -fstack-protector options are enabled we need to link with ssp_shared on musl since it does not provide @@ -23,7 +23,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 3 files changed, 27 insertions(+) diff --git a/gcc/config/linux.h b/gcc/config/linux.h -index 4b05d8e93d1..0ca117e2ed4 100644 +index 0c1a8118a26..bdc2a2d0659 100644 --- a/gcc/config/linux.h +++ b/gcc/config/linux.h @@ -195,6 +195,13 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see @@ -41,7 +41,7 @@ index 4b05d8e93d1..0ca117e2ed4 100644 #if (DEFAULT_LIBC == LIBC_UCLIBC) && defined (SINGLE_LIBC) /* uClinux */ diff --git a/gcc/config/rs6000/linux.h b/gcc/config/rs6000/linux.h -index ffceb32bf65..c82cb2ad05b 100644 +index b7026fcbee7..dd54d6c393e 100644 --- a/gcc/config/rs6000/linux.h +++ b/gcc/config/rs6000/linux.h @@ -94,6 +94,16 @@ @@ -62,10 +62,10 @@ index ffceb32bf65..c82cb2ad05b 100644 #define LINK_OS_LINUX_SPEC LINK_OS_LINUX_EMUL " %{!shared: %{!static: \ %{!static-pie: \ diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h -index 45a9a7cae59..d1e88a40e82 100644 +index 967c1c43c63..dc5e4d97975 100644 --- a/gcc/config/rs6000/linux64.h +++ b/gcc/config/rs6000/linux64.h -@@ -456,6 +456,16 @@ extern int dot_symbols; +@@ -452,6 +452,16 @@ extern int dot_symbols; " -m elf64ppc") #endif @@ -82,6 +82,3 @@ index 45a9a7cae59..d1e88a40e82 100644 #define LINK_OS_LINUX_SPEC32 LINK_OS_LINUX_EMUL32 " %{!shared: %{!static: \ %{!static-pie: \ %{rdynamic:-export-dynamic} \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0031-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch b/meta/recipes-devtools/gcc/gcc/0029-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch index dc2141d70c..767cba0380 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0031-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch +++ b/meta/recipes-devtools/gcc/gcc/0029-Link-libgcc-using-LDFLAGS-not-just-SHLIB_LDFLAGS.patch @@ -1,7 +1,7 @@ -From 266dcc78e4d9d38de2809118977d97dc9270cf1f Mon Sep 17 00:00:00 2001 +From fbc926dbf6a47fa623b9c94cd9b09a0e90448fdc Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Wed, 4 May 2016 21:11:34 -0700 -Subject: [PATCH 31/36] Link libgcc using LDFLAGS, not just SHLIB_LDFLAGS +Subject: [PATCH] Link libgcc using LDFLAGS, not just SHLIB_LDFLAGS Upstream-Status: Pending @@ -12,7 +12,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libgcc/config/t-slibgcc b/libgcc/config/t-slibgcc -index 099bf23e62f..436b277a79f 100644 +index c997553447c..330352c2c81 100644 --- a/libgcc/config/t-slibgcc +++ b/libgcc/config/t-slibgcc @@ -32,7 +32,7 @@ SHLIB_INSTALL_SOLINK = $(LN_S) $(SHLIB_SONAME) \ @@ -24,6 +24,3 @@ index 099bf23e62f..436b277a79f 100644 -o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ \ $(SHLIB_OBJS) $(SHLIB_LC) && \ rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0033-sync-gcc-stddef.h-with-musl.patch b/meta/recipes-devtools/gcc/gcc/0030-sync-gcc-stddef.h-with-musl.patch index b99ac429a0..4f18907a1d 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0033-sync-gcc-stddef.h-with-musl.patch +++ b/meta/recipes-devtools/gcc/gcc/0030-sync-gcc-stddef.h-with-musl.patch @@ -1,7 +1,7 @@ -From 39e2f61d262f9f6c7a91068998dea80791ef665e Mon Sep 17 00:00:00 2001 +From 24dc04dc8d69e3bf61322615b3ef18e02ccd311e Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Fri, 3 Feb 2017 12:56:00 -0800 -Subject: [PATCH 33/36] sync gcc stddef.h with musl +Subject: [PATCH] sync gcc stddef.h with musl musl defines ptrdiff_t size_t and wchar_t so dont define them here if musl is definining them @@ -14,7 +14,7 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 9 insertions(+) diff --git a/gcc/ginclude/stddef.h b/gcc/ginclude/stddef.h -index da692e1c01a..9a00c261adb 100644 +index 9d67eac4947..6cb5edbedb4 100644 --- a/gcc/ginclude/stddef.h +++ b/gcc/ginclude/stddef.h @@ -128,6 +128,7 @@ _TYPE_wchar_t; @@ -86,6 +86,3 @@ index da692e1c01a..9a00c261adb 100644 #undef __need_wchar_t #endif /* _STDDEF_H or __need_wchar_t. */ --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0034-fix-segmentation-fault-in-precompiled-header-generat.patch b/meta/recipes-devtools/gcc/gcc/0031-fix-segmentation-fault-in-precompiled-header-generat.patch index 06a3c9f884..702279af0e 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0034-fix-segmentation-fault-in-precompiled-header-generat.patch +++ b/meta/recipes-devtools/gcc/gcc/0031-fix-segmentation-fault-in-precompiled-header-generat.patch @@ -1,7 +1,7 @@ -From aaa896a57b0004a74c1d474e74b21f41147a65cb Mon Sep 17 00:00:00 2001 +From 27b8ba5555ada2dab076988529bfb84d00a4b901 Mon Sep 17 00:00:00 2001 From: Juro Bystricky <juro.bystricky@intel.com> Date: Mon, 19 Mar 2018 22:31:20 -0700 -Subject: [PATCH 34/36] fix segmentation fault in precompiled header generation +Subject: [PATCH] fix segmentation fault in precompiled header generation Prevent a segmentation fault which occurs when using incorrect structure trying to access name of some named operators, such as @@ -19,10 +19,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 21 insertions(+), 5 deletions(-) diff --git a/libcpp/lex.c b/libcpp/lex.c -index eedfcbb3146..15040a1b1f0 100644 +index 56ac3a1dd73..73a951148b3 100644 --- a/libcpp/lex.c +++ b/libcpp/lex.c -@@ -3280,11 +3280,27 @@ cpp_spell_token (cpp_reader *pfile, const cpp_token *token, +@@ -3311,11 +3311,27 @@ cpp_spell_token (cpp_reader *pfile, const cpp_token *token, spell_ident: case SPELL_IDENT: if (forstring) @@ -55,6 +55,3 @@ index eedfcbb3146..15040a1b1f0 100644 else buffer = _cpp_spell_ident_ucns (buffer, token->val.node.node); break; --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0035-Fix-for-testsuite-failure.patch b/meta/recipes-devtools/gcc/gcc/0032-Fix-for-testsuite-failure.patch index 7470cbfcfc..0a0767b441 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0035-Fix-for-testsuite-failure.patch +++ b/meta/recipes-devtools/gcc/gcc/0032-Fix-for-testsuite-failure.patch @@ -1,7 +1,7 @@ -From 0f9d449c739df03782ce9d29f6b68d9af976a607 Mon Sep 17 00:00:00 2001 +From 2512aacf023c679d86d8f40caff4f6ff412b32ff Mon Sep 17 00:00:00 2001 From: RAGHUNATH LOLUR <raghunath.lolur@kpit.com> Date: Wed, 6 Dec 2017 22:52:26 -0800 -Subject: [PATCH 35/36] Fix for testsuite failure +Subject: [PATCH] Fix for testsuite failure 2017-11-16 Raghunath Lolur <raghunath.lolur@kpit.com> @@ -220,7 +220,7 @@ index 96006b3e338..4287e4538bf 100644 /* This test uses __builtin_trap () instead of e.g. abort, because due to -mpreferred-stack-boundary=3 it should not call diff --git a/gcc/testsuite/gcc.target/i386/pr62120.c b/gcc/testsuite/gcc.target/i386/pr62120.c -index bfb8c4703eb..ed04cf181f3 100644 +index 28d85d37712..c93266bd4bc 100644 --- a/gcc/testsuite/gcc.target/i386/pr62120.c +++ b/gcc/testsuite/gcc.target/i386/pr62120.c @@ -1,5 +1,5 @@ @@ -253,6 +253,3 @@ index 6cda1534311..26e37f5b8ba 100644 #define vector(elcount, type) \ __attribute__((vector_size((elcount)*sizeof(type)))) type --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0036-Re-introduce-spe-commandline-options.patch b/meta/recipes-devtools/gcc/gcc/0033-Re-introduce-spe-commandline-options.patch index 4dbcd98945..ba7c2b8fd5 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0036-Re-introduce-spe-commandline-options.patch +++ b/meta/recipes-devtools/gcc/gcc/0033-Re-introduce-spe-commandline-options.patch @@ -1,7 +1,7 @@ -From 71e99c2b58a9eb00cdd65a04aeb6fb78227e3297 Mon Sep 17 00:00:00 2001 +From 3fc06241ce37e2e4b3ed21ace28d347eb511448d Mon Sep 17 00:00:00 2001 From: Khem Raj <raj.khem@gmail.com> Date: Wed, 6 Jun 2018 12:10:22 -0700 -Subject: [PATCH 36/36] Re-introduce spe commandline options +Subject: [PATCH] Re-introduce spe commandline options This should ensure that we keep accepting spe options @@ -14,10 +14,10 @@ Signed-off-by: Khem Raj <raj.khem@gmail.com> 1 file changed, 12 insertions(+) diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt -index f4b5c91e11f..69869350fce 100644 +index f95b8279270..0e52d51409d 100644 --- a/gcc/config/rs6000/rs6000.opt +++ b/gcc/config/rs6000/rs6000.opt -@@ -345,6 +345,18 @@ mdebug= +@@ -344,6 +344,18 @@ mdebug= Target RejectNegative Joined -mdebug= Enable debug output. @@ -36,6 +36,3 @@ index f4b5c91e11f..69869350fce 100644 mabi=altivec Target RejectNegative Var(rs6000_altivec_abi) Save Use the AltiVec ABI extensions. --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc-9.2/0032-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch b/meta/recipes-devtools/gcc/gcc/0034-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch index 8dde016ce5..4ce9dc6def 100644 --- a/meta/recipes-devtools/gcc/gcc-9.2/0032-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch +++ b/meta/recipes-devtools/gcc/gcc/0034-libgcc_s-Use-alias-for-__cpu_indicator_init-instead-.patch @@ -1,7 +1,7 @@ -From 9975b6ed3570bbf7c7d2d82f4d5f733d24ccacf5 Mon Sep 17 00:00:00 2001 +From b42ff59c3fe2967d37815c8db72a47b9b7f585b4 Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy <nsz@port70.net> Date: Sat, 24 Oct 2015 20:09:53 +0000 -Subject: [PATCH 32/36] libgcc_s: Use alias for __cpu_indicator_init instead of +Subject: [PATCH] libgcc_s: Use alias for __cpu_indicator_init instead of symver Adapter from @@ -26,23 +26,23 @@ gcc/Changelog: 2015-05-11 Szabolcs Nagy <szabolcs.nagy@arm.com> - * config/i386/i386.c (ix86_expand_builtin): Make __builtin_cpu_init + * config/i386/i386-expand.c (ix86_expand_builtin): Make __builtin_cpu_init call __cpu_indicator_init_local instead of __cpu_indicator_init. Upstream-Status: Pending Signed-off-by: Khem Raj <raj.khem@gmail.com> --- - gcc/config/i386/i386.c | 4 ++-- - libgcc/config/i386/cpuinfo.c | 6 +++--- - libgcc/config/i386/t-linux | 2 +- + gcc/config/i386/i386-expand.c | 4 ++-- + libgcc/config/i386/cpuinfo.c | 6 +++--- + libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c -index 2b37296e537..dd380ddba88 100644 ---- a/gcc/config/i386/i386.c -+++ b/gcc/config/i386/i386.c -@@ -36658,10 +36658,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +diff --git a/gcc/config/i386/i386-expand.c b/gcc/config/i386/i386-expand.c +index 48f00c5fcfc..468f5f71fac 100644 +--- a/gcc/config/i386/i386-expand.c ++++ b/gcc/config/i386/i386-expand.c +@@ -10941,10 +10941,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -56,10 +56,10 @@ index 2b37296e537..dd380ddba88 100644 return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index d6cb2de6265..ce04ef78205 100644 +index 00322c58622..f42bbb8af98 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c -@@ -504,7 +504,7 @@ __cpu_indicator_init (void) +@@ -508,7 +508,7 @@ __cpu_indicator_init (void) return 0; } @@ -81,6 +81,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.22.1 - diff --git a/meta/recipes-devtools/gcc/gcc/0035-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch b/meta/recipes-devtools/gcc/gcc/0035-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch new file mode 100644 index 0000000000..dd1bf6dedc --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0035-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch @@ -0,0 +1,182 @@ +From 0395060a7dcf98c5f5a65103f6aaa71d6b862259 Mon Sep 17 00:00:00 2001 +From: Richard Purdie <richard.purdie@linuxfoundation.org> +Date: Tue, 10 Mar 2020 08:26:53 -0700 +Subject: [PATCH] gentypes/genmodes: Do not use __LINE__ for maintaining + reproducibility + +Inserting line numbers into generated code means its not always reproducible wth +differing versions of host gcc. Void the issue by not adding these. + +Upstream-Status: Inappropriate [OE Reproducibility specific] + +Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org> +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + gcc/gengtype.c | 6 +++--- + gcc/genmodes.c | 32 ++++++++++++++++---------------- + 2 files changed, 19 insertions(+), 19 deletions(-) + +diff --git a/gcc/gengtype.c b/gcc/gengtype.c +index 981577481af..d5700fff401 100644 +--- a/gcc/gengtype.c ++++ b/gcc/gengtype.c +@@ -991,7 +991,7 @@ create_field_at (pair_p next, type_p type, const char *name, options_p opt, + /* Create a fake field with the given type and name. NEXT is the next + field in the chain. */ + #define create_field(next,type,name) \ +- create_field_all (next,type,name, 0, this_file, __LINE__) ++ create_field_all (next,type,name, 0, this_file, 0) + + /* Like create_field, but the field is only valid when condition COND + is true. */ +@@ -1024,7 +1024,7 @@ create_optional_field_ (pair_p next, type_p type, const char *name, + } + + #define create_optional_field(next,type,name,cond) \ +- create_optional_field_(next,type,name,cond,__LINE__) ++ create_optional_field_(next,type,name,cond,0) + + /* Reverse a linked list of 'struct pair's in place. */ + pair_p +@@ -5187,7 +5187,7 @@ main (int argc, char **argv) + /* These types are set up with #define or else outside of where + we can see them. We should initialize them before calling + read_input_list. */ +-#define POS_HERE(Call) do { pos.file = this_file; pos.line = __LINE__; \ ++#define POS_HERE(Call) do { pos.file = this_file; pos.line = 0; \ + Call;} while (0) + POS_HERE (do_scalar_typedef ("CUMULATIVE_ARGS", &pos)); + POS_HERE (do_scalar_typedef ("REAL_VALUE_TYPE", &pos)); +diff --git a/gcc/genmodes.c b/gcc/genmodes.c +index bd78310ea24..dbd02c51a4c 100644 +--- a/gcc/genmodes.c ++++ b/gcc/genmodes.c +@@ -430,7 +430,7 @@ complete_all_modes (void) + } + + /* For each mode in class CLASS, construct a corresponding complex mode. */ +-#define COMPLEX_MODES(C) make_complex_modes (MODE_##C, __FILE__, __LINE__) ++#define COMPLEX_MODES(C) make_complex_modes (MODE_##C, __FILE__, 0) + static void + make_complex_modes (enum mode_class cl, + const char *file, unsigned int line) +@@ -489,7 +489,7 @@ make_complex_modes (enum mode_class cl, + having as many components as necessary. ORDER is the sorting order + of the mode, with smaller numbers indicating a higher priority. */ + #define VECTOR_MODES_WITH_PREFIX(PREFIX, C, W, ORDER) \ +- make_vector_modes (MODE_##C, #PREFIX, W, ORDER, __FILE__, __LINE__) ++ make_vector_modes (MODE_##C, #PREFIX, W, ORDER, __FILE__, 0) + #define VECTOR_MODES(C, W) VECTOR_MODES_WITH_PREFIX (V, C, W, 0) + static void ATTRIBUTE_UNUSED + make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, +@@ -541,7 +541,7 @@ make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width, + /* Create a vector of booleans called NAME with COUNT elements and + BYTESIZE bytes in total. */ + #define VECTOR_BOOL_MODE(NAME, COUNT, BYTESIZE) \ +- make_vector_bool_mode (#NAME, COUNT, BYTESIZE, __FILE__, __LINE__) ++ make_vector_bool_mode (#NAME, COUNT, BYTESIZE, __FILE__, 0) + static void ATTRIBUTE_UNUSED + make_vector_bool_mode (const char *name, unsigned int count, + unsigned int bytesize, const char *file, +@@ -563,7 +563,7 @@ make_vector_bool_mode (const char *name, unsigned int count, + /* Input. */ + + #define _SPECIAL_MODE(C, N) \ +- make_special_mode (MODE_##C, #N, __FILE__, __LINE__) ++ make_special_mode (MODE_##C, #N, __FILE__, 0) + #define RANDOM_MODE(N) _SPECIAL_MODE (RANDOM, N) + #define CC_MODE(N) _SPECIAL_MODE (CC, N) + +@@ -576,7 +576,7 @@ make_special_mode (enum mode_class cl, const char *name, + + #define INT_MODE(N, Y) FRACTIONAL_INT_MODE (N, -1U, Y) + #define FRACTIONAL_INT_MODE(N, B, Y) \ +- make_int_mode (#N, B, Y, __FILE__, __LINE__) ++ make_int_mode (#N, B, Y, __FILE__, 0) + + static void + make_int_mode (const char *name, +@@ -589,16 +589,16 @@ make_int_mode (const char *name, + } + + #define FRACT_MODE(N, Y, F) \ +- make_fixed_point_mode (MODE_FRACT, #N, Y, 0, F, __FILE__, __LINE__) ++ make_fixed_point_mode (MODE_FRACT, #N, Y, 0, F, __FILE__, 0) + + #define UFRACT_MODE(N, Y, F) \ +- make_fixed_point_mode (MODE_UFRACT, #N, Y, 0, F, __FILE__, __LINE__) ++ make_fixed_point_mode (MODE_UFRACT, #N, Y, 0, F, __FILE__, 0) + + #define ACCUM_MODE(N, Y, I, F) \ +- make_fixed_point_mode (MODE_ACCUM, #N, Y, I, F, __FILE__, __LINE__) ++ make_fixed_point_mode (MODE_ACCUM, #N, Y, I, F, __FILE__, 0) + + #define UACCUM_MODE(N, Y, I, F) \ +- make_fixed_point_mode (MODE_UACCUM, #N, Y, I, F, __FILE__, __LINE__) ++ make_fixed_point_mode (MODE_UACCUM, #N, Y, I, F, __FILE__, 0) + + /* Create a fixed-point mode by setting CL, NAME, BYTESIZE, IBIT, FBIT, + FILE, and LINE. */ +@@ -619,7 +619,7 @@ make_fixed_point_mode (enum mode_class cl, + + #define FLOAT_MODE(N, Y, F) FRACTIONAL_FLOAT_MODE (N, -1U, Y, F) + #define FRACTIONAL_FLOAT_MODE(N, B, Y, F) \ +- make_float_mode (#N, B, Y, #F, __FILE__, __LINE__) ++ make_float_mode (#N, B, Y, #F, __FILE__, 0) + + static void + make_float_mode (const char *name, +@@ -636,7 +636,7 @@ make_float_mode (const char *name, + #define DECIMAL_FLOAT_MODE(N, Y, F) \ + FRACTIONAL_DECIMAL_FLOAT_MODE (N, -1U, Y, F) + #define FRACTIONAL_DECIMAL_FLOAT_MODE(N, B, Y, F) \ +- make_decimal_float_mode (#N, B, Y, #F, __FILE__, __LINE__) ++ make_decimal_float_mode (#N, B, Y, #F, __FILE__, 0) + + static void + make_decimal_float_mode (const char *name, +@@ -651,7 +651,7 @@ make_decimal_float_mode (const char *name, + } + + #define RESET_FLOAT_FORMAT(N, F) \ +- reset_float_format (#N, #F, __FILE__, __LINE__) ++ reset_float_format (#N, #F, __FILE__, 0) + static void ATTRIBUTE_UNUSED + reset_float_format (const char *name, const char *format, + const char *file, unsigned int line) +@@ -672,7 +672,7 @@ reset_float_format (const char *name, const char *format, + + /* __intN support. */ + #define INT_N(M,PREC) \ +- make_int_n (#M, PREC, __FILE__, __LINE__) ++ make_int_n (#M, PREC, __FILE__, 0) + static void ATTRIBUTE_UNUSED + make_int_n (const char *m, int bitsize, + const char *file, unsigned int line) +@@ -701,7 +701,7 @@ make_int_n (const char *m, int bitsize, + /* Partial integer modes are specified by relation to a full integer + mode. */ + #define PARTIAL_INT_MODE(M,PREC,NAME) \ +- make_partial_integer_mode (#M, #NAME, PREC, __FILE__, __LINE__) ++ make_partial_integer_mode (#M, #NAME, PREC, __FILE__, 0) + static void ATTRIBUTE_UNUSED + make_partial_integer_mode (const char *base, const char *name, + unsigned int precision, +@@ -728,7 +728,7 @@ make_partial_integer_mode (const char *base, const char *name, + /* A single vector mode can be specified by naming its component + mode and the number of components. */ + #define VECTOR_MODE(C, M, N) \ +- make_vector_mode (MODE_##C, #M, N, __FILE__, __LINE__); ++ make_vector_mode (MODE_##C, #M, N, __FILE__, 0); + static void ATTRIBUTE_UNUSED + make_vector_mode (enum mode_class bclass, + const char *base, +@@ -771,7 +771,7 @@ make_vector_mode (enum mode_class bclass, + + /* Adjustability. */ + #define _ADD_ADJUST(A, M, X, C1, C2) \ +- new_adjust (#M, &adj_##A, #A, #X, MODE_##C1, MODE_##C2, __FILE__, __LINE__) ++ new_adjust (#M, &adj_##A, #A, #X, MODE_##C1, MODE_##C2, __FILE__, 0) + + #define ADJUST_NUNITS(M, X) _ADD_ADJUST (nunits, M, X, RANDOM, RANDOM) + #define ADJUST_BYTESIZE(M, X) _ADD_ADJUST (bytesize, M, X, RANDOM, RANDOM) diff --git a/meta/recipes-devtools/gcc/gcc/0036-mingw32-Enable-operation_not_supported.patch b/meta/recipes-devtools/gcc/gcc/0036-mingw32-Enable-operation_not_supported.patch new file mode 100644 index 0000000000..de82a3a539 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0036-mingw32-Enable-operation_not_supported.patch @@ -0,0 +1,26 @@ +From 6f87a095f0e696bec07a50df789c9db8bdbca43d Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Tue, 12 May 2020 10:39:09 -0700 +Subject: [PATCH] mingw32: Enable operation_not_supported + +Fixes nativesdk build errors on mingw32 gcc-runtime + +Upstream-Status: Pending +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + libstdc++-v3/config/os/mingw32/error_constants.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/libstdc++-v3/config/os/mingw32/error_constants.h b/libstdc++-v3/config/os/mingw32/error_constants.h +index 68ac72a78fb..71cd5815b81 100644 +--- a/libstdc++-v3/config/os/mingw32/error_constants.h ++++ b/libstdc++-v3/config/os/mingw32/error_constants.h +@@ -107,7 +107,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION + #ifdef _GLIBCXX_HAVE_EPERM + operation_not_permitted = EPERM, + #endif +-// operation_not_supported = EOPNOTSUPP, ++ operation_not_supported = EOPNOTSUPP, + #ifdef _GLIBCXX_HAVE_EWOULDBLOCK + operation_would_block = EWOULDBLOCK, + #endif diff --git a/meta/recipes-devtools/gcc/gcc/0037-libatomic-Do-not-enforce-march-on-aarch64.patch b/meta/recipes-devtools/gcc/gcc/0037-libatomic-Do-not-enforce-march-on-aarch64.patch new file mode 100644 index 0000000000..3946acea11 --- /dev/null +++ b/meta/recipes-devtools/gcc/gcc/0037-libatomic-Do-not-enforce-march-on-aarch64.patch @@ -0,0 +1,42 @@ +From 38d262bfe7c0c894c364dc6e4dc7971e78a73974 Mon Sep 17 00:00:00 2001 +From: Khem Raj <raj.khem@gmail.com> +Date: Wed, 13 May 2020 15:10:38 -0700 +Subject: [PATCH] libatomic: Do not enforce march on aarch64 + +OE passes the right options via gcc compiler cmdline via TUNE_CCARGS +this can conflict between -mcpu settings and -march setting here, since +-mcpu will translate into an appropriate -march, lets depend on that +instead of setting it explicitly + +Upstream-Status: Inappropriate [OE-Specific] + +Signed-off-by: Khem Raj <raj.khem@gmail.com> +--- + libatomic/Makefile.am | 1 - + libatomic/Makefile.in | 1 - + 2 files changed, 2 deletions(-) + +diff --git a/libatomic/Makefile.am b/libatomic/Makefile.am +index 133fbbca77e..ac1ca645876 100644 +--- a/libatomic/Makefile.am ++++ b/libatomic/Makefile.am +@@ -125,7 +125,6 @@ libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix _$(s)_.lo,$(SIZEOBJS))) + ## On a target-specific basis, include alternates to be selected by IFUNC. + if HAVE_IFUNC + if ARCH_AARCH64_LINUX +-IFUNC_OPTIONS = -march=armv8-a+lse + libatomic_la_LIBADD += $(foreach s,$(SIZES),$(addsuffix _$(s)_1_.lo,$(SIZEOBJS))) + endif + if ARCH_ARM_LINUX +diff --git a/libatomic/Makefile.in b/libatomic/Makefile.in +index a51807e95c9..97df2d7ff03 100644 +--- a/libatomic/Makefile.in ++++ b/libatomic/Makefile.in +@@ -431,7 +431,6 @@ M_SRC = $(firstword $(filter %/$(M_FILE), $(all_c_files))) + libatomic_la_LIBADD = $(foreach s,$(SIZES),$(addsuffix \ + _$(s)_.lo,$(SIZEOBJS))) $(am__append_1) $(am__append_2) \ + $(am__append_3) $(am__append_4) +-@ARCH_AARCH64_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv8-a+lse + @ARCH_ARM_LINUX_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=armv7-a+fp -DHAVE_KERNEL64 + @ARCH_I386_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -march=i586 + @ARCH_X86_64_TRUE@@HAVE_IFUNC_TRUE@IFUNC_OPTIONS = -mcx16 diff --git a/meta/recipes-devtools/gcc/gcc_9.2.bb b/meta/recipes-devtools/gcc/gcc_10.2.bb index 7d93590588..7d93590588 100644 --- a/meta/recipes-devtools/gcc/gcc_9.2.bb +++ b/meta/recipes-devtools/gcc/gcc_10.2.bb diff --git a/meta/recipes-devtools/gcc/libgcc-initial_9.2.bb b/meta/recipes-devtools/gcc/libgcc-initial_10.2.bb index 0c698c26ec..0c698c26ec 100644 --- a/meta/recipes-devtools/gcc/libgcc-initial_9.2.bb +++ b/meta/recipes-devtools/gcc/libgcc-initial_10.2.bb diff --git a/meta/recipes-devtools/gcc/libgcc_9.2.bb b/meta/recipes-devtools/gcc/libgcc_10.2.bb index ea210a1130..ea210a1130 100644 --- a/meta/recipes-devtools/gcc/libgcc_9.2.bb +++ b/meta/recipes-devtools/gcc/libgcc_10.2.bb diff --git a/meta/recipes-devtools/gcc/libgfortran_9.2.bb b/meta/recipes-devtools/gcc/libgfortran_10.2.bb index 71dd8b4bdc..71dd8b4bdc 100644 --- a/meta/recipes-devtools/gcc/libgfortran_9.2.bb +++ b/meta/recipes-devtools/gcc/libgfortran_10.2.bb |