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authorRamax Lo <ramaxlo@gmail.com>2015-06-24 00:22:52 +0800
committerRichard Purdie <richard.purdie@linuxfoundation.org>2015-06-26 14:08:03 +0100
commitfc517d9bbbcab8e3fe090deac30c4a43de2da01f (patch)
treef359762d7555705700f59eb381dcee1e6f183fab /meta/recipes-core
parent71158fa1a623125dae82c64c27e81dcdb2369e2d (diff)
downloadopenembedded-core-contrib-fc517d9bbbcab8e3fe090deac30c4a43de2da01f.tar.gz
uclibc: Cope with other mips32 variants
Update uclibc.inc to handle different tunes of mips32 like mips32el, mips32-nf, mips32el-nf, etc. Signed-off-by: Ramax Lo <ramaxlo@gmail.com> Signed-off-by: Ross Burton <ross.burton@intel.com>
Diffstat (limited to 'meta/recipes-core')
-rw-r--r--meta/recipes-core/uclibc/uclibc.inc4
1 files changed, 3 insertions, 1 deletions
diff --git a/meta/recipes-core/uclibc/uclibc.inc b/meta/recipes-core/uclibc/uclibc.inc
index 18587ca273..08465c4f41 100644
--- a/meta/recipes-core/uclibc/uclibc.inc
+++ b/meta/recipes-core/uclibc/uclibc.inc
@@ -94,7 +94,9 @@ python () {
# with conflicting march options to gcc. Here we
# ask for MIPS32 ISA to match the chosen arch
tune = d.getVar("DEFAULTTUNE", True)
- if tune in ['mips32', 'mips32r2']:
+ if tune.startswith('mips32'):
+ import re
+ tune = re.sub('(el)*(-nf)*', '', tune)
d.setVar('configmangle_append',
"/^### MIPS32_CHECK$/a\\\nCONFIG_MIPS_ISA_%s=y\n\n" % (tune.upper()))
if "${OE_FEATURES}":