diff options
| author |   Matthew Allum <mallum@openedhand.com> | 2006-07-21 09:16:05 +0000 |
|---|---|---|
| committer | Matthew Allum <mallum@openedhand.com> | 2006-07-21 09:16:05 +0000 |
| commit | 62e2fd845deab20b6dae588409b7f6f1ed7617f7 (patch) | |
| tree | 276e3281c6da9371ccfae4d54bb98018fc8bab7a | |
| parent | f1f7b603e03d311530993ec224da034ea5165ba6 (diff) | |
| download | openembedded-core-contrib-62e2fd845deab20b6dae588409b7f6f1ed7617f7.tar.gz | |
Add initial cmx270 2.6.17 kernel
git-svn-id: https://svn.o-hand.com/repos/poky/trunk@528 311d38ba-8fff-0310-9ca6-ca027cbcb966
7 files changed, 4627 insertions, 0 deletions
diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/add_2700g_plat-r0.patch b/openembedded/packages/linux/linux-cmx270-2.6.17/add_2700g_plat-r0.patch new file mode 100644 index 0000000000..b4a33e2cf7 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/add_2700g_plat-r0.patch @@ -0,0 +1,126 @@ +Index: linux-2.6.17/arch/arm/mach-pxa/cm-x270.c +=================================================================== +--- linux-2.6.17.orig/arch/arm/mach-pxa/cm-x270.c 2006-07-18 15:40:10.000000000 +0100 ++++ linux-2.6.17/arch/arm/mach-pxa/cm-x270.c 2006-07-20 20:25:22.000000000 +0100 +@@ -11,6 +11,7 @@ + #include <linux/pm.h> + #include <linux/fb.h> + #include <linux/rtc-v3020.h> ++#include <linux/mbxfb.h> + + #include <asm/types.h> + #include <asm/setup.h> +@@ -396,10 +397,113 @@ + .resource = dm9000_resources, + }; + ++/* 2700G graphics */ ++static u64 fb_dma_mask = ~(u64)0; ++ ++static struct resource cmx270_2700G_resource[] = { ++ /* frame buffer memory including ODFB and External SDRAM */ ++ [0] = { ++ .start = MARATHON_PHYS, ++ .end = MARATHON_PHYS + 0x02000000, ++ .flags = IORESOURCE_MEM, ++ }, ++ /* Marathon registers */ ++ [1] = { ++ .start = MARATHON_PHYS + 0x03fe0000, ++ .end = MARATHON_PHYS + 0x03ffffff, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static unsigned long save_lcd_regs[10]; ++ ++/* if 2700G is used, disable PCI throttle */ ++#define LB_TROTTLE_OFF (PXA_CS1_PHYS | (1 << 25)) ++#define LB_TROTTLE_MAX (PXA_CS1_PHYS | (1 << 25) | (1 << 22)) ++static int cmx270_marathon_probe(struct fb_info *fb) ++{ ++ volatile unsigned long *cpld; ++ ++ cpld = (volatile unsigned long*)ioremap(LB_TROTTLE_OFF, 4); ++ if ( !cpld ) { ++ return -ENODEV; ++ } ++ *cpld = 0; ++ iounmap((void*)cpld); ++ ++ /* save PXA-270 pin settings before enabling 2700G */ ++ save_lcd_regs[0] = GPDR1; ++ save_lcd_regs[1] = GPDR2; ++ save_lcd_regs[2] = GAFR1_U; ++ save_lcd_regs[3] = GAFR2_L; ++ save_lcd_regs[4] = GAFR2_U; ++ ++ /* Disable PXA-270 on-chip controller driving pins */ ++ GPDR1 &= ~(0xfc000000); ++ GPDR2 &= ~(0x00c03fff); ++ GAFR1_U &= ~(0xfff00000); ++ GAFR2_L &= ~(0x0fffffff); ++ GAFR2_U &= ~(0x0000f000); ++ return 0; ++} ++ ++static int cmx270_marathon_remove(struct fb_info *fb) ++{ ++ volatile unsigned long *cpld; ++ cpld = (volatile unsigned long*)ioremap(LB_TROTTLE_MAX, 4); ++ ++ if ( !cpld ) { ++ return -ENODEV; ++ } ++ *cpld = 0; ++ iounmap((void*)cpld); ++ ++ GPDR1 = save_lcd_regs[0]; ++ GPDR2 = save_lcd_regs[1]; ++ GAFR1_U = save_lcd_regs[2]; ++ GAFR2_L = save_lcd_regs[3]; ++ GAFR2_U = save_lcd_regs[4]; ++ return 0; ++} ++ ++static struct mbxfb_platform_data cmx270_2700G_data = { ++ .xres = { ++ .min = 240, ++ .max = 1200, ++ .defval = 640, ++ }, ++ .yres = { ++ .min = 240, ++ .max = 1200, ++ .defval = 480, ++ }, ++ .bpp = { ++ .min = 16, ++ .max = 32, ++ .defval = 16, ++ }, ++ .memsize = 8*1024*1024, ++ .probe = cmx270_marathon_probe, ++ .remove = cmx270_marathon_remove, ++}; ++ ++static struct platform_device cmx270_2700G = { ++ .name = "mbx-fb", ++ .dev = { ++ .platform_data = &cmx270_2700G_data, ++ .dma_mask = &fb_dma_mask, ++ .coherent_dma_mask = 0xffffffff, ++ }, ++ .num_resources = ARRAY_SIZE(cmx270_2700G_resource), ++ .resource = cmx270_2700G_resource, ++ .id = -1, ++}; ++ + static struct platform_device *platform_devices[] __initdata = {\ + &cmx270_audio_device, + &v3020_rtc_device, + &dm9000_device, ++ &cmx270_2700G, + }; + + static int cmx270_ohci_init(struct device *dev) diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/cm_x2xx_mbx.patch b/openembedded/packages/linux/linux-cmx270-2.6.17/cm_x2xx_mbx.patch new file mode 100644 index 0000000000..d33f4522f8 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/cm_x2xx_mbx.patch @@ -0,0 +1,1566 @@ + drivers/video/Kconfig | 10 + + drivers/video/Makefile | 1 + drivers/video/mbx/Makefile | 3 + drivers/video/mbx/mbxfb.c | 646 ++++++++++++++++++++++++++++++++++++++++++ + drivers/video/mbx/mbxsysfs.c | 129 ++++++++ + drivers/video/mbx/reg_bits.h | 489 ++++++++++++++++++++++++++++++++ + drivers/video/mbx/regs.h | 192 ++++++++++++ + include/linux/mbxfb.h | 28 ++ + 8 files changed, 1498 insertions(+), 0 deletions(-) + +diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig +index 17de4c8..3f472d4 100644 +--- a/drivers/video/Kconfig ++++ b/drivers/video/Kconfig +@@ -1518,6 +1518,16 @@ config FB_PXA_PARAMETERS + + <file:Documentation/fb/pxafb.txt> describes the available parameters. + ++config FB_MBX ++ tristate "2700G LCD framebuffer support" ++ depends on FB && ARCH_PXA ++ select FB_CFB_FILLRECT ++ select FB_CFB_COPYAREA ++ select FB_CFB_IMAGEBLIT ++ ---help--- ++ ++ If unsure, say N. ++ + config FB_W100 + tristate "W100 frame buffer support" + depends on FB && PXA_SHARPSL +diff --git a/drivers/video/Makefile b/drivers/video/Makefile +index c335e9b..eabb5be 100644 +--- a/drivers/video/Makefile ++++ b/drivers/video/Makefile +@@ -38,6 +38,7 @@ obj-$(CONFIG_FB_SIS) += sis/ + obj-$(CONFIG_FB_KYRO) += kyro/ + obj-$(CONFIG_FB_SAVAGE) += savage/ + obj-$(CONFIG_FB_GEODE) += geode/ ++obj-$(CONFIG_FB_MBX) += mbx/ + obj-$(CONFIG_FB_I810) += vgastate.o + obj-$(CONFIG_FB_NEOMAGIC) += neofb.o vgastate.o + obj-$(CONFIG_FB_VIRGE) += virgefb.o +diff --git a/drivers/video/mbx/Makefile b/drivers/video/mbx/Makefile +new file mode 100644 +index 0000000..ad042f5 +--- /dev/null ++++ b/drivers/video/mbx/Makefile +@@ -0,0 +1,3 @@ ++# Makefile for the 2700G controller driver. ++ ++obj-$(CONFIG_FB_MBX) += mbxfb.o +diff --git a/drivers/video/mbx/mbxfb.c b/drivers/video/mbx/mbxfb.c +new file mode 100644 +index 0000000..fcf164f +--- /dev/null ++++ b/drivers/video/mbx/mbxfb.c +@@ -0,0 +1,646 @@ ++/* ++ * linux/drivers/video/mbx/mbxfb.c ++ * ++ * Copyright (C) 2006 Compulab, Ltd. ++ * Mike Rapoport <mike@compulab.co.il> ++ * ++ * Based on pxafb.c ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file COPYING in the main directory of this archive for ++ * more details. ++ * ++ * Intel 2700G (Marathon) Graphics Accelerator Frame Buffer Driver ++ * ++ */ ++ ++#include <linux/config.h> ++#include <linux/module.h> ++#include <linux/fb.h> ++#include <linux/delay.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/mbxfb.h> ++ ++#include <asm/io.h> ++ ++/* use defines from asm-arm/arch-pxa/bitfields.h for now */ ++/* review (and maybe rework) all bitfields access later */ ++#define UData(Data) ((unsigned long) (Data)) ++#define Fld(Size, Shft) (((Size) << 16) + (Shft)) ++#define FSize(Field) ((Field) >> 16) ++#define FShft(Field) ((Field) & 0x0000FFFF) ++#define FMsk(Field) (((UData (1) << FSize (Field)) - 1) << FShft (Field)) ++#define FAlnMsk(Field) ((UData (1) << FSize (Field)) - 1) ++#define F1stBit(Field) (UData (1) << FShft (Field)) ++ ++static unsigned long virt_base_2700; ++#include "regs.h" ++#include "reg_bits.h" ++ ++#define MIN_XRES 16 ++#define MIN_YRES 16 ++#define MAX_XRES 2048 ++#define MAX_YRES 2048 ++ ++/* FIXME: take care of different chip reivsions with different sizes ++ of ODFB */ ++#define MEMORY_OFFSET 0x60000 ++ ++struct mbxfb_info { ++ struct device *dev; ++ ++ struct resource *fb_res; ++ struct resource *fb_req; ++ ++ struct resource *reg_res; ++ struct resource *reg_req; ++ ++ void __iomem *fb_virt_addr; ++ unsigned long fb_phys_addr; ++ ++ void __iomem *reg_virt_addr; ++ unsigned long reg_phys_addr; ++ ++ int (*platform_probe)(struct fb_info *fb); ++ int (*platform_remove)(struct fb_info *fb); ++}; ++ ++static struct fb_var_screeninfo mbxfb_default = { ++ .xres = 640, ++ .yres = 480, ++ .xres_virtual = 640, ++ .yres_virtual = 480, ++ .bits_per_pixel = 16, ++ .red = { 11, 5, 0 }, ++ .green = { 5, 6, 0 }, ++ .blue = { 0, 5, 0 }, ++ .activate = FB_ACTIVATE_TEST, ++ .height = -1, ++ .width = -1, ++ .pixclock = 40000, ++ .left_margin = 48, ++ .right_margin = 16, ++ .upper_margin = 33, ++ .lower_margin = 10, ++ .hsync_len = 96, ++ .vsync_len = 2, ++ .vmode = FB_VMODE_NONINTERLACED, ++ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, ++}; ++ ++static struct fb_fix_screeninfo mbxfb_fix = { ++ .id = "MBX", ++ .type = FB_TYPE_PACKED_PIXELS, ++ .visual = FB_VISUAL_TRUECOLOR, ++ .xpanstep = 0, ++ .ypanstep = 0, ++ .ywrapstep = 0, ++ .accel = FB_ACCEL_NONE, ++}; ++ ++struct pixclock_div { ++ u8 m; ++ u8 n; ++ u8 p; ++}; ++ ++static unsigned int mbxfb_get_pixclock(unsigned int pixclock_ps, struct pixclock_div *div) ++{ ++ u8 m, n, p; ++ unsigned int err = 0; ++ unsigned int min_err = ~0x0; ++ unsigned int clk; ++ unsigned int best_clk = 0; ++ unsigned int ref_clk = 13000; /* FIXME: take from platform data */ ++ unsigned int pixclock; ++ ++ /* convert pixclock to KHz */ ++ pixclock = PICOS2KHZ(pixclock_ps); ++ ++ for ( m = 1; m < 64; m++ ) { ++ for ( n = 1; n < 8; n++ ) { ++ for ( p = 0; p < 8; p++ ) { ++ clk = (ref_clk * m) / (n * (1 << p)); ++ err = (clk > pixclock) ? (clk - pixclock) : ++ (pixclock - clk); ++ if ( err < min_err ) { ++ min_err = err; ++ best_clk = clk; ++ div->m = m; ++ div->n = n; ++ div->p = p; ++ } ++ } ++ } ++ } ++ return KHZ2PICOS(best_clk); ++} ++ ++static int ++mbxfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, ++ u_int trans, struct fb_info *info) ++{ ++ uint val, ret = 1; ++ ++ if ( regno < 255 ) { ++ val = (red & 0xff) << 16; ++ val |= (green & 0xff) << 8; ++ val |= (blue & 0xff) << 0; ++ GPLUT = Gplut_Lutadr(regno) | Gplut_Lutdata(val); ++ udelay(1000); ++ ret = 0; ++ } ++ return ret; ++} ++ ++static int mbxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) ++{ ++ struct pixclock_div div; ++ ++ var->pixclock = mbxfb_get_pixclock(var->pixclock, &div); ++ ++ if (var->xres < MIN_XRES) ++ var->xres = MIN_XRES; ++ if (var->yres < MIN_YRES) ++ var->yres = MIN_YRES; ++ if (var->xres > MAX_XRES) ++ var->xres = MAX_XRES; ++ if (var->yres > MAX_YRES) ++ var->yres = MAX_YRES; ++ var->xres_virtual = ++ max(var->xres_virtual, var->xres); ++ var->yres_virtual = ++ max(var->yres_virtual, var->yres); ++ ++ switch (var->bits_per_pixel) { ++ /* FIXME: implement 8 bits-per-pixel */ ++ case 8: ++ var->bits_per_pixel = 16; ++ case 16: ++ var->green.length = (var->green.length == 5) ? 5 : 6; ++ var->red.length = 5; ++ var->blue.length = 5; ++ var->transp.length = 6 - var->green.length; ++ var->blue.offset = 0; ++ var->green.offset = 5; ++ var->red.offset = 5 + var->green.length; ++ var->transp.offset = (5 + var->red.offset) & 15; ++ break; ++ case 24: /* RGB 888 */ ++ case 32: /* RGBA 8888 */ ++ var->red.offset = 16; ++ var->red.length = 8; ++ var->green.offset = 8; ++ var->green.length = 8; ++ var->blue.offset = 0; ++ var->blue.length = 8; ++ var->transp.length = var->bits_per_pixel - 24; ++ var->transp.offset = (var->transp.length) ? 24 : 0; ++ break; ++ } ++ var->red.msb_right = 0; ++ var->green.msb_right = 0; ++ var->blue.msb_right = 0; ++ var->transp.msb_right = 0; ++ ++ return 0; ++} ++ ++static int mbxfb_set_par(struct fb_info *info) ++{ ++ struct fb_var_screeninfo *var = &info->var; ++ struct pixclock_div div; ++ ushort hbps, ht, hfps, has; ++ ushort vbps, vt, vfps, vas; ++ ++ info->fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; ++ ++ /* setup color mode */ ++ GSCTRL &= ~(FMsk(GSCTRL_GPIXFMT)); ++ /* FIXME: add *WORKING* support for 8-bits per color */ ++ if ( info->var.bits_per_pixel == 8 ) { ++ GSCTRL |= GSCTRL_GPIXFMT_INDEXED; ++ GSCTRL |= GSCTRL_LUT_EN; ++ GSCTRL &= ~GSCTRL_GAMMA_EN; ++ info->fix.visual = FB_VISUAL_PSEUDOCOLOR; ++ fb_alloc_cmap(&info->cmap, 1<<info->var.bits_per_pixel, 0); ++ } ++ else { ++ fb_dealloc_cmap(&info->cmap); ++ GSCTRL &= ~GSCTRL_LUT_EN; ++ info->fix.visual = FB_VISUAL_TRUECOLOR; ++ switch ( info->var.bits_per_pixel ) { ++ case 16: ++ if ( info->var.green.length == 5 ) ++ GSCTRL |= GSCTRL_GPIXFMT_ARGB1555; ++ else ++ GSCTRL |= GSCTRL_GPIXFMT_RGB565; ++ break; ++ case 24: ++ GSCTRL |= GSCTRL_GPIXFMT_RGB888; ++ break; ++ case 32: ++ GSCTRL |= GSCTRL_GPIXFMT_ARGB8888; ++ break; ++ } ++ } ++ ++ /* setup resolution */ ++ GSCTRL &= ~(FMsk(GSCTRL_GSWIDTH) | FMsk(GSCTRL_GSHEIGHT)); ++ GSCTRL |= Gsctrl_Width(info->var.xres - 1) | ++ Gsctrl_Height(info->var.yres - 1); ++ ++ GSADR &= ~(FMsk(GSADR_SRCSTRIDE)); udelay(1000); ++ GSADR |= Gsadr_Srcstride(info->var.xres * info->var.bits_per_pixel / (8 * 16) - 1); udelay(1000); ++ ++ /* setup timings */ ++ var->pixclock = mbxfb_get_pixclock(info->var.pixclock, &div); ++ ++ DISPPLL = Disp_Pll_M(div.m) | Disp_Pll_N(div.n) | Disp_Pll_P(div.p) | DISP_PLL_EN; ++ ++ hbps = var->hsync_len; ++ has = hbps + var->left_margin; ++ hfps = has + var->xres; ++ ht = hfps + var->right_margin; ++ ++ vbps = var->vsync_len; ++ vas = vbps + var->upper_margin; ++ vfps = vas + var->yres; ++ vt = vfps + var->lower_margin; ++ ++ DHT01 = Dht01_Hbps(hbps) | Dht01_Ht(ht); ++ DHT02 = Dht02_Hlbs(has) | Dht02_Has(has); ++ DHT03 = Dht03_Hfps(hfps) | Dht03_Hrbs(hfps); ++ DHDET = Dhdet_Hdes(has) | Dhdet_Hdef(hfps); ++ ++ DVT01 = Dvt01_Vbps(vbps) | Dvt01_Vt(vt); ++ DVT02 = Dvt02_Vtbs(vas) | Dvt02_Vas(vas); ++ DVT03 = Dvt03_Vfps(vfps) | Dvt03_Vbbs(vfps); ++ DVDET = Dvdet_Vdes(vas) | Dvdet_Vdef(vfps); ++ DVECTRL = Dvectrl_Vevent(vfps) | Dvectrl_Vfetch(vbps); ++ DSCTRL |= DSCTRL_SYNCGEN_EN; ++ ++ return 0; ++} ++ ++static int mbxfb_blank(int blank, struct fb_info *info) ++{ ++ switch (blank) { ++ case FB_BLANK_POWERDOWN: ++ case FB_BLANK_VSYNC_SUSPEND: ++ case FB_BLANK_HSYNC_SUSPEND: ++ case FB_BLANK_NORMAL: ++ DSCTRL &= ~DSCTRL_SYNCGEN_EN; udelay(1000); ++ PIXCLK &= ~PIXCLK_EN; udelay(1000); ++ VOVRCLK &= ~VOVRCLK_EN; udelay(1000); ++ break; ++ case FB_BLANK_UNBLANK: ++ DSCTRL |= DSCTRL_SYNCGEN_EN; udelay(1000); ++ PIXCLK |= PIXCLK_EN; udelay(1000); ++ break; ++ } ++ return 0; ++} ++ ++static struct fb_ops mbxfb_ops = { ++ .owner = THIS_MODULE, ++ .fb_check_var = mbxfb_check_var, ++ .fb_set_par = mbxfb_set_par, ++ .fb_setcolreg = mbxfb_setcolreg, ++ .fb_fillrect = cfb_fillrect, ++ .fb_copyarea = cfb_copyarea, ++ .fb_imageblit = cfb_imageblit, ++ .fb_blank = mbxfb_blank, ++}; ++ ++/* ++ Enable external SDRAM controller. Assume that all clocks are active ++ by now. ++*/ ++static void setup_memc(struct fb_info *fbi) ++{ ++ unsigned long tmp; ++ ++ /* FIXME: use platfrom specific parameters */ ++ /* setup SDRAM controller */ ++ LMCFG = LMCFG_LMC_DS | LMCFG_LMC_TS | LMCFG_LMD_TS | LMCFG_LMA_TS; ++ udelay(1000); ++ LMPWR = LMPWR_MC_PWR_ACT; ++ udelay(1000); ++ /* setup SDRAM timings */ ++ LMTIM = Lmtim_Tras(7) | Lmtim_Trp(3) | Lmtim_Trcd(3) | Lmtim_Trc(9) | ++ Lmtim_Tdpl(2); ++ udelay(1000); ++ /* setup SDRAM refresh rate */ ++ LMREFRESH = 0xc2b; ++ udelay(1000); ++ /* setup SDRAM type parameters */ ++ LMTYPE = LMTYPE_CASLAT_3 | LMTYPE_BKSZ_2 | LMTYPE_ROWSZ_11 | ++ LMTYPE_COLSZ_8; ++ udelay(1000); ++ /* enable memory controller */ ++ LMPWR = LMPWR_MC_PWR_ACT; ++ udelay(1000); ++ ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++ tmp = *(unsigned long*)(virt_base_2700 + MEMORY_OFFSET); ++} ++ ++static void enable_clocks(struct fb_info* fbi) ++{ ++ /* enable clocks */ ++ SYSCLKSRC = SYSCLKSRC_PLL_2; udelay(1000); ++ PIXCLKSRC = PIXCLKSRC_PLL_1; udelay(1000); ++ CLKSLEEP = 0x00000000; udelay(1000); ++ COREPLL = Core_Pll_M(0x17) | Core_Pll_N(0x3) | Core_Pll_P(0x0) | CORE_PLL_EN; udelay(1000); ++ DISPPLL = Disp_Pll_M(0x1b) | Disp_Pll_N(0x7) | Disp_Pll_P(0x1) | DISP_PLL_EN; ++ ++ VOVRCLK = 0x00000000; udelay(1000); ++ PIXCLK = PIXCLK_EN; udelay(1000); ++ MEMCLK = MEMCLK_EN; udelay(1000); ++ M24CLK = 0x00000006; udelay(1000); ++ MBXCLK = 0x00000006; udelay(1000); ++ SDCLK = SDCLK_EN; udelay(1000); ++ PIXCLKDIV = 0x00000001; udelay(1000); ++} ++ ++static void setup_graphics(struct fb_info* fbi) ++{ ++ unsigned long gsctrl; ++ ++ gsctrl = GSCTRL_GAMMA_EN | Gsctrl_Width(fbi->var.xres-1) | ++ Gsctrl_Height(fbi->var.yres-1); ++ switch ( fbi->var.bits_per_pixel ) { ++ case 16: ++ if ( fbi->var.green.length == 5 ) ++ gsctrl |= GSCTRL_GPIXFMT_ARGB1555; ++ else ++ gsctrl |= GSCTRL_GPIXFMT_RGB565; ++ break; ++ case 24: gsctrl |= GSCTRL_GPIXFMT_RGB888; break; ++ case 32: gsctrl |= GSCTRL_GPIXFMT_ARGB8888; break; ++ } ++ ++ GSCTRL = gsctrl; udelay(1000); ++ GBBASE = 0x00000000; udelay(1000); ++ GDRCTRL = 0x00ffffff; udelay(1000); ++ GSCADR = GSCADR_STR_EN | Gscadr_Gbase_Adr(0x6000); udelay(1000); ++ GPLUT = 0x00000000; udelay(1000); ++} ++ ++static void setup_display(struct fb_info* fbi) ++{ ++ unsigned long dsctrl = 0; ++ ++ dsctrl = DSCTRL_BLNK_POL; ++ if ( fbi->var.sync & FB_SYNC_HOR_HIGH_ACT ) ++ dsctrl |= DSCTRL_HS_POL; ++ if ( fbi->var.sync & FB_SYNC_VERT_HIGH_ACT ) ++ dsctrl |= DSCTRL_VS_POL; ++ DSCTRL = dsctrl; udelay(1000); ++ DMCTRL = 0xd0303010; udelay(1000); ++ DSCTRL |= DSCTRL_SYNCGEN_EN; ++} ++ ++static void enable_controller(struct fb_info* fbi) ++{ ++ SYSRST = SYSRST_RST; ++ udelay(1000); ++ ++ enable_clocks(fbi); ++ setup_memc(fbi); ++ setup_graphics(fbi); ++ setup_display(fbi); ++} ++ ++ ++#ifdef CONFIG_PM ++/* ++ * Power management hooks. Note that we won't be called from IRQ context, ++ * unlike the blank functions above, so we may sleep. ++ */ ++static int mbxfb_suspend(struct platform_device *dev, pm_message_t state) ++{ ++ /* make frame buffer memory enter self-refresh mode */ ++ LMPWR = LMPWR_MC_PWR_SRM; ++ while ( LMPWRSTAT != LMPWRSTAT_MC_PWR_SRM ); ++ ++ /* reset the device, since it's initial state is 'mostly sleeping' */ ++ SYSRST = SYSRST_RST; ++ return 0; ++} ++ ++static int mbxfb_resume(struct platform_device *dev) ++{ ++ struct fb_info *fbi = (struct fb_info*)platform_get_drvdata(dev); ++ ++ enable_clocks(fbi); ++/* setup_graphics(fbi); */ ++/* setup_display(fbi); */ ++ ++ DSCTRL |= DSCTRL_SYNCGEN_EN; ++ return 0; ++} ++#else ++#define mbxfb_suspend NULL ++#define mbxfb_resume NULL ++#endif ++ ++#include "mbxsysfs.c" ++ ++#define res_size(_r) (((_r)->end - (_r)->start) + 1) ++ ++static int mbxfb_probe(struct platform_device *dev) ++{ ++ int ret; ++ struct fb_info *fbi; ++ struct mbxfb_info *mfbi; ++ struct mbxfb_platform_data *pdata; ++ ++ dev_dbg(dev, "mbxfb_probe\n"); ++ ++ fbi = framebuffer_alloc(sizeof(struct mbxfb_info), &dev->dev); ++ if ( fbi == NULL ) { ++ dev_err(&dev->dev, "framebuffer_alloc failed\n"); ++ return -ENOMEM; ++ } ++ ++ mfbi = fbi->par; ++ pdata = dev->dev.platform_data; ++ if ( pdata->probe ) ++ mfbi->platform_probe = pdata->probe; ++ if ( pdata->remove ) ++ mfbi->platform_remove = pdata->remove; ++ ++ mfbi->fb_res = platform_get_resource(dev, IORESOURCE_MEM, 0); ++ mfbi->reg_res = platform_get_resource(dev, IORESOURCE_MEM, 1); ++ ++ if ( !mfbi->fb_res || !mfbi->reg_res ) { ++ dev_err(&dev->dev, "no resources found\n"); ++ ret = -ENODEV; ++ goto err1; ++ } ++ ++ mfbi->fb_req = request_mem_region(mfbi->fb_res->start, ++ res_size(mfbi->fb_res), ++ dev->name); ++ if ( mfbi->fb_req == NULL ) { ++ dev_err(&dev->dev, "failed to claim framebuffer memory\n"); ++ ret = -EINVAL; ++ goto err1; ++ } ++ mfbi->fb_phys_addr = mfbi->fb_res->start; ++ ++ mfbi->reg_req = request_mem_region(mfbi->reg_res->start, ++ res_size(mfbi->reg_res), ++ dev->name); ++ if ( mfbi->reg_req == NULL ) { ++ dev_err(&dev->dev, "failed to claim Marathon registers\n"); ++ ret = -EINVAL; ++ goto err2; ++ } ++ mfbi->reg_phys_addr = mfbi->reg_res->start; ++ ++ mfbi->reg_virt_addr = ioremap_nocache(mfbi->reg_phys_addr, ++ res_size(mfbi->reg_req)); ++ if ( !mfbi->reg_virt_addr ) { ++ dev_err(&dev->dev, "failed to ioremap Marathon registers\n"); ++ ret = -EINVAL; ++ goto err3; ++ } ++ virt_base_2700 = (unsigned long)mfbi->reg_virt_addr; ++ ++ mfbi->fb_virt_addr = ioremap_nocache(mfbi->fb_phys_addr, ++ res_size(mfbi->fb_req)); ++ if ( !mfbi->reg_virt_addr ) { ++ dev_err(&dev->dev, "failed to ioremap frame buffer\n"); ++ ret = -EINVAL; ++ goto err4; ++ } ++ ++ fbi->screen_base = (char __iomem *)(mfbi->fb_virt_addr + 0x60000); /* FIXME: */ ++ fbi->screen_size = 8*1024*1024; /* 8 Megs */ /* FIXME: get from platform */ ++ fbi->fbops = &mbxfb_ops; ++ ++ fbi->var = mbxfb_default; ++ fbi->fix = mbxfb_fix; ++ fbi->fix.smem_start = mfbi->fb_phys_addr + 0x60000; ++ fbi->fix.smem_len = 8*1024*1024; ++ fbi->fix.line_length = 640*2; ++ ++ ret = fb_alloc_cmap(&fbi->cmap, 256, 0); ++ if (ret < 0) { ++ dev_err(&dev->dev, "fb_alloc_cmap failed\n"); ++ ret = -EINVAL; ++ goto err5; ++ } ++ ++ ret = register_framebuffer(fbi); ++ if (ret < 0) { ++ dev_err(&dev->dev, "register_framebuffer failed\n"); ++ ret = -EINVAL; ++ goto err6; ++ } ++ ++ platform_set_drvdata(dev, fbi); ++ ++ printk(KERN_INFO "fb%d: mbx frame buffer device\n", fbi->node); ++ ++ if ( mfbi->platform_probe ) ++ mfbi->platform_probe(fbi); ++ ++ enable_controller(fbi); ++ ++ mbxfb_sysfs_register(fbi); ++ ++ return 0; ++ ++ err6: ++ fb_dealloc_cmap(&fbi->cmap); ++ err5: ++ iounmap(mfbi->fb_virt_addr); ++ err4: ++ iounmap(mfbi->reg_virt_addr); ++ err3: ++ release_mem_region(mfbi->reg_res->start, ++ res_size(mfbi->reg_res)); ++ err2: ++ release_mem_region(mfbi->fb_res->start, ++ res_size(mfbi->fb_res)); ++ err1: ++ framebuffer_release(fbi); ++ ++ return ret; ++} ++ ++static int mbxfb_remove(struct platform_device *dev) ++{ ++ struct fb_info *fbi = (struct fb_info*)platform_get_drvdata(dev); ++ ++ SYSRST = SYSRST_RST; ++ udelay(1000); ++ ++ if (fbi) { ++ struct mbxfb_info *mfbi = fbi->par; ++ ++ unregister_framebuffer(fbi); ++ if ( mfbi ) { ++ if ( mfbi->platform_remove ) ++ mfbi->platform_remove(fbi); ++ ++ if ( mfbi->fb_virt_addr ) ++ iounmap(mfbi->fb_virt_addr); ++ if ( mfbi->reg_virt_addr ) ++ iounmap(mfbi->reg_virt_addr); ++ if ( mfbi->reg_req ) ++ release_mem_region(mfbi->reg_req->start, ++ res_size(mfbi->reg_req)); ++ if ( mfbi->fb_req ) ++ release_mem_region(mfbi->fb_req->start, ++ res_size(mfbi->fb_req)); ++ } ++ framebuffer_release(fbi); ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver mbxfb_driver = { ++ .probe = mbxfb_probe, ++ .remove = mbxfb_remove, ++ ++#ifdef CONFIG_PM ++ .suspend = mbxfb_suspend, ++ .resume = mbxfb_resume, ++#endif ++ .driver = { ++ .name = "mbx-fb", ++ }, ++}; ++ ++int __devinit mbxfb_init(void) ++{ ++ return platform_driver_register(&mbxfb_driver); ++} ++ ++static void __exit mbxfb_exit(void) ++{ ++ platform_driver_unregister(&mbxfb_driver); ++} ++ ++module_init(mbxfb_init); ++module_exit(mbxfb_exit); ++ ++MODULE_DESCRIPTION("loadable framebuffer driver for Marathon device"); ++MODULE_AUTHOR("Mike Rapoport, Compulab"); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/video/mbx/mbxsysfs.c b/drivers/video/mbx/mbxsysfs.c +new file mode 100644 +index 0000000..4b9571a +--- /dev/null ++++ b/drivers/video/mbx/mbxsysfs.c +@@ -0,0 +1,129 @@ ++static ssize_t sysconf_show(struct class_device * subsys, char * buf) ++{ ++ char * s = buf; ++ ++ s += sprintf(s, "SYSCFG = %08lx\n", SYSCFG); ++ s += sprintf(s, "PFBASE = %08lx\n", PFBASE); ++ s += sprintf(s, "PFCEIL = %08lx\n", PFCEIL); ++ s += sprintf(s, "POLLFLAG = %08lx\n", POLLFLAG); ++ s += sprintf(s, "SYSRST = %08lx\n", SYSRST); ++ return (s - buf); ++} ++ ++static ssize_t sysconf_store(struct class_device * subsys, const char * buf, size_t n) ++{ ++ return n; ++} ++ ++static ssize_t gsctl_show(struct class_device * subsys, char * buf) ++{ ++ char * s = buf; ++ ++ s += sprintf(s, "GSCTRL = %08lx\n", GSCTRL); ++ s += sprintf(s, "VSCTRL = %08lx\n", VSCTRL); ++ s += sprintf(s, "GBBASE = %08lx\n", GBBASE); ++ s += sprintf(s, "VBBASE = %08lx\n", VBBASE); ++ s += sprintf(s, "GDRCTRL = %08lx\n", GDRCTRL); ++ s += sprintf(s, "VCMSK = %08lx\n", VCMSK); ++ s += sprintf(s, "GSCADR = %08lx\n", GSCADR); ++ s += sprintf(s, "VSCADR = %08lx\n", VSCADR); ++ s += sprintf(s, "VUBASE = %08lx\n", VUBASE); ++ s += sprintf(s, "VVBASE = %08lx\n", VVBASE); ++ s += sprintf(s, "GSADR = %08lx\n", GSADR); ++ s += sprintf(s, "VSADR = %08lx\n", VSADR); ++ s += sprintf(s, "HCCTRL = %08lx\n", HCCTRL); ++ s += sprintf(s, "HCSIZE = %08lx\n", HCSIZE); ++ s += sprintf(s, "HCPOS = %08lx\n", HCPOS); ++ s += sprintf(s, "HCBADR = %08lx\n", HCBADR); ++ s += sprintf(s, "HCCKMSK = %08lx\n", HCCKMSK); ++ s += sprintf(s, "GPLUT = %08lx\n", GPLUT); ++ return (s - buf); ++} ++ ++static ssize_t gsctl_store(struct class_device * subsys, const char * buf, size_t n) ++{ ++ return n; ++} ++ ++static ssize_t display_show(struct class_device * subsys, char * buf) ++{ ++ char * s = buf; ++ ++ s += sprintf(s, "DSCTRL = %08lx\n", DSCTRL); ++ s += sprintf(s, "DHT01 = %08lx\n", DHT01); ++ s += sprintf(s, "DHT02 = %08lx\n", DHT02); ++ s += sprintf(s, "DHT03 = %08lx\n", DHT03); ++ s += sprintf(s, "DVT01 = %08lx\n", DVT01); ++ s += sprintf(s, "DVT02 = %08lx\n", DVT02); ++ s += sprintf(s, "DVT03 = %08lx\n", DVT03); ++ s += sprintf(s, "DBCOL = %08lx\n", DBCOL); ++ s += sprintf(s, "BGCOLOR = %08lx\n", BGCOLOR); ++ s += sprintf(s, "DINTRS = %08lx\n", DINTRS); ++ s += sprintf(s, "DINTRE = %08lx\n", DINTRE); ++ s += sprintf(s, "DINTRCNT = %08lx\n", DINTRCNT); ++ s += sprintf(s, "DSIG = %08lx\n", DSIG); ++ s += sprintf(s, "DMCTRL = %08lx\n", DMCTRL); ++ s += sprintf(s, "CLIPCTRL = %08lx\n", CLIPCTRL); ++ s += sprintf(s, "SPOCTRL = %08lx\n", SPOCTRL); ++ s += sprintf(s, "SVCTRL = %08lx\n", SVCTRL); ++ s += sprintf(s, "DLSTS = %08lx\n", DLSTS); ++ s += sprintf(s, "DLLCTRL = %08lx\n", DLLCTRL); ++ s += sprintf(s, "DVLNUM = %08lx\n", DVLNUM); ++ s += sprintf(s, "DUCTRL = %08lx\n", DUCTRL); ++ s += sprintf(s, "DVECTRL = %08lx\n", DVECTRL); ++ s += sprintf(s, "DHDET = %08lx\n", DHDET); ++ s += sprintf(s, "DVDET = %08lx\n", DVDET); ++ s += sprintf(s, "DODMSK = %08lx\n", DODMSK); ++ s += sprintf(s, "CSC01 = %08lx\n", CSC01); ++ s += sprintf(s, "CSC02 = %08lx\n", CSC02); ++ s += sprintf(s, "CSC03 = %08lx\n", CSC03); ++ s += sprintf(s, "CSC04 = %08lx\n", CSC04); ++ s += sprintf(s, "CSC05 = %08lx\n", CSC05); ++ return (s - buf); ++} ++ ++static ssize_t display_store(struct class_device * subsys, const char * buf, size_t n) ++{ ++ return n; ++} ++ ++static ssize_t clock_show(struct class_device * subsys, char * buf) ++{ ++ char * s = buf; ++ ++ s += sprintf(s, "SYSCLKSRC = %08lx\n", SYSCLKSRC); ++ s += sprintf(s, "PIXCLKSRC = %08lx\n", PIXCLKSRC); ++ s += sprintf(s, "CLKSLEEP = %08lx\n", CLKSLEEP); ++ s += sprintf(s, "COREPLL = %08lx\n", COREPLL); ++ s += sprintf(s, "DISPPLL = %08lx\n", DISPPLL); ++ s += sprintf(s, "PLLSTAT = %08lx\n", PLLSTAT); ++ s += sprintf(s, "VOVRCLK = %08lx\n", VOVRCLK); ++ s += sprintf(s, "PIXCLK = %08lx\n", PIXCLK); ++ s += sprintf(s, "MEMCLK = %08lx\n", MEMCLK); ++ s += sprintf(s, "M24CLK = %08lx\n", M24CLK); ++ s += sprintf(s, "MBXCLK = %08lx\n", MBXCLK); ++ s += sprintf(s, "SDCLK = %08lx\n", SDCLK); ++ s += sprintf(s, "PIXCLKDIV = %08lx\n", PIXCLKDIV); ++ return (s - buf); ++} ++ ++static ssize_t clock_store(struct class_device * subsys, const char * buf, size_t n) ++{ ++ return n; ++} ++ ++static struct class_device_attribute mbx_class_attrs[] = { ++ __ATTR(sysconf,0644,sysconf_show,sysconf_store), ++ __ATTR(gsctl,0644,gsctl_show,gsctl_store), ++ __ATTR(display,0644,display_show,display_store), ++ __ATTR(clock,0644,clock_show,clock_store), ++}; ++ ++ ++static void mbxfb_sysfs_register(struct fb_info *fbi) ++{ ++ int i; ++ for (i = 0; i < ARRAY_SIZE(mbx_class_attrs); i++) ++ class_device_create_file(fbi->class_device, ++ &mbx_class_attrs[i]); ++} +diff --git a/drivers/video/mbx/reg_bits.h b/drivers/video/mbx/reg_bits.h +new file mode 100644 +index 0000000..be152f6 +--- /dev/null ++++ b/drivers/video/mbx/reg_bits.h +@@ -0,0 +1,489 @@ ++#ifndef __REG_BITS_2700G_ ++#define __REG_BITS_2700G_ ++ ++/* /\* System Configuration Registers (0x03FE_0000 0x03FE_0010) *\/ */ ++/* #define SYSCFG __REG_2700G(0x03FE0000) */ ++/* #define PFBASE __REG_2700G(0x03FE0004) */ ++/* #define PFCEIL __REG_2700G(0x03FE0008) */ ++/* #define POLLFLAG __REG_2700G(0x03FE000C) */ ++ ++#define SYSRST_RST (1 << 0) ++ ++/* /\* Interrupt Control Registers (0x03FE_0014 0x03FE_002F) *\/ */ ++/* #define NINTPW __REG_2700G(0x03FE0014) */ ++/* #define MINTENABLE __REG_2700G(0x03FE0018) */ ++/* #define MINTSTAT __REG_2700G(0x03FE001C) */ ++/* #define SINTENABLE __REG_2700G(0x03FE0020) */ ++/* #define SINTSTAT __REG_2700G(0x03FE0024) */ ++/* #define SINTCLR __REG_2700G(0x03FE0028) */ ++ ++/* SYSCLKSRC - SYSCLK Source Control Register */ ++#define SYSCLKSRC_SEL Fld(2,0) ++#define SYSCLKSRC_REF ((0x0) << FShft(SYSCLKSRC_SEL)) ++#define SYSCLKSRC_PLL_1 ((0x1) << FShft(SYSCLKSRC_SEL)) ++#define SYSCLKSRC_PLL_2 ((0x2) << FShft(SYSCLKSRC_SEL)) ++ ++/* PIXCLKSRC - PIXCLK Source Control Register */ ++#define PIXCLKSRC_SEL Fld(2,0) ++#define PIXCLKSRC_REF ((0x0) << FShft(PIXCLKSRC_SEL)) ++#define PIXCLKSRC_PLL_1 ((0x1) << FShft(PIXCLKSRC_SEL)) ++#define PIXCLKSRC_PLL_2 ((0x2) << FShft(PIXCLKSRC_SEL)) ++ ++/* Clock Disable Register */ ++#define CLKSLEEP_SLP (1 << 0) ++ ++/* Core PLL Control Register */ ++#define CORE_PLL_M Fld(6,7) ++#define Core_Pll_M(x) ((x) << FShft(CORE_PLL_M)) ++#define CORE_PLL_N Fld(3,4) ++#define Core_Pll_N(x) ((x) << FShft(CORE_PLL_N)) ++#define CORE_PLL_P Fld(3,1) ++#define Core_Pll_P(x) ((x) << FShft(CORE_PLL_P)) ++#define CORE_PLL_EN (1 << 0) ++ ++/* Display PLL Control Register */ ++#define DISP_PLL_M Fld(6,7) ++#define Disp_Pll_M(x) ((x) << FShft(DISP_PLL_M)) ++#define DISP_PLL_N Fld(3,4) ++#define Disp_Pll_N(x) ((x) << FShft(DISP_PLL_N)) ++#define DISP_PLL_P Fld(3,1) ++#define Disp_Pll_P(x) ((x) << FShft(DISP_PLL_P)) ++#define DISP_PLL_EN (1 << 0) ++ ++/* PLL status register */ ++#define PLLSTAT_CORE_PLL_LOST_L (1 << 3) ++#define PLLSTAT_CORE_PLL_LSTS (1 << 2) ++#define PLLSTAT_DISP_PLL_LOST_L (1 << 1) ++#define PLLSTAT_DISP_PLL_LSTS (1 << 0) ++ ++/* Video and scale clock control register */ ++#define VOVRCLK_EN (1 << 0) ++ ++/* Pixel clock control register */ ++#define PIXCLK_EN (1 << 0) ++ ++/* Memory clock control register */ ++#define MEMCLK_EN (1 << 0) ++ ++/* MBX clock control register */ ++#define MBXCLK_DIV Fld(2,2) ++#define MBXCLK_DIV_1 ((0x0) << FShft(MBXCLK_DIV)) ++#define MBXCLK_DIV_2 ((0x1) << FShft(MBXCLK_DIV)) ++#define MBXCLK_DIV_3 ((0x2) << FShft(MBXCLK_DIV)) ++#define MBXCLK_DIV_4 ((0x3) << FShft(MBXCLK_DIV)) ++#define MBXCLK_EN Fld(2,0) ++#define MBXCLK_EN_NONE ((0x0) << FShft(MBXCLK_EN)) ++#define MBXCLK_EN_2D ((0x1) << FShft(MBXCLK_EN)) ++#define MBXCLK_EN_BOTH ((0x2) << FShft(MBXCLK_EN)) ++ ++/* M24 clock control register */ ++#define M24CLK_DIV Fld(2,1) ++#define M24CLK_DIV_1 ((0x0) << FShft(M24CLK_DIV)) ++#define M24CLK_DIV_2 ((0x1) << FShft(M24CLK_DIV)) ++#define M24CLK_DIV_3 ((0x2) << FShft(M24CLK_DIV)) ++#define M24CLK_DIV_4 ((0x3) << FShft(M24CLK_DIV)) ++#define M24CLK_EN (1 << 0) ++ ++/* SDRAM clock control register */ ++#define SDCLK_EN (1 << 0) ++ ++/* PixClk Divisor Register */ ++#define PIXCLKDIV_PD Fld(9,0) ++#define Pixclkdiv_Pd(x) ((x) << FShft(PIXCLKDIV_PD)) ++ ++/* LCD Config control register */ ++#define LCDCFG_IN_FMT Fld(3,28) ++#define Lcdcfg_In_Fmt(x) ((x) << FShft(LCDCFG_IN_FMT)) ++#define LCDCFG_LCD1DEN_POL (1 << 27) ++#define LCDCFG_LCD1FCLK_POL (1 << 26) ++#define LCDCFG_LCD1LCLK_POL (1 << 25) ++#define LCDCFG_LCD1D_POL (1 << 24) ++#define LCDCFG_LCD2DEN_POL (1 << 23) ++#define LCDCFG_LCD2FCLK_POL (1 << 22) ++#define LCDCFG_LCD2LCLK_POL (1 << 21) ++#define LCDCFG_LCD2D_POL (1 << 20) ++#define LCDCFG_LCD1_TS (1 << 19) ++#define LCDCFG_LCD1D_DS (1 << 18) ++#define LCDCFG_LCD1C_DS (1 << 17) ++#define LCDCFG_LCD1_IS_IN (1 << 16) ++#define LCDCFG_LCD2_TS (1 << 3) ++#define LCDCFG_LCD2D_DS (1 << 2) ++#define LCDCFG_LCD2C_DS (1 << 1) ++#define LCDCFG_LCD2_IS_IN (1 << 0) ++ ++/* On-Die Frame Buffer Power Control Register */ ++#define ODFBPWR_SLOW (1 << 2) ++#define ODFBPWR_MODE Fld(2,0) ++#define ODFBPWR_MODE_ACT ((0x0) << FShft(ODFBPWR_MODE)) ++#define ODFBPWR_MODE_ACT_LP ((0x1) << FShft(ODFBPWR_MODE)) ++#define ODFBPWR_MODE_SLEEP ((0x2) << FShft(ODFBPWR_MODE)) ++#define ODFBPWR_MODE_SHUTD ((0x3) << FShft(ODFBPWR_MODE)) ++ ++/* On-Die Frame Buffer Power State Status Register */ ++#define ODFBSTAT_ACT (1 << 2) ++#define ODFBSTAT_SLP (1 << 1) ++#define ODFBSTAT_SDN (1 << 0) ++ ++/* /\* GPIO Registers (0x03FE_006C 0x03FE_007F) *\/ */ ++/* #define GPIOCGF __REG_2700G(0x03FE006C) */ ++/* #define GPIOHI __REG_2700G(0x03FE0070) */ ++/* #define GPIOLO __REG_2700G(0x03FE0074) */ ++/* #define GPIOSTAT __REG_2700G(0x03FE0078) */ ++ ++/* /\* Pulse Width Modulator (PWM) Registers (0x03FE_0200 0x03FE_02FF) *\/ */ ++/* #define PWMRST __REG_2700G(0x03FE0200) */ ++/* #define PWMCFG __REG_2700G(0x03FE0204) */ ++/* #define PWM0DIV __REG_2700G(0x03FE0210) */ ++/* #define PWM0DUTY __REG_2700G(0x03FE0214) */ ++/* #define PWM0PER __REG_2700G(0x03FE0218) */ ++/* #define PWM1DIV __REG_2700G(0x03FE0220) */ ++/* #define PWM1DUTY __REG_2700G(0x03FE0224) */ ++/* #define PWM1PER __REG_2700G(0x03FE0228) */ ++ ++ ++/* LMRST - Local Memory (SDRAM) Reset */ ++#define LMRST_MC_RST (1 << 0) ++ ++/* LMCFG - Local Memory (SDRAM) Configuration Register */ ++#define LMCFG_LMC_DS (1 << 5) ++#define LMCFG_LMD_DS (1 << 4) ++#define LMCFG_LMA_DS (1 << 3) ++#define LMCFG_LMC_TS (1 << 2) ++#define LMCFG_LMD_TS (1 << 1) ++#define LMCFG_LMA_TS (1 << 0) ++ ++/* LMPWR - Local Memory (SDRAM) Power Control Register */ ++#define LMPWR_MC_PWR_CNT Fld(2,0) ++#define LMPWR_MC_PWR_ACT ((0x0) << FShft(LMPWR_MC_PWR_CNT)) /* Active */ ++#define LMPWR_MC_PWR_SRM ((0x1) << FShft(LMPWR_MC_PWR_CNT)) /* Self-refresh */ ++#define LMPWR_MC_PWR_DPD ((0x3) << FShft(LMPWR_MC_PWR_CNT)) /* deep power down */ ++ ++/* LMPWRSTAT - Local Memory (SDRAM) Power Status Register */ ++#define LMPWRSTAT_MC_PWR_CNT Fld(2,0) ++#define LMPWRSTAT_MC_PWR_ACT ((0x0) << FShft(LMPWRSTAT_MC_PWR_CNT)) /* Active */ ++#define LMPWRSTAT_MC_PWR_SRM ((0x1) << FShft(LMPWRSTAT_MC_PWR_CNT)) /* Self-refresh */ ++#define LMPWRSTAT_MC_PWR_DPD ((0x3) << FShft(LMPWRSTAT_MC_PWR_CNT)) /* deep power down */ ++ ++/* LMTYPE - Local Memory (SDRAM) Type Register */ ++#define LMTYPE_CASLAT Fld(3,10) ++#define LMTYPE_CASLAT_1 ((0x1) << FShft(LMTYPE_CASLAT)) ++#define LMTYPE_CASLAT_2 ((0x2) << FShft(LMTYPE_CASLAT)) ++#define LMTYPE_CASLAT_3 ((0x3) << FShft(LMTYPE_CASLAT)) ++#define LMTYPE_BKSZ Fld(2,8) ++#define LMTYPE_BKSZ_1 ((0x1) << FShft(LMTYPE_BKSZ)) ++#define LMTYPE_BKSZ_2 ((0x2) << FShft(LMTYPE_BKSZ)) ++#define LMTYPE_ROWSZ Fld(4,4) ++#define LMTYPE_ROWSZ_11 ((0xb) << FShft(LMTYPE_ROWSZ)) ++#define LMTYPE_ROWSZ_12 ((0xc) << FShft(LMTYPE_ROWSZ)) ++#define LMTYPE_ROWSZ_13 ((0xd) << FShft(LMTYPE_ROWSZ)) ++#define LMTYPE_COLSZ Fld(4,0) ++#define LMTYPE_COLSZ_7 ((0x7) << FShft(LMTYPE_COLSZ)) ++#define LMTYPE_COLSZ_8 ((0x8) << FShft(LMTYPE_COLSZ)) ++#define LMTYPE_COLSZ_9 ((0x9) << FShft(LMTYPE_COLSZ)) ++#define LMTYPE_COLSZ_10 ((0xa) << FShft(LMTYPE_COLSZ)) ++#define LMTYPE_COLSZ_11 ((0xb) << FShft(LMTYPE_COLSZ)) ++#define LMTYPE_COLSZ_12 ((0xc) << FShft(LMTYPE_COLSZ)) ++ ++/* LMTIM - Local Memory (SDRAM) Timing Register */ ++#define LMTIM_TRAS Fld(4,16) ++#define Lmtim_Tras(x) ((x) << FShft(LMTIM_TRAS)) ++#define LMTIM_TRP Fld(4,12) ++#define Lmtim_Trp(x) ((x) << FShft(LMTIM_TRP)) ++#define LMTIM_TRCD Fld(4,8) ++#define Lmtim_Trcd(x) ((x) << FShft(LMTIM_TRCD)) ++#define LMTIM_TRC Fld(4,4) ++#define Lmtim_Trc(x) ((x) << FShft(LMTIM_TRC)) ++#define LMTIM_TDPL Fld(4,0) ++#define Lmtim_Tdpl(x) ((x) << FShft(LMTIM_TDPL)) ++ ++/* LMREFRESH - Local Memory (SDRAM) tREF Control Register */ ++#define LMREFRESH_TREF Fld(2,0) ++#define Lmrefresh_Tref(x) ((x) << FShft(LMREFRESH_TREF)) ++ ++/* #define LMCEMR __REG_2700G(0x03FE1010) */ ++/* #define LMPROTMIN __REG_2700G(0x03FE1020) */ ++/* #define LMPROTMAX __REG_2700G(0x03FE1024) */ ++/* #define LMPROTCFG __REG_2700G(0x03FE1028) */ ++/* #define LMPROTERR __REG_2700G(0x03FE102C) */ ++ ++/* GSCTRL - Graphics surface control register */ ++#define GSCTRL_LUT_EN (1 << 31) ++#define GSCTRL_GPIXFMT Fld(4,27) ++#define GSCTRL_GPIXFMT_INDEXED ((0x0) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GPIXFMT_ARGB4444 ((0x4) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GPIXFMT_ARGB1555 ((0x5) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GPIXFMT_RGB888 ((0x6) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GPIXFMT_RGB565 ((0x7) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GPIXFMT_ARGB8888 ((0x8) << FShft(GSCTRL_GPIXFMT)) ++#define GSCTRL_GAMMA_EN (1 << 26) ++ ++#define GSCTRL_GSWIDTH Fld(11,11) ++#define Gsctrl_Width(Pixel) /* Display Width [1..2048 pix.] */ \ ++ (((Pixel) - 1) << FShft(GSCTRL_GSWIDTH)) ++ ++#define GSCTRL_GSHEIGHT Fld(11,0) ++#define Gsctrl_Height(Pixel) /* Display Height [1..2048 pix.] */ \ ++ (((Pixel) - 1) << FShft(GSCTRL_GSHEIGHT)) ++ ++/* GBBASE fileds */ ++#define GBBASE_GLALPHA Fld(8,24) ++#define Gbbase_Glalpha(x) ((x) << FShft(GBBASE_GLALPHA)) ++ ++#define GBBASE_COLKEY Fld(24,0) ++#define Gbbase_Colkey(x) ((x) << FShft(GBBASE_COLKEY)) ++ ++/* GDRCTRL fields */ ++#define GDRCTRL_PIXDBL (1 << 31) ++#define GDRCTRL_PIXHLV (1 << 30) ++#define GDRCTRL_LNDBL (1 << 29) ++#define GDRCTRL_LNHLV (1 << 28) ++#define GDRCTRL_COLKEYM Fld(24,0) ++#define Gdrctrl_Colkeym(x) ((x) << FShft(GDRCTRL_COLKEYM)) ++ ++/* GSCADR graphics stream control address register fields */ ++#define GSCADR_STR_EN (1 << 31) ++#define GSCADR_COLKEY_EN (1 << 30) ++#define GSCADR_COLKEYSCR (1 << 29) ++#define GSCADR_BLEND_M Fld(2,27) ++#define GSCADR_BLEND_NONE ((0x0) << FShft(GSCADR_BLEND_M)) ++#define GSCADR_BLEND_INV ((0x1) << FShft(GSCADR_BLEND_M)) ++#define GSCADR_BLEND_GLOB ((0x2) << FShft(GSCADR_BLEND_M)) ++#define GSCADR_BLEND_PIX ((0x3) << FShft(GSCADR_BLEND_M)) ++#define GSCADR_BLEND_POS Fld(2,24) ++#define GSCADR_BLEND_GFX ((0x0) << FShft(GSCADR_BLEND_POS)) ++#define GSCADR_BLEND_VID ((0x1) << FShft(GSCADR_BLEND_POS)) ++#define GSCADR_BLEND_CUR ((0x2) << FShft(GSCADR_BLEND_POS)) ++#define GSCADR_GBASE_ADR Fld(23,0) ++#define Gscadr_Gbase_Adr(x) ((x) << FShft(GSCADR_GBASE_ADR)) ++ ++/* GSADR graphics stride address register fields */ ++#define GSADR_SRCSTRIDE Fld(10,22) ++#define Gsadr_Srcstride(x) ((x) << FShft(GSADR_SRCSTRIDE)) ++#define GSADR_XSTART Fld(11,11) ++#define Gsadr_Xstart(x) ((x) << FShft(GSADR_XSTART)) ++#define GSADR_YSTART Fld(11,0) ++#define Gsadr_Ystart(y) ((y) << FShft(GSADR_YSTART)) ++ ++/* GPLUT graphics palette register fields */ ++#define GPLUT_LUTADR Fld(8,24) ++#define Gplut_Lutadr(x) ((x) << FShft(GPLUT_LUTADR)) ++#define GPLUT_LUTDATA Fld(24,0) ++#define Gplut_Lutdata(x) ((x) << FShft(GPLUT_LUTDATA)) ++ ++/* #define VSCTRL __REG_2700G(0x03FE2004) */ ++/* #define VBBASE __REG_2700G(0x03FE2024) */ ++/* #define VCMSK __REG_2700G(0x03FE2044) */ ++/* #define VSCADR __REG_2700G(0x03FE2064) */ ++/* #define VUBASE __REG_2700G(0x03FE2084) */ ++/* #define VVBASE __REG_2700G(0x03FE20A4) */ ++/* #define VSADR __REG_2700G(0x03FE20C4) */ ++ ++ ++/* HCCTRL - Hardware Cursor Register fields */ ++#define HCCTRL_CUR_EN (1 << 31) ++#define HCCTRL_COLKEY_EN (1 << 29) ++#define HCCTRL_COLKEYSRC (1 << 28) ++#define HCCTRL_BLEND_M Fld(2,26) ++#define HCCTRL_BLEND_NONE ((0x0) << FShft(HCCTRL_BLEND_M)) ++#define HCCTRL_BLEND_INV ((0x1) << FShft(HCCTRL_BLEND_M)) ++#define HCCTRL_BLEND_GLOB ((0x2) << FShft(HCCTRL_BLEND_M)) ++#define HCCTRL_BLEND_PIX ((0x3) << FShft(HCCTRL_BLEND_M)) ++#define HCCTRL_CPIXFMT Fld(3,23) ++#define HCCTRL_CPIXFMT_RGB332 ((0x3) << FShft(HCCTRL_CPIXFMT)) ++#define HCCTRL_CPIXFMT_ARGB4444 ((0x4) << FShft(HCCTRL_CPIXFMT)) ++#define HCCTRL_CPIXFMT_ARGB1555 ((0x5) << FShft(HCCTRL_CPIXFMT)) ++#define HCCTRL_CBASE_ADR Fld(23,0) ++#define Hcctrl_Cbase_Adr(x) ((x) << FShft(HCCTRL_CBASE_ADR)) ++ ++/* HCSIZE Hardware Cursor Size Register fields */ ++#define HCSIZE_BLEND_POS Fld(2,29) ++#define HCSIZE_BLEND_GFX ((0x0) << FShft(HCSIZE_BLEND_POS)) ++#define HCSIZE_BLEND_VID ((0x1) << FShft(HCSIZE_BLEND_POS)) ++#define HCSIZE_BLEND_CUR ((0x2) << FShft(HCSIZE_BLEND_POS)) ++#define HCSIZE_CWIDTH Fld(3,16) ++#define Hcsize_Cwidth(x) ((x) << FShft(HCSIZE_CWIDTH)) ++#define HCSIZE_CHEIGHT Fld(3,0) ++#define Hcsize_Cheight(x) ((x) << FShft(HCSIZE_CHEIGHT)) ++ ++/* HCPOS Hardware Cursor Position Register fields */ ++#define HCPOS_SWITCHSRC (1 << 30) ++#define HCPOS_CURBLINK Fld(6,24) ++#define Hcpos_Curblink(x) ((x) << FShft(HCPOS_CURBLINK)) ++#define HCPOS_XSTART Fld(12,12) ++#define Hcpos_Xstart(x) ((x) << FShft(HCPOS_XSTART)) ++#define HCPOS_YSTART Fld(12,0) ++#define Hcpos_Ystart(y) ((y) << FShft(HCPOS_YSTART)) ++ ++/* HCBADR Hardware Cursor Blend Address Register */ ++#define HCBADR_GLALPHA Fld(8,24) ++#define Hcbadr_Glalpha(x) ((x) << FShft(HCBADR_GLALPHA)) ++#define HCBADR_COLKEY Fld(24,0) ++#define Hcbadr_Colkey(x) ((x) << FShft(HCBADR_COLKEY)) ++ ++/* HCCKMSK - Hardware Cursor Color Key Mask Register */ ++#define HCCKMSK_COLKEY_M Fld(24,0) ++#define Hcckmsk_Colkey_M(x) ((x) << FShft(HCCKMSK_COLKEY_M)) ++ ++/* DSCTRL - Display sync control register */ ++#define DSCTRL_SYNCGEN_EN (1 << 31) ++#define DSCTRL_DPL_RST (1 << 29) ++#define DSCTRL_PWRDN_M (1 << 28) ++#define DSCTRL_UPDSYNCCNT (1 << 26) ++#define DSCTRL_UPDINTCNT (1 << 25) ++#define DSCTRL_UPDCNT (1 << 24) ++#define DSCTRL_UPDWAIT Fld(4,16) ++#define Dsctrl_Updwait(x) ((x) << FShft(DSCTRL_UPDWAIT)) ++#define DSCTRL_CLKPOL (1 << 11) ++#define DSCTRL_CSYNC_EN (1 << 10) ++#define DSCTRL_VS_SLAVE (1 << 7) ++#define DSCTRL_HS_SLAVE (1 << 6) ++#define DSCTRL_BLNK_POL (1 << 5) ++#define DSCTRL_BLNK_DIS (1 << 4) ++#define DSCTRL_VS_POL (1 << 3) ++#define DSCTRL_VS_DIS (1 << 2) ++#define DSCTRL_HS_POL (1 << 1) ++#define DSCTRL_HS_DIS (1 << 0) ++ ++/* DHT01 - Display horizontal timing register 01 */ ++#define DHT01_HBPS Fld(12,16) ++#define Dht01_Hbps(x) ((x) << FShft(DHT01_HBPS)) ++#define DHT01_HT Fld(12,0) ++#define Dht01_Ht(x) ((x) << FShft(DHT01_HT)) ++ ++/* DHT02 - Display horizontal timing register 02 */ ++#define DHT02_HAS Fld(12,16) ++#define Dht02_Has(x) ((x) << FShft(DHT02_HAS)) ++#define DHT02_HLBS Fld(12,0) ++#define Dht02_Hlbs(x) ((x) << FShft(DHT02_HLBS)) ++ ++/* DHT03 - Display horizontal timing register 03 */ ++#define DHT03_HFPS Fld(12,16) ++#define Dht03_Hfps(x) ((x) << FShft(DHT03_HFPS)) ++#define DHT03_HRBS Fld(12,0) ++#define Dht03_Hrbs(x) ((x) << FShft(DHT03_HRBS)) ++ ++/* DVT01 - Display vertical timing register 01 */ ++#define DVT01_VBPS Fld(12,16) ++#define Dvt01_Vbps(x) ((x) << FShft(DVT01_VBPS)) ++#define DVT01_VT Fld(12,0) ++#define Dvt01_Vt(x) ((x) << FShft(DVT01_VT)) ++ ++/* DVT02 - Display vertical timing register 02 */ ++#define DVT02_VAS Fld(12,16) ++#define Dvt02_Vas(x) ((x) << FShft(DVT02_VAS)) ++#define DVT02_VTBS Fld(12,0) ++#define Dvt02_Vtbs(x) ((x) << FShft(DVT02_VTBS)) ++ ++/* DVT03 - Display vertical timing register 03 */ ++#define DVT03_VFPS Fld(12,16) ++#define Dvt03_Vfps(x) ((x) << FShft(DVT03_VFPS)) ++#define DVT03_VBBS Fld(12,0) ++#define Dvt03_Vbbs(x) ((x) << FShft(DVT03_VBBS)) ++ ++/* DVECTRL - display vertical event control register */ ++#define DVECTRL_VEVENT Fld(12,16) ++#define Dvectrl_Vevent(x) ((x) << FShft(DVECTRL_VEVENT)) ++#define DVECTRL_VFETCH Fld(12,0) ++#define Dvectrl_Vfetch(x) ((x) << FShft(DVECTRL_VFETCH)) ++ ++/* DHDET - display horizontal DE timing register */ ++#define DHDET_HDES Fld(12,16) ++#define Dhdet_Hdes(x) ((x) << FShft(DHDET_HDES)) ++#define DHDET_HDEF Fld(12,0) ++#define Dhdet_Hdef(x) ((x) << FShft(DHDET_HDEF)) ++ ++/* DVDET - display vertical DE timing register */ ++#define DVDET_VDES Fld(12,16) ++#define Dvdet_Vdes(x) ((x) << FShft(DVDET_VDES)) ++#define DVDET_VDEF Fld(12,0) ++#define Dvdet_Vdef(x) ((x) << FShft(DVDET_VDEF)) ++ ++/* DODMSK - display output data mask register */ ++#define DODMSK_MASK_LVL (1 << 31) ++#define DODMSK_BLNK_LVL (1 << 30) ++#define DODMSK_MASK_B Fld(8,16) ++#define Dodmsk_Mask_B(x) ((x) << FShft(DODMSK_MASK_B)) ++#define DODMSK_MASK_G Fld(8,8) ++#define Dodmsk_Mask_G(x) ((x) << FShft(DODMSK_MASK_G)) ++#define DODMSK_MASK_R Fld(8,0) ++#define Dodmsk_Mask_R(x) ((x) << FShft(DODMSK_MASK_R)) ++ ++/* DBCOL - display border color control register */ ++#define DBCOL_BORDCOL Fld(24,0) ++#define Dbcol_Bordcol(x) ((x) << FShft(DBCOL_BORDCOL)) ++ ++/* DVLNUM - display vertical line number register */ ++#define DVLNUM_VLINE Fld(12,0) ++#define Dvlnum_Vline(x) ((x) << FShft(DVLNUM_VLINE)) ++ ++/* DMCTRL - Display Memory Control Register */ ++#define DMCTRL_MEM_REF Fld(2,30) ++#define DMCTRL_MEM_REF_ACT ((0x0) << FShft(DMCTRL_MEM_REF)) ++#define DMCTRL_MEM_REF_HB ((0x1) << FShft(DMCTRL_MEM_REF)) ++#define DMCTRL_MEM_REF_VB ((0x2) << FShft(DMCTRL_MEM_REF)) ++#define DMCTRL_MEM_REF_BOTH ((0x3) << FShft(DMCTRL_MEM_REF)) ++#define DMCTRL_UV_THRHLD Fld(6,24) ++#define Dmctrl_Uv_Thrhld(x) ((x) << FShft(DMCTRL_UV_THRHLD)) ++#define DMCTRL_V_THRHLD Fld(7,16) ++#define Dmctrl_V_Thrhld(x) ((x) << FShft(DMCTRL_V_THRHLD)) ++#define DMCTRL_D_THRHLD Fld(7,8) ++#define Dmctrl_D_Thrhld(x) ((x) << FShft(DMCTRL_D_THRHLD)) ++#define DMCTRL_BURSTLEN Fld(6,0) ++#define Dmctrl_Burstlen(x) ((x) << FShft(DMCTRL_BURSTLEN)) ++ ++ ++/* DLSTS - display load status register */ ++#define DLSTS_RLD_ADONE (1 << 23) ++/* #define DLSTS_RLD_ADOUT Fld(23,0) */ ++ ++/* DLLCTRL - display list load control register */ ++#define DLLCTRL_RLD_ADRLN Fld(8,24) ++#define Dllctrl_Rld_Adrln(x) ((x) << FShft(DLLCTRL_RLD_ADRLN)) ++ ++/* #define DSIG __REG_2700G(0x03FE2184) */ ++/* #define DINTRS __REG_2700G(0x03FE2178) */ ++/* #define DINTRE __REG_2700G(0x03FE217C) */ ++/* #define DINTRCNT __REG_2700G(0x03FE2180) */ ++/* #define DUCTRL __REG_2700G(0x03FE230C) */ ++ ++/* BGCOLOR - background color control register */ ++/* #define BGCOLOR __REG_2700G(0x03FE2174) */ ++ ++/* #define CLIPCTRL __REG_2700G(0x03FE218C) */ ++/* SPOCTRL - Scale Pitch/Order Control Register */ ++#define SPOCTRL_H_SC_BP (1 << 31) ++#define SPOCTRL_V_SC_BP (1 << 30) ++#define SPOCTRL_HV_SC_OR (1 << 29) ++#define SPOCTRL_VS_UR_C (1 << 27) ++#define SPOCTRL_VORDER Fld(2,16) ++#define SPOCTRL_VORDER_1TAP ((0x0) << FShft(SPOCTRL_VORDER)) ++#define SPOCTRL_VORDER_2TAP ((0x1) << FShft(SPOCTRL_VORDER)) ++#define SPOCTRL_VORDER_4TAP ((0x3) << FShft(SPOCTRL_VORDER)) ++#define SPOCTRL_VPITCH Fld(16,0) ++#define Spoctrl_Vpitch(x) ((x) << FShft(SPOCTRL_VPITCH)) ++ ++/* #define SVCTRL __REG_2700G(0x03FE2194) */ ++ ++/* /\* 0x03FE_2198 *\/ */ ++/* /\* 0x03FE_21A8 VSCOEFF[0:4] Video Scalar Vertical Coefficient [0:4] 4.14.5 *\/ */ ++ ++/* #define SHCTRL __REG_2700G(0x03FE21B0) */ ++ ++/* /\* 0x03FE_21B4 *\/ */ ++/* /\* 0x03FE_21D4 HSCOEFF[0:8] Video Scalar Horizontal Coefficient [0:8] 4.14.7 *\/ */ ++ ++/* #define SSSIZE __REG_2700G(0x03FE21D8) */ ++ ++/* /\* 0x03FE_2200 *\/ */ ++/* /\* 0x03FE_2240 VIDGAM[0:16] Video Gamma LUT Index [0:16] 4.15.2 *\/ */ ++ ++/* /\* 0x03FE_2250 *\/ */ ++/* /\* 0x03FE_2290 GFXGAM[0:16] Graphics Gamma LUT Index [0:16] 4.15.3 *\/ */ ++ ++/* #define CSC01 __REG_2700G(0x03FE2330) */ ++/* #define CSC02 __REG_2700G(0x03FE2334) */ ++/* #define CSC03 __REG_2700G(0x03FE2338) */ ++/* #define CSC04 __REG_2700G(0x03FE233C) */ ++/* #define CSC05 __REG_2700G(0x03FE2340) */ ++ ++#endif /* __REG_BITS_2700G_ */ +diff --git a/drivers/video/mbx/regs.h b/drivers/video/mbx/regs.h +new file mode 100644 +index 0000000..edf0f14 +--- /dev/null ++++ b/drivers/video/mbx/regs.h +@@ -0,0 +1,192 @@ ++#ifndef __REGS_2700G_ ++#define __REGS_2700G_ ++ ++/* extern unsigned long virt_base_2700; */ ++#define __REG_2700G(x) (*(volatile unsigned long*)((x)+virt_base_2700)) ++ ++/* System Configuration Registers (0x0000_0000 0x0000_0010) */ ++#define SYSCFG __REG_2700G(0x00000000) ++#define PFBASE __REG_2700G(0x00000004) ++#define PFCEIL __REG_2700G(0x00000008) ++#define POLLFLAG __REG_2700G(0x0000000c) ++#define SYSRST __REG_2700G(0x00000010) ++ ++/* Interrupt Control Registers (0x0000_0014 0x0000_002F) */ ++#define NINTPW __REG_2700G(0x00000014) ++#define MINTENABLE __REG_2700G(0x00000018) ++#define MINTSTAT __REG_2700G(0x0000001c) ++#define SINTENABLE __REG_2700G(0x00000020) ++#define SINTSTAT __REG_2700G(0x00000024) ++#define SINTCLR __REG_2700G(0x00000028) ++ ++/* Clock Control Registers (0x0000_002C 0x0000_005F) */ ++#define SYSCLKSRC __REG_2700G(0x0000002c) ++#define PIXCLKSRC __REG_2700G(0x00000030) ++#define CLKSLEEP __REG_2700G(0x00000034) ++#define COREPLL __REG_2700G(0x00000038) ++#define DISPPLL __REG_2700G(0x0000003c) ++#define PLLSTAT __REG_2700G(0x00000040) ++#define VOVRCLK __REG_2700G(0x00000044) ++#define PIXCLK __REG_2700G(0x00000048) ++#define MEMCLK __REG_2700G(0x0000004c) ++#define M24CLK __REG_2700G(0x00000054) ++#define MBXCLK __REG_2700G(0x00000054) ++#define SDCLK __REG_2700G(0x00000058) ++#define PIXCLKDIV __REG_2700G(0x0000005c) ++ ++/* LCD Port Control Register (0x0000_0060 0x0000_006F) */ ++#define LCD_CONFIG __REG_2700G(0x00000060) ++ ++/* On-Die Frame Buffer Registers (0x0000_0064 0x0000_006B) */ ++#define ODFBPWR __REG_2700G(0x00000064) ++#define ODFBSTAT __REG_2700G(0x00000068) ++ ++/* GPIO Registers (0x0000_006C 0x0000_007F) */ ++#define GPIOCGF __REG_2700G(0x0000006c) ++#define GPIOHI __REG_2700G(0x00000070) ++#define GPIOLO __REG_2700G(0x00000074) ++#define GPIOSTAT __REG_2700G(0x00000078) ++ ++/* Pulse Width Modulator (PWM) Registers (0x0000_0200 0x0000_02FF) */ ++#define PWMRST __REG_2700G(0x00000200) ++#define PWMCFG __REG_2700G(0x00000204) ++#define PWM0DIV __REG_2700G(0x00000210) ++#define PWM0DUTY __REG_2700G(0x00000214) ++#define PWM0PER __REG_2700G(0x00000218) ++#define PWM1DIV __REG_2700G(0x00000220) ++#define PWM1DUTY __REG_2700G(0x00000224) ++#define PWM1PER __REG_2700G(0x00000228) ++ ++/* Identification (ID) Registers (0x0000_0300 0x0000_0FFF) */ ++#define ID __REG_2700G(0x00000FF0) ++ ++/* Local Memory (SDRAM) Interface Registers (0x0000_1000 0x0000_1FFF) */ ++#define LMRST __REG_2700G(0x00001000) ++#define LMCFG __REG_2700G(0x00001004) ++#define LMPWR __REG_2700G(0x00001008) ++#define LMPWRSTAT __REG_2700G(0x0000100c) ++#define LMCEMR __REG_2700G(0x00001010) ++#define LMTYPE __REG_2700G(0x00001014) ++#define LMTIM __REG_2700G(0x00001018) ++#define LMREFRESH __REG_2700G(0x0000101c) ++#define LMPROTMIN __REG_2700G(0x00001020) ++#define LMPROTMAX __REG_2700G(0x00001024) ++#define LMPROTCFG __REG_2700G(0x00001028) ++#define LMPROTERR __REG_2700G(0x0000102c) ++ ++/* Plane Controller Registers (0x0000_2000 0x0000_2FFF) */ ++#define GSCTRL __REG_2700G(0x00002000) ++#define VSCTRL __REG_2700G(0x00002004) ++#define GBBASE __REG_2700G(0x00002020) ++#define VBBASE __REG_2700G(0x00002024) ++#define GDRCTRL __REG_2700G(0x00002040) ++#define VCMSK __REG_2700G(0x00002044) ++#define GSCADR __REG_2700G(0x00002060) ++#define VSCADR __REG_2700G(0x00002064) ++#define VUBASE __REG_2700G(0x00002084) ++#define VVBASE __REG_2700G(0x000020a4) ++#define GSADR __REG_2700G(0x000020c0) ++#define VSADR __REG_2700G(0x000020c4) ++#define HCCTRL __REG_2700G(0x00002100) ++#define HCSIZE __REG_2700G(0x00002110) ++#define HCPOS __REG_2700G(0x00002120) ++#define HCBADR __REG_2700G(0x00002130) ++#define HCCKMSK __REG_2700G(0x00002140) ++#define GPLUT __REG_2700G(0x00002150) ++#define DSCTRL __REG_2700G(0x00002154) ++#define DHT01 __REG_2700G(0x00002158) ++#define DHT02 __REG_2700G(0x0000215c) ++#define DHT03 __REG_2700G(0x00002160) ++#define DVT01 __REG_2700G(0x00002164) ++#define DVT02 __REG_2700G(0x00002168) ++#define DVT03 __REG_2700G(0x0000216c) ++#define DBCOL __REG_2700G(0x00002170) ++#define BGCOLOR __REG_2700G(0x00002174) ++#define DINTRS __REG_2700G(0x00002178) ++#define DINTRE __REG_2700G(0x0000217c) ++#define DINTRCNT __REG_2700G(0x00002180) ++#define DSIG __REG_2700G(0x00002184) ++#define DMCTRL __REG_2700G(0x00002188) ++#define CLIPCTRL __REG_2700G(0x0000218c) ++#define SPOCTRL __REG_2700G(0x00002190) ++#define SVCTRL __REG_2700G(0x00002194) ++ ++/* 0x0000_2198 */ ++/* 0x0000_21A8 VSCOEFF[0:4] Video Scalar Vertical Coefficient [0:4] 4.14.5 */ ++#define VSCOEFF0 __REG_2700G(0x00002198) ++#define VSCOEFF1 __REG_2700G(0x0000219c) ++#define VSCOEFF2 __REG_2700G(0x000021a0) ++#define VSCOEFF3 __REG_2700G(0x000021a4) ++#define VSCOEFF4 __REG_2700G(0x000021a8) ++ ++#define SHCTRL __REG_2700G(0x000021b0) ++ ++/* 0x0000_21B4 */ ++/* 0x0000_21D4 HSCOEFF[0:8] Video Scalar Horizontal Coefficient [0:8] 4.14.7 */ ++#define HSCOEFF0 __REG_2700G(0x000021b4) ++#define HSCOEFF1 __REG_2700G(0x000021b8) ++#define HSCOEFF2 __REG_2700G(0x000021bc) ++#define HSCOEFF3 __REG_2700G(0x000021b0) ++#define HSCOEFF4 __REG_2700G(0x000021c4) ++#define HSCOEFF5 __REG_2700G(0x000021c8) ++#define HSCOEFF6 __REG_2700G(0x000021cc) ++#define HSCOEFF7 __REG_2700G(0x000021d0) ++#define HSCOEFF8 __REG_2700G(0x000021d4) ++ ++#define SSSIZE __REG_2700G(0x000021D8) ++ ++/* 0x0000_2200 */ ++/* 0x0000_2240 VIDGAM[0:16] Video Gamma LUT Index [0:16] 4.15.2 */ ++#define VIDGAM0 __REG_2700G(0x00002200) ++#define VIDGAM1 __REG_2700G(0x00002204) ++#define VIDGAM2 __REG_2700G(0x00002208) ++#define VIDGAM3 __REG_2700G(0x0000220c) ++#define VIDGAM4 __REG_2700G(0x00002210) ++#define VIDGAM5 __REG_2700G(0x00002214) ++#define VIDGAM6 __REG_2700G(0x00002218) ++#define VIDGAM7 __REG_2700G(0x0000221c) ++#define VIDGAM8 __REG_2700G(0x00002220) ++#define VIDGAM9 __REG_2700G(0x00002224) ++#define VIDGAM10 __REG_2700G(0x00002228) ++#define VIDGAM11 __REG_2700G(0x0000222c) ++#define VIDGAM12 __REG_2700G(0x00002230) ++#define VIDGAM13 __REG_2700G(0x00002234) ++#define VIDGAM14 __REG_2700G(0x00002238) ++#define VIDGAM15 __REG_2700G(0x0000223c) ++#define VIDGAM16 __REG_2700G(0x00002240) ++ ++/* 0x0000_2250 */ ++/* 0x0000_2290 GFXGAM[0:16] Graphics Gamma LUT Index [0:16] 4.15.3 */ ++#define GFXGAM0 __REG_2700G(0x00002250) ++#define GFXGAM1 __REG_2700G(0x00002254) ++#define GFXGAM2 __REG_2700G(0x00002258) ++#define GFXGAM3 __REG_2700G(0x0000225c) ++#define GFXGAM4 __REG_2700G(0x00002260) ++#define GFXGAM5 __REG_2700G(0x00002264) ++#define GFXGAM6 __REG_2700G(0x00002268) ++#define GFXGAM7 __REG_2700G(0x0000226c) ++#define GFXGAM8 __REG_2700G(0x00002270) ++#define GFXGAM9 __REG_2700G(0x00002274) ++#define GFXGAM10 __REG_2700G(0x00002278) ++#define GFXGAM11 __REG_2700G(0x0000227c) ++#define GFXGAM12 __REG_2700G(0x00002280) ++#define GFXGAM13 __REG_2700G(0x00002284) ++#define GFXGAM14 __REG_2700G(0x00002288) ++#define GFXGAM15 __REG_2700G(0x0000228c) ++#define GFXGAM16 __REG_2700G(0x00002290) ++ ++#define DLSTS __REG_2700G(0x00002300) ++#define DLLCTRL __REG_2700G(0x00002304) ++#define DVLNUM __REG_2700G(0x00002308) ++#define DUCTRL __REG_2700G(0x0000230c) ++#define DVECTRL __REG_2700G(0x00002310) ++#define DHDET __REG_2700G(0x00002314) ++#define DVDET __REG_2700G(0x00002318) ++#define DODMSK __REG_2700G(0x0000231c) ++#define CSC01 __REG_2700G(0x00002330) ++#define CSC02 __REG_2700G(0x00002334) ++#define CSC03 __REG_2700G(0x00002338) ++#define CSC04 __REG_2700G(0x0000233c) ++#define CSC05 __REG_2700G(0x00002340) ++ ++#endif /* __REGS_2700G_ */ +diff --git a/include/linux/mbxfb.h b/include/linux/mbxfb.h +new file mode 100644 +index 0000000..3bde0f5 +--- /dev/null ++++ b/include/linux/mbxfb.h +@@ -0,0 +1,28 @@ ++#ifndef __MBX_FB_H ++#define __MBX_FB_H ++ ++struct mbxfb_val { ++ unsigned int defval; ++ unsigned int min; ++ unsigned int max; ++}; ++ ++struct fb_info; ++ ++struct mbxfb_platform_data { ++ /* Screen info */ ++ struct mbxfb_val xres; ++ struct mbxfb_val yres; ++ struct mbxfb_val bpp; ++ ++ /* Memory info */ ++ unsigned long memsize; /* if 0 use ODFB? */ ++ unsigned long timings1; ++ unsigned long timings2; ++ unsigned long timings3; ++ ++ int (*probe)(struct fb_info *fb); ++ int (*remove)(struct fb_info *fb); ++}; ++ ++#endif /* __MBX_FB_H */ diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/defconfig b/openembedded/packages/linux/linux-cmx270-2.6.17/defconfig new file mode 100644 index 0000000000..621fae7027 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/defconfig @@ -0,0 +1,1169 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.6.17 +# Tue Jul 18 15:06:47 2006 +# +CONFIG_ARM=y +CONFIG_MMU=y +CONFIG_RWSEM_GENERIC_SPINLOCK=y +CONFIG_GENERIC_HWEIGHT=y +CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_MTD_XIP=y +CONFIG_VECTORS_BASE=0xffff0000 + +# +# Code maturity level options +# +CONFIG_EXPERIMENTAL=y +CONFIG_BROKEN_ON_SMP=y +CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# +CONFIG_LOCALVERSION="-8d" +CONFIG_LOCALVERSION_AUTO=y +CONFIG_SWAP=y +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +# CONFIG_BSD_PROCESS_ACCT is not set +CONFIG_SYSCTL=y +# CONFIG_AUDIT is not set +# CONFIG_IKCONFIG is not set +# CONFIG_RELAY is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_UID16=y +# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set +# CONFIG_EMBEDDED is not set +CONFIG_KALLSYMS=y +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KALLSYMS_EXTRA_PASS is not set +CONFIG_HOTPLUG=y +CONFIG_PRINTK=y +CONFIG_BUG=y +CONFIG_ELF_CORE=y +CONFIG_BASE_FULL=y +CONFIG_FUTEX=y +CONFIG_EPOLL=y +CONFIG_SHMEM=y +CONFIG_SLAB=y +# CONFIG_TINY_SHMEM is not set +CONFIG_BASE_SMALL=0 +# CONFIG_SLOB is not set + +# +# Loadable module support +# +CONFIG_MODULES=y + +# +# Block layer +# +# CONFIG_BLK_DEV_IO_TRACE is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y +CONFIG_DEFAULT_AS=y +# CONFIG_DEFAULT_DEADLINE is not set +# CONFIG_DEFAULT_CFQ is not set +# CONFIG_DEFAULT_NOOP is not set +CONFIG_DEFAULT_IOSCHED="anticipatory" + +# +# System Type +# +# CONFIG_ARCH_CLPS7500 is not set +# CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set +# CONFIG_ARCH_EBSA110 is not set +# CONFIG_ARCH_EP93XX is not set +# CONFIG_ARCH_FOOTBRIDGE is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_IXP23XX is not set +# CONFIG_ARCH_L7200 is not set +CONFIG_ARCH_PXA=y +# CONFIG_ARCH_RPC is not set +# CONFIG_ARCH_SA1100 is not set +# CONFIG_ARCH_S3C2410 is not set +# CONFIG_ARCH_SHARK is not set +# CONFIG_ARCH_LH7A40X is not set +# CONFIG_ARCH_OMAP is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_AT91RM9200 is not set + +# +# Intel PXA2xx Implementations +# +# CONFIG_ARCH_LUBBOCK is not set +# CONFIG_MACH_LOGICPD_PXA270 is not set +# CONFIG_MACH_MAINSTONE is not set +CONFIG_MACH_CM_X270=y +# CONFIG_MACH_CM_X255 is not set +# CONFIG_ARCH_PXA_IDP is not set +# CONFIG_PXA_SHARPSL is not set +#CONFIG_CM_X270_SB270=y +CONFIG_CM_X270_ATXBASE=y +CONFIG_CM_X270_REV12=y +# CONFIG_CM_X270_REV11 is not set +CONFIG_PXA27x=y +CONFIG_IWMMXT=y + +# +# Processor Type +# +CONFIG_CPU_32=y +CONFIG_CPU_XSCALE=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_TLB_V4WBI=y + +# +# Processor Features +# +# CONFIG_ARM_THUMB is not set +CONFIG_XSCALE_PMU=y + +# +# Bus support +# +# CONFIG_PCI is not set + +# +# PCCARD (PCMCIA/CardBus) support +# +CONFIG_PCCARD=y +# CONFIG_PCMCIA_DEBUG is not set +CONFIG_PCMCIA=y +CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA_IOCTL=y + +# +# PC-card bridges +# +CONFIG_PCMCIA_PXA2XX=y + +# +# Kernel Features +# +# CONFIG_PREEMPT is not set +# CONFIG_NO_IDLE_HZ is not set +CONFIG_HZ=100 +# CONFIG_AEABI is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set +CONFIG_SELECT_MEMORY_MODEL=y +CONFIG_FLATMEM_MANUAL=y +# CONFIG_DISCONTIGMEM_MANUAL is not set +# CONFIG_SPARSEMEM_MANUAL is not set +CONFIG_FLATMEM=y +CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +CONFIG_SPLIT_PTLOCK_CPUS=4096 +CONFIG_LEDS=y +CONFIG_LEDS_TIMER=y +CONFIG_LEDS_CPU=y +CONFIG_ALIGNMENT_TRAP=y + +# +# Boot options +# +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyS0,38400 console=tty0 root=/dev/sda1 rootdelay=10 video=mbxfb" +#CONFIG_CMDLINE="console=ttyS0,38400 root=/dev/sda1 rootdelay=10 rw video=pxafb:mode:240x320-16,pixclock:367647,left:20,right:2,hsynclen:10,upper:3,lower:2,vsynclen:2,active,color,outputen:1,pixclockpol:1,vsync:0,hsync:0" +# CONFIG_XIP_KERNEL is not set + +# +# Floating point emulation +# + +# +# At least one emulation must be selected +# +CONFIG_FPE_NWFPE=y +# CONFIG_FPE_NWFPE_XP is not set +# CONFIG_FPE_FASTFPE is not set + +# +# Userspace binary formats +# +CONFIG_BINFMT_ELF=y +# CONFIG_BINFMT_AOUT is not set +# CONFIG_BINFMT_MISC is not set +# CONFIG_ARTHUR is not set + +# +# Power management options +# +CONFIG_PM=y +CONFIG_PM_LEGACY=y +# CONFIG_PM_DEBUG is not set +# CONFIG_APM is not set + +# +# Networking +# +CONFIG_NET=y + +# +# Networking options +# +# CONFIG_NETDEBUG is not set +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +# CONFIG_IP_ADVANCED_ROUTER is not set +CONFIG_IP_FIB_HASH=y +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_IP_MROUTE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_XFRM_TUNNEL is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_INET_DIAG=y +CONFIG_INET_TCP_DIAG=y +# CONFIG_TCP_CONG_ADVANCED is not set +CONFIG_TCP_CONG_BIC=y +# CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set +# CONFIG_NETFILTER is not set + +# +# DCCP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_DCCP is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set + +# +# TIPC Configuration (EXPERIMENTAL) +# +# CONFIG_TIPC is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set +# CONFIG_IEEE80211 is not set + +# +# Device Drivers +# + +# +# Generic Driver Options +# +CONFIG_STANDALONE=y +CONFIG_PREVENT_FIRMWARE_BUILD=y +CONFIG_FW_LOADER=y +# CONFIG_DEBUG_DRIVER is not set + +# +# Connector - unified userspace <-> kernelspace linker +# +# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# +CONFIG_MTD=y +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=0 +# CONFIG_MTD_CONCAT is not set +CONFIG_MTD_PARTITIONS=y +# CONFIG_MTD_REDBOOT_PARTS is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTD_AFS_PARTS is not set + +# +# User Modules And Translation Layers +# +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +# CONFIG_FTL is not set +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set +# CONFIG_RFD_FTL is not set + +# +# RAM/ROM/Flash chip drivers +# +# CONFIG_MTD_CFI is not set +# CONFIG_MTD_JEDECPROBE is not set +CONFIG_MTD_MAP_BANK_WIDTH_1=y +CONFIG_MTD_MAP_BANK_WIDTH_2=y +CONFIG_MTD_MAP_BANK_WIDTH_4=y +# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set +CONFIG_MTD_CFI_I1=y +CONFIG_MTD_CFI_I2=y +# CONFIG_MTD_CFI_I4 is not set +# CONFIG_MTD_CFI_I8 is not set +# CONFIG_MTD_RAM is not set +# CONFIG_MTD_ROM is not set +# CONFIG_MTD_ABSENT is not set +# CONFIG_MTD_OBSOLETE_CHIPS is not set + +# +# Mapping drivers for chip access +# +# CONFIG_MTD_COMPLEX_MAPPINGS is not set +# CONFIG_MTD_SHARP_SL is not set +# CONFIG_MTD_PLATRAM is not set + +# +# Self-contained MTD device drivers +# +# CONFIG_MTD_DATAFLASH is not set +# CONFIG_MTD_M25P80 is not set +# CONFIG_MTD_SLRAM is not set +# CONFIG_MTD_PHRAM is not set +# CONFIG_MTD_MTDRAM is not set +# CONFIG_MTD_BLOCK2MTD is not set + +# +# Disk-On-Chip Device Drivers +# +# CONFIG_MTD_DOC2000 is not set +# CONFIG_MTD_DOC2001 is not set +# CONFIG_MTD_DOC2001PLUS is not set + +# +# NAND Flash Device Drivers +# +CONFIG_MTD_NAND=y +CONFIG_MTD_NAND_VERIFY_WRITE=y +# CONFIG_MTD_NAND_H1900 is not set +CONFIG_MTD_NAND_IDS=y +# CONFIG_MTD_NAND_DISKONCHIP is not set +# CONFIG_MTD_NAND_SHARPSL is not set +# CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_NAND_CM_X270=y + +# +# OneNAND Flash Device Drivers +# +# CONFIG_MTD_ONENAND is not set + +# +# Parallel port support +# +# CONFIG_PARPORT is not set + +# +# Plug and Play support +# + +# +# Block devices +# +# CONFIG_BLK_DEV_COW_COMMON is not set +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_CRYPTOLOOP is not set +# CONFIG_BLK_DEV_NBD is not set +# CONFIG_BLK_DEV_UB is not set +# CONFIG_BLK_DEV_RAM is not set +# CONFIG_BLK_DEV_INITRD is not set +# CONFIG_CDROM_PKTCDVD is not set +# CONFIG_ATA_OVER_ETH is not set + +# +# ATA/ATAPI/MFM/RLL support +# +# CONFIG_IDE is not set + +# +# SCSI device support +# +# CONFIG_RAID_ATTRS is not set +CONFIG_SCSI=y +# CONFIG_SCSI_PROC_FS is not set + +# +# SCSI support type (disk, tape, CD-ROM) +# +CONFIG_BLK_DEV_SD=y +# CONFIG_CHR_DEV_ST is not set +# CONFIG_CHR_DEV_OSST is not set +# CONFIG_BLK_DEV_SR is not set +CONFIG_CHR_DEV_SG=y +# CONFIG_CHR_DEV_SCH is not set + +# +# Some SCSI devices (e.g. CD jukebox) support multiple LUNs +# +# CONFIG_SCSI_MULTI_LUN is not set +# CONFIG_SCSI_CONSTANTS is not set +# CONFIG_SCSI_LOGGING is not set + +# +# SCSI Transport Attributes +# +# CONFIG_SCSI_SPI_ATTRS is not set +# CONFIG_SCSI_FC_ATTRS is not set +# CONFIG_SCSI_ISCSI_ATTRS is not set +# CONFIG_SCSI_SAS_ATTRS is not set + +# +# SCSI low-level drivers +# +# CONFIG_ISCSI_TCP is not set +# CONFIG_SCSI_SATA is not set +# CONFIG_SCSI_DEBUG is not set + +# +# Multi-device support (RAID and LVM) +# +# CONFIG_MD is not set + +# +# Fusion MPT device support +# +# CONFIG_FUSION is not set + +# +# IEEE 1394 (FireWire) support +# + +# +# I2O device support +# + +# +# Network device support +# +CONFIG_NETDEVICES=y +# CONFIG_DUMMY is not set +# CONFIG_BONDING is not set +# CONFIG_EQUALIZER is not set +# CONFIG_TUN is not set + +# +# PHY device support +# +# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# +CONFIG_NET_ETHERNET=y +CONFIG_MII=y +# CONFIG_SMC91X is not set +CONFIG_DM9000=y + +# +# Ethernet (1000 Mbit) +# + +# +# Ethernet (10000 Mbit) +# + +# +# Token Ring devices +# + +# +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# PCMCIA network device support +# +# CONFIG_NET_PCMCIA is not set + +# +# Wan interfaces +# +# CONFIG_WAN is not set +CONFIG_PPP=y +# CONFIG_PPP_MULTILINK is not set +# CONFIG_PPP_FILTER is not set +CONFIG_PPP_ASYNC=y +# CONFIG_PPP_SYNC_TTY is not set +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +# CONFIG_PPP_MPPE is not set +# CONFIG_PPPOE is not set +# CONFIG_SLIP is not set +# CONFIG_SHAPER is not set +# CONFIG_NETCONSOLE is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# +# CONFIG_ISDN is not set + +# +# Input device support +# +CONFIG_INPUT=y + +# +# Userland interfaces +# +CONFIG_INPUT_MOUSEDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set +# CONFIG_INPUT_TSLIBDEV is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_EVBUG is not set + +# +# Input Device Drivers +# +CONFIG_INPUT_KEYBOARD=y +CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_SUNKBD=y +# CONFIG_KEYBOARD_LKKBD is not set +# CONFIG_KEYBOARD_XTKBD is not set +# CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_INPUT_JOYSTICK is not set +# CONFIG_INPUT_TOUCHSCREEN is not set +# CONFIG_INPUT_MISC is not set + +# +# Hardware I/O ports +# +CONFIG_SERIO=y +# CONFIG_SERIO_SERPORT is not set +CONFIG_SERIO_LIBPS2=y +# CONFIG_SERIO_RAW is not set +# CONFIG_GAMEPORT is not set + +# +# Character devices +# +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_HW_CONSOLE=y +# CONFIG_SERIAL_NONSTANDARD is not set + +# +# Serial drivers +# +# CONFIG_SERIAL_8250 is not set + +# +# Non-8250 serial port support +# +CONFIG_SERIAL_PXA=y +CONFIG_SERIAL_PXA_CONSOLE=y +CONFIG_SERIAL_CORE=y +CONFIG_SERIAL_CORE_CONSOLE=y +CONFIG_UNIX98_PTYS=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 + +# +# IPMI +# +# CONFIG_IPMI_HANDLER is not set + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set +# CONFIG_NVRAM is not set +# CONFIG_DTLK is not set +# CONFIG_R3964 is not set + +# +# Ftape, the floppy tape device driver +# + +# +# PCMCIA character devices +# +# CONFIG_SYNCLINK_CS is not set +# CONFIG_CARDMAN_4000 is not set +# CONFIG_CARDMAN_4040 is not set +# CONFIG_RAW_DRIVER is not set + +# +# TPM devices +# +# CONFIG_TCG_TPM is not set +# CONFIG_TELCLOCK is not set + +# +# I2C support +# +# CONFIG_I2C is not set + +# +# SPI support +# +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y + +# +# SPI Master Controller Drivers +# +# CONFIG_SPI_BITBANG is not set +CONFIG_SPI_PXA2XX=y + +# +# SPI Protocol Masters +# + +# +# Dallas's 1-wire bus +# +# CONFIG_W1 is not set + +# +# Hardware Monitoring support +# +# CONFIG_HWMON is not set +# CONFIG_HWMON_VID is not set + +# +# Misc devices +# + +# +# Multimedia Capabilities Port drivers +# +CONFIG_UCB1400_TS=y + +# +# LED devices +# +# CONFIG_NEW_LEDS is not set + +# +# LED drivers +# + +# +# LED Triggers +# + +# +# Multimedia devices +# +# CONFIG_VIDEO_DEV is not set +CONFIG_VIDEO_V4L2=y + +# +# Digital Video Broadcasting Devices +# +# CONFIG_DVB is not set +# CONFIG_USB_DABUSB is not set + +# +# Graphics support +# +CONFIG_FB=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_MACMODES is not set +# CONFIG_FB_FIRMWARE_EDID is not set +# CONFIG_FB_MODE_HELPERS is not set +# CONFIG_FB_TILEBLITTING is not set +# CONFIG_FB_S1D13XXX is not set +#CONFIG_FB_PXA is not set +#CONFIG_FB_PXA_PARAMETERS is not set +CONFIG_FB_MBX=y +# CONFIG_FB_VIRTUAL is not set + +# +# Console display driver support +# +# CONFIG_VGA_CONSOLE is not set +CONFIG_DUMMY_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE=y + +# +# Logo configuration +# +# CONFIG_LOGO is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# +CONFIG_SOUND=y + +# +# Advanced Linux Sound Architecture +# +CONFIG_SND=y +CONFIG_SND_TIMER=y +CONFIG_SND_PCM=y +# CONFIG_SND_SEQUENCER is not set +CONFIG_SND_OSSEMUL=y +CONFIG_SND_MIXER_OSS=y +CONFIG_SND_PCM_OSS=y +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +CONFIG_SND_SUPPORT_OLD_API=y +CONFIG_SND_VERBOSE_PROCFS=y +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# +CONFIG_SND_AC97_CODEC=y +CONFIG_SND_AC97_BUS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# +# ALSA ARM devices +# +CONFIG_SND_PXA2XX_PCM=y +CONFIG_SND_PXA2XX_AC97=y + +# +# USB devices +# +# CONFIG_SND_USB_AUDIO is not set + +# +# PCMCIA devices +# +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set + +# +# Open Sound System +# +# CONFIG_SOUND_PRIME is not set + +# +# USB support +# +CONFIG_USB_ARCH_HAS_HCD=y +CONFIG_USB_ARCH_HAS_OHCI=y +# CONFIG_USB_ARCH_HAS_EHCI is not set +CONFIG_USB=y +# CONFIG_USB_DEBUG is not set + +# +# Miscellaneous USB options +# +CONFIG_USB_DEVICEFS=y +# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DYNAMIC_MINORS is not set +# CONFIG_USB_SUSPEND is not set +# CONFIG_USB_OTG is not set + +# +# USB Host Controller Drivers +# +# CONFIG_USB_ISP116X_HCD is not set +CONFIG_USB_OHCI_HCD=y +# CONFIG_USB_OHCI_BIG_ENDIAN is not set +CONFIG_USB_OHCI_LITTLE_ENDIAN=y +# CONFIG_USB_SL811_HCD is not set + +# +# USB Device Class drivers +# +# CONFIG_USB_ACM is not set +# CONFIG_USB_PRINTER is not set + +# +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' +# + +# +# may also be needed; see USB_STORAGE Help for more information +# +CONFIG_USB_STORAGE=y +# CONFIG_USB_STORAGE_DEBUG is not set +# CONFIG_USB_STORAGE_DATAFAB is not set +# CONFIG_USB_STORAGE_FREECOM is not set +# CONFIG_USB_STORAGE_DPCM is not set +# CONFIG_USB_STORAGE_USBAT is not set +# CONFIG_USB_STORAGE_SDDR09 is not set +# CONFIG_USB_STORAGE_SDDR55 is not set +# CONFIG_USB_STORAGE_JUMPSHOT is not set +# CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_LIBUSUAL is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set +# CONFIG_USB_AIPTEK is not set +# CONFIG_USB_WACOM is not set +# CONFIG_USB_ACECAD is not set +# CONFIG_USB_KBTAB is not set +# CONFIG_USB_POWERMATE is not set +# CONFIG_USB_TOUCHSCREEN is not set +# CONFIG_USB_YEALINK is not set +# CONFIG_USB_XPAD is not set +# CONFIG_USB_ATI_REMOTE is not set +# CONFIG_USB_ATI_REMOTE2 is not set +# CONFIG_USB_KEYSPAN_REMOTE is not set +# CONFIG_USB_APPLETOUCH is not set + +# +# USB Imaging devices +# +# CONFIG_USB_MDC800 is not set +# CONFIG_USB_MICROTEK is not set + +# +# USB Network Adapters +# +# CONFIG_USB_CATC is not set +# CONFIG_USB_KAWETH is not set +# CONFIG_USB_PEGASUS is not set +# CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET is not set +# CONFIG_USB_MON is not set + +# +# USB port drivers +# + +# +# USB Serial Converter support +# +# CONFIG_USB_SERIAL is not set + +# +# USB Miscellaneous drivers +# +# CONFIG_USB_EMI62 is not set +# CONFIG_USB_EMI26 is not set +# CONFIG_USB_AUERSWALD is not set +# CONFIG_USB_RIO500 is not set +# CONFIG_USB_LEGOTOWER is not set +# CONFIG_USB_LCD is not set +# CONFIG_USB_LED is not set +# CONFIG_USB_CYTHERM is not set +# CONFIG_USB_PHIDGETKIT is not set +# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_LD is not set +# CONFIG_USB_TEST is not set + +# +# USB DSL modem support +# + +# +# USB Gadget Support +# +CONFIG_USB_GADGET=y +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set +CONFIG_USB_GADGET_PXA27X=y +CONFIG_USB_PXA27X=y +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set +# CONFIG_USB_GADGET_OMAP is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +# CONFIG_USB_GADGET_DUALSPEED is not set +# CONFIG_USB_ZERO is not set +CONFIG_USB_ETH=y +CONFIG_USB_ETH_RNDIS=y +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_G_CHAR is not set + +# +# MMC/SD Card support +# +# CONFIG_MMC is not set + +# +# Real Time Clock +# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y +CONFIG_RTC_HCTOSYS_DEVICE="rtc0" + +# +# RTC interfaces +# +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y + +# +# RTC drivers +# +# CONFIG_RTC_DRV_M48T86 is not set +# CONFIG_RTC_DRV_SA1100 is not set +# CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_MAX6902 is not set +CONFIG_RTC_DRV_V3020=y + +# +# File systems +# +CONFIG_EXT2_FS=y +CONFIG_EXT2_FS_XATTR=y +CONFIG_EXT2_FS_POSIX_ACL=y +# CONFIG_EXT2_FS_SECURITY is not set +# CONFIG_EXT2_FS_XIP is not set +CONFIG_EXT3_FS=y +CONFIG_FS_MBCACHE=y +# CONFIG_REISERFS_FS is not set +# CONFIG_JFS_FS is not set +CONFIG_FS_POSIX_ACL=y +# CONFIG_XFS_FS is not set +# CONFIG_OCFS2_FS is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set +CONFIG_INOTIFY=y +# CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y +# CONFIG_AUTOFS_FS is not set +# CONFIG_AUTOFS4_FS is not set +# CONFIG_FUSE_FS is not set + +# +# CD-ROM/DVD Filesystems +# +# CONFIG_ISO9660_FS is not set +# CONFIG_UDF_FS is not set + +# +# DOS/FAT/NT Filesystems +# +CONFIG_FAT_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_FAT_DEFAULT_CODEPAGE=437 +CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" +# CONFIG_NTFS_FS is not set + +# +# Pseudo filesystems +# +CONFIG_PROC_FS=y +CONFIG_SYSFS=y +CONFIG_TMPFS=y +# CONFIG_HUGETLB_PAGE is not set +CONFIG_RAMFS=y +# CONFIG_CONFIGFS_FS is not set + +# +# Miscellaneous filesystems +# +# CONFIG_ADFS_FS is not set +# CONFIG_AFFS_FS is not set +# CONFIG_HFS_FS is not set +# CONFIG_HFSPLUS_FS is not set +# CONFIG_BEFS_FS is not set +# CONFIG_BFS_FS is not set +# CONFIG_EFS_FS is not set +# CONFIG_JFFS_FS is not set +CONFIG_JFFS2_FS=y +CONFIG_JFFS2_FS_DEBUG=0 +CONFIG_JFFS2_FS_WRITEBUFFER=y +# CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set +CONFIG_JFFS2_ZLIB=y +CONFIG_JFFS2_RTIME=y +# CONFIG_JFFS2_RUBIN is not set +# CONFIG_CRAMFS is not set +# CONFIG_VXFS_FS is not set +# CONFIG_HPFS_FS is not set +# CONFIG_QNX4FS_FS is not set +# CONFIG_SYSV_FS is not set +# CONFIG_UFS_FS is not set + +# +# Network File Systems +# +CONFIG_NFS_FS=y +CONFIG_NFS_V3=y +# CONFIG_NFS_V3_ACL is not set +# CONFIG_NFS_V4 is not set +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_LOCKD=y +CONFIG_LOCKD_V4=y +CONFIG_NFS_COMMON=y +CONFIG_SUNRPC=y +# CONFIG_RPCSEC_GSS_KRB5 is not set +# CONFIG_RPCSEC_GSS_SPKM3 is not set +# CONFIG_SMB_FS is not set +# CONFIG_CIFS is not set +# CONFIG_NCP_FS is not set +# CONFIG_CODA_FS is not set +# CONFIG_AFS_FS is not set +# CONFIG_9P_FS is not set + +# +# Partition Types +# +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_MSDOS_PARTITION=y + +# +# Native Language Support +# +CONFIG_NLS=y +CONFIG_NLS_DEFAULT="iso8859-1" +CONFIG_NLS_CODEPAGE_437=y +# CONFIG_NLS_CODEPAGE_737 is not set +# CONFIG_NLS_CODEPAGE_775 is not set +# CONFIG_NLS_CODEPAGE_850 is not set +# CONFIG_NLS_CODEPAGE_852 is not set +# CONFIG_NLS_CODEPAGE_855 is not set +# CONFIG_NLS_CODEPAGE_857 is not set +# CONFIG_NLS_CODEPAGE_860 is not set +# CONFIG_NLS_CODEPAGE_861 is not set +# CONFIG_NLS_CODEPAGE_862 is not set +# CONFIG_NLS_CODEPAGE_863 is not set +# CONFIG_NLS_CODEPAGE_864 is not set +# CONFIG_NLS_CODEPAGE_865 is not set +# CONFIG_NLS_CODEPAGE_866 is not set +# CONFIG_NLS_CODEPAGE_869 is not set +# CONFIG_NLS_CODEPAGE_936 is not set +# CONFIG_NLS_CODEPAGE_950 is not set +# CONFIG_NLS_CODEPAGE_932 is not set +# CONFIG_NLS_CODEPAGE_949 is not set +# CONFIG_NLS_CODEPAGE_874 is not set +# CONFIG_NLS_ISO8859_8 is not set +# CONFIG_NLS_CODEPAGE_1250 is not set +# CONFIG_NLS_CODEPAGE_1251 is not set +# CONFIG_NLS_ASCII is not set +# CONFIG_NLS_ISO8859_1 is not set +# CONFIG_NLS_ISO8859_2 is not set +# CONFIG_NLS_ISO8859_3 is not set +# CONFIG_NLS_ISO8859_4 is not set +# CONFIG_NLS_ISO8859_5 is not set +# CONFIG_NLS_ISO8859_6 is not set +# CONFIG_NLS_ISO8859_7 is not set +# CONFIG_NLS_ISO8859_9 is not set +# CONFIG_NLS_ISO8859_13 is not set +# CONFIG_NLS_ISO8859_14 is not set +# CONFIG_NLS_ISO8859_15 is not set +# CONFIG_NLS_KOI8_R is not set +# CONFIG_NLS_KOI8_U is not set +# CONFIG_NLS_UTF8 is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set + +# +# Kernel hacking +# +# CONFIG_PRINTK_TIME is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_DEBUG_KERNEL=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_DETECT_SOFTLOCKUP=y +# CONFIG_SCHEDSTATS is not set +# CONFIG_DEBUG_SLAB is not set +CONFIG_DEBUG_MUTEXES=y +# CONFIG_DEBUG_SPINLOCK is not set +# CONFIG_DEBUG_SPINLOCK_SLEEP is not set +# CONFIG_DEBUG_KOBJECT is not set +CONFIG_DEBUG_BUGVERBOSE=y +# CONFIG_DEBUG_INFO is not set +# CONFIG_DEBUG_FS is not set +# CONFIG_DEBUG_VM is not set +CONFIG_FRAME_POINTER=y +# CONFIG_UNWIND_INFO is not set +CONFIG_FORCED_INLINING=y +# CONFIG_RCU_TORTURE_TEST is not set +CONFIG_DEBUG_USER=y +# CONFIG_DEBUG_WAITQ is not set +# CONFIG_DEBUG_ERRORS is not set +# CONFIG_DEBUG_LL is not set + +# +# Security options +# +# CONFIG_KEYS is not set +# CONFIG_SECURITY is not set + +# +# Cryptographic options +# +# CONFIG_CRYPTO is not set + +# +# Hardware crypto devices +# + +# +# Library routines +# +CONFIG_CRC_CCITT=y +# CONFIG_CRC16 is not set +CONFIG_CRC32=y +# CONFIG_LIBCRC32C is not set +CONFIG_ZLIB_INFLATE=y +CONFIG_ZLIB_DEFLATE=y diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/mach-types b/openembedded/packages/linux/linux-cmx270-2.6.17/mach-types new file mode 100644 index 0000000000..2354f822f1 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/mach-types @@ -0,0 +1,1112 @@ +# Database of machine macros and numbers +# +# This file is linux/arch/arm/tools/mach-types +# +# Up to date versions of this file can be obtained from: +# +# http://www.arm.linux.org.uk/developer/machines/?action=download +# +# Please do not send patches to this file; it is automatically generated! +# To add an entry into this database, please see Documentation/arm/README, +# or visit: +# +# http://www.arm.linux.org.uk/developer/machines/?action=new +# +# Last update: Tue Jul 18 14:35:04 2006 +# +# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number +# +ebsa110 ARCH_EBSA110 EBSA110 0 +riscpc ARCH_RPC RISCPC 1 +nexuspci ARCH_NEXUSPCI NEXUSPCI 3 +ebsa285 ARCH_EBSA285 EBSA285 4 +netwinder ARCH_NETWINDER NETWINDER 5 +cats ARCH_CATS CATS 6 +tbox ARCH_TBOX TBOX 7 +co285 ARCH_CO285 CO285 8 +clps7110 ARCH_CLPS7110 CLPS7110 9 +archimedes ARCH_ARC ARCHIMEDES 10 +a5k ARCH_A5K A5K 11 +etoile ARCH_ETOILE ETOILE 12 +lacie_nas ARCH_LACIE_NAS LACIE_NAS 13 +clps7500 ARCH_CLPS7500 CLPS7500 14 +shark ARCH_SHARK SHARK 15 +brutus SA1100_BRUTUS BRUTUS 16 +personal_server ARCH_PERSONAL_SERVER PERSONAL_SERVER 17 +itsy SA1100_ITSY ITSY 18 +l7200 ARCH_L7200 L7200 19 +pleb SA1100_PLEB PLEB 20 +integrator ARCH_INTEGRATOR INTEGRATOR 21 +h3600 SA1100_H3600 H3600 22 +ixp1200 ARCH_IXP1200 IXP1200 23 +p720t ARCH_P720T P720T 24 +assabet SA1100_ASSABET ASSABET 25 +victor SA1100_VICTOR VICTOR 26 +lart SA1100_LART LART 27 +ranger SA1100_RANGER RANGER 28 +graphicsclient SA1100_GRAPHICSCLIENT GRAPHICSCLIENT 29 +xp860 SA1100_XP860 XP860 30 +cerf SA1100_CERF CERF 31 +nanoengine SA1100_NANOENGINE NANOENGINE 32 +fpic SA1100_FPIC FPIC 33 +extenex1 SA1100_EXTENEX1 EXTENEX1 34 +sherman SA1100_SHERMAN SHERMAN 35 +accelent_sa SA1100_ACCELENT ACCELENT_SA 36 +accelent_l7200 ARCH_L7200_ACCELENT ACCELENT_L7200 37 +netport SA1100_NETPORT NETPORT 38 +pangolin SA1100_PANGOLIN PANGOLIN 39 +yopy SA1100_YOPY YOPY 40 +coolidge SA1100_COOLIDGE COOLIDGE 41 +huw_webpanel SA1100_HUW_WEBPANEL HUW_WEBPANEL 42 +spotme ARCH_SPOTME SPOTME 43 +freebird ARCH_FREEBIRD FREEBIRD 44 +ti925 ARCH_TI925 TI925 45 +riscstation ARCH_RISCSTATION RISCSTATION 46 +cavy SA1100_CAVY CAVY 47 +jornada720 SA1100_JORNADA720 JORNADA720 48 +omnimeter SA1100_OMNIMETER OMNIMETER 49 +edb7211 ARCH_EDB7211 EDB7211 50 +citygo SA1100_CITYGO CITYGO 51 +pfs168 SA1100_PFS168 PFS168 52 +spot SA1100_SPOT SPOT 53 +flexanet SA1100_FLEXANET FLEXANET 54 +webpal ARCH_WEBPAL WEBPAL 55 +linpda SA1100_LINPDA LINPDA 56 +anakin ARCH_ANAKIN ANAKIN 57 +mvi SA1100_MVI MVI 58 +jupiter SA1100_JUPITER JUPITER 59 +psionw ARCH_PSIONW PSIONW 60 +aln SA1100_ALN ALN 61 +epxa ARCH_CAMELOT CAMELOT 62 +gds2200 SA1100_GDS2200 GDS2200 63 +psion_series7 SA1100_PSION_SERIES7 PSION_SERIES7 64 +xfile SA1100_XFILE XFILE 65 +accelent_ep9312 ARCH_ACCELENT_EP9312 ACCELENT_EP9312 66 +ic200 ARCH_IC200 IC200 67 +creditlart SA1100_CREDITLART CREDITLART 68 +htm SA1100_HTM HTM 69 +iq80310 ARCH_IQ80310 IQ80310 70 +freebot SA1100_FREEBOT FREEBOT 71 +entel ARCH_ENTEL ENTEL 72 +enp3510 ARCH_ENP3510 ENP3510 73 +trizeps SA1100_TRIZEPS TRIZEPS 74 +nesa SA1100_NESA NESA 75 +venus ARCH_VENUS VENUS 76 +tardis ARCH_TARDIS TARDIS 77 +mercury ARCH_MERCURY MERCURY 78 +empeg SA1100_EMPEG EMPEG 79 +adi_evb ARCH_I80200FCC I80200FCC 80 +itt_cpb SA1100_ITT_CPB ITT_CPB 81 +svc SA1100_SVC SVC 82 +alpha2 SA1100_ALPHA2 ALPHA2 84 +alpha1 SA1100_ALPHA1 ALPHA1 85 +netarm ARCH_NETARM NETARM 86 +simpad SA1100_SIMPAD SIMPAD 87 +pda1 ARCH_PDA1 PDA1 88 +lubbock ARCH_LUBBOCK LUBBOCK 89 +aniko ARCH_ANIKO ANIKO 90 +clep7212 ARCH_CLEP7212 CLEP7212 91 +cs89712 ARCH_CS89712 CS89712 92 +weararm SA1100_WEARARM WEARARM 93 +possio_px SA1100_POSSIO_PX POSSIO_PX 94 +sidearm SA1100_SIDEARM SIDEARM 95 +stork SA1100_STORK STORK 96 +shannon SA1100_SHANNON SHANNON 97 +ace ARCH_ACE ACE 98 +ballyarm SA1100_BALLYARM BALLYARM 99 +simputer SA1100_SIMPUTER SIMPUTER 100 +nexterm SA1100_NEXTERM NEXTERM 101 +sa1100_elf SA1100_SA1100_ELF SA1100_ELF 102 +gator SA1100_GATOR GATOR 103 +granite ARCH_GRANITE GRANITE 104 +consus SA1100_CONSUS CONSUS 105 +aaed2000 ARCH_AAED2000 AAED2000 106 +cdb89712 ARCH_CDB89712 CDB89712 107 +graphicsmaster SA1100_GRAPHICSMASTER GRAPHICSMASTER 108 +adsbitsy SA1100_ADSBITSY ADSBITSY 109 +pxa_idp ARCH_PXA_IDP PXA_IDP 110 +plce ARCH_PLCE PLCE 111 +pt_system3 SA1100_PT_SYSTEM3 PT_SYSTEM3 112 +murphy ARCH_MEDALB MEDALB 113 +eagle ARCH_EAGLE EAGLE 114 +dsc21 ARCH_DSC21 DSC21 115 +dsc24 ARCH_DSC24 DSC24 116 +ti5472 ARCH_TI5472 TI5472 117 +autcpu12 ARCH_AUTCPU12 AUTCPU12 118 +uengine ARCH_UENGINE UENGINE 119 +bluestem SA1100_BLUESTEM BLUESTEM 120 +xingu8 ARCH_XINGU8 XINGU8 121 +bushstb ARCH_BUSHSTB BUSHSTB 122 +epsilon1 SA1100_EPSILON1 EPSILON1 123 +balloon SA1100_BALLOON BALLOON 124 +puppy ARCH_PUPPY PUPPY 125 +elroy SA1100_ELROY ELROY 126 +gms720 ARCH_GMS720 GMS720 127 +s24x ARCH_S24X S24X 128 +jtel_clep7312 ARCH_JTEL_CLEP7312 JTEL_CLEP7312 129 +cx821xx ARCH_CX821XX CX821XX 130 +edb7312 ARCH_EDB7312 EDB7312 131 +bsa1110 SA1100_BSA1110 BSA1110 132 +powerpin ARCH_POWERPIN POWERPIN 133 +openarm ARCH_OPENARM OPENARM 134 +whitechapel SA1100_WHITECHAPEL WHITECHAPEL 135 +h3100 SA1100_H3100 H3100 136 +h3800 SA1100_H3800 H3800 137 +blue_v1 ARCH_BLUE_V1 BLUE_V1 138 +pxa_cerf ARCH_PXA_CERF PXA_CERF 139 +arm7tevb ARCH_ARM7TEVB ARM7TEVB 140 +d7400 SA1100_D7400 D7400 141 +piranha ARCH_PIRANHA PIRANHA 142 +sbcamelot SA1100_SBCAMELOT SBCAMELOT 143 +kings SA1100_KINGS KINGS 144 +smdk2400 ARCH_SMDK2400 SMDK2400 145 +collie SA1100_COLLIE COLLIE 146 +idr ARCH_IDR IDR 147 +badge4 SA1100_BADGE4 BADGE4 148 +webnet ARCH_WEBNET WEBNET 149 +d7300 SA1100_D7300 D7300 150 +cep SA1100_CEP CEP 151 +fortunet ARCH_FORTUNET FORTUNET 152 +vc547x ARCH_VC547X VC547X 153 +filewalker SA1100_FILEWALKER FILEWALKER 154 +netgateway SA1100_NETGATEWAY NETGATEWAY 155 +symbol2800 SA1100_SYMBOL2800 SYMBOL2800 156 +suns SA1100_SUNS SUNS 157 +frodo SA1100_FRODO FRODO 158 +ms301 SA1100_MACH_TYTE_MS301 MACH_TYTE_MS301 159 +mx1ads ARCH_MX1ADS MX1ADS 160 +h7201 ARCH_H7201 H7201 161 +h7202 ARCH_H7202 H7202 162 +amico ARCH_AMICO AMICO 163 +iam SA1100_IAM IAM 164 +tt530 SA1100_TT530 TT530 165 +sam2400 ARCH_SAM2400 SAM2400 166 +jornada56x SA1100_JORNADA56X JORNADA56X 167 +active SA1100_ACTIVE ACTIVE 168 +iq80321 ARCH_IQ80321 IQ80321 169 +wid SA1100_WID WID 170 +sabinal ARCH_SABINAL SABINAL 171 +ixp425_matacumbe ARCH_IXP425_MATACUMBE IXP425_MATACUMBE 172 +miniprint SA1100_MINIPRINT MINIPRINT 173 +adm510x ARCH_ADM510X ADM510X 174 +svs200 SA1100_SVS200 SVS200 175 +atg_tcu ARCH_ATG_TCU ATG_TCU 176 +jornada820 SA1100_JORNADA820 JORNADA820 177 +s3c44b0 ARCH_S3C44B0 S3C44B0 178 +margis2 ARCH_MARGIS2 MARGIS2 179 +ks8695 ARCH_KS8695 KS8695 180 +brh ARCH_BRH BRH 181 +s3c2410 ARCH_S3C2410 S3C2410 182 +possio_px30 ARCH_POSSIO_PX30 POSSIO_PX30 183 +s3c2800 ARCH_S3C2800 S3C2800 184 +fleetwood SA1100_FLEETWOOD FLEETWOOD 185 +omaha ARCH_OMAHA OMAHA 186 +ta7 ARCH_TA7 TA7 187 +nova SA1100_NOVA NOVA 188 +hmk ARCH_HMK HMK 189 +karo ARCH_KARO KARO 190 +fester SA1100_FESTER FESTER 191 +gpi ARCH_GPI GPI 192 +smdk2410 ARCH_SMDK2410 SMDK2410 193 +i519 ARCH_I519 I519 194 +nexio SA1100_NEXIO NEXIO 195 +bitbox SA1100_BITBOX BITBOX 196 +g200 SA1100_G200 G200 197 +gill SA1100_GILL GILL 198 +pxa_mercury ARCH_PXA_MERCURY PXA_MERCURY 199 +ceiva ARCH_CEIVA CEIVA 200 +fret SA1100_FRET FRET 201 +emailphone SA1100_EMAILPHONE EMAILPHONE 202 +h3900 ARCH_H3900 H3900 203 +pxa1 ARCH_PXA1 PXA1 204 +koan369 SA1100_KOAN369 KOAN369 205 +cogent ARCH_COGENT COGENT 206 +esl_simputer ARCH_ESL_SIMPUTER ESL_SIMPUTER 207 +esl_simputer_clr ARCH_ESL_SIMPUTER_CLR ESL_SIMPUTER_CLR 208 +esl_simputer_bw ARCH_ESL_SIMPUTER_BW ESL_SIMPUTER_BW 209 +hhp_cradle ARCH_HHP_CRADLE HHP_CRADLE 210 +he500 ARCH_HE500 HE500 211 +inhandelf2 SA1100_INHANDELF2 INHANDELF2 212 +inhandftip SA1100_INHANDFTIP INHANDFTIP 213 +dnp1110 SA1100_DNP1110 DNP1110 214 +pnp1110 SA1100_PNP1110 PNP1110 215 +csb226 ARCH_CSB226 CSB226 216 +arnold SA1100_ARNOLD ARNOLD 217 +voiceblue MACH_VOICEBLUE VOICEBLUE 218 +jz8028 ARCH_JZ8028 JZ8028 219 +h5400 ARCH_H5400 H5400 220 +forte SA1100_FORTE FORTE 221 +acam SA1100_ACAM ACAM 222 +abox SA1100_ABOX ABOX 223 +atmel ARCH_ATMEL ATMEL 224 +sitsang ARCH_SITSANG SITSANG 225 +cpu1110lcdnet SA1100_CPU1110LCDNET CPU1110LCDNET 226 +mpl_vcma9 ARCH_MPL_VCMA9 MPL_VCMA9 227 +opus_a1 ARCH_OPUS_A1 OPUS_A1 228 +daytona ARCH_DAYTONA DAYTONA 229 +killbear SA1100_KILLBEAR KILLBEAR 230 +yoho ARCH_YOHO YOHO 231 +jasper ARCH_JASPER JASPER 232 +dsc25 ARCH_DSC25 DSC25 233 +omap_innovator MACH_OMAP_INNOVATOR OMAP_INNOVATOR 234 +mnci ARCH_RAMSES RAMSES 235 +s28x ARCH_S28X S28X 236 +mport3 ARCH_MPORT3 MPORT3 237 +pxa_eagle250 ARCH_PXA_EAGLE250 PXA_EAGLE250 238 +pdb ARCH_PDB PDB 239 +blue_2g SA1100_BLUE_2G BLUE_2G 240 +bluearch SA1100_BLUEARCH BLUEARCH 241 +ixdp2400 ARCH_IXDP2400 IXDP2400 242 +ixdp2800 ARCH_IXDP2800 IXDP2800 243 +explorer SA1100_EXPLORER EXPLORER 244 +ixdp425 ARCH_IXDP425 IXDP425 245 +chimp ARCH_CHIMP CHIMP 246 +stork_nest ARCH_STORK_NEST STORK_NEST 247 +stork_egg ARCH_STORK_EGG STORK_EGG 248 +wismo SA1100_WISMO WISMO 249 +ezlinx ARCH_EZLINX EZLINX 250 +at91rm9200 ARCH_AT91RM9200 AT91RM9200 251 +orion ARCH_ORION ORION 252 +neptune ARCH_NEPTUNE NEPTUNE 253 +hackkit SA1100_HACKKIT HACKKIT 254 +pxa_wins30 ARCH_PXA_WINS30 PXA_WINS30 255 +lavinna SA1100_LAVINNA LAVINNA 256 +pxa_uengine ARCH_PXA_UENGINE PXA_UENGINE 257 +innokom ARCH_INNOKOM INNOKOM 258 +bms ARCH_BMS BMS 259 +ixcdp1100 ARCH_IXCDP1100 IXCDP1100 260 +prpmc1100 ARCH_PRPMC1100 PRPMC1100 261 +at91rm9200dk ARCH_AT91RM9200DK AT91RM9200DK 262 +armstick ARCH_ARMSTICK ARMSTICK 263 +armonie ARCH_ARMONIE ARMONIE 264 +mport1 ARCH_MPORT1 MPORT1 265 +s3c5410 ARCH_S3C5410 S3C5410 266 +zcp320a ARCH_ZCP320A ZCP320A 267 +i_box ARCH_I_BOX I_BOX 268 +stlc1502 ARCH_STLC1502 STLC1502 269 +siren ARCH_SIREN SIREN 270 +greenlake ARCH_GREENLAKE GREENLAKE 271 +argus ARCH_ARGUS ARGUS 272 +combadge SA1100_COMBADGE COMBADGE 273 +rokepxa ARCH_ROKEPXA ROKEPXA 274 +cintegrator ARCH_CINTEGRATOR CINTEGRATOR 275 +guidea07 ARCH_GUIDEA07 GUIDEA07 276 +tat257 ARCH_TAT257 TAT257 277 +igp2425 ARCH_IGP2425 IGP2425 278 +bluegrama ARCH_BLUEGRAMMA BLUEGRAMMA 279 +ipod ARCH_IPOD IPOD 280 +adsbitsyx ARCH_ADSBITSYX ADSBITSYX 281 +trizeps2 ARCH_TRIZEPS2 TRIZEPS2 282 +viper ARCH_VIPER VIPER 283 +adsbitsyplus SA1100_ADSBITSYPLUS ADSBITSYPLUS 284 +adsagc SA1100_ADSAGC ADSAGC 285 +stp7312 ARCH_STP7312 STP7312 286 +nx_phnx MACH_NX_PHNX NX_PHNX 287 +wep_ep250 ARCH_WEP_EP250 WEP_EP250 288 +inhandelf3 ARCH_INHANDELF3 INHANDELF3 289 +adi_coyote ARCH_ADI_COYOTE ADI_COYOTE 290 +iyonix ARCH_IYONIX IYONIX 291 +damicam1 ARCH_DAMICAM_SA1110 DAMICAM_SA1110 292 +meg03 ARCH_MEG03 MEG03 293 +pxa_whitechapel ARCH_PXA_WHITECHAPEL PXA_WHITECHAPEL 294 +nwsc ARCH_NWSC NWSC 295 +nwlarm ARCH_NWLARM NWLARM 296 +ixp425_mguard ARCH_IXP425_MGUARD IXP425_MGUARD 297 +pxa_netdcu4 ARCH_PXA_NETDCU4 PXA_NETDCU4 298 +ixdp2401 ARCH_IXDP2401 IXDP2401 299 +ixdp2801 ARCH_IXDP2801 IXDP2801 300 +zodiac ARCH_ZODIAC ZODIAC 301 +armmodul ARCH_ARMMODUL ARMMODUL 302 +ketop SA1100_KETOP KETOP 303 +av7200 ARCH_AV7200 AV7200 304 +arch_ti925 ARCH_ARCH_TI925 ARCH_TI925 305 +acq200 ARCH_ACQ200 ACQ200 306 +pt_dafit SA1100_PT_DAFIT PT_DAFIT 307 +ihba ARCH_IHBA IHBA 308 +quinque ARCH_QUINQUE QUINQUE 309 +nimbraone ARCH_NIMBRAONE NIMBRAONE 310 +nimbra29x ARCH_NIMBRA29X NIMBRA29X 311 +nimbra210 ARCH_NIMBRA210 NIMBRA210 312 +hhp_d95xx ARCH_HHP_D95XX HHP_D95XX 313 +labarm ARCH_LABARM LABARM 314 +m825xx ARCH_M825XX M825XX 315 +m7100 SA1100_M7100 M7100 316 +nipc2 ARCH_NIPC2 NIPC2 317 +fu7202 ARCH_FU7202 FU7202 318 +adsagx ARCH_ADSAGX ADSAGX 319 +pxa_pooh ARCH_PXA_POOH PXA_POOH 320 +bandon ARCH_BANDON BANDON 321 +pcm7210 ARCH_PCM7210 PCM7210 322 +nms9200 ARCH_NMS9200 NMS9200 323 +logodl ARCH_LOGODL LOGODL 324 +m7140 SA1100_M7140 M7140 325 +korebot ARCH_KOREBOT KOREBOT 326 +iq31244 ARCH_IQ31244 IQ31244 327 +koan393 SA1100_KOAN393 KOAN393 328 +inhandftip3 ARCH_INHANDFTIP3 INHANDFTIP3 329 +gonzo ARCH_GONZO GONZO 330 +bast ARCH_BAST BAST 331 +scanpass ARCH_SCANPASS SCANPASS 332 +ep7312_pooh ARCH_EP7312_POOH EP7312_POOH 333 +ta7s ARCH_TA7S TA7S 334 +ta7v ARCH_TA7V TA7V 335 +icarus SA1100_ICARUS ICARUS 336 +h1900 ARCH_H1900 H1900 337 +gemini SA1100_GEMINI GEMINI 338 +axim ARCH_AXIM AXIM 339 +audiotron ARCH_AUDIOTRON AUDIOTRON 340 +h2200 ARCH_H2200 H2200 341 +loox600 ARCH_LOOX600 LOOX600 342 +niop ARCH_NIOP NIOP 343 +dm310 ARCH_DM310 DM310 344 +seedpxa_c2 ARCH_SEEDPXA_C2 SEEDPXA_C2 345 +ixp4xx_mguardpci ARCH_IXP4XX_MGUARD_PCI IXP4XX_MGUARD_PCI 346 +h1940 ARCH_H1940 H1940 347 +scorpio ARCH_SCORPIO SCORPIO 348 +viva ARCH_VIVA VIVA 349 +pxa_xcard ARCH_PXA_XCARD PXA_XCARD 350 +csb335 ARCH_CSB335 CSB335 351 +ixrd425 ARCH_IXRD425 IXRD425 352 +iq80315 ARCH_IQ80315 IQ80315 353 +nmp7312 ARCH_NMP7312 NMP7312 354 +cx861xx ARCH_CX861XX CX861XX 355 +enp2611 ARCH_ENP2611 ENP2611 356 +xda SA1100_XDA XDA 357 +csir_ims ARCH_CSIR_IMS CSIR_IMS 358 +ixp421_dnaeeth ARCH_IXP421_DNAEETH IXP421_DNAEETH 359 +pocketserv9200 ARCH_POCKETSERV9200 POCKETSERV9200 360 +toto ARCH_TOTO TOTO 361 +s3c2440 ARCH_S3C2440 S3C2440 362 +ks8695p ARCH_KS8695P KS8695P 363 +se4000 ARCH_SE4000 SE4000 364 +quadriceps ARCH_QUADRICEPS QUADRICEPS 365 +bronco ARCH_BRONCO BRONCO 366 +esl_wireless_tab ARCH_ESL_WIRELESS_TABLETESL_WIRELESS_TABLET 367 +esl_sofcomp ARCH_ESL_SOFCOMP ESL_SOFCOMP 368 +s5c7375 ARCH_S5C7375 S5C7375 369 +spearhead ARCH_SPEARHEAD SPEARHEAD 370 +pantera ARCH_PANTERA PANTERA 371 +prayoglite ARCH_PRAYOGLITE PRAYOGLITE 372 +gumstix ARCH_GUMSTIK GUMSTIK 373 +rcube ARCH_RCUBE RCUBE 374 +rea_olv ARCH_REA_OLV REA_OLV 375 +pxa_iphone ARCH_PXA_IPHONE PXA_IPHONE 376 +s3c3410 ARCH_S3C3410 S3C3410 377 +espd_4510b ARCH_ESPD_4510B ESPD_4510B 378 +mp1x ARCH_MP1X MP1X 379 +at91rm9200tb ARCH_AT91RM9200TB AT91RM9200TB 380 +adsvgx ARCH_ADSVGX ADSVGX 381 +omap_h2 MACH_OMAP_H2 OMAP_H2 382 +pelee ARCH_PELEE PELEE 383 +e740 MACH_E740 E740 384 +iq80331 ARCH_IQ80331 IQ80331 385 +versatile_pb ARCH_VERSATILE_PB VERSATILE_PB 387 +kev7a400 MACH_KEV7A400 KEV7A400 388 +lpd7a400 MACH_LPD7A400 LPD7A400 389 +lpd7a404 MACH_LPD7A404 LPD7A404 390 +fujitsu_camelot ARCH_FUJITSU_CAMELOT FUJITSU_CAMELOT 391 +janus2m ARCH_JANUS2M JANUS2M 392 +embtf MACH_EMBTF EMBTF 393 +hpm MACH_HPM HPM 394 +smdk2410tk MACH_SMDK2410TK SMDK2410TK 395 +smdk2410aj MACH_SMDK2410AJ SMDK2410AJ 396 +streetracer MACH_STREETRACER STREETRACER 397 +eframe MACH_EFRAME EFRAME 398 +csb337 MACH_CSB337 CSB337 399 +pxa_lark MACH_PXA_LARK PXA_LARK 400 +pxa_pnp2110 MACH_PNP2110 PNP2110 401 +tcc72x MACH_TCC72X TCC72X 402 +altair MACH_ALTAIR ALTAIR 403 +kc3 MACH_KC3 KC3 404 +sinteftd MACH_SINTEFTD SINTEFTD 405 +mainstone MACH_MAINSTONE MAINSTONE 406 +aday4x MACH_ADAY4X ADAY4X 407 +lite300 MACH_LITE300 LITE300 408 +s5c7376 MACH_S5C7376 S5C7376 409 +mt02 MACH_MT02 MT02 410 +mport3s MACH_MPORT3S MPORT3S 411 +ra_alpha MACH_RA_ALPHA RA_ALPHA 412 +xcep MACH_XCEP XCEP 413 +arcom_vulcan MACH_ARCOM_VULCAN ARCOM_VULCAN 414 +stargate MACH_STARGATE STARGATE 415 +armadilloj MACH_ARMADILLOJ ARMADILLOJ 416 +elroy_jack MACH_ELROY_JACK ELROY_JACK 417 +backend MACH_BACKEND BACKEND 418 +s5linbox MACH_S5LINBOX S5LINBOX 419 +nomadik MACH_NOMADIK NOMADIK 420 +ia_cpu_9200 MACH_IA_CPU_9200 IA_CPU_9200 421 +at91_bja1 MACH_AT91_BJA1 AT91_BJA1 422 +corgi MACH_CORGI CORGI 423 +poodle MACH_POODLE POODLE 424 +ten MACH_TEN TEN 425 +roverp5p MACH_ROVERP5P ROVERP5P 426 +sc2700 MACH_SC2700 SC2700 427 +ex_eagle MACH_EX_EAGLE EX_EAGLE 428 +nx_pxa12 MACH_NX_PXA12 NX_PXA12 429 +nx_pxa5 MACH_NX_PXA5 NX_PXA5 430 +blackboard2 MACH_BLACKBOARD2 BLACKBOARD2 431 +i819 MACH_I819 I819 432 +ixmb995e MACH_IXMB995E IXMB995E 433 +skyrider MACH_SKYRIDER SKYRIDER 434 +skyhawk MACH_SKYHAWK SKYHAWK 435 +enterprise MACH_ENTERPRISE ENTERPRISE 436 +dep2410 MACH_DEP2410 DEP2410 437 +armcore MACH_ARMCORE ARMCORE 438 +hobbit MACH_HOBBIT HOBBIT 439 +h7210 MACH_H7210 H7210 440 +pxa_netdcu5 MACH_PXA_NETDCU5 PXA_NETDCU5 441 +acc MACH_ACC ACC 442 +esl_sarva MACH_ESL_SARVA ESL_SARVA 443 +xm250 MACH_XM250 XM250 444 +t6tc1xb MACH_T6TC1XB T6TC1XB 445 +ess710 MACH_ESS710 ESS710 446 +mx31ads MACH_MX31ADS MX31ADS 447 +himalaya MACH_HIMALAYA HIMALAYA 448 +bolfenk MACH_BOLFENK BOLFENK 449 +at91rm9200kr MACH_AT91RM9200KR AT91RM9200KR 450 +edb9312 MACH_EDB9312 EDB9312 451 +omap_generic MACH_OMAP_GENERIC OMAP_GENERIC 452 +aximx3 MACH_AXIMX3 AXIMX3 453 +eb67xdip MACH_EB67XDIP EB67XDIP 454 +webtxs MACH_WEBTXS WEBTXS 455 +hawk MACH_HAWK HAWK 456 +ccat91sbc001 MACH_CCAT91SBC001 CCAT91SBC001 457 +expresso MACH_EXPRESSO EXPRESSO 458 +h4000 MACH_H4000 H4000 459 +dino MACH_DINO DINO 460 +ml675k MACH_ML675K ML675K 461 +edb9301 MACH_EDB9301 EDB9301 462 +edb9315 MACH_EDB9315 EDB9315 463 +reciva_tt MACH_RECIVA_TT RECIVA_TT 464 +cstcb01 MACH_CSTCB01 CSTCB01 465 +cstcb1 MACH_CSTCB1 CSTCB1 466 +shadwell MACH_SHADWELL SHADWELL 467 +goepel263 MACH_GOEPEL263 GOEPEL263 468 +acq100 MACH_ACQ100 ACQ100 469 +mx1fs2 MACH_MX1FS2 MX1FS2 470 +hiptop_g1 MACH_HIPTOP_G1 HIPTOP_G1 471 +sparky MACH_SPARKY SPARKY 472 +ns9750 MACH_NS9750 NS9750 473 +phoenix MACH_PHOENIX PHOENIX 474 +vr1000 MACH_VR1000 VR1000 475 +deisterpxa MACH_DEISTERPXA DEISTERPXA 476 +bcm1160 MACH_BCM1160 BCM1160 477 +pcm022 MACH_PCM022 PCM022 478 +adsgcx MACH_ADSGCX ADSGCX 479 +dreadnaught MACH_DREADNAUGHT DREADNAUGHT 480 +dm320 MACH_DM320 DM320 481 +markov MACH_MARKOV MARKOV 482 +cos7a400 MACH_COS7A400 COS7A400 483 +milano MACH_MILANO MILANO 484 +ue9328 MACH_UE9328 UE9328 485 +uex255 MACH_UEX255 UEX255 486 +ue2410 MACH_UE2410 UE2410 487 +a620 MACH_A620 A620 488 +ocelot MACH_OCELOT OCELOT 489 +cheetah MACH_CHEETAH CHEETAH 490 +omap_perseus2 MACH_OMAP_PERSEUS2 OMAP_PERSEUS2 491 +zvue MACH_ZVUE ZVUE 492 +roverp1 MACH_ROVERP1 ROVERP1 493 +asidial2 MACH_ASIDIAL2 ASIDIAL2 494 +s3c24a0 MACH_S3C24A0 S3C24A0 495 +e800 MACH_E800 E800 496 +e750 MACH_E750 E750 497 +s3c5500 MACH_S3C5500 S3C5500 498 +smdk5500 MACH_SMDK5500 SMDK5500 499 +signalsync MACH_SIGNALSYNC SIGNALSYNC 500 +nbc MACH_NBC NBC 501 +kodiak MACH_KODIAK KODIAK 502 +netbookpro MACH_NETBOOKPRO NETBOOKPRO 503 +hw90200 MACH_HW90200 HW90200 504 +condor MACH_CONDOR CONDOR 505 +cup MACH_CUP CUP 506 +kite MACH_KITE KITE 507 +scb9328 MACH_SCB9328 SCB9328 508 +omap_h3 MACH_OMAP_H3 OMAP_H3 509 +omap_h4 MACH_OMAP_H4 OMAP_H4 510 +n10 MACH_N10 N10 511 +montejade MACH_MONTAJADE MONTAJADE 512 +sg560 MACH_SG560 SG560 513 +dp1000 MACH_DP1000 DP1000 514 +omap_osk MACH_OMAP_OSK OMAP_OSK 515 +rg100v3 MACH_RG100V3 RG100V3 516 +mx2ads MACH_MX2ADS MX2ADS 517 +pxa_kilo MACH_PXA_KILO PXA_KILO 518 +ixp4xx_eagle MACH_IXP4XX_EAGLE IXP4XX_EAGLE 519 +tosa MACH_TOSA TOSA 520 +mb2520f MACH_MB2520F MB2520F 521 +emc1000 MACH_EMC1000 EMC1000 522 +tidsc25 MACH_TIDSC25 TIDSC25 523 +akcpmxl MACH_AKCPMXL AKCPMXL 524 +av3xx MACH_AV3XX AV3XX 525 +avila MACH_AVILA AVILA 526 +pxa_mpm10 MACH_PXA_MPM10 PXA_MPM10 527 +pxa_kyanite MACH_PXA_KYANITE PXA_KYANITE 528 +sgold MACH_SGOLD SGOLD 529 +oscar MACH_OSCAR OSCAR 530 +epxa4usb2 MACH_EPXA4USB2 EPXA4USB2 531 +xsengine MACH_XSENGINE XSENGINE 532 +ip600 MACH_IP600 IP600 533 +mcan2 MACH_MCAN2 MCAN2 534 +ddi_blueridge MACH_DDI_BLUERIDGE DDI_BLUERIDGE 535 +skyminder MACH_SKYMINDER SKYMINDER 536 +lpd79520 MACH_LPD79520 LPD79520 537 +edb9302 MACH_EDB9302 EDB9302 538 +hw90340 MACH_HW90340 HW90340 539 +cip_box MACH_CIP_BOX CIP_BOX 540 +ivpn MACH_IVPN IVPN 541 +rsoc2 MACH_RSOC2 RSOC2 542 +husky MACH_HUSKY HUSKY 543 +boxer MACH_BOXER BOXER 544 +shepherd MACH_SHEPHERD SHEPHERD 545 +aml42800aa MACH_AML42800AA AML42800AA 546 +ml674001 MACH_MACH_TYPE_ML674001 MACH_TYPE_ML674001 547 +lpc2294 MACH_LPC2294 LPC2294 548 +switchgrass MACH_SWITCHGRASS SWITCHGRASS 549 +ens_cmu MACH_ENS_CMU ENS_CMU 550 +mm6_sdb MACH_MM6_SDB MM6_SDB 551 +saturn MACH_SATURN SATURN 552 +i30030evb MACH_I30030EVB I30030EVB 553 +mxc27530evb MACH_MXC27530EVB MXC27530EVB 554 +smdk2800 MACH_SMDK2800 SMDK2800 555 +mtwilson MACH_MTWILSON MTWILSON 556 +ziti MACH_ZITI ZITI 557 +grandfather MACH_GRANDFATHER GRANDFATHER 558 +tengine MACH_TENGINE TENGINE 559 +s3c2460 MACH_S3C2460 S3C2460 560 +pdm MACH_PDM PDM 561 +h4700 MACH_H4700 H4700 562 +h6300 MACH_H6300 H6300 563 +rz1700 MACH_RZ1700 RZ1700 564 +a716 MACH_A716 A716 565 +estk2440a MACH_ESTK2440A ESTK2440A 566 +atwixp425 MACH_ATWIXP425 ATWIXP425 567 +csb336 MACH_CSB336 CSB336 568 +rirm2 MACH_RIRM2 RIRM2 569 +cx23518 MACH_CX23518 CX23518 570 +cx2351x MACH_CX2351X CX2351X 571 +computime MACH_COMPUTIME COMPUTIME 572 +izarus MACH_IZARUS IZARUS 573 +pxa_rts MACH_RTS RTS 574 +se5100 MACH_SE5100 SE5100 575 +s3c2510 MACH_S3C2510 S3C2510 576 +csb437tl MACH_CSB437TL CSB437TL 577 +slauson MACH_SLAUSON SLAUSON 578 +pearlriver MACH_PEARLRIVER PEARLRIVER 579 +tdc_p210 MACH_TDC_P210 TDC_P210 580 +sg580 MACH_SG580 SG580 581 +wrsbcarm7 MACH_WRSBCARM7 WRSBCARM7 582 +ipd MACH_IPD IPD 583 +pxa_dnp2110 MACH_PXA_DNP2110 PXA_DNP2110 584 +xaeniax MACH_XAENIAX XAENIAX 585 +somn4250 MACH_SOMN4250 SOMN4250 586 +pleb2 MACH_PLEB2 PLEB2 587 +cornwallis MACH_CORNWALLIS CORNWALLIS 588 +gurney_drv MACH_GURNEY_DRV GURNEY_DRV 589 +chaffee MACH_CHAFFEE CHAFFEE 590 +rms101 MACH_RMS101 RMS101 591 +rx3715 MACH_RX3715 RX3715 592 +swift MACH_SWIFT SWIFT 593 +roverp7 MACH_ROVERP7 ROVERP7 594 +pr818s MACH_PR818S PR818S 595 +trxpro MACH_TRXPRO TRXPRO 596 +nslu2 MACH_NSLU2 NSLU2 597 +e400 MACH_E400 E400 598 +trab MACH_TRAB TRAB 599 +cmc_pu2 MACH_CMC_PU2 CMC_PU2 600 +fulcrum MACH_FULCRUM FULCRUM 601 +netgate42x MACH_NETGATE42X NETGATE42X 602 +str710 MACH_STR710 STR710 603 +ixdpg425 MACH_IXDPG425 IXDPG425 604 +tomtomgo MACH_TOMTOMGO TOMTOMGO 605 +versatile_ab MACH_VERSATILE_AB VERSATILE_AB 606 +edb9307 MACH_EDB9307 EDB9307 607 +sg565 MACH_SG565 SG565 608 +lpd79524 MACH_LPD79524 LPD79524 609 +lpd79525 MACH_LPD79525 LPD79525 610 +rms100 MACH_RMS100 RMS100 611 +kb9200 MACH_KB9200 KB9200 612 +sx1 MACH_SX1 SX1 613 +hms39c7092 MACH_HMS39C7092 HMS39C7092 614 +armadillo MACH_ARMADILLO ARMADILLO 615 +ipcu MACH_IPCU IPCU 616 +loox720 MACH_LOOX720 LOOX720 617 +ixdp465 MACH_IXDP465 IXDP465 618 +ixdp2351 MACH_IXDP2351 IXDP2351 619 +adsvix MACH_ADSVIX ADSVIX 620 +dm270 MACH_DM270 DM270 621 +socltplus MACH_SOCLTPLUS SOCLTPLUS 622 +ecia MACH_ECIA ECIA 623 +cm4008 MACH_CM4008 CM4008 624 +p2001 MACH_P2001 P2001 625 +twister MACH_TWISTER TWISTER 626 +mudshark MACH_MUDSHARK MUDSHARK 627 +hb2 MACH_HB2 HB2 628 +iq80332 MACH_IQ80332 IQ80332 629 +sendt MACH_SENDT SENDT 630 +mx2jazz MACH_MX2JAZZ MX2JAZZ 631 +multiio MACH_MULTIIO MULTIIO 632 +hrdisplay MACH_HRDISPLAY HRDISPLAY 633 +mxc27530ads MACH_MXC27530ADS MXC27530ADS 634 +trizeps3 MACH_TRIZEPS3 TRIZEPS3 635 +zefeerdza MACH_ZEFEERDZA ZEFEERDZA 636 +zefeerdzb MACH_ZEFEERDZB ZEFEERDZB 637 +zefeerdzg MACH_ZEFEERDZG ZEFEERDZG 638 +zefeerdzn MACH_ZEFEERDZN ZEFEERDZN 639 +zefeerdzq MACH_ZEFEERDZQ ZEFEERDZQ 640 +gtwx5715 MACH_GTWX5715 GTWX5715 641 +astro_jack MACH_ASTRO_JACK ASTRO_JACK 643 +tip03 MACH_TIP03 TIP03 644 +a9200ec MACH_A9200EC A9200EC 645 +pnx0105 MACH_PNX0105 PNX0105 646 +adcpoecpu MACH_ADCPOECPU ADCPOECPU 647 +csb637 MACH_CSB637 CSB637 648 +ml69q6203 MACH_ML69Q6203 ML69Q6203 649 +mb9200 MACH_MB9200 MB9200 650 +kulun MACH_KULUN KULUN 651 +snapper MACH_SNAPPER SNAPPER 652 +optima MACH_OPTIMA OPTIMA 653 +dlhsbc MACH_DLHSBC DLHSBC 654 +x30 MACH_X30 X30 655 +n30 MACH_N30 N30 656 +manga_ks8695 MACH_MANGA_KS8695 MANGA_KS8695 657 +ajax MACH_AJAX AJAX 658 +nec_mp900 MACH_NEC_MP900 NEC_MP900 659 +vvtk1000 MACH_VVTK1000 VVTK1000 661 +kafa MACH_KAFA KAFA 662 +vvtk3000 MACH_VVTK3000 VVTK3000 663 +pimx1 MACH_PIMX1 PIMX1 664 +ollie MACH_OLLIE OLLIE 665 +skymax MACH_SKYMAX SKYMAX 666 +jazz MACH_JAZZ JAZZ 667 +tel_t3 MACH_TEL_T3 TEL_T3 668 +aisino_fcr255 MACH_AISINO_FCR255 AISINO_FCR255 669 +btweb MACH_BTWEB BTWEB 670 +dbg_lh79520 MACH_DBG_LH79520 DBG_LH79520 671 +cm41xx MACH_CM41XX CM41XX 672 +ts72xx MACH_TS72XX TS72XX 673 +nggpxa MACH_NGGPXA NGGPXA 674 +csb535 MACH_CSB535 CSB535 675 +csb536 MACH_CSB536 CSB536 676 +pxa_trakpod MACH_PXA_TRAKPOD PXA_TRAKPOD 677 +praxis MACH_PRAXIS PRAXIS 678 +lh75411 MACH_LH75411 LH75411 679 +otom MACH_OTOM OTOM 680 +nexcoder_2440 MACH_NEXCODER_2440 NEXCODER_2440 681 +loox410 MACH_LOOX410 LOOX410 682 +westlake MACH_WESTLAKE WESTLAKE 683 +nsb MACH_NSB NSB 684 +esl_sarva_stn MACH_ESL_SARVA_STN ESL_SARVA_STN 685 +esl_sarva_tft MACH_ESL_SARVA_TFT ESL_SARVA_TFT 686 +esl_sarva_iad MACH_ESL_SARVA_IAD ESL_SARVA_IAD 687 +esl_sarva_acc MACH_ESL_SARVA_ACC ESL_SARVA_ACC 688 +typhoon MACH_TYPHOON TYPHOON 689 +cnav MACH_CNAV CNAV 690 +a730 MACH_A730 A730 691 +netstar MACH_NETSTAR NETSTAR 692 +supercon MACH_PHASEFALE_SUPERCON PHASEFALE_SUPERCON 693 +shiva1100 MACH_SHIVA1100 SHIVA1100 694 +etexsc MACH_ETEXSC ETEXSC 695 +ixdpg465 MACH_IXDPG465 IXDPG465 696 +a9m2410 MACH_A9M2410 A9M2410 697 +a9m2440 MACH_A9M2440 A9M2440 698 +a9m9750 MACH_A9M9750 A9M9750 699 +a9m9360 MACH_A9M9360 A9M9360 700 +unc90 MACH_UNC90 UNC90 701 +eco920 MACH_ECO920 ECO920 702 +satview MACH_SATVIEW SATVIEW 703 +roadrunner MACH_ROADRUNNER ROADRUNNER 704 +at91rm9200ek MACH_AT91RM9200EK AT91RM9200EK 705 +gp32 MACH_GP32 GP32 706 +gem MACH_GEM GEM 707 +i858 MACH_I858 I858 708 +hx2750 MACH_HX2750 HX2750 709 +mxc91131evb MACH_MXC91131EVB MXC91131EVB 710 +p700 MACH_P700 P700 711 +cpe MACH_CPE CPE 712 +spitz MACH_SPITZ SPITZ 713 +nimbra340 MACH_NIMBRA340 NIMBRA340 714 +lpc22xx MACH_LPC22XX LPC22XX 715 +omap_comet3 MACH_COMET3 COMET3 716 +omap_comet4 MACH_COMET4 COMET4 717 +csb625 MACH_CSB625 CSB625 718 +fortunet2 MACH_FORTUNET2 FORTUNET2 719 +s5h2200 MACH_S5H2200 S5H2200 720 +optorm920 MACH_OPTORM920 OPTORM920 721 +adsbitsyxb MACH_ADSBITSYXB ADSBITSYXB 722 +adssphere MACH_ADSSPHERE ADSSPHERE 723 +adsportal MACH_ADSPORTAL ADSPORTAL 724 +ln2410sbc MACH_LN2410SBC LN2410SBC 725 +cb3rufc MACH_CB3RUFC CB3RUFC 726 +mp2usb MACH_MP2USB MP2USB 727 +ntnp425c MACH_NTNP425C NTNP425C 728 +colibri MACH_COLIBRI COLIBRI 729 +pcm7220 MACH_PCM7220 PCM7220 730 +gateway7001 MACH_GATEWAY7001 GATEWAY7001 731 +pcm027 MACH_PCM027 PCM027 732 +cmpxa MACH_CMPXA CMPXA 733 +anubis MACH_ANUBIS ANUBIS 734 +ite8152 MACH_ITE8152 ITE8152 735 +lpc3xxx MACH_LPC3XXX LPC3XXX 736 +puppeteer MACH_PUPPETEER PUPPETEER 737 +vt001 MACH_MACH_VADATECH MACH_VADATECH 738 +e570 MACH_E570 E570 739 +x50 MACH_X50 X50 740 +recon MACH_RECON RECON 741 +xboardgp8 MACH_XBOARDGP8 XBOARDGP8 742 +fpic2 MACH_FPIC2 FPIC2 743 +akita MACH_AKITA AKITA 744 +a81 MACH_A81 A81 745 +svm_sc25x MACH_SVM_SC25X SVM_SC25X 746 +vt020 MACH_VADATECH020 VADATECH020 747 +tli MACH_TLI TLI 748 +edb9315lc MACH_EDB9315LC EDB9315LC 749 +passec MACH_PASSEC PASSEC 750 +ds_tiger MACH_DS_TIGER DS_TIGER 751 +e310 MACH_E310 E310 752 +e330 MACH_E330 E330 753 +rt3000 MACH_RT3000 RT3000 754 +nokia770 MACH_NOKIA770 NOKIA770 755 +pnx0106 MACH_PNX0106 PNX0106 756 +hx21xx MACH_HX21XX HX21XX 757 +faraday MACH_FARADAY FARADAY 758 +sbc9312 MACH_SBC9312 SBC9312 759 +batman MACH_BATMAN BATMAN 760 +jpd201 MACH_JPD201 JPD201 761 +mipsa MACH_MIPSA MIPSA 762 +kacom MACH_KACOM KACOM 763 +swarcocpu MACH_SWARCOCPU SWARCOCPU 764 +swarcodsl MACH_SWARCODSL SWARCODSL 765 +blueangel MACH_BLUEANGEL BLUEANGEL 766 +hairygrama MACH_HAIRYGRAMA HAIRYGRAMA 767 +banff MACH_BANFF BANFF 768 +carmeva MACH_CARMEVA CARMEVA 769 +sam255 MACH_SAM255 SAM255 770 +ppm10 MACH_PPM10 PPM10 771 +edb9315a MACH_EDB9315A EDB9315A 772 +sunset MACH_SUNSET SUNSET 773 +stargate2 MACH_STARGATE2 STARGATE2 774 +intelmote2 MACH_INTELMOTE2 INTELMOTE2 775 +trizeps4 MACH_TRIZEPS4 TRIZEPS4 776 +mainstone2 MACH_MAINSTONE2 MAINSTONE2 777 +ez_ixp42x MACH_EZ_IXP42X EZ_IXP42X 778 +tapwave_zodiac MACH_TAPWAVE_ZODIAC TAPWAVE_ZODIAC 779 +universalmeter MACH_UNIVERSALMETER UNIVERSALMETER 780 +hicoarm9 MACH_HICOARM9 HICOARM9 781 +pnx4008 MACH_PNX4008 PNX4008 782 +kws6000 MACH_KWS6000 KWS6000 783 +portux920t MACH_PORTUX920T PORTUX920T 784 +ez_x5 MACH_EZ_X5 EZ_X5 785 +omap_rudolph MACH_OMAP_RUDOLPH OMAP_RUDOLPH 786 +cpuat91 MACH_CPUAT91 CPUAT91 787 +rea9200 MACH_REA9200 REA9200 788 +acts_pune_sa1110 MACH_ACTS_PUNE_SA1110 ACTS_PUNE_SA1110 789 +ixp425 MACH_IXP425 IXP425 790 +i30030ads MACH_I30030ADS I30030ADS 791 +perch MACH_PERCH PERCH 792 +eis05r1 MACH_EIS05R1 EIS05R1 793 +pepperpad MACH_PEPPERPAD PEPPERPAD 794 +sb3010 MACH_SB3010 SB3010 795 +rm9200 MACH_RM9200 RM9200 796 +dma03 MACH_DMA03 DMA03 797 +road_s101 MACH_ROAD_S101 ROAD_S101 798 +iq_nextgen_a MACH_IQ_NEXTGEN_A IQ_NEXTGEN_A 799 +iq_nextgen_b MACH_IQ_NEXTGEN_B IQ_NEXTGEN_B 800 +iq_nextgen_c MACH_IQ_NEXTGEN_C IQ_NEXTGEN_C 801 +iq_nextgen_d MACH_IQ_NEXTGEN_D IQ_NEXTGEN_D 802 +iq_nextgen_e MACH_IQ_NEXTGEN_E IQ_NEXTGEN_E 803 +mallow_at91 MACH_MALLOW_AT91 MALLOW_AT91 804 +cybertracker_i MACH_CYBERTRACKER_I CYBERTRACKER_I 805 +gesbc931x MACH_GESBC931X GESBC931X 806 +centipad MACH_CENTIPAD CENTIPAD 807 +armsoc MACH_ARMSOC ARMSOC 808 +se4200 MACH_SE4200 SE4200 809 +ems197a MACH_EMS197A EMS197A 810 +micro9 MACH_MICRO9 MICRO9 811 +micro9l MACH_MICRO9L MICRO9L 812 +uc5471dsp MACH_UC5471DSP UC5471DSP 813 +sj5471eng MACH_SJ5471ENG SJ5471ENG 814 +none MACH_CMPXA26X CMPXA26X 815 +nc1 MACH_NC NC 816 +omap_palmte MACH_OMAP_PALMTE OMAP_PALMTE 817 +ajax52x MACH_AJAX52X AJAX52X 818 +siriustar MACH_SIRIUSTAR SIRIUSTAR 819 +iodata_hdlg MACH_IODATA_HDLG IODATA_HDLG 820 +at91rm9200utl MACH_AT91RM9200UTL AT91RM9200UTL 821 +biosafe MACH_BIOSAFE BIOSAFE 822 +mp1000 MACH_MP1000 MP1000 823 +parsy MACH_PARSY PARSY 824 +ccxp270 MACH_CCXP CCXP 825 +omap_gsample MACH_OMAP_GSAMPLE OMAP_GSAMPLE 826 +realview_eb MACH_REALVIEW_EB REALVIEW_EB 827 +samoa MACH_SAMOA SAMOA 828 +t3xscale MACH_T3XSCALE T3XSCALE 829 +i878 MACH_I878 I878 830 +borzoi MACH_BORZOI BORZOI 831 +gecko MACH_GECKO GECKO 832 +ds101 MACH_DS101 DS101 833 +omap_palmtt2 MACH_OMAP_PALMTT2 OMAP_PALMTT2 834 +xscale_palmld MACH_XSCALE_PALMLD XSCALE_PALMLD 835 +cc9c MACH_CC9C CC9C 836 +sbc1670 MACH_SBC1670 SBC1670 837 +ixdp28x5 MACH_IXDP28X5 IXDP28X5 838 +omap_palmtt MACH_OMAP_PALMTT OMAP_PALMTT 839 +ml696k MACH_ML696K ML696K 840 +arcom_zeus MACH_ARCOM_ZEUS ARCOM_ZEUS 841 +osiris MACH_OSIRIS OSIRIS 842 +maestro MACH_MAESTRO MAESTRO 843 +tunge2 MACH_TUNGE2 TUNGE2 844 +ixbbm MACH_IXBBM IXBBM 845 +mx27ads MACH_MX27 MX27 846 +ax8004 MACH_AX8004 AX8004 847 +at91sam9261ek MACH_AT91SAM9261EK AT91SAM9261EK 848 +loft MACH_LOFT LOFT 849 +magpie MACH_MAGPIE MAGPIE 850 +mx21ads MACH_MX21 MX21 851 +mb87m3400 MACH_MB87M3400 MB87M3400 852 +mguard_delta MACH_MGUARD_DELTA MGUARD_DELTA 853 +davinci_dvdp MACH_DAVINCI_DVDP DAVINCI_DVDP 854 +htcuniversal MACH_HTCUNIVERSAL HTCUNIVERSAL 855 +tpad MACH_TPAD TPAD 856 +roverp3 MACH_ROVERP3 ROVERP3 857 +jornada928 MACH_JORNADA928 JORNADA928 858 +mv88fxx81 MACH_MV88FXX81 MV88FXX81 859 +stmp36xx MACH_STMP36XX STMP36XX 860 +sxni79524 MACH_SXNI79524 SXNI79524 861 +ams_delta MACH_AMS_DELTA AMS_DELTA 862 +uranium MACH_URANIUM URANIUM 863 +ucon MACH_UCON UCON 864 +nas100d MACH_NAS100D NAS100D 865 +l083 MACH_L083_1000 L083_1000 866 +ezx MACH_EZX EZX 867 +pnx5220 MACH_PNX5220 PNX5220 868 +butte MACH_BUTTE BUTTE 869 +srm2 MACH_SRM2 SRM2 870 +dsbr MACH_DSBR DSBR 871 +crystalball MACH_CRYSTALBALL CRYSTALBALL 872 +tinypxa27x MACH_TINYPXA27X TINYPXA27X 873 +herbie MACH_HERBIE HERBIE 874 +magician MACH_MAGICIAN MAGICIAN 875 +cm4002 MACH_CM4002 CM4002 876 +b4 MACH_B4 B4 877 +maui MACH_MAUI MAUI 878 +cybertracker_g MACH_CYBERTRACKER_G CYBERTRACKER_G 879 +nxdkn MACH_NXDKN NXDKN 880 +mio8390 MACH_MIO8390 MIO8390 881 +omi_board MACH_OMI_BOARD OMI_BOARD 882 +mx21civ MACH_MX21CIV MX21CIV 883 +mahi_cdac MACH_MAHI_CDAC MAHI_CDAC 884 +xscale_palmtx MACH_XSCALE_PALMTX XSCALE_PALMTX 885 +s3c2413 MACH_S3C2413 S3C2413 887 +samsys_ep0 MACH_SAMSYS_EP0 SAMSYS_EP0 888 +wg302v1 MACH_WG302V1 WG302V1 889 +wg302v2 MACH_WG302V2 WG302V2 890 +eb42x MACH_EB42X EB42X 891 +iq331es MACH_IQ331ES IQ331ES 892 +cosydsp MACH_COSYDSP COSYDSP 893 +uplat7d_proto MACH_UPLAT7D UPLAT7D 894 +ptdavinci MACH_PTDAVINCI PTDAVINCI 895 +mbus MACH_MBUS MBUS 896 +nadia2vb MACH_NADIA2VB NADIA2VB 897 +r1000 MACH_R1000 R1000 898 +hw90250 MACH_HW90250 HW90250 899 +omap_2430sdp MACH_OMAP_2430SDP OMAP_2430SDP 900 +davinci_evm MACH_DAVINCI_EVM DAVINCI_EVM 901 +omap_tornado MACH_OMAP_TORNADO OMAP_TORNADO 902 +olocreek MACH_OLOCREEK OLOCREEK 903 +palmz72 MACH_PALMZ72 PALMZ72 904 +nxdb500 MACH_NXDB500 NXDB500 905 +apf9328 MACH_APF9328 APF9328 906 +omap_wipoq MACH_OMAP_WIPOQ OMAP_WIPOQ 907 +omap_twip MACH_OMAP_TWIP OMAP_TWIP 908 +xscale_treo650 MACH_XSCALE_PALMTREO650 XSCALE_PALMTREO650 909 +acumen MACH_ACUMEN ACUMEN 910 +xp100 MACH_XP100 XP100 911 +fs2410 MACH_FS2410 FS2410 912 +pxa270_cerf MACH_PXA270_CERF PXA270_CERF 913 +sq2ftlpalm MACH_SQ2FTLPALM SQ2FTLPALM 914 +bsemserver MACH_BSEMSERVER BSEMSERVER 915 +netclient MACH_NETCLIENT NETCLIENT 916 +xscale_palmtt5 MACH_XSCALE_PALMTT5 XSCALE_PALMTT5 917 +xscale_palmtc MACH_OMAP_PALMTC OMAP_PALMTC 918 +omap_apollon MACH_OMAP_APOLLON OMAP_APOLLON 919 +mxc30030evb MACH_MXC30030EVB MXC30030EVB 920 +rea_2d MACH_REA_2D REA_2D 921 +eti3e524 MACH_TI3E524 TI3E524 922 +ateb9200 MACH_ATEB9200 ATEB9200 923 +auckland MACH_AUCKLAND AUCKLAND 924 +ak3220m MACH_AK3320M AK3320M 925 +duramax MACH_DURAMAX DURAMAX 926 +n35 MACH_N35 N35 927 +pronghorn MACH_PRONGHORN PRONGHORN 928 +fundy MACH_FUNDY FUNDY 929 +logicpd_pxa270 MACH_LOGICPD_PXA270 LOGICPD_PXA270 930 +cpu777 MACH_CPU777 CPU777 931 +simicon9201 MACH_SIMICON9201 SIMICON9201 932 +leap2_hpm MACH_LEAP2_HPM LEAP2_HPM 933 +cm922txa10 MACH_CM922TXA10 CM922TXA10 934 +sandgate MACH_PXA PXA 935 +sandgate2 MACH_SANDGATE2 SANDGATE2 936 +sandgate2g MACH_SANDGATE2G SANDGATE2G 937 +sandgate2p MACH_SANDGATE2P SANDGATE2P 938 +fred_jack MACH_FRED_JACK FRED_JACK 939 +ttg_color1 MACH_TTG_COLOR1 TTG_COLOR1 940 +nxeb500hmi MACH_NXEB500HMI NXEB500HMI 941 +netdcu8 MACH_NETDCU8 NETDCU8 942 +ml675050_cpu_boa MACH_ML675050_CPU_BOA ML675050_CPU_BOA 943 +ng_fvx538 MACH_NG_FVX538 NG_FVX538 944 +ng_fvs338 MACH_NG_FVS338 NG_FVS338 945 +pnx4103 MACH_PNX4103 PNX4103 946 +hesdb MACH_HESDB HESDB 947 +xsilo MACH_XSILO XSILO 948 +espresso MACH_ESPRESSO ESPRESSO 949 +emlc MACH_EMLC EMLC 950 +sisteron MACH_SISTERON SISTERON 951 +rx1950 MACH_RX1950 RX1950 952 +tsc_venus MACH_TSC_VENUS TSC_VENUS 953 +ds101j MACH_DS101J DS101J 954 +mxc30030ads MACH_MXC30030ADS MXC30030ADS 955 +fujitsu_wimaxsoc MACH_FUJITSU_WIMAXSOC FUJITSU_WIMAXSOC 956 +dualpcmodem MACH_DUALPCMODEM DUALPCMODEM 957 +gesbc9312 MACH_GESBC9312 GESBC9312 958 +htcapache MACH_HTCAPACHE HTCAPACHE 959 +ixdp435 MACH_IXDP435 IXDP435 960 +catprovt100 MACH_CATPROVT100 CATPROVT100 961 +picotux1xx MACH_PICOTUX1XX PICOTUX1XX 962 +picotux2xx MACH_PICOTUX2XX PICOTUX2XX 963 +dsmg600 MACH_DSMG600 DSMG600 964 +empc2 MACH_EMPC2 EMPC2 965 +ventura MACH_VENTURA VENTURA 966 +phidget_sbc MACH_PHIDGET_SBC PHIDGET_SBC 967 +ij3k MACH_IJ3K IJ3K 968 +pisgah MACH_PISGAH PISGAH 969 +omap_fsample MACH_OMAP_FSAMPLE OMAP_FSAMPLE 970 +sg720 MACH_SG720 SG720 971 +redfox MACH_REDFOX REDFOX 972 +mysh_ep9315_1 MACH_MYSH_EP9315_1 MYSH_EP9315_1 973 +tpf106 MACH_TPF106 TPF106 974 +at91rm9200kg MACH_AT91RM9200KG AT91RM9200KG 975 +rcmt2 MACH_SLEDB SLEDB 976 +ontrack MACH_ONTRACK ONTRACK 977 +pm1200 MACH_PM1200 PM1200 978 +ess24562 MACH_ESS24XXX ESS24XXX 979 +coremp7 MACH_COREMP7 COREMP7 980 +nexcoder_6446 MACH_NEXCODER_6446 NEXCODER_6446 981 +stvc8380 MACH_STVC8380 STVC8380 982 +teklynx MACH_TEKLYNX TEKLYNX 983 +carbonado MACH_CARBONADO CARBONADO 984 +sysmos_mp730 MACH_SYSMOS_MP730 SYSMOS_MP730 985 +snapper_cl15 MACH_SNAPPER_CL15 SNAPPER_CL15 986 +pgigim MACH_PGIGIM PGIGIM 987 +ptx9160p2 MACH_PTX9160P2 PTX9160P2 988 +dcore1 MACH_DCORE1 DCORE1 989 +victorpxa MACH_VICTORPXA VICTORPXA 990 +mx2dtb MACH_MX2DTB MX2DTB 991 +pxa_irex_er0100 MACH_PXA_IREX_ER0100 PXA_IREX_ER0100 992 +omap_palmz71 MACH_OMAP_PALMZ71 OMAP_PALMZ71 993 +bartec_deg MACH_BARTEC_DEG BARTEC_DEG 994 +hw50251 MACH_HW50251 HW50251 995 +ibox MACH_IBOX IBOX 996 +atlaslh7a404 MACH_ATLASLH7A404 ATLASLH7A404 997 +pt2026 MACH_PT2026 PT2026 998 +htcalpine MACH_HTCALPINE HTCALPINE 999 +bartec_vtu MACH_BARTEC_VTU BARTEC_VTU 1000 +vcoreii MACH_VCOREII VCOREII 1001 +pdnb3 MACH_PDNB3 PDNB3 1002 +htcbeetles MACH_HTCBEETLES HTCBEETLES 1003 +s3c6400 MACH_S3C6400 S3C6400 1004 +s3c2443 MACH_S3C2443 S3C2443 1005 +omap_ldk MACH_OMAP_LDK OMAP_LDK 1006 +smdk2460 MACH_SMDK2460 SMDK2460 1007 +smdk2440 MACH_SMDK2440 SMDK2440 1008 +smdk2412 MACH_SMDK2412 SMDK2412 1009 +webbox MACH_WEBBOX WEBBOX 1010 +cwwndp MACH_CWWNDP CWWNDP 1011 +i839 MACH_DRAGON DRAGON 1012 +opendo_cpu_board MACH_OPENDO_CPU_BOARD OPENDO_CPU_BOARD 1013 +ccm2200 MACH_CCM2200 CCM2200 1014 +etwarm MACH_ETWARM ETWARM 1015 +m93030 MACH_M93030 M93030 1016 +cc7u MACH_CC7U CC7U 1017 +mtt_ranger MACH_MTT_RANGER MTT_RANGER 1018 +nexus MACH_NEXUS NEXUS 1019 +desman MACH_DESMAN DESMAN 1020 +bkde303 MACH_BKDE303 BKDE303 1021 +smdk2413 MACH_SMDK2413 SMDK2413 1022 +aml_m7200 MACH_AML_M7200 AML_M7200 1023 +aml_m5900 MACH_AML_M5900 AML_M5900 1024 +sg640 MACH_SG640 SG640 1025 +edg79524 MACH_EDG79524 EDG79524 1026 +ai2410 MACH_AI2410 AI2410 1027 +ixp465 MACH_IXP465 IXP465 1028 +balloon3 MACH_BALLOON3 BALLOON3 1029 +heins MACH_HEINS HEINS 1030 +mpluseva MACH_MPLUSEVA MPLUSEVA 1031 +rt042 MACH_RT042 RT042 1032 +cwiem MACH_CWIEM CWIEM 1033 +cm_x270 MACH_CM_X270 CM_X270 1034 +cm_x255 MACH_CM_X255 CM_X255 1035 +esh_at91 MACH_ESH_AT91 ESH_AT91 1036 +sandgate3 MACH_SANDGATE3 SANDGATE3 1037 +primo MACH_PRIMO PRIMO 1038 +gemstone MACH_GEMSTONE GEMSTONE 1039 +pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040 +sidewinder MACH_SIDEWINDER SIDEWINDER 1041 +picomod1 MACH_PICOMOD1 PICOMOD1 1042 +sg590 MACH_SG590 SG590 1043 +akai9307 MACH_AKAI9307 AKAI9307 1044 +fontaine MACH_FONTAINE FONTAINE 1045 +wombat MACH_WOMBAT WOMBAT 1046 +acq300 MACH_ACQ300 ACQ300 1047 +mod_270 MACH_MOD_270 MOD_270 1048 +vmc_vc0820 MACH_VC0820 VC0820 1049 +ani_aim MACH_ANI_AIM ANI_AIM 1050 +jellyfish MACH_JELLYFISH JELLYFISH 1051 +amanita MACH_AMANITA AMANITA 1052 +vlink MACH_VLINK VLINK 1053 +dexflex MACH_DEXFLEX DEXFLEX 1054 +eigen_ttq MACH_EIGEN_TTQ EIGEN_TTQ 1055 +arcom_titan MACH_ARCOM_TITAN ARCOM_TITAN 1056 +tabla MACH_TABLA TABLA 1057 +mdirac3 MACH_MDIRAC3 MDIRAC3 1058 +mrhfbp2 MACH_MRHFBP2 MRHFBP2 1059 +at91rm9200rb MACH_AT91RM9200RB AT91RM9200RB 1060 +ani_apm MACH_ANI_APM ANI_APM 1061 +ella1 MACH_ELLA1 ELLA1 1062 +inhand_pxa27x MACH_INHAND_PXA27X INHAND_PXA27X 1063 +inhand_pxa25x MACH_INHAND_PXA25X INHAND_PXA25X 1064 +empos_xm MACH_EMPOS_XM EMPOS_XM 1065 +empos MACH_EMPOS EMPOS 1066 +empos_tiny MACH_EMPOS_TINY EMPOS_TINY 1067 +empos_sm MACH_EMPOS_SM EMPOS_SM 1068 +egret MACH_EGRET EGRET 1069 +ostrich MACH_OSTRICH OSTRICH 1070 +n50 MACH_N50 N50 1071 +ecbat91 MACH_ECBAT91 ECBAT91 1072 +stareast MACH_STAREAST STAREAST 1073 +dspg_dw MACH_DSPG_DW DSPG_DW 1074 +onearm MACH_ONEARM ONEARM 1075 +mrg110_6 MACH_MRG110_6 MRG110_6 1076 +wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077 +xm_bulverde MACH_XM_BULVERDE XM_BULVERDE 1078 +msm6100 MACH_MSM6100 MSM6100 1079 +eti_b1 MACH_ETI_B1 ETI_B1 1080 +za9l_series MACH_ZILOG_ZA9L ZILOG_ZA9L 1081 +bit2440 MACH_BIT2440 BIT2440 1082 +nbi MACH_NBI NBI 1083 +smdk2443 MACH_SMDK2443 SMDK2443 1084 +vdavinci MACH_VDAVINCI VDAVINCI 1085 +atc6 MACH_ATC6 ATC6 1086 +multmdw MACH_MULTMDW MULTMDW 1087 +mba2440 MACH_MBA2440 MBA2440 1088 +ecsd MACH_ECSD ECSD 1089 +zire31 MACH_ZIRE31 ZIRE31 1090 +fsg MACH_FSG FSG 1091 +razor101 MACH_RAZOR101 RAZOR101 1092 +opera_tdm MACH_OPERA_TDM OPERA_TDM 1093 +comcerto MACH_COMCERTO COMCERTO 1094 +tb0319 MACH_TB0319 TB0319 1095 +kws8000 MACH_KWS8000 KWS8000 1096 +b2 MACH_B2 B2 1097 +lcl54 MACH_LCL54 LCL54 1098 +at91sam9260ek MACH_AT91SAM9260EK AT91SAM9260EK 1099 diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes-r0.patch b/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes-r0.patch new file mode 100644 index 0000000000..d77e9d8fbd --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes-r0.patch @@ -0,0 +1,599 @@ +Index: linux-2.6.17/drivers/mtd/nand/cm-x270.c +=================================================================== +--- linux-2.6.17.orig/drivers/mtd/nand/cm-x270.c 2006-07-18 15:40:10.000000000 +0100 ++++ linux-2.6.17/drivers/mtd/nand/cm-x270.c 2006-07-19 15:35:18.000000000 +0100 +@@ -1,7 +1,13 @@ + /* +- * drivers/mtd/nand/cm-x270.c ++ * linux/drivers/mtd/nand/cmx270-nand.c ++ * ++ * Copyright (C) 2006 Compulab, Ltd. ++ * Mike Rapoport <mike@compulab.co.il> ++ * ++ * Derived from drivers/mtd/nand/h1910.c ++ * Copyright (C) 2002 Marius Gröger (mag@sysgo.de) ++ * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de) + * +- * Copyright (c) 2006, 8D Technologies inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as +@@ -9,397 +15,269 @@ + * + * Overview: + * This is a device driver for the NAND flash device found on the +- * cm-x270 compulab SBC. +- * +- * Changelog: +- * - April 2006, Raphael Assenat <raph@8d.com>: +- * Creation of the driver. ++ * CM-X270 board. + */ + +-#include <linux/delay.h> ++#include <linux/slab.h> ++#include <linux/init.h> ++#include <linux/module.h> + #include <linux/mtd/mtd.h> + #include <linux/mtd/nand.h> + #include <linux/mtd/partitions.h> +-#include <asm/hardware.h> ++ + #include <asm/io.h> ++#include <asm/irq.h> ++ ++#include <asm/arch/hardware.h> + #include <asm/arch/pxa-regs.h> +-#include <asm/arch/cm-x270.h> + ++#define GPIO_NAND_CS (11) ++#define GPIO_NAND_RB (89) + +-static struct mtd_info *cmx270_mtd = NULL; +-static void *cmx270_nand_io_base; +-#define OFFSET_BASE 0 +-#define OFFSET_CLE 4 +-#define OFFSET_ALE 8 +- +-#define DEFAULT_NUM_PARTITIONS 1 +-static int nr_partitions; +-static struct mtd_partition cmx270_default_partition_info[] = { +- { +- .name = "rootfs", +- .offset = 0, +- .size = MTDPART_SIZ_FULL, +- }, +-}; ++/* This macro needed to ensure in-order operation of GPIO and local ++ * bus. Without both asm command and dummy uncached read there're ++ * states when NAND access is broken. I've looked for such macro(s) in ++ * include/asm-arm but found nothing approptiate. ++ * dmac_clean_range is close, but is makes cache invalidation ++ * unnecessary here and it cannot be used in module ++ */ ++#define DRAIN_WB() \ ++ do { \ ++ unsigned char dummy; \ ++ asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \ ++ dummy=*((unsigned char*)UNCACHED_ADDR); \ ++ } while(0) + +-static void cmx270_nand_hwcontrol(struct mtd_info *mtd, int cmd) +-{ +- udelay(1); +- switch(cmd) ++/* MTD structure for CM-X270 board */ ++static struct mtd_info *cmx270_nand_mtd; ++ ++/* remaped IO address of the device */ ++static void __iomem *cmx270_nand_io; ++ ++/* ++ * Define static partitions for flash device ++ */ ++static struct mtd_partition partition_info[] = { + { +- case NAND_CTL_SETNCE: +- GPCR(CM_X270_GPIO_NAND_CS) = GPIO_bit(CM_X270_GPIO_NAND_CS); +- break; +- case NAND_CTL_CLRNCE: +- GPSR(CM_X270_GPIO_NAND_CS) = GPIO_bit(CM_X270_GPIO_NAND_CS); +- break; ++ .name = "cmx270-0", ++ .offset = 0, ++ .size = MTDPART_SIZ_FULL + } +- udelay(1); +-} +- +-static int cmx270_nand_device_ready(struct mtd_info *mtd) +-{ +- /* I was getting ecc errors on reads, but adding this delay +- made the problem disappear. There is probably a timing +- issue somewhere. */ +- //ndelay (500); +- udelay (25); ++}; ++#define NUM_PARTITIONS (ARRAY_SIZE(partition_info)) + +- return GPLR(CM_X270_GPIO_NAND_RB) & GPIO_bit(CM_X270_GPIO_NAND_RB); +-} ++const char *part_probes[] = { "cmdlinepart", NULL }; + +-static u_char cmx270_nand_read_byte(struct mtd_info *mtd) ++static u_char cmx270_read_byte(struct mtd_info *mtd) + { + struct nand_chip *this = mtd->priv; +-// unsigned long raw = readl(this->IO_ADDR_R); +- unsigned char res = ( readl(this->IO_ADDR_R) >> 16 ) & 0xff; +- return res; +-} + +-static void cmx270_nand_write_byte(struct mtd_info *mtd, u_char byte) +-{ +- struct nand_chip *this = mtd->priv; +- writel( (byte<<16), this->IO_ADDR_W ); +- udelay(1); ++ return (readl(this->IO_ADDR_R) >> 16); + } + +-static void cmx270_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) ++static void cmx270_write_buf(struct mtd_info *mtd, const u_char *buf, int len) + { + int i; + struct nand_chip *this = mtd->priv; + + for (i=0; i<len; i++) +- writel((buf[i]<<16), this->IO_ADDR_W); +- udelay(1); ++ writel((*buf++ << 16), this->IO_ADDR_W); + } + +-static void cmx270_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) ++static void cmx270_read_buf(struct mtd_info *mtd, u_char *buf, int len) + { + int i; + struct nand_chip *this = mtd->priv; + + for (i=0; i<len; i++) +- buf[i] = (readl(this->IO_ADDR_R) >> 16 ) & 0xff; +- udelay(1); ++ *buf++ = readl(this->IO_ADDR_R) >> 16; + } + +-static int cmx270_nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) ++static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) + { + int i; + struct nand_chip *this = mtd->priv; + + for (i=0; i<len; i++) +- if (buf[i] != ((readl(this->IO_ADDR_R) >> 16) & 0xff)) ++ if (buf[i] != (u_char)(readl(this->IO_ADDR_R) >> 16)) + return -EFAULT; +- udelay(1); + + return 0; + } + +-static void cmx270_nand_write_ALE(struct mtd_info *mtd, const u_char byte) ++static inline void nand_cs_on(void) + { +- struct nand_chip *this = mtd->priv; +- writel( byte << 16 , this->IO_ADDR_W + OFFSET_ALE); +- udelay(1); ++ GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS); + } + +-static void cmx270_nand_write_CLE(struct mtd_info *mtd, const u_char byte) ++static void nand_cs_off(void) + { +- struct nand_chip *this = mtd->priv; +- writel( byte << 16 , this->IO_ADDR_W + OFFSET_CLE); +- udelay(1); ++ DRAIN_WB(); ++ ++ GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS); + } + +-/* Same as nand_core:nand_command() but with different memory +- * addresses for writing to ALE and CLE and without 16 bit support. ++/* ++ * hardware specific access to control-lines + */ +-static void cmx270_nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) ++static void cmx270_hwcontrol(struct mtd_info *mtd, int cmd) + { +- register struct nand_chip *this = mtd->priv; ++ struct nand_chip* this = (struct nand_chip *) (mtd->priv); ++ unsigned int nandaddr = (unsigned int)this->IO_ADDR_R; + +-// printk("cmd: 0x%02x col: 0x%x page_addr: 0x%x\n", +-// command, column, page_addr); +- +- if (command == NAND_CMD_SEQIN) { +- int readcmd; +- +- if (column >= mtd->oobblock) { +- /* OOB area */ +- column -= mtd->oobblock; +- readcmd = NAND_CMD_READOOB; +- } else if (column < 256) { +- /* First 256 bytes --> READ0 */ +- readcmd = NAND_CMD_READ0; +- } else { +- column -= 256; +- readcmd = NAND_CMD_READ1; +- } +- cmx270_nand_write_CLE(mtd, readcmd); +- } +- cmx270_nand_write_CLE(mtd, command); ++ DRAIN_WB(); + +- if (column != -1 || page_addr != -1) { +- +- /* Serially input address */ +- if (column != -1) { +- cmx270_nand_write_ALE(mtd, column); +- } +- if (page_addr != -1) { +- cmx270_nand_write_ALE(mtd, (unsigned char) (page_addr & 0xff)); +- cmx270_nand_write_ALE(mtd, (unsigned char) ((page_addr >> 8) & 0xff)); +- /* One more address cycle for devices > 32MiB */ +- if (this->chipsize > (32 << 20)) +- cmx270_nand_write_ALE(mtd, (unsigned char) ((page_addr >> 16) & 0x0f)); +- } +- } ++ switch(cmd) { + +- /* +- * program and erase have their own busy handlers +- * status and sequential in needs no delay +- */ +- switch (command) { +- +- case NAND_CMD_PAGEPROG: +- case NAND_CMD_ERASE1: +- case NAND_CMD_ERASE2: +- case NAND_CMD_SEQIN: +- case NAND_CMD_STATUS: +- return; +- +- case NAND_CMD_RESET: +- if (this->dev_ready) +- break; +- udelay(this->chip_delay); +- cmx270_nand_write_CLE(mtd, NAND_CMD_STATUS); +- while ( !(this->read_byte(mtd) & 0x40)); +- return; +- +- /* This applies to read commands */ +- default: +- /* +- * If we don't have access to the busy pin, we apply the given +- * command delay +- */ +- if (!this->dev_ready) { +- udelay(this->chip_delay); +- return; +- } +- } +- +- /* Apply this short delay always to ensure that we do wait tWB in +- * any case on any machine. */ +- ndelay (100); +- /* wait until command is processed */ +- while (!this->dev_ready(mtd)); +- ndelay (100); ++ case NAND_CTL_SETCLE: ++ nandaddr |= (1 << 2); ++ this->IO_ADDR_R = (void __iomem*)nandaddr; ++ this->IO_ADDR_W = (void __iomem*)nandaddr; ++ break; ++ case NAND_CTL_CLRCLE: ++ nandaddr &= ~(1 << 2); ++ this->IO_ADDR_R = (void __iomem*)nandaddr; ++ this->IO_ADDR_W = (void __iomem*)nandaddr; ++ break; ++ ++ case NAND_CTL_SETALE: ++ nandaddr |= (1 << 3); ++ this->IO_ADDR_R = (void __iomem*)nandaddr; ++ this->IO_ADDR_W = (void __iomem*)nandaddr; ++ break; ++ case NAND_CTL_CLRALE: ++ nandaddr &= ~(1 << 3); ++ this->IO_ADDR_R = (void __iomem*)nandaddr; ++ this->IO_ADDR_W = (void __iomem*)nandaddr; ++ break; ++ ++ case NAND_CTL_SETNCE: ++ nand_cs_on(); ++ break; ++ case NAND_CTL_CLRNCE: ++ nand_cs_off(); ++ break; ++ } ++ ++ DRAIN_WB(); + } + +-/* Same as nand_core:nand_command_lp() but with different memory +- * addresses for writing to ALE and CLE and without 16 bit support. ++ ++/* ++ * read device ready pin + */ +-static void cmx270_nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr) ++static int cmx270_device_ready(struct mtd_info *mtd) + { +- register struct nand_chip *this = mtd->priv; +- +- /* Emulate NAND_CMD_READOOB */ +- if (command == NAND_CMD_READOOB) { +- column += mtd->oobblock; +- command = NAND_CMD_READ0; +-// printk("Read OOB: column: $%x, page: $%x\n", column, page_addr); +- } +- +- /* Write out the command to the device. */ +- cmx270_nand_write_CLE(mtd, command); +- +- if (column != -1 || page_addr != -1) { +- +- /* Serially input address */ +- if (column != -1) { +- cmx270_nand_write_ALE(mtd, column & 0xff); +- cmx270_nand_write_ALE(mtd, column >> 8); +- if ((column >> 8) > 0xf) { +- printk("out of range column\n"); +- } +- } +- if (page_addr != -1) { +- cmx270_nand_write_ALE(mtd, (unsigned char) (page_addr & 0xff)); +- cmx270_nand_write_ALE(mtd, (unsigned char) ((page_addr >> 8) & 0xff)); +- /* One more address cycle for devices > 128MiB */ +- if (this->chipsize > (128 << 20)) { +- cmx270_nand_write_ALE(mtd, (unsigned char) ((page_addr >> 16) & 0xff)); +- } +- } +- } ++ DRAIN_WB(); + +- udelay(1); +- +- /* +- * program and erase have their own busy handlers +- * status and sequential in needs no delay +- */ +- switch (command) { +- +- case NAND_CMD_CACHEDPROG: +- case NAND_CMD_PAGEPROG: +- case NAND_CMD_ERASE1: +- case NAND_CMD_ERASE2: +- case NAND_CMD_SEQIN: +- case NAND_CMD_STATUS: +- case NAND_CMD_DEPLETE1: +- return; +- +- /* +- * read error status commands require only a short delay +- */ +- case NAND_CMD_STATUS_ERROR: +- case NAND_CMD_STATUS_ERROR0: +- case NAND_CMD_STATUS_ERROR1: +- case NAND_CMD_STATUS_ERROR2: +- case NAND_CMD_STATUS_ERROR3: +- udelay(this->chip_delay); +- return; +- +- case NAND_CMD_RESET: +- if (this->dev_ready) +- break; +- udelay(this->chip_delay); +- cmx270_nand_write_CLE(mtd, NAND_CMD_STATUS); +- while ( !(this->read_byte(mtd) & NAND_STATUS_READY)); +- return; +- +- case NAND_CMD_READ0: +- /* Write out the start read command */ +- cmx270_nand_write_CLE(mtd, NAND_CMD_READSTART); +- /* Fall through into ready check */ +- +- /* This applies to read commands */ +- default: +- /* +- * If we don't have access to the busy pin, we apply the given +- * command delay +- */ +- if (!this->dev_ready) { +- udelay (this->chip_delay); +- return; +- } +- } +- +- /* Apply this short delay always to ensure that we do wait tWB in +- * any case on any machine. */ +- ndelay (100); +- /* wait until command is processed */ +- while (!this->dev_ready(mtd)); ++ return (GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB)); + } + +- +-#ifdef CONFIG_MTD_PARTITIONS +-const char *part_probes[] = { "cmdlinepart", NULL }; +-#endif +- +-int __init cmx270_nand_init(void) ++/* ++ * Main initialization routine ++ */ ++static int __devinit cmx270_init(void) + { + struct nand_chip *this; +- struct mtd_partition* cmx270_partition_info; +- int err = 0; +- +- pxa_gpio_mode(CM_X270_GPIO_NAND_RB); ++ const char *part_type; ++ struct mtd_partition *mtd_parts; ++ int mtd_parts_nb = 0; ++ int ret; + +- GPSR(CM_X270_GPIO_NAND_CS) = GPIO_bit(CM_X270_GPIO_NAND_CS); +- pxa_gpio_mode(CM_X270_GPIO_NAND_CS | GPIO_OUT); +- + /* Allocate memory for MTD device structure and private data */ +- cmx270_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), +- GFP_KERNEL); +- if (!cmx270_mtd) { +- printk(KERN_WARNING "Unable to allocate cm-x270 NAND mtd device structure.\n"); +- err = -ENOMEM; +- goto out; ++ cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) + ++ sizeof(struct nand_chip), ++ GFP_KERNEL); ++ if (!cmx270_nand_mtd) { ++ printk("Unable to allocate CM-X270 NAND MTD device structure.\n"); ++ return -ENOMEM; + } + +- /* map physical address */ +- cmx270_nand_io_base = ioremap(CM_X270_NAND_PHYS, 0x100); +- if (!cmx270_nand_io_base) { +- err = -EIO; +- goto out_mtd; ++ cmx270_nand_io = ioremap(PXA_CS1_PHYS, 12); ++ if (!cmx270_nand_io) { ++ printk("Unable to ioremap NAND device\n"); ++ ret = -EINVAL; ++ goto err1; + } + + /* Get pointer to private data */ +- this = (struct nand_chip *)(&cmx270_mtd[1]); +- +- /* Initialize structures */ +- memset((char *) cmx270_mtd, 0, sizeof(struct mtd_info)); +- memset((char *) this, 0, sizeof(struct nand_chip)); ++ this = (struct nand_chip *)(&cmx270_nand_mtd[1]); + + /* Link the private data with the MTD structure */ +- cmx270_mtd->priv = this; ++ cmx270_nand_mtd->owner = THIS_MODULE; ++ cmx270_nand_mtd->priv = this; + +- this->IO_ADDR_R = cmx270_nand_io_base; +- this->IO_ADDR_W = cmx270_nand_io_base; +- this->read_byte = cmx270_nand_read_byte; +- this->write_byte = cmx270_nand_write_byte; +- this->write_buf = cmx270_nand_write_buf; +- this->read_buf = cmx270_nand_read_buf; +- this->verify_buf = cmx270_nand_verify_buf; +- this->hwcontrol = cmx270_nand_hwcontrol; +- this->dev_ready = cmx270_nand_device_ready; +- this->cmdfunc = cmx270_nand_command_lp; +- this->chip_delay = 25; ++ /* insert callbacks */ ++ this->IO_ADDR_R = cmx270_nand_io; ++ this->IO_ADDR_W = cmx270_nand_io; ++ this->hwcontrol = cmx270_hwcontrol; ++ this->dev_ready = cmx270_device_ready; ++ ++ /* 15 us command delay time */ ++ this->chip_delay = 20; + this->eccmode = NAND_ECC_SOFT; + +- /* Scan to find existance of the device */ +- if (nand_scan(cmx270_mtd, 1)) { +- err = -ENXIO; +- goto out_ior; ++ /* read/write functions */ ++ this->read_byte = cmx270_read_byte; ++ this->read_buf = cmx270_read_buf; ++ this->write_buf = cmx270_write_buf; ++ this->verify_buf = cmx270_verify_buf; ++ ++ /* Scan to find existence of the device */ ++ if (nand_scan (cmx270_nand_mtd, 1)) { ++ printk(KERN_NOTICE "No NAND device\n"); ++ ret = -ENXIO; ++ goto err2; ++ } ++ ++#ifdef CONFIG_MTD_CMDLINE_PARTS ++ mtd_parts_nb = parse_mtd_partitions(cmx270_nand_mtd, part_probes, ++ &mtd_parts, 0); ++ if (mtd_parts_nb > 0) ++ part_type = "command line"; ++ else ++ mtd_parts_nb = 0; ++#endif ++ if (!mtd_parts_nb) { ++ mtd_parts = partition_info; ++ mtd_parts_nb = NUM_PARTITIONS; ++ part_type = "static"; + } + + /* Register the partitions */ +- cmx270_mtd->name = "cmx270-mtd"; +- nr_partitions = parse_mtd_partitions(cmx270_mtd, part_probes, &cmx270_partition_info, 0); +- if (nr_partitions <= 0) { +- nr_partitions = DEFAULT_NUM_PARTITIONS; +- cmx270_partition_info = cmx270_default_partition_info; +- } ++ printk(KERN_NOTICE "Using %s partition definition\n", part_type); ++ ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb); ++ if (ret) ++ goto err2; ++ ++ /* Return happy */ ++ return 0; ++ ++err2: ++ iounmap(cmx270_nand_io); ++err1: ++ kfree(cmx270_nand_mtd); ++ ++ return ret; + +- add_mtd_partitions(cmx270_mtd, cmx270_partition_info, nr_partitions); +- +- goto out; +- +-out_ior: +- iounmap((void*) cmx270_nand_io_base); +-out_mtd: +- kfree(cmx270_mtd); +-out: +- return err; + } +-module_init(cmx270_nand_init); ++module_init(cmx270_init); + +-static void __exit cmx270_nand_cleanup(void) ++/* ++ * Clean up routine ++ */ ++static void __devexit cmx270_cleanup(void) + { +- nand_release(cmx270_mtd); +- kfree(cmx270_mtd); ++ /* Release resources, unregister device */ ++ nand_release(cmx270_nand_mtd); ++ ++ iounmap(cmx270_nand_io); ++ ++ /* Free the MTD device structure */ ++ kfree (cmx270_nand_mtd); + } ++module_exit(cmx270_cleanup); + + MODULE_LICENSE("GPL"); +-MODULE_AUTHOR("Raphael Assenat <raph@8d.com>"); +-MODULE_DESCRIPTION("NAND flash driver for cm-x270 boards"); +- ++MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>"); ++MODULE_DESCRIPTION("NAND flash driver for Compulab CM-X270 Module"); diff --git a/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes1-r0.patch b/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes1-r0.patch new file mode 100644 index 0000000000..da00e1f8e9 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270-2.6.17/mtd_fixes1-r0.patch @@ -0,0 +1,15 @@ +Index: linux-2.6.17/drivers/mtd/nand/cm-x270.c +=================================================================== +--- linux-2.6.17.orig/drivers/mtd/nand/cm-x270.c 2006-07-19 16:47:08.000000000 +0100 ++++ linux-2.6.17/drivers/mtd/nand/cm-x270.c 2006-07-19 16:55:23.000000000 +0100 +@@ -184,6 +184,10 @@ + int mtd_parts_nb = 0; + int ret; + ++ pxa_gpio_mode(GPIO_NAND_RB); ++ GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS); ++ pxa_gpio_mode(GPIO_NAND_CS | GPIO_OUT); ++ + /* Allocate memory for MTD device structure and private data */ + cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) + + sizeof(struct nand_chip), diff --git a/openembedded/packages/linux/linux-cmx270_2.6.17.bb b/openembedded/packages/linux/linux-cmx270_2.6.17.bb new file mode 100644 index 0000000000..d9cdd7e9e2 --- /dev/null +++ b/openembedded/packages/linux/linux-cmx270_2.6.17.bb @@ -0,0 +1,40 @@ +SECTION = "kernel" +DESCRIPTION = "Linux kernel CM-X270" +LICENSE = "GPL" +PR = "r7" + +SRC_URI = "http://www.kernel.org/pub/linux/kernel/v2.6/linux-2.6.17.tar.bz2 \ + http://raph.people.8d.com/kernels/8d-cmx2xx-2.6.17.1-june21.diff;patch=1 \ + http://raph.people.8d.com/kernels/hardcode-archID.diff;patch=1 \ + file://cm_x2xx_mbx.patch;patch=1 \ + file://add_2700g_plat-r0.patch;patch=1 \ + file://mtd_fixes-r0.patch;patch=1 \ + file://mtd_fixes1-r0.patch;patch=1 \ + file://mach-types \ + file://defconfig" + +S = "${WORKDIR}//linux-2.6.17" + +KERNEL_OUTPUT = "arch/${ARCH}/boot/compressed/${KERNEL_IMAGETYPE}" + +inherit kernel + +COMPATIBLE_HOST = "arm.*-linux" +COMPATIBLE_MACHINE = "cmx270" + +do_configure_prepend() { + install -m 0644 ${WORKDIR}/defconfig ${S}/.config + install -m 0644 ${WORKDIR}/mach-types ${S}/arch/arm/tools/mach-types + oe_runmake oldconfig +} + +do_deploy() { + install -d ${DEPLOY_DIR}/images + install -m 0644 arch/${ARCH}/boot/${KERNEL_IMAGETYPE} ${DEPLOY_DIR}/images/${KERNEL_IMAGETYPE}-${PV}-${MACHINE}-${DATETIME}.bin +} + +do_deploy[dirs] = "${S}" + +addtask deploy before do_build after do_compile + +KERNEL_RELEASE = "2.6.17"
\ No newline at end of file |