diff options
author | Andreas Oberritter <obi@opendreambox.org> | 2016-05-09 16:35:58 +0200 |
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committer | Andreas Oberritter <obi@opendreambox.org> | 2017-10-17 04:38:27 +0200 |
commit | 35c6802a8b2892715e4753cae54e732f92a8acf7 (patch) | |
tree | 356a5c89e73308d61a1a4ccb1ffbe9210de6cc64 | |
parent | 9d93b2e60d85e616dfb29f3648e3413ddf6e16f6 (diff) | |
download | openembedded-core-contrib-35c6802a8b2892715e4753cae54e732f92a8acf7.tar.gz |
ffmpeg: backport configuration fix for MIPS32
| error: '-mips32r2' conflicts with the other architecture options, which specify a mips32 processor
Signed-off-by: Andreas Oberritter <obi@opendreambox.org>
-rw-r--r-- | meta/recipes-multimedia/ffmpeg/ffmpeg-3.0/0001-configure-build-fix-for-P5600-with-mips-code-restruc.patch | 316 | ||||
-rw-r--r-- | meta/recipes-multimedia/ffmpeg/ffmpeg_3.0.bb | 3 |
2 files changed, 318 insertions, 1 deletions
diff --git a/meta/recipes-multimedia/ffmpeg/ffmpeg-3.0/0001-configure-build-fix-for-P5600-with-mips-code-restruc.patch b/meta/recipes-multimedia/ffmpeg/ffmpeg-3.0/0001-configure-build-fix-for-P5600-with-mips-code-restruc.patch new file mode 100644 index 0000000000..075338bbce --- /dev/null +++ b/meta/recipes-multimedia/ffmpeg/ffmpeg-3.0/0001-configure-build-fix-for-P5600-with-mips-code-restruc.patch @@ -0,0 +1,316 @@ +Upstream-Status: Backport [3.0.2] + +Signed-off-by: Andreas Oberritter <obi@opendreambox.org> + +From 83eaaae0057fc471a621a2c1bf1e95e4ab27484f Mon Sep 17 00:00:00 2001 +From: Shivraj Patil <shivraj.patil@imgtec.com> +Date: Tue, 26 Apr 2016 12:17:15 +0530 +Subject: [PATCH] configure: build fix for P5600 with mips code restructuring + +Note:- backporting commit 15ef98afd10b3696d29fb6d19606ba03a9dd47ad from head + +Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> +Signed-off-by: Michael Niedermayer <michael@niedermayer.cc> +--- + configure | 252 ++++++++++++++++++++++++++++++-------------------------------- + 1 file changed, 120 insertions(+), 132 deletions(-) + +diff --git a/configure b/configure +index 475c087..9103e85 100755 +--- a/configure ++++ b/configure +@@ -913,6 +913,25 @@ void foo(void){ __asm__ volatile($code); } + EOF + } + ++check_inline_asm_flags(){ ++ log check_inline_asm_flags "$@" ++ name="$1" ++ code="$2" ++ flags='' ++ shift 2 ++ while [ "$1" != "" ]; do ++ append flags $1 ++ shift ++ done; ++ disable $name ++ cat > $TMPC <<EOF ++void foo(void){ __asm__ volatile($code); } ++EOF ++ log_file $TMPC ++ check_cmd $cc $CPPFLAGS $CFLAGS $flags "$@" $CC_C $(cc_o $TMPO) $TMPC && ++ enable $name && add_cflags $flags && add_asflags $flags && add_ldflags $flags ++} ++ + check_insn(){ + log check_insn "$@" + check_inline_asm ${1}_inline "\"$2\"" +@@ -1657,6 +1676,7 @@ ARCH_EXT_LIST_ARM=" + ARCH_EXT_LIST_MIPS=" + mipsfpu + mips32r2 ++ mips32r5 + mips64r2 + mips32r6 + mips64r6 +@@ -2150,10 +2170,11 @@ mipsfpu_deps="mips" + mipsdsp_deps="mips" + mipsdspr2_deps="mips" + mips32r2_deps="mips" ++mips32r5_deps="mips" + mips32r6_deps="mips" + mips64r2_deps="mips" + mips64r6_deps="mips" +-msa_deps="mips" ++msa_deps="mipsfpu" + mmi_deps="mips" + + altivec_deps="ppc" +@@ -4153,118 +4174,90 @@ elif enabled mips; then + + cpuflags="-march=$cpu" + +- case $cpu in +- 24kc) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsfpu +- disable mipsdsp +- disable mipsdspr2 +- disable msa +- ;; +- 24kf*) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsdsp +- disable mipsdspr2 +- disable msa +- ;; +- 24kec|34kc|1004kc) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsfpu +- disable mipsdspr2 +- disable msa +- ;; +- 24kef*|34kf*|1004kf*) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsdspr2 +- disable msa +- ;; +- 74kc) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsfpu +- disable msa +- ;; +- 74kf) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable msa +- ;; +- p5600) +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsdsp +- disable mipsdspr2 +- check_cflags "-mtune=p5600" && +- check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" && +- add_asflags "-mfp64" +- ;; +- i6400) +- disable mips32r2 +- disable mips32r6 +- disable mips64r2 +- disable mipsdsp +- disable mipsdspr2 +- check_cflags "-mtune=i6400 -mabi=64" && +- check_cflags "-mfp64 -msched-weight -mload-store-pairs -funroll-loops" && +- check_ldflags "-mabi=64" && +- add_asflags "-mfp64" +- ;; +- loongson*) +- disable mips32r2 +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsfpu +- disable mipsdsp +- disable mipsdspr2 +- disable msa +- enable local_aligned_8 local_aligned_16 local_aligned_32 +- enable simd_align_16 +- enable fast_64bit +- enable fast_clz +- enable fast_cmov +- enable fast_unaligned +- disable aligned_stack +- case $cpu in +- loongson3*) +- cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations" +- ;; +- loongson2e) +- cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations" +- ;; +- loongson2f) +- cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations" +- ;; +- esac +- ;; +- generic) +- disable mips64r6 +- disable msa +- ;; +- *) +- # Unknown CPU. Disable everything. +- warn "unknown CPU. Disabling all MIPS optimizations." +- disable mipsfpu +- disable mips32r2 +- disable mips32r6 +- disable mips64r2 +- disable mips64r6 +- disable mipsdsp +- disable mipsdspr2 +- disable msa +- ;; +- esac ++ if [ "$cpu" != "generic" ]; then ++ disable mips32r2 ++ disable mips32r5 ++ disable mips64r2 ++ disable mips32r6 ++ disable mips64r6 ++ disable loongson2 ++ disable loongson3 ++ ++ case $cpu in ++ 24kc|24kf*|24kec|34kc|1004kc|24kef*|34kf*|1004kf*|74kc|74kf) ++ enable mips32r2 ++ disable msa ++ ;; ++ p5600|i6400) ++ disable mipsdsp ++ disable mipsdspr2 ++ ;; ++ loongson*) ++ enable loongson2 ++ enable loongson3 ++ enable local_aligned_8 local_aligned_16 local_aligned_32 ++ enable simd_align_16 ++ enable fast_64bit ++ enable fast_clz ++ enable fast_cmov ++ enable fast_unaligned ++ disable aligned_stack ++ case $cpu in ++ loongson3*) ++ cpuflags="-march=loongson3a -mhard-float -fno-expensive-optimizations" ++ ;; ++ loongson2e) ++ cpuflags="-march=loongson2e -mhard-float -fno-expensive-optimizations" ++ ;; ++ loongson2f) ++ cpuflags="-march=loongson2f -mhard-float -fno-expensive-optimizations" ++ ;; ++ esac ++ ;; ++ *) ++ # Unknown CPU. Disable everything. ++ warn "unknown CPU. Disabling all MIPS optimizations." ++ disable mipsfpu ++ disable mipsdsp ++ disable mipsdspr2 ++ disable msa ++ disable mmi ++ ;; ++ esac ++ ++ case $cpu in ++ 24kc) ++ disable mipsfpu ++ disable mipsdsp ++ disable mipsdspr2 ++ ;; ++ 24kf*) ++ disable mipsdsp ++ disable mipsdspr2 ++ ;; ++ 24kec|34kc|1004kc) ++ disable mipsfpu ++ disable mipsdspr2 ++ ;; ++ 24kef*|34kf*|1004kf*) ++ disable mipsdspr2 ++ ;; ++ 74kc) ++ disable mipsfpu ++ ;; ++ p5600) ++ enable mips32r5 ++ check_cflags "-mtune=p5600" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" ++ ;; ++ i6400) ++ enable mips64r6 ++ check_cflags "-mtune=i6400 -mabi=64" && check_cflags "-msched-weight -mload-store-pairs -funroll-loops" && check_ldflags "-mabi=64" ++ ;; ++ esac ++ else ++ # We do not disable anything. Is up to the user to disable the unwanted features. ++ warn 'generic cpu selected' ++ fi + + elif enabled ppc; then + +@@ -5073,27 +5066,22 @@ elif enabled mips; then + enabled mmi && check_inline_asm mmi '"punpcklhw $f0, $f0, $f0"' + + # Enable minimum ISA based on selected options +- if enabled mips64 && (enabled mipsdsp || enabled mipsdspr2); then +- add_cflags "-mips64r2" +- add_asflags "-mips64r2" +- elif enabled mips64 && enabled mipsfpu && disabled loongson2 && disabled loongson3; then +- add_cflags "-mips64" +- add_asflags "-mips64" +- elif enabled mipsdsp || enabled mipsdspr2; then +- add_cflags "-mips32r2 -mfp32" +- add_asflags "-mips32r2 -mfp32" ++ if enabled mips64; then ++ enabled mips64r6 && check_inline_asm_flags mips64r6 '"dlsa $0, $0, $0, 1"' '-mips64r6' ++ enabled mips64r2 && check_inline_asm_flags mips64r2 '"dext $0, $0, 0, 1"' '-mips64r2' ++ disabled mips64r6 && disabled mips64r2 && check_inline_asm_flags mips64r1 '"daddi $0, $0, 0"' '-mips64' ++ else ++ enabled mips32r6 && check_inline_asm_flags mips32r6 '"aui $0, $0, 0"' '-mips32r6' ++ enabled mips32r5 && check_inline_asm_flags mips32r5 '"eretnc"' '-mips32r5' ++ enabled mips32r2 && check_inline_asm_flags mips32r2 '"ext $0, $0, 0, 1"' '-mips32r2' ++ disabled mips32r6 && disabled mips32r5 && disabled mips32r2 && check_inline_asm_flags mips32r1 '"addi $0, $0, 0"' '-mips32' + fi + +- enabled mipsdsp && add_cflags "-mdsp" && add_asflags "-mdsp" && +- check_inline_asm mipsdsp '"addu.qb $t0, $t1, $t2"' +- enabled mipsdspr2 && add_cflags "-mdspr2" && add_asflags "-mdspr2" && +- check_inline_asm mipsdspr2 '"absq_s.qb $t0, $t1"' +- enabled mipsfpu && add_cflags "-mhard-float" && add_asflags "-mhard-float" && +- check_inline_asm mipsfpu '"madd.d $f0, $f2, $f4, $f6"' +- enabled msa && check_cflags "-mmsa" && check_ldflags "-mmsa" && +- check_inline_asm msa '"addvi.b $w0, $w1, 1"' +- +- enabled msa && add_asflags "-mmsa" ++ enabled mipsfpu && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f2"' '-mhard-float' ++ enabled mipsfpu && (enabled mips32r5 || enabled mips32r6 || enabled mips64r6) && check_inline_asm_flags mipsfpu '"cvt.d.l $f0, $f1"' '-mfp64' ++ enabled mipsfpu && enabled msa && check_inline_asm_flags msa '"addvi.b $w0, $w1, 1"' '-mmsa' && check_header msa.h || disable msa ++ enabled mipsdsp && check_inline_asm_flags mipsdsp '"addu.qb $t0, $t1, $t2"' '-mdsp' ++ enabled mipsdspr2 && check_inline_asm_flags mipsdspr2 '"absq_s.qb $t0, $t1"' '-mdspr2' + + elif enabled parisc; then + +-- +1.9.1 + diff --git a/meta/recipes-multimedia/ffmpeg/ffmpeg_3.0.bb b/meta/recipes-multimedia/ffmpeg/ffmpeg_3.0.bb index 1dfbb9b04c..07ea426f3f 100644 --- a/meta/recipes-multimedia/ffmpeg/ffmpeg_3.0.bb +++ b/meta/recipes-multimedia/ffmpeg/ffmpeg_3.0.bb @@ -13,7 +13,8 @@ LIC_FILES_CHKSUM = "file://COPYING.GPLv2;md5=b234ee4d69f5fce4486a80fdaf4a4263 \ file://COPYING.LGPLv2.1;md5=bd7a443320af8c812e4c18d1b79df004 \ file://COPYING.LGPLv3;md5=e6a600fd5e1d9cbde2d983680233ad02" -SRC_URI = "https://www.ffmpeg.org/releases/${BP}.tar.xz" +SRC_URI = "https://www.ffmpeg.org/releases/${BP}.tar.xz \ + file://0001-configure-build-fix-for-P5600-with-mips-code-restruc.patch" SRC_URI[md5sum] = "ef9b6634bb7c920efc940b4d55adf7b2" SRC_URI[sha256sum] = "12f32cee41c74435f608c30793fd616bdf53467bb513278e273e135a4c58e470" |