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| author |   Khem Raj <raj.khem@gmail.com> | 2018-08-29 13:27:01 -0700 |
|---|---|---|
| committer | Khem Raj <raj.khem@gmail.com> | 2018-08-29 13:27:01 -0700 |
| commit | e2ba59eadf6b88f176e25915ab138276bdae960c (patch) | |
| tree | 641aad59562923d7aad964e7cbbea59b12c11ef4 | |
| parent | 7af643301d5c3961595ec7ec4f18e94454eabacd (diff) | |
| download | openembedded-core-contrib-e2ba59eadf6b88f176e25915ab138276bdae960c.tar.gz | |
libc-package: Add risc-v specific options to cross-localedef invocation
It was otherwise being deferred until boot time
Signed-off-by: Khem Raj <raj.khem@gmail.com>
| -rw-r--r-- | meta/classes/libc-package.bbclass | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/meta/classes/libc-package.bbclass b/meta/classes/libc-package.bbclass index 2e7cd25297..9d09c7be6a 100644 --- a/meta/classes/libc-package.bbclass +++ b/meta/classes/libc-package.bbclass @@ -257,6 +257,8 @@ python package_do_split_gconvs () { "mipsisa32r6el": " --uint32-align=4 --little-endian ", \ "mips64el":" --uint32-align=4 --little-endian ", \ "mipsisa64r6el":" --uint32-align=4 --little-endian ", \ + "riscv64": " --uint32-align=4 --little-endian ", \ + "riscv32": " --uint32-align=4 --little-endian ", \ "i586": " --uint32-align=4 --little-endian ", \ "i686": " --uint32-align=4 --little-endian ", \ "x86_64": " --uint32-align=4 --little-endian " } |