diff options
author | Alejandro Hernandez Samaniego <alejandro@enedino.org> | 2021-05-10 23:31:34 -0600 |
---|---|---|
committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2021-05-12 23:05:17 +0100 |
commit | 31fde82640bf0d185eab55d2cbaf663c9faae801 (patch) | |
tree | 3d2db3fbcb7373af619674fd4cf8534b1e7aa4bf | |
parent | 1b470a5fe7c74938cac7c83cd104ca25182af6cc (diff) | |
download | openembedded-core-contrib-31fde82640bf0d185eab55d2cbaf663c9faae801.tar.gz |
baremetal-helloworld: Enable RISC-V 64 port
Add support for MACHINE=qemuriscv64.
$ runqemu nographic
KERNEL: [tmp/deploy/images/qemuriscv64/baremetal-helloworld-image-qemuriscv64.bin]
MACHINE: [qemuriscv64]
FSTYPE: [bin]
runqemu - INFO - Running tmp/work/x86_64-linux/qemu-helper-native/1.0-r1/recipe-sysroot-native/usr/bin/qemu-system-riscv64
Hello OpenEmbedded on RISC-V 64!
Signed-off-by: Alejandro Enedino Hernandez Samaniego <alejandro@enedino.org>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
-rw-r--r-- | meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb | 5 | ||||
-rw-r--r-- | meta/classes/baremetal-image.bbclass | 14 |
2 files changed, 16 insertions, 3 deletions
diff --git a/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb b/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb index ee945c1ff0..19ef16988f 100644 --- a/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb +++ b/meta-skeleton/recipes-baremetal/baremetal-examples/baremetal-helloworld_git.bb @@ -4,7 +4,7 @@ DESCRIPTION = "These are introductory examples to showcase the use of QEMU to ru LICENSE = "MIT" LIC_FILES_CHKSUM = "file://LICENSE;md5=39346640a23c701e4f459e05f56f4449" -SRCREV = "99f4fa4a3b266b42b52af302610b0f4f429ba5e3" +SRCREV = "0bf9ea216e6f76be50726a3a74e527b7bbb0ad93" PV = "0.1+git${SRCPV}" SRC_URI = "git://github.com/aehs29/baremetal-helloqemu.git;protocol=https;branch=master" @@ -28,12 +28,13 @@ inherit baremetal-image # machine that QEMU uses on OE, e.g. -machine virt -cpu cortex-a57 # but the examples can also be run on other architectures/machines # such as vexpress-a15 by overriding the setting on the machine.conf -COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64" +COMPATIBLE_MACHINE = "qemuarmv5|qemuarm|qemuarm64|qemuriscv64" BAREMETAL_QEMUARCH ?= "" BAREMETAL_QEMUARCH_qemuarmv5 = "versatile" BAREMETAL_QEMUARCH_qemuarm = "arm" BAREMETAL_QEMUARCH_qemuarm64 = "aarch64" +BAREMETAL_QEMUARCH_qemuriscv64 = "riscv64" EXTRA_OEMAKE_append = " QEMUARCH=${BAREMETAL_QEMUARCH} V=1" diff --git a/meta/classes/baremetal-image.bbclass b/meta/classes/baremetal-image.bbclass index b0f5e885b5..319b61c7cd 100644 --- a/meta/classes/baremetal-image.bbclass +++ b/meta/classes/baremetal-image.bbclass @@ -73,7 +73,19 @@ QB_DEFAULT_KERNEL ?= "${IMAGE_LINK_NAME}.bin" QB_MEM ?= "-m 256" QB_DEFAULT_FSTYPE ?= "bin" QB_DTB ?= "" -QB_OPT_APPEND = "-nographic" +QB_OPT_APPEND_append = " -nographic" + +# RISC-V tunes set the BIOS, unset, and instruct QEMU to +# ignore the BIOS and boot from -kernel +QB_DEFAULT_BIOS_qemuriscv64 = "" +QB_OPT_APPEND_append_qemuriscv64 = " -bios none" + + +# Use the medium-any code model for the RISC-V 64 bit implementation, +# since medlow can only access addresses below 0x80000000 and RAM +# starts at 0x80000000 on RISC-V 64 +CFLAGS_append_qemuriscv64 = " -mcmodel=medany" + # This next part is necessary to trick the build system into thinking # its building an image recipe so it generates the qemuboot.conf |